blob: 9889a70ff4f6fece5bfabbfb45a3470f721a5a32 [file] [log] [blame]
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001/*
2 * Copyright (C) 2015 Microchip Technology
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, see <http://www.gnu.org/licenses/>.
16 */
17#include <linux/version.h>
18#include <linux/module.h>
19#include <linux/netdevice.h>
20#include <linux/etherdevice.h>
21#include <linux/ethtool.h>
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000022#include <linux/usb.h>
23#include <linux/crc32.h>
24#include <linux/signal.h>
25#include <linux/slab.h>
26#include <linux/if_vlan.h>
27#include <linux/uaccess.h>
28#include <linux/list.h>
29#include <linux/ip.h>
30#include <linux/ipv6.h>
31#include <linux/mdio.h>
32#include <net/ip6_checksum.h>
Woojung Huhcc89c322016-11-01 20:02:00 +000033#include <linux/interrupt.h>
34#include <linux/irqdomain.h>
35#include <linux/irq.h>
36#include <linux/irqchip/chained_irq.h>
Woojung.Huh@microchip.combdfba55e2015-09-16 23:41:07 +000037#include <linux/microchipphy.h>
Russell King8c56ea42017-02-07 15:02:57 -080038#include <linux/phy.h>
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000039#include "lan78xx.h"
40
41#define DRIVER_AUTHOR "WOOJUNG HUH <woojung.huh@microchip.com>"
42#define DRIVER_DESC "LAN78XX USB 3.0 Gigabit Ethernet Devices"
43#define DRIVER_NAME "lan78xx"
Woojung Huh02dc1f32016-12-07 20:26:25 +000044#define DRIVER_VERSION "1.0.6"
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000045
46#define TX_TIMEOUT_JIFFIES (5 * HZ)
47#define THROTTLE_JIFFIES (HZ / 8)
48#define UNLINK_TIMEOUT_MS 3
49
50#define RX_MAX_QUEUE_MEMORY (60 * 1518)
51
52#define SS_USB_PKT_SIZE (1024)
53#define HS_USB_PKT_SIZE (512)
54#define FS_USB_PKT_SIZE (64)
55
56#define MAX_RX_FIFO_SIZE (12 * 1024)
57#define MAX_TX_FIFO_SIZE (12 * 1024)
58#define DEFAULT_BURST_CAP_SIZE (MAX_TX_FIFO_SIZE)
59#define DEFAULT_BULK_IN_DELAY (0x0800)
60#define MAX_SINGLE_PACKET_SIZE (9000)
61#define DEFAULT_TX_CSUM_ENABLE (true)
62#define DEFAULT_RX_CSUM_ENABLE (true)
63#define DEFAULT_TSO_CSUM_ENABLE (true)
64#define DEFAULT_VLAN_FILTER_ENABLE (true)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000065#define TX_OVERHEAD (8)
66#define RXW_PADDING 2
67
68#define LAN78XX_USB_VENDOR_ID (0x0424)
69#define LAN7800_USB_PRODUCT_ID (0x7800)
70#define LAN7850_USB_PRODUCT_ID (0x7850)
Woojung Huh02dc1f32016-12-07 20:26:25 +000071#define LAN7801_USB_PRODUCT_ID (0x7801)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000072#define LAN78XX_EEPROM_MAGIC (0x78A5)
73#define LAN78XX_OTP_MAGIC (0x78F3)
74
75#define MII_READ 1
76#define MII_WRITE 0
77
78#define EEPROM_INDICATOR (0xA5)
79#define EEPROM_MAC_OFFSET (0x01)
80#define MAX_EEPROM_SIZE 512
81#define OTP_INDICATOR_1 (0xF3)
82#define OTP_INDICATOR_2 (0xF7)
83
84#define WAKE_ALL (WAKE_PHY | WAKE_UCAST | \
85 WAKE_MCAST | WAKE_BCAST | \
86 WAKE_ARP | WAKE_MAGIC)
87
88/* USB related defines */
89#define BULK_IN_PIPE 1
90#define BULK_OUT_PIPE 2
91
92/* default autosuspend delay (mSec)*/
93#define DEFAULT_AUTOSUSPEND_DELAY (10 * 1000)
94
Woojung Huh20ff5562016-03-16 22:10:40 +000095/* statistic update interval (mSec) */
96#define STAT_UPDATE_TIMER (1 * 1000)
97
Woojung Huhcc89c322016-11-01 20:02:00 +000098/* defines interrupts from interrupt EP */
99#define MAX_INT_EP (32)
100#define INT_EP_INTEP (31)
101#define INT_EP_OTP_WR_DONE (28)
102#define INT_EP_EEE_TX_LPI_START (26)
103#define INT_EP_EEE_TX_LPI_STOP (25)
104#define INT_EP_EEE_RX_LPI (24)
105#define INT_EP_MAC_RESET_TIMEOUT (23)
106#define INT_EP_RDFO (22)
107#define INT_EP_TXE (21)
108#define INT_EP_USB_STATUS (20)
109#define INT_EP_TX_DIS (19)
110#define INT_EP_RX_DIS (18)
111#define INT_EP_PHY (17)
112#define INT_EP_DP (16)
113#define INT_EP_MAC_ERR (15)
114#define INT_EP_TDFU (14)
115#define INT_EP_TDFO (13)
116#define INT_EP_UTX (12)
117#define INT_EP_GPIO_11 (11)
118#define INT_EP_GPIO_10 (10)
119#define INT_EP_GPIO_9 (9)
120#define INT_EP_GPIO_8 (8)
121#define INT_EP_GPIO_7 (7)
122#define INT_EP_GPIO_6 (6)
123#define INT_EP_GPIO_5 (5)
124#define INT_EP_GPIO_4 (4)
125#define INT_EP_GPIO_3 (3)
126#define INT_EP_GPIO_2 (2)
127#define INT_EP_GPIO_1 (1)
128#define INT_EP_GPIO_0 (0)
129
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000130static const char lan78xx_gstrings[][ETH_GSTRING_LEN] = {
131 "RX FCS Errors",
132 "RX Alignment Errors",
133 "Rx Fragment Errors",
134 "RX Jabber Errors",
135 "RX Undersize Frame Errors",
136 "RX Oversize Frame Errors",
137 "RX Dropped Frames",
138 "RX Unicast Byte Count",
139 "RX Broadcast Byte Count",
140 "RX Multicast Byte Count",
141 "RX Unicast Frames",
142 "RX Broadcast Frames",
143 "RX Multicast Frames",
144 "RX Pause Frames",
145 "RX 64 Byte Frames",
146 "RX 65 - 127 Byte Frames",
147 "RX 128 - 255 Byte Frames",
148 "RX 256 - 511 Bytes Frames",
149 "RX 512 - 1023 Byte Frames",
150 "RX 1024 - 1518 Byte Frames",
151 "RX Greater 1518 Byte Frames",
152 "EEE RX LPI Transitions",
153 "EEE RX LPI Time",
154 "TX FCS Errors",
155 "TX Excess Deferral Errors",
156 "TX Carrier Errors",
157 "TX Bad Byte Count",
158 "TX Single Collisions",
159 "TX Multiple Collisions",
160 "TX Excessive Collision",
161 "TX Late Collisions",
162 "TX Unicast Byte Count",
163 "TX Broadcast Byte Count",
164 "TX Multicast Byte Count",
165 "TX Unicast Frames",
166 "TX Broadcast Frames",
167 "TX Multicast Frames",
168 "TX Pause Frames",
169 "TX 64 Byte Frames",
170 "TX 65 - 127 Byte Frames",
171 "TX 128 - 255 Byte Frames",
172 "TX 256 - 511 Bytes Frames",
173 "TX 512 - 1023 Byte Frames",
174 "TX 1024 - 1518 Byte Frames",
175 "TX Greater 1518 Byte Frames",
176 "EEE TX LPI Transitions",
177 "EEE TX LPI Time",
178};
179
180struct lan78xx_statstage {
181 u32 rx_fcs_errors;
182 u32 rx_alignment_errors;
183 u32 rx_fragment_errors;
184 u32 rx_jabber_errors;
185 u32 rx_undersize_frame_errors;
186 u32 rx_oversize_frame_errors;
187 u32 rx_dropped_frames;
188 u32 rx_unicast_byte_count;
189 u32 rx_broadcast_byte_count;
190 u32 rx_multicast_byte_count;
191 u32 rx_unicast_frames;
192 u32 rx_broadcast_frames;
193 u32 rx_multicast_frames;
194 u32 rx_pause_frames;
195 u32 rx_64_byte_frames;
196 u32 rx_65_127_byte_frames;
197 u32 rx_128_255_byte_frames;
198 u32 rx_256_511_bytes_frames;
199 u32 rx_512_1023_byte_frames;
200 u32 rx_1024_1518_byte_frames;
201 u32 rx_greater_1518_byte_frames;
202 u32 eee_rx_lpi_transitions;
203 u32 eee_rx_lpi_time;
204 u32 tx_fcs_errors;
205 u32 tx_excess_deferral_errors;
206 u32 tx_carrier_errors;
207 u32 tx_bad_byte_count;
208 u32 tx_single_collisions;
209 u32 tx_multiple_collisions;
210 u32 tx_excessive_collision;
211 u32 tx_late_collisions;
212 u32 tx_unicast_byte_count;
213 u32 tx_broadcast_byte_count;
214 u32 tx_multicast_byte_count;
215 u32 tx_unicast_frames;
216 u32 tx_broadcast_frames;
217 u32 tx_multicast_frames;
218 u32 tx_pause_frames;
219 u32 tx_64_byte_frames;
220 u32 tx_65_127_byte_frames;
221 u32 tx_128_255_byte_frames;
222 u32 tx_256_511_bytes_frames;
223 u32 tx_512_1023_byte_frames;
224 u32 tx_1024_1518_byte_frames;
225 u32 tx_greater_1518_byte_frames;
226 u32 eee_tx_lpi_transitions;
227 u32 eee_tx_lpi_time;
228};
229
Woojung Huh20ff5562016-03-16 22:10:40 +0000230struct lan78xx_statstage64 {
231 u64 rx_fcs_errors;
232 u64 rx_alignment_errors;
233 u64 rx_fragment_errors;
234 u64 rx_jabber_errors;
235 u64 rx_undersize_frame_errors;
236 u64 rx_oversize_frame_errors;
237 u64 rx_dropped_frames;
238 u64 rx_unicast_byte_count;
239 u64 rx_broadcast_byte_count;
240 u64 rx_multicast_byte_count;
241 u64 rx_unicast_frames;
242 u64 rx_broadcast_frames;
243 u64 rx_multicast_frames;
244 u64 rx_pause_frames;
245 u64 rx_64_byte_frames;
246 u64 rx_65_127_byte_frames;
247 u64 rx_128_255_byte_frames;
248 u64 rx_256_511_bytes_frames;
249 u64 rx_512_1023_byte_frames;
250 u64 rx_1024_1518_byte_frames;
251 u64 rx_greater_1518_byte_frames;
252 u64 eee_rx_lpi_transitions;
253 u64 eee_rx_lpi_time;
254 u64 tx_fcs_errors;
255 u64 tx_excess_deferral_errors;
256 u64 tx_carrier_errors;
257 u64 tx_bad_byte_count;
258 u64 tx_single_collisions;
259 u64 tx_multiple_collisions;
260 u64 tx_excessive_collision;
261 u64 tx_late_collisions;
262 u64 tx_unicast_byte_count;
263 u64 tx_broadcast_byte_count;
264 u64 tx_multicast_byte_count;
265 u64 tx_unicast_frames;
266 u64 tx_broadcast_frames;
267 u64 tx_multicast_frames;
268 u64 tx_pause_frames;
269 u64 tx_64_byte_frames;
270 u64 tx_65_127_byte_frames;
271 u64 tx_128_255_byte_frames;
272 u64 tx_256_511_bytes_frames;
273 u64 tx_512_1023_byte_frames;
274 u64 tx_1024_1518_byte_frames;
275 u64 tx_greater_1518_byte_frames;
276 u64 eee_tx_lpi_transitions;
277 u64 eee_tx_lpi_time;
278};
279
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000280struct lan78xx_net;
281
282struct lan78xx_priv {
283 struct lan78xx_net *dev;
284 u32 rfe_ctl;
285 u32 mchash_table[DP_SEL_VHF_HASH_LEN]; /* multicat hash table */
286 u32 pfilter_table[NUM_OF_MAF][2]; /* perfect filter table */
287 u32 vlan_table[DP_SEL_VHF_VLAN_LEN];
288 struct mutex dataport_mutex; /* for dataport access */
289 spinlock_t rfe_ctl_lock; /* for rfe register access */
290 struct work_struct set_multicast;
291 struct work_struct set_vlan;
292 u32 wol;
293};
294
295enum skb_state {
296 illegal = 0,
297 tx_start,
298 tx_done,
299 rx_start,
300 rx_done,
301 rx_cleanup,
302 unlink_start
303};
304
305struct skb_data { /* skb->cb is one of these */
306 struct urb *urb;
307 struct lan78xx_net *dev;
308 enum skb_state state;
309 size_t length;
Woojung Huh74d79a22016-04-25 22:22:32 +0000310 int num_of_packet;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000311};
312
313struct usb_context {
314 struct usb_ctrlrequest req;
315 struct lan78xx_net *dev;
316};
317
318#define EVENT_TX_HALT 0
319#define EVENT_RX_HALT 1
320#define EVENT_RX_MEMORY 2
321#define EVENT_STS_SPLIT 3
322#define EVENT_LINK_RESET 4
323#define EVENT_RX_PAUSED 5
324#define EVENT_DEV_WAKING 6
325#define EVENT_DEV_ASLEEP 7
326#define EVENT_DEV_OPEN 8
Woojung Huh20ff5562016-03-16 22:10:40 +0000327#define EVENT_STAT_UPDATE 9
328
329struct statstage {
330 struct mutex access_lock; /* for stats access */
331 struct lan78xx_statstage saved;
332 struct lan78xx_statstage rollover_count;
333 struct lan78xx_statstage rollover_max;
334 struct lan78xx_statstage64 curr_stat;
335};
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000336
Woojung Huhcc89c322016-11-01 20:02:00 +0000337struct irq_domain_data {
338 struct irq_domain *irqdomain;
339 unsigned int phyirq;
340 struct irq_chip *irqchip;
341 irq_flow_handler_t irq_handler;
342 u32 irqenable;
343 struct mutex irq_lock; /* for irq bus access */
344};
345
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000346struct lan78xx_net {
347 struct net_device *net;
348 struct usb_device *udev;
349 struct usb_interface *intf;
350 void *driver_priv;
351
352 int rx_qlen;
353 int tx_qlen;
354 struct sk_buff_head rxq;
355 struct sk_buff_head txq;
356 struct sk_buff_head done;
357 struct sk_buff_head rxq_pause;
358 struct sk_buff_head txq_pend;
359
360 struct tasklet_struct bh;
361 struct delayed_work wq;
362
363 struct usb_host_endpoint *ep_blkin;
364 struct usb_host_endpoint *ep_blkout;
365 struct usb_host_endpoint *ep_intr;
366
367 int msg_enable;
368
369 struct urb *urb_intr;
370 struct usb_anchor deferred;
371
372 struct mutex phy_mutex; /* for phy access */
373 unsigned pipe_in, pipe_out, pipe_intr;
374
375 u32 hard_mtu; /* count any extra framing */
376 size_t rx_urb_size; /* size for rx urbs */
377
378 unsigned long flags;
379
380 wait_queue_head_t *wait;
381 unsigned char suspend_count;
382
383 unsigned maxpacket;
384 struct timer_list delay;
Woojung Huh20ff5562016-03-16 22:10:40 +0000385 struct timer_list stat_monitor;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000386
387 unsigned long data[5];
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000388
389 int link_on;
390 u8 mdix_ctrl;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +0000391
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000392 u32 chipid;
393 u32 chiprev;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +0000394 struct mii_bus *mdiobus;
Woojung Huh02dc1f32016-12-07 20:26:25 +0000395 phy_interface_t interface;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +0000396
397 int fc_autoneg;
398 u8 fc_request_control;
Woojung Huh20ff5562016-03-16 22:10:40 +0000399
400 int delta;
401 struct statstage stats;
Woojung Huhcc89c322016-11-01 20:02:00 +0000402
403 struct irq_domain_data domain_data;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000404};
405
Woojung Huh02dc1f32016-12-07 20:26:25 +0000406/* define external phy id */
407#define PHY_LAN8835 (0x0007C130)
408#define PHY_KSZ9031RNX (0x00221620)
409
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000410/* use ethtool to change the level for any given device */
411static int msg_level = -1;
412module_param(msg_level, int, 0);
413MODULE_PARM_DESC(msg_level, "Override default message level");
414
415static int lan78xx_read_reg(struct lan78xx_net *dev, u32 index, u32 *data)
416{
417 u32 *buf = kmalloc(sizeof(u32), GFP_KERNEL);
418 int ret;
419
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000420 if (!buf)
421 return -ENOMEM;
422
423 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
424 USB_VENDOR_REQUEST_READ_REGISTER,
425 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
426 0, index, buf, 4, USB_CTRL_GET_TIMEOUT);
427 if (likely(ret >= 0)) {
428 le32_to_cpus(buf);
429 *data = *buf;
430 } else {
431 netdev_warn(dev->net,
432 "Failed to read register index 0x%08x. ret = %d",
433 index, ret);
434 }
435
436 kfree(buf);
437
438 return ret;
439}
440
441static int lan78xx_write_reg(struct lan78xx_net *dev, u32 index, u32 data)
442{
443 u32 *buf = kmalloc(sizeof(u32), GFP_KERNEL);
444 int ret;
445
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000446 if (!buf)
447 return -ENOMEM;
448
449 *buf = data;
450 cpu_to_le32s(buf);
451
452 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
453 USB_VENDOR_REQUEST_WRITE_REGISTER,
454 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
455 0, index, buf, 4, USB_CTRL_SET_TIMEOUT);
456 if (unlikely(ret < 0)) {
457 netdev_warn(dev->net,
458 "Failed to write register index 0x%08x. ret = %d",
459 index, ret);
460 }
461
462 kfree(buf);
463
464 return ret;
465}
466
467static int lan78xx_read_stats(struct lan78xx_net *dev,
468 struct lan78xx_statstage *data)
469{
470 int ret = 0;
471 int i;
472 struct lan78xx_statstage *stats;
473 u32 *src;
474 u32 *dst;
475
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000476 stats = kmalloc(sizeof(*stats), GFP_KERNEL);
477 if (!stats)
478 return -ENOMEM;
479
480 ret = usb_control_msg(dev->udev,
481 usb_rcvctrlpipe(dev->udev, 0),
482 USB_VENDOR_REQUEST_GET_STATS,
483 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
484 0,
485 0,
486 (void *)stats,
487 sizeof(*stats),
488 USB_CTRL_SET_TIMEOUT);
489 if (likely(ret >= 0)) {
490 src = (u32 *)stats;
491 dst = (u32 *)data;
492 for (i = 0; i < sizeof(*stats)/sizeof(u32); i++) {
493 le32_to_cpus(&src[i]);
494 dst[i] = src[i];
495 }
496 } else {
497 netdev_warn(dev->net,
498 "Failed to read stat ret = 0x%x", ret);
499 }
500
501 kfree(stats);
502
503 return ret;
504}
505
Woojung Huh20ff5562016-03-16 22:10:40 +0000506#define check_counter_rollover(struct1, dev_stats, member) { \
507 if (struct1->member < dev_stats.saved.member) \
508 dev_stats.rollover_count.member++; \
509 }
510
511static void lan78xx_check_stat_rollover(struct lan78xx_net *dev,
512 struct lan78xx_statstage *stats)
513{
514 check_counter_rollover(stats, dev->stats, rx_fcs_errors);
515 check_counter_rollover(stats, dev->stats, rx_alignment_errors);
516 check_counter_rollover(stats, dev->stats, rx_fragment_errors);
517 check_counter_rollover(stats, dev->stats, rx_jabber_errors);
518 check_counter_rollover(stats, dev->stats, rx_undersize_frame_errors);
519 check_counter_rollover(stats, dev->stats, rx_oversize_frame_errors);
520 check_counter_rollover(stats, dev->stats, rx_dropped_frames);
521 check_counter_rollover(stats, dev->stats, rx_unicast_byte_count);
522 check_counter_rollover(stats, dev->stats, rx_broadcast_byte_count);
523 check_counter_rollover(stats, dev->stats, rx_multicast_byte_count);
524 check_counter_rollover(stats, dev->stats, rx_unicast_frames);
525 check_counter_rollover(stats, dev->stats, rx_broadcast_frames);
526 check_counter_rollover(stats, dev->stats, rx_multicast_frames);
527 check_counter_rollover(stats, dev->stats, rx_pause_frames);
528 check_counter_rollover(stats, dev->stats, rx_64_byte_frames);
529 check_counter_rollover(stats, dev->stats, rx_65_127_byte_frames);
530 check_counter_rollover(stats, dev->stats, rx_128_255_byte_frames);
531 check_counter_rollover(stats, dev->stats, rx_256_511_bytes_frames);
532 check_counter_rollover(stats, dev->stats, rx_512_1023_byte_frames);
533 check_counter_rollover(stats, dev->stats, rx_1024_1518_byte_frames);
534 check_counter_rollover(stats, dev->stats, rx_greater_1518_byte_frames);
535 check_counter_rollover(stats, dev->stats, eee_rx_lpi_transitions);
536 check_counter_rollover(stats, dev->stats, eee_rx_lpi_time);
537 check_counter_rollover(stats, dev->stats, tx_fcs_errors);
538 check_counter_rollover(stats, dev->stats, tx_excess_deferral_errors);
539 check_counter_rollover(stats, dev->stats, tx_carrier_errors);
540 check_counter_rollover(stats, dev->stats, tx_bad_byte_count);
541 check_counter_rollover(stats, dev->stats, tx_single_collisions);
542 check_counter_rollover(stats, dev->stats, tx_multiple_collisions);
543 check_counter_rollover(stats, dev->stats, tx_excessive_collision);
544 check_counter_rollover(stats, dev->stats, tx_late_collisions);
545 check_counter_rollover(stats, dev->stats, tx_unicast_byte_count);
546 check_counter_rollover(stats, dev->stats, tx_broadcast_byte_count);
547 check_counter_rollover(stats, dev->stats, tx_multicast_byte_count);
548 check_counter_rollover(stats, dev->stats, tx_unicast_frames);
549 check_counter_rollover(stats, dev->stats, tx_broadcast_frames);
550 check_counter_rollover(stats, dev->stats, tx_multicast_frames);
551 check_counter_rollover(stats, dev->stats, tx_pause_frames);
552 check_counter_rollover(stats, dev->stats, tx_64_byte_frames);
553 check_counter_rollover(stats, dev->stats, tx_65_127_byte_frames);
554 check_counter_rollover(stats, dev->stats, tx_128_255_byte_frames);
555 check_counter_rollover(stats, dev->stats, tx_256_511_bytes_frames);
556 check_counter_rollover(stats, dev->stats, tx_512_1023_byte_frames);
557 check_counter_rollover(stats, dev->stats, tx_1024_1518_byte_frames);
558 check_counter_rollover(stats, dev->stats, tx_greater_1518_byte_frames);
559 check_counter_rollover(stats, dev->stats, eee_tx_lpi_transitions);
560 check_counter_rollover(stats, dev->stats, eee_tx_lpi_time);
561
562 memcpy(&dev->stats.saved, stats, sizeof(struct lan78xx_statstage));
563}
564
565static void lan78xx_update_stats(struct lan78xx_net *dev)
566{
567 u32 *p, *count, *max;
568 u64 *data;
569 int i;
570 struct lan78xx_statstage lan78xx_stats;
571
572 if (usb_autopm_get_interface(dev->intf) < 0)
573 return;
574
575 p = (u32 *)&lan78xx_stats;
576 count = (u32 *)&dev->stats.rollover_count;
577 max = (u32 *)&dev->stats.rollover_max;
578 data = (u64 *)&dev->stats.curr_stat;
579
580 mutex_lock(&dev->stats.access_lock);
581
582 if (lan78xx_read_stats(dev, &lan78xx_stats) > 0)
583 lan78xx_check_stat_rollover(dev, &lan78xx_stats);
584
585 for (i = 0; i < (sizeof(lan78xx_stats) / (sizeof(u32))); i++)
586 data[i] = (u64)p[i] + ((u64)count[i] * ((u64)max[i] + 1));
587
588 mutex_unlock(&dev->stats.access_lock);
589
590 usb_autopm_put_interface(dev->intf);
591}
592
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000593/* Loop until the read is completed with timeout called with phy_mutex held */
594static int lan78xx_phy_wait_not_busy(struct lan78xx_net *dev)
595{
596 unsigned long start_time = jiffies;
597 u32 val;
598 int ret;
599
600 do {
601 ret = lan78xx_read_reg(dev, MII_ACC, &val);
602 if (unlikely(ret < 0))
603 return -EIO;
604
605 if (!(val & MII_ACC_MII_BUSY_))
606 return 0;
607 } while (!time_after(jiffies, start_time + HZ));
608
609 return -EIO;
610}
611
612static inline u32 mii_access(int id, int index, int read)
613{
614 u32 ret;
615
616 ret = ((u32)id << MII_ACC_PHY_ADDR_SHIFT_) & MII_ACC_PHY_ADDR_MASK_;
617 ret |= ((u32)index << MII_ACC_MIIRINDA_SHIFT_) & MII_ACC_MIIRINDA_MASK_;
618 if (read)
619 ret |= MII_ACC_MII_READ_;
620 else
621 ret |= MII_ACC_MII_WRITE_;
622 ret |= MII_ACC_MII_BUSY_;
623
624 return ret;
625}
626
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000627static int lan78xx_wait_eeprom(struct lan78xx_net *dev)
628{
629 unsigned long start_time = jiffies;
630 u32 val;
631 int ret;
632
633 do {
634 ret = lan78xx_read_reg(dev, E2P_CMD, &val);
635 if (unlikely(ret < 0))
636 return -EIO;
637
638 if (!(val & E2P_CMD_EPC_BUSY_) ||
639 (val & E2P_CMD_EPC_TIMEOUT_))
640 break;
641 usleep_range(40, 100);
642 } while (!time_after(jiffies, start_time + HZ));
643
644 if (val & (E2P_CMD_EPC_TIMEOUT_ | E2P_CMD_EPC_BUSY_)) {
645 netdev_warn(dev->net, "EEPROM read operation timeout");
646 return -EIO;
647 }
648
649 return 0;
650}
651
652static int lan78xx_eeprom_confirm_not_busy(struct lan78xx_net *dev)
653{
654 unsigned long start_time = jiffies;
655 u32 val;
656 int ret;
657
658 do {
659 ret = lan78xx_read_reg(dev, E2P_CMD, &val);
660 if (unlikely(ret < 0))
661 return -EIO;
662
663 if (!(val & E2P_CMD_EPC_BUSY_))
664 return 0;
665
666 usleep_range(40, 100);
667 } while (!time_after(jiffies, start_time + HZ));
668
669 netdev_warn(dev->net, "EEPROM is busy");
670 return -EIO;
671}
672
673static int lan78xx_read_raw_eeprom(struct lan78xx_net *dev, u32 offset,
674 u32 length, u8 *data)
675{
676 u32 val;
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000677 u32 saved;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000678 int i, ret;
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000679 int retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000680
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000681 /* depends on chip, some EEPROM pins are muxed with LED function.
682 * disable & restore LED function to access EEPROM.
683 */
684 ret = lan78xx_read_reg(dev, HW_CFG, &val);
685 saved = val;
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000686 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000687 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_);
688 ret = lan78xx_write_reg(dev, HW_CFG, val);
689 }
690
691 retval = lan78xx_eeprom_confirm_not_busy(dev);
692 if (retval)
693 return retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000694
695 for (i = 0; i < length; i++) {
696 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_READ_;
697 val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
698 ret = lan78xx_write_reg(dev, E2P_CMD, val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000699 if (unlikely(ret < 0)) {
700 retval = -EIO;
701 goto exit;
702 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000703
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000704 retval = lan78xx_wait_eeprom(dev);
705 if (retval < 0)
706 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000707
708 ret = lan78xx_read_reg(dev, E2P_DATA, &val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000709 if (unlikely(ret < 0)) {
710 retval = -EIO;
711 goto exit;
712 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000713
714 data[i] = val & 0xFF;
715 offset++;
716 }
717
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000718 retval = 0;
719exit:
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000720 if (dev->chipid == ID_REV_CHIP_ID_7800_)
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000721 ret = lan78xx_write_reg(dev, HW_CFG, saved);
722
723 return retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000724}
725
726static int lan78xx_read_eeprom(struct lan78xx_net *dev, u32 offset,
727 u32 length, u8 *data)
728{
729 u8 sig;
730 int ret;
731
732 ret = lan78xx_read_raw_eeprom(dev, 0, 1, &sig);
733 if ((ret == 0) && (sig == EEPROM_INDICATOR))
734 ret = lan78xx_read_raw_eeprom(dev, offset, length, data);
735 else
736 ret = -EINVAL;
737
738 return ret;
739}
740
741static int lan78xx_write_raw_eeprom(struct lan78xx_net *dev, u32 offset,
742 u32 length, u8 *data)
743{
744 u32 val;
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000745 u32 saved;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000746 int i, ret;
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000747 int retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000748
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000749 /* depends on chip, some EEPROM pins are muxed with LED function.
750 * disable & restore LED function to access EEPROM.
751 */
752 ret = lan78xx_read_reg(dev, HW_CFG, &val);
753 saved = val;
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000754 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000755 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_);
756 ret = lan78xx_write_reg(dev, HW_CFG, val);
757 }
758
759 retval = lan78xx_eeprom_confirm_not_busy(dev);
760 if (retval)
761 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000762
763 /* Issue write/erase enable command */
764 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWEN_;
765 ret = lan78xx_write_reg(dev, E2P_CMD, val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000766 if (unlikely(ret < 0)) {
767 retval = -EIO;
768 goto exit;
769 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000770
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000771 retval = lan78xx_wait_eeprom(dev);
772 if (retval < 0)
773 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000774
775 for (i = 0; i < length; i++) {
776 /* Fill data register */
777 val = data[i];
778 ret = lan78xx_write_reg(dev, E2P_DATA, val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000779 if (ret < 0) {
780 retval = -EIO;
781 goto exit;
782 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000783
784 /* Send "write" command */
785 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_WRITE_;
786 val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
787 ret = lan78xx_write_reg(dev, E2P_CMD, val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000788 if (ret < 0) {
789 retval = -EIO;
790 goto exit;
791 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000792
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000793 retval = lan78xx_wait_eeprom(dev);
794 if (retval < 0)
795 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000796
797 offset++;
798 }
799
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000800 retval = 0;
801exit:
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000802 if (dev->chipid == ID_REV_CHIP_ID_7800_)
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000803 ret = lan78xx_write_reg(dev, HW_CFG, saved);
804
805 return retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000806}
807
808static int lan78xx_read_raw_otp(struct lan78xx_net *dev, u32 offset,
809 u32 length, u8 *data)
810{
811 int i;
812 int ret;
813 u32 buf;
814 unsigned long timeout;
815
816 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
817
818 if (buf & OTP_PWR_DN_PWRDN_N_) {
819 /* clear it and wait to be cleared */
820 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0);
821
822 timeout = jiffies + HZ;
823 do {
824 usleep_range(1, 10);
825 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
826 if (time_after(jiffies, timeout)) {
827 netdev_warn(dev->net,
828 "timeout on OTP_PWR_DN");
829 return -EIO;
830 }
831 } while (buf & OTP_PWR_DN_PWRDN_N_);
832 }
833
834 for (i = 0; i < length; i++) {
835 ret = lan78xx_write_reg(dev, OTP_ADDR1,
836 ((offset + i) >> 8) & OTP_ADDR1_15_11);
837 ret = lan78xx_write_reg(dev, OTP_ADDR2,
838 ((offset + i) & OTP_ADDR2_10_3));
839
840 ret = lan78xx_write_reg(dev, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_);
841 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);
842
843 timeout = jiffies + HZ;
844 do {
845 udelay(1);
846 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf);
847 if (time_after(jiffies, timeout)) {
848 netdev_warn(dev->net,
849 "timeout on OTP_STATUS");
850 return -EIO;
851 }
852 } while (buf & OTP_STATUS_BUSY_);
853
854 ret = lan78xx_read_reg(dev, OTP_RD_DATA, &buf);
855
856 data[i] = (u8)(buf & 0xFF);
857 }
858
859 return 0;
860}
861
Woojung.Huh@microchip.com9fb60662016-01-05 17:29:59 +0000862static int lan78xx_write_raw_otp(struct lan78xx_net *dev, u32 offset,
863 u32 length, u8 *data)
864{
865 int i;
866 int ret;
867 u32 buf;
868 unsigned long timeout;
869
870 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
871
872 if (buf & OTP_PWR_DN_PWRDN_N_) {
873 /* clear it and wait to be cleared */
874 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0);
875
876 timeout = jiffies + HZ;
877 do {
878 udelay(1);
879 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
880 if (time_after(jiffies, timeout)) {
881 netdev_warn(dev->net,
882 "timeout on OTP_PWR_DN completion");
883 return -EIO;
884 }
885 } while (buf & OTP_PWR_DN_PWRDN_N_);
886 }
887
888 /* set to BYTE program mode */
889 ret = lan78xx_write_reg(dev, OTP_PRGM_MODE, OTP_PRGM_MODE_BYTE_);
890
891 for (i = 0; i < length; i++) {
892 ret = lan78xx_write_reg(dev, OTP_ADDR1,
893 ((offset + i) >> 8) & OTP_ADDR1_15_11);
894 ret = lan78xx_write_reg(dev, OTP_ADDR2,
895 ((offset + i) & OTP_ADDR2_10_3));
896 ret = lan78xx_write_reg(dev, OTP_PRGM_DATA, data[i]);
897 ret = lan78xx_write_reg(dev, OTP_TST_CMD, OTP_TST_CMD_PRGVRFY_);
898 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);
899
900 timeout = jiffies + HZ;
901 do {
902 udelay(1);
903 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf);
904 if (time_after(jiffies, timeout)) {
905 netdev_warn(dev->net,
906 "Timeout on OTP_STATUS completion");
907 return -EIO;
908 }
909 } while (buf & OTP_STATUS_BUSY_);
910 }
911
912 return 0;
913}
914
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000915static int lan78xx_read_otp(struct lan78xx_net *dev, u32 offset,
916 u32 length, u8 *data)
917{
918 u8 sig;
919 int ret;
920
921 ret = lan78xx_read_raw_otp(dev, 0, 1, &sig);
922
923 if (ret == 0) {
924 if (sig == OTP_INDICATOR_1)
925 offset = offset;
926 else if (sig == OTP_INDICATOR_2)
927 offset += 0x100;
928 else
929 ret = -EINVAL;
930 ret = lan78xx_read_raw_otp(dev, offset, length, data);
931 }
932
933 return ret;
934}
935
936static int lan78xx_dataport_wait_not_busy(struct lan78xx_net *dev)
937{
938 int i, ret;
939
940 for (i = 0; i < 100; i++) {
941 u32 dp_sel;
942
943 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel);
944 if (unlikely(ret < 0))
945 return -EIO;
946
947 if (dp_sel & DP_SEL_DPRDY_)
948 return 0;
949
950 usleep_range(40, 100);
951 }
952
953 netdev_warn(dev->net, "lan78xx_dataport_wait_not_busy timed out");
954
955 return -EIO;
956}
957
958static int lan78xx_dataport_write(struct lan78xx_net *dev, u32 ram_select,
959 u32 addr, u32 length, u32 *buf)
960{
961 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
962 u32 dp_sel;
963 int i, ret;
964
965 if (usb_autopm_get_interface(dev->intf) < 0)
966 return 0;
967
968 mutex_lock(&pdata->dataport_mutex);
969
970 ret = lan78xx_dataport_wait_not_busy(dev);
971 if (ret < 0)
972 goto done;
973
974 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel);
975
976 dp_sel &= ~DP_SEL_RSEL_MASK_;
977 dp_sel |= ram_select;
978 ret = lan78xx_write_reg(dev, DP_SEL, dp_sel);
979
980 for (i = 0; i < length; i++) {
981 ret = lan78xx_write_reg(dev, DP_ADDR, addr + i);
982
983 ret = lan78xx_write_reg(dev, DP_DATA, buf[i]);
984
985 ret = lan78xx_write_reg(dev, DP_CMD, DP_CMD_WRITE_);
986
987 ret = lan78xx_dataport_wait_not_busy(dev);
988 if (ret < 0)
989 goto done;
990 }
991
992done:
993 mutex_unlock(&pdata->dataport_mutex);
994 usb_autopm_put_interface(dev->intf);
995
996 return ret;
997}
998
999static void lan78xx_set_addr_filter(struct lan78xx_priv *pdata,
1000 int index, u8 addr[ETH_ALEN])
1001{
1002 u32 temp;
1003
1004 if ((pdata) && (index > 0) && (index < NUM_OF_MAF)) {
1005 temp = addr[3];
1006 temp = addr[2] | (temp << 8);
1007 temp = addr[1] | (temp << 8);
1008 temp = addr[0] | (temp << 8);
1009 pdata->pfilter_table[index][1] = temp;
1010 temp = addr[5];
1011 temp = addr[4] | (temp << 8);
1012 temp |= MAF_HI_VALID_ | MAF_HI_TYPE_DST_;
1013 pdata->pfilter_table[index][0] = temp;
1014 }
1015}
1016
1017/* returns hash bit number for given MAC address */
1018static inline u32 lan78xx_hash(char addr[ETH_ALEN])
1019{
1020 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff;
1021}
1022
1023static void lan78xx_deferred_multicast_write(struct work_struct *param)
1024{
1025 struct lan78xx_priv *pdata =
1026 container_of(param, struct lan78xx_priv, set_multicast);
1027 struct lan78xx_net *dev = pdata->dev;
1028 int i;
1029 int ret;
1030
1031 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x\n",
1032 pdata->rfe_ctl);
1033
1034 lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, DP_SEL_VHF_VLAN_LEN,
1035 DP_SEL_VHF_HASH_LEN, pdata->mchash_table);
1036
1037 for (i = 1; i < NUM_OF_MAF; i++) {
1038 ret = lan78xx_write_reg(dev, MAF_HI(i), 0);
1039 ret = lan78xx_write_reg(dev, MAF_LO(i),
1040 pdata->pfilter_table[i][1]);
1041 ret = lan78xx_write_reg(dev, MAF_HI(i),
1042 pdata->pfilter_table[i][0]);
1043 }
1044
1045 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
1046}
1047
1048static void lan78xx_set_multicast(struct net_device *netdev)
1049{
1050 struct lan78xx_net *dev = netdev_priv(netdev);
1051 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1052 unsigned long flags;
1053 int i;
1054
1055 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
1056
1057 pdata->rfe_ctl &= ~(RFE_CTL_UCAST_EN_ | RFE_CTL_MCAST_EN_ |
1058 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_);
1059
1060 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++)
1061 pdata->mchash_table[i] = 0;
1062 /* pfilter_table[0] has own HW address */
1063 for (i = 1; i < NUM_OF_MAF; i++) {
1064 pdata->pfilter_table[i][0] =
1065 pdata->pfilter_table[i][1] = 0;
1066 }
1067
1068 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_;
1069
1070 if (dev->net->flags & IFF_PROMISC) {
1071 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled");
1072 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_ | RFE_CTL_UCAST_EN_;
1073 } else {
1074 if (dev->net->flags & IFF_ALLMULTI) {
1075 netif_dbg(dev, drv, dev->net,
1076 "receive all multicast enabled");
1077 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_;
1078 }
1079 }
1080
1081 if (netdev_mc_count(dev->net)) {
1082 struct netdev_hw_addr *ha;
1083 int i;
1084
1085 netif_dbg(dev, drv, dev->net, "receive multicast hash filter");
1086
1087 pdata->rfe_ctl |= RFE_CTL_DA_PERFECT_;
1088
1089 i = 1;
1090 netdev_for_each_mc_addr(ha, netdev) {
1091 /* set first 32 into Perfect Filter */
1092 if (i < 33) {
1093 lan78xx_set_addr_filter(pdata, i, ha->addr);
1094 } else {
1095 u32 bitnum = lan78xx_hash(ha->addr);
1096
1097 pdata->mchash_table[bitnum / 32] |=
1098 (1 << (bitnum % 32));
1099 pdata->rfe_ctl |= RFE_CTL_MCAST_HASH_;
1100 }
1101 i++;
1102 }
1103 }
1104
1105 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
1106
1107 /* defer register writes to a sleepable context */
1108 schedule_work(&pdata->set_multicast);
1109}
1110
1111static int lan78xx_update_flowcontrol(struct lan78xx_net *dev, u8 duplex,
1112 u16 lcladv, u16 rmtadv)
1113{
1114 u32 flow = 0, fct_flow = 0;
1115 int ret;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001116 u8 cap;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001117
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001118 if (dev->fc_autoneg)
1119 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
1120 else
1121 cap = dev->fc_request_control;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001122
1123 if (cap & FLOW_CTRL_TX)
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001124 flow |= (FLOW_CR_TX_FCEN_ | 0xFFFF);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001125
1126 if (cap & FLOW_CTRL_RX)
1127 flow |= FLOW_CR_RX_FCEN_;
1128
1129 if (dev->udev->speed == USB_SPEED_SUPER)
1130 fct_flow = 0x817;
1131 else if (dev->udev->speed == USB_SPEED_HIGH)
1132 fct_flow = 0x211;
1133
1134 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s",
1135 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
1136 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
1137
1138 ret = lan78xx_write_reg(dev, FCT_FLOW, fct_flow);
1139
1140 /* threshold value should be set before enabling flow */
1141 ret = lan78xx_write_reg(dev, FLOW, flow);
1142
1143 return 0;
1144}
1145
1146static int lan78xx_link_reset(struct lan78xx_net *dev)
1147{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001148 struct phy_device *phydev = dev->net->phydev;
Philippe Reynes6e765102016-10-09 12:07:04 +02001149 struct ethtool_link_ksettings ecmd;
Geert Uytterhoeven99c79ec2015-09-04 12:47:28 +02001150 int ladv, radv, ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001151 u32 buf;
1152
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001153 /* clear LAN78xx interrupt status */
1154 ret = lan78xx_write_reg(dev, INT_STS, INT_STS_PHY_INT_);
1155 if (unlikely(ret < 0))
1156 return -EIO;
1157
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001158 phy_read_status(phydev);
1159
1160 if (!phydev->link && dev->link_on) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001161 dev->link_on = false;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001162
1163 /* reset MAC */
1164 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1165 if (unlikely(ret < 0))
1166 return -EIO;
1167 buf |= MAC_CR_RST_;
1168 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1169 if (unlikely(ret < 0))
1170 return -EIO;
Woojung.Huh@microchip.come4953912016-01-27 22:57:52 +00001171
Woojung Huh20ff5562016-03-16 22:10:40 +00001172 del_timer(&dev->stat_monitor);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001173 } else if (phydev->link && !dev->link_on) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001174 dev->link_on = true;
1175
Philippe Reynes6e765102016-10-09 12:07:04 +02001176 phy_ethtool_ksettings_get(phydev, &ecmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001177
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001178 if (dev->udev->speed == USB_SPEED_SUPER) {
Philippe Reynes6e765102016-10-09 12:07:04 +02001179 if (ecmd.base.speed == 1000) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001180 /* disable U2 */
1181 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1182 buf &= ~USB_CFG1_DEV_U2_INIT_EN_;
1183 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1184 /* enable U1 */
1185 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1186 buf |= USB_CFG1_DEV_U1_INIT_EN_;
1187 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1188 } else {
1189 /* enable U1 & U2 */
1190 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1191 buf |= USB_CFG1_DEV_U2_INIT_EN_;
1192 buf |= USB_CFG1_DEV_U1_INIT_EN_;
1193 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1194 }
1195 }
1196
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001197 ladv = phy_read(phydev, MII_ADVERTISE);
Geert Uytterhoeven99c79ec2015-09-04 12:47:28 +02001198 if (ladv < 0)
1199 return ladv;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001200
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001201 radv = phy_read(phydev, MII_LPA);
Geert Uytterhoeven99c79ec2015-09-04 12:47:28 +02001202 if (radv < 0)
1203 return radv;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001204
1205 netif_dbg(dev, link, dev->net,
1206 "speed: %u duplex: %d anadv: 0x%04x anlpa: 0x%04x",
Philippe Reynes6e765102016-10-09 12:07:04 +02001207 ecmd.base.speed, ecmd.base.duplex, ladv, radv);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001208
Philippe Reynes6e765102016-10-09 12:07:04 +02001209 ret = lan78xx_update_flowcontrol(dev, ecmd.base.duplex, ladv,
1210 radv);
Woojung Huh20ff5562016-03-16 22:10:40 +00001211
1212 if (!timer_pending(&dev->stat_monitor)) {
1213 dev->delta = 1;
1214 mod_timer(&dev->stat_monitor,
1215 jiffies + STAT_UPDATE_TIMER);
1216 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001217 }
1218
1219 return ret;
1220}
1221
1222/* some work can't be done in tasklets, so we use keventd
1223 *
1224 * NOTE: annoying asymmetry: if it's active, schedule_work() fails,
1225 * but tasklet_schedule() doesn't. hope the failure is rare.
1226 */
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08001227static void lan78xx_defer_kevent(struct lan78xx_net *dev, int work)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001228{
1229 set_bit(work, &dev->flags);
1230 if (!schedule_delayed_work(&dev->wq, 0))
1231 netdev_err(dev->net, "kevent %d may have been dropped\n", work);
1232}
1233
1234static void lan78xx_status(struct lan78xx_net *dev, struct urb *urb)
1235{
1236 u32 intdata;
1237
1238 if (urb->actual_length != 4) {
1239 netdev_warn(dev->net,
1240 "unexpected urb length %d", urb->actual_length);
1241 return;
1242 }
1243
1244 memcpy(&intdata, urb->transfer_buffer, 4);
1245 le32_to_cpus(&intdata);
1246
1247 if (intdata & INT_ENP_PHY_INT) {
1248 netif_dbg(dev, link, dev->net, "PHY INTR: 0x%08x\n", intdata);
Woojung Huhcc89c322016-11-01 20:02:00 +00001249 lan78xx_defer_kevent(dev, EVENT_LINK_RESET);
1250
1251 if (dev->domain_data.phyirq > 0)
1252 generic_handle_irq(dev->domain_data.phyirq);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001253 } else
1254 netdev_warn(dev->net,
1255 "unexpected interrupt: 0x%08x\n", intdata);
1256}
1257
1258static int lan78xx_ethtool_get_eeprom_len(struct net_device *netdev)
1259{
1260 return MAX_EEPROM_SIZE;
1261}
1262
1263static int lan78xx_ethtool_get_eeprom(struct net_device *netdev,
1264 struct ethtool_eeprom *ee, u8 *data)
1265{
1266 struct lan78xx_net *dev = netdev_priv(netdev);
1267
1268 ee->magic = LAN78XX_EEPROM_MAGIC;
1269
1270 return lan78xx_read_raw_eeprom(dev, ee->offset, ee->len, data);
1271}
1272
1273static int lan78xx_ethtool_set_eeprom(struct net_device *netdev,
1274 struct ethtool_eeprom *ee, u8 *data)
1275{
1276 struct lan78xx_net *dev = netdev_priv(netdev);
1277
1278 /* Allow entire eeprom update only */
1279 if ((ee->magic == LAN78XX_EEPROM_MAGIC) &&
1280 (ee->offset == 0) &&
1281 (ee->len == 512) &&
1282 (data[0] == EEPROM_INDICATOR))
1283 return lan78xx_write_raw_eeprom(dev, ee->offset, ee->len, data);
1284 else if ((ee->magic == LAN78XX_OTP_MAGIC) &&
1285 (ee->offset == 0) &&
1286 (ee->len == 512) &&
1287 (data[0] == OTP_INDICATOR_1))
Woojung.Huh@microchip.com9fb60662016-01-05 17:29:59 +00001288 return lan78xx_write_raw_otp(dev, ee->offset, ee->len, data);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001289
1290 return -EINVAL;
1291}
1292
1293static void lan78xx_get_strings(struct net_device *netdev, u32 stringset,
1294 u8 *data)
1295{
1296 if (stringset == ETH_SS_STATS)
1297 memcpy(data, lan78xx_gstrings, sizeof(lan78xx_gstrings));
1298}
1299
1300static int lan78xx_get_sset_count(struct net_device *netdev, int sset)
1301{
1302 if (sset == ETH_SS_STATS)
1303 return ARRAY_SIZE(lan78xx_gstrings);
1304 else
1305 return -EOPNOTSUPP;
1306}
1307
1308static void lan78xx_get_stats(struct net_device *netdev,
1309 struct ethtool_stats *stats, u64 *data)
1310{
1311 struct lan78xx_net *dev = netdev_priv(netdev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001312
Woojung Huh20ff5562016-03-16 22:10:40 +00001313 lan78xx_update_stats(dev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001314
Woojung Huh20ff5562016-03-16 22:10:40 +00001315 mutex_lock(&dev->stats.access_lock);
1316 memcpy(data, &dev->stats.curr_stat, sizeof(dev->stats.curr_stat));
1317 mutex_unlock(&dev->stats.access_lock);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001318}
1319
1320static void lan78xx_get_wol(struct net_device *netdev,
1321 struct ethtool_wolinfo *wol)
1322{
1323 struct lan78xx_net *dev = netdev_priv(netdev);
1324 int ret;
1325 u32 buf;
1326 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1327
1328 if (usb_autopm_get_interface(dev->intf) < 0)
1329 return;
1330
1331 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
1332 if (unlikely(ret < 0)) {
1333 wol->supported = 0;
1334 wol->wolopts = 0;
1335 } else {
1336 if (buf & USB_CFG_RMT_WKP_) {
1337 wol->supported = WAKE_ALL;
1338 wol->wolopts = pdata->wol;
1339 } else {
1340 wol->supported = 0;
1341 wol->wolopts = 0;
1342 }
1343 }
1344
1345 usb_autopm_put_interface(dev->intf);
1346}
1347
1348static int lan78xx_set_wol(struct net_device *netdev,
1349 struct ethtool_wolinfo *wol)
1350{
1351 struct lan78xx_net *dev = netdev_priv(netdev);
1352 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1353 int ret;
1354
1355 ret = usb_autopm_get_interface(dev->intf);
1356 if (ret < 0)
1357 return ret;
1358
1359 pdata->wol = 0;
1360 if (wol->wolopts & WAKE_UCAST)
1361 pdata->wol |= WAKE_UCAST;
1362 if (wol->wolopts & WAKE_MCAST)
1363 pdata->wol |= WAKE_MCAST;
1364 if (wol->wolopts & WAKE_BCAST)
1365 pdata->wol |= WAKE_BCAST;
1366 if (wol->wolopts & WAKE_MAGIC)
1367 pdata->wol |= WAKE_MAGIC;
1368 if (wol->wolopts & WAKE_PHY)
1369 pdata->wol |= WAKE_PHY;
1370 if (wol->wolopts & WAKE_ARP)
1371 pdata->wol |= WAKE_ARP;
1372
1373 device_set_wakeup_enable(&dev->udev->dev, (bool)wol->wolopts);
1374
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001375 phy_ethtool_set_wol(netdev->phydev, wol);
1376
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001377 usb_autopm_put_interface(dev->intf);
1378
1379 return ret;
1380}
1381
1382static int lan78xx_get_eee(struct net_device *net, struct ethtool_eee *edata)
1383{
1384 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001385 struct phy_device *phydev = net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001386 int ret;
1387 u32 buf;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001388
1389 ret = usb_autopm_get_interface(dev->intf);
1390 if (ret < 0)
1391 return ret;
1392
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001393 ret = phy_ethtool_get_eee(phydev, edata);
1394 if (ret < 0)
1395 goto exit;
1396
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001397 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1398 if (buf & MAC_CR_EEE_EN_) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001399 edata->eee_enabled = true;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001400 edata->eee_active = !!(edata->advertised &
1401 edata->lp_advertised);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001402 edata->tx_lpi_enabled = true;
1403 /* EEE_TX_LPI_REQ_DLY & tx_lpi_timer are same uSec unit */
1404 ret = lan78xx_read_reg(dev, EEE_TX_LPI_REQ_DLY, &buf);
1405 edata->tx_lpi_timer = buf;
1406 } else {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001407 edata->eee_enabled = false;
1408 edata->eee_active = false;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001409 edata->tx_lpi_enabled = false;
1410 edata->tx_lpi_timer = 0;
1411 }
1412
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001413 ret = 0;
1414exit:
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001415 usb_autopm_put_interface(dev->intf);
1416
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001417 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001418}
1419
1420static int lan78xx_set_eee(struct net_device *net, struct ethtool_eee *edata)
1421{
1422 struct lan78xx_net *dev = netdev_priv(net);
1423 int ret;
1424 u32 buf;
1425
1426 ret = usb_autopm_get_interface(dev->intf);
1427 if (ret < 0)
1428 return ret;
1429
1430 if (edata->eee_enabled) {
1431 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1432 buf |= MAC_CR_EEE_EN_;
1433 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1434
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001435 phy_ethtool_set_eee(net->phydev, edata);
1436
1437 buf = (u32)edata->tx_lpi_timer;
1438 ret = lan78xx_write_reg(dev, EEE_TX_LPI_REQ_DLY, buf);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001439 } else {
1440 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1441 buf &= ~MAC_CR_EEE_EN_;
1442 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1443 }
1444
1445 usb_autopm_put_interface(dev->intf);
1446
1447 return 0;
1448}
1449
1450static u32 lan78xx_get_link(struct net_device *net)
1451{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001452 phy_read_status(net->phydev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001453
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001454 return net->phydev->link;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001455}
1456
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001457static void lan78xx_get_drvinfo(struct net_device *net,
1458 struct ethtool_drvinfo *info)
1459{
1460 struct lan78xx_net *dev = netdev_priv(net);
1461
1462 strncpy(info->driver, DRIVER_NAME, sizeof(info->driver));
1463 strncpy(info->version, DRIVER_VERSION, sizeof(info->version));
1464 usb_make_path(dev->udev, info->bus_info, sizeof(info->bus_info));
1465}
1466
1467static u32 lan78xx_get_msglevel(struct net_device *net)
1468{
1469 struct lan78xx_net *dev = netdev_priv(net);
1470
1471 return dev->msg_enable;
1472}
1473
1474static void lan78xx_set_msglevel(struct net_device *net, u32 level)
1475{
1476 struct lan78xx_net *dev = netdev_priv(net);
1477
1478 dev->msg_enable = level;
1479}
1480
Philippe Reynes6e765102016-10-09 12:07:04 +02001481static int lan78xx_get_link_ksettings(struct net_device *net,
1482 struct ethtool_link_ksettings *cmd)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001483{
1484 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001485 struct phy_device *phydev = net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001486 int ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001487
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001488 ret = usb_autopm_get_interface(dev->intf);
1489 if (ret < 0)
1490 return ret;
1491
Philippe Reynes6e765102016-10-09 12:07:04 +02001492 ret = phy_ethtool_ksettings_get(phydev, cmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001493
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001494 usb_autopm_put_interface(dev->intf);
1495
1496 return ret;
1497}
1498
Philippe Reynes6e765102016-10-09 12:07:04 +02001499static int lan78xx_set_link_ksettings(struct net_device *net,
1500 const struct ethtool_link_ksettings *cmd)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001501{
1502 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001503 struct phy_device *phydev = net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001504 int ret = 0;
1505 int temp;
1506
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001507 ret = usb_autopm_get_interface(dev->intf);
1508 if (ret < 0)
1509 return ret;
1510
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001511 /* change speed & duplex */
Philippe Reynes6e765102016-10-09 12:07:04 +02001512 ret = phy_ethtool_ksettings_set(phydev, cmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001513
Philippe Reynes6e765102016-10-09 12:07:04 +02001514 if (!cmd->base.autoneg) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001515 /* force link down */
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001516 temp = phy_read(phydev, MII_BMCR);
1517 phy_write(phydev, MII_BMCR, temp | BMCR_LOOPBACK);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001518 mdelay(1);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001519 phy_write(phydev, MII_BMCR, temp);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001520 }
1521
1522 usb_autopm_put_interface(dev->intf);
1523
1524 return ret;
1525}
1526
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001527static void lan78xx_get_pause(struct net_device *net,
1528 struct ethtool_pauseparam *pause)
1529{
1530 struct lan78xx_net *dev = netdev_priv(net);
1531 struct phy_device *phydev = net->phydev;
Philippe Reynes6e765102016-10-09 12:07:04 +02001532 struct ethtool_link_ksettings ecmd;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001533
Philippe Reynes6e765102016-10-09 12:07:04 +02001534 phy_ethtool_ksettings_get(phydev, &ecmd);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001535
1536 pause->autoneg = dev->fc_autoneg;
1537
1538 if (dev->fc_request_control & FLOW_CTRL_TX)
1539 pause->tx_pause = 1;
1540
1541 if (dev->fc_request_control & FLOW_CTRL_RX)
1542 pause->rx_pause = 1;
1543}
1544
1545static int lan78xx_set_pause(struct net_device *net,
1546 struct ethtool_pauseparam *pause)
1547{
1548 struct lan78xx_net *dev = netdev_priv(net);
1549 struct phy_device *phydev = net->phydev;
Philippe Reynes6e765102016-10-09 12:07:04 +02001550 struct ethtool_link_ksettings ecmd;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001551 int ret;
1552
Philippe Reynes6e765102016-10-09 12:07:04 +02001553 phy_ethtool_ksettings_get(phydev, &ecmd);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001554
Philippe Reynes6e765102016-10-09 12:07:04 +02001555 if (pause->autoneg && !ecmd.base.autoneg) {
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001556 ret = -EINVAL;
1557 goto exit;
1558 }
1559
1560 dev->fc_request_control = 0;
1561 if (pause->rx_pause)
1562 dev->fc_request_control |= FLOW_CTRL_RX;
1563
1564 if (pause->tx_pause)
1565 dev->fc_request_control |= FLOW_CTRL_TX;
1566
Philippe Reynes6e765102016-10-09 12:07:04 +02001567 if (ecmd.base.autoneg) {
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001568 u32 mii_adv;
Philippe Reynes6e765102016-10-09 12:07:04 +02001569 u32 advertising;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001570
Philippe Reynes6e765102016-10-09 12:07:04 +02001571 ethtool_convert_link_mode_to_legacy_u32(
1572 &advertising, ecmd.link_modes.advertising);
1573
1574 advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001575 mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control);
Philippe Reynes6e765102016-10-09 12:07:04 +02001576 advertising |= mii_adv_to_ethtool_adv_t(mii_adv);
1577
1578 ethtool_convert_legacy_u32_to_link_mode(
1579 ecmd.link_modes.advertising, advertising);
1580
1581 phy_ethtool_ksettings_set(phydev, &ecmd);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001582 }
1583
1584 dev->fc_autoneg = pause->autoneg;
1585
1586 ret = 0;
1587exit:
1588 return ret;
1589}
1590
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001591static const struct ethtool_ops lan78xx_ethtool_ops = {
1592 .get_link = lan78xx_get_link,
Florian Fainelli860ce4b2016-11-15 10:06:44 -08001593 .nway_reset = phy_ethtool_nway_reset,
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001594 .get_drvinfo = lan78xx_get_drvinfo,
1595 .get_msglevel = lan78xx_get_msglevel,
1596 .set_msglevel = lan78xx_set_msglevel,
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001597 .get_eeprom_len = lan78xx_ethtool_get_eeprom_len,
1598 .get_eeprom = lan78xx_ethtool_get_eeprom,
1599 .set_eeprom = lan78xx_ethtool_set_eeprom,
1600 .get_ethtool_stats = lan78xx_get_stats,
1601 .get_sset_count = lan78xx_get_sset_count,
1602 .get_strings = lan78xx_get_strings,
1603 .get_wol = lan78xx_get_wol,
1604 .set_wol = lan78xx_set_wol,
1605 .get_eee = lan78xx_get_eee,
1606 .set_eee = lan78xx_set_eee,
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001607 .get_pauseparam = lan78xx_get_pause,
1608 .set_pauseparam = lan78xx_set_pause,
Philippe Reynes6e765102016-10-09 12:07:04 +02001609 .get_link_ksettings = lan78xx_get_link_ksettings,
1610 .set_link_ksettings = lan78xx_set_link_ksettings,
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001611};
1612
1613static int lan78xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
1614{
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001615 if (!netif_running(netdev))
1616 return -EINVAL;
1617
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001618 return phy_mii_ioctl(netdev->phydev, rq, cmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001619}
1620
1621static void lan78xx_init_mac_address(struct lan78xx_net *dev)
1622{
1623 u32 addr_lo, addr_hi;
1624 int ret;
1625 u8 addr[6];
1626
1627 ret = lan78xx_read_reg(dev, RX_ADDRL, &addr_lo);
1628 ret = lan78xx_read_reg(dev, RX_ADDRH, &addr_hi);
1629
1630 addr[0] = addr_lo & 0xFF;
1631 addr[1] = (addr_lo >> 8) & 0xFF;
1632 addr[2] = (addr_lo >> 16) & 0xFF;
1633 addr[3] = (addr_lo >> 24) & 0xFF;
1634 addr[4] = addr_hi & 0xFF;
1635 addr[5] = (addr_hi >> 8) & 0xFF;
1636
1637 if (!is_valid_ether_addr(addr)) {
1638 /* reading mac address from EEPROM or OTP */
1639 if ((lan78xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
1640 addr) == 0) ||
1641 (lan78xx_read_otp(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
1642 addr) == 0)) {
1643 if (is_valid_ether_addr(addr)) {
1644 /* eeprom values are valid so use them */
1645 netif_dbg(dev, ifup, dev->net,
1646 "MAC address read from EEPROM");
1647 } else {
1648 /* generate random MAC */
1649 random_ether_addr(addr);
1650 netif_dbg(dev, ifup, dev->net,
1651 "MAC address set to random addr");
1652 }
1653
1654 addr_lo = addr[0] | (addr[1] << 8) |
1655 (addr[2] << 16) | (addr[3] << 24);
1656 addr_hi = addr[4] | (addr[5] << 8);
1657
1658 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo);
1659 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi);
1660 } else {
1661 /* generate random MAC */
1662 random_ether_addr(addr);
1663 netif_dbg(dev, ifup, dev->net,
1664 "MAC address set to random addr");
1665 }
1666 }
1667
1668 ret = lan78xx_write_reg(dev, MAF_LO(0), addr_lo);
1669 ret = lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_);
1670
1671 ether_addr_copy(dev->net->dev_addr, addr);
1672}
1673
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001674/* MDIO read and write wrappers for phylib */
1675static int lan78xx_mdiobus_read(struct mii_bus *bus, int phy_id, int idx)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001676{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001677 struct lan78xx_net *dev = bus->priv;
1678 u32 val, addr;
1679 int ret;
1680
1681 ret = usb_autopm_get_interface(dev->intf);
1682 if (ret < 0)
1683 return ret;
1684
1685 mutex_lock(&dev->phy_mutex);
1686
1687 /* confirm MII not busy */
1688 ret = lan78xx_phy_wait_not_busy(dev);
1689 if (ret < 0)
1690 goto done;
1691
1692 /* set the address, index & direction (read from PHY) */
1693 addr = mii_access(phy_id, idx, MII_READ);
1694 ret = lan78xx_write_reg(dev, MII_ACC, addr);
1695
1696 ret = lan78xx_phy_wait_not_busy(dev);
1697 if (ret < 0)
1698 goto done;
1699
1700 ret = lan78xx_read_reg(dev, MII_DATA, &val);
1701
1702 ret = (int)(val & 0xFFFF);
1703
1704done:
1705 mutex_unlock(&dev->phy_mutex);
1706 usb_autopm_put_interface(dev->intf);
Woojung Huh02dc1f32016-12-07 20:26:25 +00001707
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001708 return ret;
1709}
1710
1711static int lan78xx_mdiobus_write(struct mii_bus *bus, int phy_id, int idx,
1712 u16 regval)
1713{
1714 struct lan78xx_net *dev = bus->priv;
1715 u32 val, addr;
1716 int ret;
1717
1718 ret = usb_autopm_get_interface(dev->intf);
1719 if (ret < 0)
1720 return ret;
1721
1722 mutex_lock(&dev->phy_mutex);
1723
1724 /* confirm MII not busy */
1725 ret = lan78xx_phy_wait_not_busy(dev);
1726 if (ret < 0)
1727 goto done;
1728
1729 val = (u32)regval;
1730 ret = lan78xx_write_reg(dev, MII_DATA, val);
1731
1732 /* set the address, index & direction (write to PHY) */
1733 addr = mii_access(phy_id, idx, MII_WRITE);
1734 ret = lan78xx_write_reg(dev, MII_ACC, addr);
1735
1736 ret = lan78xx_phy_wait_not_busy(dev);
1737 if (ret < 0)
1738 goto done;
1739
1740done:
1741 mutex_unlock(&dev->phy_mutex);
1742 usb_autopm_put_interface(dev->intf);
1743 return 0;
1744}
1745
1746static int lan78xx_mdio_init(struct lan78xx_net *dev)
1747{
1748 int ret;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001749
1750 dev->mdiobus = mdiobus_alloc();
1751 if (!dev->mdiobus) {
1752 netdev_err(dev->net, "can't allocate MDIO bus\n");
1753 return -ENOMEM;
1754 }
1755
1756 dev->mdiobus->priv = (void *)dev;
1757 dev->mdiobus->read = lan78xx_mdiobus_read;
1758 dev->mdiobus->write = lan78xx_mdiobus_write;
1759 dev->mdiobus->name = "lan78xx-mdiobus";
1760
1761 snprintf(dev->mdiobus->id, MII_BUS_ID_SIZE, "usb-%03d:%03d",
1762 dev->udev->bus->busnum, dev->udev->devnum);
1763
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +00001764 switch (dev->chipid) {
1765 case ID_REV_CHIP_ID_7800_:
1766 case ID_REV_CHIP_ID_7850_:
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001767 /* set to internal PHY id */
1768 dev->mdiobus->phy_mask = ~(1 << 1);
1769 break;
Woojung Huh02dc1f32016-12-07 20:26:25 +00001770 case ID_REV_CHIP_ID_7801_:
1771 /* scan thru PHYAD[2..0] */
1772 dev->mdiobus->phy_mask = ~(0xFF);
1773 break;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001774 }
1775
1776 ret = mdiobus_register(dev->mdiobus);
1777 if (ret) {
1778 netdev_err(dev->net, "can't register MDIO bus\n");
Andrew Lunne7f4dc32016-01-06 20:11:15 +01001779 goto exit1;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001780 }
1781
1782 netdev_dbg(dev->net, "registered mdiobus bus %s\n", dev->mdiobus->id);
1783 return 0;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001784exit1:
1785 mdiobus_free(dev->mdiobus);
1786 return ret;
1787}
1788
1789static void lan78xx_remove_mdio(struct lan78xx_net *dev)
1790{
1791 mdiobus_unregister(dev->mdiobus);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001792 mdiobus_free(dev->mdiobus);
1793}
1794
1795static void lan78xx_link_status_change(struct net_device *net)
1796{
Woojung Huh14437e32016-04-25 22:22:36 +00001797 struct phy_device *phydev = net->phydev;
1798 int ret, temp;
1799
1800 /* At forced 100 F/H mode, chip may fail to set mode correctly
1801 * when cable is switched between long(~50+m) and short one.
1802 * As workaround, set to 10 before setting to 100
1803 * at forced 100 F/H mode.
1804 */
1805 if (!phydev->autoneg && (phydev->speed == 100)) {
1806 /* disable phy interrupt */
1807 temp = phy_read(phydev, LAN88XX_INT_MASK);
1808 temp &= ~LAN88XX_INT_MASK_MDINTPIN_EN_;
1809 ret = phy_write(phydev, LAN88XX_INT_MASK, temp);
1810
1811 temp = phy_read(phydev, MII_BMCR);
1812 temp &= ~(BMCR_SPEED100 | BMCR_SPEED1000);
1813 phy_write(phydev, MII_BMCR, temp); /* set to 10 first */
1814 temp |= BMCR_SPEED100;
1815 phy_write(phydev, MII_BMCR, temp); /* set to 100 later */
1816
1817 /* clear pending interrupt generated while workaround */
1818 temp = phy_read(phydev, LAN88XX_INT_STS);
1819
1820 /* enable phy interrupt back */
1821 temp = phy_read(phydev, LAN88XX_INT_MASK);
1822 temp |= LAN88XX_INT_MASK_MDINTPIN_EN_;
1823 ret = phy_write(phydev, LAN88XX_INT_MASK, temp);
1824 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001825}
1826
Woojung Huhcc89c322016-11-01 20:02:00 +00001827static int irq_map(struct irq_domain *d, unsigned int irq,
1828 irq_hw_number_t hwirq)
1829{
1830 struct irq_domain_data *data = d->host_data;
1831
1832 irq_set_chip_data(irq, data);
1833 irq_set_chip_and_handler(irq, data->irqchip, data->irq_handler);
1834 irq_set_noprobe(irq);
1835
1836 return 0;
1837}
1838
1839static void irq_unmap(struct irq_domain *d, unsigned int irq)
1840{
1841 irq_set_chip_and_handler(irq, NULL, NULL);
1842 irq_set_chip_data(irq, NULL);
1843}
1844
1845static const struct irq_domain_ops chip_domain_ops = {
1846 .map = irq_map,
1847 .unmap = irq_unmap,
1848};
1849
1850static void lan78xx_irq_mask(struct irq_data *irqd)
1851{
1852 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1853
1854 data->irqenable &= ~BIT(irqd_to_hwirq(irqd));
1855}
1856
1857static void lan78xx_irq_unmask(struct irq_data *irqd)
1858{
1859 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1860
1861 data->irqenable |= BIT(irqd_to_hwirq(irqd));
1862}
1863
1864static void lan78xx_irq_bus_lock(struct irq_data *irqd)
1865{
1866 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1867
1868 mutex_lock(&data->irq_lock);
1869}
1870
1871static void lan78xx_irq_bus_sync_unlock(struct irq_data *irqd)
1872{
1873 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1874 struct lan78xx_net *dev =
1875 container_of(data, struct lan78xx_net, domain_data);
1876 u32 buf;
1877 int ret;
1878
1879 /* call register access here because irq_bus_lock & irq_bus_sync_unlock
1880 * are only two callbacks executed in non-atomic contex.
1881 */
1882 ret = lan78xx_read_reg(dev, INT_EP_CTL, &buf);
1883 if (buf != data->irqenable)
1884 ret = lan78xx_write_reg(dev, INT_EP_CTL, data->irqenable);
1885
1886 mutex_unlock(&data->irq_lock);
1887}
1888
1889static struct irq_chip lan78xx_irqchip = {
1890 .name = "lan78xx-irqs",
1891 .irq_mask = lan78xx_irq_mask,
1892 .irq_unmask = lan78xx_irq_unmask,
1893 .irq_bus_lock = lan78xx_irq_bus_lock,
1894 .irq_bus_sync_unlock = lan78xx_irq_bus_sync_unlock,
1895};
1896
1897static int lan78xx_setup_irq_domain(struct lan78xx_net *dev)
1898{
1899 struct device_node *of_node;
1900 struct irq_domain *irqdomain;
1901 unsigned int irqmap = 0;
1902 u32 buf;
1903 int ret = 0;
1904
1905 of_node = dev->udev->dev.parent->of_node;
1906
1907 mutex_init(&dev->domain_data.irq_lock);
1908
1909 lan78xx_read_reg(dev, INT_EP_CTL, &buf);
1910 dev->domain_data.irqenable = buf;
1911
1912 dev->domain_data.irqchip = &lan78xx_irqchip;
1913 dev->domain_data.irq_handler = handle_simple_irq;
1914
1915 irqdomain = irq_domain_add_simple(of_node, MAX_INT_EP, 0,
1916 &chip_domain_ops, &dev->domain_data);
1917 if (irqdomain) {
1918 /* create mapping for PHY interrupt */
1919 irqmap = irq_create_mapping(irqdomain, INT_EP_PHY);
1920 if (!irqmap) {
1921 irq_domain_remove(irqdomain);
1922
1923 irqdomain = NULL;
1924 ret = -EINVAL;
1925 }
1926 } else {
1927 ret = -EINVAL;
1928 }
1929
1930 dev->domain_data.irqdomain = irqdomain;
1931 dev->domain_data.phyirq = irqmap;
1932
1933 return ret;
1934}
1935
1936static void lan78xx_remove_irq_domain(struct lan78xx_net *dev)
1937{
1938 if (dev->domain_data.phyirq > 0) {
1939 irq_dispose_mapping(dev->domain_data.phyirq);
1940
1941 if (dev->domain_data.irqdomain)
1942 irq_domain_remove(dev->domain_data.irqdomain);
1943 }
1944 dev->domain_data.phyirq = 0;
1945 dev->domain_data.irqdomain = NULL;
1946}
1947
Woojung Huh02dc1f32016-12-07 20:26:25 +00001948static int lan8835_fixup(struct phy_device *phydev)
1949{
1950 int buf;
1951 int ret;
1952 struct lan78xx_net *dev = netdev_priv(phydev->attached_dev);
1953
1954 /* LED2/PME_N/IRQ_N/RGMII_ID pin to IRQ_N mode */
1955 buf = phy_read_mmd_indirect(phydev, 0x8010, 3);
1956 buf &= ~0x1800;
1957 buf |= 0x0800;
1958 phy_write_mmd_indirect(phydev, 0x8010, 3, buf);
1959
1960 /* RGMII MAC TXC Delay Enable */
1961 ret = lan78xx_write_reg(dev, MAC_RGMII_ID,
1962 MAC_RGMII_ID_TXC_DELAY_EN_);
1963
1964 /* RGMII TX DLL Tune Adjust */
1965 ret = lan78xx_write_reg(dev, RGMII_TX_BYP_DLL, 0x3D00);
1966
1967 dev->interface = PHY_INTERFACE_MODE_RGMII_TXID;
1968
1969 return 1;
1970}
1971
1972static int ksz9031rnx_fixup(struct phy_device *phydev)
1973{
1974 struct lan78xx_net *dev = netdev_priv(phydev->attached_dev);
1975
1976 /* Micrel9301RNX PHY configuration */
1977 /* RGMII Control Signal Pad Skew */
1978 phy_write_mmd_indirect(phydev, 4, 2, 0x0077);
1979 /* RGMII RX Data Pad Skew */
1980 phy_write_mmd_indirect(phydev, 5, 2, 0x7777);
1981 /* RGMII RX Clock Pad Skew */
1982 phy_write_mmd_indirect(phydev, 8, 2, 0x1FF);
1983
1984 dev->interface = PHY_INTERFACE_MODE_RGMII_RXID;
1985
1986 return 1;
1987}
1988
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001989static int lan78xx_phy_init(struct lan78xx_net *dev)
1990{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001991 int ret;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001992 u32 mii_adv;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001993 struct phy_device *phydev = dev->net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001994
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001995 phydev = phy_find_first(dev->mdiobus);
1996 if (!phydev) {
1997 netdev_err(dev->net, "no PHY found\n");
1998 return -EIO;
1999 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002000
Woojung Huh02dc1f32016-12-07 20:26:25 +00002001 if ((dev->chipid == ID_REV_CHIP_ID_7800_) ||
2002 (dev->chipid == ID_REV_CHIP_ID_7850_)) {
2003 phydev->is_internal = true;
2004 dev->interface = PHY_INTERFACE_MODE_GMII;
2005
2006 } else if (dev->chipid == ID_REV_CHIP_ID_7801_) {
2007 if (!phydev->drv) {
2008 netdev_err(dev->net, "no PHY driver found\n");
2009 return -EIO;
2010 }
2011
2012 dev->interface = PHY_INTERFACE_MODE_RGMII;
2013
2014 /* external PHY fixup for KSZ9031RNX */
2015 ret = phy_register_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0,
2016 ksz9031rnx_fixup);
2017 if (ret < 0) {
2018 netdev_err(dev->net, "fail to register fixup\n");
2019 return ret;
2020 }
2021 /* external PHY fixup for LAN8835 */
2022 ret = phy_register_fixup_for_uid(PHY_LAN8835, 0xfffffff0,
2023 lan8835_fixup);
2024 if (ret < 0) {
2025 netdev_err(dev->net, "fail to register fixup\n");
2026 return ret;
2027 }
2028 /* add more external PHY fixup here if needed */
2029
2030 phydev->is_internal = false;
2031 } else {
2032 netdev_err(dev->net, "unknown ID found\n");
2033 ret = -EIO;
2034 goto error;
2035 }
2036
Woojung Huhcc89c322016-11-01 20:02:00 +00002037 /* if phyirq is not set, use polling mode in phylib */
2038 if (dev->domain_data.phyirq > 0)
2039 phydev->irq = dev->domain_data.phyirq;
2040 else
2041 phydev->irq = 0;
2042 netdev_dbg(dev->net, "phydev->irq = %d\n", phydev->irq);
Woojung.Huh@microchip.come4953912016-01-27 22:57:52 +00002043
Woojung Huhf6e3ef32016-11-17 22:10:02 +00002044 /* set to AUTOMDIX */
2045 phydev->mdix = ETH_TP_MDI_AUTO;
2046
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002047 ret = phy_connect_direct(dev->net, phydev,
2048 lan78xx_link_status_change,
Woojung Huh02dc1f32016-12-07 20:26:25 +00002049 dev->interface);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002050 if (ret) {
2051 netdev_err(dev->net, "can't attach PHY to %s\n",
2052 dev->mdiobus->id);
2053 return -EIO;
2054 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002055
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002056 /* MAC doesn't support 1000T Half */
2057 phydev->supported &= ~SUPPORTED_1000baseT_Half;
Woojung.Huh@microchip.come270b2d2016-02-25 23:33:09 +00002058
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00002059 /* support both flow controls */
2060 dev->fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX);
2061 phydev->advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
2062 mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control);
2063 phydev->advertising |= mii_adv_to_ethtool_adv_t(mii_adv);
2064
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002065 genphy_config_aneg(phydev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002066
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00002067 dev->fc_autoneg = phydev->autoneg;
2068
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002069 phy_start(phydev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002070
2071 netif_dbg(dev, ifup, dev->net, "phy initialised successfully");
2072
2073 return 0;
Woojung Huh02dc1f32016-12-07 20:26:25 +00002074
2075error:
2076 phy_unregister_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0);
2077 phy_unregister_fixup_for_uid(PHY_LAN8835, 0xfffffff0);
2078
2079 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002080}
2081
2082static int lan78xx_set_rx_max_frame_length(struct lan78xx_net *dev, int size)
2083{
2084 int ret = 0;
2085 u32 buf;
2086 bool rxenabled;
2087
2088 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
2089
2090 rxenabled = ((buf & MAC_RX_RXEN_) != 0);
2091
2092 if (rxenabled) {
2093 buf &= ~MAC_RX_RXEN_;
2094 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2095 }
2096
2097 /* add 4 to size for FCS */
2098 buf &= ~MAC_RX_MAX_SIZE_MASK_;
2099 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_);
2100
2101 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2102
2103 if (rxenabled) {
2104 buf |= MAC_RX_RXEN_;
2105 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2106 }
2107
2108 return 0;
2109}
2110
2111static int unlink_urbs(struct lan78xx_net *dev, struct sk_buff_head *q)
2112{
2113 struct sk_buff *skb;
2114 unsigned long flags;
2115 int count = 0;
2116
2117 spin_lock_irqsave(&q->lock, flags);
2118 while (!skb_queue_empty(q)) {
2119 struct skb_data *entry;
2120 struct urb *urb;
2121 int ret;
2122
2123 skb_queue_walk(q, skb) {
2124 entry = (struct skb_data *)skb->cb;
2125 if (entry->state != unlink_start)
2126 goto found;
2127 }
2128 break;
2129found:
2130 entry->state = unlink_start;
2131 urb = entry->urb;
2132
2133 /* Get reference count of the URB to avoid it to be
2134 * freed during usb_unlink_urb, which may trigger
2135 * use-after-free problem inside usb_unlink_urb since
2136 * usb_unlink_urb is always racing with .complete
2137 * handler(include defer_bh).
2138 */
2139 usb_get_urb(urb);
2140 spin_unlock_irqrestore(&q->lock, flags);
2141 /* during some PM-driven resume scenarios,
2142 * these (async) unlinks complete immediately
2143 */
2144 ret = usb_unlink_urb(urb);
2145 if (ret != -EINPROGRESS && ret != 0)
2146 netdev_dbg(dev->net, "unlink urb err, %d\n", ret);
2147 else
2148 count++;
2149 usb_put_urb(urb);
2150 spin_lock_irqsave(&q->lock, flags);
2151 }
2152 spin_unlock_irqrestore(&q->lock, flags);
2153 return count;
2154}
2155
2156static int lan78xx_change_mtu(struct net_device *netdev, int new_mtu)
2157{
2158 struct lan78xx_net *dev = netdev_priv(netdev);
2159 int ll_mtu = new_mtu + netdev->hard_header_len;
2160 int old_hard_mtu = dev->hard_mtu;
2161 int old_rx_urb_size = dev->rx_urb_size;
2162 int ret;
2163
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002164 /* no second zero-length packet read wanted after mtu-sized packets */
2165 if ((ll_mtu % dev->maxpacket) == 0)
2166 return -EDOM;
2167
2168 ret = lan78xx_set_rx_max_frame_length(dev, new_mtu + ETH_HLEN);
2169
2170 netdev->mtu = new_mtu;
2171
2172 dev->hard_mtu = netdev->mtu + netdev->hard_header_len;
2173 if (dev->rx_urb_size == old_hard_mtu) {
2174 dev->rx_urb_size = dev->hard_mtu;
2175 if (dev->rx_urb_size > old_rx_urb_size) {
2176 if (netif_running(dev->net)) {
2177 unlink_urbs(dev, &dev->rxq);
2178 tasklet_schedule(&dev->bh);
2179 }
2180 }
2181 }
2182
2183 return 0;
2184}
2185
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002186static int lan78xx_set_mac_addr(struct net_device *netdev, void *p)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002187{
2188 struct lan78xx_net *dev = netdev_priv(netdev);
2189 struct sockaddr *addr = p;
2190 u32 addr_lo, addr_hi;
2191 int ret;
2192
2193 if (netif_running(netdev))
2194 return -EBUSY;
2195
2196 if (!is_valid_ether_addr(addr->sa_data))
2197 return -EADDRNOTAVAIL;
2198
2199 ether_addr_copy(netdev->dev_addr, addr->sa_data);
2200
2201 addr_lo = netdev->dev_addr[0] |
2202 netdev->dev_addr[1] << 8 |
2203 netdev->dev_addr[2] << 16 |
2204 netdev->dev_addr[3] << 24;
2205 addr_hi = netdev->dev_addr[4] |
2206 netdev->dev_addr[5] << 8;
2207
2208 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo);
2209 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi);
2210
2211 return 0;
2212}
2213
2214/* Enable or disable Rx checksum offload engine */
2215static int lan78xx_set_features(struct net_device *netdev,
2216 netdev_features_t features)
2217{
2218 struct lan78xx_net *dev = netdev_priv(netdev);
2219 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2220 unsigned long flags;
2221 int ret;
2222
2223 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
2224
2225 if (features & NETIF_F_RXCSUM) {
2226 pdata->rfe_ctl |= RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_;
2227 pdata->rfe_ctl |= RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_;
2228 } else {
2229 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_);
2230 pdata->rfe_ctl &= ~(RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_);
2231 }
2232
2233 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2234 pdata->rfe_ctl |= RFE_CTL_VLAN_FILTER_;
2235 else
2236 pdata->rfe_ctl &= ~RFE_CTL_VLAN_FILTER_;
2237
2238 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
2239
2240 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
2241
2242 return 0;
2243}
2244
2245static void lan78xx_deferred_vlan_write(struct work_struct *param)
2246{
2247 struct lan78xx_priv *pdata =
2248 container_of(param, struct lan78xx_priv, set_vlan);
2249 struct lan78xx_net *dev = pdata->dev;
2250
2251 lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, 0,
2252 DP_SEL_VHF_VLAN_LEN, pdata->vlan_table);
2253}
2254
2255static int lan78xx_vlan_rx_add_vid(struct net_device *netdev,
2256 __be16 proto, u16 vid)
2257{
2258 struct lan78xx_net *dev = netdev_priv(netdev);
2259 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2260 u16 vid_bit_index;
2261 u16 vid_dword_index;
2262
2263 vid_dword_index = (vid >> 5) & 0x7F;
2264 vid_bit_index = vid & 0x1F;
2265
2266 pdata->vlan_table[vid_dword_index] |= (1 << vid_bit_index);
2267
2268 /* defer register writes to a sleepable context */
2269 schedule_work(&pdata->set_vlan);
2270
2271 return 0;
2272}
2273
2274static int lan78xx_vlan_rx_kill_vid(struct net_device *netdev,
2275 __be16 proto, u16 vid)
2276{
2277 struct lan78xx_net *dev = netdev_priv(netdev);
2278 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2279 u16 vid_bit_index;
2280 u16 vid_dword_index;
2281
2282 vid_dword_index = (vid >> 5) & 0x7F;
2283 vid_bit_index = vid & 0x1F;
2284
2285 pdata->vlan_table[vid_dword_index] &= ~(1 << vid_bit_index);
2286
2287 /* defer register writes to a sleepable context */
2288 schedule_work(&pdata->set_vlan);
2289
2290 return 0;
2291}
2292
2293static void lan78xx_init_ltm(struct lan78xx_net *dev)
2294{
2295 int ret;
2296 u32 buf;
2297 u32 regs[6] = { 0 };
2298
2299 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
2300 if (buf & USB_CFG1_LTM_ENABLE_) {
2301 u8 temp[2];
2302 /* Get values from EEPROM first */
2303 if (lan78xx_read_eeprom(dev, 0x3F, 2, temp) == 0) {
2304 if (temp[0] == 24) {
2305 ret = lan78xx_read_raw_eeprom(dev,
2306 temp[1] * 2,
2307 24,
2308 (u8 *)regs);
2309 if (ret < 0)
2310 return;
2311 }
2312 } else if (lan78xx_read_otp(dev, 0x3F, 2, temp) == 0) {
2313 if (temp[0] == 24) {
2314 ret = lan78xx_read_raw_otp(dev,
2315 temp[1] * 2,
2316 24,
2317 (u8 *)regs);
2318 if (ret < 0)
2319 return;
2320 }
2321 }
2322 }
2323
2324 lan78xx_write_reg(dev, LTM_BELT_IDLE0, regs[0]);
2325 lan78xx_write_reg(dev, LTM_BELT_IDLE1, regs[1]);
2326 lan78xx_write_reg(dev, LTM_BELT_ACT0, regs[2]);
2327 lan78xx_write_reg(dev, LTM_BELT_ACT1, regs[3]);
2328 lan78xx_write_reg(dev, LTM_INACTIVE0, regs[4]);
2329 lan78xx_write_reg(dev, LTM_INACTIVE1, regs[5]);
2330}
2331
2332static int lan78xx_reset(struct lan78xx_net *dev)
2333{
2334 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2335 u32 buf;
2336 int ret = 0;
2337 unsigned long timeout;
2338
2339 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2340 buf |= HW_CFG_LRST_;
2341 ret = lan78xx_write_reg(dev, HW_CFG, buf);
2342
2343 timeout = jiffies + HZ;
2344 do {
2345 mdelay(1);
2346 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2347 if (time_after(jiffies, timeout)) {
2348 netdev_warn(dev->net,
2349 "timeout on completion of LiteReset");
2350 return -EIO;
2351 }
2352 } while (buf & HW_CFG_LRST_);
2353
2354 lan78xx_init_mac_address(dev);
2355
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002356 /* save DEVID for later usage */
2357 ret = lan78xx_read_reg(dev, ID_REV, &buf);
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +00002358 dev->chipid = (buf & ID_REV_CHIP_ID_MASK_) >> 16;
2359 dev->chiprev = buf & ID_REV_CHIP_REV_MASK_;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002360
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002361 /* Respond to the IN token with a NAK */
2362 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
2363 buf |= USB_CFG_BIR_;
2364 ret = lan78xx_write_reg(dev, USB_CFG0, buf);
2365
2366 /* Init LTM */
2367 lan78xx_init_ltm(dev);
2368
2369 dev->net->hard_header_len += TX_OVERHEAD;
2370 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
2371
2372 if (dev->udev->speed == USB_SPEED_SUPER) {
2373 buf = DEFAULT_BURST_CAP_SIZE / SS_USB_PKT_SIZE;
2374 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2375 dev->rx_qlen = 4;
2376 dev->tx_qlen = 4;
2377 } else if (dev->udev->speed == USB_SPEED_HIGH) {
2378 buf = DEFAULT_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
2379 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2380 dev->rx_qlen = RX_MAX_QUEUE_MEMORY / dev->rx_urb_size;
2381 dev->tx_qlen = RX_MAX_QUEUE_MEMORY / dev->hard_mtu;
2382 } else {
2383 buf = DEFAULT_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
2384 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2385 dev->rx_qlen = 4;
2386 }
2387
2388 ret = lan78xx_write_reg(dev, BURST_CAP, buf);
2389 ret = lan78xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
2390
2391 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2392 buf |= HW_CFG_MEF_;
2393 ret = lan78xx_write_reg(dev, HW_CFG, buf);
2394
2395 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
2396 buf |= USB_CFG_BCE_;
2397 ret = lan78xx_write_reg(dev, USB_CFG0, buf);
2398
2399 /* set FIFO sizes */
2400 buf = (MAX_RX_FIFO_SIZE - 512) / 512;
2401 ret = lan78xx_write_reg(dev, FCT_RX_FIFO_END, buf);
2402
2403 buf = (MAX_TX_FIFO_SIZE - 512) / 512;
2404 ret = lan78xx_write_reg(dev, FCT_TX_FIFO_END, buf);
2405
2406 ret = lan78xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
2407 ret = lan78xx_write_reg(dev, FLOW, 0);
2408 ret = lan78xx_write_reg(dev, FCT_FLOW, 0);
2409
2410 /* Don't need rfe_ctl_lock during initialisation */
2411 ret = lan78xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
2412 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_ | RFE_CTL_DA_PERFECT_;
2413 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
2414
2415 /* Enable or disable checksum offload engines */
2416 lan78xx_set_features(dev->net, dev->net->features);
2417
2418 lan78xx_set_multicast(dev->net);
2419
2420 /* reset PHY */
2421 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
2422 buf |= PMT_CTL_PHY_RST_;
2423 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
2424
2425 timeout = jiffies + HZ;
2426 do {
2427 mdelay(1);
2428 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
2429 if (time_after(jiffies, timeout)) {
2430 netdev_warn(dev->net, "timeout waiting for PHY Reset");
2431 return -EIO;
2432 }
Woojung.Huh@microchip.com6c595b02015-09-16 23:40:39 +00002433 } while ((buf & PMT_CTL_PHY_RST_) || !(buf & PMT_CTL_READY_));
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002434
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002435 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002436 /* LAN7801 only has RGMII mode */
2437 if (dev->chipid == ID_REV_CHIP_ID_7801_)
2438 buf &= ~MAC_CR_GMII_EN_;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002439 buf |= MAC_CR_AUTO_DUPLEX_ | MAC_CR_AUTO_SPEED_;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002440 ret = lan78xx_write_reg(dev, MAC_CR, buf);
2441
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002442 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
2443 buf |= MAC_TX_TXEN_;
2444 ret = lan78xx_write_reg(dev, MAC_TX, buf);
2445
2446 ret = lan78xx_read_reg(dev, FCT_TX_CTL, &buf);
2447 buf |= FCT_TX_CTL_EN_;
2448 ret = lan78xx_write_reg(dev, FCT_TX_CTL, buf);
2449
2450 ret = lan78xx_set_rx_max_frame_length(dev, dev->net->mtu + ETH_HLEN);
2451
2452 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
2453 buf |= MAC_RX_RXEN_;
2454 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2455
2456 ret = lan78xx_read_reg(dev, FCT_RX_CTL, &buf);
2457 buf |= FCT_RX_CTL_EN_;
2458 ret = lan78xx_write_reg(dev, FCT_RX_CTL, buf);
2459
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002460 return 0;
2461}
2462
Woojung Huh20ff5562016-03-16 22:10:40 +00002463static void lan78xx_init_stats(struct lan78xx_net *dev)
2464{
2465 u32 *p;
2466 int i;
2467
2468 /* initialize for stats update
2469 * some counters are 20bits and some are 32bits
2470 */
2471 p = (u32 *)&dev->stats.rollover_max;
2472 for (i = 0; i < (sizeof(dev->stats.rollover_max) / (sizeof(u32))); i++)
2473 p[i] = 0xFFFFF;
2474
2475 dev->stats.rollover_max.rx_unicast_byte_count = 0xFFFFFFFF;
2476 dev->stats.rollover_max.rx_broadcast_byte_count = 0xFFFFFFFF;
2477 dev->stats.rollover_max.rx_multicast_byte_count = 0xFFFFFFFF;
2478 dev->stats.rollover_max.eee_rx_lpi_transitions = 0xFFFFFFFF;
2479 dev->stats.rollover_max.eee_rx_lpi_time = 0xFFFFFFFF;
2480 dev->stats.rollover_max.tx_unicast_byte_count = 0xFFFFFFFF;
2481 dev->stats.rollover_max.tx_broadcast_byte_count = 0xFFFFFFFF;
2482 dev->stats.rollover_max.tx_multicast_byte_count = 0xFFFFFFFF;
2483 dev->stats.rollover_max.eee_tx_lpi_transitions = 0xFFFFFFFF;
2484 dev->stats.rollover_max.eee_tx_lpi_time = 0xFFFFFFFF;
2485
2486 lan78xx_defer_kevent(dev, EVENT_STAT_UPDATE);
2487}
2488
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002489static int lan78xx_open(struct net_device *net)
2490{
2491 struct lan78xx_net *dev = netdev_priv(net);
2492 int ret;
2493
2494 ret = usb_autopm_get_interface(dev->intf);
2495 if (ret < 0)
2496 goto out;
2497
2498 ret = lan78xx_reset(dev);
2499 if (ret < 0)
2500 goto done;
2501
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002502 ret = lan78xx_phy_init(dev);
2503 if (ret < 0)
2504 goto done;
2505
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002506 /* for Link Check */
2507 if (dev->urb_intr) {
2508 ret = usb_submit_urb(dev->urb_intr, GFP_KERNEL);
2509 if (ret < 0) {
2510 netif_err(dev, ifup, dev->net,
2511 "intr submit %d\n", ret);
2512 goto done;
2513 }
2514 }
2515
Woojung Huh20ff5562016-03-16 22:10:40 +00002516 lan78xx_init_stats(dev);
2517
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002518 set_bit(EVENT_DEV_OPEN, &dev->flags);
2519
2520 netif_start_queue(net);
2521
2522 dev->link_on = false;
2523
2524 lan78xx_defer_kevent(dev, EVENT_LINK_RESET);
2525done:
2526 usb_autopm_put_interface(dev->intf);
2527
2528out:
2529 return ret;
2530}
2531
2532static void lan78xx_terminate_urbs(struct lan78xx_net *dev)
2533{
2534 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(unlink_wakeup);
2535 DECLARE_WAITQUEUE(wait, current);
2536 int temp;
2537
2538 /* ensure there are no more active urbs */
2539 add_wait_queue(&unlink_wakeup, &wait);
2540 set_current_state(TASK_UNINTERRUPTIBLE);
2541 dev->wait = &unlink_wakeup;
2542 temp = unlink_urbs(dev, &dev->txq) + unlink_urbs(dev, &dev->rxq);
2543
2544 /* maybe wait for deletions to finish. */
2545 while (!skb_queue_empty(&dev->rxq) &&
2546 !skb_queue_empty(&dev->txq) &&
2547 !skb_queue_empty(&dev->done)) {
2548 schedule_timeout(msecs_to_jiffies(UNLINK_TIMEOUT_MS));
2549 set_current_state(TASK_UNINTERRUPTIBLE);
2550 netif_dbg(dev, ifdown, dev->net,
2551 "waited for %d urb completions\n", temp);
2552 }
2553 set_current_state(TASK_RUNNING);
2554 dev->wait = NULL;
2555 remove_wait_queue(&unlink_wakeup, &wait);
2556}
2557
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002558static int lan78xx_stop(struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002559{
2560 struct lan78xx_net *dev = netdev_priv(net);
2561
Woojung Huh20ff5562016-03-16 22:10:40 +00002562 if (timer_pending(&dev->stat_monitor))
2563 del_timer_sync(&dev->stat_monitor);
2564
Woojung Huh02dc1f32016-12-07 20:26:25 +00002565 phy_unregister_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0);
2566 phy_unregister_fixup_for_uid(PHY_LAN8835, 0xfffffff0);
2567
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002568 phy_stop(net->phydev);
2569 phy_disconnect(net->phydev);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002570
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002571 net->phydev = NULL;
2572
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002573 clear_bit(EVENT_DEV_OPEN, &dev->flags);
2574 netif_stop_queue(net);
2575
2576 netif_info(dev, ifdown, dev->net,
2577 "stop stats: rx/tx %lu/%lu, errs %lu/%lu\n",
2578 net->stats.rx_packets, net->stats.tx_packets,
2579 net->stats.rx_errors, net->stats.tx_errors);
2580
2581 lan78xx_terminate_urbs(dev);
2582
2583 usb_kill_urb(dev->urb_intr);
2584
2585 skb_queue_purge(&dev->rxq_pause);
2586
2587 /* deferred work (task, timer, softirq) must also stop.
2588 * can't flush_scheduled_work() until we drop rtnl (later),
2589 * else workers could deadlock; so make workers a NOP.
2590 */
2591 dev->flags = 0;
2592 cancel_delayed_work_sync(&dev->wq);
2593 tasklet_kill(&dev->bh);
2594
2595 usb_autopm_put_interface(dev->intf);
2596
2597 return 0;
2598}
2599
2600static int lan78xx_linearize(struct sk_buff *skb)
2601{
2602 return skb_linearize(skb);
2603}
2604
2605static struct sk_buff *lan78xx_tx_prep(struct lan78xx_net *dev,
2606 struct sk_buff *skb, gfp_t flags)
2607{
2608 u32 tx_cmd_a, tx_cmd_b;
2609
2610 if (skb_headroom(skb) < TX_OVERHEAD) {
2611 struct sk_buff *skb2;
2612
2613 skb2 = skb_copy_expand(skb, TX_OVERHEAD, 0, flags);
2614 dev_kfree_skb_any(skb);
2615 skb = skb2;
2616 if (!skb)
2617 return NULL;
2618 }
2619
2620 if (lan78xx_linearize(skb) < 0)
2621 return NULL;
2622
2623 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN_MASK_) | TX_CMD_A_FCS_;
2624
2625 if (skb->ip_summed == CHECKSUM_PARTIAL)
2626 tx_cmd_a |= TX_CMD_A_IPE_ | TX_CMD_A_TPE_;
2627
2628 tx_cmd_b = 0;
2629 if (skb_is_gso(skb)) {
2630 u16 mss = max(skb_shinfo(skb)->gso_size, TX_CMD_B_MSS_MIN_);
2631
2632 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT_) & TX_CMD_B_MSS_MASK_;
2633
2634 tx_cmd_a |= TX_CMD_A_LSO_;
2635 }
2636
2637 if (skb_vlan_tag_present(skb)) {
2638 tx_cmd_a |= TX_CMD_A_IVTG_;
2639 tx_cmd_b |= skb_vlan_tag_get(skb) & TX_CMD_B_VTAG_MASK_;
2640 }
2641
2642 skb_push(skb, 4);
2643 cpu_to_le32s(&tx_cmd_b);
2644 memcpy(skb->data, &tx_cmd_b, 4);
2645
2646 skb_push(skb, 4);
2647 cpu_to_le32s(&tx_cmd_a);
2648 memcpy(skb->data, &tx_cmd_a, 4);
2649
2650 return skb;
2651}
2652
2653static enum skb_state defer_bh(struct lan78xx_net *dev, struct sk_buff *skb,
2654 struct sk_buff_head *list, enum skb_state state)
2655{
2656 unsigned long flags;
2657 enum skb_state old_state;
2658 struct skb_data *entry = (struct skb_data *)skb->cb;
2659
2660 spin_lock_irqsave(&list->lock, flags);
2661 old_state = entry->state;
2662 entry->state = state;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002663
2664 __skb_unlink(skb, list);
2665 spin_unlock(&list->lock);
2666 spin_lock(&dev->done.lock);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002667
2668 __skb_queue_tail(&dev->done, skb);
2669 if (skb_queue_len(&dev->done) == 1)
2670 tasklet_schedule(&dev->bh);
2671 spin_unlock_irqrestore(&dev->done.lock, flags);
2672
2673 return old_state;
2674}
2675
2676static void tx_complete(struct urb *urb)
2677{
2678 struct sk_buff *skb = (struct sk_buff *)urb->context;
2679 struct skb_data *entry = (struct skb_data *)skb->cb;
2680 struct lan78xx_net *dev = entry->dev;
2681
2682 if (urb->status == 0) {
Woojung Huh74d79a22016-04-25 22:22:32 +00002683 dev->net->stats.tx_packets += entry->num_of_packet;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002684 dev->net->stats.tx_bytes += entry->length;
2685 } else {
2686 dev->net->stats.tx_errors++;
2687
2688 switch (urb->status) {
2689 case -EPIPE:
2690 lan78xx_defer_kevent(dev, EVENT_TX_HALT);
2691 break;
2692
2693 /* software-driven interface shutdown */
2694 case -ECONNRESET:
2695 case -ESHUTDOWN:
2696 break;
2697
2698 case -EPROTO:
2699 case -ETIME:
2700 case -EILSEQ:
2701 netif_stop_queue(dev->net);
2702 break;
2703 default:
2704 netif_dbg(dev, tx_err, dev->net,
2705 "tx err %d\n", entry->urb->status);
2706 break;
2707 }
2708 }
2709
2710 usb_autopm_put_interface_async(dev->intf);
2711
Woojung.Huh@microchip.com81c38e82015-08-11 15:21:41 +00002712 defer_bh(dev, skb, &dev->txq, tx_done);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002713}
2714
2715static void lan78xx_queue_skb(struct sk_buff_head *list,
2716 struct sk_buff *newsk, enum skb_state state)
2717{
2718 struct skb_data *entry = (struct skb_data *)newsk->cb;
2719
2720 __skb_queue_tail(list, newsk);
2721 entry->state = state;
2722}
2723
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002724static netdev_tx_t
2725lan78xx_start_xmit(struct sk_buff *skb, struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002726{
2727 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.com81c38e82015-08-11 15:21:41 +00002728 struct sk_buff *skb2 = NULL;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002729
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002730 if (skb) {
Woojung.Huh@microchip.com81c38e82015-08-11 15:21:41 +00002731 skb_tx_timestamp(skb);
2732 skb2 = lan78xx_tx_prep(dev, skb, GFP_ATOMIC);
2733 }
2734
2735 if (skb2) {
2736 skb_queue_tail(&dev->txq_pend, skb2);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002737
Woojung.Huh@microchip.com4b2a4a92016-01-27 22:57:54 +00002738 /* throttle TX patch at slower than SUPER SPEED USB */
2739 if ((dev->udev->speed < USB_SPEED_SUPER) &&
2740 (skb_queue_len(&dev->txq_pend) > 10))
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002741 netif_stop_queue(net);
2742 } else {
2743 netif_dbg(dev, tx_err, dev->net,
2744 "lan78xx_tx_prep return NULL\n");
2745 dev->net->stats.tx_errors++;
2746 dev->net->stats.tx_dropped++;
2747 }
2748
2749 tasklet_schedule(&dev->bh);
2750
2751 return NETDEV_TX_OK;
2752}
2753
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002754static int
2755lan78xx_get_endpoints(struct lan78xx_net *dev, struct usb_interface *intf)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002756{
2757 int tmp;
2758 struct usb_host_interface *alt = NULL;
2759 struct usb_host_endpoint *in = NULL, *out = NULL;
2760 struct usb_host_endpoint *status = NULL;
2761
2762 for (tmp = 0; tmp < intf->num_altsetting; tmp++) {
2763 unsigned ep;
2764
2765 in = NULL;
2766 out = NULL;
2767 status = NULL;
2768 alt = intf->altsetting + tmp;
2769
2770 for (ep = 0; ep < alt->desc.bNumEndpoints; ep++) {
2771 struct usb_host_endpoint *e;
2772 int intr = 0;
2773
2774 e = alt->endpoint + ep;
2775 switch (e->desc.bmAttributes) {
2776 case USB_ENDPOINT_XFER_INT:
2777 if (!usb_endpoint_dir_in(&e->desc))
2778 continue;
2779 intr = 1;
2780 /* FALLTHROUGH */
2781 case USB_ENDPOINT_XFER_BULK:
2782 break;
2783 default:
2784 continue;
2785 }
2786 if (usb_endpoint_dir_in(&e->desc)) {
2787 if (!intr && !in)
2788 in = e;
2789 else if (intr && !status)
2790 status = e;
2791 } else {
2792 if (!out)
2793 out = e;
2794 }
2795 }
2796 if (in && out)
2797 break;
2798 }
2799 if (!alt || !in || !out)
2800 return -EINVAL;
2801
2802 dev->pipe_in = usb_rcvbulkpipe(dev->udev,
2803 in->desc.bEndpointAddress &
2804 USB_ENDPOINT_NUMBER_MASK);
2805 dev->pipe_out = usb_sndbulkpipe(dev->udev,
2806 out->desc.bEndpointAddress &
2807 USB_ENDPOINT_NUMBER_MASK);
2808 dev->ep_intr = status;
2809
2810 return 0;
2811}
2812
2813static int lan78xx_bind(struct lan78xx_net *dev, struct usb_interface *intf)
2814{
2815 struct lan78xx_priv *pdata = NULL;
2816 int ret;
2817 int i;
2818
2819 ret = lan78xx_get_endpoints(dev, intf);
2820
2821 dev->data[0] = (unsigned long)kzalloc(sizeof(*pdata), GFP_KERNEL);
2822
2823 pdata = (struct lan78xx_priv *)(dev->data[0]);
2824 if (!pdata) {
2825 netdev_warn(dev->net, "Unable to allocate lan78xx_priv");
2826 return -ENOMEM;
2827 }
2828
2829 pdata->dev = dev;
2830
2831 spin_lock_init(&pdata->rfe_ctl_lock);
2832 mutex_init(&pdata->dataport_mutex);
2833
2834 INIT_WORK(&pdata->set_multicast, lan78xx_deferred_multicast_write);
2835
2836 for (i = 0; i < DP_SEL_VHF_VLAN_LEN; i++)
2837 pdata->vlan_table[i] = 0;
2838
2839 INIT_WORK(&pdata->set_vlan, lan78xx_deferred_vlan_write);
2840
2841 dev->net->features = 0;
2842
2843 if (DEFAULT_TX_CSUM_ENABLE)
2844 dev->net->features |= NETIF_F_HW_CSUM;
2845
2846 if (DEFAULT_RX_CSUM_ENABLE)
2847 dev->net->features |= NETIF_F_RXCSUM;
2848
2849 if (DEFAULT_TSO_CSUM_ENABLE)
2850 dev->net->features |= NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_SG;
2851
2852 dev->net->hw_features = dev->net->features;
2853
Woojung Huhcc89c322016-11-01 20:02:00 +00002854 ret = lan78xx_setup_irq_domain(dev);
2855 if (ret < 0) {
2856 netdev_warn(dev->net,
2857 "lan78xx_setup_irq_domain() failed : %d", ret);
2858 kfree(pdata);
2859 return ret;
2860 }
2861
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002862 /* Init all registers */
2863 ret = lan78xx_reset(dev);
2864
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002865 lan78xx_mdio_init(dev);
2866
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002867 dev->net->flags |= IFF_MULTICAST;
2868
2869 pdata->wol = WAKE_MAGIC;
2870
2871 return 0;
2872}
2873
2874static void lan78xx_unbind(struct lan78xx_net *dev, struct usb_interface *intf)
2875{
2876 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2877
Woojung Huhcc89c322016-11-01 20:02:00 +00002878 lan78xx_remove_irq_domain(dev);
2879
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002880 lan78xx_remove_mdio(dev);
2881
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002882 if (pdata) {
2883 netif_dbg(dev, ifdown, dev->net, "free pdata");
2884 kfree(pdata);
2885 pdata = NULL;
2886 dev->data[0] = 0;
2887 }
2888}
2889
2890static void lan78xx_rx_csum_offload(struct lan78xx_net *dev,
2891 struct sk_buff *skb,
2892 u32 rx_cmd_a, u32 rx_cmd_b)
2893{
2894 if (!(dev->net->features & NETIF_F_RXCSUM) ||
2895 unlikely(rx_cmd_a & RX_CMD_A_ICSM_)) {
2896 skb->ip_summed = CHECKSUM_NONE;
2897 } else {
2898 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT_));
2899 skb->ip_summed = CHECKSUM_COMPLETE;
2900 }
2901}
2902
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002903static void lan78xx_skb_return(struct lan78xx_net *dev, struct sk_buff *skb)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002904{
2905 int status;
2906
2907 if (test_bit(EVENT_RX_PAUSED, &dev->flags)) {
2908 skb_queue_tail(&dev->rxq_pause, skb);
2909 return;
2910 }
2911
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002912 dev->net->stats.rx_packets++;
2913 dev->net->stats.rx_bytes += skb->len;
2914
Woojung Huh74d79a22016-04-25 22:22:32 +00002915 skb->protocol = eth_type_trans(skb, dev->net);
2916
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002917 netif_dbg(dev, rx_status, dev->net, "< rx, len %zu, type 0x%x\n",
2918 skb->len + sizeof(struct ethhdr), skb->protocol);
2919 memset(skb->cb, 0, sizeof(struct skb_data));
2920
2921 if (skb_defer_rx_timestamp(skb))
2922 return;
2923
2924 status = netif_rx(skb);
2925 if (status != NET_RX_SUCCESS)
2926 netif_dbg(dev, rx_err, dev->net,
2927 "netif_rx status %d\n", status);
2928}
2929
2930static int lan78xx_rx(struct lan78xx_net *dev, struct sk_buff *skb)
2931{
2932 if (skb->len < dev->net->hard_header_len)
2933 return 0;
2934
2935 while (skb->len > 0) {
2936 u32 rx_cmd_a, rx_cmd_b, align_count, size;
2937 u16 rx_cmd_c;
2938 struct sk_buff *skb2;
2939 unsigned char *packet;
2940
2941 memcpy(&rx_cmd_a, skb->data, sizeof(rx_cmd_a));
2942 le32_to_cpus(&rx_cmd_a);
2943 skb_pull(skb, sizeof(rx_cmd_a));
2944
2945 memcpy(&rx_cmd_b, skb->data, sizeof(rx_cmd_b));
2946 le32_to_cpus(&rx_cmd_b);
2947 skb_pull(skb, sizeof(rx_cmd_b));
2948
2949 memcpy(&rx_cmd_c, skb->data, sizeof(rx_cmd_c));
2950 le16_to_cpus(&rx_cmd_c);
2951 skb_pull(skb, sizeof(rx_cmd_c));
2952
2953 packet = skb->data;
2954
2955 /* get the packet length */
2956 size = (rx_cmd_a & RX_CMD_A_LEN_MASK_);
2957 align_count = (4 - ((size + RXW_PADDING) % 4)) % 4;
2958
2959 if (unlikely(rx_cmd_a & RX_CMD_A_RED_)) {
2960 netif_dbg(dev, rx_err, dev->net,
2961 "Error rx_cmd_a=0x%08x", rx_cmd_a);
2962 } else {
2963 /* last frame in this batch */
2964 if (skb->len == size) {
2965 lan78xx_rx_csum_offload(dev, skb,
2966 rx_cmd_a, rx_cmd_b);
2967
2968 skb_trim(skb, skb->len - 4); /* remove fcs */
2969 skb->truesize = size + sizeof(struct sk_buff);
2970
2971 return 1;
2972 }
2973
2974 skb2 = skb_clone(skb, GFP_ATOMIC);
2975 if (unlikely(!skb2)) {
2976 netdev_warn(dev->net, "Error allocating skb");
2977 return 0;
2978 }
2979
2980 skb2->len = size;
2981 skb2->data = packet;
2982 skb_set_tail_pointer(skb2, size);
2983
2984 lan78xx_rx_csum_offload(dev, skb2, rx_cmd_a, rx_cmd_b);
2985
2986 skb_trim(skb2, skb2->len - 4); /* remove fcs */
2987 skb2->truesize = size + sizeof(struct sk_buff);
2988
2989 lan78xx_skb_return(dev, skb2);
2990 }
2991
2992 skb_pull(skb, size);
2993
2994 /* padding bytes before the next frame starts */
2995 if (skb->len)
2996 skb_pull(skb, align_count);
2997 }
2998
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002999 return 1;
3000}
3001
3002static inline void rx_process(struct lan78xx_net *dev, struct sk_buff *skb)
3003{
3004 if (!lan78xx_rx(dev, skb)) {
3005 dev->net->stats.rx_errors++;
3006 goto done;
3007 }
3008
3009 if (skb->len) {
3010 lan78xx_skb_return(dev, skb);
3011 return;
3012 }
3013
3014 netif_dbg(dev, rx_err, dev->net, "drop\n");
3015 dev->net->stats.rx_errors++;
3016done:
3017 skb_queue_tail(&dev->done, skb);
3018}
3019
3020static void rx_complete(struct urb *urb);
3021
3022static int rx_submit(struct lan78xx_net *dev, struct urb *urb, gfp_t flags)
3023{
3024 struct sk_buff *skb;
3025 struct skb_data *entry;
3026 unsigned long lockflags;
3027 size_t size = dev->rx_urb_size;
3028 int ret = 0;
3029
3030 skb = netdev_alloc_skb_ip_align(dev->net, size);
3031 if (!skb) {
3032 usb_free_urb(urb);
3033 return -ENOMEM;
3034 }
3035
3036 entry = (struct skb_data *)skb->cb;
3037 entry->urb = urb;
3038 entry->dev = dev;
3039 entry->length = 0;
3040
3041 usb_fill_bulk_urb(urb, dev->udev, dev->pipe_in,
3042 skb->data, size, rx_complete, skb);
3043
3044 spin_lock_irqsave(&dev->rxq.lock, lockflags);
3045
3046 if (netif_device_present(dev->net) &&
3047 netif_running(dev->net) &&
3048 !test_bit(EVENT_RX_HALT, &dev->flags) &&
3049 !test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
3050 ret = usb_submit_urb(urb, GFP_ATOMIC);
3051 switch (ret) {
3052 case 0:
3053 lan78xx_queue_skb(&dev->rxq, skb, rx_start);
3054 break;
3055 case -EPIPE:
3056 lan78xx_defer_kevent(dev, EVENT_RX_HALT);
3057 break;
3058 case -ENODEV:
3059 netif_dbg(dev, ifdown, dev->net, "device gone\n");
3060 netif_device_detach(dev->net);
3061 break;
3062 case -EHOSTUNREACH:
3063 ret = -ENOLINK;
3064 break;
3065 default:
3066 netif_dbg(dev, rx_err, dev->net,
3067 "rx submit, %d\n", ret);
3068 tasklet_schedule(&dev->bh);
3069 }
3070 } else {
3071 netif_dbg(dev, ifdown, dev->net, "rx: stopped\n");
3072 ret = -ENOLINK;
3073 }
3074 spin_unlock_irqrestore(&dev->rxq.lock, lockflags);
3075 if (ret) {
3076 dev_kfree_skb_any(skb);
3077 usb_free_urb(urb);
3078 }
3079 return ret;
3080}
3081
3082static void rx_complete(struct urb *urb)
3083{
3084 struct sk_buff *skb = (struct sk_buff *)urb->context;
3085 struct skb_data *entry = (struct skb_data *)skb->cb;
3086 struct lan78xx_net *dev = entry->dev;
3087 int urb_status = urb->status;
3088 enum skb_state state;
3089
3090 skb_put(skb, urb->actual_length);
3091 state = rx_done;
3092 entry->urb = NULL;
3093
3094 switch (urb_status) {
3095 case 0:
3096 if (skb->len < dev->net->hard_header_len) {
3097 state = rx_cleanup;
3098 dev->net->stats.rx_errors++;
3099 dev->net->stats.rx_length_errors++;
3100 netif_dbg(dev, rx_err, dev->net,
3101 "rx length %d\n", skb->len);
3102 }
3103 usb_mark_last_busy(dev->udev);
3104 break;
3105 case -EPIPE:
3106 dev->net->stats.rx_errors++;
3107 lan78xx_defer_kevent(dev, EVENT_RX_HALT);
3108 /* FALLTHROUGH */
3109 case -ECONNRESET: /* async unlink */
3110 case -ESHUTDOWN: /* hardware gone */
3111 netif_dbg(dev, ifdown, dev->net,
3112 "rx shutdown, code %d\n", urb_status);
3113 state = rx_cleanup;
3114 entry->urb = urb;
3115 urb = NULL;
3116 break;
3117 case -EPROTO:
3118 case -ETIME:
3119 case -EILSEQ:
3120 dev->net->stats.rx_errors++;
3121 state = rx_cleanup;
3122 entry->urb = urb;
3123 urb = NULL;
3124 break;
3125
3126 /* data overrun ... flush fifo? */
3127 case -EOVERFLOW:
3128 dev->net->stats.rx_over_errors++;
3129 /* FALLTHROUGH */
3130
3131 default:
3132 state = rx_cleanup;
3133 dev->net->stats.rx_errors++;
3134 netif_dbg(dev, rx_err, dev->net, "rx status %d\n", urb_status);
3135 break;
3136 }
3137
3138 state = defer_bh(dev, skb, &dev->rxq, state);
3139
3140 if (urb) {
3141 if (netif_running(dev->net) &&
3142 !test_bit(EVENT_RX_HALT, &dev->flags) &&
3143 state != unlink_start) {
3144 rx_submit(dev, urb, GFP_ATOMIC);
3145 return;
3146 }
3147 usb_free_urb(urb);
3148 }
3149 netif_dbg(dev, rx_err, dev->net, "no read resubmitted\n");
3150}
3151
3152static void lan78xx_tx_bh(struct lan78xx_net *dev)
3153{
3154 int length;
3155 struct urb *urb = NULL;
3156 struct skb_data *entry;
3157 unsigned long flags;
3158 struct sk_buff_head *tqp = &dev->txq_pend;
3159 struct sk_buff *skb, *skb2;
3160 int ret;
3161 int count, pos;
3162 int skb_totallen, pkt_cnt;
3163
3164 skb_totallen = 0;
3165 pkt_cnt = 0;
Woojung Huh74d79a22016-04-25 22:22:32 +00003166 count = 0;
3167 length = 0;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003168 for (skb = tqp->next; pkt_cnt < tqp->qlen; skb = skb->next) {
3169 if (skb_is_gso(skb)) {
3170 if (pkt_cnt) {
3171 /* handle previous packets first */
3172 break;
3173 }
Woojung Huh74d79a22016-04-25 22:22:32 +00003174 count = 1;
3175 length = skb->len - TX_OVERHEAD;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003176 skb2 = skb_dequeue(tqp);
3177 goto gso_skb;
3178 }
3179
3180 if ((skb_totallen + skb->len) > MAX_SINGLE_PACKET_SIZE)
3181 break;
3182 skb_totallen = skb->len + roundup(skb_totallen, sizeof(u32));
3183 pkt_cnt++;
3184 }
3185
3186 /* copy to a single skb */
3187 skb = alloc_skb(skb_totallen, GFP_ATOMIC);
3188 if (!skb)
3189 goto drop;
3190
3191 skb_put(skb, skb_totallen);
3192
3193 for (count = pos = 0; count < pkt_cnt; count++) {
3194 skb2 = skb_dequeue(tqp);
3195 if (skb2) {
Woojung Huh74d79a22016-04-25 22:22:32 +00003196 length += (skb2->len - TX_OVERHEAD);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003197 memcpy(skb->data + pos, skb2->data, skb2->len);
3198 pos += roundup(skb2->len, sizeof(u32));
3199 dev_kfree_skb(skb2);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003200 }
3201 }
3202
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003203gso_skb:
3204 urb = usb_alloc_urb(0, GFP_ATOMIC);
Wolfram Sangd7c4e842016-08-11 23:05:27 +02003205 if (!urb)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003206 goto drop;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003207
3208 entry = (struct skb_data *)skb->cb;
3209 entry->urb = urb;
3210 entry->dev = dev;
3211 entry->length = length;
Woojung Huh74d79a22016-04-25 22:22:32 +00003212 entry->num_of_packet = count;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003213
3214 spin_lock_irqsave(&dev->txq.lock, flags);
3215 ret = usb_autopm_get_interface_async(dev->intf);
3216 if (ret < 0) {
3217 spin_unlock_irqrestore(&dev->txq.lock, flags);
3218 goto drop;
3219 }
3220
3221 usb_fill_bulk_urb(urb, dev->udev, dev->pipe_out,
3222 skb->data, skb->len, tx_complete, skb);
3223
3224 if (length % dev->maxpacket == 0) {
3225 /* send USB_ZERO_PACKET */
3226 urb->transfer_flags |= URB_ZERO_PACKET;
3227 }
3228
3229#ifdef CONFIG_PM
3230 /* if this triggers the device is still a sleep */
3231 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
3232 /* transmission will be done in resume */
3233 usb_anchor_urb(urb, &dev->deferred);
3234 /* no use to process more packets */
3235 netif_stop_queue(dev->net);
3236 usb_put_urb(urb);
3237 spin_unlock_irqrestore(&dev->txq.lock, flags);
3238 netdev_dbg(dev->net, "Delaying transmission for resumption\n");
3239 return;
3240 }
3241#endif
3242
3243 ret = usb_submit_urb(urb, GFP_ATOMIC);
3244 switch (ret) {
3245 case 0:
Florian Westphal860e9532016-05-03 16:33:13 +02003246 netif_trans_update(dev->net);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003247 lan78xx_queue_skb(&dev->txq, skb, tx_start);
3248 if (skb_queue_len(&dev->txq) >= dev->tx_qlen)
3249 netif_stop_queue(dev->net);
3250 break;
3251 case -EPIPE:
3252 netif_stop_queue(dev->net);
3253 lan78xx_defer_kevent(dev, EVENT_TX_HALT);
3254 usb_autopm_put_interface_async(dev->intf);
3255 break;
3256 default:
3257 usb_autopm_put_interface_async(dev->intf);
3258 netif_dbg(dev, tx_err, dev->net,
3259 "tx: submit urb err %d\n", ret);
3260 break;
3261 }
3262
3263 spin_unlock_irqrestore(&dev->txq.lock, flags);
3264
3265 if (ret) {
3266 netif_dbg(dev, tx_err, dev->net, "drop, code %d\n", ret);
3267drop:
3268 dev->net->stats.tx_dropped++;
3269 if (skb)
3270 dev_kfree_skb_any(skb);
3271 usb_free_urb(urb);
3272 } else
3273 netif_dbg(dev, tx_queued, dev->net,
3274 "> tx, len %d, type 0x%x\n", length, skb->protocol);
3275}
3276
3277static void lan78xx_rx_bh(struct lan78xx_net *dev)
3278{
3279 struct urb *urb;
3280 int i;
3281
3282 if (skb_queue_len(&dev->rxq) < dev->rx_qlen) {
3283 for (i = 0; i < 10; i++) {
3284 if (skb_queue_len(&dev->rxq) >= dev->rx_qlen)
3285 break;
3286 urb = usb_alloc_urb(0, GFP_ATOMIC);
3287 if (urb)
3288 if (rx_submit(dev, urb, GFP_ATOMIC) == -ENOLINK)
3289 return;
3290 }
3291
3292 if (skb_queue_len(&dev->rxq) < dev->rx_qlen)
3293 tasklet_schedule(&dev->bh);
3294 }
3295 if (skb_queue_len(&dev->txq) < dev->tx_qlen)
3296 netif_wake_queue(dev->net);
3297}
3298
3299static void lan78xx_bh(unsigned long param)
3300{
3301 struct lan78xx_net *dev = (struct lan78xx_net *)param;
3302 struct sk_buff *skb;
3303 struct skb_data *entry;
3304
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003305 while ((skb = skb_dequeue(&dev->done))) {
3306 entry = (struct skb_data *)(skb->cb);
3307 switch (entry->state) {
3308 case rx_done:
3309 entry->state = rx_cleanup;
3310 rx_process(dev, skb);
3311 continue;
3312 case tx_done:
3313 usb_free_urb(entry->urb);
3314 dev_kfree_skb(skb);
3315 continue;
3316 case rx_cleanup:
3317 usb_free_urb(entry->urb);
3318 dev_kfree_skb(skb);
3319 continue;
3320 default:
3321 netdev_dbg(dev->net, "skb state %d\n", entry->state);
3322 return;
3323 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003324 }
3325
3326 if (netif_device_present(dev->net) && netif_running(dev->net)) {
Woojung Huh20ff5562016-03-16 22:10:40 +00003327 /* reset update timer delta */
3328 if (timer_pending(&dev->stat_monitor) && (dev->delta != 1)) {
3329 dev->delta = 1;
3330 mod_timer(&dev->stat_monitor,
3331 jiffies + STAT_UPDATE_TIMER);
3332 }
3333
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003334 if (!skb_queue_empty(&dev->txq_pend))
3335 lan78xx_tx_bh(dev);
3336
3337 if (!timer_pending(&dev->delay) &&
3338 !test_bit(EVENT_RX_HALT, &dev->flags))
3339 lan78xx_rx_bh(dev);
3340 }
3341}
3342
3343static void lan78xx_delayedwork(struct work_struct *work)
3344{
3345 int status;
3346 struct lan78xx_net *dev;
3347
3348 dev = container_of(work, struct lan78xx_net, wq.work);
3349
3350 if (test_bit(EVENT_TX_HALT, &dev->flags)) {
3351 unlink_urbs(dev, &dev->txq);
3352 status = usb_autopm_get_interface(dev->intf);
3353 if (status < 0)
3354 goto fail_pipe;
3355 status = usb_clear_halt(dev->udev, dev->pipe_out);
3356 usb_autopm_put_interface(dev->intf);
3357 if (status < 0 &&
3358 status != -EPIPE &&
3359 status != -ESHUTDOWN) {
3360 if (netif_msg_tx_err(dev))
3361fail_pipe:
3362 netdev_err(dev->net,
3363 "can't clear tx halt, status %d\n",
3364 status);
3365 } else {
3366 clear_bit(EVENT_TX_HALT, &dev->flags);
3367 if (status != -ESHUTDOWN)
3368 netif_wake_queue(dev->net);
3369 }
3370 }
3371 if (test_bit(EVENT_RX_HALT, &dev->flags)) {
3372 unlink_urbs(dev, &dev->rxq);
3373 status = usb_autopm_get_interface(dev->intf);
3374 if (status < 0)
3375 goto fail_halt;
3376 status = usb_clear_halt(dev->udev, dev->pipe_in);
3377 usb_autopm_put_interface(dev->intf);
3378 if (status < 0 &&
3379 status != -EPIPE &&
3380 status != -ESHUTDOWN) {
3381 if (netif_msg_rx_err(dev))
3382fail_halt:
3383 netdev_err(dev->net,
3384 "can't clear rx halt, status %d\n",
3385 status);
3386 } else {
3387 clear_bit(EVENT_RX_HALT, &dev->flags);
3388 tasklet_schedule(&dev->bh);
3389 }
3390 }
3391
3392 if (test_bit(EVENT_LINK_RESET, &dev->flags)) {
3393 int ret = 0;
3394
3395 clear_bit(EVENT_LINK_RESET, &dev->flags);
3396 status = usb_autopm_get_interface(dev->intf);
3397 if (status < 0)
3398 goto skip_reset;
3399 if (lan78xx_link_reset(dev) < 0) {
3400 usb_autopm_put_interface(dev->intf);
3401skip_reset:
3402 netdev_info(dev->net, "link reset failed (%d)\n",
3403 ret);
3404 } else {
3405 usb_autopm_put_interface(dev->intf);
3406 }
3407 }
Woojung Huh20ff5562016-03-16 22:10:40 +00003408
3409 if (test_bit(EVENT_STAT_UPDATE, &dev->flags)) {
3410 lan78xx_update_stats(dev);
3411
3412 clear_bit(EVENT_STAT_UPDATE, &dev->flags);
3413
3414 mod_timer(&dev->stat_monitor,
3415 jiffies + (STAT_UPDATE_TIMER * dev->delta));
3416
3417 dev->delta = min((dev->delta * 2), 50);
3418 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003419}
3420
3421static void intr_complete(struct urb *urb)
3422{
3423 struct lan78xx_net *dev = urb->context;
3424 int status = urb->status;
3425
3426 switch (status) {
3427 /* success */
3428 case 0:
3429 lan78xx_status(dev, urb);
3430 break;
3431
3432 /* software-driven interface shutdown */
3433 case -ENOENT: /* urb killed */
3434 case -ESHUTDOWN: /* hardware gone */
3435 netif_dbg(dev, ifdown, dev->net,
3436 "intr shutdown, code %d\n", status);
3437 return;
3438
3439 /* NOTE: not throttling like RX/TX, since this endpoint
3440 * already polls infrequently
3441 */
3442 default:
3443 netdev_dbg(dev->net, "intr status %d\n", status);
3444 break;
3445 }
3446
3447 if (!netif_running(dev->net))
3448 return;
3449
3450 memset(urb->transfer_buffer, 0, urb->transfer_buffer_length);
3451 status = usb_submit_urb(urb, GFP_ATOMIC);
3452 if (status != 0)
3453 netif_err(dev, timer, dev->net,
3454 "intr resubmit --> %d\n", status);
3455}
3456
3457static void lan78xx_disconnect(struct usb_interface *intf)
3458{
3459 struct lan78xx_net *dev;
3460 struct usb_device *udev;
3461 struct net_device *net;
3462
3463 dev = usb_get_intfdata(intf);
3464 usb_set_intfdata(intf, NULL);
3465 if (!dev)
3466 return;
3467
3468 udev = interface_to_usbdev(intf);
3469
3470 net = dev->net;
3471 unregister_netdev(net);
3472
3473 cancel_delayed_work_sync(&dev->wq);
3474
3475 usb_scuttle_anchored_urbs(&dev->deferred);
3476
3477 lan78xx_unbind(dev, intf);
3478
3479 usb_kill_urb(dev->urb_intr);
3480 usb_free_urb(dev->urb_intr);
3481
3482 free_netdev(net);
3483 usb_put_dev(udev);
3484}
3485
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003486static void lan78xx_tx_timeout(struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003487{
3488 struct lan78xx_net *dev = netdev_priv(net);
3489
3490 unlink_urbs(dev, &dev->txq);
3491 tasklet_schedule(&dev->bh);
3492}
3493
3494static const struct net_device_ops lan78xx_netdev_ops = {
3495 .ndo_open = lan78xx_open,
3496 .ndo_stop = lan78xx_stop,
3497 .ndo_start_xmit = lan78xx_start_xmit,
3498 .ndo_tx_timeout = lan78xx_tx_timeout,
3499 .ndo_change_mtu = lan78xx_change_mtu,
3500 .ndo_set_mac_address = lan78xx_set_mac_addr,
3501 .ndo_validate_addr = eth_validate_addr,
3502 .ndo_do_ioctl = lan78xx_ioctl,
3503 .ndo_set_rx_mode = lan78xx_set_multicast,
3504 .ndo_set_features = lan78xx_set_features,
3505 .ndo_vlan_rx_add_vid = lan78xx_vlan_rx_add_vid,
3506 .ndo_vlan_rx_kill_vid = lan78xx_vlan_rx_kill_vid,
3507};
3508
Woojung Huh20ff5562016-03-16 22:10:40 +00003509static void lan78xx_stat_monitor(unsigned long param)
3510{
3511 struct lan78xx_net *dev;
3512
3513 dev = (struct lan78xx_net *)param;
3514
3515 lan78xx_defer_kevent(dev, EVENT_STAT_UPDATE);
3516}
3517
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003518static int lan78xx_probe(struct usb_interface *intf,
3519 const struct usb_device_id *id)
3520{
3521 struct lan78xx_net *dev;
3522 struct net_device *netdev;
3523 struct usb_device *udev;
3524 int ret;
3525 unsigned maxp;
3526 unsigned period;
3527 u8 *buf = NULL;
3528
3529 udev = interface_to_usbdev(intf);
3530 udev = usb_get_dev(udev);
3531
3532 ret = -ENOMEM;
3533 netdev = alloc_etherdev(sizeof(struct lan78xx_net));
3534 if (!netdev) {
3535 dev_err(&intf->dev, "Error: OOM\n");
3536 goto out1;
3537 }
3538
3539 /* netdev_printk() needs this */
3540 SET_NETDEV_DEV(netdev, &intf->dev);
3541
3542 dev = netdev_priv(netdev);
3543 dev->udev = udev;
3544 dev->intf = intf;
3545 dev->net = netdev;
3546 dev->msg_enable = netif_msg_init(msg_level, NETIF_MSG_DRV
3547 | NETIF_MSG_PROBE | NETIF_MSG_LINK);
3548
3549 skb_queue_head_init(&dev->rxq);
3550 skb_queue_head_init(&dev->txq);
3551 skb_queue_head_init(&dev->done);
3552 skb_queue_head_init(&dev->rxq_pause);
3553 skb_queue_head_init(&dev->txq_pend);
3554 mutex_init(&dev->phy_mutex);
3555
3556 tasklet_init(&dev->bh, lan78xx_bh, (unsigned long)dev);
3557 INIT_DELAYED_WORK(&dev->wq, lan78xx_delayedwork);
3558 init_usb_anchor(&dev->deferred);
3559
3560 netdev->netdev_ops = &lan78xx_netdev_ops;
3561 netdev->watchdog_timeo = TX_TIMEOUT_JIFFIES;
3562 netdev->ethtool_ops = &lan78xx_ethtool_ops;
3563
Woojung Huh20ff5562016-03-16 22:10:40 +00003564 dev->stat_monitor.function = lan78xx_stat_monitor;
3565 dev->stat_monitor.data = (unsigned long)dev;
3566 dev->delta = 1;
3567 init_timer(&dev->stat_monitor);
3568
3569 mutex_init(&dev->stats.access_lock);
3570
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003571 ret = lan78xx_bind(dev, intf);
3572 if (ret < 0)
3573 goto out2;
3574 strcpy(netdev->name, "eth%d");
3575
3576 if (netdev->mtu > (dev->hard_mtu - netdev->hard_header_len))
3577 netdev->mtu = dev->hard_mtu - netdev->hard_header_len;
3578
Jarod Wilsonf77f0ae2016-10-20 13:55:17 -04003579 /* MTU range: 68 - 9000 */
3580 netdev->max_mtu = MAX_SINGLE_PACKET_SIZE;
3581
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003582 dev->ep_blkin = (intf->cur_altsetting)->endpoint + 0;
3583 dev->ep_blkout = (intf->cur_altsetting)->endpoint + 1;
3584 dev->ep_intr = (intf->cur_altsetting)->endpoint + 2;
3585
3586 dev->pipe_in = usb_rcvbulkpipe(udev, BULK_IN_PIPE);
3587 dev->pipe_out = usb_sndbulkpipe(udev, BULK_OUT_PIPE);
3588
3589 dev->pipe_intr = usb_rcvintpipe(dev->udev,
3590 dev->ep_intr->desc.bEndpointAddress &
3591 USB_ENDPOINT_NUMBER_MASK);
3592 period = dev->ep_intr->desc.bInterval;
3593
3594 maxp = usb_maxpacket(dev->udev, dev->pipe_intr, 0);
3595 buf = kmalloc(maxp, GFP_KERNEL);
3596 if (buf) {
3597 dev->urb_intr = usb_alloc_urb(0, GFP_KERNEL);
3598 if (!dev->urb_intr) {
Pan Bian51920832016-12-03 19:24:48 +08003599 ret = -ENOMEM;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003600 kfree(buf);
3601 goto out3;
3602 } else {
3603 usb_fill_int_urb(dev->urb_intr, dev->udev,
3604 dev->pipe_intr, buf, maxp,
3605 intr_complete, dev, period);
3606 }
3607 }
3608
3609 dev->maxpacket = usb_maxpacket(dev->udev, dev->pipe_out, 1);
3610
3611 /* driver requires remote-wakeup capability during autosuspend. */
3612 intf->needs_remote_wakeup = 1;
3613
3614 ret = register_netdev(netdev);
3615 if (ret != 0) {
3616 netif_err(dev, probe, netdev, "couldn't register the device\n");
3617 goto out2;
3618 }
3619
3620 usb_set_intfdata(intf, dev);
3621
3622 ret = device_set_wakeup_enable(&udev->dev, true);
3623
3624 /* Default delay of 2sec has more overhead than advantage.
3625 * Set to 10sec as default.
3626 */
3627 pm_runtime_set_autosuspend_delay(&udev->dev,
3628 DEFAULT_AUTOSUSPEND_DELAY);
3629
3630 return 0;
3631
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003632out3:
3633 lan78xx_unbind(dev, intf);
3634out2:
3635 free_netdev(netdev);
3636out1:
3637 usb_put_dev(udev);
3638
3639 return ret;
3640}
3641
3642static u16 lan78xx_wakeframe_crc16(const u8 *buf, int len)
3643{
3644 const u16 crc16poly = 0x8005;
3645 int i;
3646 u16 bit, crc, msb;
3647 u8 data;
3648
3649 crc = 0xFFFF;
3650 for (i = 0; i < len; i++) {
3651 data = *buf++;
3652 for (bit = 0; bit < 8; bit++) {
3653 msb = crc >> 15;
3654 crc <<= 1;
3655
3656 if (msb ^ (u16)(data & 1)) {
3657 crc ^= crc16poly;
3658 crc |= (u16)0x0001U;
3659 }
3660 data >>= 1;
3661 }
3662 }
3663
3664 return crc;
3665}
3666
3667static int lan78xx_set_suspend(struct lan78xx_net *dev, u32 wol)
3668{
3669 u32 buf;
3670 int ret;
3671 int mask_index;
3672 u16 crc;
3673 u32 temp_wucsr;
3674 u32 temp_pmt_ctl;
3675 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E };
3676 const u8 ipv6_multicast[3] = { 0x33, 0x33 };
3677 const u8 arp_type[2] = { 0x08, 0x06 };
3678
3679 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3680 buf &= ~MAC_TX_TXEN_;
3681 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3682 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3683 buf &= ~MAC_RX_RXEN_;
3684 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3685
3686 ret = lan78xx_write_reg(dev, WUCSR, 0);
3687 ret = lan78xx_write_reg(dev, WUCSR2, 0);
3688 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
3689
3690 temp_wucsr = 0;
3691
3692 temp_pmt_ctl = 0;
3693 ret = lan78xx_read_reg(dev, PMT_CTL, &temp_pmt_ctl);
3694 temp_pmt_ctl &= ~PMT_CTL_RES_CLR_WKP_EN_;
3695 temp_pmt_ctl |= PMT_CTL_RES_CLR_WKP_STS_;
3696
3697 for (mask_index = 0; mask_index < NUM_OF_WUF_CFG; mask_index++)
3698 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index), 0);
3699
3700 mask_index = 0;
3701 if (wol & WAKE_PHY) {
3702 temp_pmt_ctl |= PMT_CTL_PHY_WAKE_EN_;
3703
3704 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3705 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3706 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3707 }
3708 if (wol & WAKE_MAGIC) {
3709 temp_wucsr |= WUCSR_MPEN_;
3710
3711 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3712 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3713 temp_pmt_ctl |= PMT_CTL_SUS_MODE_3_;
3714 }
3715 if (wol & WAKE_BCAST) {
3716 temp_wucsr |= WUCSR_BCST_EN_;
3717
3718 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3719 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3720 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3721 }
3722 if (wol & WAKE_MCAST) {
3723 temp_wucsr |= WUCSR_WAKE_EN_;
3724
3725 /* set WUF_CFG & WUF_MASK for IPv4 Multicast */
3726 crc = lan78xx_wakeframe_crc16(ipv4_multicast, 3);
3727 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3728 WUF_CFGX_EN_ |
3729 WUF_CFGX_TYPE_MCAST_ |
3730 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3731 (crc & WUF_CFGX_CRC16_MASK_));
3732
3733 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 7);
3734 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3735 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3736 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3737 mask_index++;
3738
3739 /* for IPv6 Multicast */
3740 crc = lan78xx_wakeframe_crc16(ipv6_multicast, 2);
3741 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3742 WUF_CFGX_EN_ |
3743 WUF_CFGX_TYPE_MCAST_ |
3744 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3745 (crc & WUF_CFGX_CRC16_MASK_));
3746
3747 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 3);
3748 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3749 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3750 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3751 mask_index++;
3752
3753 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3754 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3755 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3756 }
3757 if (wol & WAKE_UCAST) {
3758 temp_wucsr |= WUCSR_PFDA_EN_;
3759
3760 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3761 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3762 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3763 }
3764 if (wol & WAKE_ARP) {
3765 temp_wucsr |= WUCSR_WAKE_EN_;
3766
3767 /* set WUF_CFG & WUF_MASK
3768 * for packettype (offset 12,13) = ARP (0x0806)
3769 */
3770 crc = lan78xx_wakeframe_crc16(arp_type, 2);
3771 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3772 WUF_CFGX_EN_ |
3773 WUF_CFGX_TYPE_ALL_ |
3774 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3775 (crc & WUF_CFGX_CRC16_MASK_));
3776
3777 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 0x3000);
3778 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3779 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3780 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3781 mask_index++;
3782
3783 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3784 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3785 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3786 }
3787
3788 ret = lan78xx_write_reg(dev, WUCSR, temp_wucsr);
3789
3790 /* when multiple WOL bits are set */
3791 if (hweight_long((unsigned long)wol) > 1) {
3792 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3793 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3794 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3795 }
3796 ret = lan78xx_write_reg(dev, PMT_CTL, temp_pmt_ctl);
3797
3798 /* clear WUPS */
3799 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
3800 buf |= PMT_CTL_WUPS_MASK_;
3801 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
3802
3803 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3804 buf |= MAC_RX_RXEN_;
3805 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3806
3807 return 0;
3808}
3809
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003810static int lan78xx_suspend(struct usb_interface *intf, pm_message_t message)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003811{
3812 struct lan78xx_net *dev = usb_get_intfdata(intf);
3813 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
3814 u32 buf;
3815 int ret;
3816 int event;
3817
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003818 event = message.event;
3819
3820 if (!dev->suspend_count++) {
3821 spin_lock_irq(&dev->txq.lock);
3822 /* don't autosuspend while transmitting */
3823 if ((skb_queue_len(&dev->txq) ||
3824 skb_queue_len(&dev->txq_pend)) &&
3825 PMSG_IS_AUTO(message)) {
3826 spin_unlock_irq(&dev->txq.lock);
3827 ret = -EBUSY;
3828 goto out;
3829 } else {
3830 set_bit(EVENT_DEV_ASLEEP, &dev->flags);
3831 spin_unlock_irq(&dev->txq.lock);
3832 }
3833
3834 /* stop TX & RX */
3835 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3836 buf &= ~MAC_TX_TXEN_;
3837 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3838 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3839 buf &= ~MAC_RX_RXEN_;
3840 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3841
3842 /* empty out the rx and queues */
3843 netif_device_detach(dev->net);
3844 lan78xx_terminate_urbs(dev);
3845 usb_kill_urb(dev->urb_intr);
3846
3847 /* reattach */
3848 netif_device_attach(dev->net);
3849 }
3850
3851 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
Woojung Huh20ff5562016-03-16 22:10:40 +00003852 del_timer(&dev->stat_monitor);
3853
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003854 if (PMSG_IS_AUTO(message)) {
3855 /* auto suspend (selective suspend) */
3856 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3857 buf &= ~MAC_TX_TXEN_;
3858 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3859 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3860 buf &= ~MAC_RX_RXEN_;
3861 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3862
3863 ret = lan78xx_write_reg(dev, WUCSR, 0);
3864 ret = lan78xx_write_reg(dev, WUCSR2, 0);
3865 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
3866
3867 /* set goodframe wakeup */
3868 ret = lan78xx_read_reg(dev, WUCSR, &buf);
3869
3870 buf |= WUCSR_RFE_WAKE_EN_;
3871 buf |= WUCSR_STORE_WAKE_;
3872
3873 ret = lan78xx_write_reg(dev, WUCSR, buf);
3874
3875 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
3876
3877 buf &= ~PMT_CTL_RES_CLR_WKP_EN_;
3878 buf |= PMT_CTL_RES_CLR_WKP_STS_;
3879
3880 buf |= PMT_CTL_PHY_WAKE_EN_;
3881 buf |= PMT_CTL_WOL_EN_;
3882 buf &= ~PMT_CTL_SUS_MODE_MASK_;
3883 buf |= PMT_CTL_SUS_MODE_3_;
3884
3885 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
3886
3887 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
3888
3889 buf |= PMT_CTL_WUPS_MASK_;
3890
3891 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
3892
3893 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3894 buf |= MAC_RX_RXEN_;
3895 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3896 } else {
3897 lan78xx_set_suspend(dev, pdata->wol);
3898 }
3899 }
3900
Woojung.Huh@microchip.com49d28b562015-09-25 21:13:48 +00003901 ret = 0;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003902out:
3903 return ret;
3904}
3905
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003906static int lan78xx_resume(struct usb_interface *intf)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003907{
3908 struct lan78xx_net *dev = usb_get_intfdata(intf);
3909 struct sk_buff *skb;
3910 struct urb *res;
3911 int ret;
3912 u32 buf;
3913
Woojung Huh20ff5562016-03-16 22:10:40 +00003914 if (!timer_pending(&dev->stat_monitor)) {
3915 dev->delta = 1;
3916 mod_timer(&dev->stat_monitor,
3917 jiffies + STAT_UPDATE_TIMER);
3918 }
3919
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003920 if (!--dev->suspend_count) {
3921 /* resume interrupt URBs */
3922 if (dev->urb_intr && test_bit(EVENT_DEV_OPEN, &dev->flags))
3923 usb_submit_urb(dev->urb_intr, GFP_NOIO);
3924
3925 spin_lock_irq(&dev->txq.lock);
3926 while ((res = usb_get_from_anchor(&dev->deferred))) {
3927 skb = (struct sk_buff *)res->context;
3928 ret = usb_submit_urb(res, GFP_ATOMIC);
3929 if (ret < 0) {
3930 dev_kfree_skb_any(skb);
3931 usb_free_urb(res);
3932 usb_autopm_put_interface_async(dev->intf);
3933 } else {
Florian Westphal860e9532016-05-03 16:33:13 +02003934 netif_trans_update(dev->net);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003935 lan78xx_queue_skb(&dev->txq, skb, tx_start);
3936 }
3937 }
3938
3939 clear_bit(EVENT_DEV_ASLEEP, &dev->flags);
3940 spin_unlock_irq(&dev->txq.lock);
3941
3942 if (test_bit(EVENT_DEV_OPEN, &dev->flags)) {
3943 if (!(skb_queue_len(&dev->txq) >= dev->tx_qlen))
3944 netif_start_queue(dev->net);
3945 tasklet_schedule(&dev->bh);
3946 }
3947 }
3948
3949 ret = lan78xx_write_reg(dev, WUCSR2, 0);
3950 ret = lan78xx_write_reg(dev, WUCSR, 0);
3951 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
3952
3953 ret = lan78xx_write_reg(dev, WUCSR2, WUCSR2_NS_RCD_ |
3954 WUCSR2_ARP_RCD_ |
3955 WUCSR2_IPV6_TCPSYN_RCD_ |
3956 WUCSR2_IPV4_TCPSYN_RCD_);
3957
3958 ret = lan78xx_write_reg(dev, WUCSR, WUCSR_EEE_TX_WAKE_ |
3959 WUCSR_EEE_RX_WAKE_ |
3960 WUCSR_PFDA_FR_ |
3961 WUCSR_RFE_WAKE_FR_ |
3962 WUCSR_WUFR_ |
3963 WUCSR_MPR_ |
3964 WUCSR_BCST_FR_);
3965
3966 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3967 buf |= MAC_TX_TXEN_;
3968 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3969
3970 return 0;
3971}
3972
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003973static int lan78xx_reset_resume(struct usb_interface *intf)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003974{
3975 struct lan78xx_net *dev = usb_get_intfdata(intf);
3976
3977 lan78xx_reset(dev);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00003978
3979 lan78xx_phy_init(dev);
3980
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003981 return lan78xx_resume(intf);
3982}
3983
3984static const struct usb_device_id products[] = {
3985 {
3986 /* LAN7800 USB Gigabit Ethernet Device */
3987 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7800_USB_PRODUCT_ID),
3988 },
3989 {
3990 /* LAN7850 USB Gigabit Ethernet Device */
3991 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7850_USB_PRODUCT_ID),
3992 },
Woojung Huh02dc1f32016-12-07 20:26:25 +00003993 {
3994 /* LAN7801 USB Gigabit Ethernet Device */
3995 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7801_USB_PRODUCT_ID),
3996 },
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003997 {},
3998};
3999MODULE_DEVICE_TABLE(usb, products);
4000
4001static struct usb_driver lan78xx_driver = {
4002 .name = DRIVER_NAME,
4003 .id_table = products,
4004 .probe = lan78xx_probe,
4005 .disconnect = lan78xx_disconnect,
4006 .suspend = lan78xx_suspend,
4007 .resume = lan78xx_resume,
4008 .reset_resume = lan78xx_reset_resume,
4009 .supports_autosuspend = 1,
4010 .disable_hub_initiated_lpm = 1,
4011};
4012
4013module_usb_driver(lan78xx_driver);
4014
4015MODULE_AUTHOR(DRIVER_AUTHOR);
4016MODULE_DESCRIPTION(DRIVER_DESC);
4017MODULE_LICENSE("GPL");