Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Driver for ADAU1701 SigmaDSP processor |
| 3 | * |
| 4 | * Copyright 2011 Analog Devices Inc. |
| 5 | * Author: Lars-Peter Clausen <lars@metafoo.de> |
| 6 | * based on an inital version by Cliff Cai <cliff.cai@analog.com> |
| 7 | * |
| 8 | * Licensed under the GPL-2 or later. |
| 9 | */ |
| 10 | |
| 11 | #include <linux/module.h> |
| 12 | #include <linux/init.h> |
| 13 | #include <linux/i2c.h> |
| 14 | #include <linux/delay.h> |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 15 | #include <linux/slab.h> |
Daniel Mack | 04561ea | 2013-05-23 15:46:05 +0200 | [diff] [blame] | 16 | #include <linux/of.h> |
| 17 | #include <linux/of_gpio.h> |
| 18 | #include <linux/of_device.h> |
Pascal Huerst | 64fcc1f | 2015-04-20 11:12:03 +0200 | [diff] [blame] | 19 | #include <linux/regulator/consumer.h> |
Daniel Mack | 45405d5 | 2013-06-24 16:31:31 +0200 | [diff] [blame] | 20 | #include <linux/regmap.h> |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 21 | #include <sound/core.h> |
| 22 | #include <sound/pcm.h> |
| 23 | #include <sound/pcm_params.h> |
| 24 | #include <sound/soc.h> |
| 25 | |
Lars-Peter Clausen | a3a1ec6 | 2014-11-19 18:29:07 +0100 | [diff] [blame] | 26 | #include <asm/unaligned.h> |
| 27 | |
Lars-Peter Clausen | 40216ce | 2011-11-28 09:44:17 +0100 | [diff] [blame] | 28 | #include "sigmadsp.h" |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 29 | #include "adau1701.h" |
| 30 | |
Lars-Peter Clausen | a3a1ec6 | 2014-11-19 18:29:07 +0100 | [diff] [blame] | 31 | #define ADAU1701_SAFELOAD_DATA(i) (0x0810 + (i)) |
| 32 | #define ADAU1701_SAFELOAD_ADDR(i) (0x0815 + (i)) |
| 33 | |
Daniel Mack | 45405d5 | 2013-06-24 16:31:31 +0200 | [diff] [blame] | 34 | #define ADAU1701_DSPCTRL 0x081c |
| 35 | #define ADAU1701_SEROCTL 0x081e |
| 36 | #define ADAU1701_SERICTL 0x081f |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 37 | |
Daniel Mack | 45405d5 | 2013-06-24 16:31:31 +0200 | [diff] [blame] | 38 | #define ADAU1701_AUXNPOW 0x0822 |
Daniel Mack | 97d0a86 | 2013-06-24 16:31:32 +0200 | [diff] [blame] | 39 | #define ADAU1701_PINCONF_0 0x0820 |
| 40 | #define ADAU1701_PINCONF_1 0x0821 |
| 41 | #define ADAU1701_AUXNPOW 0x0822 |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 42 | |
Daniel Mack | 45405d5 | 2013-06-24 16:31:31 +0200 | [diff] [blame] | 43 | #define ADAU1701_OSCIPOW 0x0826 |
| 44 | #define ADAU1701_DACSET 0x0827 |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 45 | |
Daniel Mack | 45405d5 | 2013-06-24 16:31:31 +0200 | [diff] [blame] | 46 | #define ADAU1701_MAX_REGISTER 0x0828 |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 47 | |
| 48 | #define ADAU1701_DSPCTRL_CR (1 << 2) |
| 49 | #define ADAU1701_DSPCTRL_DAM (1 << 3) |
| 50 | #define ADAU1701_DSPCTRL_ADM (1 << 4) |
Lars-Peter Clausen | a3a1ec6 | 2014-11-19 18:29:07 +0100 | [diff] [blame] | 51 | #define ADAU1701_DSPCTRL_IST (1 << 5) |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 52 | #define ADAU1701_DSPCTRL_SR_48 0x00 |
| 53 | #define ADAU1701_DSPCTRL_SR_96 0x01 |
| 54 | #define ADAU1701_DSPCTRL_SR_192 0x02 |
| 55 | #define ADAU1701_DSPCTRL_SR_MASK 0x03 |
| 56 | |
| 57 | #define ADAU1701_SEROCTL_INV_LRCLK 0x2000 |
| 58 | #define ADAU1701_SEROCTL_INV_BCLK 0x1000 |
| 59 | #define ADAU1701_SEROCTL_MASTER 0x0800 |
| 60 | |
| 61 | #define ADAU1701_SEROCTL_OBF16 0x0000 |
| 62 | #define ADAU1701_SEROCTL_OBF8 0x0200 |
| 63 | #define ADAU1701_SEROCTL_OBF4 0x0400 |
| 64 | #define ADAU1701_SEROCTL_OBF2 0x0600 |
| 65 | #define ADAU1701_SEROCTL_OBF_MASK 0x0600 |
| 66 | |
| 67 | #define ADAU1701_SEROCTL_OLF1024 0x0000 |
| 68 | #define ADAU1701_SEROCTL_OLF512 0x0080 |
| 69 | #define ADAU1701_SEROCTL_OLF256 0x0100 |
| 70 | #define ADAU1701_SEROCTL_OLF_MASK 0x0180 |
| 71 | |
| 72 | #define ADAU1701_SEROCTL_MSB_DEALY1 0x0000 |
| 73 | #define ADAU1701_SEROCTL_MSB_DEALY0 0x0004 |
| 74 | #define ADAU1701_SEROCTL_MSB_DEALY8 0x0008 |
| 75 | #define ADAU1701_SEROCTL_MSB_DEALY12 0x000c |
| 76 | #define ADAU1701_SEROCTL_MSB_DEALY16 0x0010 |
| 77 | #define ADAU1701_SEROCTL_MSB_DEALY_MASK 0x001c |
| 78 | |
| 79 | #define ADAU1701_SEROCTL_WORD_LEN_24 0x0000 |
| 80 | #define ADAU1701_SEROCTL_WORD_LEN_20 0x0001 |
Lars-Peter Clausen | e20970a | 2014-01-08 11:22:25 +0100 | [diff] [blame] | 81 | #define ADAU1701_SEROCTL_WORD_LEN_16 0x0002 |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 82 | #define ADAU1701_SEROCTL_WORD_LEN_MASK 0x0003 |
| 83 | |
| 84 | #define ADAU1701_AUXNPOW_VBPD 0x40 |
| 85 | #define ADAU1701_AUXNPOW_VRPD 0x20 |
| 86 | |
| 87 | #define ADAU1701_SERICTL_I2S 0 |
| 88 | #define ADAU1701_SERICTL_LEFTJ 1 |
| 89 | #define ADAU1701_SERICTL_TDM 2 |
| 90 | #define ADAU1701_SERICTL_RIGHTJ_24 3 |
| 91 | #define ADAU1701_SERICTL_RIGHTJ_20 4 |
| 92 | #define ADAU1701_SERICTL_RIGHTJ_18 5 |
| 93 | #define ADAU1701_SERICTL_RIGHTJ_16 6 |
| 94 | #define ADAU1701_SERICTL_MODE_MASK 7 |
| 95 | #define ADAU1701_SERICTL_INV_BCLK BIT(3) |
| 96 | #define ADAU1701_SERICTL_INV_LRCLK BIT(4) |
| 97 | |
| 98 | #define ADAU1701_OSCIPOW_OPD 0x04 |
| 99 | #define ADAU1701_DACSET_DACINIT 1 |
| 100 | |
Dan Carpenter | ba51cbb | 2013-07-25 19:40:17 +0300 | [diff] [blame] | 101 | #define ADAU1707_CLKDIV_UNSET (-1U) |
Daniel Mack | 2352d4b | 2013-06-24 16:31:30 +0200 | [diff] [blame] | 102 | |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 103 | #define ADAU1701_FIRMWARE "adau1701.bin" |
| 104 | |
Pascal Huerst | 64fcc1f | 2015-04-20 11:12:03 +0200 | [diff] [blame] | 105 | static const char * const supply_names[] = { |
| 106 | "dvdd", "avdd" |
| 107 | }; |
| 108 | |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 109 | struct adau1701 { |
Daniel Mack | f724ba3 | 2013-06-07 13:53:04 +0200 | [diff] [blame] | 110 | int gpio_nreset; |
Daniel Mack | 2352d4b | 2013-06-24 16:31:30 +0200 | [diff] [blame] | 111 | int gpio_pll_mode[2]; |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 112 | unsigned int dai_fmt; |
Daniel Mack | 2352d4b | 2013-06-24 16:31:30 +0200 | [diff] [blame] | 113 | unsigned int pll_clkdiv; |
| 114 | unsigned int sysclk; |
Daniel Mack | 45405d5 | 2013-06-24 16:31:31 +0200 | [diff] [blame] | 115 | struct regmap *regmap; |
Lars-Peter Clausen | a3a1ec6 | 2014-11-19 18:29:07 +0100 | [diff] [blame] | 116 | struct i2c_client *client; |
Daniel Mack | 97d0a86 | 2013-06-24 16:31:32 +0200 | [diff] [blame] | 117 | u8 pin_config[12]; |
Lars-Peter Clausen | d48b088 | 2014-11-19 18:29:05 +0100 | [diff] [blame] | 118 | |
| 119 | struct sigmadsp *sigmadsp; |
Pascal Huerst | 64fcc1f | 2015-04-20 11:12:03 +0200 | [diff] [blame] | 120 | struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)]; |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 121 | }; |
| 122 | |
| 123 | static const struct snd_kcontrol_new adau1701_controls[] = { |
| 124 | SOC_SINGLE("Master Capture Switch", ADAU1701_DSPCTRL, 4, 1, 0), |
| 125 | }; |
| 126 | |
| 127 | static const struct snd_soc_dapm_widget adau1701_dapm_widgets[] = { |
| 128 | SND_SOC_DAPM_DAC("DAC0", "Playback", ADAU1701_AUXNPOW, 3, 1), |
| 129 | SND_SOC_DAPM_DAC("DAC1", "Playback", ADAU1701_AUXNPOW, 2, 1), |
| 130 | SND_SOC_DAPM_DAC("DAC2", "Playback", ADAU1701_AUXNPOW, 1, 1), |
| 131 | SND_SOC_DAPM_DAC("DAC3", "Playback", ADAU1701_AUXNPOW, 0, 1), |
| 132 | SND_SOC_DAPM_ADC("ADC", "Capture", ADAU1701_AUXNPOW, 7, 1), |
| 133 | |
| 134 | SND_SOC_DAPM_OUTPUT("OUT0"), |
| 135 | SND_SOC_DAPM_OUTPUT("OUT1"), |
| 136 | SND_SOC_DAPM_OUTPUT("OUT2"), |
| 137 | SND_SOC_DAPM_OUTPUT("OUT3"), |
| 138 | SND_SOC_DAPM_INPUT("IN0"), |
| 139 | SND_SOC_DAPM_INPUT("IN1"), |
| 140 | }; |
| 141 | |
| 142 | static const struct snd_soc_dapm_route adau1701_dapm_routes[] = { |
| 143 | { "OUT0", NULL, "DAC0" }, |
| 144 | { "OUT1", NULL, "DAC1" }, |
| 145 | { "OUT2", NULL, "DAC2" }, |
| 146 | { "OUT3", NULL, "DAC3" }, |
| 147 | |
| 148 | { "ADC", NULL, "IN0" }, |
| 149 | { "ADC", NULL, "IN1" }, |
| 150 | }; |
| 151 | |
Daniel Mack | 45405d5 | 2013-06-24 16:31:31 +0200 | [diff] [blame] | 152 | static unsigned int adau1701_register_size(struct device *dev, |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 153 | unsigned int reg) |
| 154 | { |
| 155 | switch (reg) { |
Daniel Mack | 97d0a86 | 2013-06-24 16:31:32 +0200 | [diff] [blame] | 156 | case ADAU1701_PINCONF_0: |
| 157 | case ADAU1701_PINCONF_1: |
| 158 | return 3; |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 159 | case ADAU1701_DSPCTRL: |
| 160 | case ADAU1701_SEROCTL: |
| 161 | case ADAU1701_AUXNPOW: |
| 162 | case ADAU1701_OSCIPOW: |
| 163 | case ADAU1701_DACSET: |
| 164 | return 2; |
| 165 | case ADAU1701_SERICTL: |
| 166 | return 1; |
| 167 | } |
| 168 | |
Daniel Mack | 45405d5 | 2013-06-24 16:31:31 +0200 | [diff] [blame] | 169 | dev_err(dev, "Unsupported register address: %d\n", reg); |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 170 | return 0; |
| 171 | } |
| 172 | |
Daniel Mack | 45405d5 | 2013-06-24 16:31:31 +0200 | [diff] [blame] | 173 | static bool adau1701_volatile_reg(struct device *dev, unsigned int reg) |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 174 | { |
Daniel Mack | 45405d5 | 2013-06-24 16:31:31 +0200 | [diff] [blame] | 175 | switch (reg) { |
| 176 | case ADAU1701_DACSET: |
Lars-Peter Clausen | a3a1ec6 | 2014-11-19 18:29:07 +0100 | [diff] [blame] | 177 | case ADAU1701_DSPCTRL: |
Daniel Mack | 45405d5 | 2013-06-24 16:31:31 +0200 | [diff] [blame] | 178 | return true; |
| 179 | default: |
| 180 | return false; |
| 181 | } |
| 182 | } |
| 183 | |
| 184 | static int adau1701_reg_write(void *context, unsigned int reg, |
| 185 | unsigned int value) |
| 186 | { |
| 187 | struct i2c_client *client = context; |
Dan Carpenter | c209740 | 2011-06-20 10:11:25 +0300 | [diff] [blame] | 188 | unsigned int i; |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 189 | unsigned int size; |
Daniel Mack | 97d0a86 | 2013-06-24 16:31:32 +0200 | [diff] [blame] | 190 | uint8_t buf[5]; |
Dan Carpenter | c209740 | 2011-06-20 10:11:25 +0300 | [diff] [blame] | 191 | int ret; |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 192 | |
Daniel Mack | 45405d5 | 2013-06-24 16:31:31 +0200 | [diff] [blame] | 193 | size = adau1701_register_size(&client->dev, reg); |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 194 | if (size == 0) |
| 195 | return -EINVAL; |
| 196 | |
Daniel Mack | 45405d5 | 2013-06-24 16:31:31 +0200 | [diff] [blame] | 197 | buf[0] = reg >> 8; |
| 198 | buf[1] = reg & 0xff; |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 199 | |
| 200 | for (i = size + 1; i >= 2; --i) { |
| 201 | buf[i] = value; |
| 202 | value >>= 8; |
| 203 | } |
| 204 | |
Daniel Mack | 45405d5 | 2013-06-24 16:31:31 +0200 | [diff] [blame] | 205 | ret = i2c_master_send(client, buf, size + 2); |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 206 | if (ret == size + 2) |
| 207 | return 0; |
| 208 | else if (ret < 0) |
| 209 | return ret; |
| 210 | else |
| 211 | return -EIO; |
| 212 | } |
| 213 | |
Daniel Mack | 45405d5 | 2013-06-24 16:31:31 +0200 | [diff] [blame] | 214 | static int adau1701_reg_read(void *context, unsigned int reg, |
| 215 | unsigned int *value) |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 216 | { |
Daniel Mack | 45405d5 | 2013-06-24 16:31:31 +0200 | [diff] [blame] | 217 | int ret; |
| 218 | unsigned int i; |
| 219 | unsigned int size; |
| 220 | uint8_t send_buf[2], recv_buf[3]; |
| 221 | struct i2c_client *client = context; |
| 222 | struct i2c_msg msgs[2]; |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 223 | |
Daniel Mack | 45405d5 | 2013-06-24 16:31:31 +0200 | [diff] [blame] | 224 | size = adau1701_register_size(&client->dev, reg); |
| 225 | if (size == 0) |
| 226 | return -EINVAL; |
| 227 | |
| 228 | send_buf[0] = reg >> 8; |
| 229 | send_buf[1] = reg & 0xff; |
| 230 | |
| 231 | msgs[0].addr = client->addr; |
| 232 | msgs[0].len = sizeof(send_buf); |
| 233 | msgs[0].buf = send_buf; |
| 234 | msgs[0].flags = 0; |
| 235 | |
| 236 | msgs[1].addr = client->addr; |
| 237 | msgs[1].len = size; |
| 238 | msgs[1].buf = recv_buf; |
| 239 | msgs[1].flags = I2C_M_RD; |
| 240 | |
| 241 | ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); |
| 242 | if (ret < 0) |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 243 | return ret; |
Daniel Mack | 45405d5 | 2013-06-24 16:31:31 +0200 | [diff] [blame] | 244 | else if (ret != ARRAY_SIZE(msgs)) |
| 245 | return -EIO; |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 246 | |
Daniel Mack | 45405d5 | 2013-06-24 16:31:31 +0200 | [diff] [blame] | 247 | *value = 0; |
| 248 | |
Daniel Mack | 3ad80b8 | 2014-07-03 16:51:36 +0200 | [diff] [blame] | 249 | for (i = 0; i < size; i++) { |
| 250 | *value <<= 8; |
| 251 | *value |= recv_buf[i]; |
| 252 | } |
Daniel Mack | 45405d5 | 2013-06-24 16:31:31 +0200 | [diff] [blame] | 253 | |
| 254 | return 0; |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 255 | } |
| 256 | |
Lars-Peter Clausen | a3a1ec6 | 2014-11-19 18:29:07 +0100 | [diff] [blame] | 257 | static int adau1701_safeload(struct sigmadsp *sigmadsp, unsigned int addr, |
| 258 | const uint8_t bytes[], size_t len) |
| 259 | { |
| 260 | struct i2c_client *client = to_i2c_client(sigmadsp->dev); |
| 261 | struct adau1701 *adau1701 = i2c_get_clientdata(client); |
| 262 | unsigned int val; |
| 263 | unsigned int i; |
| 264 | uint8_t buf[10]; |
| 265 | int ret; |
| 266 | |
| 267 | ret = regmap_read(adau1701->regmap, ADAU1701_DSPCTRL, &val); |
| 268 | if (ret) |
| 269 | return ret; |
| 270 | |
| 271 | if (val & ADAU1701_DSPCTRL_IST) |
| 272 | msleep(50); |
| 273 | |
| 274 | for (i = 0; i < len / 4; i++) { |
| 275 | put_unaligned_le16(ADAU1701_SAFELOAD_DATA(i), buf); |
| 276 | buf[2] = 0x00; |
| 277 | memcpy(buf + 3, bytes + i * 4, 4); |
| 278 | ret = i2c_master_send(client, buf, 7); |
| 279 | if (ret < 0) |
| 280 | return ret; |
| 281 | else if (ret != 7) |
| 282 | return -EIO; |
| 283 | |
| 284 | put_unaligned_le16(ADAU1701_SAFELOAD_ADDR(i), buf); |
| 285 | put_unaligned_le16(addr + i, buf + 2); |
| 286 | ret = i2c_master_send(client, buf, 4); |
| 287 | if (ret < 0) |
| 288 | return ret; |
| 289 | else if (ret != 4) |
| 290 | return -EIO; |
| 291 | } |
| 292 | |
| 293 | return regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL, |
| 294 | ADAU1701_DSPCTRL_IST, ADAU1701_DSPCTRL_IST); |
| 295 | } |
| 296 | |
| 297 | static const struct sigmadsp_ops adau1701_sigmadsp_ops = { |
| 298 | .safeload = adau1701_safeload, |
| 299 | }; |
| 300 | |
Lars-Peter Clausen | d48b088 | 2014-11-19 18:29:05 +0100 | [diff] [blame] | 301 | static int adau1701_reset(struct snd_soc_codec *codec, unsigned int clkdiv, |
| 302 | unsigned int rate) |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 303 | { |
Daniel Mack | f724ba3 | 2013-06-07 13:53:04 +0200 | [diff] [blame] | 304 | struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); |
Daniel Mack | de9fc72 | 2013-06-24 16:31:29 +0200 | [diff] [blame] | 305 | int ret; |
Daniel Mack | f724ba3 | 2013-06-07 13:53:04 +0200 | [diff] [blame] | 306 | |
Lars-Peter Clausen | d48b088 | 2014-11-19 18:29:05 +0100 | [diff] [blame] | 307 | sigmadsp_reset(adau1701->sigmadsp); |
| 308 | |
Daniel Mack | 2352d4b | 2013-06-24 16:31:30 +0200 | [diff] [blame] | 309 | if (clkdiv != ADAU1707_CLKDIV_UNSET && |
| 310 | gpio_is_valid(adau1701->gpio_pll_mode[0]) && |
| 311 | gpio_is_valid(adau1701->gpio_pll_mode[1])) { |
| 312 | switch (clkdiv) { |
| 313 | case 64: |
Mark Brown | 9190aeb | 2013-08-11 15:07:36 +0100 | [diff] [blame] | 314 | gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 0); |
| 315 | gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 0); |
Daniel Mack | 2352d4b | 2013-06-24 16:31:30 +0200 | [diff] [blame] | 316 | break; |
| 317 | case 256: |
Mark Brown | 9190aeb | 2013-08-11 15:07:36 +0100 | [diff] [blame] | 318 | gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 0); |
| 319 | gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 1); |
Daniel Mack | 2352d4b | 2013-06-24 16:31:30 +0200 | [diff] [blame] | 320 | break; |
| 321 | case 384: |
Mark Brown | 9190aeb | 2013-08-11 15:07:36 +0100 | [diff] [blame] | 322 | gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 1); |
| 323 | gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 0); |
Daniel Mack | 2352d4b | 2013-06-24 16:31:30 +0200 | [diff] [blame] | 324 | break; |
| 325 | case 0: /* fallback */ |
| 326 | case 512: |
Mark Brown | 9190aeb | 2013-08-11 15:07:36 +0100 | [diff] [blame] | 327 | gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 1); |
| 328 | gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 1); |
Daniel Mack | 2352d4b | 2013-06-24 16:31:30 +0200 | [diff] [blame] | 329 | break; |
| 330 | } |
| 331 | } |
| 332 | |
| 333 | adau1701->pll_clkdiv = clkdiv; |
| 334 | |
Daniel Mack | de9fc72 | 2013-06-24 16:31:29 +0200 | [diff] [blame] | 335 | if (gpio_is_valid(adau1701->gpio_nreset)) { |
Mark Brown | 9190aeb | 2013-08-11 15:07:36 +0100 | [diff] [blame] | 336 | gpio_set_value_cansleep(adau1701->gpio_nreset, 0); |
Daniel Mack | de9fc72 | 2013-06-24 16:31:29 +0200 | [diff] [blame] | 337 | /* minimum reset time is 20ns */ |
| 338 | udelay(1); |
Mark Brown | 9190aeb | 2013-08-11 15:07:36 +0100 | [diff] [blame] | 339 | gpio_set_value_cansleep(adau1701->gpio_nreset, 1); |
Daniel Mack | de9fc72 | 2013-06-24 16:31:29 +0200 | [diff] [blame] | 340 | /* power-up time may be as long as 85ms */ |
| 341 | mdelay(85); |
| 342 | } |
Daniel Mack | f724ba3 | 2013-06-07 13:53:04 +0200 | [diff] [blame] | 343 | |
Daniel Mack | 2352d4b | 2013-06-24 16:31:30 +0200 | [diff] [blame] | 344 | /* |
| 345 | * Postpone the firmware download to a point in time when we |
| 346 | * know the correct PLL setup |
| 347 | */ |
| 348 | if (clkdiv != ADAU1707_CLKDIV_UNSET) { |
Lars-Peter Clausen | d48b088 | 2014-11-19 18:29:05 +0100 | [diff] [blame] | 349 | ret = sigmadsp_setup(adau1701->sigmadsp, rate); |
Daniel Mack | 2352d4b | 2013-06-24 16:31:30 +0200 | [diff] [blame] | 350 | if (ret) { |
| 351 | dev_warn(codec->dev, "Failed to load firmware\n"); |
| 352 | return ret; |
| 353 | } |
Daniel Mack | f724ba3 | 2013-06-07 13:53:04 +0200 | [diff] [blame] | 354 | } |
| 355 | |
Daniel Mack | 45405d5 | 2013-06-24 16:31:31 +0200 | [diff] [blame] | 356 | regmap_write(adau1701->regmap, ADAU1701_DACSET, ADAU1701_DACSET_DACINIT); |
| 357 | regmap_write(adau1701->regmap, ADAU1701_DSPCTRL, ADAU1701_DSPCTRL_CR); |
| 358 | |
| 359 | regcache_mark_dirty(adau1701->regmap); |
| 360 | regcache_sync(adau1701->regmap); |
Daniel Mack | f724ba3 | 2013-06-07 13:53:04 +0200 | [diff] [blame] | 361 | |
| 362 | return 0; |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 363 | } |
| 364 | |
| 365 | static int adau1701_set_capture_pcm_format(struct snd_soc_codec *codec, |
Mark Brown | 9b58e71 | 2014-01-08 18:50:25 +0000 | [diff] [blame] | 366 | struct snd_pcm_hw_params *params) |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 367 | { |
| 368 | struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); |
| 369 | unsigned int mask = ADAU1701_SEROCTL_WORD_LEN_MASK; |
| 370 | unsigned int val; |
| 371 | |
Mark Brown | 9b58e71 | 2014-01-08 18:50:25 +0000 | [diff] [blame] | 372 | switch (params_width(params)) { |
| 373 | case 16: |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 374 | val = ADAU1701_SEROCTL_WORD_LEN_16; |
| 375 | break; |
Mark Brown | 9b58e71 | 2014-01-08 18:50:25 +0000 | [diff] [blame] | 376 | case 20: |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 377 | val = ADAU1701_SEROCTL_WORD_LEN_20; |
| 378 | break; |
Mark Brown | 9b58e71 | 2014-01-08 18:50:25 +0000 | [diff] [blame] | 379 | case 24: |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 380 | val = ADAU1701_SEROCTL_WORD_LEN_24; |
| 381 | break; |
| 382 | default: |
| 383 | return -EINVAL; |
| 384 | } |
| 385 | |
| 386 | if (adau1701->dai_fmt == SND_SOC_DAIFMT_RIGHT_J) { |
Mark Brown | 9b58e71 | 2014-01-08 18:50:25 +0000 | [diff] [blame] | 387 | switch (params_width(params)) { |
| 388 | case 16: |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 389 | val |= ADAU1701_SEROCTL_MSB_DEALY16; |
| 390 | break; |
Mark Brown | 9b58e71 | 2014-01-08 18:50:25 +0000 | [diff] [blame] | 391 | case 20: |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 392 | val |= ADAU1701_SEROCTL_MSB_DEALY12; |
| 393 | break; |
Mark Brown | 9b58e71 | 2014-01-08 18:50:25 +0000 | [diff] [blame] | 394 | case 24: |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 395 | val |= ADAU1701_SEROCTL_MSB_DEALY8; |
| 396 | break; |
| 397 | } |
| 398 | mask |= ADAU1701_SEROCTL_MSB_DEALY_MASK; |
| 399 | } |
| 400 | |
Daniel Mack | ee44114 | 2013-06-27 22:00:04 +0200 | [diff] [blame] | 401 | regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL, mask, val); |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 402 | |
| 403 | return 0; |
| 404 | } |
| 405 | |
| 406 | static int adau1701_set_playback_pcm_format(struct snd_soc_codec *codec, |
Mark Brown | 9b58e71 | 2014-01-08 18:50:25 +0000 | [diff] [blame] | 407 | struct snd_pcm_hw_params *params) |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 408 | { |
| 409 | struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); |
| 410 | unsigned int val; |
| 411 | |
| 412 | if (adau1701->dai_fmt != SND_SOC_DAIFMT_RIGHT_J) |
| 413 | return 0; |
| 414 | |
Mark Brown | 9b58e71 | 2014-01-08 18:50:25 +0000 | [diff] [blame] | 415 | switch (params_width(params)) { |
| 416 | case 16: |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 417 | val = ADAU1701_SERICTL_RIGHTJ_16; |
| 418 | break; |
Mark Brown | 9b58e71 | 2014-01-08 18:50:25 +0000 | [diff] [blame] | 419 | case 20: |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 420 | val = ADAU1701_SERICTL_RIGHTJ_20; |
| 421 | break; |
Mark Brown | 9b58e71 | 2014-01-08 18:50:25 +0000 | [diff] [blame] | 422 | case 24: |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 423 | val = ADAU1701_SERICTL_RIGHTJ_24; |
| 424 | break; |
| 425 | default: |
| 426 | return -EINVAL; |
| 427 | } |
| 428 | |
Daniel Mack | ee44114 | 2013-06-27 22:00:04 +0200 | [diff] [blame] | 429 | regmap_update_bits(adau1701->regmap, ADAU1701_SERICTL, |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 430 | ADAU1701_SERICTL_MODE_MASK, val); |
| 431 | |
| 432 | return 0; |
| 433 | } |
| 434 | |
| 435 | static int adau1701_hw_params(struct snd_pcm_substream *substream, |
| 436 | struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) |
| 437 | { |
Mark Brown | e6968a1 | 2012-04-04 15:58:16 +0100 | [diff] [blame] | 438 | struct snd_soc_codec *codec = dai->codec; |
Daniel Mack | 2352d4b | 2013-06-24 16:31:30 +0200 | [diff] [blame] | 439 | struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); |
| 440 | unsigned int clkdiv = adau1701->sysclk / params_rate(params); |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 441 | unsigned int val; |
Daniel Mack | 2352d4b | 2013-06-24 16:31:30 +0200 | [diff] [blame] | 442 | int ret; |
| 443 | |
| 444 | /* |
| 445 | * If the mclk/lrclk ratio changes, the chip needs updated PLL |
| 446 | * mode GPIO settings, and a full reset cycle, including a new |
| 447 | * firmware upload. |
| 448 | */ |
| 449 | if (clkdiv != adau1701->pll_clkdiv) { |
Lars-Peter Clausen | d48b088 | 2014-11-19 18:29:05 +0100 | [diff] [blame] | 450 | ret = adau1701_reset(codec, clkdiv, params_rate(params)); |
Daniel Mack | 2352d4b | 2013-06-24 16:31:30 +0200 | [diff] [blame] | 451 | if (ret < 0) |
| 452 | return ret; |
| 453 | } |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 454 | |
| 455 | switch (params_rate(params)) { |
| 456 | case 192000: |
| 457 | val = ADAU1701_DSPCTRL_SR_192; |
| 458 | break; |
| 459 | case 96000: |
| 460 | val = ADAU1701_DSPCTRL_SR_96; |
| 461 | break; |
| 462 | case 48000: |
| 463 | val = ADAU1701_DSPCTRL_SR_48; |
| 464 | break; |
| 465 | default: |
| 466 | return -EINVAL; |
| 467 | } |
| 468 | |
Daniel Mack | ee44114 | 2013-06-27 22:00:04 +0200 | [diff] [blame] | 469 | regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL, |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 470 | ADAU1701_DSPCTRL_SR_MASK, val); |
| 471 | |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 472 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
Mark Brown | 9b58e71 | 2014-01-08 18:50:25 +0000 | [diff] [blame] | 473 | return adau1701_set_playback_pcm_format(codec, params); |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 474 | else |
Mark Brown | 9b58e71 | 2014-01-08 18:50:25 +0000 | [diff] [blame] | 475 | return adau1701_set_capture_pcm_format(codec, params); |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 476 | } |
| 477 | |
| 478 | static int adau1701_set_dai_fmt(struct snd_soc_dai *codec_dai, |
| 479 | unsigned int fmt) |
| 480 | { |
| 481 | struct snd_soc_codec *codec = codec_dai->codec; |
| 482 | struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); |
| 483 | unsigned int serictl = 0x00, seroctl = 0x00; |
| 484 | bool invert_lrclk; |
| 485 | |
| 486 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
| 487 | case SND_SOC_DAIFMT_CBM_CFM: |
| 488 | /* master, 64-bits per sample, 1 frame per sample */ |
| 489 | seroctl |= ADAU1701_SEROCTL_MASTER | ADAU1701_SEROCTL_OBF16 |
| 490 | | ADAU1701_SEROCTL_OLF1024; |
| 491 | break; |
| 492 | case SND_SOC_DAIFMT_CBS_CFS: |
| 493 | break; |
| 494 | default: |
| 495 | return -EINVAL; |
| 496 | } |
| 497 | |
| 498 | /* clock inversion */ |
| 499 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { |
| 500 | case SND_SOC_DAIFMT_NB_NF: |
| 501 | invert_lrclk = false; |
| 502 | break; |
| 503 | case SND_SOC_DAIFMT_NB_IF: |
| 504 | invert_lrclk = true; |
| 505 | break; |
| 506 | case SND_SOC_DAIFMT_IB_NF: |
| 507 | invert_lrclk = false; |
| 508 | serictl |= ADAU1701_SERICTL_INV_BCLK; |
| 509 | seroctl |= ADAU1701_SEROCTL_INV_BCLK; |
| 510 | break; |
| 511 | case SND_SOC_DAIFMT_IB_IF: |
| 512 | invert_lrclk = true; |
| 513 | serictl |= ADAU1701_SERICTL_INV_BCLK; |
| 514 | seroctl |= ADAU1701_SEROCTL_INV_BCLK; |
| 515 | break; |
| 516 | default: |
| 517 | return -EINVAL; |
| 518 | } |
| 519 | |
| 520 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
| 521 | case SND_SOC_DAIFMT_I2S: |
| 522 | break; |
| 523 | case SND_SOC_DAIFMT_LEFT_J: |
| 524 | serictl |= ADAU1701_SERICTL_LEFTJ; |
| 525 | seroctl |= ADAU1701_SEROCTL_MSB_DEALY0; |
| 526 | invert_lrclk = !invert_lrclk; |
| 527 | break; |
| 528 | case SND_SOC_DAIFMT_RIGHT_J: |
| 529 | serictl |= ADAU1701_SERICTL_RIGHTJ_24; |
| 530 | seroctl |= ADAU1701_SEROCTL_MSB_DEALY8; |
| 531 | invert_lrclk = !invert_lrclk; |
| 532 | break; |
| 533 | default: |
| 534 | return -EINVAL; |
| 535 | } |
| 536 | |
| 537 | if (invert_lrclk) { |
| 538 | seroctl |= ADAU1701_SEROCTL_INV_LRCLK; |
| 539 | serictl |= ADAU1701_SERICTL_INV_LRCLK; |
| 540 | } |
| 541 | |
| 542 | adau1701->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK; |
| 543 | |
Daniel Mack | 45405d5 | 2013-06-24 16:31:31 +0200 | [diff] [blame] | 544 | regmap_write(adau1701->regmap, ADAU1701_SERICTL, serictl); |
| 545 | regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL, |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 546 | ~ADAU1701_SEROCTL_WORD_LEN_MASK, seroctl); |
| 547 | |
| 548 | return 0; |
| 549 | } |
| 550 | |
| 551 | static int adau1701_set_bias_level(struct snd_soc_codec *codec, |
| 552 | enum snd_soc_bias_level level) |
| 553 | { |
| 554 | unsigned int mask = ADAU1701_AUXNPOW_VBPD | ADAU1701_AUXNPOW_VRPD; |
Daniel Mack | ee44114 | 2013-06-27 22:00:04 +0200 | [diff] [blame] | 555 | struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 556 | |
| 557 | switch (level) { |
| 558 | case SND_SOC_BIAS_ON: |
| 559 | break; |
| 560 | case SND_SOC_BIAS_PREPARE: |
| 561 | break; |
| 562 | case SND_SOC_BIAS_STANDBY: |
| 563 | /* Enable VREF and VREF buffer */ |
Daniel Mack | ee44114 | 2013-06-27 22:00:04 +0200 | [diff] [blame] | 564 | regmap_update_bits(adau1701->regmap, |
| 565 | ADAU1701_AUXNPOW, mask, 0x00); |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 566 | break; |
| 567 | case SND_SOC_BIAS_OFF: |
| 568 | /* Disable VREF and VREF buffer */ |
Daniel Mack | ee44114 | 2013-06-27 22:00:04 +0200 | [diff] [blame] | 569 | regmap_update_bits(adau1701->regmap, |
| 570 | ADAU1701_AUXNPOW, mask, mask); |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 571 | break; |
| 572 | } |
| 573 | |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 574 | return 0; |
| 575 | } |
| 576 | |
| 577 | static int adau1701_digital_mute(struct snd_soc_dai *dai, int mute) |
| 578 | { |
| 579 | struct snd_soc_codec *codec = dai->codec; |
| 580 | unsigned int mask = ADAU1701_DSPCTRL_DAM; |
Daniel Mack | ee44114 | 2013-06-27 22:00:04 +0200 | [diff] [blame] | 581 | struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 582 | unsigned int val; |
| 583 | |
| 584 | if (mute) |
| 585 | val = 0; |
| 586 | else |
| 587 | val = mask; |
| 588 | |
Daniel Mack | ee44114 | 2013-06-27 22:00:04 +0200 | [diff] [blame] | 589 | regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL, mask, val); |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 590 | |
| 591 | return 0; |
| 592 | } |
| 593 | |
| 594 | static int adau1701_set_sysclk(struct snd_soc_codec *codec, int clk_id, |
Axel Lin | 21326db | 2011-09-28 13:48:35 +0800 | [diff] [blame] | 595 | int source, unsigned int freq, int dir) |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 596 | { |
| 597 | unsigned int val; |
Daniel Mack | 2352d4b | 2013-06-24 16:31:30 +0200 | [diff] [blame] | 598 | struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 599 | |
| 600 | switch (clk_id) { |
| 601 | case ADAU1701_CLK_SRC_OSC: |
| 602 | val = 0x0; |
| 603 | break; |
| 604 | case ADAU1701_CLK_SRC_MCLK: |
| 605 | val = ADAU1701_OSCIPOW_OPD; |
| 606 | break; |
| 607 | default: |
| 608 | return -EINVAL; |
| 609 | } |
| 610 | |
Daniel Mack | ee44114 | 2013-06-27 22:00:04 +0200 | [diff] [blame] | 611 | regmap_update_bits(adau1701->regmap, ADAU1701_OSCIPOW, |
| 612 | ADAU1701_OSCIPOW_OPD, val); |
Daniel Mack | 2352d4b | 2013-06-24 16:31:30 +0200 | [diff] [blame] | 613 | adau1701->sysclk = freq; |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 614 | |
| 615 | return 0; |
| 616 | } |
| 617 | |
Lars-Peter Clausen | d48b088 | 2014-11-19 18:29:05 +0100 | [diff] [blame] | 618 | static int adau1701_startup(struct snd_pcm_substream *substream, |
| 619 | struct snd_soc_dai *dai) |
| 620 | { |
| 621 | struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(dai->codec); |
| 622 | |
| 623 | return sigmadsp_restrict_params(adau1701->sigmadsp, substream); |
| 624 | } |
| 625 | |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 626 | #define ADAU1701_RATES (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | \ |
| 627 | SNDRV_PCM_RATE_192000) |
| 628 | |
| 629 | #define ADAU1701_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ |
| 630 | SNDRV_PCM_FMTBIT_S24_LE) |
| 631 | |
Lars-Peter Clausen | 890754a | 2011-11-23 14:11:21 +0100 | [diff] [blame] | 632 | static const struct snd_soc_dai_ops adau1701_dai_ops = { |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 633 | .set_fmt = adau1701_set_dai_fmt, |
| 634 | .hw_params = adau1701_hw_params, |
| 635 | .digital_mute = adau1701_digital_mute, |
Lars-Peter Clausen | d48b088 | 2014-11-19 18:29:05 +0100 | [diff] [blame] | 636 | .startup = adau1701_startup, |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 637 | }; |
| 638 | |
| 639 | static struct snd_soc_dai_driver adau1701_dai = { |
| 640 | .name = "adau1701", |
| 641 | .playback = { |
| 642 | .stream_name = "Playback", |
| 643 | .channels_min = 2, |
| 644 | .channels_max = 8, |
| 645 | .rates = ADAU1701_RATES, |
| 646 | .formats = ADAU1701_FORMATS, |
| 647 | }, |
| 648 | .capture = { |
| 649 | .stream_name = "Capture", |
| 650 | .channels_min = 2, |
| 651 | .channels_max = 8, |
| 652 | .rates = ADAU1701_RATES, |
| 653 | .formats = ADAU1701_FORMATS, |
| 654 | }, |
| 655 | .ops = &adau1701_dai_ops, |
| 656 | .symmetric_rates = 1, |
| 657 | }; |
| 658 | |
Daniel Mack | 04561ea | 2013-05-23 15:46:05 +0200 | [diff] [blame] | 659 | #ifdef CONFIG_OF |
| 660 | static const struct of_device_id adau1701_dt_ids[] = { |
| 661 | { .compatible = "adi,adau1701", }, |
| 662 | { } |
| 663 | }; |
| 664 | MODULE_DEVICE_TABLE(of, adau1701_dt_ids); |
| 665 | #endif |
| 666 | |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 667 | static int adau1701_probe(struct snd_soc_codec *codec) |
| 668 | { |
Daniel Mack | 97d0a86 | 2013-06-24 16:31:32 +0200 | [diff] [blame] | 669 | int i, ret; |
| 670 | unsigned int val; |
Daniel Mack | 2352d4b | 2013-06-24 16:31:30 +0200 | [diff] [blame] | 671 | struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 672 | |
Lars-Peter Clausen | d48b088 | 2014-11-19 18:29:05 +0100 | [diff] [blame] | 673 | ret = sigmadsp_attach(adau1701->sigmadsp, &codec->component); |
| 674 | if (ret) |
| 675 | return ret; |
| 676 | |
Pascal Huerst | 64fcc1f | 2015-04-20 11:12:03 +0200 | [diff] [blame] | 677 | ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies), |
| 678 | adau1701->supplies); |
| 679 | if (ret < 0) { |
| 680 | dev_err(codec->dev, "Failed to enable regulators: %d\n", ret); |
| 681 | return ret; |
| 682 | } |
| 683 | |
Daniel Mack | 2352d4b | 2013-06-24 16:31:30 +0200 | [diff] [blame] | 684 | /* |
| 685 | * Let the pll_clkdiv variable default to something that won't happen |
| 686 | * at runtime. That way, we can postpone the firmware download from |
| 687 | * adau1701_reset() to a point in time when we know the correct PLL |
| 688 | * mode parameters. |
| 689 | */ |
| 690 | adau1701->pll_clkdiv = ADAU1707_CLKDIV_UNSET; |
| 691 | |
| 692 | /* initalize with pre-configured pll mode settings */ |
Lars-Peter Clausen | d48b088 | 2014-11-19 18:29:05 +0100 | [diff] [blame] | 693 | ret = adau1701_reset(codec, adau1701->pll_clkdiv, 0); |
Daniel Mack | 2352d4b | 2013-06-24 16:31:30 +0200 | [diff] [blame] | 694 | if (ret < 0) |
Pascal Huerst | 64fcc1f | 2015-04-20 11:12:03 +0200 | [diff] [blame] | 695 | goto exit_regulators_disable; |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 696 | |
Daniel Mack | 97d0a86 | 2013-06-24 16:31:32 +0200 | [diff] [blame] | 697 | /* set up pin config */ |
| 698 | val = 0; |
| 699 | for (i = 0; i < 6; i++) |
| 700 | val |= adau1701->pin_config[i] << (i * 4); |
| 701 | |
| 702 | regmap_write(adau1701->regmap, ADAU1701_PINCONF_0, val); |
| 703 | |
| 704 | val = 0; |
| 705 | for (i = 0; i < 6; i++) |
| 706 | val |= adau1701->pin_config[i + 6] << (i * 4); |
| 707 | |
| 708 | regmap_write(adau1701->regmap, ADAU1701_PINCONF_1, val); |
| 709 | |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 710 | return 0; |
Pascal Huerst | 64fcc1f | 2015-04-20 11:12:03 +0200 | [diff] [blame] | 711 | |
| 712 | exit_regulators_disable: |
| 713 | |
| 714 | regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies); |
| 715 | return ret; |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 716 | } |
| 717 | |
Pascal Huerst | 64fcc1f | 2015-04-20 11:12:03 +0200 | [diff] [blame] | 718 | static int adau1701_remove(struct snd_soc_codec *codec) |
| 719 | { |
| 720 | struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); |
| 721 | |
| 722 | if (gpio_is_valid(adau1701->gpio_nreset)) |
| 723 | gpio_set_value_cansleep(adau1701->gpio_nreset, 0); |
| 724 | |
| 725 | regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies); |
| 726 | |
| 727 | return 0; |
| 728 | } |
| 729 | |
| 730 | #ifdef CONFIG_PM |
| 731 | static int adau1701_suspend(struct snd_soc_codec *codec) |
| 732 | { |
| 733 | struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); |
| 734 | |
| 735 | regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), |
| 736 | adau1701->supplies); |
| 737 | |
| 738 | return 0; |
| 739 | } |
| 740 | |
| 741 | static int adau1701_resume(struct snd_soc_codec *codec) |
| 742 | { |
| 743 | struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); |
| 744 | int ret; |
| 745 | |
| 746 | ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies), |
| 747 | adau1701->supplies); |
| 748 | if (ret < 0) { |
| 749 | dev_err(codec->dev, "Failed to enable regulators: %d\n", ret); |
| 750 | return ret; |
| 751 | } |
| 752 | |
| 753 | return adau1701_reset(codec, adau1701->pll_clkdiv, 0); |
| 754 | } |
| 755 | #else |
| 756 | #define adau1701_resume NULL |
| 757 | #define adau1701_suspend NULL |
| 758 | #endif /* CONFIG_PM */ |
| 759 | |
Bhumika Goyal | a180ba4 | 2017-08-03 21:30:19 +0530 | [diff] [blame] | 760 | static const struct snd_soc_codec_driver adau1701_codec_drv = { |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 761 | .probe = adau1701_probe, |
Pascal Huerst | 64fcc1f | 2015-04-20 11:12:03 +0200 | [diff] [blame] | 762 | .remove = adau1701_remove, |
| 763 | .resume = adau1701_resume, |
| 764 | .suspend = adau1701_suspend, |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 765 | .set_bias_level = adau1701_set_bias_level, |
Axel Lin | eb3032f | 2012-01-27 18:02:09 +0800 | [diff] [blame] | 766 | .idle_bias_off = true, |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 767 | |
Kuninori Morimoto | 637591e | 2016-08-08 09:07:47 +0000 | [diff] [blame] | 768 | .component_driver = { |
| 769 | .controls = adau1701_controls, |
| 770 | .num_controls = ARRAY_SIZE(adau1701_controls), |
| 771 | .dapm_widgets = adau1701_dapm_widgets, |
| 772 | .num_dapm_widgets = ARRAY_SIZE(adau1701_dapm_widgets), |
| 773 | .dapm_routes = adau1701_dapm_routes, |
| 774 | .num_dapm_routes = ARRAY_SIZE(adau1701_dapm_routes), |
| 775 | }, |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 776 | .set_sysclk = adau1701_set_sysclk, |
| 777 | }; |
| 778 | |
Daniel Mack | 45405d5 | 2013-06-24 16:31:31 +0200 | [diff] [blame] | 779 | static const struct regmap_config adau1701_regmap = { |
| 780 | .reg_bits = 16, |
| 781 | .val_bits = 32, |
| 782 | .max_register = ADAU1701_MAX_REGISTER, |
| 783 | .cache_type = REGCACHE_RBTREE, |
| 784 | .volatile_reg = adau1701_volatile_reg, |
| 785 | .reg_write = adau1701_reg_write, |
| 786 | .reg_read = adau1701_reg_read, |
| 787 | }; |
| 788 | |
Bill Pemberton | 7a79e94 | 2012-12-07 09:26:37 -0500 | [diff] [blame] | 789 | static int adau1701_i2c_probe(struct i2c_client *client, |
| 790 | const struct i2c_device_id *id) |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 791 | { |
| 792 | struct adau1701 *adau1701; |
Daniel Mack | 04561ea | 2013-05-23 15:46:05 +0200 | [diff] [blame] | 793 | struct device *dev = &client->dev; |
| 794 | int gpio_nreset = -EINVAL; |
Daniel Mack | 2352d4b | 2013-06-24 16:31:30 +0200 | [diff] [blame] | 795 | int gpio_pll_mode[2] = { -EINVAL, -EINVAL }; |
Pascal Huerst | 64fcc1f | 2015-04-20 11:12:03 +0200 | [diff] [blame] | 796 | int ret, i; |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 797 | |
Daniel Mack | 04561ea | 2013-05-23 15:46:05 +0200 | [diff] [blame] | 798 | adau1701 = devm_kzalloc(dev, sizeof(*adau1701), GFP_KERNEL); |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 799 | if (!adau1701) |
| 800 | return -ENOMEM; |
| 801 | |
Pascal Huerst | 64fcc1f | 2015-04-20 11:12:03 +0200 | [diff] [blame] | 802 | for (i = 0; i < ARRAY_SIZE(supply_names); i++) |
| 803 | adau1701->supplies[i].supply = supply_names[i]; |
| 804 | |
| 805 | ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(adau1701->supplies), |
| 806 | adau1701->supplies); |
| 807 | if (ret < 0) { |
| 808 | dev_err(dev, "Failed to get regulators: %d\n", ret); |
| 809 | return ret; |
| 810 | } |
| 811 | |
| 812 | ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies), |
| 813 | adau1701->supplies); |
| 814 | if (ret < 0) { |
| 815 | dev_err(dev, "Failed to enable regulators: %d\n", ret); |
| 816 | return ret; |
| 817 | } |
| 818 | |
Lars-Peter Clausen | a3a1ec6 | 2014-11-19 18:29:07 +0100 | [diff] [blame] | 819 | adau1701->client = client; |
Daniel Mack | 45405d5 | 2013-06-24 16:31:31 +0200 | [diff] [blame] | 820 | adau1701->regmap = devm_regmap_init(dev, NULL, client, |
| 821 | &adau1701_regmap); |
Pascal Huerst | 64fcc1f | 2015-04-20 11:12:03 +0200 | [diff] [blame] | 822 | if (IS_ERR(adau1701->regmap)) { |
| 823 | ret = PTR_ERR(adau1701->regmap); |
| 824 | goto exit_regulators_disable; |
| 825 | } |
| 826 | |
Daniel Mack | 45405d5 | 2013-06-24 16:31:31 +0200 | [diff] [blame] | 827 | |
Daniel Mack | 04561ea | 2013-05-23 15:46:05 +0200 | [diff] [blame] | 828 | if (dev->of_node) { |
| 829 | gpio_nreset = of_get_named_gpio(dev->of_node, "reset-gpio", 0); |
Pascal Huerst | 64fcc1f | 2015-04-20 11:12:03 +0200 | [diff] [blame] | 830 | if (gpio_nreset < 0 && gpio_nreset != -ENOENT) { |
| 831 | ret = gpio_nreset; |
| 832 | goto exit_regulators_disable; |
| 833 | } |
Daniel Mack | 2352d4b | 2013-06-24 16:31:30 +0200 | [diff] [blame] | 834 | |
| 835 | gpio_pll_mode[0] = of_get_named_gpio(dev->of_node, |
| 836 | "adi,pll-mode-gpios", 0); |
Pascal Huerst | 64fcc1f | 2015-04-20 11:12:03 +0200 | [diff] [blame] | 837 | if (gpio_pll_mode[0] < 0 && gpio_pll_mode[0] != -ENOENT) { |
| 838 | ret = gpio_pll_mode[0]; |
| 839 | goto exit_regulators_disable; |
| 840 | } |
Daniel Mack | 2352d4b | 2013-06-24 16:31:30 +0200 | [diff] [blame] | 841 | |
| 842 | gpio_pll_mode[1] = of_get_named_gpio(dev->of_node, |
| 843 | "adi,pll-mode-gpios", 1); |
Pascal Huerst | 64fcc1f | 2015-04-20 11:12:03 +0200 | [diff] [blame] | 844 | if (gpio_pll_mode[1] < 0 && gpio_pll_mode[1] != -ENOENT) { |
| 845 | ret = gpio_pll_mode[1]; |
| 846 | goto exit_regulators_disable; |
| 847 | } |
Daniel Mack | 97d0a86 | 2013-06-24 16:31:32 +0200 | [diff] [blame] | 848 | |
| 849 | of_property_read_u32(dev->of_node, "adi,pll-clkdiv", |
| 850 | &adau1701->pll_clkdiv); |
| 851 | |
| 852 | of_property_read_u8_array(dev->of_node, "adi,pin-config", |
| 853 | adau1701->pin_config, |
| 854 | ARRAY_SIZE(adau1701->pin_config)); |
Daniel Mack | 04561ea | 2013-05-23 15:46:05 +0200 | [diff] [blame] | 855 | } |
| 856 | |
| 857 | if (gpio_is_valid(gpio_nreset)) { |
| 858 | ret = devm_gpio_request_one(dev, gpio_nreset, GPIOF_OUT_INIT_LOW, |
| 859 | "ADAU1701 Reset"); |
| 860 | if (ret < 0) |
Pascal Huerst | 64fcc1f | 2015-04-20 11:12:03 +0200 | [diff] [blame] | 861 | goto exit_regulators_disable; |
Daniel Mack | 04561ea | 2013-05-23 15:46:05 +0200 | [diff] [blame] | 862 | } |
| 863 | |
Daniel Mack | 2352d4b | 2013-06-24 16:31:30 +0200 | [diff] [blame] | 864 | if (gpio_is_valid(gpio_pll_mode[0]) && |
| 865 | gpio_is_valid(gpio_pll_mode[1])) { |
| 866 | ret = devm_gpio_request_one(dev, gpio_pll_mode[0], |
| 867 | GPIOF_OUT_INIT_LOW, |
| 868 | "ADAU1701 PLL mode 0"); |
| 869 | if (ret < 0) |
Pascal Huerst | 64fcc1f | 2015-04-20 11:12:03 +0200 | [diff] [blame] | 870 | goto exit_regulators_disable; |
Daniel Mack | 2352d4b | 2013-06-24 16:31:30 +0200 | [diff] [blame] | 871 | |
| 872 | ret = devm_gpio_request_one(dev, gpio_pll_mode[1], |
| 873 | GPIOF_OUT_INIT_LOW, |
| 874 | "ADAU1701 PLL mode 1"); |
| 875 | if (ret < 0) |
Pascal Huerst | 64fcc1f | 2015-04-20 11:12:03 +0200 | [diff] [blame] | 876 | goto exit_regulators_disable; |
Daniel Mack | 2352d4b | 2013-06-24 16:31:30 +0200 | [diff] [blame] | 877 | } |
| 878 | |
Daniel Mack | f724ba3 | 2013-06-07 13:53:04 +0200 | [diff] [blame] | 879 | adau1701->gpio_nreset = gpio_nreset; |
Daniel Mack | 2352d4b | 2013-06-24 16:31:30 +0200 | [diff] [blame] | 880 | adau1701->gpio_pll_mode[0] = gpio_pll_mode[0]; |
| 881 | adau1701->gpio_pll_mode[1] = gpio_pll_mode[1]; |
Daniel Mack | f724ba3 | 2013-06-07 13:53:04 +0200 | [diff] [blame] | 882 | |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 883 | i2c_set_clientdata(client, adau1701); |
Lars-Peter Clausen | d48b088 | 2014-11-19 18:29:05 +0100 | [diff] [blame] | 884 | |
Lars-Peter Clausen | a3a1ec6 | 2014-11-19 18:29:07 +0100 | [diff] [blame] | 885 | adau1701->sigmadsp = devm_sigmadsp_init_i2c(client, |
| 886 | &adau1701_sigmadsp_ops, ADAU1701_FIRMWARE); |
Pascal Huerst | 64fcc1f | 2015-04-20 11:12:03 +0200 | [diff] [blame] | 887 | if (IS_ERR(adau1701->sigmadsp)) { |
| 888 | ret = PTR_ERR(adau1701->sigmadsp); |
| 889 | goto exit_regulators_disable; |
| 890 | } |
Lars-Peter Clausen | d48b088 | 2014-11-19 18:29:05 +0100 | [diff] [blame] | 891 | |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 892 | ret = snd_soc_register_codec(&client->dev, &adau1701_codec_drv, |
| 893 | &adau1701_dai, 1); |
Pascal Huerst | 64fcc1f | 2015-04-20 11:12:03 +0200 | [diff] [blame] | 894 | |
| 895 | exit_regulators_disable: |
| 896 | |
| 897 | regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies); |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 898 | return ret; |
| 899 | } |
| 900 | |
Bill Pemberton | 7a79e94 | 2012-12-07 09:26:37 -0500 | [diff] [blame] | 901 | static int adau1701_i2c_remove(struct i2c_client *client) |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 902 | { |
| 903 | snd_soc_unregister_codec(&client->dev); |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 904 | return 0; |
| 905 | } |
| 906 | |
| 907 | static const struct i2c_device_id adau1701_i2c_id[] = { |
Lars-Peter Clausen | 96b9bc6 | 2013-07-22 18:49:53 +0200 | [diff] [blame] | 908 | { "adau1401", 0 }, |
| 909 | { "adau1401a", 0 }, |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 910 | { "adau1701", 0 }, |
Lars-Peter Clausen | 96b9bc6 | 2013-07-22 18:49:53 +0200 | [diff] [blame] | 911 | { "adau1702", 0 }, |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 912 | { } |
| 913 | }; |
| 914 | MODULE_DEVICE_TABLE(i2c, adau1701_i2c_id); |
| 915 | |
| 916 | static struct i2c_driver adau1701_i2c_driver = { |
| 917 | .driver = { |
| 918 | .name = "adau1701", |
Daniel Mack | 04561ea | 2013-05-23 15:46:05 +0200 | [diff] [blame] | 919 | .of_match_table = of_match_ptr(adau1701_dt_ids), |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 920 | }, |
| 921 | .probe = adau1701_i2c_probe, |
Bill Pemberton | 7a79e94 | 2012-12-07 09:26:37 -0500 | [diff] [blame] | 922 | .remove = adau1701_i2c_remove, |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 923 | .id_table = adau1701_i2c_id, |
| 924 | }; |
| 925 | |
Sachin Kamat | beb22de | 2012-08-06 17:25:45 +0530 | [diff] [blame] | 926 | module_i2c_driver(adau1701_i2c_driver); |
Lars-Peter Clausen | 631ed8a | 2011-06-13 15:26:20 +0200 | [diff] [blame] | 927 | |
| 928 | MODULE_DESCRIPTION("ASoC ADAU1701 SigmaDSP driver"); |
| 929 | MODULE_AUTHOR("Cliff Cai <cliff.cai@analog.com>"); |
| 930 | MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); |
| 931 | MODULE_LICENSE("GPL"); |