blob: 094e7e5ea39e00fb391e63364c9c2f5978ce9c57 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/**
2 * \file radeon_drv.c
3 * ATI Radeon driver
4 *
5 * \author Gareth Hughes <gareth@valinux.com>
6 */
7
8/*
9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10 * All Rights Reserved.
11 *
12 * Permission is hereby granted, free of charge, to any person obtaining a
13 * copy of this software and associated documentation files (the "Software"),
14 * to deal in the Software without restriction, including without limitation
15 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16 * and/or sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following conditions:
18 *
19 * The above copyright notice and this permission notice (including the next
20 * paragraph) shall be included in all copies or substantial portions of the
21 * Software.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29 * OTHER DEALINGS IN THE SOFTWARE.
30 */
31
David Howells760285e2012-10-02 18:01:07 +010032#include <drm/drmP.h>
33#include <drm/radeon_drm.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070034#include "radeon_drv.h"
35
David Howells760285e2012-10-02 18:01:07 +010036#include <drm/drm_pciids.h>
Jerome Glisse771fe6b2009-06-05 14:42:42 +020037#include <linux/console.h>
Paul Gortmakere0cd3602011-08-30 11:04:30 -040038#include <linux/module.h>
Jerome Glisse771fe6b2009-06-05 14:42:42 +020039
40
Jerome Glisse771fe6b2009-06-05 14:42:42 +020041/*
42 * KMS wrapper.
Dave Airlie0de1a572010-03-01 16:32:15 +100043 * - 2.0.0 - initial interface
44 * - 2.1.0 - add square tiling interface
Alex Deucherfdb43522010-03-26 15:24:14 -040045 * - 2.2.0 - add r6xx/r7xx const buffer support
Marek Olšákcae94b02010-02-21 21:24:15 +010046 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
Jerome Glissebc35afd2010-05-12 18:01:13 +020047 * - 2.4.0 - add crtc id query
Alex Deucher148a03b2010-06-03 19:00:03 -040048 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
Dave Airlieab9e1f52010-07-13 11:11:11 +100049 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
Alex Deucher71901cc2010-10-21 13:45:30 -040050 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
Alex Deucher58bbf012011-01-24 17:14:26 -050051 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
Dave Airlie486af182011-03-01 14:32:27 +100052 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
Alex Deucherb8709892011-07-27 04:17:25 +000053 * 2.10.0 - fusion 2D tiling
54 * 2.11.0 - backend map, initial compute support for the CS checker
Marek Olšáke70f2242011-10-25 01:38:45 +020055 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
Marek Olšákdd220a02012-01-27 12:17:59 -050056 * 2.13.0 - virtual memory support, streamout
Jerome Glisse285484e2011-12-16 17:03:42 -050057 * 2.14.0 - add evergreen tiling informations
Tom Stellard609c1e12012-03-20 17:17:55 -040058 * 2.15.0 - add max_pipes query
Jerome Glissed2609872012-06-09 10:57:41 -040059 * 2.16.0 - fix evergreen 2D tiled surface calculation
Alex Deucher7c77bf22012-06-14 22:06:37 +020060 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
Marek Olšák0f457e42012-07-29 16:24:57 +020061 * 2.18.0 - r600-eg: allow "invalid" DB formats
Marek Olšákb51ad122012-08-09 16:34:16 +020062 * 2.19.0 - r600-eg: MSAA textures
Marek Olšák6759a0a2012-08-09 16:34:17 +020063 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
Marek Olšákc116cc92012-08-19 02:22:09 +020064 * 2.21.0 - r600-r700: FMASK and CMASK
Marek Olšák523885d2012-08-24 14:27:36 +020065 * 2.22.0 - r600 only: RESOLVE_BOX allowed
Marek Olšák46fc8782012-09-25 01:45:33 +020066 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
Marek Olšák61051af2012-09-25 03:34:01 +020067 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
Alex Deucher71bfe912012-12-07 20:00:30 -050068 * 2.25.0 - eg+: new info request for num SE and num SH
Jerome Glisse4ac05332012-12-13 12:08:11 -050069 * 2.26.0 - r600-eg: fix htile size computation
Alex Deucher8696e332012-12-13 18:57:07 -050070 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA
Jerome Glisse4613ca12012-12-19 12:26:45 -050071 * 2.28.0 - r600-eg: Add MEM_WRITE packet support
Marek Olšákc18b1172013-01-12 04:19:37 +010072 * 2.29.0 - R500 FP16 color clear registers
Marek Olšák774c3892013-03-01 13:40:31 +010073 * 2.30.0 - fix for FMASK texturing
Samuel Lia0a53aa2013-04-08 17:25:47 -040074 * 2.31.0 - Add fastfb support for rs690
Christian König902aaef2013-04-09 10:35:42 -040075 * 2.32.0 - new info request for rings working
Jerome Glisse64d7b8b2013-04-09 11:17:08 -040076 * 2.33.0 - Add SI tiling mode array query
Jerome Glisse771fe6b2009-06-05 14:42:42 +020077 */
78#define KMS_DRIVER_MAJOR 2
Jerome Glisse64d7b8b2013-04-09 11:17:08 -040079#define KMS_DRIVER_MINOR 33
Jerome Glisse771fe6b2009-06-05 14:42:42 +020080#define KMS_DRIVER_PATCHLEVEL 0
81int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
82int radeon_driver_unload_kms(struct drm_device *dev);
83int radeon_driver_firstopen_kms(struct drm_device *dev);
84void radeon_driver_lastclose_kms(struct drm_device *dev);
85int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
86void radeon_driver_postclose_kms(struct drm_device *dev,
87 struct drm_file *file_priv);
88void radeon_driver_preclose_kms(struct drm_device *dev,
89 struct drm_file *file_priv);
90int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
91int radeon_resume_kms(struct drm_device *dev);
92u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
93int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
94void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
Mario Kleinerf5a80202010-10-23 04:42:17 +020095int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
96 int *max_error,
97 struct timeval *vblank_time,
98 unsigned flags);
Jerome Glisse771fe6b2009-06-05 14:42:42 +020099void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
100int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
101void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
102irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200103int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
104 struct drm_file *file_priv);
105int radeon_gem_object_init(struct drm_gem_object *obj);
106void radeon_gem_object_free(struct drm_gem_object *obj);
Jerome Glisse721604a2012-01-05 22:11:05 -0500107int radeon_gem_object_open(struct drm_gem_object *obj,
108 struct drm_file *file_priv);
109void radeon_gem_object_close(struct drm_gem_object *obj,
110 struct drm_file *file_priv);
Mario Kleinerf5a80202010-10-23 04:42:17 +0200111extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
112 int *vpos, int *hpos);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200113extern struct drm_ioctl_desc radeon_ioctls_kms[];
114extern int radeon_max_kms_ioctl;
115int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
Dave Airlieff72145b2011-02-07 12:16:14 +1000116int radeon_mode_dumb_mmap(struct drm_file *filp,
117 struct drm_device *dev,
118 uint32_t handle, uint64_t *offset_p);
119int radeon_mode_dumb_create(struct drm_file *file_priv,
120 struct drm_device *dev,
121 struct drm_mode_create_dumb *args);
122int radeon_mode_dumb_destroy(struct drm_file *file_priv,
123 struct drm_device *dev,
124 uint32_t handle);
Aaron Plattner1e6d17a2013-01-15 20:47:44 +0000125struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
126struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
127 size_t size,
128 struct sg_table *sg);
129int radeon_gem_prime_pin(struct drm_gem_object *obj);
130void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
131void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
Christian König14adc892013-01-21 13:58:46 +0100132extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd,
133 unsigned long arg);
Dave Airlieff72145b2011-02-07 12:16:14 +1000134
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200135#if defined(CONFIG_DEBUG_FS)
136int radeon_debugfs_init(struct drm_minor *minor);
137void radeon_debugfs_cleanup(struct drm_minor *minor);
138#endif
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200139
Christian König14adc892013-01-21 13:58:46 +0100140/* atpx handler */
141#if defined(CONFIG_VGA_SWITCHEROO)
142void radeon_register_atpx_handler(void);
143void radeon_unregister_atpx_handler(void);
144#else
145static inline void radeon_register_atpx_handler(void) {}
146static inline void radeon_unregister_atpx_handler(void) {}
147#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148
Dave Airlie689b9d72005-09-30 17:09:07 +1000149int radeon_no_wb;
Dave Airliee9ced8e2013-05-15 01:23:36 +0000150int radeon_modeset = -1;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200151int radeon_dynclks = -1;
152int radeon_r4xx_atom = 0;
153int radeon_agpmode = 0;
154int radeon_vram_limit = 0;
155int radeon_gart_size = 512; /* default gart size */
156int radeon_benchmarking = 0;
Michel Dänzerecc0b322009-07-21 11:23:57 +0200157int radeon_testing = 0;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200158int radeon_connector_table = 0;
Dave Airlie4ce001a2009-08-13 16:32:14 +1000159int radeon_tv = 1;
Alex Deucher805c2212011-06-06 17:39:16 -0400160int radeon_audio = 0;
Alex Deucherf46c0122010-03-31 00:33:27 -0400161int radeon_disp_priority = 0;
Alex Deuchere2b0a8e2010-03-17 02:07:37 -0400162int radeon_hw_i2c = 0;
Dave Airlie197bbb32012-06-27 08:35:54 +0100163int radeon_pcie_gen2 = -1;
Alex Deuchera18cee12011-11-01 14:20:30 -0400164int radeon_msi = -1;
Christian König3368ff02012-05-02 15:11:21 +0200165int radeon_lockup_timeout = 10000;
Samuel Lia0a53aa2013-04-08 17:25:47 -0400166int radeon_fastfb = 0;
Dave Airlie689b9d72005-09-30 17:09:07 +1000167
Niels de Vos61a2d072008-07-31 00:07:23 -0700168MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
Dave Airlie689b9d72005-09-30 17:09:07 +1000169module_param_named(no_wb, radeon_no_wb, int, 0444);
170
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200171MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
172module_param_named(modeset, radeon_modeset, int, 0400);
173
174MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
175module_param_named(dynclks, radeon_dynclks, int, 0444);
176
177MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
178module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
179
180MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
181module_param_named(vramlimit, radeon_vram_limit, int, 0600);
182
183MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
184module_param_named(agpmode, radeon_agpmode, int, 0444);
185
Jean Delvare27d4d052011-11-30 17:22:55 +0100186MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)");
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200187module_param_named(gartsize, radeon_gart_size, int, 0600);
188
189MODULE_PARM_DESC(benchmark, "Run benchmark");
190module_param_named(benchmark, radeon_benchmarking, int, 0444);
191
Michel Dänzerecc0b322009-07-21 11:23:57 +0200192MODULE_PARM_DESC(test, "Run tests");
193module_param_named(test, radeon_testing, int, 0444);
194
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200195MODULE_PARM_DESC(connector_table, "Force connector table");
196module_param_named(connector_table, radeon_connector_table, int, 0444);
Dave Airlie4ce001a2009-08-13 16:32:14 +1000197
198MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
199module_param_named(tv, radeon_tv, int, 0444);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200200
Alex Deucher805c2212011-06-06 17:39:16 -0400201MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
Christian Koenigdafc3bd2009-10-11 23:49:13 +0200202module_param_named(audio, radeon_audio, int, 0444);
203
Alex Deucherf46c0122010-03-31 00:33:27 -0400204MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
205module_param_named(disp_priority, radeon_disp_priority, int, 0444);
206
Alex Deuchere2b0a8e2010-03-17 02:07:37 -0400207MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
208module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
209
Dave Airlie197bbb32012-06-27 08:35:54 +0100210MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
Alex Deucherd42dd572011-01-12 20:05:11 -0500211module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
212
Alex Deuchera18cee12011-11-01 14:20:30 -0400213MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
214module_param_named(msi, radeon_msi, int, 0444);
215
Christian König3368ff02012-05-02 15:11:21 +0200216MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
217module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
218
Samuel Lia0a53aa2013-04-08 17:25:47 -0400219MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
220module_param_named(fastfb, radeon_fastfb, int, 0444);
221
Christian König14adc892013-01-21 13:58:46 +0100222static struct pci_device_id pciidlist[] = {
223 radeon_PCI_IDS
224};
225
226MODULE_DEVICE_TABLE(pci, pciidlist);
227
228#ifdef CONFIG_DRM_RADEON_UMS
229
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700230static int radeon_suspend(struct drm_device *dev, pm_message_t state)
231{
232 drm_radeon_private_t *dev_priv = dev->dev_private;
233
Dave Airlie03efb882009-03-10 18:36:38 +1000234 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
235 return 0;
236
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700237 /* Disable *all* interrupts */
Alex Deucher800b6992009-03-06 11:47:54 -0500238 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700239 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
240 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
241 return 0;
242}
243
244static int radeon_resume(struct drm_device *dev)
245{
246 drm_radeon_private_t *dev_priv = dev->dev_private;
247
Dave Airlie03efb882009-03-10 18:36:38 +1000248 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
249 return 0;
250
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700251 /* Restore interrupt registers */
Alex Deucher800b6992009-03-06 11:47:54 -0500252 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700253 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
254 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
255 return 0;
256}
257
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700258static const struct file_operations radeon_driver_old_fops = {
259 .owner = THIS_MODULE,
260 .open = drm_open,
261 .release = drm_release,
262 .unlocked_ioctl = drm_ioctl,
263 .mmap = drm_mmap,
264 .poll = drm_poll,
265 .fasync = drm_fasync,
266 .read = drm_read,
267#ifdef CONFIG_COMPAT
268 .compat_ioctl = radeon_compat_ioctl,
269#endif
270 .llseek = noop_llseek,
271};
272
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200273static struct drm_driver driver_old = {
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000274 .driver_features =
275 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700276 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700277 .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
Dave Airlie22eae942005-11-10 22:16:34 +1100278 .load = radeon_driver_load,
279 .firstopen = radeon_driver_firstopen,
280 .open = radeon_driver_open,
281 .preclose = radeon_driver_preclose,
282 .postclose = radeon_driver_postclose,
283 .lastclose = radeon_driver_lastclose,
284 .unload = radeon_driver_unload,
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700285 .suspend = radeon_suspend,
286 .resume = radeon_resume,
287 .get_vblank_counter = radeon_get_vblank_counter,
288 .enable_vblank = radeon_enable_vblank,
289 .disable_vblank = radeon_disable_vblank,
Dave Airlie60f2ee02008-12-19 10:22:02 +1100290 .master_create = radeon_master_create,
291 .master_destroy = radeon_master_destroy,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700292 .irq_preinstall = radeon_driver_irq_preinstall,
293 .irq_postinstall = radeon_driver_irq_postinstall,
294 .irq_uninstall = radeon_driver_irq_uninstall,
295 .irq_handler = radeon_driver_irq_handler,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700296 .ioctls = radeon_ioctls,
297 .dma_ioctl = radeon_cp_buffers,
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700298 .fops = &radeon_driver_old_fops,
Dave Airlie22eae942005-11-10 22:16:34 +1100299 .name = DRIVER_NAME,
300 .desc = DRIVER_DESC,
301 .date = DRIVER_DATE,
302 .major = DRIVER_MAJOR,
303 .minor = DRIVER_MINOR,
304 .patchlevel = DRIVER_PATCHLEVEL,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700305};
306
Christian König14adc892013-01-21 13:58:46 +0100307#endif
308
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200309static struct drm_driver kms_driver;
310
Tommi Rantala30238152012-11-09 09:19:39 +0000311static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
Benjamin Herrenschmidta56f7422010-10-06 16:39:07 +0000312{
313 struct apertures_struct *ap;
314 bool primary = false;
315
316 ap = alloc_apertures(1);
Tommi Rantala30238152012-11-09 09:19:39 +0000317 if (!ap)
318 return -ENOMEM;
319
Benjamin Herrenschmidta56f7422010-10-06 16:39:07 +0000320 ap->ranges[0].base = pci_resource_start(pdev, 0);
321 ap->ranges[0].size = pci_resource_len(pdev, 0);
322
323#ifdef CONFIG_X86
324 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
325#endif
326 remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
327 kfree(ap);
Tommi Rantala30238152012-11-09 09:19:39 +0000328
329 return 0;
Benjamin Herrenschmidta56f7422010-10-06 16:39:07 +0000330}
331
Greg Kroah-Hartman56550d92012-12-21 15:09:25 -0800332static int radeon_pci_probe(struct pci_dev *pdev,
333 const struct pci_device_id *ent)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200334{
Tommi Rantala30238152012-11-09 09:19:39 +0000335 int ret;
336
Benjamin Herrenschmidta56f7422010-10-06 16:39:07 +0000337 /* Get rid of things like offb */
Tommi Rantala30238152012-11-09 09:19:39 +0000338 ret = radeon_kick_out_firmware_fb(pdev);
339 if (ret)
340 return ret;
Benjamin Herrenschmidta56f7422010-10-06 16:39:07 +0000341
Jordan Crousedcdb1672010-05-27 13:40:25 -0600342 return drm_get_pci_dev(pdev, ent, &kms_driver);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200343}
344
345static void
346radeon_pci_remove(struct pci_dev *pdev)
347{
348 struct drm_device *dev = pci_get_drvdata(pdev);
349
350 drm_put_dev(dev);
351}
352
353static int
354radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
355{
356 struct drm_device *dev = pci_get_drvdata(pdev);
357 return radeon_suspend_kms(dev, state);
358}
359
360static int
361radeon_pci_resume(struct pci_dev *pdev)
362{
363 struct drm_device *dev = pci_get_drvdata(pdev);
364 return radeon_resume_kms(dev);
365}
366
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700367static const struct file_operations radeon_driver_kms_fops = {
368 .owner = THIS_MODULE,
369 .open = drm_open,
370 .release = drm_release,
371 .unlocked_ioctl = drm_ioctl,
372 .mmap = radeon_mmap,
373 .poll = drm_poll,
374 .fasync = drm_fasync,
375 .read = drm_read,
376#ifdef CONFIG_COMPAT
377 .compat_ioctl = radeon_kms_compat_ioctl,
378#endif
379};
380
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200381static struct drm_driver kms_driver = {
382 .driver_features =
383 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
Alex Deucher40f5cf92012-05-10 18:33:13 -0400384 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM |
385 DRIVER_PRIME,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200386 .dev_priv_size = 0,
387 .load = radeon_driver_load_kms,
388 .firstopen = radeon_driver_firstopen_kms,
389 .open = radeon_driver_open_kms,
390 .preclose = radeon_driver_preclose_kms,
391 .postclose = radeon_driver_postclose_kms,
392 .lastclose = radeon_driver_lastclose_kms,
393 .unload = radeon_driver_unload_kms,
394 .suspend = radeon_suspend_kms,
395 .resume = radeon_resume_kms,
396 .get_vblank_counter = radeon_get_vblank_counter_kms,
397 .enable_vblank = radeon_enable_vblank_kms,
398 .disable_vblank = radeon_disable_vblank_kms,
Mario Kleinerf5a80202010-10-23 04:42:17 +0200399 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
400 .get_scanout_position = radeon_get_crtc_scanoutpos,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200401#if defined(CONFIG_DEBUG_FS)
402 .debugfs_init = radeon_debugfs_init,
403 .debugfs_cleanup = radeon_debugfs_cleanup,
404#endif
405 .irq_preinstall = radeon_driver_irq_preinstall_kms,
406 .irq_postinstall = radeon_driver_irq_postinstall_kms,
407 .irq_uninstall = radeon_driver_irq_uninstall_kms,
408 .irq_handler = radeon_driver_irq_handler_kms,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200409 .ioctls = radeon_ioctls_kms,
410 .gem_init_object = radeon_gem_object_init,
411 .gem_free_object = radeon_gem_object_free,
Jerome Glisse721604a2012-01-05 22:11:05 -0500412 .gem_open_object = radeon_gem_object_open,
413 .gem_close_object = radeon_gem_object_close,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200414 .dma_ioctl = radeon_dma_ioctl_kms,
Dave Airlieff72145b2011-02-07 12:16:14 +1000415 .dumb_create = radeon_mode_dumb_create,
416 .dumb_map_offset = radeon_mode_dumb_mmap,
417 .dumb_destroy = radeon_mode_dumb_destroy,
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700418 .fops = &radeon_driver_kms_fops,
Alex Deucher40f5cf92012-05-10 18:33:13 -0400419
420 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
421 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
Aaron Plattner1e6d17a2013-01-15 20:47:44 +0000422 .gem_prime_export = drm_gem_prime_export,
423 .gem_prime_import = drm_gem_prime_import,
424 .gem_prime_pin = radeon_gem_prime_pin,
425 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
426 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
427 .gem_prime_vmap = radeon_gem_prime_vmap,
428 .gem_prime_vunmap = radeon_gem_prime_vunmap,
Alex Deucher40f5cf92012-05-10 18:33:13 -0400429
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200430 .name = DRIVER_NAME,
431 .desc = DRIVER_DESC,
432 .date = DRIVER_DATE,
433 .major = KMS_DRIVER_MAJOR,
434 .minor = KMS_DRIVER_MINOR,
435 .patchlevel = KMS_DRIVER_PATCHLEVEL,
436};
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200437
438static struct drm_driver *driver;
Dave Airlie8410ea32010-12-15 03:16:38 +1000439static struct pci_driver *pdriver;
440
Christian König14adc892013-01-21 13:58:46 +0100441#ifdef CONFIG_DRM_RADEON_UMS
Dave Airlie8410ea32010-12-15 03:16:38 +1000442static struct pci_driver radeon_pci_driver = {
443 .name = DRIVER_NAME,
444 .id_table = pciidlist,
445};
Christian König14adc892013-01-21 13:58:46 +0100446#endif
Dave Airlie8410ea32010-12-15 03:16:38 +1000447
448static struct pci_driver radeon_kms_pci_driver = {
449 .name = DRIVER_NAME,
450 .id_table = pciidlist,
451 .probe = radeon_pci_probe,
452 .remove = radeon_pci_remove,
453 .suspend = radeon_pci_suspend,
454 .resume = radeon_pci_resume,
455};
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200456
Linus Torvalds1da177e2005-04-16 15:20:36 -0700457static int __init radeon_init(void)
458{
Dave Airliee9ced8e2013-05-15 01:23:36 +0000459#ifdef CONFIG_VGA_CONSOLE
460 if (vgacon_text_force() && radeon_modeset == -1) {
461 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
462 radeon_modeset = 0;
463 }
464#endif
465 /* set to modesetting by default if not nomodeset */
466 if (radeon_modeset == -1)
467 radeon_modeset = 1;
468
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200469 if (radeon_modeset == 1) {
470 DRM_INFO("radeon kernel modesetting enabled.\n");
471 driver = &kms_driver;
Dave Airlie8410ea32010-12-15 03:16:38 +1000472 pdriver = &radeon_kms_pci_driver;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200473 driver->driver_features |= DRIVER_MODESET;
474 driver->num_ioctls = radeon_max_kms_ioctl;
Dave Airlie6a9ee8a2010-02-01 15:38:10 +1000475 radeon_register_atpx_handler();
Christian König14adc892013-01-21 13:58:46 +0100476
477 } else {
478#ifdef CONFIG_DRM_RADEON_UMS
479 DRM_INFO("radeon userspace modesetting enabled.\n");
480 driver = &driver_old;
481 pdriver = &radeon_pci_driver;
482 driver->driver_features &= ~DRIVER_MODESET;
483 driver->num_ioctls = radeon_max_ioctl;
484#else
485 DRM_ERROR("No UMS support in radeon module!\n");
486 return -EINVAL;
487#endif
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200488 }
Christian König14adc892013-01-21 13:58:46 +0100489
490 /* let modprobe override vga console setting */
Dave Airlie8410ea32010-12-15 03:16:38 +1000491 return drm_pci_init(driver, pdriver);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700492}
493
494static void __exit radeon_exit(void)
495{
Dave Airlie8410ea32010-12-15 03:16:38 +1000496 drm_pci_exit(driver, pdriver);
Dave Airlie6a9ee8a2010-02-01 15:38:10 +1000497 radeon_unregister_atpx_handler();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700498}
499
Jerome Glisse176f6132009-06-22 18:16:13 +0200500module_init(radeon_init);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700501module_exit(radeon_exit);
502
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000503MODULE_AUTHOR(DRIVER_AUTHOR);
504MODULE_DESCRIPTION(DRIVER_DESC);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700505MODULE_LICENSE("GPL and additional rights");