Mateusz Krawczuk | 94ad0f6 | 2013-09-28 18:25:29 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Samsung's S5PV210 SoC device tree source |
| 3 | * |
| 4 | * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd. |
| 5 | * |
| 6 | * Mateusz Krawczuk <m.krawczuk@partner.samsung.com> |
| 7 | * Tomasz Figa <t.figa@samsung.com> |
| 8 | * |
| 9 | * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210 |
| 10 | * based board files can include this file and provide values for board specfic |
| 11 | * bindings. |
| 12 | * |
| 13 | * Note: This file does not include device nodes for all the controllers in |
| 14 | * S5PV210 SoC. As device tree coverage for S5PV210 increases, additional |
| 15 | * nodes can be added to this file. |
| 16 | * |
| 17 | * This program is free software; you can redistribute it and/or modify |
| 18 | * it under the terms of the GNU General Public License version 2 as |
| 19 | * published by the Free Software Foundation. |
| 20 | */ |
| 21 | |
Mateusz Krawczuk | 94ad0f6 | 2013-09-28 18:25:29 +0200 | [diff] [blame] | 22 | #include <dt-bindings/clock/s5pv210.h> |
| 23 | #include <dt-bindings/clock/s5pv210-audss.h> |
| 24 | |
| 25 | / { |
Javier Martinez Canillas | 80555b6 | 2016-09-08 11:26:00 -0400 | [diff] [blame] | 26 | #address-cells = <1>; |
| 27 | #size-cells = <1>; |
| 28 | |
Mateusz Krawczuk | 94ad0f6 | 2013-09-28 18:25:29 +0200 | [diff] [blame] | 29 | aliases { |
| 30 | csis0 = &csis0; |
| 31 | fimc0 = &fimc0; |
| 32 | fimc1 = &fimc1; |
| 33 | fimc2 = &fimc2; |
| 34 | i2c0 = &i2c0; |
| 35 | i2c1 = &i2c1; |
| 36 | i2c2 = &i2c2; |
| 37 | i2s0 = &i2s0; |
| 38 | i2s1 = &i2s1; |
| 39 | i2s2 = &i2s2; |
| 40 | pinctrl0 = &pinctrl0; |
| 41 | spi0 = &spi0; |
| 42 | spi1 = &spi1; |
| 43 | }; |
| 44 | |
| 45 | cpus { |
| 46 | #address-cells = <1>; |
| 47 | #size-cells = <0>; |
| 48 | |
| 49 | cpu@0 { |
| 50 | device_type = "cpu"; |
| 51 | compatible = "arm,cortex-a8"; |
| 52 | reg = <0>; |
| 53 | }; |
| 54 | }; |
| 55 | |
| 56 | soc { |
| 57 | compatible = "simple-bus"; |
| 58 | #address-cells = <1>; |
| 59 | #size-cells = <1>; |
| 60 | ranges; |
| 61 | |
| 62 | external-clocks { |
| 63 | compatible = "simple-bus"; |
| 64 | #address-cells = <1>; |
| 65 | #size-cells = <0>; |
| 66 | |
| 67 | xxti: oscillator@0 { |
| 68 | compatible = "fixed-clock"; |
| 69 | reg = <0>; |
| 70 | clock-frequency = <0>; |
| 71 | clock-output-names = "xxti"; |
| 72 | #clock-cells = <0>; |
| 73 | }; |
| 74 | |
| 75 | xusbxti: oscillator@1 { |
| 76 | compatible = "fixed-clock"; |
| 77 | reg = <1>; |
| 78 | clock-frequency = <0>; |
| 79 | clock-output-names = "xusbxti"; |
| 80 | #clock-cells = <0>; |
| 81 | }; |
| 82 | }; |
| 83 | |
| 84 | onenand: onenand@b0000000 { |
| 85 | compatible = "samsung,s5pv210-onenand"; |
| 86 | reg = <0xb0600000 0x2000>, |
| 87 | <0xb0000000 0x20000>, |
| 88 | <0xb0040000 0x20000>; |
| 89 | interrupt-parent = <&vic1>; |
| 90 | interrupts = <31>; |
| 91 | clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>; |
| 92 | clock-names = "bus", "onenand"; |
| 93 | #address-cells = <1>; |
| 94 | #size-cells = <1>; |
| 95 | status = "disabled"; |
| 96 | }; |
| 97 | |
| 98 | chipid@e0000000 { |
| 99 | compatible = "samsung,s5pv210-chipid"; |
| 100 | reg = <0xe0000000 0x1000>; |
| 101 | }; |
| 102 | |
| 103 | clocks: clock-controller@e0100000 { |
| 104 | compatible = "samsung,s5pv210-clock", "simple-bus"; |
| 105 | reg = <0xe0100000 0x10000>; |
| 106 | clock-names = "xxti", "xusbxti"; |
| 107 | clocks = <&xxti>, <&xusbxti>; |
| 108 | #clock-cells = <1>; |
| 109 | #address-cells = <1>; |
| 110 | #size-cells = <1>; |
| 111 | ranges; |
| 112 | |
| 113 | pmu_syscon: syscon@e0108000 { |
| 114 | compatible = "samsung-s5pv210-pmu", "syscon"; |
| 115 | reg = <0xe0108000 0x8000>; |
| 116 | }; |
| 117 | }; |
| 118 | |
| 119 | pinctrl0: pinctrl@e0200000 { |
| 120 | compatible = "samsung,s5pv210-pinctrl"; |
| 121 | reg = <0xe0200000 0x1000>; |
| 122 | interrupt-parent = <&vic0>; |
| 123 | interrupts = <30>; |
| 124 | |
| 125 | wakeup-interrupt-controller { |
| 126 | compatible = "samsung,exynos4210-wakeup-eint"; |
| 127 | interrupts = <16>; |
| 128 | interrupt-parent = <&vic0>; |
| 129 | }; |
| 130 | }; |
| 131 | |
| 132 | amba { |
| 133 | #address-cells = <1>; |
| 134 | #size-cells = <1>; |
Masahiro Yamada | 2ef7d5f | 2016-03-09 13:26:45 +0900 | [diff] [blame] | 135 | compatible = "simple-bus"; |
Mateusz Krawczuk | 94ad0f6 | 2013-09-28 18:25:29 +0200 | [diff] [blame] | 136 | ranges; |
| 137 | |
| 138 | pdma0: dma@e0900000 { |
| 139 | compatible = "arm,pl330", "arm,primecell"; |
| 140 | reg = <0xe0900000 0x1000>; |
| 141 | interrupt-parent = <&vic0>; |
| 142 | interrupts = <19>; |
| 143 | clocks = <&clocks CLK_PDMA0>; |
| 144 | clock-names = "apb_pclk"; |
| 145 | #dma-cells = <1>; |
| 146 | #dma-channels = <8>; |
| 147 | #dma-requests = <32>; |
| 148 | }; |
| 149 | |
| 150 | pdma1: dma@e0a00000 { |
| 151 | compatible = "arm,pl330", "arm,primecell"; |
| 152 | reg = <0xe0a00000 0x1000>; |
| 153 | interrupt-parent = <&vic0>; |
| 154 | interrupts = <20>; |
| 155 | clocks = <&clocks CLK_PDMA1>; |
| 156 | clock-names = "apb_pclk"; |
| 157 | #dma-cells = <1>; |
| 158 | #dma-channels = <8>; |
| 159 | #dma-requests = <32>; |
| 160 | }; |
| 161 | }; |
| 162 | |
| 163 | spi0: spi@e1300000 { |
| 164 | compatible = "samsung,s5pv210-spi"; |
| 165 | reg = <0xe1300000 0x1000>; |
| 166 | interrupt-parent = <&vic1>; |
| 167 | interrupts = <15>; |
| 168 | dmas = <&pdma0 7>, <&pdma0 6>; |
| 169 | dma-names = "tx", "rx"; |
| 170 | clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>; |
| 171 | clock-names = "spi", "spi_busclk0"; |
| 172 | pinctrl-names = "default"; |
| 173 | pinctrl-0 = <&spi0_bus>; |
| 174 | #address-cells = <1>; |
| 175 | #size-cells = <0>; |
| 176 | status = "disabled"; |
| 177 | }; |
| 178 | |
| 179 | spi1: spi@e1400000 { |
| 180 | compatible = "samsung,s5pv210-spi"; |
| 181 | reg = <0xe1400000 0x1000>; |
| 182 | interrupt-parent = <&vic1>; |
| 183 | interrupts = <16>; |
| 184 | dmas = <&pdma1 7>, <&pdma1 6>; |
| 185 | dma-names = "tx", "rx"; |
| 186 | clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>; |
| 187 | clock-names = "spi", "spi_busclk0"; |
| 188 | pinctrl-names = "default"; |
| 189 | pinctrl-0 = <&spi1_bus>; |
| 190 | #address-cells = <1>; |
| 191 | #size-cells = <0>; |
| 192 | status = "disabled"; |
| 193 | }; |
| 194 | |
| 195 | keypad: keypad@e1600000 { |
| 196 | compatible = "samsung,s5pv210-keypad"; |
| 197 | reg = <0xe1600000 0x1000>; |
| 198 | interrupt-parent = <&vic2>; |
| 199 | interrupts = <25>; |
| 200 | clocks = <&clocks CLK_KEYIF>; |
| 201 | clock-names = "keypad"; |
| 202 | status = "disabled"; |
| 203 | }; |
| 204 | |
| 205 | i2c0: i2c@e1800000 { |
| 206 | compatible = "samsung,s3c2440-i2c"; |
| 207 | reg = <0xe1800000 0x1000>; |
| 208 | interrupt-parent = <&vic1>; |
| 209 | interrupts = <14>; |
| 210 | clocks = <&clocks CLK_I2C0>; |
| 211 | clock-names = "i2c"; |
| 212 | pinctrl-names = "default"; |
| 213 | pinctrl-0 = <&i2c0_bus>; |
| 214 | #address-cells = <1>; |
| 215 | #size-cells = <0>; |
| 216 | status = "disabled"; |
| 217 | }; |
| 218 | |
| 219 | i2c2: i2c@e1a00000 { |
| 220 | compatible = "samsung,s3c2440-i2c"; |
| 221 | reg = <0xe1a00000 0x1000>; |
| 222 | interrupt-parent = <&vic1>; |
| 223 | interrupts = <19>; |
| 224 | clocks = <&clocks CLK_I2C2>; |
| 225 | clock-names = "i2c"; |
| 226 | pinctrl-0 = <&i2c2_bus>; |
| 227 | pinctrl-names = "default"; |
| 228 | #address-cells = <1>; |
| 229 | #size-cells = <0>; |
| 230 | status = "disabled"; |
| 231 | }; |
| 232 | |
| 233 | audio-subsystem { |
| 234 | compatible = "samsung,s5pv210-audss", "simple-bus"; |
| 235 | #address-cells = <1>; |
| 236 | #size-cells = <1>; |
| 237 | ranges; |
| 238 | |
| 239 | clk_audss: clock-controller@eee10000 { |
| 240 | compatible = "samsung,s5pv210-audss-clock"; |
| 241 | reg = <0xeee10000 0x1000>; |
| 242 | clock-names = "hclk", "xxti", |
| 243 | "fout_epll", |
| 244 | "sclk_audio0"; |
| 245 | clocks = <&clocks DOUT_HCLKP>, <&xxti>, |
| 246 | <&clocks FOUT_EPLL>, |
| 247 | <&clocks SCLK_AUDIO0>; |
| 248 | #clock-cells = <1>; |
| 249 | }; |
| 250 | |
| 251 | i2s0: i2s@eee30000 { |
| 252 | compatible = "samsung,s5pv210-i2s"; |
| 253 | reg = <0xeee30000 0x1000>; |
| 254 | interrupt-parent = <&vic2>; |
| 255 | interrupts = <16>; |
| 256 | dma-names = "rx", "tx", "tx-sec"; |
| 257 | dmas = <&pdma1 9>, <&pdma1 10>, <&pdma1 11>; |
| 258 | clock-names = "iis", |
| 259 | "i2s_opclk0", |
| 260 | "i2s_opclk1"; |
| 261 | clocks = <&clk_audss CLK_I2S>, |
| 262 | <&clk_audss CLK_I2S>, |
| 263 | <&clk_audss CLK_DOUT_AUD_BUS>; |
| 264 | samsung,idma-addr = <0xc0010000>; |
| 265 | pinctrl-names = "default"; |
| 266 | pinctrl-0 = <&i2s0_bus>; |
| 267 | #sound-dai-cells = <0>; |
| 268 | status = "disabled"; |
| 269 | }; |
| 270 | }; |
| 271 | |
| 272 | i2s1: i2s@e2100000 { |
| 273 | compatible = "samsung,s3c6410-i2s"; |
| 274 | reg = <0xe2100000 0x1000>; |
| 275 | interrupt-parent = <&vic2>; |
| 276 | interrupts = <17>; |
| 277 | dma-names = "rx", "tx"; |
| 278 | dmas = <&pdma1 12>, <&pdma1 13>; |
| 279 | clock-names = "iis", "i2s_opclk0"; |
| 280 | clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>; |
| 281 | pinctrl-names = "default"; |
| 282 | pinctrl-0 = <&i2s1_bus>; |
| 283 | #sound-dai-cells = <0>; |
| 284 | status = "disabled"; |
| 285 | }; |
| 286 | |
| 287 | i2s2: i2s@e2a00000 { |
| 288 | compatible = "samsung,s3c6410-i2s"; |
| 289 | reg = <0xe2a00000 0x1000>; |
| 290 | interrupt-parent = <&vic2>; |
| 291 | interrupts = <18>; |
| 292 | dma-names = "rx", "tx"; |
| 293 | dmas = <&pdma1 14>, <&pdma1 15>; |
| 294 | clock-names = "iis", "i2s_opclk0"; |
| 295 | clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>; |
| 296 | pinctrl-names = "default"; |
| 297 | pinctrl-0 = <&i2s2_bus>; |
| 298 | #sound-dai-cells = <0>; |
| 299 | status = "disabled"; |
| 300 | }; |
| 301 | |
| 302 | pwm: pwm@e2500000 { |
| 303 | compatible = "samsung,s5pc100-pwm"; |
| 304 | reg = <0xe2500000 0x1000>; |
| 305 | interrupt-parent = <&vic0>; |
| 306 | interrupts = <21>, <22>, <23>, <24>, <25>; |
| 307 | clock-names = "timers"; |
| 308 | clocks = <&clocks CLK_PWM>; |
| 309 | #pwm-cells = <3>; |
| 310 | }; |
| 311 | |
| 312 | watchdog: watchdog@e2700000 { |
Krzysztof Kozlowski | c70d219 | 2017-03-11 19:25:27 +0200 | [diff] [blame] | 313 | compatible = "samsung,s3c6410-wdt"; |
Mateusz Krawczuk | 94ad0f6 | 2013-09-28 18:25:29 +0200 | [diff] [blame] | 314 | reg = <0xe2700000 0x1000>; |
| 315 | interrupt-parent = <&vic0>; |
| 316 | interrupts = <26>; |
| 317 | clock-names = "watchdog"; |
| 318 | clocks = <&clocks CLK_WDT>; |
| 319 | }; |
| 320 | |
| 321 | rtc: rtc@e2800000 { |
| 322 | compatible = "samsung,s3c6410-rtc"; |
| 323 | reg = <0xe2800000 0x100>; |
| 324 | interrupt-parent = <&vic0>; |
| 325 | interrupts = <28>, <29>; |
| 326 | clocks = <&clocks CLK_RTC>; |
| 327 | clock-names = "rtc"; |
| 328 | status = "disabled"; |
| 329 | }; |
| 330 | |
| 331 | uart0: serial@e2900000 { |
| 332 | compatible = "samsung,s5pv210-uart"; |
| 333 | reg = <0xe2900000 0x400>; |
| 334 | interrupt-parent = <&vic1>; |
| 335 | interrupts = <10>; |
| 336 | clock-names = "uart", "clk_uart_baud0", |
| 337 | "clk_uart_baud1"; |
| 338 | clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>, |
| 339 | <&clocks SCLK_UART0>; |
| 340 | status = "disabled"; |
| 341 | }; |
| 342 | |
| 343 | uart1: serial@e2900400 { |
| 344 | compatible = "samsung,s5pv210-uart"; |
| 345 | reg = <0xe2900400 0x400>; |
| 346 | interrupt-parent = <&vic1>; |
| 347 | interrupts = <11>; |
| 348 | clock-names = "uart", "clk_uart_baud0", |
| 349 | "clk_uart_baud1"; |
| 350 | clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>, |
| 351 | <&clocks SCLK_UART1>; |
| 352 | status = "disabled"; |
| 353 | }; |
| 354 | |
| 355 | uart2: serial@e2900800 { |
| 356 | compatible = "samsung,s5pv210-uart"; |
| 357 | reg = <0xe2900800 0x400>; |
| 358 | interrupt-parent = <&vic1>; |
| 359 | interrupts = <12>; |
| 360 | clock-names = "uart", "clk_uart_baud0", |
| 361 | "clk_uart_baud1"; |
| 362 | clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>, |
| 363 | <&clocks SCLK_UART2>; |
| 364 | status = "disabled"; |
| 365 | }; |
| 366 | |
| 367 | uart3: serial@e2900c00 { |
| 368 | compatible = "samsung,s5pv210-uart"; |
| 369 | reg = <0xe2900c00 0x400>; |
| 370 | interrupt-parent = <&vic1>; |
| 371 | interrupts = <13>; |
| 372 | clock-names = "uart", "clk_uart_baud0", |
| 373 | "clk_uart_baud1"; |
| 374 | clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>, |
| 375 | <&clocks SCLK_UART3>; |
| 376 | status = "disabled"; |
| 377 | }; |
| 378 | |
| 379 | sdhci0: sdhci@eb000000 { |
| 380 | compatible = "samsung,s3c6410-sdhci"; |
| 381 | reg = <0xeb000000 0x100000>; |
| 382 | interrupt-parent = <&vic1>; |
| 383 | interrupts = <26>; |
| 384 | clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; |
| 385 | clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>, |
| 386 | <&clocks SCLK_MMC0>; |
| 387 | status = "disabled"; |
| 388 | }; |
| 389 | |
| 390 | sdhci1: sdhci@eb100000 { |
| 391 | compatible = "samsung,s3c6410-sdhci"; |
| 392 | reg = <0xeb100000 0x100000>; |
| 393 | interrupt-parent = <&vic1>; |
| 394 | interrupts = <27>; |
| 395 | clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; |
| 396 | clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>, |
| 397 | <&clocks SCLK_MMC1>; |
| 398 | status = "disabled"; |
| 399 | }; |
| 400 | |
| 401 | sdhci2: sdhci@eb200000 { |
| 402 | compatible = "samsung,s3c6410-sdhci"; |
| 403 | reg = <0xeb200000 0x100000>; |
| 404 | interrupt-parent = <&vic1>; |
| 405 | interrupts = <28>; |
| 406 | clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; |
| 407 | clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>, |
| 408 | <&clocks SCLK_MMC2>; |
| 409 | status = "disabled"; |
| 410 | }; |
| 411 | |
| 412 | sdhci3: sdhci@eb300000 { |
| 413 | compatible = "samsung,s3c6410-sdhci"; |
| 414 | reg = <0xeb300000 0x100000>; |
| 415 | interrupt-parent = <&vic3>; |
| 416 | interrupts = <2>; |
| 417 | clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.3"; |
| 418 | clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>, |
| 419 | <&clocks SCLK_MMC3>; |
| 420 | status = "disabled"; |
| 421 | }; |
| 422 | |
| 423 | hsotg: hsotg@ec000000 { |
| 424 | compatible = "samsung,s3c6400-hsotg"; |
| 425 | reg = <0xec000000 0x20000>; |
| 426 | interrupt-parent = <&vic1>; |
| 427 | interrupts = <24>; |
| 428 | clocks = <&clocks CLK_USB_OTG>; |
| 429 | clock-names = "otg"; |
| 430 | phy-names = "usb2-phy"; |
| 431 | phys = <&usbphy 0>; |
| 432 | status = "disabled"; |
| 433 | }; |
| 434 | |
| 435 | usbphy: usbphy@ec100000 { |
| 436 | compatible = "samsung,s5pv210-usb2-phy"; |
| 437 | reg = <0xec100000 0x100>; |
| 438 | samsung,pmureg-phandle = <&pmu_syscon>; |
| 439 | clocks = <&clocks CLK_USB_OTG>, <&xusbxti>; |
| 440 | clock-names = "phy", "ref"; |
| 441 | #phy-cells = <1>; |
| 442 | status = "disabled"; |
| 443 | }; |
| 444 | |
| 445 | ehci: ehci@ec200000 { |
| 446 | compatible = "samsung,exynos4210-ehci"; |
| 447 | reg = <0xec200000 0x100>; |
| 448 | interrupts = <23>; |
| 449 | interrupt-parent = <&vic1>; |
| 450 | clocks = <&clocks CLK_USB_HOST>; |
| 451 | clock-names = "usbhost"; |
| 452 | #address-cells = <1>; |
| 453 | #size-cells = <0>; |
| 454 | status = "disabled"; |
| 455 | |
| 456 | port@0 { |
| 457 | reg = <0>; |
| 458 | phys = <&usbphy 1>; |
| 459 | }; |
| 460 | }; |
| 461 | |
| 462 | ohci: ohci@ec300000 { |
| 463 | compatible = "samsung,exynos4210-ohci"; |
| 464 | reg = <0xec300000 0x100>; |
| 465 | interrupts = <23>; |
| 466 | clocks = <&clocks CLK_USB_HOST>; |
| 467 | clock-names = "usbhost"; |
| 468 | #address-cells = <1>; |
| 469 | #size-cells = <0>; |
| 470 | status = "disabled"; |
| 471 | |
| 472 | port@0 { |
| 473 | reg = <0>; |
| 474 | phys = <&usbphy 1>; |
| 475 | }; |
| 476 | }; |
| 477 | |
| 478 | mfc: codec@f1700000 { |
| 479 | compatible = "samsung,mfc-v5"; |
| 480 | reg = <0xf1700000 0x10000>; |
| 481 | interrupt-parent = <&vic2>; |
| 482 | interrupts = <14>; |
| 483 | clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>; |
| 484 | clock-names = "sclk_mfc", "mfc"; |
| 485 | }; |
| 486 | |
| 487 | vic0: interrupt-controller@f2000000 { |
| 488 | compatible = "arm,pl192-vic"; |
| 489 | interrupt-controller; |
| 490 | reg = <0xf2000000 0x1000>; |
| 491 | #interrupt-cells = <1>; |
| 492 | }; |
| 493 | |
| 494 | vic1: interrupt-controller@f2100000 { |
| 495 | compatible = "arm,pl192-vic"; |
| 496 | interrupt-controller; |
| 497 | reg = <0xf2100000 0x1000>; |
| 498 | #interrupt-cells = <1>; |
| 499 | }; |
| 500 | |
| 501 | vic2: interrupt-controller@f2200000 { |
| 502 | compatible = "arm,pl192-vic"; |
| 503 | interrupt-controller; |
| 504 | reg = <0xf2200000 0x1000>; |
| 505 | #interrupt-cells = <1>; |
| 506 | }; |
| 507 | |
| 508 | vic3: interrupt-controller@f2300000 { |
| 509 | compatible = "arm,pl192-vic"; |
| 510 | interrupt-controller; |
| 511 | reg = <0xf2300000 0x1000>; |
| 512 | #interrupt-cells = <1>; |
| 513 | }; |
| 514 | |
| 515 | fimd: fimd@f8000000 { |
| 516 | compatible = "samsung,exynos4210-fimd"; |
| 517 | interrupt-parent = <&vic2>; |
| 518 | reg = <0xf8000000 0x20000>; |
| 519 | interrupt-names = "fifo", "vsync", "lcd_sys"; |
| 520 | interrupts = <0>, <1>, <2>; |
| 521 | clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>; |
| 522 | clock-names = "sclk_fimd", "fimd"; |
| 523 | status = "disabled"; |
| 524 | }; |
| 525 | |
| 526 | g2d: g2d@fa000000 { |
| 527 | compatible = "samsung,s5pv210-g2d"; |
| 528 | reg = <0xfa000000 0x1000>; |
| 529 | interrupt-parent = <&vic2>; |
| 530 | interrupts = <9>; |
| 531 | clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>; |
| 532 | clock-names = "sclk_fimg2d", "fimg2d"; |
| 533 | }; |
| 534 | |
| 535 | mdma1: mdma@fa200000 { |
| 536 | compatible = "arm,pl330", "arm,primecell"; |
| 537 | reg = <0xfa200000 0x1000>; |
| 538 | interrupt-parent = <&vic0>; |
| 539 | interrupts = <18>; |
| 540 | clocks = <&clocks CLK_MDMA>; |
| 541 | clock-names = "apb_pclk"; |
| 542 | #dma-cells = <1>; |
| 543 | #dma-channels = <8>; |
| 544 | #dma-requests = <1>; |
| 545 | }; |
| 546 | |
| 547 | i2c1: i2c@fab00000 { |
| 548 | compatible = "samsung,s3c2440-i2c"; |
| 549 | reg = <0xfab00000 0x1000>; |
| 550 | interrupt-parent = <&vic2>; |
| 551 | interrupts = <13>; |
| 552 | clocks = <&clocks CLK_I2C1>; |
| 553 | clock-names = "i2c"; |
| 554 | pinctrl-names = "default"; |
| 555 | pinctrl-0 = <&i2c1_bus>; |
| 556 | #address-cells = <1>; |
| 557 | #size-cells = <0>; |
| 558 | status = "disabled"; |
| 559 | }; |
| 560 | |
| 561 | camera: camera { |
| 562 | compatible = "samsung,fimc", "simple-bus"; |
| 563 | pinctrl-names = "default"; |
| 564 | pinctrl-0 = <>; |
| 565 | clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>; |
| 566 | clock-names = "sclk_cam0", "sclk_cam1"; |
| 567 | #address-cells = <1>; |
| 568 | #size-cells = <1>; |
| 569 | ranges; |
| 570 | |
| 571 | clock_cam: clock-controller { |
| 572 | #clock-cells = <1>; |
| 573 | }; |
| 574 | |
| 575 | csis0: csis@fa600000 { |
| 576 | compatible = "samsung,s5pv210-csis"; |
| 577 | reg = <0xfa600000 0x4000>; |
| 578 | interrupt-parent = <&vic2>; |
| 579 | interrupts = <29>; |
| 580 | clocks = <&clocks CLK_CSIS>, |
| 581 | <&clocks SCLK_CSIS>; |
| 582 | clock-names = "clk_csis", |
| 583 | "sclk_csis"; |
| 584 | bus-width = <4>; |
| 585 | status = "disabled"; |
| 586 | #address-cells = <1>; |
| 587 | #size-cells = <0>; |
| 588 | }; |
| 589 | |
| 590 | fimc0: fimc@fb200000 { |
| 591 | compatible = "samsung,s5pv210-fimc"; |
| 592 | reg = <0xfb200000 0x1000>; |
| 593 | interrupts = <5>; |
| 594 | interrupt-parent = <&vic2>; |
| 595 | clocks = <&clocks CLK_FIMC0>, |
| 596 | <&clocks SCLK_FIMC0>; |
| 597 | clock-names = "fimc", |
| 598 | "sclk_fimc"; |
| 599 | samsung,pix-limits = <4224 8192 1920 4224>; |
| 600 | samsung,mainscaler-ext; |
| 601 | samsung,cam-if; |
| 602 | }; |
| 603 | |
| 604 | fimc1: fimc@fb300000 { |
| 605 | compatible = "samsung,s5pv210-fimc"; |
| 606 | reg = <0xfb300000 0x1000>; |
| 607 | interrupt-parent = <&vic2>; |
| 608 | interrupts = <6>; |
| 609 | clocks = <&clocks CLK_FIMC1>, |
| 610 | <&clocks SCLK_FIMC1>; |
| 611 | clock-names = "fimc", |
| 612 | "sclk_fimc"; |
| 613 | samsung,pix-limits = <4224 8192 1920 4224>; |
| 614 | samsung,mainscaler-ext; |
| 615 | samsung,cam-if; |
| 616 | }; |
| 617 | |
| 618 | fimc2: fimc@fb400000 { |
| 619 | compatible = "samsung,s5pv210-fimc"; |
| 620 | reg = <0xfb400000 0x1000>; |
| 621 | interrupt-parent = <&vic2>; |
| 622 | interrupts = <7>; |
| 623 | clocks = <&clocks CLK_FIMC2>, |
| 624 | <&clocks SCLK_FIMC2>; |
| 625 | clock-names = "fimc", |
| 626 | "sclk_fimc"; |
| 627 | samsung,pix-limits = <4224 8192 1920 4224>; |
| 628 | samsung,mainscaler-ext; |
| 629 | samsung,lcd-wb; |
| 630 | }; |
| 631 | }; |
| 632 | }; |
| 633 | }; |
| 634 | |
| 635 | #include "s5pv210-pinctrl.dtsi" |