Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1 | /* |
| 2 | * |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2005 Mike Isely <isely@pobox.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 18 | * |
| 19 | */ |
| 20 | |
| 21 | #include <linux/errno.h> |
| 22 | #include <linux/string.h> |
| 23 | #include <linux/slab.h> |
| 24 | #include <linux/firmware.h> |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 25 | #include <linux/videodev2.h> |
Mike Isely | 32ffa9a | 2006-09-23 22:26:52 -0300 | [diff] [blame] | 26 | #include <media/v4l2-common.h> |
Mike Isely | 75212a0 | 2009-03-07 01:48:42 -0300 | [diff] [blame^] | 27 | #include <media/tuner.h> |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 28 | #include "pvrusb2.h" |
| 29 | #include "pvrusb2-std.h" |
| 30 | #include "pvrusb2-util.h" |
| 31 | #include "pvrusb2-hdw.h" |
| 32 | #include "pvrusb2-i2c-core.h" |
Mike Isely | 59af336 | 2009-03-07 03:06:09 -0300 | [diff] [blame] | 33 | #include "pvrusb2-i2c-track.h" |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 34 | #include "pvrusb2-tuner.h" |
| 35 | #include "pvrusb2-eeprom.h" |
| 36 | #include "pvrusb2-hdw-internal.h" |
| 37 | #include "pvrusb2-encoder.h" |
| 38 | #include "pvrusb2-debug.h" |
Michael Krufky | 8d36436 | 2007-01-22 02:17:55 -0300 | [diff] [blame] | 39 | #include "pvrusb2-fx2-cmd.h" |
Mike Isely | 5f6dae8 | 2009-03-07 00:39:34 -0300 | [diff] [blame] | 40 | #include "pvrusb2-wm8775.h" |
Mike Isely | 6f95651 | 2009-03-07 00:43:26 -0300 | [diff] [blame] | 41 | #include "pvrusb2-video-v4l.h" |
Mike Isely | 634ba26 | 2009-03-07 00:54:02 -0300 | [diff] [blame] | 42 | #include "pvrusb2-cx2584x-v4l.h" |
Mike Isely | 76891d6 | 2009-03-07 00:52:06 -0300 | [diff] [blame] | 43 | #include "pvrusb2-audio.h" |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 44 | |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 45 | #define TV_MIN_FREQ 55250000L |
| 46 | #define TV_MAX_FREQ 850000000L |
Pantelis Koukousoulas | 25d8527 | 2006-12-27 23:06:04 -0300 | [diff] [blame] | 47 | |
Mike Isely | 83ce57a | 2008-05-26 05:51:57 -0300 | [diff] [blame] | 48 | /* This defines a minimum interval that the decoder must remain quiet |
| 49 | before we are allowed to start it running. */ |
| 50 | #define TIME_MSEC_DECODER_WAIT 50 |
| 51 | |
| 52 | /* This defines a minimum interval that the encoder must remain quiet |
Mike Isely | fa98e59 | 2008-05-26 05:54:24 -0300 | [diff] [blame] | 53 | before we are allowed to configure it. I had this originally set to |
| 54 | 50msec, but Martin Dauskardt <martin.dauskardt@gmx.de> reports that |
| 55 | things work better when it's set to 100msec. */ |
| 56 | #define TIME_MSEC_ENCODER_WAIT 100 |
Mike Isely | 83ce57a | 2008-05-26 05:51:57 -0300 | [diff] [blame] | 57 | |
| 58 | /* This defines the minimum interval that the encoder must successfully run |
| 59 | before we consider that the encoder has run at least once since its |
| 60 | firmware has been loaded. This measurement is in important for cases |
| 61 | where we can't do something until we know that the encoder has been run |
| 62 | at least once. */ |
| 63 | #define TIME_MSEC_ENCODER_OK 250 |
| 64 | |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 65 | static struct pvr2_hdw *unit_pointers[PVR_NUM] = {[ 0 ... PVR_NUM-1 ] = NULL}; |
Matthias Kaehlcke | 8df0c87 | 2007-04-28 20:00:18 -0300 | [diff] [blame] | 66 | static DEFINE_MUTEX(pvr2_unit_mtx); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 67 | |
Douglas Schilling Landgraf | ff699e6 | 2008-04-22 14:41:48 -0300 | [diff] [blame] | 68 | static int ctlchg; |
Douglas Schilling Landgraf | ff699e6 | 2008-04-22 14:41:48 -0300 | [diff] [blame] | 69 | static int procreload; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 70 | static int tuner[PVR_NUM] = { [0 ... PVR_NUM-1] = -1 }; |
| 71 | static int tolerance[PVR_NUM] = { [0 ... PVR_NUM-1] = 0 }; |
| 72 | static int video_std[PVR_NUM] = { [0 ... PVR_NUM-1] = 0 }; |
Douglas Schilling Landgraf | ff699e6 | 2008-04-22 14:41:48 -0300 | [diff] [blame] | 73 | static int init_pause_msec; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 74 | |
| 75 | module_param(ctlchg, int, S_IRUGO|S_IWUSR); |
| 76 | MODULE_PARM_DESC(ctlchg, "0=optimize ctl change 1=always accept new ctl value"); |
| 77 | module_param(init_pause_msec, int, S_IRUGO|S_IWUSR); |
| 78 | MODULE_PARM_DESC(init_pause_msec, "hardware initialization settling delay"); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 79 | module_param(procreload, int, S_IRUGO|S_IWUSR); |
| 80 | MODULE_PARM_DESC(procreload, |
| 81 | "Attempt init failure recovery with firmware reload"); |
| 82 | module_param_array(tuner, int, NULL, 0444); |
| 83 | MODULE_PARM_DESC(tuner,"specify installed tuner type"); |
| 84 | module_param_array(video_std, int, NULL, 0444); |
| 85 | MODULE_PARM_DESC(video_std,"specify initial video standard"); |
| 86 | module_param_array(tolerance, int, NULL, 0444); |
| 87 | MODULE_PARM_DESC(tolerance,"specify stream error tolerance"); |
| 88 | |
Michael Krufky | 5a4f5da6 | 2008-05-11 16:37:50 -0300 | [diff] [blame] | 89 | /* US Broadcast channel 7 (175.25 MHz) */ |
| 90 | static int default_tv_freq = 175250000L; |
| 91 | /* 104.3 MHz, a usable FM station for my area */ |
| 92 | static int default_radio_freq = 104300000L; |
| 93 | |
| 94 | module_param_named(tv_freq, default_tv_freq, int, 0444); |
| 95 | MODULE_PARM_DESC(tv_freq, "specify initial television frequency"); |
| 96 | module_param_named(radio_freq, default_radio_freq, int, 0444); |
| 97 | MODULE_PARM_DESC(radio_freq, "specify initial radio frequency"); |
| 98 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 99 | #define PVR2_CTL_WRITE_ENDPOINT 0x01 |
| 100 | #define PVR2_CTL_READ_ENDPOINT 0x81 |
| 101 | |
| 102 | #define PVR2_GPIO_IN 0x9008 |
| 103 | #define PVR2_GPIO_OUT 0x900c |
| 104 | #define PVR2_GPIO_DIR 0x9020 |
| 105 | |
| 106 | #define trace_firmware(...) pvr2_trace(PVR2_TRACE_FIRMWARE,__VA_ARGS__) |
| 107 | |
| 108 | #define PVR2_FIRMWARE_ENDPOINT 0x02 |
| 109 | |
| 110 | /* size of a firmware chunk */ |
| 111 | #define FIRMWARE_CHUNK_SIZE 0x2000 |
| 112 | |
Mike Isely | edb9dcb | 2009-03-07 00:37:10 -0300 | [diff] [blame] | 113 | typedef void (*pvr2_subdev_update_func)(struct pvr2_hdw *, |
| 114 | struct v4l2_subdev *); |
| 115 | |
| 116 | static const pvr2_subdev_update_func pvr2_module_update_functions[] = { |
Mike Isely | 4ecbc28 | 2009-03-07 00:49:19 -0300 | [diff] [blame] | 117 | [PVR2_CLIENT_ID_WM8775] = pvr2_wm8775_subdev_update, |
Mike Isely | 6f95651 | 2009-03-07 00:43:26 -0300 | [diff] [blame] | 118 | [PVR2_CLIENT_ID_SAA7115] = pvr2_saa7115_subdev_update, |
Mike Isely | 76891d6 | 2009-03-07 00:52:06 -0300 | [diff] [blame] | 119 | [PVR2_CLIENT_ID_MSP3400] = pvr2_msp3400_subdev_update, |
Mike Isely | 634ba26 | 2009-03-07 00:54:02 -0300 | [diff] [blame] | 120 | [PVR2_CLIENT_ID_CX25840] = pvr2_cx25840_subdev_update, |
Mike Isely | edb9dcb | 2009-03-07 00:37:10 -0300 | [diff] [blame] | 121 | }; |
| 122 | |
Mike Isely | e9c64a7 | 2009-03-06 23:42:20 -0300 | [diff] [blame] | 123 | static const char *module_names[] = { |
| 124 | [PVR2_CLIENT_ID_MSP3400] = "msp3400", |
| 125 | [PVR2_CLIENT_ID_CX25840] = "cx25840", |
| 126 | [PVR2_CLIENT_ID_SAA7115] = "saa7115", |
| 127 | [PVR2_CLIENT_ID_TUNER] = "tuner", |
| 128 | [PVR2_CLIENT_ID_CS53132A] = "cs53132a", |
Mike Isely | 5f6dae8 | 2009-03-07 00:39:34 -0300 | [diff] [blame] | 129 | [PVR2_CLIENT_ID_WM8775] = "wm8775", |
Mike Isely | e9c64a7 | 2009-03-06 23:42:20 -0300 | [diff] [blame] | 130 | }; |
| 131 | |
| 132 | |
| 133 | static const unsigned char *module_i2c_addresses[] = { |
| 134 | [PVR2_CLIENT_ID_TUNER] = "\x60\x61\x62\x63", |
Mike Isely | ae111f7 | 2009-03-07 00:57:42 -0300 | [diff] [blame] | 135 | [PVR2_CLIENT_ID_WM8775] = "\x1b", |
Mike Isely | e9c64a7 | 2009-03-06 23:42:20 -0300 | [diff] [blame] | 136 | }; |
| 137 | |
| 138 | |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 139 | /* Define the list of additional controls we'll dynamically construct based |
| 140 | on query of the cx2341x module. */ |
| 141 | struct pvr2_mpeg_ids { |
| 142 | const char *strid; |
| 143 | int id; |
| 144 | }; |
| 145 | static const struct pvr2_mpeg_ids mpeg_ids[] = { |
| 146 | { |
| 147 | .strid = "audio_layer", |
| 148 | .id = V4L2_CID_MPEG_AUDIO_ENCODING, |
| 149 | },{ |
| 150 | .strid = "audio_bitrate", |
| 151 | .id = V4L2_CID_MPEG_AUDIO_L2_BITRATE, |
| 152 | },{ |
| 153 | /* Already using audio_mode elsewhere :-( */ |
| 154 | .strid = "mpeg_audio_mode", |
| 155 | .id = V4L2_CID_MPEG_AUDIO_MODE, |
| 156 | },{ |
| 157 | .strid = "mpeg_audio_mode_extension", |
| 158 | .id = V4L2_CID_MPEG_AUDIO_MODE_EXTENSION, |
| 159 | },{ |
| 160 | .strid = "audio_emphasis", |
| 161 | .id = V4L2_CID_MPEG_AUDIO_EMPHASIS, |
| 162 | },{ |
| 163 | .strid = "audio_crc", |
| 164 | .id = V4L2_CID_MPEG_AUDIO_CRC, |
| 165 | },{ |
| 166 | .strid = "video_aspect", |
| 167 | .id = V4L2_CID_MPEG_VIDEO_ASPECT, |
| 168 | },{ |
| 169 | .strid = "video_b_frames", |
| 170 | .id = V4L2_CID_MPEG_VIDEO_B_FRAMES, |
| 171 | },{ |
| 172 | .strid = "video_gop_size", |
| 173 | .id = V4L2_CID_MPEG_VIDEO_GOP_SIZE, |
| 174 | },{ |
| 175 | .strid = "video_gop_closure", |
| 176 | .id = V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, |
| 177 | },{ |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 178 | .strid = "video_bitrate_mode", |
| 179 | .id = V4L2_CID_MPEG_VIDEO_BITRATE_MODE, |
| 180 | },{ |
| 181 | .strid = "video_bitrate", |
| 182 | .id = V4L2_CID_MPEG_VIDEO_BITRATE, |
| 183 | },{ |
| 184 | .strid = "video_bitrate_peak", |
| 185 | .id = V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, |
| 186 | },{ |
| 187 | .strid = "video_temporal_decimation", |
| 188 | .id = V4L2_CID_MPEG_VIDEO_TEMPORAL_DECIMATION, |
| 189 | },{ |
| 190 | .strid = "stream_type", |
| 191 | .id = V4L2_CID_MPEG_STREAM_TYPE, |
| 192 | },{ |
| 193 | .strid = "video_spatial_filter_mode", |
| 194 | .id = V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE, |
| 195 | },{ |
| 196 | .strid = "video_spatial_filter", |
| 197 | .id = V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER, |
| 198 | },{ |
| 199 | .strid = "video_luma_spatial_filter_type", |
| 200 | .id = V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE, |
| 201 | },{ |
| 202 | .strid = "video_chroma_spatial_filter_type", |
| 203 | .id = V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE, |
| 204 | },{ |
| 205 | .strid = "video_temporal_filter_mode", |
| 206 | .id = V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE, |
| 207 | },{ |
| 208 | .strid = "video_temporal_filter", |
| 209 | .id = V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER, |
| 210 | },{ |
| 211 | .strid = "video_median_filter_type", |
| 212 | .id = V4L2_CID_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE, |
| 213 | },{ |
| 214 | .strid = "video_luma_median_filter_top", |
| 215 | .id = V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_TOP, |
| 216 | },{ |
| 217 | .strid = "video_luma_median_filter_bottom", |
| 218 | .id = V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_BOTTOM, |
| 219 | },{ |
| 220 | .strid = "video_chroma_median_filter_top", |
| 221 | .id = V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_TOP, |
| 222 | },{ |
| 223 | .strid = "video_chroma_median_filter_bottom", |
| 224 | .id = V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_BOTTOM, |
| 225 | } |
| 226 | }; |
Ahmed S. Darwish | eca8ebf | 2007-01-20 00:35:03 -0300 | [diff] [blame] | 227 | #define MPEGDEF_COUNT ARRAY_SIZE(mpeg_ids) |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 228 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 229 | |
Mike Isely | 434449f | 2006-08-08 09:10:06 -0300 | [diff] [blame] | 230 | static const char *control_values_srate[] = { |
| 231 | [V4L2_MPEG_AUDIO_SAMPLING_FREQ_44100] = "44.1 kHz", |
| 232 | [V4L2_MPEG_AUDIO_SAMPLING_FREQ_48000] = "48 kHz", |
| 233 | [V4L2_MPEG_AUDIO_SAMPLING_FREQ_32000] = "32 kHz", |
| 234 | }; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 235 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 236 | |
| 237 | |
| 238 | static const char *control_values_input[] = { |
| 239 | [PVR2_CVAL_INPUT_TV] = "television", /*xawtv needs this name*/ |
Mike Isely | 29bf5b1 | 2008-04-22 14:45:37 -0300 | [diff] [blame] | 240 | [PVR2_CVAL_INPUT_DTV] = "dtv", |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 241 | [PVR2_CVAL_INPUT_RADIO] = "radio", |
| 242 | [PVR2_CVAL_INPUT_SVIDEO] = "s-video", |
| 243 | [PVR2_CVAL_INPUT_COMPOSITE] = "composite", |
| 244 | }; |
| 245 | |
| 246 | |
| 247 | static const char *control_values_audiomode[] = { |
| 248 | [V4L2_TUNER_MODE_MONO] = "Mono", |
| 249 | [V4L2_TUNER_MODE_STEREO] = "Stereo", |
| 250 | [V4L2_TUNER_MODE_LANG1] = "Lang1", |
| 251 | [V4L2_TUNER_MODE_LANG2] = "Lang2", |
| 252 | [V4L2_TUNER_MODE_LANG1_LANG2] = "Lang1+Lang2", |
| 253 | }; |
| 254 | |
| 255 | |
| 256 | static const char *control_values_hsm[] = { |
| 257 | [PVR2_CVAL_HSM_FAIL] = "Fail", |
| 258 | [PVR2_CVAL_HSM_HIGH] = "High", |
| 259 | [PVR2_CVAL_HSM_FULL] = "Full", |
| 260 | }; |
| 261 | |
| 262 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 263 | static const char *pvr2_state_names[] = { |
| 264 | [PVR2_STATE_NONE] = "none", |
| 265 | [PVR2_STATE_DEAD] = "dead", |
| 266 | [PVR2_STATE_COLD] = "cold", |
| 267 | [PVR2_STATE_WARM] = "warm", |
| 268 | [PVR2_STATE_ERROR] = "error", |
| 269 | [PVR2_STATE_READY] = "ready", |
| 270 | [PVR2_STATE_RUN] = "run", |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 271 | }; |
| 272 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 273 | |
Mike Isely | 694dca2b | 2008-03-28 05:42:10 -0300 | [diff] [blame] | 274 | struct pvr2_fx2cmd_descdef { |
Mike Isely | 1c9d10d | 2008-03-28 05:38:54 -0300 | [diff] [blame] | 275 | unsigned char id; |
| 276 | unsigned char *desc; |
| 277 | }; |
| 278 | |
Mike Isely | 694dca2b | 2008-03-28 05:42:10 -0300 | [diff] [blame] | 279 | static const struct pvr2_fx2cmd_descdef pvr2_fx2cmd_desc[] = { |
Mike Isely | 1c9d10d | 2008-03-28 05:38:54 -0300 | [diff] [blame] | 280 | {FX2CMD_MEM_WRITE_DWORD, "write encoder dword"}, |
| 281 | {FX2CMD_MEM_READ_DWORD, "read encoder dword"}, |
Mike Isely | 31335b1 | 2008-07-25 19:35:31 -0300 | [diff] [blame] | 282 | {FX2CMD_HCW_ZILOG_RESET, "zilog IR reset control"}, |
Mike Isely | 1c9d10d | 2008-03-28 05:38:54 -0300 | [diff] [blame] | 283 | {FX2CMD_MEM_READ_64BYTES, "read encoder 64bytes"}, |
| 284 | {FX2CMD_REG_WRITE, "write encoder register"}, |
| 285 | {FX2CMD_REG_READ, "read encoder register"}, |
| 286 | {FX2CMD_MEMSEL, "encoder memsel"}, |
| 287 | {FX2CMD_I2C_WRITE, "i2c write"}, |
| 288 | {FX2CMD_I2C_READ, "i2c read"}, |
| 289 | {FX2CMD_GET_USB_SPEED, "get USB speed"}, |
| 290 | {FX2CMD_STREAMING_ON, "stream on"}, |
| 291 | {FX2CMD_STREAMING_OFF, "stream off"}, |
| 292 | {FX2CMD_FWPOST1, "fwpost1"}, |
| 293 | {FX2CMD_POWER_OFF, "power off"}, |
| 294 | {FX2CMD_POWER_ON, "power on"}, |
| 295 | {FX2CMD_DEEP_RESET, "deep reset"}, |
| 296 | {FX2CMD_GET_EEPROM_ADDR, "get rom addr"}, |
| 297 | {FX2CMD_GET_IR_CODE, "get IR code"}, |
| 298 | {FX2CMD_HCW_DEMOD_RESETIN, "hcw demod resetin"}, |
| 299 | {FX2CMD_HCW_DTV_STREAMING_ON, "hcw dtv stream on"}, |
| 300 | {FX2CMD_HCW_DTV_STREAMING_OFF, "hcw dtv stream off"}, |
| 301 | {FX2CMD_ONAIR_DTV_STREAMING_ON, "onair dtv stream on"}, |
| 302 | {FX2CMD_ONAIR_DTV_STREAMING_OFF, "onair dtv stream off"}, |
| 303 | {FX2CMD_ONAIR_DTV_POWER_ON, "onair dtv power on"}, |
| 304 | {FX2CMD_ONAIR_DTV_POWER_OFF, "onair dtv power off"}, |
| 305 | }; |
| 306 | |
| 307 | |
Mike Isely | 1cb03b7 | 2008-04-21 03:47:43 -0300 | [diff] [blame] | 308 | static int pvr2_hdw_set_input(struct pvr2_hdw *hdw,int v); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 309 | static void pvr2_hdw_state_sched(struct pvr2_hdw *); |
| 310 | static int pvr2_hdw_state_eval(struct pvr2_hdw *); |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 311 | static void pvr2_hdw_set_cur_freq(struct pvr2_hdw *,unsigned long); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 312 | static void pvr2_hdw_worker_i2c(struct work_struct *work); |
| 313 | static void pvr2_hdw_worker_poll(struct work_struct *work); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 314 | static int pvr2_hdw_wait(struct pvr2_hdw *,int state); |
| 315 | static int pvr2_hdw_untrip_unlocked(struct pvr2_hdw *); |
| 316 | static void pvr2_hdw_state_log_state(struct pvr2_hdw *); |
Adrian Bunk | 07e337e | 2006-06-30 11:30:20 -0300 | [diff] [blame] | 317 | static int pvr2_hdw_cmd_usbstream(struct pvr2_hdw *hdw,int runFl); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 318 | static int pvr2_hdw_commit_setup(struct pvr2_hdw *hdw); |
Adrian Bunk | 07e337e | 2006-06-30 11:30:20 -0300 | [diff] [blame] | 319 | static int pvr2_hdw_get_eeprom_addr(struct pvr2_hdw *hdw); |
Adrian Bunk | 07e337e | 2006-06-30 11:30:20 -0300 | [diff] [blame] | 320 | static void pvr2_hdw_internal_find_stdenum(struct pvr2_hdw *hdw); |
| 321 | static void pvr2_hdw_internal_set_std_avail(struct pvr2_hdw *hdw); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 322 | static void pvr2_hdw_quiescent_timeout(unsigned long); |
| 323 | static void pvr2_hdw_encoder_wait_timeout(unsigned long); |
Mike Isely | d913d63 | 2008-04-06 04:04:35 -0300 | [diff] [blame] | 324 | static void pvr2_hdw_encoder_run_timeout(unsigned long); |
Mike Isely | 1c9d10d | 2008-03-28 05:38:54 -0300 | [diff] [blame] | 325 | static int pvr2_issue_simple_cmd(struct pvr2_hdw *,u32); |
Adrian Bunk | 07e337e | 2006-06-30 11:30:20 -0300 | [diff] [blame] | 326 | static int pvr2_send_request_ex(struct pvr2_hdw *hdw, |
| 327 | unsigned int timeout,int probe_fl, |
| 328 | void *write_data,unsigned int write_len, |
| 329 | void *read_data,unsigned int read_len); |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 330 | static int pvr2_hdw_check_cropcap(struct pvr2_hdw *hdw); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 331 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 332 | |
| 333 | static void trace_stbit(const char *name,int val) |
| 334 | { |
| 335 | pvr2_trace(PVR2_TRACE_STBITS, |
| 336 | "State bit %s <-- %s", |
| 337 | name,(val ? "true" : "false")); |
| 338 | } |
| 339 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 340 | static int ctrl_channelfreq_get(struct pvr2_ctrl *cptr,int *vp) |
| 341 | { |
| 342 | struct pvr2_hdw *hdw = cptr->hdw; |
| 343 | if ((hdw->freqProgSlot > 0) && (hdw->freqProgSlot <= FREQTABLE_SIZE)) { |
| 344 | *vp = hdw->freqTable[hdw->freqProgSlot-1]; |
| 345 | } else { |
| 346 | *vp = 0; |
| 347 | } |
| 348 | return 0; |
| 349 | } |
| 350 | |
| 351 | static int ctrl_channelfreq_set(struct pvr2_ctrl *cptr,int m,int v) |
| 352 | { |
| 353 | struct pvr2_hdw *hdw = cptr->hdw; |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 354 | unsigned int slotId = hdw->freqProgSlot; |
| 355 | if ((slotId > 0) && (slotId <= FREQTABLE_SIZE)) { |
| 356 | hdw->freqTable[slotId-1] = v; |
| 357 | /* Handle side effects correctly - if we're tuned to this |
| 358 | slot, then forgot the slot id relation since the stored |
| 359 | frequency has been changed. */ |
| 360 | if (hdw->freqSelector) { |
| 361 | if (hdw->freqSlotRadio == slotId) { |
| 362 | hdw->freqSlotRadio = 0; |
| 363 | } |
| 364 | } else { |
| 365 | if (hdw->freqSlotTelevision == slotId) { |
| 366 | hdw->freqSlotTelevision = 0; |
| 367 | } |
| 368 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 369 | } |
| 370 | return 0; |
| 371 | } |
| 372 | |
| 373 | static int ctrl_channelprog_get(struct pvr2_ctrl *cptr,int *vp) |
| 374 | { |
| 375 | *vp = cptr->hdw->freqProgSlot; |
| 376 | return 0; |
| 377 | } |
| 378 | |
| 379 | static int ctrl_channelprog_set(struct pvr2_ctrl *cptr,int m,int v) |
| 380 | { |
| 381 | struct pvr2_hdw *hdw = cptr->hdw; |
| 382 | if ((v >= 0) && (v <= FREQTABLE_SIZE)) { |
| 383 | hdw->freqProgSlot = v; |
| 384 | } |
| 385 | return 0; |
| 386 | } |
| 387 | |
| 388 | static int ctrl_channel_get(struct pvr2_ctrl *cptr,int *vp) |
| 389 | { |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 390 | struct pvr2_hdw *hdw = cptr->hdw; |
| 391 | *vp = hdw->freqSelector ? hdw->freqSlotRadio : hdw->freqSlotTelevision; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 392 | return 0; |
| 393 | } |
| 394 | |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 395 | static int ctrl_channel_set(struct pvr2_ctrl *cptr,int m,int slotId) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 396 | { |
| 397 | unsigned freq = 0; |
| 398 | struct pvr2_hdw *hdw = cptr->hdw; |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 399 | if ((slotId < 0) || (slotId > FREQTABLE_SIZE)) return 0; |
| 400 | if (slotId > 0) { |
| 401 | freq = hdw->freqTable[slotId-1]; |
| 402 | if (!freq) return 0; |
| 403 | pvr2_hdw_set_cur_freq(hdw,freq); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 404 | } |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 405 | if (hdw->freqSelector) { |
| 406 | hdw->freqSlotRadio = slotId; |
| 407 | } else { |
| 408 | hdw->freqSlotTelevision = slotId; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 409 | } |
| 410 | return 0; |
| 411 | } |
| 412 | |
| 413 | static int ctrl_freq_get(struct pvr2_ctrl *cptr,int *vp) |
| 414 | { |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 415 | *vp = pvr2_hdw_get_cur_freq(cptr->hdw); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 416 | return 0; |
| 417 | } |
| 418 | |
| 419 | static int ctrl_freq_is_dirty(struct pvr2_ctrl *cptr) |
| 420 | { |
| 421 | return cptr->hdw->freqDirty != 0; |
| 422 | } |
| 423 | |
| 424 | static void ctrl_freq_clear_dirty(struct pvr2_ctrl *cptr) |
| 425 | { |
| 426 | cptr->hdw->freqDirty = 0; |
| 427 | } |
| 428 | |
| 429 | static int ctrl_freq_set(struct pvr2_ctrl *cptr,int m,int v) |
| 430 | { |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 431 | pvr2_hdw_set_cur_freq(cptr->hdw,v); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 432 | return 0; |
| 433 | } |
| 434 | |
vdb128@picaros.org | e784bfb | 2008-08-30 18:26:39 -0300 | [diff] [blame] | 435 | static int ctrl_cropl_min_get(struct pvr2_ctrl *cptr, int *left) |
| 436 | { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 437 | struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; |
| 438 | int stat = pvr2_hdw_check_cropcap(cptr->hdw); |
| 439 | if (stat != 0) { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 440 | return stat; |
vdb128@picaros.org | e784bfb | 2008-08-30 18:26:39 -0300 | [diff] [blame] | 441 | } |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 442 | *left = cap->bounds.left; |
vdb128@picaros.org | e784bfb | 2008-08-30 18:26:39 -0300 | [diff] [blame] | 443 | return 0; |
| 444 | } |
| 445 | |
| 446 | static int ctrl_cropl_max_get(struct pvr2_ctrl *cptr, int *left) |
| 447 | { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 448 | struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; |
| 449 | int stat = pvr2_hdw_check_cropcap(cptr->hdw); |
| 450 | if (stat != 0) { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 451 | return stat; |
| 452 | } |
| 453 | *left = cap->bounds.left; |
| 454 | if (cap->bounds.width > cptr->hdw->cropw_val) { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 455 | *left += cap->bounds.width - cptr->hdw->cropw_val; |
vdb128@picaros.org | e784bfb | 2008-08-30 18:26:39 -0300 | [diff] [blame] | 456 | } |
| 457 | return 0; |
| 458 | } |
| 459 | |
| 460 | static int ctrl_cropt_min_get(struct pvr2_ctrl *cptr, int *top) |
| 461 | { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 462 | struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; |
| 463 | int stat = pvr2_hdw_check_cropcap(cptr->hdw); |
| 464 | if (stat != 0) { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 465 | return stat; |
vdb128@picaros.org | e784bfb | 2008-08-30 18:26:39 -0300 | [diff] [blame] | 466 | } |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 467 | *top = cap->bounds.top; |
| 468 | return 0; |
| 469 | } |
| 470 | |
| 471 | static int ctrl_cropt_max_get(struct pvr2_ctrl *cptr, int *top) |
| 472 | { |
| 473 | struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; |
| 474 | int stat = pvr2_hdw_check_cropcap(cptr->hdw); |
| 475 | if (stat != 0) { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 476 | return stat; |
| 477 | } |
| 478 | *top = cap->bounds.top; |
| 479 | if (cap->bounds.height > cptr->hdw->croph_val) { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 480 | *top += cap->bounds.height - cptr->hdw->croph_val; |
| 481 | } |
| 482 | return 0; |
| 483 | } |
| 484 | |
| 485 | static int ctrl_cropw_max_get(struct pvr2_ctrl *cptr, int *val) |
| 486 | { |
| 487 | struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; |
| 488 | int stat = pvr2_hdw_check_cropcap(cptr->hdw); |
| 489 | if (stat != 0) { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 490 | return stat; |
| 491 | } |
| 492 | *val = 0; |
| 493 | if (cap->bounds.width > cptr->hdw->cropl_val) { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 494 | *val = cap->bounds.width - cptr->hdw->cropl_val; |
| 495 | } |
| 496 | return 0; |
| 497 | } |
| 498 | |
| 499 | static int ctrl_croph_max_get(struct pvr2_ctrl *cptr, int *val) |
| 500 | { |
| 501 | struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; |
| 502 | int stat = pvr2_hdw_check_cropcap(cptr->hdw); |
| 503 | if (stat != 0) { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 504 | return stat; |
| 505 | } |
| 506 | *val = 0; |
| 507 | if (cap->bounds.height > cptr->hdw->cropt_val) { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 508 | *val = cap->bounds.height - cptr->hdw->cropt_val; |
| 509 | } |
| 510 | return 0; |
| 511 | } |
| 512 | |
| 513 | static int ctrl_get_cropcapbl(struct pvr2_ctrl *cptr, int *val) |
| 514 | { |
| 515 | struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; |
| 516 | int stat = pvr2_hdw_check_cropcap(cptr->hdw); |
| 517 | if (stat != 0) { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 518 | return stat; |
| 519 | } |
| 520 | *val = cap->bounds.left; |
| 521 | return 0; |
| 522 | } |
| 523 | |
| 524 | static int ctrl_get_cropcapbt(struct pvr2_ctrl *cptr, int *val) |
| 525 | { |
| 526 | struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; |
| 527 | int stat = pvr2_hdw_check_cropcap(cptr->hdw); |
| 528 | if (stat != 0) { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 529 | return stat; |
| 530 | } |
| 531 | *val = cap->bounds.top; |
| 532 | return 0; |
| 533 | } |
| 534 | |
| 535 | static int ctrl_get_cropcapbw(struct pvr2_ctrl *cptr, int *val) |
| 536 | { |
| 537 | struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; |
| 538 | int stat = pvr2_hdw_check_cropcap(cptr->hdw); |
| 539 | if (stat != 0) { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 540 | return stat; |
| 541 | } |
| 542 | *val = cap->bounds.width; |
| 543 | return 0; |
| 544 | } |
| 545 | |
| 546 | static int ctrl_get_cropcapbh(struct pvr2_ctrl *cptr, int *val) |
| 547 | { |
| 548 | struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; |
| 549 | int stat = pvr2_hdw_check_cropcap(cptr->hdw); |
| 550 | if (stat != 0) { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 551 | return stat; |
| 552 | } |
| 553 | *val = cap->bounds.height; |
| 554 | return 0; |
| 555 | } |
| 556 | |
| 557 | static int ctrl_get_cropcapdl(struct pvr2_ctrl *cptr, int *val) |
| 558 | { |
| 559 | struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; |
| 560 | int stat = pvr2_hdw_check_cropcap(cptr->hdw); |
| 561 | if (stat != 0) { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 562 | return stat; |
| 563 | } |
| 564 | *val = cap->defrect.left; |
| 565 | return 0; |
| 566 | } |
| 567 | |
| 568 | static int ctrl_get_cropcapdt(struct pvr2_ctrl *cptr, int *val) |
| 569 | { |
| 570 | struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; |
| 571 | int stat = pvr2_hdw_check_cropcap(cptr->hdw); |
| 572 | if (stat != 0) { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 573 | return stat; |
| 574 | } |
| 575 | *val = cap->defrect.top; |
| 576 | return 0; |
| 577 | } |
| 578 | |
| 579 | static int ctrl_get_cropcapdw(struct pvr2_ctrl *cptr, int *val) |
| 580 | { |
| 581 | struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; |
| 582 | int stat = pvr2_hdw_check_cropcap(cptr->hdw); |
| 583 | if (stat != 0) { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 584 | return stat; |
| 585 | } |
| 586 | *val = cap->defrect.width; |
| 587 | return 0; |
| 588 | } |
| 589 | |
| 590 | static int ctrl_get_cropcapdh(struct pvr2_ctrl *cptr, int *val) |
| 591 | { |
| 592 | struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; |
| 593 | int stat = pvr2_hdw_check_cropcap(cptr->hdw); |
| 594 | if (stat != 0) { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 595 | return stat; |
| 596 | } |
| 597 | *val = cap->defrect.height; |
| 598 | return 0; |
| 599 | } |
| 600 | |
| 601 | static int ctrl_get_cropcappan(struct pvr2_ctrl *cptr, int *val) |
| 602 | { |
| 603 | struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; |
| 604 | int stat = pvr2_hdw_check_cropcap(cptr->hdw); |
| 605 | if (stat != 0) { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 606 | return stat; |
| 607 | } |
| 608 | *val = cap->pixelaspect.numerator; |
| 609 | return 0; |
| 610 | } |
| 611 | |
| 612 | static int ctrl_get_cropcappad(struct pvr2_ctrl *cptr, int *val) |
| 613 | { |
| 614 | struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; |
| 615 | int stat = pvr2_hdw_check_cropcap(cptr->hdw); |
| 616 | if (stat != 0) { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 617 | return stat; |
| 618 | } |
| 619 | *val = cap->pixelaspect.denominator; |
vdb128@picaros.org | e784bfb | 2008-08-30 18:26:39 -0300 | [diff] [blame] | 620 | return 0; |
| 621 | } |
| 622 | |
Mike Isely | 3ad9fc3 | 2006-09-02 22:37:52 -0300 | [diff] [blame] | 623 | static int ctrl_vres_max_get(struct pvr2_ctrl *cptr,int *vp) |
| 624 | { |
| 625 | /* Actual maximum depends on the video standard in effect. */ |
| 626 | if (cptr->hdw->std_mask_cur & V4L2_STD_525_60) { |
| 627 | *vp = 480; |
| 628 | } else { |
| 629 | *vp = 576; |
| 630 | } |
| 631 | return 0; |
| 632 | } |
| 633 | |
| 634 | static int ctrl_vres_min_get(struct pvr2_ctrl *cptr,int *vp) |
| 635 | { |
Mike Isely | 989eb15 | 2007-11-26 01:53:12 -0300 | [diff] [blame] | 636 | /* Actual minimum depends on device digitizer type. */ |
| 637 | if (cptr->hdw->hdw_desc->flag_has_cx25840) { |
Mike Isely | 3ad9fc3 | 2006-09-02 22:37:52 -0300 | [diff] [blame] | 638 | *vp = 75; |
| 639 | } else { |
| 640 | *vp = 17; |
| 641 | } |
| 642 | return 0; |
| 643 | } |
| 644 | |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 645 | static int ctrl_get_input(struct pvr2_ctrl *cptr,int *vp) |
| 646 | { |
| 647 | *vp = cptr->hdw->input_val; |
| 648 | return 0; |
| 649 | } |
| 650 | |
Mike Isely | 29bf5b1 | 2008-04-22 14:45:37 -0300 | [diff] [blame] | 651 | static int ctrl_check_input(struct pvr2_ctrl *cptr,int v) |
| 652 | { |
Mike Isely | 1cb03b7 | 2008-04-21 03:47:43 -0300 | [diff] [blame] | 653 | return ((1 << v) & cptr->hdw->input_allowed_mask) != 0; |
Mike Isely | 29bf5b1 | 2008-04-22 14:45:37 -0300 | [diff] [blame] | 654 | } |
| 655 | |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 656 | static int ctrl_set_input(struct pvr2_ctrl *cptr,int m,int v) |
| 657 | { |
Mike Isely | 1cb03b7 | 2008-04-21 03:47:43 -0300 | [diff] [blame] | 658 | return pvr2_hdw_set_input(cptr->hdw,v); |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 659 | } |
| 660 | |
| 661 | static int ctrl_isdirty_input(struct pvr2_ctrl *cptr) |
| 662 | { |
| 663 | return cptr->hdw->input_dirty != 0; |
| 664 | } |
| 665 | |
| 666 | static void ctrl_cleardirty_input(struct pvr2_ctrl *cptr) |
| 667 | { |
| 668 | cptr->hdw->input_dirty = 0; |
| 669 | } |
| 670 | |
Mike Isely | 5549f54 | 2006-12-27 23:28:54 -0300 | [diff] [blame] | 671 | |
Pantelis Koukousoulas | 25d8527 | 2006-12-27 23:06:04 -0300 | [diff] [blame] | 672 | static int ctrl_freq_max_get(struct pvr2_ctrl *cptr, int *vp) |
| 673 | { |
Mike Isely | 644afdb | 2007-01-20 00:19:23 -0300 | [diff] [blame] | 674 | unsigned long fv; |
| 675 | struct pvr2_hdw *hdw = cptr->hdw; |
| 676 | if (hdw->tuner_signal_stale) { |
Mike Isely | a51f500 | 2009-03-06 23:30:37 -0300 | [diff] [blame] | 677 | pvr2_hdw_status_poll(hdw); |
Pantelis Koukousoulas | 25d8527 | 2006-12-27 23:06:04 -0300 | [diff] [blame] | 678 | } |
Mike Isely | 644afdb | 2007-01-20 00:19:23 -0300 | [diff] [blame] | 679 | fv = hdw->tuner_signal_info.rangehigh; |
| 680 | if (!fv) { |
| 681 | /* Safety fallback */ |
| 682 | *vp = TV_MAX_FREQ; |
| 683 | return 0; |
| 684 | } |
| 685 | if (hdw->tuner_signal_info.capability & V4L2_TUNER_CAP_LOW) { |
| 686 | fv = (fv * 125) / 2; |
| 687 | } else { |
| 688 | fv = fv * 62500; |
| 689 | } |
| 690 | *vp = fv; |
Pantelis Koukousoulas | 25d8527 | 2006-12-27 23:06:04 -0300 | [diff] [blame] | 691 | return 0; |
| 692 | } |
| 693 | |
| 694 | static int ctrl_freq_min_get(struct pvr2_ctrl *cptr, int *vp) |
| 695 | { |
Mike Isely | 644afdb | 2007-01-20 00:19:23 -0300 | [diff] [blame] | 696 | unsigned long fv; |
| 697 | struct pvr2_hdw *hdw = cptr->hdw; |
| 698 | if (hdw->tuner_signal_stale) { |
Mike Isely | a51f500 | 2009-03-06 23:30:37 -0300 | [diff] [blame] | 699 | pvr2_hdw_status_poll(hdw); |
Pantelis Koukousoulas | 25d8527 | 2006-12-27 23:06:04 -0300 | [diff] [blame] | 700 | } |
Mike Isely | 644afdb | 2007-01-20 00:19:23 -0300 | [diff] [blame] | 701 | fv = hdw->tuner_signal_info.rangelow; |
| 702 | if (!fv) { |
| 703 | /* Safety fallback */ |
| 704 | *vp = TV_MIN_FREQ; |
| 705 | return 0; |
| 706 | } |
| 707 | if (hdw->tuner_signal_info.capability & V4L2_TUNER_CAP_LOW) { |
| 708 | fv = (fv * 125) / 2; |
| 709 | } else { |
| 710 | fv = fv * 62500; |
| 711 | } |
| 712 | *vp = fv; |
Pantelis Koukousoulas | 25d8527 | 2006-12-27 23:06:04 -0300 | [diff] [blame] | 713 | return 0; |
| 714 | } |
| 715 | |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 716 | static int ctrl_cx2341x_is_dirty(struct pvr2_ctrl *cptr) |
| 717 | { |
| 718 | return cptr->hdw->enc_stale != 0; |
| 719 | } |
| 720 | |
| 721 | static void ctrl_cx2341x_clear_dirty(struct pvr2_ctrl *cptr) |
| 722 | { |
| 723 | cptr->hdw->enc_stale = 0; |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 724 | cptr->hdw->enc_unsafe_stale = 0; |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 725 | } |
| 726 | |
| 727 | static int ctrl_cx2341x_get(struct pvr2_ctrl *cptr,int *vp) |
| 728 | { |
| 729 | int ret; |
| 730 | struct v4l2_ext_controls cs; |
| 731 | struct v4l2_ext_control c1; |
| 732 | memset(&cs,0,sizeof(cs)); |
| 733 | memset(&c1,0,sizeof(c1)); |
| 734 | cs.controls = &c1; |
| 735 | cs.count = 1; |
| 736 | c1.id = cptr->info->v4l_id; |
Hans Verkuil | 01f1e44 | 2007-08-21 18:32:42 -0300 | [diff] [blame] | 737 | ret = cx2341x_ext_ctrls(&cptr->hdw->enc_ctl_state, 0, &cs, |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 738 | VIDIOC_G_EXT_CTRLS); |
| 739 | if (ret) return ret; |
| 740 | *vp = c1.value; |
| 741 | return 0; |
| 742 | } |
| 743 | |
| 744 | static int ctrl_cx2341x_set(struct pvr2_ctrl *cptr,int m,int v) |
| 745 | { |
| 746 | int ret; |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 747 | struct pvr2_hdw *hdw = cptr->hdw; |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 748 | struct v4l2_ext_controls cs; |
| 749 | struct v4l2_ext_control c1; |
| 750 | memset(&cs,0,sizeof(cs)); |
| 751 | memset(&c1,0,sizeof(c1)); |
| 752 | cs.controls = &c1; |
| 753 | cs.count = 1; |
| 754 | c1.id = cptr->info->v4l_id; |
| 755 | c1.value = v; |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 756 | ret = cx2341x_ext_ctrls(&hdw->enc_ctl_state, |
| 757 | hdw->state_encoder_run, &cs, |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 758 | VIDIOC_S_EXT_CTRLS); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 759 | if (ret == -EBUSY) { |
| 760 | /* Oops. cx2341x is telling us it's not safe to change |
| 761 | this control while we're capturing. Make a note of this |
| 762 | fact so that the pipeline will be stopped the next time |
| 763 | controls are committed. Then go on ahead and store this |
| 764 | change anyway. */ |
| 765 | ret = cx2341x_ext_ctrls(&hdw->enc_ctl_state, |
| 766 | 0, &cs, |
| 767 | VIDIOC_S_EXT_CTRLS); |
| 768 | if (!ret) hdw->enc_unsafe_stale = !0; |
| 769 | } |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 770 | if (ret) return ret; |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 771 | hdw->enc_stale = !0; |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 772 | return 0; |
| 773 | } |
| 774 | |
| 775 | static unsigned int ctrl_cx2341x_getv4lflags(struct pvr2_ctrl *cptr) |
| 776 | { |
| 777 | struct v4l2_queryctrl qctrl; |
| 778 | struct pvr2_ctl_info *info; |
| 779 | qctrl.id = cptr->info->v4l_id; |
| 780 | cx2341x_ctrl_query(&cptr->hdw->enc_ctl_state,&qctrl); |
| 781 | /* Strip out the const so we can adjust a function pointer. It's |
| 782 | OK to do this here because we know this is a dynamically created |
| 783 | control, so the underlying storage for the info pointer is (a) |
| 784 | private to us, and (b) not in read-only storage. Either we do |
| 785 | this or we significantly complicate the underlying control |
| 786 | implementation. */ |
| 787 | info = (struct pvr2_ctl_info *)(cptr->info); |
| 788 | if (qctrl.flags & V4L2_CTRL_FLAG_READ_ONLY) { |
| 789 | if (info->set_value) { |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 790 | info->set_value = NULL; |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 791 | } |
| 792 | } else { |
| 793 | if (!(info->set_value)) { |
| 794 | info->set_value = ctrl_cx2341x_set; |
| 795 | } |
| 796 | } |
| 797 | return qctrl.flags; |
| 798 | } |
| 799 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 800 | static int ctrl_streamingenabled_get(struct pvr2_ctrl *cptr,int *vp) |
| 801 | { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 802 | *vp = cptr->hdw->state_pipeline_req; |
| 803 | return 0; |
| 804 | } |
| 805 | |
| 806 | static int ctrl_masterstate_get(struct pvr2_ctrl *cptr,int *vp) |
| 807 | { |
| 808 | *vp = cptr->hdw->master_state; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 809 | return 0; |
| 810 | } |
| 811 | |
| 812 | static int ctrl_hsm_get(struct pvr2_ctrl *cptr,int *vp) |
| 813 | { |
| 814 | int result = pvr2_hdw_is_hsm(cptr->hdw); |
| 815 | *vp = PVR2_CVAL_HSM_FULL; |
| 816 | if (result < 0) *vp = PVR2_CVAL_HSM_FAIL; |
| 817 | if (result) *vp = PVR2_CVAL_HSM_HIGH; |
| 818 | return 0; |
| 819 | } |
| 820 | |
| 821 | static int ctrl_stdavail_get(struct pvr2_ctrl *cptr,int *vp) |
| 822 | { |
| 823 | *vp = cptr->hdw->std_mask_avail; |
| 824 | return 0; |
| 825 | } |
| 826 | |
| 827 | static int ctrl_stdavail_set(struct pvr2_ctrl *cptr,int m,int v) |
| 828 | { |
| 829 | struct pvr2_hdw *hdw = cptr->hdw; |
| 830 | v4l2_std_id ns; |
| 831 | ns = hdw->std_mask_avail; |
| 832 | ns = (ns & ~m) | (v & m); |
| 833 | if (ns == hdw->std_mask_avail) return 0; |
| 834 | hdw->std_mask_avail = ns; |
| 835 | pvr2_hdw_internal_set_std_avail(hdw); |
| 836 | pvr2_hdw_internal_find_stdenum(hdw); |
| 837 | return 0; |
| 838 | } |
| 839 | |
| 840 | static int ctrl_std_val_to_sym(struct pvr2_ctrl *cptr,int msk,int val, |
| 841 | char *bufPtr,unsigned int bufSize, |
| 842 | unsigned int *len) |
| 843 | { |
| 844 | *len = pvr2_std_id_to_str(bufPtr,bufSize,msk & val); |
| 845 | return 0; |
| 846 | } |
| 847 | |
| 848 | static int ctrl_std_sym_to_val(struct pvr2_ctrl *cptr, |
| 849 | const char *bufPtr,unsigned int bufSize, |
| 850 | int *mskp,int *valp) |
| 851 | { |
| 852 | int ret; |
| 853 | v4l2_std_id id; |
| 854 | ret = pvr2_std_str_to_id(&id,bufPtr,bufSize); |
| 855 | if (ret < 0) return ret; |
| 856 | if (mskp) *mskp = id; |
| 857 | if (valp) *valp = id; |
| 858 | return 0; |
| 859 | } |
| 860 | |
| 861 | static int ctrl_stdcur_get(struct pvr2_ctrl *cptr,int *vp) |
| 862 | { |
| 863 | *vp = cptr->hdw->std_mask_cur; |
| 864 | return 0; |
| 865 | } |
| 866 | |
| 867 | static int ctrl_stdcur_set(struct pvr2_ctrl *cptr,int m,int v) |
| 868 | { |
| 869 | struct pvr2_hdw *hdw = cptr->hdw; |
| 870 | v4l2_std_id ns; |
| 871 | ns = hdw->std_mask_cur; |
| 872 | ns = (ns & ~m) | (v & m); |
| 873 | if (ns == hdw->std_mask_cur) return 0; |
| 874 | hdw->std_mask_cur = ns; |
| 875 | hdw->std_dirty = !0; |
| 876 | pvr2_hdw_internal_find_stdenum(hdw); |
| 877 | return 0; |
| 878 | } |
| 879 | |
| 880 | static int ctrl_stdcur_is_dirty(struct pvr2_ctrl *cptr) |
| 881 | { |
| 882 | return cptr->hdw->std_dirty != 0; |
| 883 | } |
| 884 | |
| 885 | static void ctrl_stdcur_clear_dirty(struct pvr2_ctrl *cptr) |
| 886 | { |
| 887 | cptr->hdw->std_dirty = 0; |
| 888 | } |
| 889 | |
| 890 | static int ctrl_signal_get(struct pvr2_ctrl *cptr,int *vp) |
| 891 | { |
Mike Isely | 18103c57 | 2007-01-20 00:09:47 -0300 | [diff] [blame] | 892 | struct pvr2_hdw *hdw = cptr->hdw; |
Mike Isely | a51f500 | 2009-03-06 23:30:37 -0300 | [diff] [blame] | 893 | pvr2_hdw_status_poll(hdw); |
Mike Isely | 18103c57 | 2007-01-20 00:09:47 -0300 | [diff] [blame] | 894 | *vp = hdw->tuner_signal_info.signal; |
| 895 | return 0; |
| 896 | } |
| 897 | |
| 898 | static int ctrl_audio_modes_present_get(struct pvr2_ctrl *cptr,int *vp) |
| 899 | { |
| 900 | int val = 0; |
| 901 | unsigned int subchan; |
| 902 | struct pvr2_hdw *hdw = cptr->hdw; |
Mike Isely | a51f500 | 2009-03-06 23:30:37 -0300 | [diff] [blame] | 903 | pvr2_hdw_status_poll(hdw); |
Mike Isely | 18103c57 | 2007-01-20 00:09:47 -0300 | [diff] [blame] | 904 | subchan = hdw->tuner_signal_info.rxsubchans; |
| 905 | if (subchan & V4L2_TUNER_SUB_MONO) { |
| 906 | val |= (1 << V4L2_TUNER_MODE_MONO); |
| 907 | } |
| 908 | if (subchan & V4L2_TUNER_SUB_STEREO) { |
| 909 | val |= (1 << V4L2_TUNER_MODE_STEREO); |
| 910 | } |
| 911 | if (subchan & V4L2_TUNER_SUB_LANG1) { |
| 912 | val |= (1 << V4L2_TUNER_MODE_LANG1); |
| 913 | } |
| 914 | if (subchan & V4L2_TUNER_SUB_LANG2) { |
| 915 | val |= (1 << V4L2_TUNER_MODE_LANG2); |
| 916 | } |
| 917 | *vp = val; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 918 | return 0; |
| 919 | } |
| 920 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 921 | |
| 922 | static int ctrl_stdenumcur_set(struct pvr2_ctrl *cptr,int m,int v) |
| 923 | { |
| 924 | struct pvr2_hdw *hdw = cptr->hdw; |
| 925 | if (v < 0) return -EINVAL; |
| 926 | if (v > hdw->std_enum_cnt) return -EINVAL; |
| 927 | hdw->std_enum_cur = v; |
| 928 | if (!v) return 0; |
| 929 | v--; |
| 930 | if (hdw->std_mask_cur == hdw->std_defs[v].id) return 0; |
| 931 | hdw->std_mask_cur = hdw->std_defs[v].id; |
| 932 | hdw->std_dirty = !0; |
| 933 | return 0; |
| 934 | } |
| 935 | |
| 936 | |
| 937 | static int ctrl_stdenumcur_get(struct pvr2_ctrl *cptr,int *vp) |
| 938 | { |
| 939 | *vp = cptr->hdw->std_enum_cur; |
| 940 | return 0; |
| 941 | } |
| 942 | |
| 943 | |
| 944 | static int ctrl_stdenumcur_is_dirty(struct pvr2_ctrl *cptr) |
| 945 | { |
| 946 | return cptr->hdw->std_dirty != 0; |
| 947 | } |
| 948 | |
| 949 | |
| 950 | static void ctrl_stdenumcur_clear_dirty(struct pvr2_ctrl *cptr) |
| 951 | { |
| 952 | cptr->hdw->std_dirty = 0; |
| 953 | } |
| 954 | |
| 955 | |
| 956 | #define DEFINT(vmin,vmax) \ |
| 957 | .type = pvr2_ctl_int, \ |
| 958 | .def.type_int.min_value = vmin, \ |
| 959 | .def.type_int.max_value = vmax |
| 960 | |
| 961 | #define DEFENUM(tab) \ |
| 962 | .type = pvr2_ctl_enum, \ |
Mike Isely | 27c7b71 | 2007-01-20 00:39:17 -0300 | [diff] [blame] | 963 | .def.type_enum.count = ARRAY_SIZE(tab), \ |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 964 | .def.type_enum.value_names = tab |
| 965 | |
Mike Isely | 3321396 | 2006-06-25 20:04:40 -0300 | [diff] [blame] | 966 | #define DEFBOOL \ |
| 967 | .type = pvr2_ctl_bool |
| 968 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 969 | #define DEFMASK(msk,tab) \ |
| 970 | .type = pvr2_ctl_bitmask, \ |
| 971 | .def.type_bitmask.valid_bits = msk, \ |
| 972 | .def.type_bitmask.bit_names = tab |
| 973 | |
| 974 | #define DEFREF(vname) \ |
| 975 | .set_value = ctrl_set_##vname, \ |
| 976 | .get_value = ctrl_get_##vname, \ |
| 977 | .is_dirty = ctrl_isdirty_##vname, \ |
| 978 | .clear_dirty = ctrl_cleardirty_##vname |
| 979 | |
| 980 | |
| 981 | #define VCREATE_FUNCS(vname) \ |
| 982 | static int ctrl_get_##vname(struct pvr2_ctrl *cptr,int *vp) \ |
| 983 | {*vp = cptr->hdw->vname##_val; return 0;} \ |
| 984 | static int ctrl_set_##vname(struct pvr2_ctrl *cptr,int m,int v) \ |
| 985 | {cptr->hdw->vname##_val = v; cptr->hdw->vname##_dirty = !0; return 0;} \ |
| 986 | static int ctrl_isdirty_##vname(struct pvr2_ctrl *cptr) \ |
| 987 | {return cptr->hdw->vname##_dirty != 0;} \ |
| 988 | static void ctrl_cleardirty_##vname(struct pvr2_ctrl *cptr) \ |
| 989 | {cptr->hdw->vname##_dirty = 0;} |
| 990 | |
| 991 | VCREATE_FUNCS(brightness) |
| 992 | VCREATE_FUNCS(contrast) |
| 993 | VCREATE_FUNCS(saturation) |
| 994 | VCREATE_FUNCS(hue) |
| 995 | VCREATE_FUNCS(volume) |
| 996 | VCREATE_FUNCS(balance) |
| 997 | VCREATE_FUNCS(bass) |
| 998 | VCREATE_FUNCS(treble) |
| 999 | VCREATE_FUNCS(mute) |
vdb128@picaros.org | e784bfb | 2008-08-30 18:26:39 -0300 | [diff] [blame] | 1000 | VCREATE_FUNCS(cropl) |
| 1001 | VCREATE_FUNCS(cropt) |
| 1002 | VCREATE_FUNCS(cropw) |
| 1003 | VCREATE_FUNCS(croph) |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 1004 | VCREATE_FUNCS(audiomode) |
| 1005 | VCREATE_FUNCS(res_hor) |
| 1006 | VCREATE_FUNCS(res_ver) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1007 | VCREATE_FUNCS(srate) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1008 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1009 | /* Table definition of all controls which can be manipulated */ |
| 1010 | static const struct pvr2_ctl_info control_defs[] = { |
| 1011 | { |
| 1012 | .v4l_id = V4L2_CID_BRIGHTNESS, |
| 1013 | .desc = "Brightness", |
| 1014 | .name = "brightness", |
| 1015 | .default_value = 128, |
| 1016 | DEFREF(brightness), |
| 1017 | DEFINT(0,255), |
| 1018 | },{ |
| 1019 | .v4l_id = V4L2_CID_CONTRAST, |
| 1020 | .desc = "Contrast", |
| 1021 | .name = "contrast", |
| 1022 | .default_value = 68, |
| 1023 | DEFREF(contrast), |
| 1024 | DEFINT(0,127), |
| 1025 | },{ |
| 1026 | .v4l_id = V4L2_CID_SATURATION, |
| 1027 | .desc = "Saturation", |
| 1028 | .name = "saturation", |
| 1029 | .default_value = 64, |
| 1030 | DEFREF(saturation), |
| 1031 | DEFINT(0,127), |
| 1032 | },{ |
| 1033 | .v4l_id = V4L2_CID_HUE, |
| 1034 | .desc = "Hue", |
| 1035 | .name = "hue", |
| 1036 | .default_value = 0, |
| 1037 | DEFREF(hue), |
| 1038 | DEFINT(-128,127), |
| 1039 | },{ |
| 1040 | .v4l_id = V4L2_CID_AUDIO_VOLUME, |
| 1041 | .desc = "Volume", |
| 1042 | .name = "volume", |
Mike Isely | 139eecf | 2006-12-27 23:36:33 -0300 | [diff] [blame] | 1043 | .default_value = 62000, |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1044 | DEFREF(volume), |
| 1045 | DEFINT(0,65535), |
| 1046 | },{ |
| 1047 | .v4l_id = V4L2_CID_AUDIO_BALANCE, |
| 1048 | .desc = "Balance", |
| 1049 | .name = "balance", |
| 1050 | .default_value = 0, |
| 1051 | DEFREF(balance), |
| 1052 | DEFINT(-32768,32767), |
| 1053 | },{ |
| 1054 | .v4l_id = V4L2_CID_AUDIO_BASS, |
| 1055 | .desc = "Bass", |
| 1056 | .name = "bass", |
| 1057 | .default_value = 0, |
| 1058 | DEFREF(bass), |
| 1059 | DEFINT(-32768,32767), |
| 1060 | },{ |
| 1061 | .v4l_id = V4L2_CID_AUDIO_TREBLE, |
| 1062 | .desc = "Treble", |
| 1063 | .name = "treble", |
| 1064 | .default_value = 0, |
| 1065 | DEFREF(treble), |
| 1066 | DEFINT(-32768,32767), |
| 1067 | },{ |
| 1068 | .v4l_id = V4L2_CID_AUDIO_MUTE, |
| 1069 | .desc = "Mute", |
| 1070 | .name = "mute", |
| 1071 | .default_value = 0, |
| 1072 | DEFREF(mute), |
Mike Isely | 3321396 | 2006-06-25 20:04:40 -0300 | [diff] [blame] | 1073 | DEFBOOL, |
vdb128@picaros.org | e784bfb | 2008-08-30 18:26:39 -0300 | [diff] [blame] | 1074 | }, { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 1075 | .desc = "Capture crop left margin", |
vdb128@picaros.org | e784bfb | 2008-08-30 18:26:39 -0300 | [diff] [blame] | 1076 | .name = "crop_left", |
| 1077 | .internal_id = PVR2_CID_CROPL, |
| 1078 | .default_value = 0, |
| 1079 | DEFREF(cropl), |
| 1080 | DEFINT(-129, 340), |
| 1081 | .get_min_value = ctrl_cropl_min_get, |
| 1082 | .get_max_value = ctrl_cropl_max_get, |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 1083 | .get_def_value = ctrl_get_cropcapdl, |
vdb128@picaros.org | e784bfb | 2008-08-30 18:26:39 -0300 | [diff] [blame] | 1084 | }, { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 1085 | .desc = "Capture crop top margin", |
vdb128@picaros.org | e784bfb | 2008-08-30 18:26:39 -0300 | [diff] [blame] | 1086 | .name = "crop_top", |
| 1087 | .internal_id = PVR2_CID_CROPT, |
| 1088 | .default_value = 0, |
| 1089 | DEFREF(cropt), |
| 1090 | DEFINT(-35, 544), |
| 1091 | .get_min_value = ctrl_cropt_min_get, |
| 1092 | .get_max_value = ctrl_cropt_max_get, |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 1093 | .get_def_value = ctrl_get_cropcapdt, |
vdb128@picaros.org | e784bfb | 2008-08-30 18:26:39 -0300 | [diff] [blame] | 1094 | }, { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 1095 | .desc = "Capture crop width", |
vdb128@picaros.org | e784bfb | 2008-08-30 18:26:39 -0300 | [diff] [blame] | 1096 | .name = "crop_width", |
| 1097 | .internal_id = PVR2_CID_CROPW, |
| 1098 | .default_value = 720, |
| 1099 | DEFREF(cropw), |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 1100 | .get_max_value = ctrl_cropw_max_get, |
| 1101 | .get_def_value = ctrl_get_cropcapdw, |
vdb128@picaros.org | e784bfb | 2008-08-30 18:26:39 -0300 | [diff] [blame] | 1102 | }, { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 1103 | .desc = "Capture crop height", |
vdb128@picaros.org | e784bfb | 2008-08-30 18:26:39 -0300 | [diff] [blame] | 1104 | .name = "crop_height", |
| 1105 | .internal_id = PVR2_CID_CROPH, |
| 1106 | .default_value = 480, |
| 1107 | DEFREF(croph), |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 1108 | .get_max_value = ctrl_croph_max_get, |
| 1109 | .get_def_value = ctrl_get_cropcapdh, |
| 1110 | }, { |
| 1111 | .desc = "Capture capability pixel aspect numerator", |
| 1112 | .name = "cropcap_pixel_numerator", |
| 1113 | .internal_id = PVR2_CID_CROPCAPPAN, |
| 1114 | .get_value = ctrl_get_cropcappan, |
| 1115 | }, { |
| 1116 | .desc = "Capture capability pixel aspect denominator", |
| 1117 | .name = "cropcap_pixel_denominator", |
| 1118 | .internal_id = PVR2_CID_CROPCAPPAD, |
| 1119 | .get_value = ctrl_get_cropcappad, |
| 1120 | }, { |
| 1121 | .desc = "Capture capability bounds top", |
| 1122 | .name = "cropcap_bounds_top", |
| 1123 | .internal_id = PVR2_CID_CROPCAPBT, |
| 1124 | .get_value = ctrl_get_cropcapbt, |
| 1125 | }, { |
| 1126 | .desc = "Capture capability bounds left", |
| 1127 | .name = "cropcap_bounds_left", |
| 1128 | .internal_id = PVR2_CID_CROPCAPBL, |
| 1129 | .get_value = ctrl_get_cropcapbl, |
| 1130 | }, { |
| 1131 | .desc = "Capture capability bounds width", |
| 1132 | .name = "cropcap_bounds_width", |
| 1133 | .internal_id = PVR2_CID_CROPCAPBW, |
| 1134 | .get_value = ctrl_get_cropcapbw, |
| 1135 | }, { |
| 1136 | .desc = "Capture capability bounds height", |
| 1137 | .name = "cropcap_bounds_height", |
| 1138 | .internal_id = PVR2_CID_CROPCAPBH, |
| 1139 | .get_value = ctrl_get_cropcapbh, |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1140 | },{ |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 1141 | .desc = "Video Source", |
| 1142 | .name = "input", |
| 1143 | .internal_id = PVR2_CID_INPUT, |
| 1144 | .default_value = PVR2_CVAL_INPUT_TV, |
Mike Isely | 29bf5b1 | 2008-04-22 14:45:37 -0300 | [diff] [blame] | 1145 | .check_value = ctrl_check_input, |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 1146 | DEFREF(input), |
| 1147 | DEFENUM(control_values_input), |
| 1148 | },{ |
| 1149 | .desc = "Audio Mode", |
| 1150 | .name = "audio_mode", |
| 1151 | .internal_id = PVR2_CID_AUDIOMODE, |
| 1152 | .default_value = V4L2_TUNER_MODE_STEREO, |
| 1153 | DEFREF(audiomode), |
| 1154 | DEFENUM(control_values_audiomode), |
| 1155 | },{ |
| 1156 | .desc = "Horizontal capture resolution", |
| 1157 | .name = "resolution_hor", |
| 1158 | .internal_id = PVR2_CID_HRES, |
| 1159 | .default_value = 720, |
| 1160 | DEFREF(res_hor), |
Mike Isely | 3ad9fc3 | 2006-09-02 22:37:52 -0300 | [diff] [blame] | 1161 | DEFINT(19,720), |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 1162 | },{ |
| 1163 | .desc = "Vertical capture resolution", |
| 1164 | .name = "resolution_ver", |
| 1165 | .internal_id = PVR2_CID_VRES, |
| 1166 | .default_value = 480, |
| 1167 | DEFREF(res_ver), |
Mike Isely | 3ad9fc3 | 2006-09-02 22:37:52 -0300 | [diff] [blame] | 1168 | DEFINT(17,576), |
| 1169 | /* Hook in check for video standard and adjust maximum |
| 1170 | depending on the standard. */ |
| 1171 | .get_max_value = ctrl_vres_max_get, |
| 1172 | .get_min_value = ctrl_vres_min_get, |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 1173 | },{ |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 1174 | .v4l_id = V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ, |
Mike Isely | 434449f | 2006-08-08 09:10:06 -0300 | [diff] [blame] | 1175 | .default_value = V4L2_MPEG_AUDIO_SAMPLING_FREQ_48000, |
| 1176 | .desc = "Audio Sampling Frequency", |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1177 | .name = "srate", |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1178 | DEFREF(srate), |
| 1179 | DEFENUM(control_values_srate), |
| 1180 | },{ |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1181 | .desc = "Tuner Frequency (Hz)", |
| 1182 | .name = "frequency", |
| 1183 | .internal_id = PVR2_CID_FREQUENCY, |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 1184 | .default_value = 0, |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1185 | .set_value = ctrl_freq_set, |
| 1186 | .get_value = ctrl_freq_get, |
| 1187 | .is_dirty = ctrl_freq_is_dirty, |
| 1188 | .clear_dirty = ctrl_freq_clear_dirty, |
Mike Isely | 644afdb | 2007-01-20 00:19:23 -0300 | [diff] [blame] | 1189 | DEFINT(0,0), |
Pantelis Koukousoulas | 25d8527 | 2006-12-27 23:06:04 -0300 | [diff] [blame] | 1190 | /* Hook in check for input value (tv/radio) and adjust |
| 1191 | max/min values accordingly */ |
| 1192 | .get_max_value = ctrl_freq_max_get, |
| 1193 | .get_min_value = ctrl_freq_min_get, |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1194 | },{ |
| 1195 | .desc = "Channel", |
| 1196 | .name = "channel", |
| 1197 | .set_value = ctrl_channel_set, |
| 1198 | .get_value = ctrl_channel_get, |
| 1199 | DEFINT(0,FREQTABLE_SIZE), |
| 1200 | },{ |
| 1201 | .desc = "Channel Program Frequency", |
| 1202 | .name = "freq_table_value", |
| 1203 | .set_value = ctrl_channelfreq_set, |
| 1204 | .get_value = ctrl_channelfreq_get, |
Mike Isely | 644afdb | 2007-01-20 00:19:23 -0300 | [diff] [blame] | 1205 | DEFINT(0,0), |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 1206 | /* Hook in check for input value (tv/radio) and adjust |
| 1207 | max/min values accordingly */ |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 1208 | .get_max_value = ctrl_freq_max_get, |
| 1209 | .get_min_value = ctrl_freq_min_get, |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1210 | },{ |
| 1211 | .desc = "Channel Program ID", |
| 1212 | .name = "freq_table_channel", |
| 1213 | .set_value = ctrl_channelprog_set, |
| 1214 | .get_value = ctrl_channelprog_get, |
| 1215 | DEFINT(0,FREQTABLE_SIZE), |
| 1216 | },{ |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1217 | .desc = "Streaming Enabled", |
| 1218 | .name = "streaming_enabled", |
| 1219 | .get_value = ctrl_streamingenabled_get, |
Mike Isely | 3321396 | 2006-06-25 20:04:40 -0300 | [diff] [blame] | 1220 | DEFBOOL, |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1221 | },{ |
| 1222 | .desc = "USB Speed", |
| 1223 | .name = "usb_speed", |
| 1224 | .get_value = ctrl_hsm_get, |
| 1225 | DEFENUM(control_values_hsm), |
| 1226 | },{ |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1227 | .desc = "Master State", |
| 1228 | .name = "master_state", |
| 1229 | .get_value = ctrl_masterstate_get, |
| 1230 | DEFENUM(pvr2_state_names), |
| 1231 | },{ |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1232 | .desc = "Signal Present", |
| 1233 | .name = "signal_present", |
| 1234 | .get_value = ctrl_signal_get, |
Mike Isely | 18103c57 | 2007-01-20 00:09:47 -0300 | [diff] [blame] | 1235 | DEFINT(0,65535), |
| 1236 | },{ |
| 1237 | .desc = "Audio Modes Present", |
| 1238 | .name = "audio_modes_present", |
| 1239 | .get_value = ctrl_audio_modes_present_get, |
| 1240 | /* For this type we "borrow" the V4L2_TUNER_MODE enum from |
| 1241 | v4l. Nothing outside of this module cares about this, |
| 1242 | but I reuse it in order to also reuse the |
| 1243 | control_values_audiomode string table. */ |
| 1244 | DEFMASK(((1 << V4L2_TUNER_MODE_MONO)| |
| 1245 | (1 << V4L2_TUNER_MODE_STEREO)| |
| 1246 | (1 << V4L2_TUNER_MODE_LANG1)| |
| 1247 | (1 << V4L2_TUNER_MODE_LANG2)), |
| 1248 | control_values_audiomode), |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1249 | },{ |
| 1250 | .desc = "Video Standards Available Mask", |
| 1251 | .name = "video_standard_mask_available", |
| 1252 | .internal_id = PVR2_CID_STDAVAIL, |
| 1253 | .skip_init = !0, |
| 1254 | .get_value = ctrl_stdavail_get, |
| 1255 | .set_value = ctrl_stdavail_set, |
| 1256 | .val_to_sym = ctrl_std_val_to_sym, |
| 1257 | .sym_to_val = ctrl_std_sym_to_val, |
| 1258 | .type = pvr2_ctl_bitmask, |
| 1259 | },{ |
| 1260 | .desc = "Video Standards In Use Mask", |
| 1261 | .name = "video_standard_mask_active", |
| 1262 | .internal_id = PVR2_CID_STDCUR, |
| 1263 | .skip_init = !0, |
| 1264 | .get_value = ctrl_stdcur_get, |
| 1265 | .set_value = ctrl_stdcur_set, |
| 1266 | .is_dirty = ctrl_stdcur_is_dirty, |
| 1267 | .clear_dirty = ctrl_stdcur_clear_dirty, |
| 1268 | .val_to_sym = ctrl_std_val_to_sym, |
| 1269 | .sym_to_val = ctrl_std_sym_to_val, |
| 1270 | .type = pvr2_ctl_bitmask, |
| 1271 | },{ |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1272 | .desc = "Video Standard Name", |
| 1273 | .name = "video_standard", |
| 1274 | .internal_id = PVR2_CID_STDENUM, |
| 1275 | .skip_init = !0, |
| 1276 | .get_value = ctrl_stdenumcur_get, |
| 1277 | .set_value = ctrl_stdenumcur_set, |
| 1278 | .is_dirty = ctrl_stdenumcur_is_dirty, |
| 1279 | .clear_dirty = ctrl_stdenumcur_clear_dirty, |
| 1280 | .type = pvr2_ctl_enum, |
| 1281 | } |
| 1282 | }; |
| 1283 | |
Ahmed S. Darwish | eca8ebf | 2007-01-20 00:35:03 -0300 | [diff] [blame] | 1284 | #define CTRLDEF_COUNT ARRAY_SIZE(control_defs) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1285 | |
| 1286 | |
| 1287 | const char *pvr2_config_get_name(enum pvr2_config cfg) |
| 1288 | { |
| 1289 | switch (cfg) { |
| 1290 | case pvr2_config_empty: return "empty"; |
| 1291 | case pvr2_config_mpeg: return "mpeg"; |
| 1292 | case pvr2_config_vbi: return "vbi"; |
Mike Isely | 16eb40d | 2006-12-30 18:27:32 -0300 | [diff] [blame] | 1293 | case pvr2_config_pcm: return "pcm"; |
| 1294 | case pvr2_config_rawvideo: return "raw video"; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1295 | } |
| 1296 | return "<unknown>"; |
| 1297 | } |
| 1298 | |
| 1299 | |
| 1300 | struct usb_device *pvr2_hdw_get_dev(struct pvr2_hdw *hdw) |
| 1301 | { |
| 1302 | return hdw->usb_dev; |
| 1303 | } |
| 1304 | |
| 1305 | |
| 1306 | unsigned long pvr2_hdw_get_sn(struct pvr2_hdw *hdw) |
| 1307 | { |
| 1308 | return hdw->serial_number; |
| 1309 | } |
| 1310 | |
Mike Isely | 31a1854 | 2007-04-08 01:11:47 -0300 | [diff] [blame] | 1311 | |
| 1312 | const char *pvr2_hdw_get_bus_info(struct pvr2_hdw *hdw) |
| 1313 | { |
| 1314 | return hdw->bus_info; |
| 1315 | } |
| 1316 | |
| 1317 | |
Mike Isely | 13a8879 | 2009-01-14 04:22:56 -0300 | [diff] [blame] | 1318 | const char *pvr2_hdw_get_device_identifier(struct pvr2_hdw *hdw) |
| 1319 | { |
| 1320 | return hdw->identifier; |
| 1321 | } |
| 1322 | |
| 1323 | |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 1324 | unsigned long pvr2_hdw_get_cur_freq(struct pvr2_hdw *hdw) |
| 1325 | { |
| 1326 | return hdw->freqSelector ? hdw->freqValTelevision : hdw->freqValRadio; |
| 1327 | } |
| 1328 | |
| 1329 | /* Set the currently tuned frequency and account for all possible |
| 1330 | driver-core side effects of this action. */ |
Adrian Bunk | f55a871 | 2008-04-18 05:38:56 -0300 | [diff] [blame] | 1331 | static void pvr2_hdw_set_cur_freq(struct pvr2_hdw *hdw,unsigned long val) |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 1332 | { |
Mike Isely | 7c74e57 | 2007-01-20 00:15:41 -0300 | [diff] [blame] | 1333 | if (hdw->input_val == PVR2_CVAL_INPUT_RADIO) { |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 1334 | if (hdw->freqSelector) { |
| 1335 | /* Swing over to radio frequency selection */ |
| 1336 | hdw->freqSelector = 0; |
| 1337 | hdw->freqDirty = !0; |
| 1338 | } |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 1339 | if (hdw->freqValRadio != val) { |
| 1340 | hdw->freqValRadio = val; |
| 1341 | hdw->freqSlotRadio = 0; |
Mike Isely | 7c74e57 | 2007-01-20 00:15:41 -0300 | [diff] [blame] | 1342 | hdw->freqDirty = !0; |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 1343 | } |
Mike Isely | 7c74e57 | 2007-01-20 00:15:41 -0300 | [diff] [blame] | 1344 | } else { |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 1345 | if (!(hdw->freqSelector)) { |
| 1346 | /* Swing over to television frequency selection */ |
| 1347 | hdw->freqSelector = 1; |
| 1348 | hdw->freqDirty = !0; |
| 1349 | } |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 1350 | if (hdw->freqValTelevision != val) { |
| 1351 | hdw->freqValTelevision = val; |
| 1352 | hdw->freqSlotTelevision = 0; |
Mike Isely | 7c74e57 | 2007-01-20 00:15:41 -0300 | [diff] [blame] | 1353 | hdw->freqDirty = !0; |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 1354 | } |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 1355 | } |
| 1356 | } |
| 1357 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1358 | int pvr2_hdw_get_unit_number(struct pvr2_hdw *hdw) |
| 1359 | { |
| 1360 | return hdw->unit_number; |
| 1361 | } |
| 1362 | |
| 1363 | |
| 1364 | /* Attempt to locate one of the given set of files. Messages are logged |
| 1365 | appropriate to what has been found. The return value will be 0 or |
| 1366 | greater on success (it will be the index of the file name found) and |
| 1367 | fw_entry will be filled in. Otherwise a negative error is returned on |
| 1368 | failure. If the return value is -ENOENT then no viable firmware file |
| 1369 | could be located. */ |
| 1370 | static int pvr2_locate_firmware(struct pvr2_hdw *hdw, |
| 1371 | const struct firmware **fw_entry, |
| 1372 | const char *fwtypename, |
| 1373 | unsigned int fwcount, |
| 1374 | const char *fwnames[]) |
| 1375 | { |
| 1376 | unsigned int idx; |
| 1377 | int ret = -EINVAL; |
| 1378 | for (idx = 0; idx < fwcount; idx++) { |
| 1379 | ret = request_firmware(fw_entry, |
| 1380 | fwnames[idx], |
| 1381 | &hdw->usb_dev->dev); |
| 1382 | if (!ret) { |
| 1383 | trace_firmware("Located %s firmware: %s;" |
| 1384 | " uploading...", |
| 1385 | fwtypename, |
| 1386 | fwnames[idx]); |
| 1387 | return idx; |
| 1388 | } |
| 1389 | if (ret == -ENOENT) continue; |
| 1390 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1391 | "request_firmware fatal error with code=%d",ret); |
| 1392 | return ret; |
| 1393 | } |
| 1394 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1395 | "***WARNING***" |
| 1396 | " Device %s firmware" |
| 1397 | " seems to be missing.", |
| 1398 | fwtypename); |
| 1399 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1400 | "Did you install the pvrusb2 firmware files" |
| 1401 | " in their proper location?"); |
| 1402 | if (fwcount == 1) { |
| 1403 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1404 | "request_firmware unable to locate %s file %s", |
| 1405 | fwtypename,fwnames[0]); |
| 1406 | } else { |
| 1407 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1408 | "request_firmware unable to locate" |
| 1409 | " one of the following %s files:", |
| 1410 | fwtypename); |
| 1411 | for (idx = 0; idx < fwcount; idx++) { |
| 1412 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1413 | "request_firmware: Failed to find %s", |
| 1414 | fwnames[idx]); |
| 1415 | } |
| 1416 | } |
| 1417 | return ret; |
| 1418 | } |
| 1419 | |
| 1420 | |
| 1421 | /* |
| 1422 | * pvr2_upload_firmware1(). |
| 1423 | * |
| 1424 | * Send the 8051 firmware to the device. After the upload, arrange for |
| 1425 | * device to re-enumerate. |
| 1426 | * |
| 1427 | * NOTE : the pointer to the firmware data given by request_firmware() |
| 1428 | * is not suitable for an usb transaction. |
| 1429 | * |
| 1430 | */ |
Adrian Bunk | 07e337e | 2006-06-30 11:30:20 -0300 | [diff] [blame] | 1431 | static int pvr2_upload_firmware1(struct pvr2_hdw *hdw) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1432 | { |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 1433 | const struct firmware *fw_entry = NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1434 | void *fw_ptr; |
| 1435 | unsigned int pipe; |
| 1436 | int ret; |
| 1437 | u16 address; |
Mike Isely | 1d643a3 | 2007-09-08 22:18:50 -0300 | [diff] [blame] | 1438 | |
Mike Isely | 989eb15 | 2007-11-26 01:53:12 -0300 | [diff] [blame] | 1439 | if (!hdw->hdw_desc->fx2_firmware.cnt) { |
Mike Isely | 1d643a3 | 2007-09-08 22:18:50 -0300 | [diff] [blame] | 1440 | hdw->fw1_state = FW1_STATE_OK; |
Mike Isely | 56dcbfa | 2007-11-26 02:00:51 -0300 | [diff] [blame] | 1441 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1442 | "Connected device type defines" |
| 1443 | " no firmware to upload; ignoring firmware"); |
| 1444 | return -ENOTTY; |
Mike Isely | 1d643a3 | 2007-09-08 22:18:50 -0300 | [diff] [blame] | 1445 | } |
| 1446 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1447 | hdw->fw1_state = FW1_STATE_FAILED; // default result |
| 1448 | |
| 1449 | trace_firmware("pvr2_upload_firmware1"); |
| 1450 | |
| 1451 | ret = pvr2_locate_firmware(hdw,&fw_entry,"fx2 controller", |
Mike Isely | 989eb15 | 2007-11-26 01:53:12 -0300 | [diff] [blame] | 1452 | hdw->hdw_desc->fx2_firmware.cnt, |
| 1453 | hdw->hdw_desc->fx2_firmware.lst); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1454 | if (ret < 0) { |
| 1455 | if (ret == -ENOENT) hdw->fw1_state = FW1_STATE_MISSING; |
| 1456 | return ret; |
| 1457 | } |
| 1458 | |
| 1459 | usb_settoggle(hdw->usb_dev, 0 & 0xf, !(0 & USB_DIR_IN), 0); |
| 1460 | usb_clear_halt(hdw->usb_dev, usb_sndbulkpipe(hdw->usb_dev, 0 & 0x7f)); |
| 1461 | |
| 1462 | pipe = usb_sndctrlpipe(hdw->usb_dev, 0); |
| 1463 | |
| 1464 | if (fw_entry->size != 0x2000){ |
| 1465 | pvr2_trace(PVR2_TRACE_ERROR_LEGS,"wrong fx2 firmware size"); |
| 1466 | release_firmware(fw_entry); |
| 1467 | return -ENOMEM; |
| 1468 | } |
| 1469 | |
| 1470 | fw_ptr = kmalloc(0x800, GFP_KERNEL); |
| 1471 | if (fw_ptr == NULL){ |
| 1472 | release_firmware(fw_entry); |
| 1473 | return -ENOMEM; |
| 1474 | } |
| 1475 | |
| 1476 | /* We have to hold the CPU during firmware upload. */ |
| 1477 | pvr2_hdw_cpureset_assert(hdw,1); |
| 1478 | |
| 1479 | /* upload the firmware to address 0000-1fff in 2048 (=0x800) bytes |
| 1480 | chunk. */ |
| 1481 | |
| 1482 | ret = 0; |
| 1483 | for(address = 0; address < fw_entry->size; address += 0x800) { |
| 1484 | memcpy(fw_ptr, fw_entry->data + address, 0x800); |
| 1485 | ret += usb_control_msg(hdw->usb_dev, pipe, 0xa0, 0x40, address, |
| 1486 | 0, fw_ptr, 0x800, HZ); |
| 1487 | } |
| 1488 | |
| 1489 | trace_firmware("Upload done, releasing device's CPU"); |
| 1490 | |
| 1491 | /* Now release the CPU. It will disconnect and reconnect later. */ |
| 1492 | pvr2_hdw_cpureset_assert(hdw,0); |
| 1493 | |
| 1494 | kfree(fw_ptr); |
| 1495 | release_firmware(fw_entry); |
| 1496 | |
| 1497 | trace_firmware("Upload done (%d bytes sent)",ret); |
| 1498 | |
| 1499 | /* We should have written 8192 bytes */ |
| 1500 | if (ret == 8192) { |
| 1501 | hdw->fw1_state = FW1_STATE_RELOAD; |
| 1502 | return 0; |
| 1503 | } |
| 1504 | |
| 1505 | return -EIO; |
| 1506 | } |
| 1507 | |
| 1508 | |
| 1509 | /* |
| 1510 | * pvr2_upload_firmware2() |
| 1511 | * |
| 1512 | * This uploads encoder firmware on endpoint 2. |
| 1513 | * |
| 1514 | */ |
| 1515 | |
| 1516 | int pvr2_upload_firmware2(struct pvr2_hdw *hdw) |
| 1517 | { |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 1518 | const struct firmware *fw_entry = NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1519 | void *fw_ptr; |
Mike Isely | 90060d3 | 2007-02-08 02:02:53 -0300 | [diff] [blame] | 1520 | unsigned int pipe, fw_len, fw_done, bcnt, icnt; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1521 | int actual_length; |
| 1522 | int ret = 0; |
| 1523 | int fwidx; |
| 1524 | static const char *fw_files[] = { |
| 1525 | CX2341X_FIRM_ENC_FILENAME, |
| 1526 | }; |
| 1527 | |
Mike Isely | 989eb15 | 2007-11-26 01:53:12 -0300 | [diff] [blame] | 1528 | if (hdw->hdw_desc->flag_skip_cx23416_firmware) { |
Mike Isely | 1d643a3 | 2007-09-08 22:18:50 -0300 | [diff] [blame] | 1529 | return 0; |
| 1530 | } |
| 1531 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1532 | trace_firmware("pvr2_upload_firmware2"); |
| 1533 | |
| 1534 | ret = pvr2_locate_firmware(hdw,&fw_entry,"encoder", |
Ahmed S. Darwish | eca8ebf | 2007-01-20 00:35:03 -0300 | [diff] [blame] | 1535 | ARRAY_SIZE(fw_files), fw_files); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1536 | if (ret < 0) return ret; |
| 1537 | fwidx = ret; |
| 1538 | ret = 0; |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 1539 | /* Since we're about to completely reinitialize the encoder, |
| 1540 | invalidate our cached copy of its configuration state. Next |
| 1541 | time we configure the encoder, then we'll fully configure it. */ |
| 1542 | hdw->enc_cur_valid = 0; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1543 | |
Mike Isely | d913d63 | 2008-04-06 04:04:35 -0300 | [diff] [blame] | 1544 | /* Encoder is about to be reset so note that as far as we're |
| 1545 | concerned now, the encoder has never been run. */ |
| 1546 | del_timer_sync(&hdw->encoder_run_timer); |
| 1547 | if (hdw->state_encoder_runok) { |
| 1548 | hdw->state_encoder_runok = 0; |
| 1549 | trace_stbit("state_encoder_runok",hdw->state_encoder_runok); |
| 1550 | } |
| 1551 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1552 | /* First prepare firmware loading */ |
| 1553 | ret |= pvr2_write_register(hdw, 0x0048, 0xffffffff); /*interrupt mask*/ |
| 1554 | ret |= pvr2_hdw_gpio_chg_dir(hdw,0xffffffff,0x00000088); /*gpio dir*/ |
| 1555 | ret |= pvr2_hdw_gpio_chg_out(hdw,0xffffffff,0x00000008); /*gpio output state*/ |
| 1556 | ret |= pvr2_hdw_cmd_deep_reset(hdw); |
| 1557 | ret |= pvr2_write_register(hdw, 0xa064, 0x00000000); /*APU command*/ |
| 1558 | ret |= pvr2_hdw_gpio_chg_dir(hdw,0xffffffff,0x00000408); /*gpio dir*/ |
| 1559 | ret |= pvr2_hdw_gpio_chg_out(hdw,0xffffffff,0x00000008); /*gpio output state*/ |
| 1560 | ret |= pvr2_write_register(hdw, 0x9058, 0xffffffed); /*VPU ctrl*/ |
| 1561 | ret |= pvr2_write_register(hdw, 0x9054, 0xfffffffd); /*reset hw blocks*/ |
| 1562 | ret |= pvr2_write_register(hdw, 0x07f8, 0x80000800); /*encoder SDRAM refresh*/ |
| 1563 | ret |= pvr2_write_register(hdw, 0x07fc, 0x0000001a); /*encoder SDRAM pre-charge*/ |
| 1564 | ret |= pvr2_write_register(hdw, 0x0700, 0x00000000); /*I2C clock*/ |
| 1565 | ret |= pvr2_write_register(hdw, 0xaa00, 0x00000000); /*unknown*/ |
| 1566 | ret |= pvr2_write_register(hdw, 0xaa04, 0x00057810); /*unknown*/ |
| 1567 | ret |= pvr2_write_register(hdw, 0xaa10, 0x00148500); /*unknown*/ |
| 1568 | ret |= pvr2_write_register(hdw, 0xaa18, 0x00840000); /*unknown*/ |
Mike Isely | 1c9d10d | 2008-03-28 05:38:54 -0300 | [diff] [blame] | 1569 | ret |= pvr2_issue_simple_cmd(hdw,FX2CMD_FWPOST1); |
| 1570 | ret |= pvr2_issue_simple_cmd(hdw,FX2CMD_MEMSEL | (1 << 8) | (0 << 16)); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1571 | |
| 1572 | if (ret) { |
| 1573 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1574 | "firmware2 upload prep failed, ret=%d",ret); |
| 1575 | release_firmware(fw_entry); |
Mike Isely | 21684ba | 2008-04-21 03:49:33 -0300 | [diff] [blame] | 1576 | goto done; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1577 | } |
| 1578 | |
| 1579 | /* Now send firmware */ |
| 1580 | |
| 1581 | fw_len = fw_entry->size; |
| 1582 | |
Mike Isely | 90060d3 | 2007-02-08 02:02:53 -0300 | [diff] [blame] | 1583 | if (fw_len % sizeof(u32)) { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1584 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1585 | "size of %s firmware" |
Mike Isely | 48dc30a | 2007-03-03 10:13:05 -0200 | [diff] [blame] | 1586 | " must be a multiple of %zu bytes", |
Mike Isely | 90060d3 | 2007-02-08 02:02:53 -0300 | [diff] [blame] | 1587 | fw_files[fwidx],sizeof(u32)); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1588 | release_firmware(fw_entry); |
Mike Isely | 21684ba | 2008-04-21 03:49:33 -0300 | [diff] [blame] | 1589 | ret = -EINVAL; |
| 1590 | goto done; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1591 | } |
| 1592 | |
| 1593 | fw_ptr = kmalloc(FIRMWARE_CHUNK_SIZE, GFP_KERNEL); |
| 1594 | if (fw_ptr == NULL){ |
| 1595 | release_firmware(fw_entry); |
| 1596 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1597 | "failed to allocate memory for firmware2 upload"); |
Mike Isely | 21684ba | 2008-04-21 03:49:33 -0300 | [diff] [blame] | 1598 | ret = -ENOMEM; |
| 1599 | goto done; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1600 | } |
| 1601 | |
| 1602 | pipe = usb_sndbulkpipe(hdw->usb_dev, PVR2_FIRMWARE_ENDPOINT); |
| 1603 | |
Mike Isely | 90060d3 | 2007-02-08 02:02:53 -0300 | [diff] [blame] | 1604 | fw_done = 0; |
| 1605 | for (fw_done = 0; fw_done < fw_len;) { |
| 1606 | bcnt = fw_len - fw_done; |
| 1607 | if (bcnt > FIRMWARE_CHUNK_SIZE) bcnt = FIRMWARE_CHUNK_SIZE; |
| 1608 | memcpy(fw_ptr, fw_entry->data + fw_done, bcnt); |
| 1609 | /* Usbsnoop log shows that we must swap bytes... */ |
Mike Isely | 5f33df1 | 2008-08-30 15:09:31 -0300 | [diff] [blame] | 1610 | /* Some background info: The data being swapped here is a |
| 1611 | firmware image destined for the mpeg encoder chip that |
| 1612 | lives at the other end of a USB endpoint. The encoder |
| 1613 | chip always talks in 32 bit chunks and its storage is |
| 1614 | organized into 32 bit words. However from the file |
| 1615 | system to the encoder chip everything is purely a byte |
| 1616 | stream. The firmware file's contents are always 32 bit |
| 1617 | swapped from what the encoder expects. Thus the need |
| 1618 | always exists to swap the bytes regardless of the endian |
| 1619 | type of the host processor and therefore swab32() makes |
| 1620 | the most sense. */ |
Mike Isely | 90060d3 | 2007-02-08 02:02:53 -0300 | [diff] [blame] | 1621 | for (icnt = 0; icnt < bcnt/4 ; icnt++) |
Harvey Harrison | 513edce | 2008-08-18 17:38:01 -0300 | [diff] [blame] | 1622 | ((u32 *)fw_ptr)[icnt] = swab32(((u32 *)fw_ptr)[icnt]); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1623 | |
Mike Isely | 90060d3 | 2007-02-08 02:02:53 -0300 | [diff] [blame] | 1624 | ret |= usb_bulk_msg(hdw->usb_dev, pipe, fw_ptr,bcnt, |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1625 | &actual_length, HZ); |
Mike Isely | 90060d3 | 2007-02-08 02:02:53 -0300 | [diff] [blame] | 1626 | ret |= (actual_length != bcnt); |
| 1627 | if (ret) break; |
| 1628 | fw_done += bcnt; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1629 | } |
| 1630 | |
| 1631 | trace_firmware("upload of %s : %i / %i ", |
| 1632 | fw_files[fwidx],fw_done,fw_len); |
| 1633 | |
| 1634 | kfree(fw_ptr); |
| 1635 | release_firmware(fw_entry); |
| 1636 | |
| 1637 | if (ret) { |
| 1638 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1639 | "firmware2 upload transfer failure"); |
Mike Isely | 21684ba | 2008-04-21 03:49:33 -0300 | [diff] [blame] | 1640 | goto done; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1641 | } |
| 1642 | |
| 1643 | /* Finish upload */ |
| 1644 | |
| 1645 | ret |= pvr2_write_register(hdw, 0x9054, 0xffffffff); /*reset hw blocks*/ |
| 1646 | ret |= pvr2_write_register(hdw, 0x9058, 0xffffffe8); /*VPU ctrl*/ |
Mike Isely | 1c9d10d | 2008-03-28 05:38:54 -0300 | [diff] [blame] | 1647 | ret |= pvr2_issue_simple_cmd(hdw,FX2CMD_MEMSEL | (1 << 8) | (0 << 16)); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1648 | |
| 1649 | if (ret) { |
| 1650 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1651 | "firmware2 upload post-proc failure"); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1652 | } |
Mike Isely | 21684ba | 2008-04-21 03:49:33 -0300 | [diff] [blame] | 1653 | |
| 1654 | done: |
Mike Isely | 1df59f0 | 2008-04-21 03:50:39 -0300 | [diff] [blame] | 1655 | if (hdw->hdw_desc->signal_routing_scheme == |
| 1656 | PVR2_ROUTING_SCHEME_GOTVIEW) { |
| 1657 | /* Ensure that GPIO 11 is set to output for GOTVIEW |
| 1658 | hardware. */ |
| 1659 | pvr2_hdw_gpio_chg_dir(hdw,(1 << 11),~0); |
| 1660 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1661 | return ret; |
| 1662 | } |
| 1663 | |
| 1664 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1665 | static const char *pvr2_get_state_name(unsigned int st) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1666 | { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1667 | if (st < ARRAY_SIZE(pvr2_state_names)) { |
| 1668 | return pvr2_state_names[st]; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1669 | } |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1670 | return "???"; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1671 | } |
| 1672 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1673 | static int pvr2_decoder_enable(struct pvr2_hdw *hdw,int enablefl) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1674 | { |
Mike Isely | af78e16 | 2009-03-07 00:21:30 -0300 | [diff] [blame] | 1675 | if (hdw->decoder_ctrl) { |
| 1676 | hdw->decoder_ctrl->enable(hdw->decoder_ctrl->ctxt, enablefl); |
| 1677 | return 0; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1678 | } |
Mike Isely | af78e16 | 2009-03-07 00:21:30 -0300 | [diff] [blame] | 1679 | /* Even though we really only care about the video decoder chip at |
| 1680 | this point, we'll broadcast stream on/off to all sub-devices |
| 1681 | anyway, just in case somebody else wants to hear the |
| 1682 | command... */ |
| 1683 | v4l2_device_call_all(&hdw->v4l2_dev, 0, video, s_stream, enablefl); |
| 1684 | if (hdw->decoder_client_id) { |
| 1685 | /* We get here if the encoder has been noticed. Otherwise |
| 1686 | we'll issue a warning to the user (which should |
| 1687 | normally never happen). */ |
| 1688 | return 0; |
| 1689 | } |
| 1690 | if (!hdw->flag_decoder_missed) { |
| 1691 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1692 | "WARNING: No decoder present"); |
| 1693 | hdw->flag_decoder_missed = !0; |
| 1694 | trace_stbit("flag_decoder_missed", |
| 1695 | hdw->flag_decoder_missed); |
| 1696 | } |
| 1697 | return -EIO; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1698 | } |
| 1699 | |
| 1700 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1701 | void pvr2_hdw_set_decoder(struct pvr2_hdw *hdw,struct pvr2_decoder_ctrl *ptr) |
| 1702 | { |
| 1703 | if (hdw->decoder_ctrl == ptr) return; |
| 1704 | hdw->decoder_ctrl = ptr; |
| 1705 | if (hdw->decoder_ctrl && hdw->flag_decoder_missed) { |
| 1706 | hdw->flag_decoder_missed = 0; |
| 1707 | trace_stbit("flag_decoder_missed", |
| 1708 | hdw->flag_decoder_missed); |
| 1709 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1710 | "Decoder has appeared"); |
| 1711 | pvr2_hdw_state_sched(hdw); |
| 1712 | } |
| 1713 | } |
| 1714 | |
| 1715 | |
| 1716 | int pvr2_hdw_get_state(struct pvr2_hdw *hdw) |
| 1717 | { |
| 1718 | return hdw->master_state; |
| 1719 | } |
| 1720 | |
| 1721 | |
| 1722 | static int pvr2_hdw_untrip_unlocked(struct pvr2_hdw *hdw) |
| 1723 | { |
| 1724 | if (!hdw->flag_tripped) return 0; |
| 1725 | hdw->flag_tripped = 0; |
| 1726 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1727 | "Clearing driver error statuss"); |
| 1728 | return !0; |
| 1729 | } |
| 1730 | |
| 1731 | |
| 1732 | int pvr2_hdw_untrip(struct pvr2_hdw *hdw) |
| 1733 | { |
| 1734 | int fl; |
| 1735 | LOCK_TAKE(hdw->big_lock); do { |
| 1736 | fl = pvr2_hdw_untrip_unlocked(hdw); |
| 1737 | } while (0); LOCK_GIVE(hdw->big_lock); |
| 1738 | if (fl) pvr2_hdw_state_sched(hdw); |
| 1739 | return 0; |
| 1740 | } |
| 1741 | |
| 1742 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1743 | |
| 1744 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1745 | int pvr2_hdw_get_streaming(struct pvr2_hdw *hdw) |
| 1746 | { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1747 | return hdw->state_pipeline_req != 0; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1748 | } |
| 1749 | |
| 1750 | |
| 1751 | int pvr2_hdw_set_streaming(struct pvr2_hdw *hdw,int enable_flag) |
| 1752 | { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1753 | int ret,st; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1754 | LOCK_TAKE(hdw->big_lock); do { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1755 | pvr2_hdw_untrip_unlocked(hdw); |
| 1756 | if ((!enable_flag) != !(hdw->state_pipeline_req)) { |
| 1757 | hdw->state_pipeline_req = enable_flag != 0; |
| 1758 | pvr2_trace(PVR2_TRACE_START_STOP, |
| 1759 | "/*--TRACE_STREAM--*/ %s", |
| 1760 | enable_flag ? "enable" : "disable"); |
| 1761 | } |
| 1762 | pvr2_hdw_state_sched(hdw); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1763 | } while (0); LOCK_GIVE(hdw->big_lock); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1764 | if ((ret = pvr2_hdw_wait(hdw,0)) < 0) return ret; |
| 1765 | if (enable_flag) { |
| 1766 | while ((st = hdw->master_state) != PVR2_STATE_RUN) { |
| 1767 | if (st != PVR2_STATE_READY) return -EIO; |
| 1768 | if ((ret = pvr2_hdw_wait(hdw,st)) < 0) return ret; |
| 1769 | } |
| 1770 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1771 | return 0; |
| 1772 | } |
| 1773 | |
| 1774 | |
| 1775 | int pvr2_hdw_set_stream_type(struct pvr2_hdw *hdw,enum pvr2_config config) |
| 1776 | { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1777 | int fl; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1778 | LOCK_TAKE(hdw->big_lock); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1779 | if ((fl = (hdw->desired_stream_type != config)) != 0) { |
| 1780 | hdw->desired_stream_type = config; |
| 1781 | hdw->state_pipeline_config = 0; |
| 1782 | trace_stbit("state_pipeline_config", |
| 1783 | hdw->state_pipeline_config); |
| 1784 | pvr2_hdw_state_sched(hdw); |
| 1785 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1786 | LOCK_GIVE(hdw->big_lock); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1787 | if (fl) return 0; |
| 1788 | return pvr2_hdw_wait(hdw,0); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1789 | } |
| 1790 | |
| 1791 | |
| 1792 | static int get_default_tuner_type(struct pvr2_hdw *hdw) |
| 1793 | { |
| 1794 | int unit_number = hdw->unit_number; |
| 1795 | int tp = -1; |
| 1796 | if ((unit_number >= 0) && (unit_number < PVR_NUM)) { |
| 1797 | tp = tuner[unit_number]; |
| 1798 | } |
| 1799 | if (tp < 0) return -EINVAL; |
| 1800 | hdw->tuner_type = tp; |
Mike Isely | aaf7884 | 2007-11-26 02:04:11 -0300 | [diff] [blame] | 1801 | hdw->tuner_updated = !0; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1802 | return 0; |
| 1803 | } |
| 1804 | |
| 1805 | |
| 1806 | static v4l2_std_id get_default_standard(struct pvr2_hdw *hdw) |
| 1807 | { |
| 1808 | int unit_number = hdw->unit_number; |
| 1809 | int tp = 0; |
| 1810 | if ((unit_number >= 0) && (unit_number < PVR_NUM)) { |
| 1811 | tp = video_std[unit_number]; |
Mike Isely | 6a54025 | 2007-12-02 23:51:34 -0300 | [diff] [blame] | 1812 | if (tp) return tp; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1813 | } |
Mike Isely | 6a54025 | 2007-12-02 23:51:34 -0300 | [diff] [blame] | 1814 | return 0; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1815 | } |
| 1816 | |
| 1817 | |
| 1818 | static unsigned int get_default_error_tolerance(struct pvr2_hdw *hdw) |
| 1819 | { |
| 1820 | int unit_number = hdw->unit_number; |
| 1821 | int tp = 0; |
| 1822 | if ((unit_number >= 0) && (unit_number < PVR_NUM)) { |
| 1823 | tp = tolerance[unit_number]; |
| 1824 | } |
| 1825 | return tp; |
| 1826 | } |
| 1827 | |
| 1828 | |
| 1829 | static int pvr2_hdw_check_firmware(struct pvr2_hdw *hdw) |
| 1830 | { |
| 1831 | /* Try a harmless request to fetch the eeprom's address over |
| 1832 | endpoint 1. See what happens. Only the full FX2 image can |
| 1833 | respond to this. If this probe fails then likely the FX2 |
| 1834 | firmware needs be loaded. */ |
| 1835 | int result; |
| 1836 | LOCK_TAKE(hdw->ctl_lock); do { |
Michael Krufky | 8d36436 | 2007-01-22 02:17:55 -0300 | [diff] [blame] | 1837 | hdw->cmd_buffer[0] = FX2CMD_GET_EEPROM_ADDR; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1838 | result = pvr2_send_request_ex(hdw,HZ*1,!0, |
| 1839 | hdw->cmd_buffer,1, |
| 1840 | hdw->cmd_buffer,1); |
| 1841 | if (result < 0) break; |
| 1842 | } while(0); LOCK_GIVE(hdw->ctl_lock); |
| 1843 | if (result) { |
| 1844 | pvr2_trace(PVR2_TRACE_INIT, |
| 1845 | "Probe of device endpoint 1 result status %d", |
| 1846 | result); |
| 1847 | } else { |
| 1848 | pvr2_trace(PVR2_TRACE_INIT, |
| 1849 | "Probe of device endpoint 1 succeeded"); |
| 1850 | } |
| 1851 | return result == 0; |
| 1852 | } |
| 1853 | |
Mike Isely | 9f66d4e | 2007-09-08 22:28:51 -0300 | [diff] [blame] | 1854 | struct pvr2_std_hack { |
| 1855 | v4l2_std_id pat; /* Pattern to match */ |
| 1856 | v4l2_std_id msk; /* Which bits we care about */ |
| 1857 | v4l2_std_id std; /* What additional standards or default to set */ |
| 1858 | }; |
| 1859 | |
| 1860 | /* This data structure labels specific combinations of standards from |
| 1861 | tveeprom that we'll try to recognize. If we recognize one, then assume |
| 1862 | a specified default standard to use. This is here because tveeprom only |
| 1863 | tells us about available standards not the intended default standard (if |
| 1864 | any) for the device in question. We guess the default based on what has |
| 1865 | been reported as available. Note that this is only for guessing a |
| 1866 | default - which can always be overridden explicitly - and if the user |
| 1867 | has otherwise named a default then that default will always be used in |
| 1868 | place of this table. */ |
Tobias Klauser | ebff033 | 2008-04-22 14:45:45 -0300 | [diff] [blame] | 1869 | static const struct pvr2_std_hack std_eeprom_maps[] = { |
Mike Isely | 9f66d4e | 2007-09-08 22:28:51 -0300 | [diff] [blame] | 1870 | { /* PAL(B/G) */ |
| 1871 | .pat = V4L2_STD_B|V4L2_STD_GH, |
| 1872 | .std = V4L2_STD_PAL_B|V4L2_STD_PAL_B1|V4L2_STD_PAL_G, |
| 1873 | }, |
| 1874 | { /* NTSC(M) */ |
| 1875 | .pat = V4L2_STD_MN, |
| 1876 | .std = V4L2_STD_NTSC_M, |
| 1877 | }, |
| 1878 | { /* PAL(I) */ |
| 1879 | .pat = V4L2_STD_PAL_I, |
| 1880 | .std = V4L2_STD_PAL_I, |
| 1881 | }, |
| 1882 | { /* SECAM(L/L') */ |
| 1883 | .pat = V4L2_STD_SECAM_L|V4L2_STD_SECAM_LC, |
| 1884 | .std = V4L2_STD_SECAM_L|V4L2_STD_SECAM_LC, |
| 1885 | }, |
| 1886 | { /* PAL(D/D1/K) */ |
| 1887 | .pat = V4L2_STD_DK, |
Roel Kluin | ea2562d | 2007-12-02 23:04:57 -0300 | [diff] [blame] | 1888 | .std = V4L2_STD_PAL_D|V4L2_STD_PAL_D1|V4L2_STD_PAL_K, |
Mike Isely | 9f66d4e | 2007-09-08 22:28:51 -0300 | [diff] [blame] | 1889 | }, |
| 1890 | }; |
| 1891 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1892 | static void pvr2_hdw_setup_std(struct pvr2_hdw *hdw) |
| 1893 | { |
| 1894 | char buf[40]; |
| 1895 | unsigned int bcnt; |
Mike Isely | 3d290bd | 2007-12-03 01:47:12 -0300 | [diff] [blame] | 1896 | v4l2_std_id std1,std2,std3; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1897 | |
| 1898 | std1 = get_default_standard(hdw); |
Mike Isely | 3d290bd | 2007-12-03 01:47:12 -0300 | [diff] [blame] | 1899 | std3 = std1 ? 0 : hdw->hdw_desc->default_std_mask; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1900 | |
| 1901 | bcnt = pvr2_std_id_to_str(buf,sizeof(buf),hdw->std_mask_eeprom); |
Mike Isely | 5658538 | 2007-09-08 22:32:12 -0300 | [diff] [blame] | 1902 | pvr2_trace(PVR2_TRACE_STD, |
Mike Isely | 56dcbfa | 2007-11-26 02:00:51 -0300 | [diff] [blame] | 1903 | "Supported video standard(s) reported available" |
| 1904 | " in hardware: %.*s", |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1905 | bcnt,buf); |
| 1906 | |
| 1907 | hdw->std_mask_avail = hdw->std_mask_eeprom; |
| 1908 | |
Mike Isely | 3d290bd | 2007-12-03 01:47:12 -0300 | [diff] [blame] | 1909 | std2 = (std1|std3) & ~hdw->std_mask_avail; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1910 | if (std2) { |
| 1911 | bcnt = pvr2_std_id_to_str(buf,sizeof(buf),std2); |
Mike Isely | 5658538 | 2007-09-08 22:32:12 -0300 | [diff] [blame] | 1912 | pvr2_trace(PVR2_TRACE_STD, |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1913 | "Expanding supported video standards" |
| 1914 | " to include: %.*s", |
| 1915 | bcnt,buf); |
| 1916 | hdw->std_mask_avail |= std2; |
| 1917 | } |
| 1918 | |
| 1919 | pvr2_hdw_internal_set_std_avail(hdw); |
| 1920 | |
| 1921 | if (std1) { |
| 1922 | bcnt = pvr2_std_id_to_str(buf,sizeof(buf),std1); |
Mike Isely | 5658538 | 2007-09-08 22:32:12 -0300 | [diff] [blame] | 1923 | pvr2_trace(PVR2_TRACE_STD, |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1924 | "Initial video standard forced to %.*s", |
| 1925 | bcnt,buf); |
| 1926 | hdw->std_mask_cur = std1; |
| 1927 | hdw->std_dirty = !0; |
| 1928 | pvr2_hdw_internal_find_stdenum(hdw); |
| 1929 | return; |
| 1930 | } |
Mike Isely | 3d290bd | 2007-12-03 01:47:12 -0300 | [diff] [blame] | 1931 | if (std3) { |
| 1932 | bcnt = pvr2_std_id_to_str(buf,sizeof(buf),std3); |
| 1933 | pvr2_trace(PVR2_TRACE_STD, |
| 1934 | "Initial video standard" |
| 1935 | " (determined by device type): %.*s",bcnt,buf); |
| 1936 | hdw->std_mask_cur = std3; |
| 1937 | hdw->std_dirty = !0; |
| 1938 | pvr2_hdw_internal_find_stdenum(hdw); |
| 1939 | return; |
| 1940 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1941 | |
Mike Isely | 9f66d4e | 2007-09-08 22:28:51 -0300 | [diff] [blame] | 1942 | { |
| 1943 | unsigned int idx; |
| 1944 | for (idx = 0; idx < ARRAY_SIZE(std_eeprom_maps); idx++) { |
| 1945 | if (std_eeprom_maps[idx].msk ? |
| 1946 | ((std_eeprom_maps[idx].pat ^ |
| 1947 | hdw->std_mask_eeprom) & |
| 1948 | std_eeprom_maps[idx].msk) : |
| 1949 | (std_eeprom_maps[idx].pat != |
| 1950 | hdw->std_mask_eeprom)) continue; |
| 1951 | bcnt = pvr2_std_id_to_str(buf,sizeof(buf), |
| 1952 | std_eeprom_maps[idx].std); |
Mike Isely | 5658538 | 2007-09-08 22:32:12 -0300 | [diff] [blame] | 1953 | pvr2_trace(PVR2_TRACE_STD, |
Mike Isely | 9f66d4e | 2007-09-08 22:28:51 -0300 | [diff] [blame] | 1954 | "Initial video standard guessed as %.*s", |
| 1955 | bcnt,buf); |
| 1956 | hdw->std_mask_cur = std_eeprom_maps[idx].std; |
| 1957 | hdw->std_dirty = !0; |
| 1958 | pvr2_hdw_internal_find_stdenum(hdw); |
| 1959 | return; |
| 1960 | } |
| 1961 | } |
| 1962 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1963 | if (hdw->std_enum_cnt > 1) { |
| 1964 | // Autoselect the first listed standard |
| 1965 | hdw->std_enum_cur = 1; |
| 1966 | hdw->std_mask_cur = hdw->std_defs[hdw->std_enum_cur-1].id; |
| 1967 | hdw->std_dirty = !0; |
Mike Isely | 5658538 | 2007-09-08 22:32:12 -0300 | [diff] [blame] | 1968 | pvr2_trace(PVR2_TRACE_STD, |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1969 | "Initial video standard auto-selected to %s", |
| 1970 | hdw->std_defs[hdw->std_enum_cur-1].name); |
| 1971 | return; |
| 1972 | } |
| 1973 | |
Mike Isely | 0885ba1 | 2006-06-25 21:30:47 -0300 | [diff] [blame] | 1974 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1975 | "Unable to select a viable initial video standard"); |
| 1976 | } |
| 1977 | |
| 1978 | |
Mike Isely | e9c64a7 | 2009-03-06 23:42:20 -0300 | [diff] [blame] | 1979 | static unsigned int pvr2_copy_i2c_addr_list( |
| 1980 | unsigned short *dst, const unsigned char *src, |
| 1981 | unsigned int dst_max) |
| 1982 | { |
Mike Isely | 3ab8d29 | 2009-03-07 01:37:58 -0300 | [diff] [blame] | 1983 | unsigned int cnt = 0; |
Mike Isely | e9c64a7 | 2009-03-06 23:42:20 -0300 | [diff] [blame] | 1984 | if (!src) return 0; |
| 1985 | while (src[cnt] && (cnt + 1) < dst_max) { |
| 1986 | dst[cnt] = src[cnt]; |
| 1987 | cnt++; |
| 1988 | } |
| 1989 | dst[cnt] = I2C_CLIENT_END; |
| 1990 | return cnt; |
| 1991 | } |
| 1992 | |
| 1993 | |
Mike Isely | 1ab5e74 | 2009-03-07 00:24:24 -0300 | [diff] [blame] | 1994 | static int pvr2_hdw_load_subdev(struct pvr2_hdw *hdw, |
| 1995 | const struct pvr2_device_client_desc *cd) |
Mike Isely | e9c64a7 | 2009-03-06 23:42:20 -0300 | [diff] [blame] | 1996 | { |
| 1997 | const char *fname; |
| 1998 | unsigned char mid; |
| 1999 | struct v4l2_subdev *sd; |
| 2000 | unsigned int i2ccnt; |
| 2001 | const unsigned char *p; |
| 2002 | /* Arbitrary count - max # i2c addresses we will probe */ |
| 2003 | unsigned short i2caddr[25]; |
| 2004 | |
| 2005 | mid = cd->module_id; |
| 2006 | fname = (mid < ARRAY_SIZE(module_names)) ? module_names[mid] : NULL; |
| 2007 | if (!fname) { |
| 2008 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
Mike Isely | 1ab5e74 | 2009-03-07 00:24:24 -0300 | [diff] [blame] | 2009 | "Module ID %u for device %s has no name", |
Mike Isely | e9c64a7 | 2009-03-06 23:42:20 -0300 | [diff] [blame] | 2010 | mid, |
| 2011 | hdw->hdw_desc->description); |
Mike Isely | 1ab5e74 | 2009-03-07 00:24:24 -0300 | [diff] [blame] | 2012 | return -EINVAL; |
Mike Isely | e9c64a7 | 2009-03-06 23:42:20 -0300 | [diff] [blame] | 2013 | } |
Mike Isely | bd14d4f | 2009-03-07 00:56:52 -0300 | [diff] [blame] | 2014 | pvr2_trace(PVR2_TRACE_INIT, |
| 2015 | "Module ID %u (%s) for device %s being loaded...", |
| 2016 | mid, fname, |
| 2017 | hdw->hdw_desc->description); |
Mike Isely | e9c64a7 | 2009-03-06 23:42:20 -0300 | [diff] [blame] | 2018 | |
| 2019 | i2ccnt = pvr2_copy_i2c_addr_list(i2caddr, cd->i2c_address_list, |
| 2020 | ARRAY_SIZE(i2caddr)); |
| 2021 | if (!i2ccnt && ((p = (mid < ARRAY_SIZE(module_i2c_addresses)) ? |
| 2022 | module_i2c_addresses[mid] : NULL) != NULL)) { |
| 2023 | /* Second chance: Try default i2c address list */ |
| 2024 | i2ccnt = pvr2_copy_i2c_addr_list(i2caddr, p, |
| 2025 | ARRAY_SIZE(i2caddr)); |
Mike Isely | bd14d4f | 2009-03-07 00:56:52 -0300 | [diff] [blame] | 2026 | if (i2ccnt) { |
| 2027 | pvr2_trace(PVR2_TRACE_INIT, |
| 2028 | "Module ID %u:" |
| 2029 | " Using default i2c address list", |
| 2030 | mid); |
| 2031 | } |
Mike Isely | e9c64a7 | 2009-03-06 23:42:20 -0300 | [diff] [blame] | 2032 | } |
| 2033 | |
| 2034 | if (!i2ccnt) { |
| 2035 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
Mike Isely | 1ab5e74 | 2009-03-07 00:24:24 -0300 | [diff] [blame] | 2036 | "Module ID %u (%s) for device %s:" |
| 2037 | " No i2c addresses", |
| 2038 | mid, fname, hdw->hdw_desc->description); |
| 2039 | return -EINVAL; |
Mike Isely | e9c64a7 | 2009-03-06 23:42:20 -0300 | [diff] [blame] | 2040 | } |
| 2041 | |
| 2042 | /* Note how the 2nd and 3rd arguments are the same for both |
| 2043 | * v4l2_i2c_new_subdev() and v4l2_i2c_new_probed_subdev(). Why? |
| 2044 | * Well the 2nd argument is the module name to load, while the 3rd |
| 2045 | * argument is documented in the framework as being the "chipid" - |
| 2046 | * and every other place where I can find examples of this, the |
| 2047 | * "chipid" appears to just be the module name again. So here we |
| 2048 | * just do the same thing. */ |
Mike Isely | 0db8556 | 2009-03-07 01:42:40 -0300 | [diff] [blame] | 2049 | hdw->i2c_adap.class = 0; |
Mike Isely | e9c64a7 | 2009-03-06 23:42:20 -0300 | [diff] [blame] | 2050 | if (i2ccnt == 1) { |
Mike Isely | bd14d4f | 2009-03-07 00:56:52 -0300 | [diff] [blame] | 2051 | pvr2_trace(PVR2_TRACE_INIT, |
| 2052 | "Module ID %u:" |
| 2053 | " Setting up with specified i2c address 0x%x", |
| 2054 | mid, i2caddr[0]); |
Mike Isely | e9c64a7 | 2009-03-06 23:42:20 -0300 | [diff] [blame] | 2055 | sd = v4l2_i2c_new_subdev(&hdw->i2c_adap, |
| 2056 | fname, fname, |
| 2057 | i2caddr[0]); |
| 2058 | } else { |
Mike Isely | bd14d4f | 2009-03-07 00:56:52 -0300 | [diff] [blame] | 2059 | pvr2_trace(PVR2_TRACE_INIT, |
| 2060 | "Module ID %u:" |
| 2061 | " Setting up with address probe list", |
| 2062 | mid); |
Mike Isely | e9c64a7 | 2009-03-06 23:42:20 -0300 | [diff] [blame] | 2063 | sd = v4l2_i2c_new_probed_subdev(&hdw->i2c_adap, |
| 2064 | fname, fname, |
| 2065 | i2caddr); |
| 2066 | } |
Mike Isely | 0db8556 | 2009-03-07 01:42:40 -0300 | [diff] [blame] | 2067 | hdw->i2c_adap.class = I2C_CLASS_TV_ANALOG; |
Mike Isely | e9c64a7 | 2009-03-06 23:42:20 -0300 | [diff] [blame] | 2068 | |
Mike Isely | 446dfdc | 2009-03-06 23:58:15 -0300 | [diff] [blame] | 2069 | if (!sd) { |
| 2070 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
Mike Isely | 1ab5e74 | 2009-03-07 00:24:24 -0300 | [diff] [blame] | 2071 | "Module ID %u (%s) for device %s failed to load", |
| 2072 | mid, fname, hdw->hdw_desc->description); |
| 2073 | return -EIO; |
Mike Isely | 446dfdc | 2009-03-06 23:58:15 -0300 | [diff] [blame] | 2074 | } |
| 2075 | |
| 2076 | /* Tag this sub-device instance with the module ID we know about. |
| 2077 | In other places we'll use that tag to determine if the instance |
| 2078 | requires special handling. */ |
| 2079 | sd->grp_id = mid; |
| 2080 | |
Mike Isely | a932f50 | 2009-03-06 23:47:10 -0300 | [diff] [blame] | 2081 | /* If we have both old and new i2c layers enabled, make sure that |
| 2082 | old layer isn't also tracking this module. This is a debugging |
| 2083 | aid, in normal situations there's no reason for both mechanisms |
| 2084 | to be enabled. */ |
| 2085 | pvr2_i2c_untrack_subdev(hdw, sd); |
Mike Isely | bd14d4f | 2009-03-07 00:56:52 -0300 | [diff] [blame] | 2086 | pvr2_trace(PVR2_TRACE_INFO, "Attached sub-driver %s", fname); |
Mike Isely | a932f50 | 2009-03-06 23:47:10 -0300 | [diff] [blame] | 2087 | |
Mike Isely | e9c64a7 | 2009-03-06 23:42:20 -0300 | [diff] [blame] | 2088 | |
Mike Isely | 00e5f73 | 2009-03-07 00:17:11 -0300 | [diff] [blame] | 2089 | /* client-specific setup... */ |
| 2090 | switch (mid) { |
| 2091 | case PVR2_CLIENT_ID_CX25840: |
| 2092 | hdw->decoder_client_id = mid; |
| 2093 | { |
| 2094 | /* |
| 2095 | Mike Isely <isely@pobox.com> 19-Nov-2006 - This |
| 2096 | bit of nuttiness for cx25840 causes that module |
| 2097 | to correctly set up its video scaling. This is |
| 2098 | really a problem in the cx25840 module itself, |
| 2099 | but we work around it here. The problem has not |
| 2100 | been seen in ivtv because there VBI is supported |
| 2101 | and set up. We don't do VBI here (at least not |
| 2102 | yet) and thus we never attempted to even set it |
| 2103 | up. |
| 2104 | */ |
| 2105 | struct v4l2_format fmt; |
Mike Isely | bd14d4f | 2009-03-07 00:56:52 -0300 | [diff] [blame] | 2106 | pvr2_trace(PVR2_TRACE_INIT, |
| 2107 | "Module ID %u:" |
| 2108 | " Executing cx25840 VBI hack", |
| 2109 | mid); |
Mike Isely | 00e5f73 | 2009-03-07 00:17:11 -0300 | [diff] [blame] | 2110 | memset(&fmt, 0, sizeof(fmt)); |
| 2111 | fmt.type = V4L2_BUF_TYPE_SLICED_VBI_CAPTURE; |
| 2112 | v4l2_device_call_all(&hdw->v4l2_dev, mid, |
| 2113 | video, s_fmt, &fmt); |
| 2114 | } |
| 2115 | break; |
| 2116 | case PVR2_CLIENT_ID_SAA7115: |
| 2117 | hdw->decoder_client_id = mid; |
| 2118 | break; |
| 2119 | default: break; |
| 2120 | } |
Mike Isely | 1ab5e74 | 2009-03-07 00:24:24 -0300 | [diff] [blame] | 2121 | |
| 2122 | return 0; |
Mike Isely | e9c64a7 | 2009-03-06 23:42:20 -0300 | [diff] [blame] | 2123 | } |
| 2124 | |
| 2125 | |
| 2126 | static void pvr2_hdw_load_modules(struct pvr2_hdw *hdw) |
| 2127 | { |
| 2128 | unsigned int idx; |
| 2129 | const struct pvr2_string_table *cm; |
| 2130 | const struct pvr2_device_client_table *ct; |
Mike Isely | 1ab5e74 | 2009-03-07 00:24:24 -0300 | [diff] [blame] | 2131 | int okFl = !0; |
Mike Isely | e9c64a7 | 2009-03-06 23:42:20 -0300 | [diff] [blame] | 2132 | |
| 2133 | cm = &hdw->hdw_desc->client_modules; |
| 2134 | for (idx = 0; idx < cm->cnt; idx++) { |
| 2135 | request_module(cm->lst[idx]); |
| 2136 | } |
| 2137 | |
| 2138 | ct = &hdw->hdw_desc->client_table; |
| 2139 | for (idx = 0; idx < ct->cnt; idx++) { |
Mike Isely | bd14d4f | 2009-03-07 00:56:52 -0300 | [diff] [blame] | 2140 | if (pvr2_hdw_load_subdev(hdw, &ct->lst[idx]) < 0) okFl = 0; |
Mike Isely | e9c64a7 | 2009-03-06 23:42:20 -0300 | [diff] [blame] | 2141 | } |
Mike Isely | 1ab5e74 | 2009-03-07 00:24:24 -0300 | [diff] [blame] | 2142 | if (!okFl) pvr2_hdw_render_useless(hdw); |
Mike Isely | e9c64a7 | 2009-03-06 23:42:20 -0300 | [diff] [blame] | 2143 | } |
| 2144 | |
| 2145 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2146 | static void pvr2_hdw_setup_low(struct pvr2_hdw *hdw) |
| 2147 | { |
| 2148 | int ret; |
| 2149 | unsigned int idx; |
| 2150 | struct pvr2_ctrl *cptr; |
| 2151 | int reloadFl = 0; |
Mike Isely | 989eb15 | 2007-11-26 01:53:12 -0300 | [diff] [blame] | 2152 | if (hdw->hdw_desc->fx2_firmware.cnt) { |
Mike Isely | 1d643a3 | 2007-09-08 22:18:50 -0300 | [diff] [blame] | 2153 | if (!reloadFl) { |
| 2154 | reloadFl = |
| 2155 | (hdw->usb_intf->cur_altsetting->desc.bNumEndpoints |
| 2156 | == 0); |
| 2157 | if (reloadFl) { |
| 2158 | pvr2_trace(PVR2_TRACE_INIT, |
| 2159 | "USB endpoint config looks strange" |
| 2160 | "; possibly firmware needs to be" |
| 2161 | " loaded"); |
| 2162 | } |
| 2163 | } |
| 2164 | if (!reloadFl) { |
| 2165 | reloadFl = !pvr2_hdw_check_firmware(hdw); |
| 2166 | if (reloadFl) { |
| 2167 | pvr2_trace(PVR2_TRACE_INIT, |
| 2168 | "Check for FX2 firmware failed" |
| 2169 | "; possibly firmware needs to be" |
| 2170 | " loaded"); |
| 2171 | } |
| 2172 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2173 | if (reloadFl) { |
Mike Isely | 1d643a3 | 2007-09-08 22:18:50 -0300 | [diff] [blame] | 2174 | if (pvr2_upload_firmware1(hdw) != 0) { |
| 2175 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 2176 | "Failure uploading firmware1"); |
| 2177 | } |
| 2178 | return; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2179 | } |
| 2180 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2181 | hdw->fw1_state = FW1_STATE_OK; |
| 2182 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2183 | if (!pvr2_hdw_dev_ok(hdw)) return; |
| 2184 | |
Mike Isely | 989eb15 | 2007-11-26 01:53:12 -0300 | [diff] [blame] | 2185 | if (!hdw->hdw_desc->flag_no_powerup) { |
Mike Isely | 1d643a3 | 2007-09-08 22:18:50 -0300 | [diff] [blame] | 2186 | pvr2_hdw_cmd_powerup(hdw); |
| 2187 | if (!pvr2_hdw_dev_ok(hdw)) return; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2188 | } |
| 2189 | |
Mike Isely | 31335b1 | 2008-07-25 19:35:31 -0300 | [diff] [blame] | 2190 | /* Take the IR chip out of reset, if appropriate */ |
| 2191 | if (hdw->hdw_desc->ir_scheme == PVR2_IR_SCHEME_ZILOG) { |
| 2192 | pvr2_issue_simple_cmd(hdw, |
| 2193 | FX2CMD_HCW_ZILOG_RESET | |
| 2194 | (1 << 8) | |
| 2195 | ((0) << 16)); |
| 2196 | } |
| 2197 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2198 | // This step MUST happen after the earlier powerup step. |
Mike Isely | 59af336 | 2009-03-07 03:06:09 -0300 | [diff] [blame] | 2199 | pvr2_i2c_track_init(hdw); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2200 | pvr2_i2c_core_init(hdw); |
| 2201 | if (!pvr2_hdw_dev_ok(hdw)) return; |
| 2202 | |
Mike Isely | e9c64a7 | 2009-03-06 23:42:20 -0300 | [diff] [blame] | 2203 | pvr2_hdw_load_modules(hdw); |
Mike Isely | 1ab5e74 | 2009-03-07 00:24:24 -0300 | [diff] [blame] | 2204 | if (!pvr2_hdw_dev_ok(hdw)) return; |
Mike Isely | e9c64a7 | 2009-03-06 23:42:20 -0300 | [diff] [blame] | 2205 | |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 2206 | for (idx = 0; idx < CTRLDEF_COUNT; idx++) { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2207 | cptr = hdw->controls + idx; |
| 2208 | if (cptr->info->skip_init) continue; |
| 2209 | if (!cptr->info->set_value) continue; |
| 2210 | cptr->info->set_value(cptr,~0,cptr->info->default_value); |
| 2211 | } |
| 2212 | |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 2213 | /* Set up special default values for the television and radio |
| 2214 | frequencies here. It's not really important what these defaults |
| 2215 | are, but I set them to something usable in the Chicago area just |
| 2216 | to make driver testing a little easier. */ |
| 2217 | |
Michael Krufky | 5a4f5da6 | 2008-05-11 16:37:50 -0300 | [diff] [blame] | 2218 | hdw->freqValTelevision = default_tv_freq; |
| 2219 | hdw->freqValRadio = default_radio_freq; |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 2220 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2221 | // Do not use pvr2_reset_ctl_endpoints() here. It is not |
| 2222 | // thread-safe against the normal pvr2_send_request() mechanism. |
| 2223 | // (We should make it thread safe). |
| 2224 | |
Mike Isely | aaf7884 | 2007-11-26 02:04:11 -0300 | [diff] [blame] | 2225 | if (hdw->hdw_desc->flag_has_hauppauge_rom) { |
| 2226 | ret = pvr2_hdw_get_eeprom_addr(hdw); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2227 | if (!pvr2_hdw_dev_ok(hdw)) return; |
Mike Isely | aaf7884 | 2007-11-26 02:04:11 -0300 | [diff] [blame] | 2228 | if (ret < 0) { |
| 2229 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 2230 | "Unable to determine location of eeprom," |
| 2231 | " skipping"); |
| 2232 | } else { |
| 2233 | hdw->eeprom_addr = ret; |
| 2234 | pvr2_eeprom_analyze(hdw); |
| 2235 | if (!pvr2_hdw_dev_ok(hdw)) return; |
| 2236 | } |
| 2237 | } else { |
| 2238 | hdw->tuner_type = hdw->hdw_desc->default_tuner_type; |
| 2239 | hdw->tuner_updated = !0; |
| 2240 | hdw->std_mask_eeprom = V4L2_STD_ALL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2241 | } |
| 2242 | |
Mike Isely | 13a8879 | 2009-01-14 04:22:56 -0300 | [diff] [blame] | 2243 | if (hdw->serial_number) { |
| 2244 | idx = scnprintf(hdw->identifier, sizeof(hdw->identifier) - 1, |
| 2245 | "sn-%lu", hdw->serial_number); |
| 2246 | } else if (hdw->unit_number >= 0) { |
| 2247 | idx = scnprintf(hdw->identifier, sizeof(hdw->identifier) - 1, |
| 2248 | "unit-%c", |
| 2249 | hdw->unit_number + 'a'); |
| 2250 | } else { |
| 2251 | idx = scnprintf(hdw->identifier, sizeof(hdw->identifier) - 1, |
| 2252 | "unit-??"); |
| 2253 | } |
| 2254 | hdw->identifier[idx] = 0; |
| 2255 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2256 | pvr2_hdw_setup_std(hdw); |
| 2257 | |
| 2258 | if (!get_default_tuner_type(hdw)) { |
| 2259 | pvr2_trace(PVR2_TRACE_INIT, |
| 2260 | "pvr2_hdw_setup: Tuner type overridden to %d", |
| 2261 | hdw->tuner_type); |
| 2262 | } |
| 2263 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2264 | pvr2_i2c_core_check_stale(hdw); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2265 | |
| 2266 | if (!pvr2_hdw_dev_ok(hdw)) return; |
| 2267 | |
Mike Isely | 1df59f0 | 2008-04-21 03:50:39 -0300 | [diff] [blame] | 2268 | if (hdw->hdw_desc->signal_routing_scheme == |
| 2269 | PVR2_ROUTING_SCHEME_GOTVIEW) { |
| 2270 | /* Ensure that GPIO 11 is set to output for GOTVIEW |
| 2271 | hardware. */ |
| 2272 | pvr2_hdw_gpio_chg_dir(hdw,(1 << 11),~0); |
| 2273 | } |
| 2274 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2275 | pvr2_hdw_commit_setup(hdw); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2276 | |
| 2277 | hdw->vid_stream = pvr2_stream_create(); |
| 2278 | if (!pvr2_hdw_dev_ok(hdw)) return; |
| 2279 | pvr2_trace(PVR2_TRACE_INIT, |
| 2280 | "pvr2_hdw_setup: video stream is %p",hdw->vid_stream); |
| 2281 | if (hdw->vid_stream) { |
| 2282 | idx = get_default_error_tolerance(hdw); |
| 2283 | if (idx) { |
| 2284 | pvr2_trace(PVR2_TRACE_INIT, |
| 2285 | "pvr2_hdw_setup: video stream %p" |
| 2286 | " setting tolerance %u", |
| 2287 | hdw->vid_stream,idx); |
| 2288 | } |
| 2289 | pvr2_stream_setup(hdw->vid_stream,hdw->usb_dev, |
| 2290 | PVR2_VID_ENDPOINT,idx); |
| 2291 | } |
| 2292 | |
| 2293 | if (!pvr2_hdw_dev_ok(hdw)) return; |
| 2294 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2295 | hdw->flag_init_ok = !0; |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2296 | |
| 2297 | pvr2_hdw_state_sched(hdw); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2298 | } |
| 2299 | |
| 2300 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2301 | /* Set up the structure and attempt to put the device into a usable state. |
| 2302 | This can be a time-consuming operation, which is why it is not done |
| 2303 | internally as part of the create() step. */ |
| 2304 | static void pvr2_hdw_setup(struct pvr2_hdw *hdw) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2305 | { |
| 2306 | pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_setup(hdw=%p) begin",hdw); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2307 | do { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2308 | pvr2_hdw_setup_low(hdw); |
| 2309 | pvr2_trace(PVR2_TRACE_INIT, |
| 2310 | "pvr2_hdw_setup(hdw=%p) done, ok=%d init_ok=%d", |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2311 | hdw,pvr2_hdw_dev_ok(hdw),hdw->flag_init_ok); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2312 | if (pvr2_hdw_dev_ok(hdw)) { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2313 | if (hdw->flag_init_ok) { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2314 | pvr2_trace( |
| 2315 | PVR2_TRACE_INFO, |
| 2316 | "Device initialization" |
| 2317 | " completed successfully."); |
| 2318 | break; |
| 2319 | } |
| 2320 | if (hdw->fw1_state == FW1_STATE_RELOAD) { |
| 2321 | pvr2_trace( |
| 2322 | PVR2_TRACE_INFO, |
| 2323 | "Device microcontroller firmware" |
| 2324 | " (re)loaded; it should now reset" |
| 2325 | " and reconnect."); |
| 2326 | break; |
| 2327 | } |
| 2328 | pvr2_trace( |
| 2329 | PVR2_TRACE_ERROR_LEGS, |
| 2330 | "Device initialization was not successful."); |
| 2331 | if (hdw->fw1_state == FW1_STATE_MISSING) { |
| 2332 | pvr2_trace( |
| 2333 | PVR2_TRACE_ERROR_LEGS, |
| 2334 | "Giving up since device" |
| 2335 | " microcontroller firmware" |
| 2336 | " appears to be missing."); |
| 2337 | break; |
| 2338 | } |
| 2339 | } |
| 2340 | if (procreload) { |
| 2341 | pvr2_trace( |
| 2342 | PVR2_TRACE_ERROR_LEGS, |
| 2343 | "Attempting pvrusb2 recovery by reloading" |
| 2344 | " primary firmware."); |
| 2345 | pvr2_trace( |
| 2346 | PVR2_TRACE_ERROR_LEGS, |
| 2347 | "If this works, device should disconnect" |
| 2348 | " and reconnect in a sane state."); |
| 2349 | hdw->fw1_state = FW1_STATE_UNKNOWN; |
| 2350 | pvr2_upload_firmware1(hdw); |
| 2351 | } else { |
| 2352 | pvr2_trace( |
| 2353 | PVR2_TRACE_ERROR_LEGS, |
| 2354 | "***WARNING*** pvrusb2 device hardware" |
| 2355 | " appears to be jammed" |
| 2356 | " and I can't clear it."); |
| 2357 | pvr2_trace( |
| 2358 | PVR2_TRACE_ERROR_LEGS, |
| 2359 | "You might need to power cycle" |
| 2360 | " the pvrusb2 device" |
| 2361 | " in order to recover."); |
| 2362 | } |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2363 | } while (0); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2364 | pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_setup(hdw=%p) end",hdw); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2365 | } |
| 2366 | |
| 2367 | |
Mike Isely | c4a8828 | 2008-04-22 14:45:44 -0300 | [diff] [blame] | 2368 | /* Perform second stage initialization. Set callback pointer first so that |
| 2369 | we can avoid a possible initialization race (if the kernel thread runs |
| 2370 | before the callback has been set). */ |
Mike Isely | 794b160 | 2008-04-22 14:45:45 -0300 | [diff] [blame] | 2371 | int pvr2_hdw_initialize(struct pvr2_hdw *hdw, |
| 2372 | void (*callback_func)(void *), |
| 2373 | void *callback_data) |
Mike Isely | c4a8828 | 2008-04-22 14:45:44 -0300 | [diff] [blame] | 2374 | { |
| 2375 | LOCK_TAKE(hdw->big_lock); do { |
Mike Isely | 97f26ff | 2008-04-07 02:22:43 -0300 | [diff] [blame] | 2376 | if (hdw->flag_disconnected) { |
| 2377 | /* Handle a race here: If we're already |
| 2378 | disconnected by this point, then give up. If we |
| 2379 | get past this then we'll remain connected for |
| 2380 | the duration of initialization since the entire |
| 2381 | initialization sequence is now protected by the |
| 2382 | big_lock. */ |
| 2383 | break; |
| 2384 | } |
Mike Isely | c4a8828 | 2008-04-22 14:45:44 -0300 | [diff] [blame] | 2385 | hdw->state_data = callback_data; |
| 2386 | hdw->state_func = callback_func; |
Mike Isely | 97f26ff | 2008-04-07 02:22:43 -0300 | [diff] [blame] | 2387 | pvr2_hdw_setup(hdw); |
Mike Isely | c4a8828 | 2008-04-22 14:45:44 -0300 | [diff] [blame] | 2388 | } while (0); LOCK_GIVE(hdw->big_lock); |
Mike Isely | 794b160 | 2008-04-22 14:45:45 -0300 | [diff] [blame] | 2389 | return hdw->flag_init_ok; |
Mike Isely | c4a8828 | 2008-04-22 14:45:44 -0300 | [diff] [blame] | 2390 | } |
| 2391 | |
| 2392 | |
| 2393 | /* Create, set up, and return a structure for interacting with the |
| 2394 | underlying hardware. */ |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2395 | struct pvr2_hdw *pvr2_hdw_create(struct usb_interface *intf, |
| 2396 | const struct usb_device_id *devid) |
| 2397 | { |
Mike Isely | 7fb20fa | 2008-04-22 14:45:37 -0300 | [diff] [blame] | 2398 | unsigned int idx,cnt1,cnt2,m; |
Mike Isely | fe15f13 | 2008-08-30 18:11:40 -0300 | [diff] [blame] | 2399 | struct pvr2_hdw *hdw = NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2400 | int valid_std_mask; |
| 2401 | struct pvr2_ctrl *cptr; |
Mike Isely | b72b7bf | 2009-03-06 23:20:31 -0300 | [diff] [blame] | 2402 | struct usb_device *usb_dev; |
Mike Isely | 989eb15 | 2007-11-26 01:53:12 -0300 | [diff] [blame] | 2403 | const struct pvr2_device_desc *hdw_desc; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2404 | __u8 ifnum; |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 2405 | struct v4l2_queryctrl qctrl; |
| 2406 | struct pvr2_ctl_info *ciptr; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2407 | |
Mike Isely | b72b7bf | 2009-03-06 23:20:31 -0300 | [diff] [blame] | 2408 | usb_dev = interface_to_usbdev(intf); |
| 2409 | |
Mike Isely | d130fa8 | 2007-12-08 17:20:06 -0300 | [diff] [blame] | 2410 | hdw_desc = (const struct pvr2_device_desc *)(devid->driver_info); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2411 | |
Mike Isely | fe15f13 | 2008-08-30 18:11:40 -0300 | [diff] [blame] | 2412 | if (hdw_desc == NULL) { |
| 2413 | pvr2_trace(PVR2_TRACE_INIT, "pvr2_hdw_create:" |
| 2414 | " No device description pointer," |
| 2415 | " unable to continue."); |
| 2416 | pvr2_trace(PVR2_TRACE_INIT, "If you have a new device type," |
| 2417 | " please contact Mike Isely <isely@pobox.com>" |
| 2418 | " to get it included in the driver\n"); |
| 2419 | goto fail; |
| 2420 | } |
| 2421 | |
Mike Isely | ca545f7 | 2007-01-20 00:37:11 -0300 | [diff] [blame] | 2422 | hdw = kzalloc(sizeof(*hdw),GFP_KERNEL); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2423 | pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_create: hdw=%p, type \"%s\"", |
Mike Isely | 989eb15 | 2007-11-26 01:53:12 -0300 | [diff] [blame] | 2424 | hdw,hdw_desc->description); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2425 | if (!hdw) goto fail; |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2426 | |
| 2427 | init_timer(&hdw->quiescent_timer); |
| 2428 | hdw->quiescent_timer.data = (unsigned long)hdw; |
| 2429 | hdw->quiescent_timer.function = pvr2_hdw_quiescent_timeout; |
| 2430 | |
| 2431 | init_timer(&hdw->encoder_wait_timer); |
| 2432 | hdw->encoder_wait_timer.data = (unsigned long)hdw; |
| 2433 | hdw->encoder_wait_timer.function = pvr2_hdw_encoder_wait_timeout; |
| 2434 | |
Mike Isely | d913d63 | 2008-04-06 04:04:35 -0300 | [diff] [blame] | 2435 | init_timer(&hdw->encoder_run_timer); |
| 2436 | hdw->encoder_run_timer.data = (unsigned long)hdw; |
| 2437 | hdw->encoder_run_timer.function = pvr2_hdw_encoder_run_timeout; |
| 2438 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2439 | hdw->master_state = PVR2_STATE_DEAD; |
| 2440 | |
| 2441 | init_waitqueue_head(&hdw->state_wait_data); |
| 2442 | |
Mike Isely | 18103c57 | 2007-01-20 00:09:47 -0300 | [diff] [blame] | 2443 | hdw->tuner_signal_stale = !0; |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 2444 | cx2341x_fill_defaults(&hdw->enc_ctl_state); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2445 | |
Mike Isely | 7fb20fa | 2008-04-22 14:45:37 -0300 | [diff] [blame] | 2446 | /* Calculate which inputs are OK */ |
| 2447 | m = 0; |
| 2448 | if (hdw_desc->flag_has_analogtuner) m |= 1 << PVR2_CVAL_INPUT_TV; |
Mike Isely | e8f5bac | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 2449 | if (hdw_desc->digital_control_scheme != PVR2_DIGITAL_SCHEME_NONE) { |
| 2450 | m |= 1 << PVR2_CVAL_INPUT_DTV; |
| 2451 | } |
Mike Isely | 7fb20fa | 2008-04-22 14:45:37 -0300 | [diff] [blame] | 2452 | if (hdw_desc->flag_has_svideo) m |= 1 << PVR2_CVAL_INPUT_SVIDEO; |
| 2453 | if (hdw_desc->flag_has_composite) m |= 1 << PVR2_CVAL_INPUT_COMPOSITE; |
| 2454 | if (hdw_desc->flag_has_fmradio) m |= 1 << PVR2_CVAL_INPUT_RADIO; |
| 2455 | hdw->input_avail_mask = m; |
Mike Isely | 1cb03b7 | 2008-04-21 03:47:43 -0300 | [diff] [blame] | 2456 | hdw->input_allowed_mask = hdw->input_avail_mask; |
Mike Isely | 7fb20fa | 2008-04-22 14:45:37 -0300 | [diff] [blame] | 2457 | |
Mike Isely | 62433e3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 2458 | /* If not a hybrid device, pathway_state never changes. So |
| 2459 | initialize it here to what it should forever be. */ |
| 2460 | if (!(hdw->input_avail_mask & (1 << PVR2_CVAL_INPUT_DTV))) { |
| 2461 | hdw->pathway_state = PVR2_PATHWAY_ANALOG; |
| 2462 | } else if (!(hdw->input_avail_mask & (1 << PVR2_CVAL_INPUT_TV))) { |
| 2463 | hdw->pathway_state = PVR2_PATHWAY_DIGITAL; |
| 2464 | } |
| 2465 | |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 2466 | hdw->control_cnt = CTRLDEF_COUNT; |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 2467 | hdw->control_cnt += MPEGDEF_COUNT; |
Mike Isely | ca545f7 | 2007-01-20 00:37:11 -0300 | [diff] [blame] | 2468 | hdw->controls = kzalloc(sizeof(struct pvr2_ctrl) * hdw->control_cnt, |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2469 | GFP_KERNEL); |
| 2470 | if (!hdw->controls) goto fail; |
Mike Isely | 989eb15 | 2007-11-26 01:53:12 -0300 | [diff] [blame] | 2471 | hdw->hdw_desc = hdw_desc; |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 2472 | for (idx = 0; idx < hdw->control_cnt; idx++) { |
| 2473 | cptr = hdw->controls + idx; |
| 2474 | cptr->hdw = hdw; |
| 2475 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2476 | for (idx = 0; idx < 32; idx++) { |
| 2477 | hdw->std_mask_ptrs[idx] = hdw->std_mask_names[idx]; |
| 2478 | } |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 2479 | for (idx = 0; idx < CTRLDEF_COUNT; idx++) { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2480 | cptr = hdw->controls + idx; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2481 | cptr->info = control_defs+idx; |
| 2482 | } |
Mike Isely | dbc40a0 | 2008-04-22 14:45:39 -0300 | [diff] [blame] | 2483 | |
| 2484 | /* Ensure that default input choice is a valid one. */ |
| 2485 | m = hdw->input_avail_mask; |
| 2486 | if (m) for (idx = 0; idx < (sizeof(m) << 3); idx++) { |
| 2487 | if (!((1 << idx) & m)) continue; |
| 2488 | hdw->input_val = idx; |
| 2489 | break; |
| 2490 | } |
| 2491 | |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 2492 | /* Define and configure additional controls from cx2341x module. */ |
Mike Isely | ca545f7 | 2007-01-20 00:37:11 -0300 | [diff] [blame] | 2493 | hdw->mpeg_ctrl_info = kzalloc( |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 2494 | sizeof(*(hdw->mpeg_ctrl_info)) * MPEGDEF_COUNT, GFP_KERNEL); |
| 2495 | if (!hdw->mpeg_ctrl_info) goto fail; |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 2496 | for (idx = 0; idx < MPEGDEF_COUNT; idx++) { |
| 2497 | cptr = hdw->controls + idx + CTRLDEF_COUNT; |
| 2498 | ciptr = &(hdw->mpeg_ctrl_info[idx].info); |
| 2499 | ciptr->desc = hdw->mpeg_ctrl_info[idx].desc; |
| 2500 | ciptr->name = mpeg_ids[idx].strid; |
| 2501 | ciptr->v4l_id = mpeg_ids[idx].id; |
| 2502 | ciptr->skip_init = !0; |
| 2503 | ciptr->get_value = ctrl_cx2341x_get; |
| 2504 | ciptr->get_v4lflags = ctrl_cx2341x_getv4lflags; |
| 2505 | ciptr->is_dirty = ctrl_cx2341x_is_dirty; |
| 2506 | if (!idx) ciptr->clear_dirty = ctrl_cx2341x_clear_dirty; |
| 2507 | qctrl.id = ciptr->v4l_id; |
| 2508 | cx2341x_ctrl_query(&hdw->enc_ctl_state,&qctrl); |
| 2509 | if (!(qctrl.flags & V4L2_CTRL_FLAG_READ_ONLY)) { |
| 2510 | ciptr->set_value = ctrl_cx2341x_set; |
| 2511 | } |
| 2512 | strncpy(hdw->mpeg_ctrl_info[idx].desc,qctrl.name, |
| 2513 | PVR2_CTLD_INFO_DESC_SIZE); |
| 2514 | hdw->mpeg_ctrl_info[idx].desc[PVR2_CTLD_INFO_DESC_SIZE-1] = 0; |
| 2515 | ciptr->default_value = qctrl.default_value; |
| 2516 | switch (qctrl.type) { |
| 2517 | default: |
| 2518 | case V4L2_CTRL_TYPE_INTEGER: |
| 2519 | ciptr->type = pvr2_ctl_int; |
| 2520 | ciptr->def.type_int.min_value = qctrl.minimum; |
| 2521 | ciptr->def.type_int.max_value = qctrl.maximum; |
| 2522 | break; |
| 2523 | case V4L2_CTRL_TYPE_BOOLEAN: |
| 2524 | ciptr->type = pvr2_ctl_bool; |
| 2525 | break; |
| 2526 | case V4L2_CTRL_TYPE_MENU: |
| 2527 | ciptr->type = pvr2_ctl_enum; |
| 2528 | ciptr->def.type_enum.value_names = |
Hans Verkuil | e0e31cd | 2008-06-22 12:03:28 -0300 | [diff] [blame] | 2529 | cx2341x_ctrl_get_menu(&hdw->enc_ctl_state, |
| 2530 | ciptr->v4l_id); |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 2531 | for (cnt1 = 0; |
| 2532 | ciptr->def.type_enum.value_names[cnt1] != NULL; |
| 2533 | cnt1++) { } |
| 2534 | ciptr->def.type_enum.count = cnt1; |
| 2535 | break; |
| 2536 | } |
| 2537 | cptr->info = ciptr; |
| 2538 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2539 | |
| 2540 | // Initialize video standard enum dynamic control |
| 2541 | cptr = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_STDENUM); |
| 2542 | if (cptr) { |
| 2543 | memcpy(&hdw->std_info_enum,cptr->info, |
| 2544 | sizeof(hdw->std_info_enum)); |
| 2545 | cptr->info = &hdw->std_info_enum; |
| 2546 | |
| 2547 | } |
| 2548 | // Initialize control data regarding video standard masks |
| 2549 | valid_std_mask = pvr2_std_get_usable(); |
| 2550 | for (idx = 0; idx < 32; idx++) { |
| 2551 | if (!(valid_std_mask & (1 << idx))) continue; |
| 2552 | cnt1 = pvr2_std_id_to_str( |
| 2553 | hdw->std_mask_names[idx], |
| 2554 | sizeof(hdw->std_mask_names[idx])-1, |
| 2555 | 1 << idx); |
| 2556 | hdw->std_mask_names[idx][cnt1] = 0; |
| 2557 | } |
| 2558 | cptr = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_STDAVAIL); |
| 2559 | if (cptr) { |
| 2560 | memcpy(&hdw->std_info_avail,cptr->info, |
| 2561 | sizeof(hdw->std_info_avail)); |
| 2562 | cptr->info = &hdw->std_info_avail; |
| 2563 | hdw->std_info_avail.def.type_bitmask.bit_names = |
| 2564 | hdw->std_mask_ptrs; |
| 2565 | hdw->std_info_avail.def.type_bitmask.valid_bits = |
| 2566 | valid_std_mask; |
| 2567 | } |
| 2568 | cptr = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_STDCUR); |
| 2569 | if (cptr) { |
| 2570 | memcpy(&hdw->std_info_cur,cptr->info, |
| 2571 | sizeof(hdw->std_info_cur)); |
| 2572 | cptr->info = &hdw->std_info_cur; |
| 2573 | hdw->std_info_cur.def.type_bitmask.bit_names = |
| 2574 | hdw->std_mask_ptrs; |
| 2575 | hdw->std_info_avail.def.type_bitmask.valid_bits = |
| 2576 | valid_std_mask; |
| 2577 | } |
| 2578 | |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 2579 | hdw->cropcap_stale = !0; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2580 | hdw->eeprom_addr = -1; |
| 2581 | hdw->unit_number = -1; |
Mike Isely | 8079384 | 2006-12-27 23:12:28 -0300 | [diff] [blame] | 2582 | hdw->v4l_minor_number_video = -1; |
| 2583 | hdw->v4l_minor_number_vbi = -1; |
Mike Isely | fd5a75f | 2006-12-27 23:11:22 -0300 | [diff] [blame] | 2584 | hdw->v4l_minor_number_radio = -1; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2585 | hdw->ctl_write_buffer = kmalloc(PVR2_CTL_BUFFSIZE,GFP_KERNEL); |
| 2586 | if (!hdw->ctl_write_buffer) goto fail; |
| 2587 | hdw->ctl_read_buffer = kmalloc(PVR2_CTL_BUFFSIZE,GFP_KERNEL); |
| 2588 | if (!hdw->ctl_read_buffer) goto fail; |
| 2589 | hdw->ctl_write_urb = usb_alloc_urb(0,GFP_KERNEL); |
| 2590 | if (!hdw->ctl_write_urb) goto fail; |
| 2591 | hdw->ctl_read_urb = usb_alloc_urb(0,GFP_KERNEL); |
| 2592 | if (!hdw->ctl_read_urb) goto fail; |
| 2593 | |
Mike Isely | b72b7bf | 2009-03-06 23:20:31 -0300 | [diff] [blame] | 2594 | if (v4l2_device_register(&usb_dev->dev, &hdw->v4l2_dev) != 0) { |
| 2595 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 2596 | "Error registering with v4l core, giving up"); |
| 2597 | goto fail; |
| 2598 | } |
Matthias Kaehlcke | 8df0c87 | 2007-04-28 20:00:18 -0300 | [diff] [blame] | 2599 | mutex_lock(&pvr2_unit_mtx); do { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2600 | for (idx = 0; idx < PVR_NUM; idx++) { |
| 2601 | if (unit_pointers[idx]) continue; |
| 2602 | hdw->unit_number = idx; |
| 2603 | unit_pointers[idx] = hdw; |
| 2604 | break; |
| 2605 | } |
Matthias Kaehlcke | 8df0c87 | 2007-04-28 20:00:18 -0300 | [diff] [blame] | 2606 | } while (0); mutex_unlock(&pvr2_unit_mtx); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2607 | |
| 2608 | cnt1 = 0; |
| 2609 | cnt2 = scnprintf(hdw->name+cnt1,sizeof(hdw->name)-cnt1,"pvrusb2"); |
| 2610 | cnt1 += cnt2; |
| 2611 | if (hdw->unit_number >= 0) { |
| 2612 | cnt2 = scnprintf(hdw->name+cnt1,sizeof(hdw->name)-cnt1,"_%c", |
| 2613 | ('a' + hdw->unit_number)); |
| 2614 | cnt1 += cnt2; |
| 2615 | } |
| 2616 | if (cnt1 >= sizeof(hdw->name)) cnt1 = sizeof(hdw->name)-1; |
| 2617 | hdw->name[cnt1] = 0; |
| 2618 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2619 | hdw->workqueue = create_singlethread_workqueue(hdw->name); |
| 2620 | INIT_WORK(&hdw->workpoll,pvr2_hdw_worker_poll); |
| 2621 | INIT_WORK(&hdw->worki2csync,pvr2_hdw_worker_i2c); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2622 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2623 | pvr2_trace(PVR2_TRACE_INIT,"Driver unit number is %d, name is %s", |
| 2624 | hdw->unit_number,hdw->name); |
| 2625 | |
| 2626 | hdw->tuner_type = -1; |
| 2627 | hdw->flag_ok = !0; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2628 | |
| 2629 | hdw->usb_intf = intf; |
Mike Isely | b72b7bf | 2009-03-06 23:20:31 -0300 | [diff] [blame] | 2630 | hdw->usb_dev = usb_dev; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2631 | |
Mike Isely | 87e3495 | 2009-01-23 01:20:24 -0300 | [diff] [blame] | 2632 | usb_make_path(hdw->usb_dev, hdw->bus_info, sizeof(hdw->bus_info)); |
Mike Isely | 31a1854 | 2007-04-08 01:11:47 -0300 | [diff] [blame] | 2633 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2634 | ifnum = hdw->usb_intf->cur_altsetting->desc.bInterfaceNumber; |
| 2635 | usb_set_interface(hdw->usb_dev,ifnum,0); |
| 2636 | |
| 2637 | mutex_init(&hdw->ctl_lock_mutex); |
| 2638 | mutex_init(&hdw->big_lock_mutex); |
| 2639 | |
| 2640 | return hdw; |
| 2641 | fail: |
| 2642 | if (hdw) { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2643 | del_timer_sync(&hdw->quiescent_timer); |
Mike Isely | d913d63 | 2008-04-06 04:04:35 -0300 | [diff] [blame] | 2644 | del_timer_sync(&hdw->encoder_run_timer); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2645 | del_timer_sync(&hdw->encoder_wait_timer); |
| 2646 | if (hdw->workqueue) { |
| 2647 | flush_workqueue(hdw->workqueue); |
| 2648 | destroy_workqueue(hdw->workqueue); |
| 2649 | hdw->workqueue = NULL; |
| 2650 | } |
Mariusz Kozlowski | 5e55d2c | 2006-11-08 15:34:31 +0100 | [diff] [blame] | 2651 | usb_free_urb(hdw->ctl_read_urb); |
| 2652 | usb_free_urb(hdw->ctl_write_urb); |
Mariusz Kozlowski | 22071a4 | 2007-01-07 10:33:39 -0300 | [diff] [blame] | 2653 | kfree(hdw->ctl_read_buffer); |
| 2654 | kfree(hdw->ctl_write_buffer); |
| 2655 | kfree(hdw->controls); |
| 2656 | kfree(hdw->mpeg_ctrl_info); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2657 | kfree(hdw->std_defs); |
| 2658 | kfree(hdw->std_enum_names); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2659 | kfree(hdw); |
| 2660 | } |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2661 | return NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2662 | } |
| 2663 | |
| 2664 | |
| 2665 | /* Remove _all_ associations between this driver and the underlying USB |
| 2666 | layer. */ |
Adrian Bunk | 07e337e | 2006-06-30 11:30:20 -0300 | [diff] [blame] | 2667 | static void pvr2_hdw_remove_usb_stuff(struct pvr2_hdw *hdw) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2668 | { |
| 2669 | if (hdw->flag_disconnected) return; |
| 2670 | pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_remove_usb_stuff: hdw=%p",hdw); |
| 2671 | if (hdw->ctl_read_urb) { |
| 2672 | usb_kill_urb(hdw->ctl_read_urb); |
| 2673 | usb_free_urb(hdw->ctl_read_urb); |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2674 | hdw->ctl_read_urb = NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2675 | } |
| 2676 | if (hdw->ctl_write_urb) { |
| 2677 | usb_kill_urb(hdw->ctl_write_urb); |
| 2678 | usb_free_urb(hdw->ctl_write_urb); |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2679 | hdw->ctl_write_urb = NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2680 | } |
| 2681 | if (hdw->ctl_read_buffer) { |
| 2682 | kfree(hdw->ctl_read_buffer); |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2683 | hdw->ctl_read_buffer = NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2684 | } |
| 2685 | if (hdw->ctl_write_buffer) { |
| 2686 | kfree(hdw->ctl_write_buffer); |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2687 | hdw->ctl_write_buffer = NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2688 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2689 | hdw->flag_disconnected = !0; |
Mike Isely | b72b7bf | 2009-03-06 23:20:31 -0300 | [diff] [blame] | 2690 | /* If we don't do this, then there will be a dangling struct device |
| 2691 | reference to our disappearing device persisting inside the V4L |
| 2692 | core... */ |
| 2693 | if (hdw->v4l2_dev.dev) { |
| 2694 | dev_set_drvdata(hdw->v4l2_dev.dev, NULL); |
| 2695 | hdw->v4l2_dev.dev = NULL; |
| 2696 | } |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2697 | hdw->usb_dev = NULL; |
| 2698 | hdw->usb_intf = NULL; |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2699 | pvr2_hdw_render_useless(hdw); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2700 | } |
| 2701 | |
| 2702 | |
| 2703 | /* Destroy hardware interaction structure */ |
| 2704 | void pvr2_hdw_destroy(struct pvr2_hdw *hdw) |
| 2705 | { |
Mike Isely | 401c27c | 2007-09-08 22:11:46 -0300 | [diff] [blame] | 2706 | if (!hdw) return; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2707 | pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_destroy: hdw=%p",hdw); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2708 | if (hdw->workqueue) { |
| 2709 | flush_workqueue(hdw->workqueue); |
| 2710 | destroy_workqueue(hdw->workqueue); |
| 2711 | hdw->workqueue = NULL; |
| 2712 | } |
Mike Isely | 8f59100 | 2008-04-22 14:45:45 -0300 | [diff] [blame] | 2713 | del_timer_sync(&hdw->quiescent_timer); |
Mike Isely | d913d63 | 2008-04-06 04:04:35 -0300 | [diff] [blame] | 2714 | del_timer_sync(&hdw->encoder_run_timer); |
Mike Isely | 8f59100 | 2008-04-22 14:45:45 -0300 | [diff] [blame] | 2715 | del_timer_sync(&hdw->encoder_wait_timer); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2716 | if (hdw->fw_buffer) { |
| 2717 | kfree(hdw->fw_buffer); |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2718 | hdw->fw_buffer = NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2719 | } |
| 2720 | if (hdw->vid_stream) { |
| 2721 | pvr2_stream_destroy(hdw->vid_stream); |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2722 | hdw->vid_stream = NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2723 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2724 | if (hdw->decoder_ctrl) { |
| 2725 | hdw->decoder_ctrl->detach(hdw->decoder_ctrl->ctxt); |
| 2726 | } |
| 2727 | pvr2_i2c_core_done(hdw); |
Mike Isely | 59af336 | 2009-03-07 03:06:09 -0300 | [diff] [blame] | 2728 | pvr2_i2c_track_done(hdw); |
Mike Isely | b72b7bf | 2009-03-06 23:20:31 -0300 | [diff] [blame] | 2729 | v4l2_device_unregister(&hdw->v4l2_dev); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2730 | pvr2_hdw_remove_usb_stuff(hdw); |
Matthias Kaehlcke | 8df0c87 | 2007-04-28 20:00:18 -0300 | [diff] [blame] | 2731 | mutex_lock(&pvr2_unit_mtx); do { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2732 | if ((hdw->unit_number >= 0) && |
| 2733 | (hdw->unit_number < PVR_NUM) && |
| 2734 | (unit_pointers[hdw->unit_number] == hdw)) { |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2735 | unit_pointers[hdw->unit_number] = NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2736 | } |
Matthias Kaehlcke | 8df0c87 | 2007-04-28 20:00:18 -0300 | [diff] [blame] | 2737 | } while (0); mutex_unlock(&pvr2_unit_mtx); |
Mariusz Kozlowski | 22071a4 | 2007-01-07 10:33:39 -0300 | [diff] [blame] | 2738 | kfree(hdw->controls); |
| 2739 | kfree(hdw->mpeg_ctrl_info); |
| 2740 | kfree(hdw->std_defs); |
| 2741 | kfree(hdw->std_enum_names); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2742 | kfree(hdw); |
| 2743 | } |
| 2744 | |
| 2745 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2746 | int pvr2_hdw_dev_ok(struct pvr2_hdw *hdw) |
| 2747 | { |
| 2748 | return (hdw && hdw->flag_ok); |
| 2749 | } |
| 2750 | |
| 2751 | |
| 2752 | /* Called when hardware has been unplugged */ |
| 2753 | void pvr2_hdw_disconnect(struct pvr2_hdw *hdw) |
| 2754 | { |
| 2755 | pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_disconnect(hdw=%p)",hdw); |
| 2756 | LOCK_TAKE(hdw->big_lock); |
| 2757 | LOCK_TAKE(hdw->ctl_lock); |
| 2758 | pvr2_hdw_remove_usb_stuff(hdw); |
| 2759 | LOCK_GIVE(hdw->ctl_lock); |
| 2760 | LOCK_GIVE(hdw->big_lock); |
| 2761 | } |
| 2762 | |
| 2763 | |
| 2764 | // Attempt to autoselect an appropriate value for std_enum_cur given |
| 2765 | // whatever is currently in std_mask_cur |
Adrian Bunk | 07e337e | 2006-06-30 11:30:20 -0300 | [diff] [blame] | 2766 | static void pvr2_hdw_internal_find_stdenum(struct pvr2_hdw *hdw) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2767 | { |
| 2768 | unsigned int idx; |
| 2769 | for (idx = 1; idx < hdw->std_enum_cnt; idx++) { |
| 2770 | if (hdw->std_defs[idx-1].id == hdw->std_mask_cur) { |
| 2771 | hdw->std_enum_cur = idx; |
| 2772 | return; |
| 2773 | } |
| 2774 | } |
| 2775 | hdw->std_enum_cur = 0; |
| 2776 | } |
| 2777 | |
| 2778 | |
| 2779 | // Calculate correct set of enumerated standards based on currently known |
| 2780 | // set of available standards bits. |
Adrian Bunk | 07e337e | 2006-06-30 11:30:20 -0300 | [diff] [blame] | 2781 | static void pvr2_hdw_internal_set_std_avail(struct pvr2_hdw *hdw) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2782 | { |
| 2783 | struct v4l2_standard *newstd; |
| 2784 | unsigned int std_cnt; |
| 2785 | unsigned int idx; |
| 2786 | |
| 2787 | newstd = pvr2_std_create_enum(&std_cnt,hdw->std_mask_avail); |
| 2788 | |
| 2789 | if (hdw->std_defs) { |
| 2790 | kfree(hdw->std_defs); |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2791 | hdw->std_defs = NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2792 | } |
| 2793 | hdw->std_enum_cnt = 0; |
| 2794 | if (hdw->std_enum_names) { |
| 2795 | kfree(hdw->std_enum_names); |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2796 | hdw->std_enum_names = NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2797 | } |
| 2798 | |
| 2799 | if (!std_cnt) { |
| 2800 | pvr2_trace( |
| 2801 | PVR2_TRACE_ERROR_LEGS, |
| 2802 | "WARNING: Failed to identify any viable standards"); |
| 2803 | } |
| 2804 | hdw->std_enum_names = kmalloc(sizeof(char *)*(std_cnt+1),GFP_KERNEL); |
| 2805 | hdw->std_enum_names[0] = "none"; |
| 2806 | for (idx = 0; idx < std_cnt; idx++) { |
| 2807 | hdw->std_enum_names[idx+1] = |
| 2808 | newstd[idx].name; |
| 2809 | } |
| 2810 | // Set up the dynamic control for this standard |
| 2811 | hdw->std_info_enum.def.type_enum.value_names = hdw->std_enum_names; |
| 2812 | hdw->std_info_enum.def.type_enum.count = std_cnt+1; |
| 2813 | hdw->std_defs = newstd; |
| 2814 | hdw->std_enum_cnt = std_cnt+1; |
| 2815 | hdw->std_enum_cur = 0; |
| 2816 | hdw->std_info_cur.def.type_bitmask.valid_bits = hdw->std_mask_avail; |
| 2817 | } |
| 2818 | |
| 2819 | |
| 2820 | int pvr2_hdw_get_stdenum_value(struct pvr2_hdw *hdw, |
| 2821 | struct v4l2_standard *std, |
| 2822 | unsigned int idx) |
| 2823 | { |
| 2824 | int ret = -EINVAL; |
| 2825 | if (!idx) return ret; |
| 2826 | LOCK_TAKE(hdw->big_lock); do { |
| 2827 | if (idx >= hdw->std_enum_cnt) break; |
| 2828 | idx--; |
| 2829 | memcpy(std,hdw->std_defs+idx,sizeof(*std)); |
| 2830 | ret = 0; |
| 2831 | } while (0); LOCK_GIVE(hdw->big_lock); |
| 2832 | return ret; |
| 2833 | } |
| 2834 | |
| 2835 | |
| 2836 | /* Get the number of defined controls */ |
| 2837 | unsigned int pvr2_hdw_get_ctrl_count(struct pvr2_hdw *hdw) |
| 2838 | { |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 2839 | return hdw->control_cnt; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2840 | } |
| 2841 | |
| 2842 | |
| 2843 | /* Retrieve a control handle given its index (0..count-1) */ |
| 2844 | struct pvr2_ctrl *pvr2_hdw_get_ctrl_by_index(struct pvr2_hdw *hdw, |
| 2845 | unsigned int idx) |
| 2846 | { |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2847 | if (idx >= hdw->control_cnt) return NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2848 | return hdw->controls + idx; |
| 2849 | } |
| 2850 | |
| 2851 | |
| 2852 | /* Retrieve a control handle given its index (0..count-1) */ |
| 2853 | struct pvr2_ctrl *pvr2_hdw_get_ctrl_by_id(struct pvr2_hdw *hdw, |
| 2854 | unsigned int ctl_id) |
| 2855 | { |
| 2856 | struct pvr2_ctrl *cptr; |
| 2857 | unsigned int idx; |
| 2858 | int i; |
| 2859 | |
| 2860 | /* This could be made a lot more efficient, but for now... */ |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 2861 | for (idx = 0; idx < hdw->control_cnt; idx++) { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2862 | cptr = hdw->controls + idx; |
| 2863 | i = cptr->info->internal_id; |
| 2864 | if (i && (i == ctl_id)) return cptr; |
| 2865 | } |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2866 | return NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2867 | } |
| 2868 | |
| 2869 | |
Mike Isely | a761f43 | 2006-06-25 20:04:44 -0300 | [diff] [blame] | 2870 | /* Given a V4L ID, retrieve the control structure associated with it. */ |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2871 | struct pvr2_ctrl *pvr2_hdw_get_ctrl_v4l(struct pvr2_hdw *hdw,unsigned int ctl_id) |
| 2872 | { |
| 2873 | struct pvr2_ctrl *cptr; |
| 2874 | unsigned int idx; |
| 2875 | int i; |
| 2876 | |
| 2877 | /* This could be made a lot more efficient, but for now... */ |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 2878 | for (idx = 0; idx < hdw->control_cnt; idx++) { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2879 | cptr = hdw->controls + idx; |
| 2880 | i = cptr->info->v4l_id; |
| 2881 | if (i && (i == ctl_id)) return cptr; |
| 2882 | } |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2883 | return NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2884 | } |
| 2885 | |
| 2886 | |
Mike Isely | a761f43 | 2006-06-25 20:04:44 -0300 | [diff] [blame] | 2887 | /* Given a V4L ID for its immediate predecessor, retrieve the control |
| 2888 | structure associated with it. */ |
| 2889 | struct pvr2_ctrl *pvr2_hdw_get_ctrl_nextv4l(struct pvr2_hdw *hdw, |
| 2890 | unsigned int ctl_id) |
| 2891 | { |
| 2892 | struct pvr2_ctrl *cptr,*cp2; |
| 2893 | unsigned int idx; |
| 2894 | int i; |
| 2895 | |
| 2896 | /* This could be made a lot more efficient, but for now... */ |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2897 | cp2 = NULL; |
Mike Isely | a761f43 | 2006-06-25 20:04:44 -0300 | [diff] [blame] | 2898 | for (idx = 0; idx < hdw->control_cnt; idx++) { |
| 2899 | cptr = hdw->controls + idx; |
| 2900 | i = cptr->info->v4l_id; |
| 2901 | if (!i) continue; |
| 2902 | if (i <= ctl_id) continue; |
| 2903 | if (cp2 && (cp2->info->v4l_id < i)) continue; |
| 2904 | cp2 = cptr; |
| 2905 | } |
| 2906 | return cp2; |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2907 | return NULL; |
Mike Isely | a761f43 | 2006-06-25 20:04:44 -0300 | [diff] [blame] | 2908 | } |
| 2909 | |
| 2910 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2911 | static const char *get_ctrl_typename(enum pvr2_ctl_type tp) |
| 2912 | { |
| 2913 | switch (tp) { |
| 2914 | case pvr2_ctl_int: return "integer"; |
| 2915 | case pvr2_ctl_enum: return "enum"; |
Mike Isely | 3321396 | 2006-06-25 20:04:40 -0300 | [diff] [blame] | 2916 | case pvr2_ctl_bool: return "boolean"; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2917 | case pvr2_ctl_bitmask: return "bitmask"; |
| 2918 | } |
| 2919 | return ""; |
| 2920 | } |
| 2921 | |
| 2922 | |
Mike Isely | 2641df3 | 2009-03-07 00:13:25 -0300 | [diff] [blame] | 2923 | static void pvr2_subdev_set_control(struct pvr2_hdw *hdw, int id, |
| 2924 | const char *name, int val) |
| 2925 | { |
| 2926 | struct v4l2_control ctrl; |
| 2927 | pvr2_trace(PVR2_TRACE_CHIPS, "subdev v4l2 %s=%d", name, val); |
| 2928 | memset(&ctrl, 0, sizeof(ctrl)); |
| 2929 | ctrl.id = id; |
| 2930 | ctrl.value = val; |
| 2931 | v4l2_device_call_all(&hdw->v4l2_dev, 0, core, s_ctrl, &ctrl); |
| 2932 | } |
| 2933 | |
| 2934 | #define PVR2_SUBDEV_SET_CONTROL(hdw, id, lab) \ |
| 2935 | if ((hdw)->lab##_dirty) { \ |
| 2936 | pvr2_subdev_set_control(hdw, id, #lab, (hdw)->lab##_val); \ |
| 2937 | } |
| 2938 | |
Mike Isely | 5ceaad1 | 2009-03-07 00:01:20 -0300 | [diff] [blame] | 2939 | /* Execute whatever commands are required to update the state of all the |
Mike Isely | 2641df3 | 2009-03-07 00:13:25 -0300 | [diff] [blame] | 2940 | sub-devices so that they match our current control values. */ |
Mike Isely | 5ceaad1 | 2009-03-07 00:01:20 -0300 | [diff] [blame] | 2941 | static void pvr2_subdev_update(struct pvr2_hdw *hdw) |
| 2942 | { |
Mike Isely | edb9dcb | 2009-03-07 00:37:10 -0300 | [diff] [blame] | 2943 | struct v4l2_subdev *sd; |
| 2944 | unsigned int id; |
| 2945 | pvr2_subdev_update_func fp; |
| 2946 | |
Mike Isely | 75212a0 | 2009-03-07 01:48:42 -0300 | [diff] [blame^] | 2947 | pvr2_trace(PVR2_TRACE_CHIPS, "subdev update..."); |
| 2948 | |
| 2949 | if (hdw->tuner_updated) { |
| 2950 | struct tuner_setup setup; |
| 2951 | pvr2_trace(PVR2_TRACE_CHIPS, "subdev tuner set_type(%d)", |
| 2952 | hdw->tuner_type); |
| 2953 | if (((int)(hdw->tuner_type)) >= 0) { |
| 2954 | setup.addr = ADDR_UNSET; |
| 2955 | setup.type = hdw->tuner_type; |
| 2956 | setup.mode_mask = T_RADIO | T_ANALOG_TV; |
| 2957 | v4l2_device_call_all(&hdw->v4l2_dev, 0, |
| 2958 | tuner, s_type_addr, &setup); |
| 2959 | } |
| 2960 | } |
| 2961 | |
Mike Isely | 2641df3 | 2009-03-07 00:13:25 -0300 | [diff] [blame] | 2962 | if (hdw->input_dirty || hdw->std_dirty) { |
Mike Isely | b481880 | 2009-03-07 01:46:17 -0300 | [diff] [blame] | 2963 | pvr2_trace(PVR2_TRACE_CHIPS, "subdev v4l2 set_standard"); |
Mike Isely | 2641df3 | 2009-03-07 00:13:25 -0300 | [diff] [blame] | 2964 | if (hdw->input_val == PVR2_CVAL_INPUT_RADIO) { |
| 2965 | v4l2_device_call_all(&hdw->v4l2_dev, 0, |
| 2966 | tuner, s_radio); |
| 2967 | } else { |
| 2968 | v4l2_std_id vs; |
| 2969 | vs = hdw->std_mask_cur; |
| 2970 | v4l2_device_call_all(&hdw->v4l2_dev, 0, |
| 2971 | tuner, s_std, vs); |
| 2972 | } |
| 2973 | hdw->tuner_signal_stale = !0; |
| 2974 | hdw->cropcap_stale = !0; |
| 2975 | } |
| 2976 | |
| 2977 | PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_BRIGHTNESS, brightness); |
| 2978 | PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_CONTRAST, contrast); |
| 2979 | PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_SATURATION, saturation); |
| 2980 | PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_HUE, hue); |
| 2981 | PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_AUDIO_MUTE, mute); |
| 2982 | PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_AUDIO_VOLUME, volume); |
| 2983 | PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_AUDIO_BALANCE, balance); |
| 2984 | PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_AUDIO_BASS, bass); |
| 2985 | PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_AUDIO_TREBLE, treble); |
| 2986 | |
| 2987 | if (hdw->input_dirty || hdw->audiomode_dirty) { |
| 2988 | struct v4l2_tuner vt; |
| 2989 | memset(&vt, 0, sizeof(vt)); |
| 2990 | vt.audmode = hdw->audiomode_val; |
| 2991 | v4l2_device_call_all(&hdw->v4l2_dev, 0, tuner, s_tuner, &vt); |
| 2992 | } |
| 2993 | |
| 2994 | if (hdw->freqDirty) { |
| 2995 | unsigned long fv; |
| 2996 | struct v4l2_frequency freq; |
| 2997 | fv = pvr2_hdw_get_cur_freq(hdw); |
| 2998 | pvr2_trace(PVR2_TRACE_CHIPS, "subdev v4l2 set_freq(%lu)", fv); |
| 2999 | if (hdw->tuner_signal_stale) pvr2_hdw_status_poll(hdw); |
| 3000 | memset(&freq, 0, sizeof(freq)); |
| 3001 | if (hdw->tuner_signal_info.capability & V4L2_TUNER_CAP_LOW) { |
| 3002 | /* ((fv * 1000) / 62500) */ |
| 3003 | freq.frequency = (fv * 2) / 125; |
| 3004 | } else { |
| 3005 | freq.frequency = fv / 62500; |
| 3006 | } |
| 3007 | /* tuner-core currently doesn't seem to care about this, but |
| 3008 | let's set it anyway for completeness. */ |
| 3009 | if (hdw->input_val == PVR2_CVAL_INPUT_RADIO) { |
| 3010 | freq.type = V4L2_TUNER_RADIO; |
| 3011 | } else { |
| 3012 | freq.type = V4L2_TUNER_ANALOG_TV; |
| 3013 | } |
| 3014 | freq.tuner = 0; |
| 3015 | v4l2_device_call_all(&hdw->v4l2_dev, 0, tuner, |
| 3016 | s_frequency, &freq); |
| 3017 | } |
| 3018 | |
| 3019 | if (hdw->res_hor_dirty || hdw->res_ver_dirty) { |
| 3020 | struct v4l2_format fmt; |
| 3021 | memset(&fmt, 0, sizeof(fmt)); |
| 3022 | fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; |
| 3023 | fmt.fmt.pix.width = hdw->res_hor_val; |
| 3024 | fmt.fmt.pix.height = hdw->res_ver_val; |
| 3025 | pvr2_trace(PVR2_TRACE_CHIPS,"subdev v4l2 set_size(%dx%d)", |
| 3026 | fmt.fmt.pix.width, fmt.fmt.pix.height); |
| 3027 | v4l2_device_call_all(&hdw->v4l2_dev, 0, video, s_fmt, &fmt); |
| 3028 | } |
| 3029 | |
Mike Isely | 01c59df | 2009-03-07 00:48:09 -0300 | [diff] [blame] | 3030 | if (hdw->srate_dirty) { |
| 3031 | u32 val; |
| 3032 | pvr2_trace(PVR2_TRACE_CHIPS, "subdev v4l2 set_audio %d", |
| 3033 | hdw->srate_val); |
| 3034 | switch (hdw->srate_val) { |
| 3035 | default: |
| 3036 | case V4L2_MPEG_AUDIO_SAMPLING_FREQ_48000: |
| 3037 | val = 48000; |
| 3038 | break; |
| 3039 | case V4L2_MPEG_AUDIO_SAMPLING_FREQ_44100: |
| 3040 | val = 44100; |
| 3041 | break; |
| 3042 | case V4L2_MPEG_AUDIO_SAMPLING_FREQ_32000: |
| 3043 | val = 32000; |
| 3044 | break; |
| 3045 | } |
| 3046 | v4l2_device_call_all(&hdw->v4l2_dev, 0, |
| 3047 | audio, s_clock_freq, val); |
| 3048 | } |
| 3049 | |
Mike Isely | 2641df3 | 2009-03-07 00:13:25 -0300 | [diff] [blame] | 3050 | /* Unable to set crop parameters; there is apparently no equivalent |
| 3051 | for VIDIOC_S_CROP */ |
| 3052 | |
Mike Isely | edb9dcb | 2009-03-07 00:37:10 -0300 | [diff] [blame] | 3053 | v4l2_device_for_each_subdev(sd, &hdw->v4l2_dev) { |
| 3054 | id = sd->grp_id; |
| 3055 | if (id >= ARRAY_SIZE(pvr2_module_update_functions)) continue; |
| 3056 | fp = pvr2_module_update_functions[id]; |
| 3057 | if (!fp) continue; |
| 3058 | (*fp)(hdw, sd); |
| 3059 | } |
Mike Isely | 2641df3 | 2009-03-07 00:13:25 -0300 | [diff] [blame] | 3060 | |
| 3061 | if (hdw->tuner_signal_stale && hdw->cropcap_stale) { |
| 3062 | pvr2_hdw_status_poll(hdw); |
| 3063 | } |
Mike Isely | 5ceaad1 | 2009-03-07 00:01:20 -0300 | [diff] [blame] | 3064 | } |
| 3065 | |
| 3066 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 3067 | /* Figure out if we need to commit control changes. If so, mark internal |
| 3068 | state flags to indicate this fact and return true. Otherwise do nothing |
| 3069 | else and return false. */ |
| 3070 | static int pvr2_hdw_commit_setup(struct pvr2_hdw *hdw) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3071 | { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3072 | unsigned int idx; |
| 3073 | struct pvr2_ctrl *cptr; |
| 3074 | int value; |
| 3075 | int commit_flag = 0; |
| 3076 | char buf[100]; |
| 3077 | unsigned int bcnt,ccnt; |
| 3078 | |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 3079 | for (idx = 0; idx < hdw->control_cnt; idx++) { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3080 | cptr = hdw->controls + idx; |
Al Viro | 5fa1247 | 2008-03-29 03:07:38 +0000 | [diff] [blame] | 3081 | if (!cptr->info->is_dirty) continue; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3082 | if (!cptr->info->is_dirty(cptr)) continue; |
Mike Isely | fe23a28 | 2007-01-20 00:10:55 -0300 | [diff] [blame] | 3083 | commit_flag = !0; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3084 | |
Mike Isely | fe23a28 | 2007-01-20 00:10:55 -0300 | [diff] [blame] | 3085 | if (!(pvrusb2_debug & PVR2_TRACE_CTL)) continue; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3086 | bcnt = scnprintf(buf,sizeof(buf),"\"%s\" <-- ", |
| 3087 | cptr->info->name); |
| 3088 | value = 0; |
| 3089 | cptr->info->get_value(cptr,&value); |
| 3090 | pvr2_ctrl_value_to_sym_internal(cptr,~0,value, |
| 3091 | buf+bcnt, |
| 3092 | sizeof(buf)-bcnt,&ccnt); |
| 3093 | bcnt += ccnt; |
| 3094 | bcnt += scnprintf(buf+bcnt,sizeof(buf)-bcnt," <%s>", |
| 3095 | get_ctrl_typename(cptr->info->type)); |
| 3096 | pvr2_trace(PVR2_TRACE_CTL, |
| 3097 | "/*--TRACE_COMMIT--*/ %.*s", |
| 3098 | bcnt,buf); |
| 3099 | } |
| 3100 | |
| 3101 | if (!commit_flag) { |
| 3102 | /* Nothing has changed */ |
| 3103 | return 0; |
| 3104 | } |
| 3105 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 3106 | hdw->state_pipeline_config = 0; |
| 3107 | trace_stbit("state_pipeline_config",hdw->state_pipeline_config); |
| 3108 | pvr2_hdw_state_sched(hdw); |
| 3109 | |
| 3110 | return !0; |
| 3111 | } |
| 3112 | |
| 3113 | |
| 3114 | /* Perform all operations needed to commit all control changes. This must |
| 3115 | be performed in synchronization with the pipeline state and is thus |
| 3116 | expected to be called as part of the driver's worker thread. Return |
| 3117 | true if commit successful, otherwise return false to indicate that |
| 3118 | commit isn't possible at this time. */ |
| 3119 | static int pvr2_hdw_commit_execute(struct pvr2_hdw *hdw) |
| 3120 | { |
| 3121 | unsigned int idx; |
| 3122 | struct pvr2_ctrl *cptr; |
| 3123 | int disruptive_change; |
| 3124 | |
Mike Isely | ab062fe | 2008-06-30 03:32:35 -0300 | [diff] [blame] | 3125 | /* Handle some required side effects when the video standard is |
| 3126 | changed.... */ |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3127 | if (hdw->std_dirty) { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3128 | int nvres; |
Mike Isely | 00528d9 | 2008-06-30 03:35:52 -0300 | [diff] [blame] | 3129 | int gop_size; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3130 | if (hdw->std_mask_cur & V4L2_STD_525_60) { |
| 3131 | nvres = 480; |
Mike Isely | 00528d9 | 2008-06-30 03:35:52 -0300 | [diff] [blame] | 3132 | gop_size = 15; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3133 | } else { |
| 3134 | nvres = 576; |
Mike Isely | 00528d9 | 2008-06-30 03:35:52 -0300 | [diff] [blame] | 3135 | gop_size = 12; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3136 | } |
Mike Isely | 00528d9 | 2008-06-30 03:35:52 -0300 | [diff] [blame] | 3137 | /* Rewrite the vertical resolution to be appropriate to the |
| 3138 | video standard that has been selected. */ |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3139 | if (nvres != hdw->res_ver_val) { |
| 3140 | hdw->res_ver_val = nvres; |
| 3141 | hdw->res_ver_dirty = !0; |
| 3142 | } |
Mike Isely | 00528d9 | 2008-06-30 03:35:52 -0300 | [diff] [blame] | 3143 | /* Rewrite the GOP size to be appropriate to the video |
| 3144 | standard that has been selected. */ |
| 3145 | if (gop_size != hdw->enc_ctl_state.video_gop_size) { |
| 3146 | struct v4l2_ext_controls cs; |
| 3147 | struct v4l2_ext_control c1; |
| 3148 | memset(&cs, 0, sizeof(cs)); |
| 3149 | memset(&c1, 0, sizeof(c1)); |
| 3150 | cs.controls = &c1; |
| 3151 | cs.count = 1; |
| 3152 | c1.id = V4L2_CID_MPEG_VIDEO_GOP_SIZE; |
| 3153 | c1.value = gop_size; |
| 3154 | cx2341x_ext_ctrls(&hdw->enc_ctl_state, 0, &cs, |
| 3155 | VIDIOC_S_EXT_CTRLS); |
| 3156 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3157 | } |
| 3158 | |
Mike Isely | 38d9a2c | 2008-03-28 05:30:48 -0300 | [diff] [blame] | 3159 | if (hdw->input_dirty && hdw->state_pathway_ok && |
Mike Isely | 62433e3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 3160 | (((hdw->input_val == PVR2_CVAL_INPUT_DTV) ? |
| 3161 | PVR2_PATHWAY_DIGITAL : PVR2_PATHWAY_ANALOG) != |
| 3162 | hdw->pathway_state)) { |
| 3163 | /* Change of mode being asked for... */ |
| 3164 | hdw->state_pathway_ok = 0; |
Mike Isely | e9db1ff | 2008-04-22 14:45:41 -0300 | [diff] [blame] | 3165 | trace_stbit("state_pathway_ok",hdw->state_pathway_ok); |
Mike Isely | 62433e3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 3166 | } |
| 3167 | if (!hdw->state_pathway_ok) { |
| 3168 | /* Can't commit anything until pathway is ok. */ |
| 3169 | return 0; |
| 3170 | } |
vdb128@picaros.org | e784bfb | 2008-08-30 18:26:39 -0300 | [diff] [blame] | 3171 | /* The broadcast decoder can only scale down, so if |
| 3172 | * res_*_dirty && crop window < output format ==> enlarge crop. |
| 3173 | * |
| 3174 | * The mpeg encoder receives fields of res_hor_val dots and |
| 3175 | * res_ver_val halflines. Limits: hor<=720, ver<=576. |
| 3176 | */ |
| 3177 | if (hdw->res_hor_dirty && hdw->cropw_val < hdw->res_hor_val) { |
| 3178 | hdw->cropw_val = hdw->res_hor_val; |
| 3179 | hdw->cropw_dirty = !0; |
| 3180 | } else if (hdw->cropw_dirty) { |
| 3181 | hdw->res_hor_dirty = !0; /* must rescale */ |
| 3182 | hdw->res_hor_val = min(720, hdw->cropw_val); |
| 3183 | } |
| 3184 | if (hdw->res_ver_dirty && hdw->croph_val < hdw->res_ver_val) { |
| 3185 | hdw->croph_val = hdw->res_ver_val; |
| 3186 | hdw->croph_dirty = !0; |
| 3187 | } else if (hdw->croph_dirty) { |
| 3188 | int nvres = hdw->std_mask_cur & V4L2_STD_525_60 ? 480 : 576; |
| 3189 | hdw->res_ver_dirty = !0; |
| 3190 | hdw->res_ver_val = min(nvres, hdw->croph_val); |
| 3191 | } |
| 3192 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 3193 | /* If any of the below has changed, then we can't do the update |
| 3194 | while the pipeline is running. Pipeline must be paused first |
| 3195 | and decoder -> encoder connection be made quiescent before we |
| 3196 | can proceed. */ |
| 3197 | disruptive_change = |
| 3198 | (hdw->std_dirty || |
| 3199 | hdw->enc_unsafe_stale || |
| 3200 | hdw->srate_dirty || |
| 3201 | hdw->res_ver_dirty || |
| 3202 | hdw->res_hor_dirty || |
Mike Isely | 755879c | 2008-08-31 20:50:59 -0300 | [diff] [blame] | 3203 | hdw->cropw_dirty || |
| 3204 | hdw->croph_dirty || |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 3205 | hdw->input_dirty || |
| 3206 | (hdw->active_stream_type != hdw->desired_stream_type)); |
| 3207 | if (disruptive_change && !hdw->state_pipeline_idle) { |
| 3208 | /* Pipeline is not idle; we can't proceed. Arrange to |
| 3209 | cause pipeline to stop so that we can try this again |
| 3210 | later.... */ |
| 3211 | hdw->state_pipeline_pause = !0; |
| 3212 | return 0; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3213 | } |
| 3214 | |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 3215 | if (hdw->srate_dirty) { |
| 3216 | /* Write new sample rate into control structure since |
| 3217 | * the master copy is stale. We must track srate |
| 3218 | * separate from the mpeg control structure because |
| 3219 | * other logic also uses this value. */ |
| 3220 | struct v4l2_ext_controls cs; |
| 3221 | struct v4l2_ext_control c1; |
| 3222 | memset(&cs,0,sizeof(cs)); |
| 3223 | memset(&c1,0,sizeof(c1)); |
| 3224 | cs.controls = &c1; |
| 3225 | cs.count = 1; |
| 3226 | c1.id = V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ; |
| 3227 | c1.value = hdw->srate_val; |
Hans Verkuil | 01f1e44 | 2007-08-21 18:32:42 -0300 | [diff] [blame] | 3228 | cx2341x_ext_ctrls(&hdw->enc_ctl_state, 0, &cs,VIDIOC_S_EXT_CTRLS); |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 3229 | } |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 3230 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3231 | /* Scan i2c core at this point - before we clear all the dirty |
| 3232 | bits. Various parts of the i2c core will notice dirty bits as |
| 3233 | appropriate and arrange to broadcast or directly send updates to |
| 3234 | the client drivers in order to keep everything in sync */ |
| 3235 | pvr2_i2c_core_check_stale(hdw); |
| 3236 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 3237 | if (hdw->active_stream_type != hdw->desired_stream_type) { |
| 3238 | /* Handle any side effects of stream config here */ |
| 3239 | hdw->active_stream_type = hdw->desired_stream_type; |
| 3240 | } |
| 3241 | |
Mike Isely | 1df59f0 | 2008-04-21 03:50:39 -0300 | [diff] [blame] | 3242 | if (hdw->hdw_desc->signal_routing_scheme == |
| 3243 | PVR2_ROUTING_SCHEME_GOTVIEW) { |
| 3244 | u32 b; |
| 3245 | /* Handle GOTVIEW audio switching */ |
| 3246 | pvr2_hdw_gpio_get_out(hdw,&b); |
| 3247 | if (hdw->input_val == PVR2_CVAL_INPUT_RADIO) { |
| 3248 | /* Set GPIO 11 */ |
| 3249 | pvr2_hdw_gpio_chg_out(hdw,(1 << 11),~0); |
| 3250 | } else { |
| 3251 | /* Clear GPIO 11 */ |
| 3252 | pvr2_hdw_gpio_chg_out(hdw,(1 << 11),0); |
| 3253 | } |
| 3254 | } |
| 3255 | |
Mike Isely | e68a619 | 2009-03-07 01:45:10 -0300 | [diff] [blame] | 3256 | /* Check and update state for all sub-devices. */ |
| 3257 | pvr2_subdev_update(hdw); |
| 3258 | |
Mike Isely | 75212a0 | 2009-03-07 01:48:42 -0300 | [diff] [blame^] | 3259 | hdw->tuner_updated = 0; |
Mike Isely | 5ceaad1 | 2009-03-07 00:01:20 -0300 | [diff] [blame] | 3260 | for (idx = 0; idx < hdw->control_cnt; idx++) { |
| 3261 | cptr = hdw->controls + idx; |
| 3262 | if (!cptr->info->clear_dirty) continue; |
| 3263 | cptr->info->clear_dirty(cptr); |
| 3264 | } |
| 3265 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3266 | /* Now execute i2c core update */ |
| 3267 | pvr2_i2c_core_sync(hdw); |
| 3268 | |
Mike Isely | 62433e3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 3269 | if ((hdw->pathway_state == PVR2_PATHWAY_ANALOG) && |
| 3270 | hdw->state_encoder_run) { |
| 3271 | /* If encoder isn't running or it can't be touched, then |
| 3272 | this will get worked out later when we start the |
| 3273 | encoder. */ |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 3274 | if (pvr2_encoder_adjust(hdw) < 0) return !0; |
| 3275 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3276 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 3277 | hdw->state_pipeline_config = !0; |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 3278 | /* Hardware state may have changed in a way to cause the cropping |
| 3279 | capabilities to have changed. So mark it stale, which will |
| 3280 | cause a later re-fetch. */ |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 3281 | trace_stbit("state_pipeline_config",hdw->state_pipeline_config); |
| 3282 | return !0; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3283 | } |
| 3284 | |
| 3285 | |
| 3286 | int pvr2_hdw_commit_ctl(struct pvr2_hdw *hdw) |
| 3287 | { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 3288 | int fl; |
| 3289 | LOCK_TAKE(hdw->big_lock); |
| 3290 | fl = pvr2_hdw_commit_setup(hdw); |
| 3291 | LOCK_GIVE(hdw->big_lock); |
| 3292 | if (!fl) return 0; |
| 3293 | return pvr2_hdw_wait(hdw,0); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3294 | } |
| 3295 | |
| 3296 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 3297 | static void pvr2_hdw_worker_i2c(struct work_struct *work) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3298 | { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 3299 | struct pvr2_hdw *hdw = container_of(work,struct pvr2_hdw,worki2csync); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3300 | LOCK_TAKE(hdw->big_lock); do { |
| 3301 | pvr2_i2c_core_sync(hdw); |
| 3302 | } while (0); LOCK_GIVE(hdw->big_lock); |
| 3303 | } |
| 3304 | |
| 3305 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 3306 | static void pvr2_hdw_worker_poll(struct work_struct *work) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3307 | { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 3308 | int fl = 0; |
| 3309 | struct pvr2_hdw *hdw = container_of(work,struct pvr2_hdw,workpoll); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3310 | LOCK_TAKE(hdw->big_lock); do { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 3311 | fl = pvr2_hdw_state_eval(hdw); |
| 3312 | } while (0); LOCK_GIVE(hdw->big_lock); |
| 3313 | if (fl && hdw->state_func) { |
| 3314 | hdw->state_func(hdw->state_data); |
| 3315 | } |
| 3316 | } |
| 3317 | |
| 3318 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 3319 | static int pvr2_hdw_wait(struct pvr2_hdw *hdw,int state) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3320 | { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 3321 | return wait_event_interruptible( |
| 3322 | hdw->state_wait_data, |
| 3323 | (hdw->state_stale == 0) && |
| 3324 | (!state || (hdw->master_state != state))); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3325 | } |
| 3326 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 3327 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3328 | /* Return name for this driver instance */ |
| 3329 | const char *pvr2_hdw_get_driver_name(struct pvr2_hdw *hdw) |
| 3330 | { |
| 3331 | return hdw->name; |
| 3332 | } |
| 3333 | |
| 3334 | |
Mike Isely | 78a4710 | 2007-11-26 01:58:20 -0300 | [diff] [blame] | 3335 | const char *pvr2_hdw_get_desc(struct pvr2_hdw *hdw) |
| 3336 | { |
| 3337 | return hdw->hdw_desc->description; |
| 3338 | } |
| 3339 | |
| 3340 | |
| 3341 | const char *pvr2_hdw_get_type(struct pvr2_hdw *hdw) |
| 3342 | { |
| 3343 | return hdw->hdw_desc->shortname; |
| 3344 | } |
| 3345 | |
| 3346 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3347 | int pvr2_hdw_is_hsm(struct pvr2_hdw *hdw) |
| 3348 | { |
| 3349 | int result; |
| 3350 | LOCK_TAKE(hdw->ctl_lock); do { |
Michael Krufky | 8d36436 | 2007-01-22 02:17:55 -0300 | [diff] [blame] | 3351 | hdw->cmd_buffer[0] = FX2CMD_GET_USB_SPEED; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3352 | result = pvr2_send_request(hdw, |
| 3353 | hdw->cmd_buffer,1, |
| 3354 | hdw->cmd_buffer,1); |
| 3355 | if (result < 0) break; |
| 3356 | result = (hdw->cmd_buffer[0] != 0); |
| 3357 | } while(0); LOCK_GIVE(hdw->ctl_lock); |
| 3358 | return result; |
| 3359 | } |
| 3360 | |
| 3361 | |
Mike Isely | 18103c57 | 2007-01-20 00:09:47 -0300 | [diff] [blame] | 3362 | /* Execute poll of tuner status */ |
| 3363 | void pvr2_hdw_execute_tuner_poll(struct pvr2_hdw *hdw) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3364 | { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3365 | LOCK_TAKE(hdw->big_lock); do { |
Mike Isely | a51f500 | 2009-03-06 23:30:37 -0300 | [diff] [blame] | 3366 | pvr2_hdw_status_poll(hdw); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3367 | } while (0); LOCK_GIVE(hdw->big_lock); |
Mike Isely | 18103c57 | 2007-01-20 00:09:47 -0300 | [diff] [blame] | 3368 | } |
| 3369 | |
| 3370 | |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 3371 | static int pvr2_hdw_check_cropcap(struct pvr2_hdw *hdw) |
| 3372 | { |
| 3373 | if (!hdw->cropcap_stale) { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 3374 | return 0; |
| 3375 | } |
Mike Isely | a51f500 | 2009-03-06 23:30:37 -0300 | [diff] [blame] | 3376 | pvr2_hdw_status_poll(hdw); |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 3377 | if (hdw->cropcap_stale) { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 3378 | return -EIO; |
| 3379 | } |
| 3380 | return 0; |
| 3381 | } |
| 3382 | |
| 3383 | |
| 3384 | /* Return information about cropping capabilities */ |
| 3385 | int pvr2_hdw_get_cropcap(struct pvr2_hdw *hdw, struct v4l2_cropcap *pp) |
| 3386 | { |
| 3387 | int stat = 0; |
| 3388 | LOCK_TAKE(hdw->big_lock); |
| 3389 | stat = pvr2_hdw_check_cropcap(hdw); |
| 3390 | if (!stat) { |
Mike Isely | 432907f | 2008-08-31 21:02:20 -0300 | [diff] [blame] | 3391 | memcpy(pp, &hdw->cropcap_info, sizeof(hdw->cropcap_info)); |
| 3392 | } |
| 3393 | LOCK_GIVE(hdw->big_lock); |
| 3394 | return stat; |
| 3395 | } |
| 3396 | |
| 3397 | |
Mike Isely | 18103c57 | 2007-01-20 00:09:47 -0300 | [diff] [blame] | 3398 | /* Return information about the tuner */ |
| 3399 | int pvr2_hdw_get_tuner_status(struct pvr2_hdw *hdw,struct v4l2_tuner *vtp) |
| 3400 | { |
| 3401 | LOCK_TAKE(hdw->big_lock); do { |
| 3402 | if (hdw->tuner_signal_stale) { |
Mike Isely | a51f500 | 2009-03-06 23:30:37 -0300 | [diff] [blame] | 3403 | pvr2_hdw_status_poll(hdw); |
Mike Isely | 18103c57 | 2007-01-20 00:09:47 -0300 | [diff] [blame] | 3404 | } |
| 3405 | memcpy(vtp,&hdw->tuner_signal_info,sizeof(struct v4l2_tuner)); |
| 3406 | } while (0); LOCK_GIVE(hdw->big_lock); |
| 3407 | return 0; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3408 | } |
| 3409 | |
| 3410 | |
| 3411 | /* Get handle to video output stream */ |
| 3412 | struct pvr2_stream *pvr2_hdw_get_video_stream(struct pvr2_hdw *hp) |
| 3413 | { |
| 3414 | return hp->vid_stream; |
| 3415 | } |
| 3416 | |
| 3417 | |
| 3418 | void pvr2_hdw_trigger_module_log(struct pvr2_hdw *hdw) |
| 3419 | { |
Mike Isely | 4f1a3e5 | 2006-06-25 20:04:31 -0300 | [diff] [blame] | 3420 | int nr = pvr2_hdw_get_unit_number(hdw); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3421 | LOCK_TAKE(hdw->big_lock); do { |
Mike Isely | 4f1a3e5 | 2006-06-25 20:04:31 -0300 | [diff] [blame] | 3422 | printk(KERN_INFO "pvrusb2: ================= START STATUS CARD #%d =================\n", nr); |
Mike Isely | 5ceaad1 | 2009-03-07 00:01:20 -0300 | [diff] [blame] | 3423 | hdw->log_requested = !0; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3424 | pvr2_i2c_core_check_stale(hdw); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3425 | pvr2_i2c_core_sync(hdw); |
Mike Isely | a51f500 | 2009-03-06 23:30:37 -0300 | [diff] [blame] | 3426 | hdw->log_requested = 0; |
Mike Isely | ed3261a | 2009-03-07 00:02:33 -0300 | [diff] [blame] | 3427 | v4l2_device_call_all(&hdw->v4l2_dev, 0, core, log_status); |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 3428 | pvr2_trace(PVR2_TRACE_INFO,"cx2341x config:"); |
Hans Verkuil | 99eb44f | 2006-06-26 18:24:05 -0300 | [diff] [blame] | 3429 | cx2341x_log_status(&hdw->enc_ctl_state, "pvrusb2"); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 3430 | pvr2_hdw_state_log_state(hdw); |
Mike Isely | 4f1a3e5 | 2006-06-25 20:04:31 -0300 | [diff] [blame] | 3431 | printk(KERN_INFO "pvrusb2: ================== END STATUS CARD #%d ==================\n", nr); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3432 | } while (0); LOCK_GIVE(hdw->big_lock); |
| 3433 | } |
| 3434 | |
Mike Isely | 4db666c | 2007-09-08 22:16:27 -0300 | [diff] [blame] | 3435 | |
| 3436 | /* Grab EEPROM contents, needed for direct method. */ |
| 3437 | #define EEPROM_SIZE 8192 |
| 3438 | #define trace_eeprom(...) pvr2_trace(PVR2_TRACE_EEPROM,__VA_ARGS__) |
| 3439 | static u8 *pvr2_full_eeprom_fetch(struct pvr2_hdw *hdw) |
| 3440 | { |
| 3441 | struct i2c_msg msg[2]; |
| 3442 | u8 *eeprom; |
| 3443 | u8 iadd[2]; |
| 3444 | u8 addr; |
| 3445 | u16 eepromSize; |
| 3446 | unsigned int offs; |
| 3447 | int ret; |
| 3448 | int mode16 = 0; |
| 3449 | unsigned pcnt,tcnt; |
| 3450 | eeprom = kmalloc(EEPROM_SIZE,GFP_KERNEL); |
| 3451 | if (!eeprom) { |
| 3452 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 3453 | "Failed to allocate memory" |
| 3454 | " required to read eeprom"); |
| 3455 | return NULL; |
| 3456 | } |
| 3457 | |
| 3458 | trace_eeprom("Value for eeprom addr from controller was 0x%x", |
| 3459 | hdw->eeprom_addr); |
| 3460 | addr = hdw->eeprom_addr; |
| 3461 | /* Seems that if the high bit is set, then the *real* eeprom |
| 3462 | address is shifted right now bit position (noticed this in |
| 3463 | newer PVR USB2 hardware) */ |
| 3464 | if (addr & 0x80) addr >>= 1; |
| 3465 | |
| 3466 | /* FX2 documentation states that a 16bit-addressed eeprom is |
| 3467 | expected if the I2C address is an odd number (yeah, this is |
| 3468 | strange but it's what they do) */ |
| 3469 | mode16 = (addr & 1); |
| 3470 | eepromSize = (mode16 ? EEPROM_SIZE : 256); |
| 3471 | trace_eeprom("Examining %d byte eeprom at location 0x%x" |
| 3472 | " using %d bit addressing",eepromSize,addr, |
| 3473 | mode16 ? 16 : 8); |
| 3474 | |
| 3475 | msg[0].addr = addr; |
| 3476 | msg[0].flags = 0; |
| 3477 | msg[0].len = mode16 ? 2 : 1; |
| 3478 | msg[0].buf = iadd; |
| 3479 | msg[1].addr = addr; |
| 3480 | msg[1].flags = I2C_M_RD; |
| 3481 | |
| 3482 | /* We have to do the actual eeprom data fetch ourselves, because |
| 3483 | (1) we're only fetching part of the eeprom, and (2) if we were |
| 3484 | getting the whole thing our I2C driver can't grab it in one |
| 3485 | pass - which is what tveeprom is otherwise going to attempt */ |
| 3486 | memset(eeprom,0,EEPROM_SIZE); |
| 3487 | for (tcnt = 0; tcnt < EEPROM_SIZE; tcnt += pcnt) { |
| 3488 | pcnt = 16; |
| 3489 | if (pcnt + tcnt > EEPROM_SIZE) pcnt = EEPROM_SIZE-tcnt; |
| 3490 | offs = tcnt + (eepromSize - EEPROM_SIZE); |
| 3491 | if (mode16) { |
| 3492 | iadd[0] = offs >> 8; |
| 3493 | iadd[1] = offs; |
| 3494 | } else { |
| 3495 | iadd[0] = offs; |
| 3496 | } |
| 3497 | msg[1].len = pcnt; |
| 3498 | msg[1].buf = eeprom+tcnt; |
| 3499 | if ((ret = i2c_transfer(&hdw->i2c_adap, |
| 3500 | msg,ARRAY_SIZE(msg))) != 2) { |
| 3501 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 3502 | "eeprom fetch set offs err=%d",ret); |
| 3503 | kfree(eeprom); |
| 3504 | return NULL; |
| 3505 | } |
| 3506 | } |
| 3507 | return eeprom; |
| 3508 | } |
| 3509 | |
| 3510 | |
| 3511 | void pvr2_hdw_cpufw_set_enabled(struct pvr2_hdw *hdw, |
| 3512 | int prom_flag, |
| 3513 | int enable_flag) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3514 | { |
| 3515 | int ret; |
| 3516 | u16 address; |
| 3517 | unsigned int pipe; |
| 3518 | LOCK_TAKE(hdw->big_lock); do { |
Al Viro | 5fa1247 | 2008-03-29 03:07:38 +0000 | [diff] [blame] | 3519 | if ((hdw->fw_buffer == NULL) == !enable_flag) break; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3520 | |
| 3521 | if (!enable_flag) { |
| 3522 | pvr2_trace(PVR2_TRACE_FIRMWARE, |
| 3523 | "Cleaning up after CPU firmware fetch"); |
| 3524 | kfree(hdw->fw_buffer); |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 3525 | hdw->fw_buffer = NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3526 | hdw->fw_size = 0; |
Mike Isely | 4db666c | 2007-09-08 22:16:27 -0300 | [diff] [blame] | 3527 | if (hdw->fw_cpu_flag) { |
| 3528 | /* Now release the CPU. It will disconnect |
| 3529 | and reconnect later. */ |
| 3530 | pvr2_hdw_cpureset_assert(hdw,0); |
| 3531 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3532 | break; |
| 3533 | } |
| 3534 | |
Mike Isely | 4db666c | 2007-09-08 22:16:27 -0300 | [diff] [blame] | 3535 | hdw->fw_cpu_flag = (prom_flag == 0); |
| 3536 | if (hdw->fw_cpu_flag) { |
| 3537 | pvr2_trace(PVR2_TRACE_FIRMWARE, |
| 3538 | "Preparing to suck out CPU firmware"); |
| 3539 | hdw->fw_size = 0x2000; |
| 3540 | hdw->fw_buffer = kzalloc(hdw->fw_size,GFP_KERNEL); |
| 3541 | if (!hdw->fw_buffer) { |
| 3542 | hdw->fw_size = 0; |
| 3543 | break; |
| 3544 | } |
| 3545 | |
| 3546 | /* We have to hold the CPU during firmware upload. */ |
| 3547 | pvr2_hdw_cpureset_assert(hdw,1); |
| 3548 | |
| 3549 | /* download the firmware from address 0000-1fff in 2048 |
| 3550 | (=0x800) bytes chunk. */ |
| 3551 | |
| 3552 | pvr2_trace(PVR2_TRACE_FIRMWARE, |
| 3553 | "Grabbing CPU firmware"); |
| 3554 | pipe = usb_rcvctrlpipe(hdw->usb_dev, 0); |
| 3555 | for(address = 0; address < hdw->fw_size; |
| 3556 | address += 0x800) { |
| 3557 | ret = usb_control_msg(hdw->usb_dev,pipe, |
| 3558 | 0xa0,0xc0, |
| 3559 | address,0, |
| 3560 | hdw->fw_buffer+address, |
| 3561 | 0x800,HZ); |
| 3562 | if (ret < 0) break; |
| 3563 | } |
| 3564 | |
| 3565 | pvr2_trace(PVR2_TRACE_FIRMWARE, |
| 3566 | "Done grabbing CPU firmware"); |
| 3567 | } else { |
| 3568 | pvr2_trace(PVR2_TRACE_FIRMWARE, |
| 3569 | "Sucking down EEPROM contents"); |
| 3570 | hdw->fw_buffer = pvr2_full_eeprom_fetch(hdw); |
| 3571 | if (!hdw->fw_buffer) { |
| 3572 | pvr2_trace(PVR2_TRACE_FIRMWARE, |
| 3573 | "EEPROM content suck failed."); |
| 3574 | break; |
| 3575 | } |
| 3576 | hdw->fw_size = EEPROM_SIZE; |
| 3577 | pvr2_trace(PVR2_TRACE_FIRMWARE, |
| 3578 | "Done sucking down EEPROM contents"); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3579 | } |
| 3580 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3581 | } while (0); LOCK_GIVE(hdw->big_lock); |
| 3582 | } |
| 3583 | |
| 3584 | |
| 3585 | /* Return true if we're in a mode for retrieval CPU firmware */ |
| 3586 | int pvr2_hdw_cpufw_get_enabled(struct pvr2_hdw *hdw) |
| 3587 | { |
Al Viro | 5fa1247 | 2008-03-29 03:07:38 +0000 | [diff] [blame] | 3588 | return hdw->fw_buffer != NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3589 | } |
| 3590 | |
| 3591 | |
| 3592 | int pvr2_hdw_cpufw_get(struct pvr2_hdw *hdw,unsigned int offs, |
| 3593 | char *buf,unsigned int cnt) |
| 3594 | { |
| 3595 | int ret = -EINVAL; |
| 3596 | LOCK_TAKE(hdw->big_lock); do { |
| 3597 | if (!buf) break; |
| 3598 | if (!cnt) break; |
| 3599 | |
| 3600 | if (!hdw->fw_buffer) { |
| 3601 | ret = -EIO; |
| 3602 | break; |
| 3603 | } |
| 3604 | |
| 3605 | if (offs >= hdw->fw_size) { |
| 3606 | pvr2_trace(PVR2_TRACE_FIRMWARE, |
| 3607 | "Read firmware data offs=%d EOF", |
| 3608 | offs); |
| 3609 | ret = 0; |
| 3610 | break; |
| 3611 | } |
| 3612 | |
| 3613 | if (offs + cnt > hdw->fw_size) cnt = hdw->fw_size - offs; |
| 3614 | |
| 3615 | memcpy(buf,hdw->fw_buffer+offs,cnt); |
| 3616 | |
| 3617 | pvr2_trace(PVR2_TRACE_FIRMWARE, |
| 3618 | "Read firmware data offs=%d cnt=%d", |
| 3619 | offs,cnt); |
| 3620 | ret = cnt; |
| 3621 | } while (0); LOCK_GIVE(hdw->big_lock); |
| 3622 | |
| 3623 | return ret; |
| 3624 | } |
| 3625 | |
| 3626 | |
Mike Isely | fd5a75f | 2006-12-27 23:11:22 -0300 | [diff] [blame] | 3627 | int pvr2_hdw_v4l_get_minor_number(struct pvr2_hdw *hdw, |
Mike Isely | 8079384 | 2006-12-27 23:12:28 -0300 | [diff] [blame] | 3628 | enum pvr2_v4l_type index) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3629 | { |
Mike Isely | fd5a75f | 2006-12-27 23:11:22 -0300 | [diff] [blame] | 3630 | switch (index) { |
Mike Isely | 8079384 | 2006-12-27 23:12:28 -0300 | [diff] [blame] | 3631 | case pvr2_v4l_type_video: return hdw->v4l_minor_number_video; |
| 3632 | case pvr2_v4l_type_vbi: return hdw->v4l_minor_number_vbi; |
| 3633 | case pvr2_v4l_type_radio: return hdw->v4l_minor_number_radio; |
Mike Isely | fd5a75f | 2006-12-27 23:11:22 -0300 | [diff] [blame] | 3634 | default: return -1; |
| 3635 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3636 | } |
| 3637 | |
| 3638 | |
Pantelis Koukousoulas | 2fdf3d9 | 2006-12-27 23:07:58 -0300 | [diff] [blame] | 3639 | /* Store a v4l minor device number */ |
Mike Isely | fd5a75f | 2006-12-27 23:11:22 -0300 | [diff] [blame] | 3640 | void pvr2_hdw_v4l_store_minor_number(struct pvr2_hdw *hdw, |
Mike Isely | 8079384 | 2006-12-27 23:12:28 -0300 | [diff] [blame] | 3641 | enum pvr2_v4l_type index,int v) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3642 | { |
Mike Isely | fd5a75f | 2006-12-27 23:11:22 -0300 | [diff] [blame] | 3643 | switch (index) { |
Mike Isely | 8079384 | 2006-12-27 23:12:28 -0300 | [diff] [blame] | 3644 | case pvr2_v4l_type_video: hdw->v4l_minor_number_video = v; |
| 3645 | case pvr2_v4l_type_vbi: hdw->v4l_minor_number_vbi = v; |
| 3646 | case pvr2_v4l_type_radio: hdw->v4l_minor_number_radio = v; |
Mike Isely | fd5a75f | 2006-12-27 23:11:22 -0300 | [diff] [blame] | 3647 | default: break; |
| 3648 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3649 | } |
| 3650 | |
| 3651 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 3652 | static void pvr2_ctl_write_complete(struct urb *urb) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3653 | { |
| 3654 | struct pvr2_hdw *hdw = urb->context; |
| 3655 | hdw->ctl_write_pend_flag = 0; |
| 3656 | if (hdw->ctl_read_pend_flag) return; |
| 3657 | complete(&hdw->ctl_done); |
| 3658 | } |
| 3659 | |
| 3660 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 3661 | static void pvr2_ctl_read_complete(struct urb *urb) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3662 | { |
| 3663 | struct pvr2_hdw *hdw = urb->context; |
| 3664 | hdw->ctl_read_pend_flag = 0; |
| 3665 | if (hdw->ctl_write_pend_flag) return; |
| 3666 | complete(&hdw->ctl_done); |
| 3667 | } |
| 3668 | |
| 3669 | |
| 3670 | static void pvr2_ctl_timeout(unsigned long data) |
| 3671 | { |
| 3672 | struct pvr2_hdw *hdw = (struct pvr2_hdw *)data; |
| 3673 | if (hdw->ctl_write_pend_flag || hdw->ctl_read_pend_flag) { |
| 3674 | hdw->ctl_timeout_flag = !0; |
Mariusz Kozlowski | 5e55d2c | 2006-11-08 15:34:31 +0100 | [diff] [blame] | 3675 | if (hdw->ctl_write_pend_flag) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3676 | usb_unlink_urb(hdw->ctl_write_urb); |
Mariusz Kozlowski | 5e55d2c | 2006-11-08 15:34:31 +0100 | [diff] [blame] | 3677 | if (hdw->ctl_read_pend_flag) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3678 | usb_unlink_urb(hdw->ctl_read_urb); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3679 | } |
| 3680 | } |
| 3681 | |
| 3682 | |
Mike Isely | e61b6fc | 2006-07-18 22:42:18 -0300 | [diff] [blame] | 3683 | /* Issue a command and get a response from the device. This extended |
| 3684 | version includes a probe flag (which if set means that device errors |
| 3685 | should not be logged or treated as fatal) and a timeout in jiffies. |
| 3686 | This can be used to non-lethally probe the health of endpoint 1. */ |
Adrian Bunk | 07e337e | 2006-06-30 11:30:20 -0300 | [diff] [blame] | 3687 | static int pvr2_send_request_ex(struct pvr2_hdw *hdw, |
| 3688 | unsigned int timeout,int probe_fl, |
| 3689 | void *write_data,unsigned int write_len, |
| 3690 | void *read_data,unsigned int read_len) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3691 | { |
| 3692 | unsigned int idx; |
| 3693 | int status = 0; |
| 3694 | struct timer_list timer; |
| 3695 | if (!hdw->ctl_lock_held) { |
| 3696 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 3697 | "Attempted to execute control transfer" |
| 3698 | " without lock!!"); |
| 3699 | return -EDEADLK; |
| 3700 | } |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 3701 | if (!hdw->flag_ok && !probe_fl) { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3702 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 3703 | "Attempted to execute control transfer" |
| 3704 | " when device not ok"); |
| 3705 | return -EIO; |
| 3706 | } |
| 3707 | if (!(hdw->ctl_read_urb && hdw->ctl_write_urb)) { |
| 3708 | if (!probe_fl) { |
| 3709 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 3710 | "Attempted to execute control transfer" |
| 3711 | " when USB is disconnected"); |
| 3712 | } |
| 3713 | return -ENOTTY; |
| 3714 | } |
| 3715 | |
| 3716 | /* Ensure that we have sane parameters */ |
| 3717 | if (!write_data) write_len = 0; |
| 3718 | if (!read_data) read_len = 0; |
| 3719 | if (write_len > PVR2_CTL_BUFFSIZE) { |
| 3720 | pvr2_trace( |
| 3721 | PVR2_TRACE_ERROR_LEGS, |
| 3722 | "Attempted to execute %d byte" |
| 3723 | " control-write transfer (limit=%d)", |
| 3724 | write_len,PVR2_CTL_BUFFSIZE); |
| 3725 | return -EINVAL; |
| 3726 | } |
| 3727 | if (read_len > PVR2_CTL_BUFFSIZE) { |
| 3728 | pvr2_trace( |
| 3729 | PVR2_TRACE_ERROR_LEGS, |
| 3730 | "Attempted to execute %d byte" |
| 3731 | " control-read transfer (limit=%d)", |
| 3732 | write_len,PVR2_CTL_BUFFSIZE); |
| 3733 | return -EINVAL; |
| 3734 | } |
| 3735 | if ((!write_len) && (!read_len)) { |
| 3736 | pvr2_trace( |
| 3737 | PVR2_TRACE_ERROR_LEGS, |
| 3738 | "Attempted to execute null control transfer?"); |
| 3739 | return -EINVAL; |
| 3740 | } |
| 3741 | |
| 3742 | |
| 3743 | hdw->cmd_debug_state = 1; |
| 3744 | if (write_len) { |
| 3745 | hdw->cmd_debug_code = ((unsigned char *)write_data)[0]; |
| 3746 | } else { |
| 3747 | hdw->cmd_debug_code = 0; |
| 3748 | } |
| 3749 | hdw->cmd_debug_write_len = write_len; |
| 3750 | hdw->cmd_debug_read_len = read_len; |
| 3751 | |
| 3752 | /* Initialize common stuff */ |
| 3753 | init_completion(&hdw->ctl_done); |
| 3754 | hdw->ctl_timeout_flag = 0; |
| 3755 | hdw->ctl_write_pend_flag = 0; |
| 3756 | hdw->ctl_read_pend_flag = 0; |
| 3757 | init_timer(&timer); |
| 3758 | timer.expires = jiffies + timeout; |
| 3759 | timer.data = (unsigned long)hdw; |
| 3760 | timer.function = pvr2_ctl_timeout; |
| 3761 | |
| 3762 | if (write_len) { |
| 3763 | hdw->cmd_debug_state = 2; |
| 3764 | /* Transfer write data to internal buffer */ |
| 3765 | for (idx = 0; idx < write_len; idx++) { |
| 3766 | hdw->ctl_write_buffer[idx] = |
| 3767 | ((unsigned char *)write_data)[idx]; |
| 3768 | } |
| 3769 | /* Initiate a write request */ |
| 3770 | usb_fill_bulk_urb(hdw->ctl_write_urb, |
| 3771 | hdw->usb_dev, |
| 3772 | usb_sndbulkpipe(hdw->usb_dev, |
| 3773 | PVR2_CTL_WRITE_ENDPOINT), |
| 3774 | hdw->ctl_write_buffer, |
| 3775 | write_len, |
| 3776 | pvr2_ctl_write_complete, |
| 3777 | hdw); |
| 3778 | hdw->ctl_write_urb->actual_length = 0; |
| 3779 | hdw->ctl_write_pend_flag = !0; |
| 3780 | status = usb_submit_urb(hdw->ctl_write_urb,GFP_KERNEL); |
| 3781 | if (status < 0) { |
| 3782 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 3783 | "Failed to submit write-control" |
| 3784 | " URB status=%d",status); |
| 3785 | hdw->ctl_write_pend_flag = 0; |
| 3786 | goto done; |
| 3787 | } |
| 3788 | } |
| 3789 | |
| 3790 | if (read_len) { |
| 3791 | hdw->cmd_debug_state = 3; |
| 3792 | memset(hdw->ctl_read_buffer,0x43,read_len); |
| 3793 | /* Initiate a read request */ |
| 3794 | usb_fill_bulk_urb(hdw->ctl_read_urb, |
| 3795 | hdw->usb_dev, |
| 3796 | usb_rcvbulkpipe(hdw->usb_dev, |
| 3797 | PVR2_CTL_READ_ENDPOINT), |
| 3798 | hdw->ctl_read_buffer, |
| 3799 | read_len, |
| 3800 | pvr2_ctl_read_complete, |
| 3801 | hdw); |
| 3802 | hdw->ctl_read_urb->actual_length = 0; |
| 3803 | hdw->ctl_read_pend_flag = !0; |
| 3804 | status = usb_submit_urb(hdw->ctl_read_urb,GFP_KERNEL); |
| 3805 | if (status < 0) { |
| 3806 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 3807 | "Failed to submit read-control" |
| 3808 | " URB status=%d",status); |
| 3809 | hdw->ctl_read_pend_flag = 0; |
| 3810 | goto done; |
| 3811 | } |
| 3812 | } |
| 3813 | |
| 3814 | /* Start timer */ |
| 3815 | add_timer(&timer); |
| 3816 | |
| 3817 | /* Now wait for all I/O to complete */ |
| 3818 | hdw->cmd_debug_state = 4; |
| 3819 | while (hdw->ctl_write_pend_flag || hdw->ctl_read_pend_flag) { |
| 3820 | wait_for_completion(&hdw->ctl_done); |
| 3821 | } |
| 3822 | hdw->cmd_debug_state = 5; |
| 3823 | |
| 3824 | /* Stop timer */ |
| 3825 | del_timer_sync(&timer); |
| 3826 | |
| 3827 | hdw->cmd_debug_state = 6; |
| 3828 | status = 0; |
| 3829 | |
| 3830 | if (hdw->ctl_timeout_flag) { |
| 3831 | status = -ETIMEDOUT; |
| 3832 | if (!probe_fl) { |
| 3833 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 3834 | "Timed out control-write"); |
| 3835 | } |
| 3836 | goto done; |
| 3837 | } |
| 3838 | |
| 3839 | if (write_len) { |
| 3840 | /* Validate results of write request */ |
| 3841 | if ((hdw->ctl_write_urb->status != 0) && |
| 3842 | (hdw->ctl_write_urb->status != -ENOENT) && |
| 3843 | (hdw->ctl_write_urb->status != -ESHUTDOWN) && |
| 3844 | (hdw->ctl_write_urb->status != -ECONNRESET)) { |
| 3845 | /* USB subsystem is reporting some kind of failure |
| 3846 | on the write */ |
| 3847 | status = hdw->ctl_write_urb->status; |
| 3848 | if (!probe_fl) { |
| 3849 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 3850 | "control-write URB failure," |
| 3851 | " status=%d", |
| 3852 | status); |
| 3853 | } |
| 3854 | goto done; |
| 3855 | } |
| 3856 | if (hdw->ctl_write_urb->actual_length < write_len) { |
| 3857 | /* Failed to write enough data */ |
| 3858 | status = -EIO; |
| 3859 | if (!probe_fl) { |
| 3860 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 3861 | "control-write URB short," |
| 3862 | " expected=%d got=%d", |
| 3863 | write_len, |
| 3864 | hdw->ctl_write_urb->actual_length); |
| 3865 | } |
| 3866 | goto done; |
| 3867 | } |
| 3868 | } |
| 3869 | if (read_len) { |
| 3870 | /* Validate results of read request */ |
| 3871 | if ((hdw->ctl_read_urb->status != 0) && |
| 3872 | (hdw->ctl_read_urb->status != -ENOENT) && |
| 3873 | (hdw->ctl_read_urb->status != -ESHUTDOWN) && |
| 3874 | (hdw->ctl_read_urb->status != -ECONNRESET)) { |
| 3875 | /* USB subsystem is reporting some kind of failure |
| 3876 | on the read */ |
| 3877 | status = hdw->ctl_read_urb->status; |
| 3878 | if (!probe_fl) { |
| 3879 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 3880 | "control-read URB failure," |
| 3881 | " status=%d", |
| 3882 | status); |
| 3883 | } |
| 3884 | goto done; |
| 3885 | } |
| 3886 | if (hdw->ctl_read_urb->actual_length < read_len) { |
| 3887 | /* Failed to read enough data */ |
| 3888 | status = -EIO; |
| 3889 | if (!probe_fl) { |
| 3890 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 3891 | "control-read URB short," |
| 3892 | " expected=%d got=%d", |
| 3893 | read_len, |
| 3894 | hdw->ctl_read_urb->actual_length); |
| 3895 | } |
| 3896 | goto done; |
| 3897 | } |
| 3898 | /* Transfer retrieved data out from internal buffer */ |
| 3899 | for (idx = 0; idx < read_len; idx++) { |
| 3900 | ((unsigned char *)read_data)[idx] = |
| 3901 | hdw->ctl_read_buffer[idx]; |
| 3902 | } |
| 3903 | } |
| 3904 | |
| 3905 | done: |
| 3906 | |
| 3907 | hdw->cmd_debug_state = 0; |
| 3908 | if ((status < 0) && (!probe_fl)) { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 3909 | pvr2_hdw_render_useless(hdw); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3910 | } |
| 3911 | return status; |
| 3912 | } |
| 3913 | |
| 3914 | |
| 3915 | int pvr2_send_request(struct pvr2_hdw *hdw, |
| 3916 | void *write_data,unsigned int write_len, |
| 3917 | void *read_data,unsigned int read_len) |
| 3918 | { |
| 3919 | return pvr2_send_request_ex(hdw,HZ*4,0, |
| 3920 | write_data,write_len, |
| 3921 | read_data,read_len); |
| 3922 | } |
| 3923 | |
Mike Isely | 1c9d10d | 2008-03-28 05:38:54 -0300 | [diff] [blame] | 3924 | |
| 3925 | static int pvr2_issue_simple_cmd(struct pvr2_hdw *hdw,u32 cmdcode) |
| 3926 | { |
| 3927 | int ret; |
| 3928 | unsigned int cnt = 1; |
| 3929 | unsigned int args = 0; |
| 3930 | LOCK_TAKE(hdw->ctl_lock); |
| 3931 | hdw->cmd_buffer[0] = cmdcode & 0xffu; |
| 3932 | args = (cmdcode >> 8) & 0xffu; |
| 3933 | args = (args > 2) ? 2 : args; |
| 3934 | if (args) { |
| 3935 | cnt += args; |
| 3936 | hdw->cmd_buffer[1] = (cmdcode >> 16) & 0xffu; |
| 3937 | if (args > 1) { |
| 3938 | hdw->cmd_buffer[2] = (cmdcode >> 24) & 0xffu; |
| 3939 | } |
| 3940 | } |
| 3941 | if (pvrusb2_debug & PVR2_TRACE_INIT) { |
| 3942 | unsigned int idx; |
| 3943 | unsigned int ccnt,bcnt; |
| 3944 | char tbuf[50]; |
| 3945 | cmdcode &= 0xffu; |
| 3946 | bcnt = 0; |
| 3947 | ccnt = scnprintf(tbuf+bcnt, |
| 3948 | sizeof(tbuf)-bcnt, |
| 3949 | "Sending FX2 command 0x%x",cmdcode); |
| 3950 | bcnt += ccnt; |
| 3951 | for (idx = 0; idx < ARRAY_SIZE(pvr2_fx2cmd_desc); idx++) { |
| 3952 | if (pvr2_fx2cmd_desc[idx].id == cmdcode) { |
| 3953 | ccnt = scnprintf(tbuf+bcnt, |
| 3954 | sizeof(tbuf)-bcnt, |
| 3955 | " \"%s\"", |
| 3956 | pvr2_fx2cmd_desc[idx].desc); |
| 3957 | bcnt += ccnt; |
| 3958 | break; |
| 3959 | } |
| 3960 | } |
| 3961 | if (args) { |
| 3962 | ccnt = scnprintf(tbuf+bcnt, |
| 3963 | sizeof(tbuf)-bcnt, |
| 3964 | " (%u",hdw->cmd_buffer[1]); |
| 3965 | bcnt += ccnt; |
| 3966 | if (args > 1) { |
| 3967 | ccnt = scnprintf(tbuf+bcnt, |
| 3968 | sizeof(tbuf)-bcnt, |
| 3969 | ",%u",hdw->cmd_buffer[2]); |
| 3970 | bcnt += ccnt; |
| 3971 | } |
| 3972 | ccnt = scnprintf(tbuf+bcnt, |
| 3973 | sizeof(tbuf)-bcnt, |
| 3974 | ")"); |
| 3975 | bcnt += ccnt; |
| 3976 | } |
| 3977 | pvr2_trace(PVR2_TRACE_INIT,"%.*s",bcnt,tbuf); |
| 3978 | } |
| 3979 | ret = pvr2_send_request(hdw,hdw->cmd_buffer,cnt,NULL,0); |
| 3980 | LOCK_GIVE(hdw->ctl_lock); |
| 3981 | return ret; |
| 3982 | } |
| 3983 | |
| 3984 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3985 | int pvr2_write_register(struct pvr2_hdw *hdw, u16 reg, u32 data) |
| 3986 | { |
| 3987 | int ret; |
| 3988 | |
| 3989 | LOCK_TAKE(hdw->ctl_lock); |
| 3990 | |
Michael Krufky | 8d36436 | 2007-01-22 02:17:55 -0300 | [diff] [blame] | 3991 | hdw->cmd_buffer[0] = FX2CMD_REG_WRITE; /* write register prefix */ |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3992 | PVR2_DECOMPOSE_LE(hdw->cmd_buffer,1,data); |
| 3993 | hdw->cmd_buffer[5] = 0; |
| 3994 | hdw->cmd_buffer[6] = (reg >> 8) & 0xff; |
| 3995 | hdw->cmd_buffer[7] = reg & 0xff; |
| 3996 | |
| 3997 | |
| 3998 | ret = pvr2_send_request(hdw, hdw->cmd_buffer, 8, hdw->cmd_buffer, 0); |
| 3999 | |
| 4000 | LOCK_GIVE(hdw->ctl_lock); |
| 4001 | |
| 4002 | return ret; |
| 4003 | } |
| 4004 | |
| 4005 | |
Adrian Bunk | 07e337e | 2006-06-30 11:30:20 -0300 | [diff] [blame] | 4006 | static int pvr2_read_register(struct pvr2_hdw *hdw, u16 reg, u32 *data) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 4007 | { |
| 4008 | int ret = 0; |
| 4009 | |
| 4010 | LOCK_TAKE(hdw->ctl_lock); |
| 4011 | |
Michael Krufky | 8d36436 | 2007-01-22 02:17:55 -0300 | [diff] [blame] | 4012 | hdw->cmd_buffer[0] = FX2CMD_REG_READ; /* read register prefix */ |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 4013 | hdw->cmd_buffer[1] = 0; |
| 4014 | hdw->cmd_buffer[2] = 0; |
| 4015 | hdw->cmd_buffer[3] = 0; |
| 4016 | hdw->cmd_buffer[4] = 0; |
| 4017 | hdw->cmd_buffer[5] = 0; |
| 4018 | hdw->cmd_buffer[6] = (reg >> 8) & 0xff; |
| 4019 | hdw->cmd_buffer[7] = reg & 0xff; |
| 4020 | |
| 4021 | ret |= pvr2_send_request(hdw, hdw->cmd_buffer, 8, hdw->cmd_buffer, 4); |
| 4022 | *data = PVR2_COMPOSE_LE(hdw->cmd_buffer,0); |
| 4023 | |
| 4024 | LOCK_GIVE(hdw->ctl_lock); |
| 4025 | |
| 4026 | return ret; |
| 4027 | } |
| 4028 | |
| 4029 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4030 | void pvr2_hdw_render_useless(struct pvr2_hdw *hdw) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 4031 | { |
| 4032 | if (!hdw->flag_ok) return; |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4033 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 4034 | "Device being rendered inoperable"); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 4035 | if (hdw->vid_stream) { |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 4036 | pvr2_stream_setup(hdw->vid_stream,NULL,0,0); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 4037 | } |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4038 | hdw->flag_ok = 0; |
| 4039 | trace_stbit("flag_ok",hdw->flag_ok); |
| 4040 | pvr2_hdw_state_sched(hdw); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 4041 | } |
| 4042 | |
| 4043 | |
| 4044 | void pvr2_hdw_device_reset(struct pvr2_hdw *hdw) |
| 4045 | { |
| 4046 | int ret; |
| 4047 | pvr2_trace(PVR2_TRACE_INIT,"Performing a device reset..."); |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 4048 | ret = usb_lock_device_for_reset(hdw->usb_dev,NULL); |
Alan Stern | 011b15d | 2008-11-04 11:29:27 -0500 | [diff] [blame] | 4049 | if (ret == 0) { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 4050 | ret = usb_reset_device(hdw->usb_dev); |
| 4051 | usb_unlock_device(hdw->usb_dev); |
| 4052 | } else { |
| 4053 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 4054 | "Failed to lock USB device ret=%d",ret); |
| 4055 | } |
| 4056 | if (init_pause_msec) { |
| 4057 | pvr2_trace(PVR2_TRACE_INFO, |
| 4058 | "Waiting %u msec for hardware to settle", |
| 4059 | init_pause_msec); |
| 4060 | msleep(init_pause_msec); |
| 4061 | } |
| 4062 | |
| 4063 | } |
| 4064 | |
| 4065 | |
| 4066 | void pvr2_hdw_cpureset_assert(struct pvr2_hdw *hdw,int val) |
| 4067 | { |
| 4068 | char da[1]; |
| 4069 | unsigned int pipe; |
| 4070 | int ret; |
| 4071 | |
| 4072 | if (!hdw->usb_dev) return; |
| 4073 | |
| 4074 | pvr2_trace(PVR2_TRACE_INIT,"cpureset_assert(%d)",val); |
| 4075 | |
| 4076 | da[0] = val ? 0x01 : 0x00; |
| 4077 | |
| 4078 | /* Write the CPUCS register on the 8051. The lsb of the register |
| 4079 | is the reset bit; a 1 asserts reset while a 0 clears it. */ |
| 4080 | pipe = usb_sndctrlpipe(hdw->usb_dev, 0); |
| 4081 | ret = usb_control_msg(hdw->usb_dev,pipe,0xa0,0x40,0xe600,0,da,1,HZ); |
| 4082 | if (ret < 0) { |
| 4083 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 4084 | "cpureset_assert(%d) error=%d",val,ret); |
| 4085 | pvr2_hdw_render_useless(hdw); |
| 4086 | } |
| 4087 | } |
| 4088 | |
| 4089 | |
| 4090 | int pvr2_hdw_cmd_deep_reset(struct pvr2_hdw *hdw) |
| 4091 | { |
Mike Isely | 1c9d10d | 2008-03-28 05:38:54 -0300 | [diff] [blame] | 4092 | return pvr2_issue_simple_cmd(hdw,FX2CMD_DEEP_RESET); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 4093 | } |
| 4094 | |
| 4095 | |
Michael Krufky | e1edb19 | 2008-04-22 14:45:39 -0300 | [diff] [blame] | 4096 | int pvr2_hdw_cmd_powerup(struct pvr2_hdw *hdw) |
| 4097 | { |
Mike Isely | 1c9d10d | 2008-03-28 05:38:54 -0300 | [diff] [blame] | 4098 | return pvr2_issue_simple_cmd(hdw,FX2CMD_POWER_ON); |
Michael Krufky | e1edb19 | 2008-04-22 14:45:39 -0300 | [diff] [blame] | 4099 | } |
| 4100 | |
Mike Isely | 1c9d10d | 2008-03-28 05:38:54 -0300 | [diff] [blame] | 4101 | |
Michael Krufky | e1edb19 | 2008-04-22 14:45:39 -0300 | [diff] [blame] | 4102 | int pvr2_hdw_cmd_powerdown(struct pvr2_hdw *hdw) |
| 4103 | { |
Mike Isely | 1c9d10d | 2008-03-28 05:38:54 -0300 | [diff] [blame] | 4104 | return pvr2_issue_simple_cmd(hdw,FX2CMD_POWER_OFF); |
Michael Krufky | e1edb19 | 2008-04-22 14:45:39 -0300 | [diff] [blame] | 4105 | } |
| 4106 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 4107 | |
| 4108 | int pvr2_hdw_cmd_decoder_reset(struct pvr2_hdw *hdw) |
| 4109 | { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 4110 | pvr2_trace(PVR2_TRACE_INIT, |
| 4111 | "Requesting decoder reset"); |
Mike Isely | af78e16 | 2009-03-07 00:21:30 -0300 | [diff] [blame] | 4112 | if (hdw->decoder_ctrl) { |
| 4113 | if (!hdw->decoder_ctrl->force_reset) { |
| 4114 | pvr2_trace(PVR2_TRACE_INIT, |
| 4115 | "Unable to reset decoder: not implemented"); |
| 4116 | return -ENOTTY; |
| 4117 | } |
| 4118 | hdw->decoder_ctrl->force_reset(hdw->decoder_ctrl->ctxt); |
| 4119 | return 0; |
| 4120 | } else { |
| 4121 | } |
| 4122 | if (hdw->decoder_client_id) { |
| 4123 | v4l2_device_call_all(&hdw->v4l2_dev, hdw->decoder_client_id, |
| 4124 | core, reset, 0); |
| 4125 | return 0; |
| 4126 | } |
| 4127 | pvr2_trace(PVR2_TRACE_INIT, |
| 4128 | "Unable to reset decoder: nothing attached"); |
| 4129 | return -ENOTTY; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 4130 | } |
| 4131 | |
| 4132 | |
Mike Isely | 62433e3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4133 | static int pvr2_hdw_cmd_hcw_demod_reset(struct pvr2_hdw *hdw, int onoff) |
Mike Isely | 84147f3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4134 | { |
Mike Isely | 1c9d10d | 2008-03-28 05:38:54 -0300 | [diff] [blame] | 4135 | hdw->flag_ok = !0; |
| 4136 | return pvr2_issue_simple_cmd(hdw, |
| 4137 | FX2CMD_HCW_DEMOD_RESETIN | |
| 4138 | (1 << 8) | |
| 4139 | ((onoff ? 1 : 0) << 16)); |
Mike Isely | 84147f3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4140 | } |
| 4141 | |
Mike Isely | 84147f3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4142 | |
Mike Isely | 62433e3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4143 | static int pvr2_hdw_cmd_onair_fe_power_ctrl(struct pvr2_hdw *hdw, int onoff) |
Mike Isely | 84147f3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4144 | { |
Mike Isely | 1c9d10d | 2008-03-28 05:38:54 -0300 | [diff] [blame] | 4145 | hdw->flag_ok = !0; |
| 4146 | return pvr2_issue_simple_cmd(hdw,(onoff ? |
| 4147 | FX2CMD_ONAIR_DTV_POWER_ON : |
| 4148 | FX2CMD_ONAIR_DTV_POWER_OFF)); |
Mike Isely | 84147f3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4149 | } |
| 4150 | |
Mike Isely | 62433e3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4151 | |
| 4152 | static int pvr2_hdw_cmd_onair_digital_path_ctrl(struct pvr2_hdw *hdw, |
| 4153 | int onoff) |
Mike Isely | 84147f3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4154 | { |
Mike Isely | 1c9d10d | 2008-03-28 05:38:54 -0300 | [diff] [blame] | 4155 | return pvr2_issue_simple_cmd(hdw,(onoff ? |
| 4156 | FX2CMD_ONAIR_DTV_STREAMING_ON : |
| 4157 | FX2CMD_ONAIR_DTV_STREAMING_OFF)); |
Mike Isely | 84147f3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4158 | } |
| 4159 | |
Mike Isely | 62433e3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4160 | |
| 4161 | static void pvr2_hdw_cmd_modeswitch(struct pvr2_hdw *hdw,int digitalFl) |
| 4162 | { |
| 4163 | int cmode; |
| 4164 | /* Compare digital/analog desired setting with current setting. If |
| 4165 | they don't match, fix it... */ |
| 4166 | cmode = (digitalFl ? PVR2_PATHWAY_DIGITAL : PVR2_PATHWAY_ANALOG); |
| 4167 | if (cmode == hdw->pathway_state) { |
| 4168 | /* They match; nothing to do */ |
| 4169 | return; |
| 4170 | } |
| 4171 | |
| 4172 | switch (hdw->hdw_desc->digital_control_scheme) { |
| 4173 | case PVR2_DIGITAL_SCHEME_HAUPPAUGE: |
| 4174 | pvr2_hdw_cmd_hcw_demod_reset(hdw,digitalFl); |
| 4175 | if (cmode == PVR2_PATHWAY_ANALOG) { |
| 4176 | /* If moving to analog mode, also force the decoder |
| 4177 | to reset. If no decoder is attached, then it's |
| 4178 | ok to ignore this because if/when the decoder |
| 4179 | attaches, it will reset itself at that time. */ |
| 4180 | pvr2_hdw_cmd_decoder_reset(hdw); |
| 4181 | } |
| 4182 | break; |
| 4183 | case PVR2_DIGITAL_SCHEME_ONAIR: |
| 4184 | /* Supposedly we should always have the power on whether in |
| 4185 | digital or analog mode. But for now do what appears to |
| 4186 | work... */ |
Mike Isely | bb0c2fe | 2008-03-28 05:41:19 -0300 | [diff] [blame] | 4187 | pvr2_hdw_cmd_onair_fe_power_ctrl(hdw,digitalFl); |
Mike Isely | 62433e3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4188 | break; |
| 4189 | default: break; |
| 4190 | } |
| 4191 | |
Mike Isely | 1b9c18c | 2008-04-22 14:45:41 -0300 | [diff] [blame] | 4192 | pvr2_hdw_untrip_unlocked(hdw); |
Mike Isely | 62433e3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4193 | hdw->pathway_state = cmode; |
| 4194 | } |
| 4195 | |
| 4196 | |
Adrian Bunk | e9b59f6 | 2008-05-10 04:35:24 -0300 | [diff] [blame] | 4197 | static void pvr2_led_ctrl_hauppauge(struct pvr2_hdw *hdw, int onoff) |
Mike Isely | c55a97d | 2008-04-22 14:45:41 -0300 | [diff] [blame] | 4198 | { |
| 4199 | /* change some GPIO data |
| 4200 | * |
| 4201 | * note: bit d7 of dir appears to control the LED, |
| 4202 | * so we shut it off here. |
| 4203 | * |
Mike Isely | c55a97d | 2008-04-22 14:45:41 -0300 | [diff] [blame] | 4204 | */ |
Mike Isely | 40381cb | 2008-04-22 14:45:42 -0300 | [diff] [blame] | 4205 | if (onoff) { |
Mike Isely | c55a97d | 2008-04-22 14:45:41 -0300 | [diff] [blame] | 4206 | pvr2_hdw_gpio_chg_dir(hdw, 0xffffffff, 0x00000481); |
Mike Isely | 40381cb | 2008-04-22 14:45:42 -0300 | [diff] [blame] | 4207 | } else { |
Mike Isely | c55a97d | 2008-04-22 14:45:41 -0300 | [diff] [blame] | 4208 | pvr2_hdw_gpio_chg_dir(hdw, 0xffffffff, 0x00000401); |
Mike Isely | 40381cb | 2008-04-22 14:45:42 -0300 | [diff] [blame] | 4209 | } |
Mike Isely | c55a97d | 2008-04-22 14:45:41 -0300 | [diff] [blame] | 4210 | pvr2_hdw_gpio_chg_out(hdw, 0xffffffff, 0x00000000); |
Mike Isely | 40381cb | 2008-04-22 14:45:42 -0300 | [diff] [blame] | 4211 | } |
Mike Isely | c55a97d | 2008-04-22 14:45:41 -0300 | [diff] [blame] | 4212 | |
Mike Isely | 40381cb | 2008-04-22 14:45:42 -0300 | [diff] [blame] | 4213 | |
| 4214 | typedef void (*led_method_func)(struct pvr2_hdw *,int); |
| 4215 | |
| 4216 | static led_method_func led_methods[] = { |
| 4217 | [PVR2_LED_SCHEME_HAUPPAUGE] = pvr2_led_ctrl_hauppauge, |
| 4218 | }; |
| 4219 | |
| 4220 | |
| 4221 | /* Toggle LED */ |
| 4222 | static void pvr2_led_ctrl(struct pvr2_hdw *hdw,int onoff) |
| 4223 | { |
| 4224 | unsigned int scheme_id; |
| 4225 | led_method_func fp; |
| 4226 | |
| 4227 | if ((!onoff) == (!hdw->led_on)) return; |
| 4228 | |
| 4229 | hdw->led_on = onoff != 0; |
| 4230 | |
| 4231 | scheme_id = hdw->hdw_desc->led_scheme; |
| 4232 | if (scheme_id < ARRAY_SIZE(led_methods)) { |
| 4233 | fp = led_methods[scheme_id]; |
| 4234 | } else { |
| 4235 | fp = NULL; |
| 4236 | } |
| 4237 | |
| 4238 | if (fp) (*fp)(hdw,onoff); |
Mike Isely | c55a97d | 2008-04-22 14:45:41 -0300 | [diff] [blame] | 4239 | } |
| 4240 | |
| 4241 | |
Mike Isely | e61b6fc | 2006-07-18 22:42:18 -0300 | [diff] [blame] | 4242 | /* Stop / start video stream transport */ |
Adrian Bunk | 07e337e | 2006-06-30 11:30:20 -0300 | [diff] [blame] | 4243 | static int pvr2_hdw_cmd_usbstream(struct pvr2_hdw *hdw,int runFl) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 4244 | { |
Mike Isely | bb0c2fe | 2008-03-28 05:41:19 -0300 | [diff] [blame] | 4245 | int ret; |
| 4246 | |
| 4247 | /* If we're in analog mode, then just issue the usual analog |
| 4248 | command. */ |
| 4249 | if (hdw->pathway_state == PVR2_PATHWAY_ANALOG) { |
| 4250 | return pvr2_issue_simple_cmd(hdw, |
| 4251 | (runFl ? |
| 4252 | FX2CMD_STREAMING_ON : |
| 4253 | FX2CMD_STREAMING_OFF)); |
| 4254 | /*Note: Not reached */ |
Mike Isely | 62433e3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4255 | } |
Mike Isely | bb0c2fe | 2008-03-28 05:41:19 -0300 | [diff] [blame] | 4256 | |
| 4257 | if (hdw->pathway_state != PVR2_PATHWAY_DIGITAL) { |
| 4258 | /* Whoops, we don't know what mode we're in... */ |
| 4259 | return -EINVAL; |
| 4260 | } |
| 4261 | |
| 4262 | /* To get here we have to be in digital mode. The mechanism here |
| 4263 | is unfortunately different for different vendors. So we switch |
| 4264 | on the device's digital scheme attribute in order to figure out |
| 4265 | what to do. */ |
| 4266 | switch (hdw->hdw_desc->digital_control_scheme) { |
| 4267 | case PVR2_DIGITAL_SCHEME_HAUPPAUGE: |
| 4268 | return pvr2_issue_simple_cmd(hdw, |
| 4269 | (runFl ? |
| 4270 | FX2CMD_HCW_DTV_STREAMING_ON : |
| 4271 | FX2CMD_HCW_DTV_STREAMING_OFF)); |
| 4272 | case PVR2_DIGITAL_SCHEME_ONAIR: |
| 4273 | ret = pvr2_issue_simple_cmd(hdw, |
| 4274 | (runFl ? |
| 4275 | FX2CMD_STREAMING_ON : |
| 4276 | FX2CMD_STREAMING_OFF)); |
| 4277 | if (ret) return ret; |
| 4278 | return pvr2_hdw_cmd_onair_digital_path_ctrl(hdw,runFl); |
| 4279 | default: |
| 4280 | return -EINVAL; |
| 4281 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 4282 | } |
| 4283 | |
| 4284 | |
Mike Isely | 62433e3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4285 | /* Evaluate whether or not state_pathway_ok can change */ |
| 4286 | static int state_eval_pathway_ok(struct pvr2_hdw *hdw) |
| 4287 | { |
| 4288 | if (hdw->state_pathway_ok) { |
| 4289 | /* Nothing to do if pathway is already ok */ |
| 4290 | return 0; |
| 4291 | } |
| 4292 | if (!hdw->state_pipeline_idle) { |
| 4293 | /* Not allowed to change anything if pipeline is not idle */ |
| 4294 | return 0; |
| 4295 | } |
| 4296 | pvr2_hdw_cmd_modeswitch(hdw,hdw->input_val == PVR2_CVAL_INPUT_DTV); |
| 4297 | hdw->state_pathway_ok = !0; |
Mike Isely | e9db1ff | 2008-04-22 14:45:41 -0300 | [diff] [blame] | 4298 | trace_stbit("state_pathway_ok",hdw->state_pathway_ok); |
Mike Isely | 62433e3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4299 | return !0; |
| 4300 | } |
| 4301 | |
| 4302 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4303 | /* Evaluate whether or not state_encoder_ok can change */ |
| 4304 | static int state_eval_encoder_ok(struct pvr2_hdw *hdw) |
| 4305 | { |
| 4306 | if (hdw->state_encoder_ok) return 0; |
| 4307 | if (hdw->flag_tripped) return 0; |
| 4308 | if (hdw->state_encoder_run) return 0; |
| 4309 | if (hdw->state_encoder_config) return 0; |
| 4310 | if (hdw->state_decoder_run) return 0; |
| 4311 | if (hdw->state_usbstream_run) return 0; |
Mike Isely | 72998b7 | 2008-04-03 04:51:19 -0300 | [diff] [blame] | 4312 | if (hdw->pathway_state == PVR2_PATHWAY_DIGITAL) { |
| 4313 | if (!hdw->hdw_desc->flag_digital_requires_cx23416) return 0; |
| 4314 | } else if (hdw->pathway_state != PVR2_PATHWAY_ANALOG) { |
| 4315 | return 0; |
| 4316 | } |
| 4317 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4318 | if (pvr2_upload_firmware2(hdw) < 0) { |
| 4319 | hdw->flag_tripped = !0; |
| 4320 | trace_stbit("flag_tripped",hdw->flag_tripped); |
| 4321 | return !0; |
| 4322 | } |
| 4323 | hdw->state_encoder_ok = !0; |
| 4324 | trace_stbit("state_encoder_ok",hdw->state_encoder_ok); |
| 4325 | return !0; |
| 4326 | } |
| 4327 | |
| 4328 | |
| 4329 | /* Evaluate whether or not state_encoder_config can change */ |
| 4330 | static int state_eval_encoder_config(struct pvr2_hdw *hdw) |
| 4331 | { |
| 4332 | if (hdw->state_encoder_config) { |
| 4333 | if (hdw->state_encoder_ok) { |
| 4334 | if (hdw->state_pipeline_req && |
| 4335 | !hdw->state_pipeline_pause) return 0; |
| 4336 | } |
| 4337 | hdw->state_encoder_config = 0; |
| 4338 | hdw->state_encoder_waitok = 0; |
| 4339 | trace_stbit("state_encoder_waitok",hdw->state_encoder_waitok); |
| 4340 | /* paranoia - solve race if timer just completed */ |
| 4341 | del_timer_sync(&hdw->encoder_wait_timer); |
| 4342 | } else { |
Mike Isely | 62433e3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4343 | if (!hdw->state_pathway_ok || |
| 4344 | (hdw->pathway_state != PVR2_PATHWAY_ANALOG) || |
| 4345 | !hdw->state_encoder_ok || |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4346 | !hdw->state_pipeline_idle || |
| 4347 | hdw->state_pipeline_pause || |
| 4348 | !hdw->state_pipeline_req || |
| 4349 | !hdw->state_pipeline_config) { |
| 4350 | /* We must reset the enforced wait interval if |
| 4351 | anything has happened that might have disturbed |
| 4352 | the encoder. This should be a rare case. */ |
| 4353 | if (timer_pending(&hdw->encoder_wait_timer)) { |
| 4354 | del_timer_sync(&hdw->encoder_wait_timer); |
| 4355 | } |
| 4356 | if (hdw->state_encoder_waitok) { |
| 4357 | /* Must clear the state - therefore we did |
| 4358 | something to a state bit and must also |
| 4359 | return true. */ |
| 4360 | hdw->state_encoder_waitok = 0; |
| 4361 | trace_stbit("state_encoder_waitok", |
| 4362 | hdw->state_encoder_waitok); |
| 4363 | return !0; |
| 4364 | } |
| 4365 | return 0; |
| 4366 | } |
| 4367 | if (!hdw->state_encoder_waitok) { |
| 4368 | if (!timer_pending(&hdw->encoder_wait_timer)) { |
| 4369 | /* waitok flag wasn't set and timer isn't |
| 4370 | running. Check flag once more to avoid |
| 4371 | a race then start the timer. This is |
| 4372 | the point when we measure out a minimal |
| 4373 | quiet interval before doing something to |
| 4374 | the encoder. */ |
| 4375 | if (!hdw->state_encoder_waitok) { |
| 4376 | hdw->encoder_wait_timer.expires = |
Mike Isely | 83ce57a | 2008-05-26 05:51:57 -0300 | [diff] [blame] | 4377 | jiffies + |
| 4378 | (HZ * TIME_MSEC_ENCODER_WAIT |
| 4379 | / 1000); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4380 | add_timer(&hdw->encoder_wait_timer); |
| 4381 | } |
| 4382 | } |
| 4383 | /* We can't continue until we know we have been |
| 4384 | quiet for the interval measured by this |
| 4385 | timer. */ |
| 4386 | return 0; |
| 4387 | } |
| 4388 | pvr2_encoder_configure(hdw); |
| 4389 | if (hdw->state_encoder_ok) hdw->state_encoder_config = !0; |
| 4390 | } |
| 4391 | trace_stbit("state_encoder_config",hdw->state_encoder_config); |
| 4392 | return !0; |
| 4393 | } |
| 4394 | |
| 4395 | |
Mike Isely | d913d63 | 2008-04-06 04:04:35 -0300 | [diff] [blame] | 4396 | /* Return true if the encoder should not be running. */ |
| 4397 | static int state_check_disable_encoder_run(struct pvr2_hdw *hdw) |
| 4398 | { |
| 4399 | if (!hdw->state_encoder_ok) { |
| 4400 | /* Encoder isn't healthy at the moment, so stop it. */ |
| 4401 | return !0; |
| 4402 | } |
| 4403 | if (!hdw->state_pathway_ok) { |
| 4404 | /* Mode is not understood at the moment (i.e. it wants to |
| 4405 | change), so encoder must be stopped. */ |
| 4406 | return !0; |
| 4407 | } |
| 4408 | |
| 4409 | switch (hdw->pathway_state) { |
| 4410 | case PVR2_PATHWAY_ANALOG: |
| 4411 | if (!hdw->state_decoder_run) { |
| 4412 | /* We're in analog mode and the decoder is not |
| 4413 | running; thus the encoder should be stopped as |
| 4414 | well. */ |
| 4415 | return !0; |
| 4416 | } |
| 4417 | break; |
| 4418 | case PVR2_PATHWAY_DIGITAL: |
| 4419 | if (hdw->state_encoder_runok) { |
| 4420 | /* This is a funny case. We're in digital mode so |
| 4421 | really the encoder should be stopped. However |
| 4422 | if it really is running, only kill it after |
| 4423 | runok has been set. This gives a chance for the |
| 4424 | onair quirk to function (encoder must run |
| 4425 | briefly first, at least once, before onair |
| 4426 | digital streaming can work). */ |
| 4427 | return !0; |
| 4428 | } |
| 4429 | break; |
| 4430 | default: |
| 4431 | /* Unknown mode; so encoder should be stopped. */ |
| 4432 | return !0; |
| 4433 | } |
| 4434 | |
| 4435 | /* If we get here, we haven't found a reason to stop the |
| 4436 | encoder. */ |
| 4437 | return 0; |
| 4438 | } |
| 4439 | |
| 4440 | |
| 4441 | /* Return true if the encoder should be running. */ |
| 4442 | static int state_check_enable_encoder_run(struct pvr2_hdw *hdw) |
| 4443 | { |
| 4444 | if (!hdw->state_encoder_ok) { |
| 4445 | /* Don't run the encoder if it isn't healthy... */ |
| 4446 | return 0; |
| 4447 | } |
| 4448 | if (!hdw->state_pathway_ok) { |
| 4449 | /* Don't run the encoder if we don't (yet) know what mode |
| 4450 | we need to be in... */ |
| 4451 | return 0; |
| 4452 | } |
| 4453 | |
| 4454 | switch (hdw->pathway_state) { |
| 4455 | case PVR2_PATHWAY_ANALOG: |
| 4456 | if (hdw->state_decoder_run) { |
| 4457 | /* In analog mode, if the decoder is running, then |
| 4458 | run the encoder. */ |
| 4459 | return !0; |
| 4460 | } |
| 4461 | break; |
| 4462 | case PVR2_PATHWAY_DIGITAL: |
| 4463 | if ((hdw->hdw_desc->digital_control_scheme == |
| 4464 | PVR2_DIGITAL_SCHEME_ONAIR) && |
| 4465 | !hdw->state_encoder_runok) { |
| 4466 | /* This is a quirk. OnAir hardware won't stream |
| 4467 | digital until the encoder has been run at least |
| 4468 | once, for a minimal period of time (empiricially |
| 4469 | measured to be 1/4 second). So if we're on |
| 4470 | OnAir hardware and the encoder has never been |
| 4471 | run at all, then start the encoder. Normal |
| 4472 | state machine logic in the driver will |
| 4473 | automatically handle the remaining bits. */ |
| 4474 | return !0; |
| 4475 | } |
| 4476 | break; |
| 4477 | default: |
| 4478 | /* For completeness (unknown mode; encoder won't run ever) */ |
| 4479 | break; |
| 4480 | } |
| 4481 | /* If we get here, then we haven't found any reason to run the |
| 4482 | encoder, so don't run it. */ |
| 4483 | return 0; |
| 4484 | } |
| 4485 | |
| 4486 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4487 | /* Evaluate whether or not state_encoder_run can change */ |
| 4488 | static int state_eval_encoder_run(struct pvr2_hdw *hdw) |
| 4489 | { |
| 4490 | if (hdw->state_encoder_run) { |
Mike Isely | d913d63 | 2008-04-06 04:04:35 -0300 | [diff] [blame] | 4491 | if (!state_check_disable_encoder_run(hdw)) return 0; |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4492 | if (hdw->state_encoder_ok) { |
Mike Isely | d913d63 | 2008-04-06 04:04:35 -0300 | [diff] [blame] | 4493 | del_timer_sync(&hdw->encoder_run_timer); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4494 | if (pvr2_encoder_stop(hdw) < 0) return !0; |
| 4495 | } |
| 4496 | hdw->state_encoder_run = 0; |
| 4497 | } else { |
Mike Isely | d913d63 | 2008-04-06 04:04:35 -0300 | [diff] [blame] | 4498 | if (!state_check_enable_encoder_run(hdw)) return 0; |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4499 | if (pvr2_encoder_start(hdw) < 0) return !0; |
| 4500 | hdw->state_encoder_run = !0; |
Mike Isely | d913d63 | 2008-04-06 04:04:35 -0300 | [diff] [blame] | 4501 | if (!hdw->state_encoder_runok) { |
| 4502 | hdw->encoder_run_timer.expires = |
Mike Isely | 83ce57a | 2008-05-26 05:51:57 -0300 | [diff] [blame] | 4503 | jiffies + (HZ * TIME_MSEC_ENCODER_OK / 1000); |
Mike Isely | d913d63 | 2008-04-06 04:04:35 -0300 | [diff] [blame] | 4504 | add_timer(&hdw->encoder_run_timer); |
| 4505 | } |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4506 | } |
| 4507 | trace_stbit("state_encoder_run",hdw->state_encoder_run); |
| 4508 | return !0; |
| 4509 | } |
| 4510 | |
| 4511 | |
| 4512 | /* Timeout function for quiescent timer. */ |
| 4513 | static void pvr2_hdw_quiescent_timeout(unsigned long data) |
| 4514 | { |
| 4515 | struct pvr2_hdw *hdw = (struct pvr2_hdw *)data; |
| 4516 | hdw->state_decoder_quiescent = !0; |
| 4517 | trace_stbit("state_decoder_quiescent",hdw->state_decoder_quiescent); |
| 4518 | hdw->state_stale = !0; |
| 4519 | queue_work(hdw->workqueue,&hdw->workpoll); |
| 4520 | } |
| 4521 | |
| 4522 | |
| 4523 | /* Timeout function for encoder wait timer. */ |
| 4524 | static void pvr2_hdw_encoder_wait_timeout(unsigned long data) |
| 4525 | { |
| 4526 | struct pvr2_hdw *hdw = (struct pvr2_hdw *)data; |
| 4527 | hdw->state_encoder_waitok = !0; |
| 4528 | trace_stbit("state_encoder_waitok",hdw->state_encoder_waitok); |
| 4529 | hdw->state_stale = !0; |
| 4530 | queue_work(hdw->workqueue,&hdw->workpoll); |
| 4531 | } |
| 4532 | |
| 4533 | |
Mike Isely | d913d63 | 2008-04-06 04:04:35 -0300 | [diff] [blame] | 4534 | /* Timeout function for encoder run timer. */ |
| 4535 | static void pvr2_hdw_encoder_run_timeout(unsigned long data) |
| 4536 | { |
| 4537 | struct pvr2_hdw *hdw = (struct pvr2_hdw *)data; |
| 4538 | if (!hdw->state_encoder_runok) { |
| 4539 | hdw->state_encoder_runok = !0; |
| 4540 | trace_stbit("state_encoder_runok",hdw->state_encoder_runok); |
| 4541 | hdw->state_stale = !0; |
| 4542 | queue_work(hdw->workqueue,&hdw->workpoll); |
| 4543 | } |
| 4544 | } |
| 4545 | |
| 4546 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4547 | /* Evaluate whether or not state_decoder_run can change */ |
| 4548 | static int state_eval_decoder_run(struct pvr2_hdw *hdw) |
| 4549 | { |
| 4550 | if (hdw->state_decoder_run) { |
| 4551 | if (hdw->state_encoder_ok) { |
| 4552 | if (hdw->state_pipeline_req && |
Mike Isely | 62433e3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4553 | !hdw->state_pipeline_pause && |
| 4554 | hdw->state_pathway_ok) return 0; |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4555 | } |
| 4556 | if (!hdw->flag_decoder_missed) { |
| 4557 | pvr2_decoder_enable(hdw,0); |
| 4558 | } |
| 4559 | hdw->state_decoder_quiescent = 0; |
| 4560 | hdw->state_decoder_run = 0; |
| 4561 | /* paranoia - solve race if timer just completed */ |
| 4562 | del_timer_sync(&hdw->quiescent_timer); |
| 4563 | } else { |
| 4564 | if (!hdw->state_decoder_quiescent) { |
| 4565 | if (!timer_pending(&hdw->quiescent_timer)) { |
| 4566 | /* We don't do something about the |
| 4567 | quiescent timer until right here because |
| 4568 | we also want to catch cases where the |
| 4569 | decoder was already not running (like |
| 4570 | after initialization) as opposed to |
| 4571 | knowing that we had just stopped it. |
| 4572 | The second flag check is here to cover a |
| 4573 | race - the timer could have run and set |
| 4574 | this flag just after the previous check |
| 4575 | but before we did the pending check. */ |
| 4576 | if (!hdw->state_decoder_quiescent) { |
| 4577 | hdw->quiescent_timer.expires = |
Mike Isely | 83ce57a | 2008-05-26 05:51:57 -0300 | [diff] [blame] | 4578 | jiffies + |
| 4579 | (HZ * TIME_MSEC_DECODER_WAIT |
| 4580 | / 1000); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4581 | add_timer(&hdw->quiescent_timer); |
| 4582 | } |
| 4583 | } |
| 4584 | /* Don't allow decoder to start again until it has |
| 4585 | been quiesced first. This little detail should |
| 4586 | hopefully further stabilize the encoder. */ |
| 4587 | return 0; |
| 4588 | } |
Mike Isely | 62433e3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4589 | if (!hdw->state_pathway_ok || |
| 4590 | (hdw->pathway_state != PVR2_PATHWAY_ANALOG) || |
| 4591 | !hdw->state_pipeline_req || |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4592 | hdw->state_pipeline_pause || |
| 4593 | !hdw->state_pipeline_config || |
| 4594 | !hdw->state_encoder_config || |
| 4595 | !hdw->state_encoder_ok) return 0; |
| 4596 | del_timer_sync(&hdw->quiescent_timer); |
| 4597 | if (hdw->flag_decoder_missed) return 0; |
| 4598 | if (pvr2_decoder_enable(hdw,!0) < 0) return 0; |
| 4599 | hdw->state_decoder_quiescent = 0; |
| 4600 | hdw->state_decoder_run = !0; |
| 4601 | } |
| 4602 | trace_stbit("state_decoder_quiescent",hdw->state_decoder_quiescent); |
| 4603 | trace_stbit("state_decoder_run",hdw->state_decoder_run); |
| 4604 | return !0; |
| 4605 | } |
| 4606 | |
| 4607 | |
| 4608 | /* Evaluate whether or not state_usbstream_run can change */ |
| 4609 | static int state_eval_usbstream_run(struct pvr2_hdw *hdw) |
| 4610 | { |
| 4611 | if (hdw->state_usbstream_run) { |
Mike Isely | 72998b7 | 2008-04-03 04:51:19 -0300 | [diff] [blame] | 4612 | int fl = !0; |
Mike Isely | 62433e3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4613 | if (hdw->pathway_state == PVR2_PATHWAY_ANALOG) { |
Mike Isely | 72998b7 | 2008-04-03 04:51:19 -0300 | [diff] [blame] | 4614 | fl = (hdw->state_encoder_ok && |
| 4615 | hdw->state_encoder_run); |
| 4616 | } else if ((hdw->pathway_state == PVR2_PATHWAY_DIGITAL) && |
| 4617 | (hdw->hdw_desc->flag_digital_requires_cx23416)) { |
| 4618 | fl = hdw->state_encoder_ok; |
| 4619 | } |
| 4620 | if (fl && |
| 4621 | hdw->state_pipeline_req && |
| 4622 | !hdw->state_pipeline_pause && |
| 4623 | hdw->state_pathway_ok) { |
| 4624 | return 0; |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4625 | } |
| 4626 | pvr2_hdw_cmd_usbstream(hdw,0); |
| 4627 | hdw->state_usbstream_run = 0; |
| 4628 | } else { |
Mike Isely | 62433e3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4629 | if (!hdw->state_pipeline_req || |
| 4630 | hdw->state_pipeline_pause || |
| 4631 | !hdw->state_pathway_ok) return 0; |
| 4632 | if (hdw->pathway_state == PVR2_PATHWAY_ANALOG) { |
| 4633 | if (!hdw->state_encoder_ok || |
| 4634 | !hdw->state_encoder_run) return 0; |
Mike Isely | 72998b7 | 2008-04-03 04:51:19 -0300 | [diff] [blame] | 4635 | } else if ((hdw->pathway_state == PVR2_PATHWAY_DIGITAL) && |
| 4636 | (hdw->hdw_desc->flag_digital_requires_cx23416)) { |
| 4637 | if (!hdw->state_encoder_ok) return 0; |
Mike Isely | d913d63 | 2008-04-06 04:04:35 -0300 | [diff] [blame] | 4638 | if (hdw->state_encoder_run) return 0; |
| 4639 | if (hdw->hdw_desc->digital_control_scheme == |
| 4640 | PVR2_DIGITAL_SCHEME_ONAIR) { |
| 4641 | /* OnAir digital receivers won't stream |
| 4642 | unless the analog encoder has run first. |
| 4643 | Why? I have no idea. But don't even |
| 4644 | try until we know the analog side is |
| 4645 | known to have run. */ |
| 4646 | if (!hdw->state_encoder_runok) return 0; |
| 4647 | } |
Mike Isely | 62433e3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4648 | } |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4649 | if (pvr2_hdw_cmd_usbstream(hdw,!0) < 0) return 0; |
| 4650 | hdw->state_usbstream_run = !0; |
| 4651 | } |
| 4652 | trace_stbit("state_usbstream_run",hdw->state_usbstream_run); |
| 4653 | return !0; |
| 4654 | } |
| 4655 | |
| 4656 | |
| 4657 | /* Attempt to configure pipeline, if needed */ |
| 4658 | static int state_eval_pipeline_config(struct pvr2_hdw *hdw) |
| 4659 | { |
| 4660 | if (hdw->state_pipeline_config || |
| 4661 | hdw->state_pipeline_pause) return 0; |
| 4662 | pvr2_hdw_commit_execute(hdw); |
| 4663 | return !0; |
| 4664 | } |
| 4665 | |
| 4666 | |
| 4667 | /* Update pipeline idle and pipeline pause tracking states based on other |
| 4668 | inputs. This must be called whenever the other relevant inputs have |
| 4669 | changed. */ |
| 4670 | static int state_update_pipeline_state(struct pvr2_hdw *hdw) |
| 4671 | { |
| 4672 | unsigned int st; |
| 4673 | int updatedFl = 0; |
| 4674 | /* Update pipeline state */ |
| 4675 | st = !(hdw->state_encoder_run || |
| 4676 | hdw->state_decoder_run || |
| 4677 | hdw->state_usbstream_run || |
| 4678 | (!hdw->state_decoder_quiescent)); |
| 4679 | if (!st != !hdw->state_pipeline_idle) { |
| 4680 | hdw->state_pipeline_idle = st; |
| 4681 | updatedFl = !0; |
| 4682 | } |
| 4683 | if (hdw->state_pipeline_idle && hdw->state_pipeline_pause) { |
| 4684 | hdw->state_pipeline_pause = 0; |
| 4685 | updatedFl = !0; |
| 4686 | } |
| 4687 | return updatedFl; |
| 4688 | } |
| 4689 | |
| 4690 | |
| 4691 | typedef int (*state_eval_func)(struct pvr2_hdw *); |
| 4692 | |
| 4693 | /* Set of functions to be run to evaluate various states in the driver. */ |
Tobias Klauser | ebff033 | 2008-04-22 14:45:45 -0300 | [diff] [blame] | 4694 | static const state_eval_func eval_funcs[] = { |
Mike Isely | 62433e3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4695 | state_eval_pathway_ok, |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4696 | state_eval_pipeline_config, |
| 4697 | state_eval_encoder_ok, |
| 4698 | state_eval_encoder_config, |
| 4699 | state_eval_decoder_run, |
| 4700 | state_eval_encoder_run, |
| 4701 | state_eval_usbstream_run, |
| 4702 | }; |
| 4703 | |
| 4704 | |
| 4705 | /* Process various states and return true if we did anything interesting. */ |
| 4706 | static int pvr2_hdw_state_update(struct pvr2_hdw *hdw) |
| 4707 | { |
| 4708 | unsigned int i; |
| 4709 | int state_updated = 0; |
| 4710 | int check_flag; |
| 4711 | |
| 4712 | if (!hdw->state_stale) return 0; |
| 4713 | if ((hdw->fw1_state != FW1_STATE_OK) || |
| 4714 | !hdw->flag_ok) { |
| 4715 | hdw->state_stale = 0; |
| 4716 | return !0; |
| 4717 | } |
| 4718 | /* This loop is the heart of the entire driver. It keeps trying to |
| 4719 | evaluate various bits of driver state until nothing changes for |
| 4720 | one full iteration. Each "bit of state" tracks some global |
| 4721 | aspect of the driver, e.g. whether decoder should run, if |
| 4722 | pipeline is configured, usb streaming is on, etc. We separately |
| 4723 | evaluate each of those questions based on other driver state to |
| 4724 | arrive at the correct running configuration. */ |
| 4725 | do { |
| 4726 | check_flag = 0; |
| 4727 | state_update_pipeline_state(hdw); |
| 4728 | /* Iterate over each bit of state */ |
| 4729 | for (i = 0; (i<ARRAY_SIZE(eval_funcs)) && hdw->flag_ok; i++) { |
| 4730 | if ((*eval_funcs[i])(hdw)) { |
| 4731 | check_flag = !0; |
| 4732 | state_updated = !0; |
| 4733 | state_update_pipeline_state(hdw); |
| 4734 | } |
| 4735 | } |
| 4736 | } while (check_flag && hdw->flag_ok); |
| 4737 | hdw->state_stale = 0; |
| 4738 | trace_stbit("state_stale",hdw->state_stale); |
| 4739 | return state_updated; |
| 4740 | } |
| 4741 | |
| 4742 | |
Mike Isely | 1cb03b7 | 2008-04-21 03:47:43 -0300 | [diff] [blame] | 4743 | static unsigned int print_input_mask(unsigned int msk, |
| 4744 | char *buf,unsigned int acnt) |
| 4745 | { |
| 4746 | unsigned int idx,ccnt; |
| 4747 | unsigned int tcnt = 0; |
| 4748 | for (idx = 0; idx < ARRAY_SIZE(control_values_input); idx++) { |
| 4749 | if (!((1 << idx) & msk)) continue; |
| 4750 | ccnt = scnprintf(buf+tcnt, |
| 4751 | acnt-tcnt, |
| 4752 | "%s%s", |
| 4753 | (tcnt ? ", " : ""), |
| 4754 | control_values_input[idx]); |
| 4755 | tcnt += ccnt; |
| 4756 | } |
| 4757 | return tcnt; |
| 4758 | } |
| 4759 | |
| 4760 | |
Mike Isely | 62433e3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4761 | static const char *pvr2_pathway_state_name(int id) |
| 4762 | { |
| 4763 | switch (id) { |
| 4764 | case PVR2_PATHWAY_ANALOG: return "analog"; |
| 4765 | case PVR2_PATHWAY_DIGITAL: return "digital"; |
| 4766 | default: return "unknown"; |
| 4767 | } |
| 4768 | } |
| 4769 | |
| 4770 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4771 | static unsigned int pvr2_hdw_report_unlocked(struct pvr2_hdw *hdw,int which, |
| 4772 | char *buf,unsigned int acnt) |
| 4773 | { |
| 4774 | switch (which) { |
| 4775 | case 0: |
| 4776 | return scnprintf( |
| 4777 | buf,acnt, |
Mike Isely | e9db1ff | 2008-04-22 14:45:41 -0300 | [diff] [blame] | 4778 | "driver:%s%s%s%s%s <mode=%s>", |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4779 | (hdw->flag_ok ? " <ok>" : " <fail>"), |
| 4780 | (hdw->flag_init_ok ? " <init>" : " <uninitialized>"), |
| 4781 | (hdw->flag_disconnected ? " <disconnected>" : |
| 4782 | " <connected>"), |
| 4783 | (hdw->flag_tripped ? " <tripped>" : ""), |
Mike Isely | 62433e3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4784 | (hdw->flag_decoder_missed ? " <no decoder>" : ""), |
| 4785 | pvr2_pathway_state_name(hdw->pathway_state)); |
| 4786 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4787 | case 1: |
| 4788 | return scnprintf( |
| 4789 | buf,acnt, |
| 4790 | "pipeline:%s%s%s%s", |
| 4791 | (hdw->state_pipeline_idle ? " <idle>" : ""), |
| 4792 | (hdw->state_pipeline_config ? |
| 4793 | " <configok>" : " <stale>"), |
| 4794 | (hdw->state_pipeline_req ? " <req>" : ""), |
| 4795 | (hdw->state_pipeline_pause ? " <pause>" : "")); |
| 4796 | case 2: |
| 4797 | return scnprintf( |
| 4798 | buf,acnt, |
Mike Isely | 62433e3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4799 | "worker:%s%s%s%s%s%s%s", |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4800 | (hdw->state_decoder_run ? |
| 4801 | " <decode:run>" : |
| 4802 | (hdw->state_decoder_quiescent ? |
| 4803 | "" : " <decode:stop>")), |
| 4804 | (hdw->state_decoder_quiescent ? |
| 4805 | " <decode:quiescent>" : ""), |
| 4806 | (hdw->state_encoder_ok ? |
| 4807 | "" : " <encode:init>"), |
| 4808 | (hdw->state_encoder_run ? |
Mike Isely | d913d63 | 2008-04-06 04:04:35 -0300 | [diff] [blame] | 4809 | (hdw->state_encoder_runok ? |
| 4810 | " <encode:run>" : |
| 4811 | " <encode:firstrun>") : |
| 4812 | (hdw->state_encoder_runok ? |
| 4813 | " <encode:stop>" : |
| 4814 | " <encode:virgin>")), |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4815 | (hdw->state_encoder_config ? |
| 4816 | " <encode:configok>" : |
| 4817 | (hdw->state_encoder_waitok ? |
Mike Isely | b9a37d9 | 2008-03-28 05:31:40 -0300 | [diff] [blame] | 4818 | "" : " <encode:waitok>")), |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4819 | (hdw->state_usbstream_run ? |
Mike Isely | 62433e3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4820 | " <usb:run>" : " <usb:stop>"), |
| 4821 | (hdw->state_pathway_ok ? |
Mike Isely | e9db1ff | 2008-04-22 14:45:41 -0300 | [diff] [blame] | 4822 | " <pathway:ok>" : "")); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4823 | case 3: |
| 4824 | return scnprintf( |
| 4825 | buf,acnt, |
| 4826 | "state: %s", |
| 4827 | pvr2_get_state_name(hdw->master_state)); |
Mike Isely | ad0992e | 2008-03-28 05:34:45 -0300 | [diff] [blame] | 4828 | case 4: { |
Mike Isely | 1cb03b7 | 2008-04-21 03:47:43 -0300 | [diff] [blame] | 4829 | unsigned int tcnt = 0; |
| 4830 | unsigned int ccnt; |
| 4831 | |
| 4832 | ccnt = scnprintf(buf, |
| 4833 | acnt, |
| 4834 | "Hardware supported inputs: "); |
| 4835 | tcnt += ccnt; |
| 4836 | tcnt += print_input_mask(hdw->input_avail_mask, |
| 4837 | buf+tcnt, |
| 4838 | acnt-tcnt); |
| 4839 | if (hdw->input_avail_mask != hdw->input_allowed_mask) { |
| 4840 | ccnt = scnprintf(buf+tcnt, |
| 4841 | acnt-tcnt, |
| 4842 | "; allowed inputs: "); |
| 4843 | tcnt += ccnt; |
| 4844 | tcnt += print_input_mask(hdw->input_allowed_mask, |
| 4845 | buf+tcnt, |
| 4846 | acnt-tcnt); |
| 4847 | } |
| 4848 | return tcnt; |
| 4849 | } |
| 4850 | case 5: { |
Mike Isely | ad0992e | 2008-03-28 05:34:45 -0300 | [diff] [blame] | 4851 | struct pvr2_stream_stats stats; |
| 4852 | if (!hdw->vid_stream) break; |
| 4853 | pvr2_stream_get_stats(hdw->vid_stream, |
| 4854 | &stats, |
| 4855 | 0); |
| 4856 | return scnprintf( |
| 4857 | buf,acnt, |
| 4858 | "Bytes streamed=%u" |
| 4859 | " URBs: queued=%u idle=%u ready=%u" |
| 4860 | " processed=%u failed=%u", |
| 4861 | stats.bytes_processed, |
| 4862 | stats.buffers_in_queue, |
| 4863 | stats.buffers_in_idle, |
| 4864 | stats.buffers_in_ready, |
| 4865 | stats.buffers_processed, |
| 4866 | stats.buffers_failed); |
| 4867 | } |
Mike Isely | 858f910 | 2009-03-07 00:28:28 -0300 | [diff] [blame] | 4868 | case 6: { |
| 4869 | struct v4l2_subdev *sd; |
| 4870 | unsigned int tcnt = 0; |
| 4871 | unsigned int ccnt; |
| 4872 | const char *p; |
| 4873 | unsigned int id; |
| 4874 | ccnt = scnprintf(buf, |
| 4875 | acnt, |
Mike Isely | 5f757dd | 2009-03-07 01:39:40 -0300 | [diff] [blame] | 4876 | "Associated v4l2_subdev drivers:"); |
Mike Isely | 858f910 | 2009-03-07 00:28:28 -0300 | [diff] [blame] | 4877 | tcnt += ccnt; |
| 4878 | v4l2_device_for_each_subdev(sd, &hdw->v4l2_dev) { |
| 4879 | id = sd->grp_id; |
| 4880 | p = NULL; |
| 4881 | if (id < ARRAY_SIZE(module_names)) { |
| 4882 | p = module_names[id]; |
| 4883 | } |
Mike Isely | 5f757dd | 2009-03-07 01:39:40 -0300 | [diff] [blame] | 4884 | if (p) { |
| 4885 | ccnt = scnprintf(buf + tcnt, |
| 4886 | acnt - tcnt, |
| 4887 | " %s", p); |
| 4888 | } else { |
| 4889 | ccnt = scnprintf(buf + tcnt, |
| 4890 | acnt - tcnt, |
| 4891 | " (unknown id=%u)", id); |
| 4892 | } |
| 4893 | tcnt += ccnt; |
Mike Isely | 858f910 | 2009-03-07 00:28:28 -0300 | [diff] [blame] | 4894 | } |
| 4895 | return tcnt; |
| 4896 | } |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4897 | default: break; |
| 4898 | } |
| 4899 | return 0; |
| 4900 | } |
| 4901 | |
| 4902 | |
| 4903 | unsigned int pvr2_hdw_state_report(struct pvr2_hdw *hdw, |
| 4904 | char *buf,unsigned int acnt) |
| 4905 | { |
| 4906 | unsigned int bcnt,ccnt,idx; |
| 4907 | bcnt = 0; |
| 4908 | LOCK_TAKE(hdw->big_lock); |
| 4909 | for (idx = 0; ; idx++) { |
| 4910 | ccnt = pvr2_hdw_report_unlocked(hdw,idx,buf,acnt); |
| 4911 | if (!ccnt) break; |
| 4912 | bcnt += ccnt; acnt -= ccnt; buf += ccnt; |
| 4913 | if (!acnt) break; |
| 4914 | buf[0] = '\n'; ccnt = 1; |
| 4915 | bcnt += ccnt; acnt -= ccnt; buf += ccnt; |
| 4916 | } |
| 4917 | LOCK_GIVE(hdw->big_lock); |
| 4918 | return bcnt; |
| 4919 | } |
| 4920 | |
| 4921 | |
| 4922 | static void pvr2_hdw_state_log_state(struct pvr2_hdw *hdw) |
| 4923 | { |
| 4924 | char buf[128]; |
| 4925 | unsigned int idx,ccnt; |
| 4926 | |
| 4927 | for (idx = 0; ; idx++) { |
| 4928 | ccnt = pvr2_hdw_report_unlocked(hdw,idx,buf,sizeof(buf)); |
| 4929 | if (!ccnt) break; |
| 4930 | printk(KERN_INFO "%s %.*s\n",hdw->name,ccnt,buf); |
| 4931 | } |
| 4932 | } |
| 4933 | |
| 4934 | |
| 4935 | /* Evaluate and update the driver's current state, taking various actions |
| 4936 | as appropriate for the update. */ |
| 4937 | static int pvr2_hdw_state_eval(struct pvr2_hdw *hdw) |
| 4938 | { |
| 4939 | unsigned int st; |
| 4940 | int state_updated = 0; |
| 4941 | int callback_flag = 0; |
Mike Isely | 1b9c18c | 2008-04-22 14:45:41 -0300 | [diff] [blame] | 4942 | int analog_mode; |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4943 | |
| 4944 | pvr2_trace(PVR2_TRACE_STBITS, |
| 4945 | "Drive state check START"); |
| 4946 | if (pvrusb2_debug & PVR2_TRACE_STBITS) { |
| 4947 | pvr2_hdw_state_log_state(hdw); |
| 4948 | } |
| 4949 | |
| 4950 | /* Process all state and get back over disposition */ |
| 4951 | state_updated = pvr2_hdw_state_update(hdw); |
| 4952 | |
Mike Isely | 1b9c18c | 2008-04-22 14:45:41 -0300 | [diff] [blame] | 4953 | analog_mode = (hdw->pathway_state != PVR2_PATHWAY_DIGITAL); |
| 4954 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4955 | /* Update master state based upon all other states. */ |
| 4956 | if (!hdw->flag_ok) { |
| 4957 | st = PVR2_STATE_DEAD; |
| 4958 | } else if (hdw->fw1_state != FW1_STATE_OK) { |
| 4959 | st = PVR2_STATE_COLD; |
Mike Isely | 72998b7 | 2008-04-03 04:51:19 -0300 | [diff] [blame] | 4960 | } else if ((analog_mode || |
| 4961 | hdw->hdw_desc->flag_digital_requires_cx23416) && |
| 4962 | !hdw->state_encoder_ok) { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4963 | st = PVR2_STATE_WARM; |
Mike Isely | 1b9c18c | 2008-04-22 14:45:41 -0300 | [diff] [blame] | 4964 | } else if (hdw->flag_tripped || |
| 4965 | (analog_mode && hdw->flag_decoder_missed)) { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4966 | st = PVR2_STATE_ERROR; |
Mike Isely | 62433e3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4967 | } else if (hdw->state_usbstream_run && |
Mike Isely | 1b9c18c | 2008-04-22 14:45:41 -0300 | [diff] [blame] | 4968 | (!analog_mode || |
Mike Isely | 62433e3 | 2008-04-22 14:45:40 -0300 | [diff] [blame] | 4969 | (hdw->state_encoder_run && hdw->state_decoder_run))) { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4970 | st = PVR2_STATE_RUN; |
| 4971 | } else { |
| 4972 | st = PVR2_STATE_READY; |
| 4973 | } |
| 4974 | if (hdw->master_state != st) { |
| 4975 | pvr2_trace(PVR2_TRACE_STATE, |
| 4976 | "Device state change from %s to %s", |
| 4977 | pvr2_get_state_name(hdw->master_state), |
| 4978 | pvr2_get_state_name(st)); |
Mike Isely | 40381cb | 2008-04-22 14:45:42 -0300 | [diff] [blame] | 4979 | pvr2_led_ctrl(hdw,st == PVR2_STATE_RUN); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 4980 | hdw->master_state = st; |
| 4981 | state_updated = !0; |
| 4982 | callback_flag = !0; |
| 4983 | } |
| 4984 | if (state_updated) { |
| 4985 | /* Trigger anyone waiting on any state changes here. */ |
| 4986 | wake_up(&hdw->state_wait_data); |
| 4987 | } |
| 4988 | |
| 4989 | if (pvrusb2_debug & PVR2_TRACE_STBITS) { |
| 4990 | pvr2_hdw_state_log_state(hdw); |
| 4991 | } |
| 4992 | pvr2_trace(PVR2_TRACE_STBITS, |
| 4993 | "Drive state check DONE callback=%d",callback_flag); |
| 4994 | |
| 4995 | return callback_flag; |
| 4996 | } |
| 4997 | |
| 4998 | |
| 4999 | /* Cause kernel thread to check / update driver state */ |
| 5000 | static void pvr2_hdw_state_sched(struct pvr2_hdw *hdw) |
| 5001 | { |
| 5002 | if (hdw->state_stale) return; |
| 5003 | hdw->state_stale = !0; |
| 5004 | trace_stbit("state_stale",hdw->state_stale); |
| 5005 | queue_work(hdw->workqueue,&hdw->workpoll); |
| 5006 | } |
| 5007 | |
| 5008 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 5009 | int pvr2_hdw_gpio_get_dir(struct pvr2_hdw *hdw,u32 *dp) |
| 5010 | { |
| 5011 | return pvr2_read_register(hdw,PVR2_GPIO_DIR,dp); |
| 5012 | } |
| 5013 | |
| 5014 | |
| 5015 | int pvr2_hdw_gpio_get_out(struct pvr2_hdw *hdw,u32 *dp) |
| 5016 | { |
| 5017 | return pvr2_read_register(hdw,PVR2_GPIO_OUT,dp); |
| 5018 | } |
| 5019 | |
| 5020 | |
| 5021 | int pvr2_hdw_gpio_get_in(struct pvr2_hdw *hdw,u32 *dp) |
| 5022 | { |
| 5023 | return pvr2_read_register(hdw,PVR2_GPIO_IN,dp); |
| 5024 | } |
| 5025 | |
| 5026 | |
| 5027 | int pvr2_hdw_gpio_chg_dir(struct pvr2_hdw *hdw,u32 msk,u32 val) |
| 5028 | { |
| 5029 | u32 cval,nval; |
| 5030 | int ret; |
| 5031 | if (~msk) { |
| 5032 | ret = pvr2_read_register(hdw,PVR2_GPIO_DIR,&cval); |
| 5033 | if (ret) return ret; |
| 5034 | nval = (cval & ~msk) | (val & msk); |
| 5035 | pvr2_trace(PVR2_TRACE_GPIO, |
| 5036 | "GPIO direction changing 0x%x:0x%x" |
| 5037 | " from 0x%x to 0x%x", |
| 5038 | msk,val,cval,nval); |
| 5039 | } else { |
| 5040 | nval = val; |
| 5041 | pvr2_trace(PVR2_TRACE_GPIO, |
| 5042 | "GPIO direction changing to 0x%x",nval); |
| 5043 | } |
| 5044 | return pvr2_write_register(hdw,PVR2_GPIO_DIR,nval); |
| 5045 | } |
| 5046 | |
| 5047 | |
| 5048 | int pvr2_hdw_gpio_chg_out(struct pvr2_hdw *hdw,u32 msk,u32 val) |
| 5049 | { |
| 5050 | u32 cval,nval; |
| 5051 | int ret; |
| 5052 | if (~msk) { |
| 5053 | ret = pvr2_read_register(hdw,PVR2_GPIO_OUT,&cval); |
| 5054 | if (ret) return ret; |
| 5055 | nval = (cval & ~msk) | (val & msk); |
| 5056 | pvr2_trace(PVR2_TRACE_GPIO, |
| 5057 | "GPIO output changing 0x%x:0x%x from 0x%x to 0x%x", |
| 5058 | msk,val,cval,nval); |
| 5059 | } else { |
| 5060 | nval = val; |
| 5061 | pvr2_trace(PVR2_TRACE_GPIO, |
| 5062 | "GPIO output changing to 0x%x",nval); |
| 5063 | } |
| 5064 | return pvr2_write_register(hdw,PVR2_GPIO_OUT,nval); |
| 5065 | } |
| 5066 | |
| 5067 | |
Mike Isely | a51f500 | 2009-03-06 23:30:37 -0300 | [diff] [blame] | 5068 | void pvr2_hdw_status_poll(struct pvr2_hdw *hdw) |
| 5069 | { |
Mike Isely | 40f0711 | 2009-03-07 00:08:17 -0300 | [diff] [blame] | 5070 | struct v4l2_tuner *vtp = &hdw->tuner_signal_info; |
| 5071 | memset(vtp, 0, sizeof(*vtp)); |
Mike Isely | 2641df3 | 2009-03-07 00:13:25 -0300 | [diff] [blame] | 5072 | hdw->tuner_signal_stale = 0; |
Mike Isely | a51f500 | 2009-03-06 23:30:37 -0300 | [diff] [blame] | 5073 | pvr2_i2c_core_status_poll(hdw); |
Mike Isely | 40f0711 | 2009-03-07 00:08:17 -0300 | [diff] [blame] | 5074 | /* Note: There apparently is no replacement for VIDIOC_CROPCAP |
| 5075 | using v4l2-subdev - therefore we can't support that AT ALL right |
| 5076 | now. (Of course, no sub-drivers seem to implement it either. |
| 5077 | But now it's a a chicken and egg problem...) */ |
| 5078 | v4l2_device_call_all(&hdw->v4l2_dev, 0, tuner, g_tuner, |
| 5079 | &hdw->tuner_signal_info); |
Mike Isely | 2641df3 | 2009-03-07 00:13:25 -0300 | [diff] [blame] | 5080 | pvr2_trace(PVR2_TRACE_CHIPS, "subdev status poll" |
Mike Isely | 40f0711 | 2009-03-07 00:08:17 -0300 | [diff] [blame] | 5081 | " type=%u strength=%u audio=0x%x cap=0x%x" |
| 5082 | " low=%u hi=%u", |
| 5083 | vtp->type, |
| 5084 | vtp->signal, vtp->rxsubchans, vtp->capability, |
| 5085 | vtp->rangelow, vtp->rangehigh); |
Mike Isely | 2641df3 | 2009-03-07 00:13:25 -0300 | [diff] [blame] | 5086 | |
| 5087 | /* We have to do this to avoid getting into constant polling if |
| 5088 | there's nobody to answer a poll of cropcap info. */ |
| 5089 | hdw->cropcap_stale = 0; |
Mike Isely | a51f500 | 2009-03-06 23:30:37 -0300 | [diff] [blame] | 5090 | } |
| 5091 | |
| 5092 | |
Mike Isely | 7fb20fa | 2008-04-22 14:45:37 -0300 | [diff] [blame] | 5093 | unsigned int pvr2_hdw_get_input_available(struct pvr2_hdw *hdw) |
| 5094 | { |
| 5095 | return hdw->input_avail_mask; |
| 5096 | } |
| 5097 | |
| 5098 | |
Mike Isely | 1cb03b7 | 2008-04-21 03:47:43 -0300 | [diff] [blame] | 5099 | unsigned int pvr2_hdw_get_input_allowed(struct pvr2_hdw *hdw) |
| 5100 | { |
| 5101 | return hdw->input_allowed_mask; |
| 5102 | } |
| 5103 | |
| 5104 | |
| 5105 | static int pvr2_hdw_set_input(struct pvr2_hdw *hdw,int v) |
| 5106 | { |
| 5107 | if (hdw->input_val != v) { |
| 5108 | hdw->input_val = v; |
| 5109 | hdw->input_dirty = !0; |
| 5110 | } |
| 5111 | |
| 5112 | /* Handle side effects - if we switch to a mode that needs the RF |
| 5113 | tuner, then select the right frequency choice as well and mark |
| 5114 | it dirty. */ |
| 5115 | if (hdw->input_val == PVR2_CVAL_INPUT_RADIO) { |
| 5116 | hdw->freqSelector = 0; |
| 5117 | hdw->freqDirty = !0; |
| 5118 | } else if ((hdw->input_val == PVR2_CVAL_INPUT_TV) || |
| 5119 | (hdw->input_val == PVR2_CVAL_INPUT_DTV)) { |
| 5120 | hdw->freqSelector = 1; |
| 5121 | hdw->freqDirty = !0; |
| 5122 | } |
| 5123 | return 0; |
| 5124 | } |
| 5125 | |
| 5126 | |
| 5127 | int pvr2_hdw_set_input_allowed(struct pvr2_hdw *hdw, |
| 5128 | unsigned int change_mask, |
| 5129 | unsigned int change_val) |
| 5130 | { |
| 5131 | int ret = 0; |
| 5132 | unsigned int nv,m,idx; |
| 5133 | LOCK_TAKE(hdw->big_lock); |
| 5134 | do { |
| 5135 | nv = hdw->input_allowed_mask & ~change_mask; |
| 5136 | nv |= (change_val & change_mask); |
| 5137 | nv &= hdw->input_avail_mask; |
| 5138 | if (!nv) { |
| 5139 | /* No legal modes left; return error instead. */ |
| 5140 | ret = -EPERM; |
| 5141 | break; |
| 5142 | } |
| 5143 | hdw->input_allowed_mask = nv; |
| 5144 | if ((1 << hdw->input_val) & hdw->input_allowed_mask) { |
| 5145 | /* Current mode is still in the allowed mask, so |
| 5146 | we're done. */ |
| 5147 | break; |
| 5148 | } |
| 5149 | /* Select and switch to a mode that is still in the allowed |
| 5150 | mask */ |
| 5151 | if (!hdw->input_allowed_mask) { |
| 5152 | /* Nothing legal; give up */ |
| 5153 | break; |
| 5154 | } |
| 5155 | m = hdw->input_allowed_mask; |
| 5156 | for (idx = 0; idx < (sizeof(m) << 3); idx++) { |
| 5157 | if (!((1 << idx) & m)) continue; |
| 5158 | pvr2_hdw_set_input(hdw,idx); |
| 5159 | break; |
| 5160 | } |
| 5161 | } while (0); |
| 5162 | LOCK_GIVE(hdw->big_lock); |
| 5163 | return ret; |
| 5164 | } |
| 5165 | |
| 5166 | |
Mike Isely | e61b6fc | 2006-07-18 22:42:18 -0300 | [diff] [blame] | 5167 | /* Find I2C address of eeprom */ |
Adrian Bunk | 07e337e | 2006-06-30 11:30:20 -0300 | [diff] [blame] | 5168 | static int pvr2_hdw_get_eeprom_addr(struct pvr2_hdw *hdw) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 5169 | { |
| 5170 | int result; |
| 5171 | LOCK_TAKE(hdw->ctl_lock); do { |
Michael Krufky | 8d36436 | 2007-01-22 02:17:55 -0300 | [diff] [blame] | 5172 | hdw->cmd_buffer[0] = FX2CMD_GET_EEPROM_ADDR; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 5173 | result = pvr2_send_request(hdw, |
| 5174 | hdw->cmd_buffer,1, |
| 5175 | hdw->cmd_buffer,1); |
| 5176 | if (result < 0) break; |
| 5177 | result = hdw->cmd_buffer[0]; |
| 5178 | } while(0); LOCK_GIVE(hdw->ctl_lock); |
| 5179 | return result; |
| 5180 | } |
| 5181 | |
| 5182 | |
Mike Isely | 32ffa9a | 2006-09-23 22:26:52 -0300 | [diff] [blame] | 5183 | int pvr2_hdw_register_access(struct pvr2_hdw *hdw, |
Hans Verkuil | aecde8b5 | 2008-12-30 07:14:19 -0300 | [diff] [blame] | 5184 | struct v4l2_dbg_match *match, u64 reg_id, |
| 5185 | int setFl, u64 *val_ptr) |
Mike Isely | 32ffa9a | 2006-09-23 22:26:52 -0300 | [diff] [blame] | 5186 | { |
| 5187 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
Mike Isely | 32ffa9a | 2006-09-23 22:26:52 -0300 | [diff] [blame] | 5188 | struct pvr2_i2c_client *cp; |
Hans Verkuil | aecde8b5 | 2008-12-30 07:14:19 -0300 | [diff] [blame] | 5189 | struct v4l2_dbg_register req; |
Mike Isely | 6d98816 | 2006-09-28 17:53:49 -0300 | [diff] [blame] | 5190 | int stat = 0; |
| 5191 | int okFl = 0; |
Mike Isely | 32ffa9a | 2006-09-23 22:26:52 -0300 | [diff] [blame] | 5192 | |
Mike Isely | 201f5c9 | 2007-01-28 16:08:36 -0300 | [diff] [blame] | 5193 | if (!capable(CAP_SYS_ADMIN)) return -EPERM; |
| 5194 | |
Hans Verkuil | aecde8b5 | 2008-12-30 07:14:19 -0300 | [diff] [blame] | 5195 | req.match = *match; |
Mike Isely | 32ffa9a | 2006-09-23 22:26:52 -0300 | [diff] [blame] | 5196 | req.reg = reg_id; |
| 5197 | if (setFl) req.val = *val_ptr; |
Mike Isely | d8f5b9b | 2009-03-07 00:05:00 -0300 | [diff] [blame] | 5198 | /* It would be nice to know if a sub-device answered the request */ |
| 5199 | v4l2_device_call_all(&hdw->v4l2_dev, 0, core, g_register, &req); |
| 5200 | if (!setFl) *val_ptr = req.val; |
| 5201 | if (!okFl) mutex_lock(&hdw->i2c_list_lock); do { |
Trent Piepho | e77e2c2 | 2007-10-10 05:37:42 -0300 | [diff] [blame] | 5202 | list_for_each_entry(cp, &hdw->i2c_clients, list) { |
Mike Isely | 8481a75 | 2007-04-27 12:31:31 -0300 | [diff] [blame] | 5203 | if (!v4l2_chip_match_i2c_client( |
| 5204 | cp->client, |
Hans Verkuil | aecde8b5 | 2008-12-30 07:14:19 -0300 | [diff] [blame] | 5205 | &req.match)) { |
Hans Verkuil | f3d092b | 2007-02-23 20:55:14 -0300 | [diff] [blame] | 5206 | continue; |
| 5207 | } |
Mike Isely | 32ffa9a | 2006-09-23 22:26:52 -0300 | [diff] [blame] | 5208 | stat = pvr2_i2c_client_cmd( |
Trent Piepho | 52ebc76 | 2007-01-23 22:38:13 -0300 | [diff] [blame] | 5209 | cp,(setFl ? VIDIOC_DBG_S_REGISTER : |
| 5210 | VIDIOC_DBG_G_REGISTER),&req); |
Mike Isely | 32ffa9a | 2006-09-23 22:26:52 -0300 | [diff] [blame] | 5211 | if (!setFl) *val_ptr = req.val; |
Mike Isely | 6d98816 | 2006-09-28 17:53:49 -0300 | [diff] [blame] | 5212 | okFl = !0; |
| 5213 | break; |
Mike Isely | 32ffa9a | 2006-09-23 22:26:52 -0300 | [diff] [blame] | 5214 | } |
| 5215 | } while (0); mutex_unlock(&hdw->i2c_list_lock); |
Mike Isely | 6d98816 | 2006-09-28 17:53:49 -0300 | [diff] [blame] | 5216 | if (okFl) { |
| 5217 | return stat; |
| 5218 | } |
Mike Isely | 32ffa9a | 2006-09-23 22:26:52 -0300 | [diff] [blame] | 5219 | return -EINVAL; |
| 5220 | #else |
| 5221 | return -ENOSYS; |
| 5222 | #endif |
| 5223 | } |
| 5224 | |
| 5225 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 5226 | /* |
| 5227 | Stuff for Emacs to see, in order to encourage consistent editing style: |
| 5228 | *** Local Variables: *** |
| 5229 | *** mode: c *** |
| 5230 | *** fill-column: 75 *** |
| 5231 | *** tab-width: 8 *** |
| 5232 | *** c-basic-offset: 8 *** |
| 5233 | *** End: *** |
| 5234 | */ |