Yoshihiro Shimoda | cbe9da0 | 2008-07-16 20:21:09 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Renesas Technology Corp. R0P7785LC0011RL Support. |
| 3 | * |
| 4 | * Copyright (C) 2008 Yoshihiro Shimoda |
Paul Mundt | a77b5ac | 2009-05-13 17:55:00 +0900 | [diff] [blame] | 5 | * Copyright (C) 2009 Paul Mundt |
Yoshihiro Shimoda | cbe9da0 | 2008-07-16 20:21:09 +0900 | [diff] [blame] | 6 | * |
| 7 | * This file is subject to the terms and conditions of the GNU General Public |
| 8 | * License. See the file "COPYING" in the main directory of this archive |
| 9 | * for more details. |
| 10 | */ |
Yoshihiro Shimoda | cbe9da0 | 2008-07-16 20:21:09 +0900 | [diff] [blame] | 11 | #include <linux/init.h> |
| 12 | #include <linux/platform_device.h> |
| 13 | #include <linux/sm501.h> |
| 14 | #include <linux/sm501-regs.h> |
| 15 | #include <linux/fb.h> |
| 16 | #include <linux/mtd/physmap.h> |
| 17 | #include <linux/delay.h> |
Yoshihiro Shimoda | 5a62a22 | 2009-05-26 09:33:02 +0000 | [diff] [blame] | 18 | #include <linux/interrupt.h> |
Yoshihiro Shimoda | cbe9da0 | 2008-07-16 20:21:09 +0900 | [diff] [blame] | 19 | #include <linux/i2c.h> |
| 20 | #include <linux/i2c-pca-platform.h> |
| 21 | #include <linux/i2c-algo-pca.h> |
Yoshihiro Shimoda | 5a62a22 | 2009-05-26 09:33:02 +0000 | [diff] [blame] | 22 | #include <linux/usb/r8a66597.h> |
Paul Mundt | 604437f | 2009-01-09 15:11:58 +0900 | [diff] [blame] | 23 | #include <linux/irq.h> |
Paul Mundt | d57d640 | 2010-01-19 13:34:38 +0900 | [diff] [blame] | 24 | #include <linux/io.h> |
Paul Mundt | a77b5ac | 2009-05-13 17:55:00 +0900 | [diff] [blame] | 25 | #include <linux/clk.h> |
| 26 | #include <linux/errno.h> |
Paul Mundt | 7639a45 | 2008-10-20 13:02:48 +0900 | [diff] [blame] | 27 | #include <mach/sh7785lcr.h> |
Yoshihiro Shimoda | 5a62a22 | 2009-05-26 09:33:02 +0000 | [diff] [blame] | 28 | #include <cpu/sh7785.h> |
Paul Mundt | a77b5ac | 2009-05-13 17:55:00 +0900 | [diff] [blame] | 29 | #include <asm/heartbeat.h> |
| 30 | #include <asm/clock.h> |
Yoshihiro Shimoda | cbe9da0 | 2008-07-16 20:21:09 +0900 | [diff] [blame] | 31 | |
| 32 | /* |
| 33 | * NOTE: This board has 2 physical memory maps. |
| 34 | * Please look at include/asm-sh/sh7785lcr.h or hardware manual. |
| 35 | */ |
Paul Mundt | a09d283 | 2010-01-15 12:24:34 +0900 | [diff] [blame] | 36 | static struct resource heartbeat_resource = { |
| 37 | .start = PLD_LEDCR, |
| 38 | .end = PLD_LEDCR, |
| 39 | .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT, |
Yoshihiro Shimoda | cbe9da0 | 2008-07-16 20:21:09 +0900 | [diff] [blame] | 40 | }; |
| 41 | |
| 42 | static struct platform_device heartbeat_device = { |
| 43 | .name = "heartbeat", |
| 44 | .id = -1, |
Paul Mundt | a09d283 | 2010-01-15 12:24:34 +0900 | [diff] [blame] | 45 | .num_resources = 1, |
| 46 | .resource = &heartbeat_resource, |
Yoshihiro Shimoda | cbe9da0 | 2008-07-16 20:21:09 +0900 | [diff] [blame] | 47 | }; |
| 48 | |
| 49 | static struct mtd_partition nor_flash_partitions[] = { |
| 50 | { |
| 51 | .name = "loader", |
| 52 | .offset = 0x00000000, |
| 53 | .size = 512 * 1024, |
| 54 | }, |
| 55 | { |
| 56 | .name = "bootenv", |
| 57 | .offset = MTDPART_OFS_APPEND, |
| 58 | .size = 512 * 1024, |
| 59 | }, |
| 60 | { |
| 61 | .name = "kernel", |
| 62 | .offset = MTDPART_OFS_APPEND, |
| 63 | .size = 4 * 1024 * 1024, |
| 64 | }, |
| 65 | { |
| 66 | .name = "data", |
| 67 | .offset = MTDPART_OFS_APPEND, |
| 68 | .size = MTDPART_SIZ_FULL, |
| 69 | }, |
| 70 | }; |
| 71 | |
| 72 | static struct physmap_flash_data nor_flash_data = { |
| 73 | .width = 4, |
| 74 | .parts = nor_flash_partitions, |
| 75 | .nr_parts = ARRAY_SIZE(nor_flash_partitions), |
| 76 | }; |
| 77 | |
| 78 | static struct resource nor_flash_resources[] = { |
| 79 | [0] = { |
| 80 | .start = NOR_FLASH_ADDR, |
| 81 | .end = NOR_FLASH_ADDR + NOR_FLASH_SIZE - 1, |
| 82 | .flags = IORESOURCE_MEM, |
| 83 | } |
| 84 | }; |
| 85 | |
| 86 | static struct platform_device nor_flash_device = { |
| 87 | .name = "physmap-flash", |
| 88 | .dev = { |
| 89 | .platform_data = &nor_flash_data, |
| 90 | }, |
| 91 | .num_resources = ARRAY_SIZE(nor_flash_resources), |
| 92 | .resource = nor_flash_resources, |
| 93 | }; |
| 94 | |
Yoshihiro Shimoda | 5a62a22 | 2009-05-26 09:33:02 +0000 | [diff] [blame] | 95 | static struct r8a66597_platdata r8a66597_data = { |
| 96 | .xtal = R8A66597_PLATDATA_XTAL_12MHZ, |
| 97 | .vif = 1, |
| 98 | }; |
| 99 | |
Yoshihiro Shimoda | cbe9da0 | 2008-07-16 20:21:09 +0900 | [diff] [blame] | 100 | static struct resource r8a66597_usb_host_resources[] = { |
| 101 | [0] = { |
Yoshihiro Shimoda | cbe9da0 | 2008-07-16 20:21:09 +0900 | [diff] [blame] | 102 | .start = R8A66597_ADDR, |
| 103 | .end = R8A66597_ADDR + R8A66597_SIZE - 1, |
| 104 | .flags = IORESOURCE_MEM, |
| 105 | }, |
| 106 | [1] = { |
Yoshihiro Shimoda | cbe9da0 | 2008-07-16 20:21:09 +0900 | [diff] [blame] | 107 | .start = 2, |
| 108 | .end = 2, |
Yoshihiro Shimoda | 5a62a22 | 2009-05-26 09:33:02 +0000 | [diff] [blame] | 109 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, |
Yoshihiro Shimoda | cbe9da0 | 2008-07-16 20:21:09 +0900 | [diff] [blame] | 110 | }, |
| 111 | }; |
| 112 | |
| 113 | static struct platform_device r8a66597_usb_host_device = { |
| 114 | .name = "r8a66597_hcd", |
| 115 | .id = -1, |
| 116 | .dev = { |
| 117 | .dma_mask = NULL, |
| 118 | .coherent_dma_mask = 0xffffffff, |
Yoshihiro Shimoda | 5a62a22 | 2009-05-26 09:33:02 +0000 | [diff] [blame] | 119 | .platform_data = &r8a66597_data, |
Yoshihiro Shimoda | cbe9da0 | 2008-07-16 20:21:09 +0900 | [diff] [blame] | 120 | }, |
| 121 | .num_resources = ARRAY_SIZE(r8a66597_usb_host_resources), |
| 122 | .resource = r8a66597_usb_host_resources, |
| 123 | }; |
| 124 | |
| 125 | static struct resource sm501_resources[] = { |
| 126 | [0] = { |
| 127 | .start = SM107_MEM_ADDR, |
| 128 | .end = SM107_MEM_ADDR + SM107_MEM_SIZE - 1, |
| 129 | .flags = IORESOURCE_MEM, |
| 130 | }, |
| 131 | [1] = { |
| 132 | .start = SM107_REG_ADDR, |
| 133 | .end = SM107_REG_ADDR + SM107_REG_SIZE - 1, |
| 134 | .flags = IORESOURCE_MEM, |
| 135 | }, |
| 136 | [2] = { |
| 137 | .start = 10, |
| 138 | .flags = IORESOURCE_IRQ, |
| 139 | }, |
| 140 | }; |
| 141 | |
| 142 | static struct fb_videomode sm501_default_mode_crt = { |
| 143 | .pixclock = 35714, /* 28MHz */ |
| 144 | .xres = 640, |
| 145 | .yres = 480, |
| 146 | .left_margin = 105, |
| 147 | .right_margin = 16, |
| 148 | .upper_margin = 33, |
| 149 | .lower_margin = 10, |
| 150 | .hsync_len = 39, |
| 151 | .vsync_len = 2, |
| 152 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, |
| 153 | }; |
| 154 | |
| 155 | static struct fb_videomode sm501_default_mode_pnl = { |
| 156 | .pixclock = 40000, /* 25MHz */ |
| 157 | .xres = 640, |
| 158 | .yres = 480, |
| 159 | .left_margin = 2, |
| 160 | .right_margin = 16, |
| 161 | .upper_margin = 33, |
| 162 | .lower_margin = 10, |
| 163 | .hsync_len = 39, |
| 164 | .vsync_len = 2, |
| 165 | .sync = 0, |
| 166 | }; |
| 167 | |
| 168 | static struct sm501_platdata_fbsub sm501_pdata_fbsub_pnl = { |
| 169 | .def_bpp = 16, |
| 170 | .def_mode = &sm501_default_mode_pnl, |
| 171 | .flags = SM501FB_FLAG_USE_INIT_MODE | |
| 172 | SM501FB_FLAG_USE_HWCURSOR | |
| 173 | SM501FB_FLAG_USE_HWACCEL | |
| 174 | SM501FB_FLAG_DISABLE_AT_EXIT | |
| 175 | SM501FB_FLAG_PANEL_NO_VBIASEN, |
| 176 | }; |
| 177 | |
| 178 | static struct sm501_platdata_fbsub sm501_pdata_fbsub_crt = { |
| 179 | .def_bpp = 16, |
| 180 | .def_mode = &sm501_default_mode_crt, |
| 181 | .flags = SM501FB_FLAG_USE_INIT_MODE | |
| 182 | SM501FB_FLAG_USE_HWCURSOR | |
| 183 | SM501FB_FLAG_USE_HWACCEL | |
| 184 | SM501FB_FLAG_DISABLE_AT_EXIT, |
| 185 | }; |
| 186 | |
| 187 | static struct sm501_platdata_fb sm501_fb_pdata = { |
| 188 | .fb_route = SM501_FB_OWN, |
| 189 | .fb_crt = &sm501_pdata_fbsub_crt, |
| 190 | .fb_pnl = &sm501_pdata_fbsub_pnl, |
| 191 | }; |
| 192 | |
| 193 | static struct sm501_initdata sm501_initdata = { |
| 194 | .gpio_high = { |
| 195 | .set = 0x00001fe0, |
| 196 | .mask = 0x0, |
| 197 | }, |
| 198 | .devices = 0, |
| 199 | .mclk = 84 * 1000000, |
| 200 | .m1xclk = 112 * 1000000, |
| 201 | }; |
| 202 | |
| 203 | static struct sm501_platdata sm501_platform_data = { |
| 204 | .init = &sm501_initdata, |
| 205 | .fb = &sm501_fb_pdata, |
| 206 | }; |
| 207 | |
| 208 | static struct platform_device sm501_device = { |
| 209 | .name = "sm501", |
| 210 | .id = -1, |
| 211 | .dev = { |
| 212 | .platform_data = &sm501_platform_data, |
| 213 | }, |
| 214 | .num_resources = ARRAY_SIZE(sm501_resources), |
| 215 | .resource = sm501_resources, |
| 216 | }; |
| 217 | |
Yoshihiro Shimoda | e79d574 | 2009-08-27 13:57:26 +0000 | [diff] [blame] | 218 | static struct resource i2c_proto_resources[] = { |
| 219 | [0] = { |
| 220 | .start = PCA9564_PROTO_32BIT_ADDR, |
| 221 | .end = PCA9564_PROTO_32BIT_ADDR + PCA9564_SIZE - 1, |
| 222 | .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT, |
| 223 | }, |
| 224 | [1] = { |
| 225 | .start = 12, |
| 226 | .end = 12, |
| 227 | .flags = IORESOURCE_IRQ, |
| 228 | }, |
| 229 | }; |
| 230 | |
Yoshihiro Shimoda | cbe9da0 | 2008-07-16 20:21:09 +0900 | [diff] [blame] | 231 | static struct resource i2c_resources[] = { |
| 232 | [0] = { |
| 233 | .start = PCA9564_ADDR, |
| 234 | .end = PCA9564_ADDR + PCA9564_SIZE - 1, |
| 235 | .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT, |
| 236 | }, |
| 237 | [1] = { |
| 238 | .start = 12, |
| 239 | .end = 12, |
| 240 | .flags = IORESOURCE_IRQ, |
| 241 | }, |
| 242 | }; |
| 243 | |
| 244 | static struct i2c_pca9564_pf_platform_data i2c_platform_data = { |
| 245 | .gpio = 0, |
| 246 | .i2c_clock_speed = I2C_PCA_CON_330kHz, |
Wolfram Sang | 8e99ada | 2009-03-28 21:34:45 +0100 | [diff] [blame] | 247 | .timeout = HZ, |
Yoshihiro Shimoda | cbe9da0 | 2008-07-16 20:21:09 +0900 | [diff] [blame] | 248 | }; |
| 249 | |
| 250 | static struct platform_device i2c_device = { |
| 251 | .name = "i2c-pca-platform", |
| 252 | .id = -1, |
| 253 | .dev = { |
| 254 | .platform_data = &i2c_platform_data, |
| 255 | }, |
| 256 | .num_resources = ARRAY_SIZE(i2c_resources), |
| 257 | .resource = i2c_resources, |
| 258 | }; |
| 259 | |
| 260 | static struct platform_device *sh7785lcr_devices[] __initdata = { |
| 261 | &heartbeat_device, |
| 262 | &nor_flash_device, |
| 263 | &r8a66597_usb_host_device, |
| 264 | &sm501_device, |
| 265 | &i2c_device, |
| 266 | }; |
| 267 | |
| 268 | static struct i2c_board_info __initdata sh7785lcr_i2c_devices[] = { |
| 269 | { |
| 270 | I2C_BOARD_INFO("r2025sd", 0x32), |
| 271 | }, |
| 272 | }; |
| 273 | |
| 274 | static int __init sh7785lcr_devices_setup(void) |
| 275 | { |
| 276 | i2c_register_board_info(0, sh7785lcr_i2c_devices, |
| 277 | ARRAY_SIZE(sh7785lcr_i2c_devices)); |
| 278 | |
Yoshihiro Shimoda | e79d574 | 2009-08-27 13:57:26 +0000 | [diff] [blame] | 279 | if (mach_is_sh7785lcr_pt()) { |
Paul Mundt | d1af119 | 2009-09-01 22:38:27 +0900 | [diff] [blame] | 280 | i2c_device.resource = i2c_proto_resources; |
Yoshihiro Shimoda | e79d574 | 2009-08-27 13:57:26 +0000 | [diff] [blame] | 281 | i2c_device.num_resources = ARRAY_SIZE(i2c_proto_resources); |
| 282 | } |
| 283 | |
Yoshihiro Shimoda | cbe9da0 | 2008-07-16 20:21:09 +0900 | [diff] [blame] | 284 | return platform_add_devices(sh7785lcr_devices, |
| 285 | ARRAY_SIZE(sh7785lcr_devices)); |
| 286 | } |
Nobuhiro Iwamatsu | 95d210c | 2011-01-07 03:02:15 +0000 | [diff] [blame] | 287 | device_initcall(sh7785lcr_devices_setup); |
Yoshihiro Shimoda | cbe9da0 | 2008-07-16 20:21:09 +0900 | [diff] [blame] | 288 | |
| 289 | /* Initialize IRQ setting */ |
| 290 | void __init init_sh7785lcr_IRQ(void) |
| 291 | { |
| 292 | plat_irq_setup_pins(IRQ_MODE_IRQ7654); |
| 293 | plat_irq_setup_pins(IRQ_MODE_IRQ3210); |
| 294 | } |
| 295 | |
Paul Mundt | a77b5ac | 2009-05-13 17:55:00 +0900 | [diff] [blame] | 296 | static int sh7785lcr_clk_init(void) |
| 297 | { |
| 298 | struct clk *clk; |
| 299 | int ret; |
| 300 | |
| 301 | clk = clk_get(NULL, "extal"); |
Paul Mundt | 7912825 | 2011-06-24 17:36:23 +0900 | [diff] [blame^] | 302 | if (IS_ERR(clk)) |
Paul Mundt | a77b5ac | 2009-05-13 17:55:00 +0900 | [diff] [blame] | 303 | return PTR_ERR(clk); |
| 304 | ret = clk_set_rate(clk, 33333333); |
| 305 | clk_put(clk); |
| 306 | |
| 307 | return ret; |
| 308 | } |
| 309 | |
Yoshihiro Shimoda | cbe9da0 | 2008-07-16 20:21:09 +0900 | [diff] [blame] | 310 | static void sh7785lcr_power_off(void) |
| 311 | { |
Yoshihiro Shimoda | df4d4f1 | 2009-03-10 15:50:44 +0900 | [diff] [blame] | 312 | unsigned char *p; |
| 313 | |
| 314 | p = ioremap(PLD_POFCR, PLD_POFCR + 1); |
| 315 | if (!p) { |
| 316 | printk(KERN_ERR "%s: ioremap error.\n", __func__); |
| 317 | return; |
| 318 | } |
| 319 | *p = 0x01; |
| 320 | iounmap(p); |
Magnus Damm | 600fa57 | 2009-03-11 08:14:26 +0000 | [diff] [blame] | 321 | set_bl_bit(); |
| 322 | while (1) |
| 323 | cpu_relax(); |
Yoshihiro Shimoda | cbe9da0 | 2008-07-16 20:21:09 +0900 | [diff] [blame] | 324 | } |
| 325 | |
| 326 | /* Initialize the board */ |
| 327 | static void __init sh7785lcr_setup(char **cmdline_p) |
| 328 | { |
| 329 | void __iomem *sm501_reg; |
| 330 | |
| 331 | printk(KERN_INFO "Renesas Technology Corp. R0P7785LC0011RL support.\n"); |
| 332 | |
| 333 | pm_power_off = sh7785lcr_power_off; |
| 334 | |
| 335 | /* sm501 DRAM configuration */ |
Paul Mundt | d57d640 | 2010-01-19 13:34:38 +0900 | [diff] [blame] | 336 | sm501_reg = ioremap_nocache(SM107_REG_ADDR, SM501_DRAM_CONTROL); |
Matt Fleming | 6f82b6e | 2009-11-05 08:01:10 +0000 | [diff] [blame] | 337 | if (!sm501_reg) { |
| 338 | printk(KERN_ERR "%s: ioremap error.\n", __func__); |
| 339 | return; |
| 340 | } |
| 341 | |
| 342 | writel(0x000307c2, sm501_reg + SM501_DRAM_CONTROL); |
Paul Mundt | d57d640 | 2010-01-19 13:34:38 +0900 | [diff] [blame] | 343 | iounmap(sm501_reg); |
Yoshihiro Shimoda | cbe9da0 | 2008-07-16 20:21:09 +0900 | [diff] [blame] | 344 | } |
| 345 | |
Magnus Damm | 63d12e2 | 2009-05-28 12:00:25 +0000 | [diff] [blame] | 346 | /* Return the board specific boot mode pin configuration */ |
| 347 | static int sh7785lcr_mode_pins(void) |
| 348 | { |
| 349 | int value = 0; |
| 350 | |
| 351 | /* These are the factory default settings of S1 and S2. |
| 352 | * If you change these dip switches then you will need to |
| 353 | * adjust the values below as well. |
| 354 | */ |
Magnus Damm | 0d4fdbb | 2009-06-02 09:22:02 +0000 | [diff] [blame] | 355 | value |= MODE_PIN4; /* Clock Mode 16 */ |
| 356 | value |= MODE_PIN5; /* 32-bit Area0 bus width */ |
| 357 | value |= MODE_PIN6; /* 32-bit Area0 bus width */ |
| 358 | value |= MODE_PIN7; /* Area 0 SRAM interface [fixed] */ |
| 359 | value |= MODE_PIN8; /* Little Endian */ |
| 360 | value |= MODE_PIN9; /* Master Mode */ |
| 361 | value |= MODE_PIN14; /* No PLL step-up */ |
Magnus Damm | 63d12e2 | 2009-05-28 12:00:25 +0000 | [diff] [blame] | 362 | |
| 363 | return value; |
| 364 | } |
| 365 | |
Yoshihiro Shimoda | cbe9da0 | 2008-07-16 20:21:09 +0900 | [diff] [blame] | 366 | /* |
| 367 | * The Machine Vector |
| 368 | */ |
| 369 | static struct sh_machine_vector mv_sh7785lcr __initmv = { |
| 370 | .mv_name = "SH7785LCR", |
| 371 | .mv_setup = sh7785lcr_setup, |
Paul Mundt | a77b5ac | 2009-05-13 17:55:00 +0900 | [diff] [blame] | 372 | .mv_clk_init = sh7785lcr_clk_init, |
Yoshihiro Shimoda | cbe9da0 | 2008-07-16 20:21:09 +0900 | [diff] [blame] | 373 | .mv_init_irq = init_sh7785lcr_IRQ, |
Magnus Damm | 63d12e2 | 2009-05-28 12:00:25 +0000 | [diff] [blame] | 374 | .mv_mode_pins = sh7785lcr_mode_pins, |
Yoshihiro Shimoda | cbe9da0 | 2008-07-16 20:21:09 +0900 | [diff] [blame] | 375 | }; |
| 376 | |