Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 1 | /* |
| 2 | * hdmi.c |
| 3 | * |
| 4 | * HDMI interface DSS driver setting for TI's OMAP4 family of processor. |
| 5 | * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/ |
| 6 | * Authors: Yong Zhi |
| 7 | * Mythri pk <mythripk@ti.com> |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify it |
| 10 | * under the terms of the GNU General Public License version 2 as published by |
| 11 | * the Free Software Foundation. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 14 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 15 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 16 | * more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License along with |
| 19 | * this program. If not, see <http://www.gnu.org/licenses/>. |
| 20 | */ |
| 21 | |
| 22 | #define DSS_SUBSYS_NAME "HDMI" |
| 23 | |
| 24 | #include <linux/kernel.h> |
| 25 | #include <linux/module.h> |
| 26 | #include <linux/err.h> |
| 27 | #include <linux/io.h> |
| 28 | #include <linux/interrupt.h> |
| 29 | #include <linux/mutex.h> |
| 30 | #include <linux/delay.h> |
| 31 | #include <linux/string.h> |
Tomi Valkeinen | 24e6289 | 2011-05-23 11:51:18 +0300 | [diff] [blame] | 32 | #include <linux/platform_device.h> |
Tomi Valkeinen | 4fbafaf | 2011-05-27 10:52:19 +0300 | [diff] [blame] | 33 | #include <linux/pm_runtime.h> |
| 34 | #include <linux/clk.h> |
Tomi Valkeinen | cca3501 | 2012-04-26 14:48:32 +0300 | [diff] [blame] | 35 | #include <linux/gpio.h> |
Tomi Valkeinen | 1748694 | 2012-08-15 15:55:04 +0300 | [diff] [blame] | 36 | #include <linux/regulator/consumer.h> |
Tomi Valkeinen | a0b38cc | 2011-05-11 14:05:07 +0300 | [diff] [blame] | 37 | #include <video/omapdss.h> |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 38 | |
Mythri P K | 94c5298 | 2011-09-08 19:06:21 +0530 | [diff] [blame] | 39 | #include "ti_hdmi.h" |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 40 | #include "dss.h" |
Ricardo Neri | ad44cc3 | 2011-05-18 22:31:56 -0500 | [diff] [blame] | 41 | #include "dss_features.h" |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 42 | |
Mythri P K | 95a8aeb | 2011-09-08 19:06:18 +0530 | [diff] [blame] | 43 | #define HDMI_WP 0x0 |
| 44 | #define HDMI_CORE_SYS 0x400 |
| 45 | #define HDMI_CORE_AV 0x900 |
| 46 | #define HDMI_PLLCTRL 0x200 |
| 47 | #define HDMI_PHY 0x300 |
| 48 | |
Mythri P K | 7c1f1ec | 2011-09-08 19:06:22 +0530 | [diff] [blame] | 49 | /* HDMI EDID Length move this */ |
| 50 | #define HDMI_EDID_MAX_LENGTH 256 |
| 51 | #define EDID_TIMING_DESCRIPTOR_SIZE 0x12 |
| 52 | #define EDID_DESCRIPTOR_BLOCK0_ADDRESS 0x36 |
| 53 | #define EDID_DESCRIPTOR_BLOCK1_ADDRESS 0x80 |
| 54 | #define EDID_SIZE_BLOCK0_TIMING_DESCRIPTOR 4 |
| 55 | #define EDID_SIZE_BLOCK1_TIMING_DESCRIPTOR 4 |
| 56 | |
Tomi Valkeinen | b44e458 | 2011-08-22 13:16:24 +0300 | [diff] [blame] | 57 | #define HDMI_DEFAULT_REGN 16 |
Tomi Valkeinen | 8d88767a | 2011-08-22 13:02:52 +0300 | [diff] [blame] | 58 | #define HDMI_DEFAULT_REGM2 1 |
| 59 | |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 60 | static struct { |
| 61 | struct mutex lock; |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 62 | struct platform_device *pdev; |
Ricardo Neri | 66a06b0 | 2012-11-06 00:19:14 -0600 | [diff] [blame] | 63 | |
Mythri P K | 95a8aeb | 2011-09-08 19:06:18 +0530 | [diff] [blame] | 64 | struct hdmi_ip_data ip_data; |
Tomi Valkeinen | 4fbafaf | 2011-05-27 10:52:19 +0300 | [diff] [blame] | 65 | |
| 66 | struct clk *sys_clk; |
Tomi Valkeinen | 1748694 | 2012-08-15 15:55:04 +0300 | [diff] [blame] | 67 | struct regulator *vdda_hdmi_dac_reg; |
Tomi Valkeinen | cca3501 | 2012-04-26 14:48:32 +0300 | [diff] [blame] | 68 | |
| 69 | int ct_cp_hpd_gpio; |
| 70 | int ls_oe_gpio; |
| 71 | int hpd_gpio; |
Archit Taneja | 81b87f5 | 2012-09-26 16:30:49 +0530 | [diff] [blame] | 72 | |
| 73 | struct omap_dss_output output; |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 74 | } hdmi; |
| 75 | |
| 76 | /* |
| 77 | * Logic for the below structure : |
| 78 | * user enters the CEA or VESA timings by specifying the HDMI/DVI code. |
| 79 | * There is a correspondence between CEA/VESA timing and code, please |
| 80 | * refer to section 6.3 in HDMI 1.3 specification for timing code. |
| 81 | * |
| 82 | * In the below structure, cea_vesa_timings corresponds to all OMAP4 |
| 83 | * supported CEA and VESA timing values.code_cea corresponds to the CEA |
| 84 | * code, It is used to get the timing from cea_vesa_timing array.Similarly |
| 85 | * with code_vesa. Code_index is used for back mapping, that is once EDID |
| 86 | * is read from the TV, EDID is parsed to find the timing values and then |
| 87 | * map it to corresponding CEA or VESA index. |
| 88 | */ |
| 89 | |
Mythri P K | 46095b2 | 2012-01-06 17:52:09 +0530 | [diff] [blame] | 90 | static const struct hdmi_config cea_timings[] = { |
Archit Taneja | cc937e5 | 2012-06-24 13:08:10 +0530 | [diff] [blame] | 91 | { |
| 92 | { 640, 480, 25200, 96, 16, 48, 2, 10, 33, |
| 93 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, |
| 94 | false, }, |
| 95 | { 1, HDMI_HDMI }, |
| 96 | }, |
| 97 | { |
| 98 | { 720, 480, 27027, 62, 16, 60, 6, 9, 30, |
| 99 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, |
| 100 | false, }, |
| 101 | { 2, HDMI_HDMI }, |
| 102 | }, |
| 103 | { |
| 104 | { 1280, 720, 74250, 40, 110, 220, 5, 5, 20, |
| 105 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
| 106 | false, }, |
| 107 | { 4, HDMI_HDMI }, |
| 108 | }, |
| 109 | { |
| 110 | { 1920, 540, 74250, 44, 88, 148, 5, 2, 15, |
| 111 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
| 112 | true, }, |
| 113 | { 5, HDMI_HDMI }, |
| 114 | }, |
| 115 | { |
| 116 | { 1440, 240, 27027, 124, 38, 114, 3, 4, 15, |
| 117 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, |
| 118 | true, }, |
| 119 | { 6, HDMI_HDMI }, |
| 120 | }, |
| 121 | { |
| 122 | { 1920, 1080, 148500, 44, 88, 148, 5, 4, 36, |
| 123 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
| 124 | false, }, |
| 125 | { 16, HDMI_HDMI }, |
| 126 | }, |
| 127 | { |
| 128 | { 720, 576, 27000, 64, 12, 68, 5, 5, 39, |
| 129 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, |
| 130 | false, }, |
| 131 | { 17, HDMI_HDMI }, |
| 132 | }, |
| 133 | { |
| 134 | { 1280, 720, 74250, 40, 440, 220, 5, 5, 20, |
| 135 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
| 136 | false, }, |
| 137 | { 19, HDMI_HDMI }, |
| 138 | }, |
| 139 | { |
| 140 | { 1920, 540, 74250, 44, 528, 148, 5, 2, 15, |
| 141 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
| 142 | true, }, |
| 143 | { 20, HDMI_HDMI }, |
| 144 | }, |
| 145 | { |
| 146 | { 1440, 288, 27000, 126, 24, 138, 3, 2, 19, |
| 147 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, |
| 148 | true, }, |
| 149 | { 21, HDMI_HDMI }, |
| 150 | }, |
| 151 | { |
| 152 | { 1440, 576, 54000, 128, 24, 136, 5, 5, 39, |
| 153 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, |
| 154 | false, }, |
| 155 | { 29, HDMI_HDMI }, |
| 156 | }, |
| 157 | { |
| 158 | { 1920, 1080, 148500, 44, 528, 148, 5, 4, 36, |
| 159 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
| 160 | false, }, |
| 161 | { 31, HDMI_HDMI }, |
| 162 | }, |
| 163 | { |
| 164 | { 1920, 1080, 74250, 44, 638, 148, 5, 4, 36, |
| 165 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
| 166 | false, }, |
| 167 | { 32, HDMI_HDMI }, |
| 168 | }, |
| 169 | { |
| 170 | { 2880, 480, 108108, 248, 64, 240, 6, 9, 30, |
| 171 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, |
| 172 | false, }, |
| 173 | { 35, HDMI_HDMI }, |
| 174 | }, |
| 175 | { |
| 176 | { 2880, 576, 108000, 256, 48, 272, 5, 5, 39, |
| 177 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, |
| 178 | false, }, |
| 179 | { 37, HDMI_HDMI }, |
| 180 | }, |
Mythri P K | 46095b2 | 2012-01-06 17:52:09 +0530 | [diff] [blame] | 181 | }; |
Archit Taneja | cc937e5 | 2012-06-24 13:08:10 +0530 | [diff] [blame] | 182 | |
Mythri P K | 46095b2 | 2012-01-06 17:52:09 +0530 | [diff] [blame] | 183 | static const struct hdmi_config vesa_timings[] = { |
Mythri P K | a05ce78 | 2012-01-06 17:52:08 +0530 | [diff] [blame] | 184 | /* VESA From Here */ |
Archit Taneja | cc937e5 | 2012-06-24 13:08:10 +0530 | [diff] [blame] | 185 | { |
| 186 | { 640, 480, 25175, 96, 16, 48, 2, 11, 31, |
| 187 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, |
| 188 | false, }, |
| 189 | { 4, HDMI_DVI }, |
| 190 | }, |
| 191 | { |
| 192 | { 800, 600, 40000, 128, 40, 88, 4, 1, 23, |
| 193 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
| 194 | false, }, |
| 195 | { 9, HDMI_DVI }, |
| 196 | }, |
| 197 | { |
| 198 | { 848, 480, 33750, 112, 16, 112, 8, 6, 23, |
| 199 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
| 200 | false, }, |
| 201 | { 0xE, HDMI_DVI }, |
| 202 | }, |
| 203 | { |
| 204 | { 1280, 768, 79500, 128, 64, 192, 7, 3, 20, |
| 205 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, |
| 206 | false, }, |
| 207 | { 0x17, HDMI_DVI }, |
| 208 | }, |
| 209 | { |
| 210 | { 1280, 800, 83500, 128, 72, 200, 6, 3, 22, |
| 211 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, |
| 212 | false, }, |
| 213 | { 0x1C, HDMI_DVI }, |
| 214 | }, |
| 215 | { |
| 216 | { 1360, 768, 85500, 112, 64, 256, 6, 3, 18, |
| 217 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
| 218 | false, }, |
| 219 | { 0x27, HDMI_DVI }, |
| 220 | }, |
| 221 | { |
| 222 | { 1280, 960, 108000, 112, 96, 312, 3, 1, 36, |
| 223 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
| 224 | false, }, |
| 225 | { 0x20, HDMI_DVI }, |
| 226 | }, |
| 227 | { |
| 228 | { 1280, 1024, 108000, 112, 48, 248, 3, 1, 38, |
| 229 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
| 230 | false, }, |
| 231 | { 0x23, HDMI_DVI }, |
| 232 | }, |
| 233 | { |
| 234 | { 1024, 768, 65000, 136, 24, 160, 6, 3, 29, |
| 235 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, |
| 236 | false, }, |
| 237 | { 0x10, HDMI_DVI }, |
| 238 | }, |
| 239 | { |
| 240 | { 1400, 1050, 121750, 144, 88, 232, 4, 3, 32, |
| 241 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, |
| 242 | false, }, |
| 243 | { 0x2A, HDMI_DVI }, |
| 244 | }, |
| 245 | { |
| 246 | { 1440, 900, 106500, 152, 80, 232, 6, 3, 25, |
| 247 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, |
| 248 | false, }, |
| 249 | { 0x2F, HDMI_DVI }, |
| 250 | }, |
| 251 | { |
| 252 | { 1680, 1050, 146250, 176 , 104, 280, 6, 3, 30, |
| 253 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, |
| 254 | false, }, |
| 255 | { 0x3A, HDMI_DVI }, |
| 256 | }, |
| 257 | { |
| 258 | { 1366, 768, 85500, 143, 70, 213, 3, 3, 24, |
| 259 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
| 260 | false, }, |
| 261 | { 0x51, HDMI_DVI }, |
| 262 | }, |
| 263 | { |
| 264 | { 1920, 1080, 148500, 44, 148, 80, 5, 4, 36, |
| 265 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
| 266 | false, }, |
| 267 | { 0x52, HDMI_DVI }, |
| 268 | }, |
| 269 | { |
| 270 | { 1280, 768, 68250, 32, 48, 80, 7, 3, 12, |
| 271 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, |
| 272 | false, }, |
| 273 | { 0x16, HDMI_DVI }, |
| 274 | }, |
| 275 | { |
| 276 | { 1400, 1050, 101000, 32, 48, 80, 4, 3, 23, |
| 277 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, |
| 278 | false, }, |
| 279 | { 0x29, HDMI_DVI }, |
| 280 | }, |
| 281 | { |
| 282 | { 1680, 1050, 119000, 32, 48, 80, 6, 3, 21, |
| 283 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, |
| 284 | false, }, |
| 285 | { 0x39, HDMI_DVI }, |
| 286 | }, |
| 287 | { |
| 288 | { 1280, 800, 79500, 32, 48, 80, 6, 3, 14, |
| 289 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, |
| 290 | false, }, |
| 291 | { 0x1B, HDMI_DVI }, |
| 292 | }, |
| 293 | { |
| 294 | { 1280, 720, 74250, 40, 110, 220, 5, 5, 20, |
| 295 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
| 296 | false, }, |
| 297 | { 0x55, HDMI_DVI }, |
| 298 | }, |
Tomi Valkeinen | 7a7ce2c | 2012-10-24 11:55:39 +0300 | [diff] [blame] | 299 | { |
| 300 | { 1920, 1200, 154000, 32, 48, 80, 6, 3, 26, |
| 301 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, |
| 302 | false, }, |
| 303 | { 0x44, HDMI_DVI }, |
| 304 | }, |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 305 | }; |
| 306 | |
Tomi Valkeinen | 4fbafaf | 2011-05-27 10:52:19 +0300 | [diff] [blame] | 307 | static int hdmi_runtime_get(void) |
| 308 | { |
| 309 | int r; |
| 310 | |
| 311 | DSSDBG("hdmi_runtime_get\n"); |
| 312 | |
| 313 | r = pm_runtime_get_sync(&hdmi.pdev->dev); |
| 314 | WARN_ON(r < 0); |
Archit Taneja | a247ce78 | 2012-02-10 11:45:52 +0530 | [diff] [blame] | 315 | if (r < 0) |
Tomi Valkeinen | 852f083 | 2012-02-17 17:58:04 +0200 | [diff] [blame] | 316 | return r; |
Archit Taneja | a247ce78 | 2012-02-10 11:45:52 +0530 | [diff] [blame] | 317 | |
| 318 | return 0; |
Tomi Valkeinen | 4fbafaf | 2011-05-27 10:52:19 +0300 | [diff] [blame] | 319 | } |
| 320 | |
| 321 | static void hdmi_runtime_put(void) |
| 322 | { |
| 323 | int r; |
| 324 | |
| 325 | DSSDBG("hdmi_runtime_put\n"); |
| 326 | |
Tomi Valkeinen | 0eaf9f5 | 2012-01-23 13:23:08 +0200 | [diff] [blame] | 327 | r = pm_runtime_put_sync(&hdmi.pdev->dev); |
Tomi Valkeinen | 5be3aeb | 2012-06-27 16:37:18 +0300 | [diff] [blame] | 328 | WARN_ON(r < 0 && r != -ENOSYS); |
Tomi Valkeinen | 4fbafaf | 2011-05-27 10:52:19 +0300 | [diff] [blame] | 329 | } |
| 330 | |
Tomi Valkeinen | e25001d | 2013-05-10 15:20:52 +0300 | [diff] [blame] | 331 | static int hdmi_init_regulator(void) |
| 332 | { |
| 333 | struct regulator *reg; |
| 334 | |
| 335 | if (hdmi.vdda_hdmi_dac_reg != NULL) |
| 336 | return 0; |
| 337 | |
| 338 | reg = devm_regulator_get(&hdmi.pdev->dev, "vdda_hdmi_dac"); |
| 339 | |
| 340 | /* DT HACK: try VDAC to make omapdss work for o4 sdp/panda */ |
| 341 | if (IS_ERR(reg)) |
| 342 | reg = devm_regulator_get(&hdmi.pdev->dev, "VDAC"); |
| 343 | |
| 344 | if (IS_ERR(reg)) { |
| 345 | DSSERR("can't get VDDA_HDMI_DAC regulator\n"); |
| 346 | return PTR_ERR(reg); |
| 347 | } |
| 348 | |
| 349 | hdmi.vdda_hdmi_dac_reg = reg; |
| 350 | |
| 351 | return 0; |
| 352 | } |
| 353 | |
Tomi Valkeinen | 17ae4e8 | 2013-04-26 14:48:43 +0300 | [diff] [blame] | 354 | static int hdmi_init_display(struct omap_dss_device *dssdev) |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 355 | { |
Tomi Valkeinen | cca3501 | 2012-04-26 14:48:32 +0300 | [diff] [blame] | 356 | int r; |
| 357 | |
| 358 | struct gpio gpios[] = { |
| 359 | { hdmi.ct_cp_hpd_gpio, GPIOF_OUT_INIT_LOW, "hdmi_ct_cp_hpd" }, |
| 360 | { hdmi.ls_oe_gpio, GPIOF_OUT_INIT_LOW, "hdmi_ls_oe" }, |
| 361 | { hdmi.hpd_gpio, GPIOF_DIR_IN, "hdmi_hpd" }, |
| 362 | }; |
| 363 | |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 364 | DSSDBG("init_display\n"); |
| 365 | |
Tomi Valkeinen | b2c7d54 | 2012-10-18 13:46:29 +0300 | [diff] [blame] | 366 | dss_init_hdmi_ip_ops(&hdmi.ip_data, omapdss_get_version()); |
Tomi Valkeinen | cca3501 | 2012-04-26 14:48:32 +0300 | [diff] [blame] | 367 | |
Tomi Valkeinen | e25001d | 2013-05-10 15:20:52 +0300 | [diff] [blame] | 368 | r = hdmi_init_regulator(); |
| 369 | if (r) |
| 370 | return r; |
Tomi Valkeinen | 1748694 | 2012-08-15 15:55:04 +0300 | [diff] [blame] | 371 | |
Tomi Valkeinen | cca3501 | 2012-04-26 14:48:32 +0300 | [diff] [blame] | 372 | r = gpio_request_array(gpios, ARRAY_SIZE(gpios)); |
| 373 | if (r) |
| 374 | return r; |
| 375 | |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 376 | return 0; |
| 377 | } |
| 378 | |
Ricardo Neri | 3758476 | 2012-11-06 21:37:14 -0600 | [diff] [blame] | 379 | static void hdmi_uninit_display(struct omap_dss_device *dssdev) |
Tomi Valkeinen | cca3501 | 2012-04-26 14:48:32 +0300 | [diff] [blame] | 380 | { |
| 381 | DSSDBG("uninit_display\n"); |
| 382 | |
| 383 | gpio_free(hdmi.ct_cp_hpd_gpio); |
| 384 | gpio_free(hdmi.ls_oe_gpio); |
| 385 | gpio_free(hdmi.hpd_gpio); |
| 386 | } |
| 387 | |
Mythri P K | 46095b2 | 2012-01-06 17:52:09 +0530 | [diff] [blame] | 388 | static const struct hdmi_config *hdmi_find_timing( |
| 389 | const struct hdmi_config *timings_arr, |
| 390 | int len) |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 391 | { |
Mythri P K | 46095b2 | 2012-01-06 17:52:09 +0530 | [diff] [blame] | 392 | int i; |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 393 | |
Mythri P K | 46095b2 | 2012-01-06 17:52:09 +0530 | [diff] [blame] | 394 | for (i = 0; i < len; i++) { |
Mythri P K | 9e4ed60 | 2012-01-06 17:52:10 +0530 | [diff] [blame] | 395 | if (timings_arr[i].cm.code == hdmi.ip_data.cfg.cm.code) |
Mythri P K | 46095b2 | 2012-01-06 17:52:09 +0530 | [diff] [blame] | 396 | return &timings_arr[i]; |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 397 | } |
Mythri P K | 46095b2 | 2012-01-06 17:52:09 +0530 | [diff] [blame] | 398 | return NULL; |
| 399 | } |
| 400 | |
| 401 | static const struct hdmi_config *hdmi_get_timings(void) |
| 402 | { |
| 403 | const struct hdmi_config *arr; |
| 404 | int len; |
| 405 | |
Mythri P K | 9e4ed60 | 2012-01-06 17:52:10 +0530 | [diff] [blame] | 406 | if (hdmi.ip_data.cfg.cm.mode == HDMI_DVI) { |
Mythri P K | 46095b2 | 2012-01-06 17:52:09 +0530 | [diff] [blame] | 407 | arr = vesa_timings; |
| 408 | len = ARRAY_SIZE(vesa_timings); |
| 409 | } else { |
| 410 | arr = cea_timings; |
| 411 | len = ARRAY_SIZE(cea_timings); |
| 412 | } |
| 413 | |
| 414 | return hdmi_find_timing(arr, len); |
| 415 | } |
| 416 | |
| 417 | static bool hdmi_timings_compare(struct omap_video_timings *timing1, |
Archit Taneja | cc937e5 | 2012-06-24 13:08:10 +0530 | [diff] [blame] | 418 | const struct omap_video_timings *timing2) |
Mythri P K | 46095b2 | 2012-01-06 17:52:09 +0530 | [diff] [blame] | 419 | { |
| 420 | int timing1_vsync, timing1_hsync, timing2_vsync, timing2_hsync; |
| 421 | |
Tomi Valkeinen | f236b89 | 2012-10-24 11:55:54 +0300 | [diff] [blame] | 422 | if ((DIV_ROUND_CLOSEST(timing2->pixel_clock, 1000) == |
| 423 | DIV_ROUND_CLOSEST(timing1->pixel_clock, 1000)) && |
Mythri P K | 46095b2 | 2012-01-06 17:52:09 +0530 | [diff] [blame] | 424 | (timing2->x_res == timing1->x_res) && |
| 425 | (timing2->y_res == timing1->y_res)) { |
| 426 | |
| 427 | timing2_hsync = timing2->hfp + timing2->hsw + timing2->hbp; |
| 428 | timing1_hsync = timing1->hfp + timing1->hsw + timing1->hbp; |
| 429 | timing2_vsync = timing2->vfp + timing2->vsw + timing2->vbp; |
| 430 | timing1_vsync = timing2->vfp + timing2->vsw + timing2->vbp; |
| 431 | |
| 432 | DSSDBG("timing1_hsync = %d timing1_vsync = %d"\ |
| 433 | "timing2_hsync = %d timing2_vsync = %d\n", |
| 434 | timing1_hsync, timing1_vsync, |
| 435 | timing2_hsync, timing2_vsync); |
| 436 | |
| 437 | if ((timing1_hsync == timing2_hsync) && |
| 438 | (timing1_vsync == timing2_vsync)) { |
| 439 | return true; |
| 440 | } |
| 441 | } |
| 442 | return false; |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 443 | } |
| 444 | |
| 445 | static struct hdmi_cm hdmi_get_code(struct omap_video_timings *timing) |
| 446 | { |
Mythri P K | 46095b2 | 2012-01-06 17:52:09 +0530 | [diff] [blame] | 447 | int i; |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 448 | struct hdmi_cm cm = {-1}; |
| 449 | DSSDBG("hdmi_get_code\n"); |
| 450 | |
Mythri P K | 46095b2 | 2012-01-06 17:52:09 +0530 | [diff] [blame] | 451 | for (i = 0; i < ARRAY_SIZE(cea_timings); i++) { |
| 452 | if (hdmi_timings_compare(timing, &cea_timings[i].timings)) { |
| 453 | cm = cea_timings[i].cm; |
| 454 | goto end; |
| 455 | } |
| 456 | } |
| 457 | for (i = 0; i < ARRAY_SIZE(vesa_timings); i++) { |
| 458 | if (hdmi_timings_compare(timing, &vesa_timings[i].timings)) { |
| 459 | cm = vesa_timings[i].cm; |
| 460 | goto end; |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 461 | } |
| 462 | } |
| 463 | |
Mythri P K | 46095b2 | 2012-01-06 17:52:09 +0530 | [diff] [blame] | 464 | end: return cm; |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 465 | |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 466 | } |
| 467 | |
Archit Taneja | c3dc6a7 | 2011-09-13 18:28:41 +0530 | [diff] [blame] | 468 | unsigned long hdmi_get_pixel_clock(void) |
| 469 | { |
| 470 | /* HDMI Pixel Clock in Mhz */ |
Mythri P K | a05ce78 | 2012-01-06 17:52:08 +0530 | [diff] [blame] | 471 | return hdmi.ip_data.cfg.timings.pixel_clock * 1000; |
Archit Taneja | c3dc6a7 | 2011-09-13 18:28:41 +0530 | [diff] [blame] | 472 | } |
| 473 | |
Archit Taneja | 6cb07b2 | 2011-04-12 13:52:25 +0530 | [diff] [blame] | 474 | static void hdmi_compute_pll(struct omap_dss_device *dssdev, int phy, |
| 475 | struct hdmi_pll_info *pi) |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 476 | { |
Archit Taneja | 6cb07b2 | 2011-04-12 13:52:25 +0530 | [diff] [blame] | 477 | unsigned long clkin, refclk; |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 478 | u32 mf; |
| 479 | |
Tomi Valkeinen | 4fbafaf | 2011-05-27 10:52:19 +0300 | [diff] [blame] | 480 | clkin = clk_get_rate(hdmi.sys_clk) / 10000; |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 481 | /* |
| 482 | * Input clock is predivided by N + 1 |
| 483 | * out put of which is reference clk |
| 484 | */ |
Tomi Valkeinen | 4fdfdf0 | 2013-02-12 15:15:21 +0200 | [diff] [blame] | 485 | |
| 486 | pi->regn = HDMI_DEFAULT_REGN; |
Tomi Valkeinen | 8d88767a | 2011-08-22 13:02:52 +0300 | [diff] [blame] | 487 | |
Tomi Valkeinen | b44e458 | 2011-08-22 13:16:24 +0300 | [diff] [blame] | 488 | refclk = clkin / pi->regn; |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 489 | |
Tomi Valkeinen | 4fdfdf0 | 2013-02-12 15:15:21 +0200 | [diff] [blame] | 490 | pi->regm2 = HDMI_DEFAULT_REGM2; |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 491 | |
| 492 | /* |
Mythri P K | dd2116a | 2012-02-21 12:10:58 +0530 | [diff] [blame] | 493 | * multiplier is pixel_clk/ref_clk |
| 494 | * Multiplying by 100 to avoid fractional part removal |
| 495 | */ |
| 496 | pi->regm = phy * pi->regm2 / refclk; |
| 497 | |
| 498 | /* |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 499 | * fractional multiplier is remainder of the difference between |
| 500 | * multiplier and actual phy(required pixel clock thus should be |
| 501 | * multiplied by 2^18(262144) divided by the reference clock |
| 502 | */ |
Mythri P K | dd2116a | 2012-02-21 12:10:58 +0530 | [diff] [blame] | 503 | mf = (phy - pi->regm / pi->regm2 * refclk) * 262144; |
| 504 | pi->regmf = pi->regm2 * mf / refclk; |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 505 | |
| 506 | /* |
| 507 | * Dcofreq should be set to 1 if required pixel clock |
| 508 | * is greater than 1000MHz |
| 509 | */ |
| 510 | pi->dcofreq = phy > 1000 * 100; |
Tomi Valkeinen | b44e458 | 2011-08-22 13:16:24 +0300 | [diff] [blame] | 511 | pi->regsd = ((pi->regm * clkin / 10) / (pi->regn * 250) + 5) / 10; |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 512 | |
Mythri P K | 7b27da5 | 2011-09-08 19:06:19 +0530 | [diff] [blame] | 513 | /* Set the reference clock to sysclk reference */ |
| 514 | pi->refsel = HDMI_REFSEL_SYSCLK; |
| 515 | |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 516 | DSSDBG("M = %d Mf = %d\n", pi->regm, pi->regmf); |
| 517 | DSSDBG("range = %d sd = %d\n", pi->dcofreq, pi->regsd); |
| 518 | } |
| 519 | |
Tomi Valkeinen | bb426fc9 | 2012-10-19 17:42:10 +0300 | [diff] [blame] | 520 | static int hdmi_power_on_core(struct omap_dss_device *dssdev) |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 521 | { |
Mythri P K | 46095b2 | 2012-01-06 17:52:09 +0530 | [diff] [blame] | 522 | int r; |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 523 | |
Tomi Valkeinen | cca3501 | 2012-04-26 14:48:32 +0300 | [diff] [blame] | 524 | gpio_set_value(hdmi.ct_cp_hpd_gpio, 1); |
| 525 | gpio_set_value(hdmi.ls_oe_gpio, 1); |
| 526 | |
Tomi Valkeinen | a84b20654b | 2012-04-26 14:58:41 +0300 | [diff] [blame] | 527 | /* wait 300us after CT_CP_HPD for the 5V power output to reach 90% */ |
| 528 | udelay(300); |
| 529 | |
Tomi Valkeinen | 1748694 | 2012-08-15 15:55:04 +0300 | [diff] [blame] | 530 | r = regulator_enable(hdmi.vdda_hdmi_dac_reg); |
| 531 | if (r) |
| 532 | goto err_vdac_enable; |
| 533 | |
Tomi Valkeinen | 4fbafaf | 2011-05-27 10:52:19 +0300 | [diff] [blame] | 534 | r = hdmi_runtime_get(); |
| 535 | if (r) |
Tomi Valkeinen | cca3501 | 2012-04-26 14:48:32 +0300 | [diff] [blame] | 536 | goto err_runtime_get; |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 537 | |
Tomi Valkeinen | bb426fc9 | 2012-10-19 17:42:10 +0300 | [diff] [blame] | 538 | /* Make selection of HDMI in DSS */ |
| 539 | dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK); |
| 540 | |
Tomi Valkeinen | bb426fc9 | 2012-10-19 17:42:10 +0300 | [diff] [blame] | 541 | return 0; |
| 542 | |
| 543 | err_runtime_get: |
| 544 | regulator_disable(hdmi.vdda_hdmi_dac_reg); |
| 545 | err_vdac_enable: |
| 546 | gpio_set_value(hdmi.ct_cp_hpd_gpio, 0); |
| 547 | gpio_set_value(hdmi.ls_oe_gpio, 0); |
| 548 | return r; |
| 549 | } |
| 550 | |
| 551 | static void hdmi_power_off_core(struct omap_dss_device *dssdev) |
| 552 | { |
| 553 | hdmi_runtime_put(); |
| 554 | regulator_disable(hdmi.vdda_hdmi_dac_reg); |
| 555 | gpio_set_value(hdmi.ct_cp_hpd_gpio, 0); |
| 556 | gpio_set_value(hdmi.ls_oe_gpio, 0); |
| 557 | } |
| 558 | |
| 559 | static int hdmi_power_on_full(struct omap_dss_device *dssdev) |
| 560 | { |
| 561 | int r; |
| 562 | struct omap_video_timings *p; |
Tomi Valkeinen | 7ae9a71 | 2013-05-10 15:27:07 +0300 | [diff] [blame^] | 563 | struct omap_overlay_manager *mgr = hdmi.output.manager; |
Tomi Valkeinen | bb426fc9 | 2012-10-19 17:42:10 +0300 | [diff] [blame] | 564 | unsigned long phy; |
| 565 | |
| 566 | r = hdmi_power_on_core(dssdev); |
| 567 | if (r) |
| 568 | return r; |
| 569 | |
Archit Taneja | cea87b9 | 2012-09-07 17:56:20 +0530 | [diff] [blame] | 570 | dss_mgr_disable(mgr); |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 571 | |
Archit Taneja | 7849398 | 2012-08-08 16:50:42 +0530 | [diff] [blame] | 572 | p = &hdmi.ip_data.cfg.timings; |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 573 | |
Archit Taneja | 7849398 | 2012-08-08 16:50:42 +0530 | [diff] [blame] | 574 | DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res); |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 575 | |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 576 | phy = p->pixel_clock; |
| 577 | |
Mythri P K | 7b27da5 | 2011-09-08 19:06:19 +0530 | [diff] [blame] | 578 | hdmi_compute_pll(dssdev, phy, &hdmi.ip_data.pll_data); |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 579 | |
Ricardo Neri | c0456be | 2012-04-27 13:48:45 -0500 | [diff] [blame] | 580 | hdmi.ip_data.ops->video_disable(&hdmi.ip_data); |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 581 | |
Mythri P K | 95a8aeb | 2011-09-08 19:06:18 +0530 | [diff] [blame] | 582 | /* config the PLL and PHY hdmi_set_pll_pwrfirst */ |
Mythri P K | 60634a2 | 2011-09-08 19:06:26 +0530 | [diff] [blame] | 583 | r = hdmi.ip_data.ops->pll_enable(&hdmi.ip_data); |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 584 | if (r) { |
| 585 | DSSDBG("Failed to lock PLL\n"); |
Tomi Valkeinen | cca3501 | 2012-04-26 14:48:32 +0300 | [diff] [blame] | 586 | goto err_pll_enable; |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 587 | } |
| 588 | |
Mythri P K | 60634a2 | 2011-09-08 19:06:26 +0530 | [diff] [blame] | 589 | r = hdmi.ip_data.ops->phy_enable(&hdmi.ip_data); |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 590 | if (r) { |
| 591 | DSSDBG("Failed to start PHY\n"); |
Ricardo Neri | d3b4aa5 | 2012-07-30 19:12:02 -0500 | [diff] [blame] | 592 | goto err_phy_enable; |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 593 | } |
| 594 | |
Mythri P K | 60634a2 | 2011-09-08 19:06:26 +0530 | [diff] [blame] | 595 | hdmi.ip_data.ops->video_configure(&hdmi.ip_data); |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 596 | |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 597 | /* bypass TV gamma table */ |
| 598 | dispc_enable_gamma_table(0); |
| 599 | |
| 600 | /* tv size */ |
Archit Taneja | cea87b9 | 2012-09-07 17:56:20 +0530 | [diff] [blame] | 601 | dss_mgr_set_timings(mgr, p); |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 602 | |
Ricardo Neri | c0456be | 2012-04-27 13:48:45 -0500 | [diff] [blame] | 603 | r = hdmi.ip_data.ops->video_enable(&hdmi.ip_data); |
| 604 | if (r) |
| 605 | goto err_vid_enable; |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 606 | |
Archit Taneja | cea87b9 | 2012-09-07 17:56:20 +0530 | [diff] [blame] | 607 | r = dss_mgr_enable(mgr); |
Tomi Valkeinen | 33ca237 | 2011-11-21 13:42:58 +0200 | [diff] [blame] | 608 | if (r) |
| 609 | goto err_mgr_enable; |
Tomi Valkeinen | 3870c90 | 2011-08-31 14:47:11 +0300 | [diff] [blame] | 610 | |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 611 | return 0; |
Tomi Valkeinen | 33ca237 | 2011-11-21 13:42:58 +0200 | [diff] [blame] | 612 | |
| 613 | err_mgr_enable: |
Ricardo Neri | c0456be | 2012-04-27 13:48:45 -0500 | [diff] [blame] | 614 | hdmi.ip_data.ops->video_disable(&hdmi.ip_data); |
| 615 | err_vid_enable: |
Tomi Valkeinen | 33ca237 | 2011-11-21 13:42:58 +0200 | [diff] [blame] | 616 | hdmi.ip_data.ops->phy_disable(&hdmi.ip_data); |
Ricardo Neri | d3b4aa5 | 2012-07-30 19:12:02 -0500 | [diff] [blame] | 617 | err_phy_enable: |
Tomi Valkeinen | 33ca237 | 2011-11-21 13:42:58 +0200 | [diff] [blame] | 618 | hdmi.ip_data.ops->pll_disable(&hdmi.ip_data); |
Tomi Valkeinen | cca3501 | 2012-04-26 14:48:32 +0300 | [diff] [blame] | 619 | err_pll_enable: |
Tomi Valkeinen | bb426fc9 | 2012-10-19 17:42:10 +0300 | [diff] [blame] | 620 | hdmi_power_off_core(dssdev); |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 621 | return -EIO; |
| 622 | } |
| 623 | |
Tomi Valkeinen | bb426fc9 | 2012-10-19 17:42:10 +0300 | [diff] [blame] | 624 | static void hdmi_power_off_full(struct omap_dss_device *dssdev) |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 625 | { |
Tomi Valkeinen | 7ae9a71 | 2013-05-10 15:27:07 +0300 | [diff] [blame^] | 626 | struct omap_overlay_manager *mgr = hdmi.output.manager; |
Archit Taneja | cea87b9 | 2012-09-07 17:56:20 +0530 | [diff] [blame] | 627 | |
| 628 | dss_mgr_disable(mgr); |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 629 | |
Ricardo Neri | c0456be | 2012-04-27 13:48:45 -0500 | [diff] [blame] | 630 | hdmi.ip_data.ops->video_disable(&hdmi.ip_data); |
Mythri P K | 60634a2 | 2011-09-08 19:06:26 +0530 | [diff] [blame] | 631 | hdmi.ip_data.ops->phy_disable(&hdmi.ip_data); |
| 632 | hdmi.ip_data.ops->pll_disable(&hdmi.ip_data); |
Tomi Valkeinen | cca3501 | 2012-04-26 14:48:32 +0300 | [diff] [blame] | 633 | |
Tomi Valkeinen | bb426fc9 | 2012-10-19 17:42:10 +0300 | [diff] [blame] | 634 | hdmi_power_off_core(dssdev); |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 635 | } |
| 636 | |
| 637 | int omapdss_hdmi_display_check_timing(struct omap_dss_device *dssdev, |
| 638 | struct omap_video_timings *timings) |
| 639 | { |
| 640 | struct hdmi_cm cm; |
| 641 | |
| 642 | cm = hdmi_get_code(timings); |
| 643 | if (cm.code == -1) { |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 644 | return -EINVAL; |
| 645 | } |
| 646 | |
| 647 | return 0; |
| 648 | |
| 649 | } |
| 650 | |
Archit Taneja | 7849398 | 2012-08-08 16:50:42 +0530 | [diff] [blame] | 651 | void omapdss_hdmi_display_set_timing(struct omap_dss_device *dssdev, |
| 652 | struct omap_video_timings *timings) |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 653 | { |
| 654 | struct hdmi_cm cm; |
Archit Taneja | 7849398 | 2012-08-08 16:50:42 +0530 | [diff] [blame] | 655 | const struct hdmi_config *t; |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 656 | |
Archit Taneja | ed1aa90 | 2012-08-15 00:40:31 +0530 | [diff] [blame] | 657 | mutex_lock(&hdmi.lock); |
| 658 | |
Archit Taneja | 7849398 | 2012-08-08 16:50:42 +0530 | [diff] [blame] | 659 | cm = hdmi_get_code(timings); |
| 660 | hdmi.ip_data.cfg.cm = cm; |
| 661 | |
| 662 | t = hdmi_get_timings(); |
| 663 | if (t != NULL) |
| 664 | hdmi.ip_data.cfg = *t; |
Tomi Valkeinen | fa70dc5 | 2011-08-22 14:57:33 +0300 | [diff] [blame] | 665 | |
Archit Taneja | ed1aa90 | 2012-08-15 00:40:31 +0530 | [diff] [blame] | 666 | mutex_unlock(&hdmi.lock); |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 667 | } |
| 668 | |
Tomi Valkeinen | e40402c | 2012-03-02 18:01:07 +0200 | [diff] [blame] | 669 | static void hdmi_dump_regs(struct seq_file *s) |
Mythri P K | 162874d | 2011-09-22 13:37:45 +0530 | [diff] [blame] | 670 | { |
| 671 | mutex_lock(&hdmi.lock); |
| 672 | |
Wei Yongjun | f8fb7d7 | 2012-10-21 20:54:26 +0800 | [diff] [blame] | 673 | if (hdmi_runtime_get()) { |
| 674 | mutex_unlock(&hdmi.lock); |
Mythri P K | 162874d | 2011-09-22 13:37:45 +0530 | [diff] [blame] | 675 | return; |
Wei Yongjun | f8fb7d7 | 2012-10-21 20:54:26 +0800 | [diff] [blame] | 676 | } |
Mythri P K | 162874d | 2011-09-22 13:37:45 +0530 | [diff] [blame] | 677 | |
| 678 | hdmi.ip_data.ops->dump_wrapper(&hdmi.ip_data, s); |
| 679 | hdmi.ip_data.ops->dump_pll(&hdmi.ip_data, s); |
| 680 | hdmi.ip_data.ops->dump_phy(&hdmi.ip_data, s); |
| 681 | hdmi.ip_data.ops->dump_core(&hdmi.ip_data, s); |
| 682 | |
| 683 | hdmi_runtime_put(); |
| 684 | mutex_unlock(&hdmi.lock); |
| 685 | } |
| 686 | |
Tomi Valkeinen | 4702456 | 2011-08-25 17:12:56 +0300 | [diff] [blame] | 687 | int omapdss_hdmi_read_edid(u8 *buf, int len) |
| 688 | { |
| 689 | int r; |
| 690 | |
| 691 | mutex_lock(&hdmi.lock); |
| 692 | |
| 693 | r = hdmi_runtime_get(); |
| 694 | BUG_ON(r); |
| 695 | |
| 696 | r = hdmi.ip_data.ops->read_edid(&hdmi.ip_data, buf, len); |
| 697 | |
| 698 | hdmi_runtime_put(); |
| 699 | mutex_unlock(&hdmi.lock); |
| 700 | |
| 701 | return r; |
| 702 | } |
| 703 | |
Tomi Valkeinen | 759593f | 2011-08-29 18:10:20 +0300 | [diff] [blame] | 704 | bool omapdss_hdmi_detect(void) |
| 705 | { |
| 706 | int r; |
| 707 | |
| 708 | mutex_lock(&hdmi.lock); |
| 709 | |
| 710 | r = hdmi_runtime_get(); |
| 711 | BUG_ON(r); |
| 712 | |
| 713 | r = hdmi.ip_data.ops->detect(&hdmi.ip_data); |
| 714 | |
| 715 | hdmi_runtime_put(); |
| 716 | mutex_unlock(&hdmi.lock); |
| 717 | |
| 718 | return r == 1; |
| 719 | } |
| 720 | |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 721 | int omapdss_hdmi_display_enable(struct omap_dss_device *dssdev) |
| 722 | { |
Tomi Valkeinen | 7ae9a71 | 2013-05-10 15:27:07 +0300 | [diff] [blame^] | 723 | struct omap_dss_output *out = &hdmi.output; |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 724 | int r = 0; |
| 725 | |
| 726 | DSSDBG("ENTER hdmi_display_enable\n"); |
| 727 | |
| 728 | mutex_lock(&hdmi.lock); |
| 729 | |
Archit Taneja | cea87b9 | 2012-09-07 17:56:20 +0530 | [diff] [blame] | 730 | if (out == NULL || out->manager == NULL) { |
| 731 | DSSERR("failed to enable display: no output/manager\n"); |
Tomi Valkeinen | 05e1d60 | 2011-06-23 16:38:21 +0300 | [diff] [blame] | 732 | r = -ENODEV; |
| 733 | goto err0; |
| 734 | } |
| 735 | |
Tomi Valkeinen | cca3501 | 2012-04-26 14:48:32 +0300 | [diff] [blame] | 736 | hdmi.ip_data.hpd_gpio = hdmi.hpd_gpio; |
Tomi Valkeinen | c49d005 | 2012-01-17 11:09:57 +0200 | [diff] [blame] | 737 | |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 738 | r = omap_dss_start_device(dssdev); |
| 739 | if (r) { |
| 740 | DSSERR("failed to start device\n"); |
| 741 | goto err0; |
| 742 | } |
| 743 | |
Tomi Valkeinen | bb426fc9 | 2012-10-19 17:42:10 +0300 | [diff] [blame] | 744 | r = hdmi_power_on_full(dssdev); |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 745 | if (r) { |
| 746 | DSSERR("failed to power on device\n"); |
Tomi Valkeinen | cca3501 | 2012-04-26 14:48:32 +0300 | [diff] [blame] | 747 | goto err1; |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 748 | } |
| 749 | |
| 750 | mutex_unlock(&hdmi.lock); |
| 751 | return 0; |
| 752 | |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 753 | err1: |
| 754 | omap_dss_stop_device(dssdev); |
| 755 | err0: |
| 756 | mutex_unlock(&hdmi.lock); |
| 757 | return r; |
| 758 | } |
| 759 | |
| 760 | void omapdss_hdmi_display_disable(struct omap_dss_device *dssdev) |
| 761 | { |
| 762 | DSSDBG("Enter hdmi_display_disable\n"); |
| 763 | |
| 764 | mutex_lock(&hdmi.lock); |
| 765 | |
Tomi Valkeinen | bb426fc9 | 2012-10-19 17:42:10 +0300 | [diff] [blame] | 766 | hdmi_power_off_full(dssdev); |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 767 | |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 768 | omap_dss_stop_device(dssdev); |
| 769 | |
| 770 | mutex_unlock(&hdmi.lock); |
| 771 | } |
| 772 | |
Tomi Valkeinen | 4489823 | 2012-10-19 17:42:27 +0300 | [diff] [blame] | 773 | int omapdss_hdmi_core_enable(struct omap_dss_device *dssdev) |
| 774 | { |
| 775 | int r = 0; |
| 776 | |
| 777 | DSSDBG("ENTER omapdss_hdmi_core_enable\n"); |
| 778 | |
| 779 | mutex_lock(&hdmi.lock); |
| 780 | |
| 781 | hdmi.ip_data.hpd_gpio = hdmi.hpd_gpio; |
| 782 | |
| 783 | r = hdmi_power_on_core(dssdev); |
| 784 | if (r) { |
| 785 | DSSERR("failed to power on device\n"); |
| 786 | goto err0; |
| 787 | } |
| 788 | |
| 789 | mutex_unlock(&hdmi.lock); |
| 790 | return 0; |
| 791 | |
| 792 | err0: |
| 793 | mutex_unlock(&hdmi.lock); |
| 794 | return r; |
| 795 | } |
| 796 | |
| 797 | void omapdss_hdmi_core_disable(struct omap_dss_device *dssdev) |
| 798 | { |
| 799 | DSSDBG("Enter omapdss_hdmi_core_disable\n"); |
| 800 | |
| 801 | mutex_lock(&hdmi.lock); |
| 802 | |
| 803 | hdmi_power_off_core(dssdev); |
| 804 | |
| 805 | mutex_unlock(&hdmi.lock); |
| 806 | } |
| 807 | |
Tomi Valkeinen | 4fbafaf | 2011-05-27 10:52:19 +0300 | [diff] [blame] | 808 | static int hdmi_get_clocks(struct platform_device *pdev) |
| 809 | { |
| 810 | struct clk *clk; |
| 811 | |
Archit Taneja | b2c9c8e | 2013-04-08 11:55:00 +0300 | [diff] [blame] | 812 | clk = devm_clk_get(&pdev->dev, "sys_clk"); |
Tomi Valkeinen | 4fbafaf | 2011-05-27 10:52:19 +0300 | [diff] [blame] | 813 | if (IS_ERR(clk)) { |
| 814 | DSSERR("can't get sys_clk\n"); |
| 815 | return PTR_ERR(clk); |
| 816 | } |
| 817 | |
| 818 | hdmi.sys_clk = clk; |
| 819 | |
Tomi Valkeinen | 4fbafaf | 2011-05-27 10:52:19 +0300 | [diff] [blame] | 820 | return 0; |
| 821 | } |
| 822 | |
Ricardo Neri | 3554762 | 2012-03-20 21:02:01 -0600 | [diff] [blame] | 823 | #if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO) |
| 824 | int hdmi_compute_acr(u32 sample_freq, u32 *n, u32 *cts) |
| 825 | { |
| 826 | u32 deep_color; |
Ricardo Neri | 25a6535 | 2012-03-23 15:49:02 -0600 | [diff] [blame] | 827 | bool deep_color_correct = false; |
Ricardo Neri | 3554762 | 2012-03-20 21:02:01 -0600 | [diff] [blame] | 828 | u32 pclk = hdmi.ip_data.cfg.timings.pixel_clock; |
| 829 | |
| 830 | if (n == NULL || cts == NULL) |
| 831 | return -EINVAL; |
| 832 | |
| 833 | /* TODO: When implemented, query deep color mode here. */ |
| 834 | deep_color = 100; |
| 835 | |
Ricardo Neri | 25a6535 | 2012-03-23 15:49:02 -0600 | [diff] [blame] | 836 | /* |
| 837 | * When using deep color, the default N value (as in the HDMI |
| 838 | * specification) yields to an non-integer CTS. Hence, we |
| 839 | * modify it while keeping the restrictions described in |
| 840 | * section 7.2.1 of the HDMI 1.4a specification. |
| 841 | */ |
Ricardo Neri | 3554762 | 2012-03-20 21:02:01 -0600 | [diff] [blame] | 842 | switch (sample_freq) { |
| 843 | case 32000: |
Ricardo Neri | 25a6535 | 2012-03-23 15:49:02 -0600 | [diff] [blame] | 844 | case 48000: |
| 845 | case 96000: |
| 846 | case 192000: |
| 847 | if (deep_color == 125) |
| 848 | if (pclk == 27027 || pclk == 74250) |
| 849 | deep_color_correct = true; |
| 850 | if (deep_color == 150) |
| 851 | if (pclk == 27027) |
| 852 | deep_color_correct = true; |
Ricardo Neri | 3554762 | 2012-03-20 21:02:01 -0600 | [diff] [blame] | 853 | break; |
| 854 | case 44100: |
Ricardo Neri | 25a6535 | 2012-03-23 15:49:02 -0600 | [diff] [blame] | 855 | case 88200: |
| 856 | case 176400: |
| 857 | if (deep_color == 125) |
| 858 | if (pclk == 27027) |
| 859 | deep_color_correct = true; |
Ricardo Neri | 3554762 | 2012-03-20 21:02:01 -0600 | [diff] [blame] | 860 | break; |
| 861 | default: |
Ricardo Neri | 3554762 | 2012-03-20 21:02:01 -0600 | [diff] [blame] | 862 | return -EINVAL; |
| 863 | } |
| 864 | |
Ricardo Neri | 25a6535 | 2012-03-23 15:49:02 -0600 | [diff] [blame] | 865 | if (deep_color_correct) { |
| 866 | switch (sample_freq) { |
| 867 | case 32000: |
| 868 | *n = 8192; |
| 869 | break; |
| 870 | case 44100: |
| 871 | *n = 12544; |
| 872 | break; |
| 873 | case 48000: |
| 874 | *n = 8192; |
| 875 | break; |
| 876 | case 88200: |
| 877 | *n = 25088; |
| 878 | break; |
| 879 | case 96000: |
| 880 | *n = 16384; |
| 881 | break; |
| 882 | case 176400: |
| 883 | *n = 50176; |
| 884 | break; |
| 885 | case 192000: |
| 886 | *n = 32768; |
| 887 | break; |
| 888 | default: |
| 889 | return -EINVAL; |
| 890 | } |
| 891 | } else { |
| 892 | switch (sample_freq) { |
| 893 | case 32000: |
| 894 | *n = 4096; |
| 895 | break; |
| 896 | case 44100: |
| 897 | *n = 6272; |
| 898 | break; |
| 899 | case 48000: |
| 900 | *n = 6144; |
| 901 | break; |
| 902 | case 88200: |
| 903 | *n = 12544; |
| 904 | break; |
| 905 | case 96000: |
| 906 | *n = 12288; |
| 907 | break; |
| 908 | case 176400: |
| 909 | *n = 25088; |
| 910 | break; |
| 911 | case 192000: |
| 912 | *n = 24576; |
| 913 | break; |
| 914 | default: |
| 915 | return -EINVAL; |
| 916 | } |
| 917 | } |
Ricardo Neri | 3554762 | 2012-03-20 21:02:01 -0600 | [diff] [blame] | 918 | /* Calculate CTS. See HDMI 1.3a or 1.4a specifications */ |
| 919 | *cts = pclk * (*n / 128) * deep_color / (sample_freq / 10); |
| 920 | |
| 921 | return 0; |
| 922 | } |
Ricardo Neri | f3a97491 | 2012-05-09 21:09:50 -0500 | [diff] [blame] | 923 | |
| 924 | int hdmi_audio_enable(void) |
| 925 | { |
| 926 | DSSDBG("audio_enable\n"); |
| 927 | |
| 928 | return hdmi.ip_data.ops->audio_enable(&hdmi.ip_data); |
| 929 | } |
| 930 | |
| 931 | void hdmi_audio_disable(void) |
| 932 | { |
| 933 | DSSDBG("audio_disable\n"); |
| 934 | |
| 935 | hdmi.ip_data.ops->audio_disable(&hdmi.ip_data); |
| 936 | } |
| 937 | |
| 938 | int hdmi_audio_start(void) |
| 939 | { |
| 940 | DSSDBG("audio_start\n"); |
| 941 | |
| 942 | return hdmi.ip_data.ops->audio_start(&hdmi.ip_data); |
| 943 | } |
| 944 | |
| 945 | void hdmi_audio_stop(void) |
| 946 | { |
| 947 | DSSDBG("audio_stop\n"); |
| 948 | |
| 949 | hdmi.ip_data.ops->audio_stop(&hdmi.ip_data); |
| 950 | } |
| 951 | |
| 952 | bool hdmi_mode_has_audio(void) |
| 953 | { |
| 954 | if (hdmi.ip_data.cfg.cm.mode == HDMI_HDMI) |
| 955 | return true; |
| 956 | else |
| 957 | return false; |
| 958 | } |
| 959 | |
| 960 | int hdmi_audio_config(struct omap_dss_audio *audio) |
| 961 | { |
| 962 | return hdmi.ip_data.ops->audio_config(&hdmi.ip_data, audio); |
| 963 | } |
| 964 | |
Ricardo Neri | 3554762 | 2012-03-20 21:02:01 -0600 | [diff] [blame] | 965 | #endif |
| 966 | |
Tomi Valkeinen | 17ae4e8 | 2013-04-26 14:48:43 +0300 | [diff] [blame] | 967 | static struct omap_dss_device *hdmi_find_dssdev(struct platform_device *pdev) |
Tomi Valkeinen | 38f3daf | 2012-05-02 14:55:12 +0300 | [diff] [blame] | 968 | { |
| 969 | struct omap_dss_board_info *pdata = pdev->dev.platform_data; |
Tomi Valkeinen | 2bbcce5 | 2012-10-29 12:40:46 +0200 | [diff] [blame] | 970 | const char *def_disp_name = omapdss_get_default_display_name(); |
Tomi Valkeinen | 1521653 | 2012-09-06 14:29:31 +0300 | [diff] [blame] | 971 | struct omap_dss_device *def_dssdev; |
| 972 | int i; |
| 973 | |
| 974 | def_dssdev = NULL; |
Tomi Valkeinen | 38f3daf | 2012-05-02 14:55:12 +0300 | [diff] [blame] | 975 | |
| 976 | for (i = 0; i < pdata->num_devices; ++i) { |
| 977 | struct omap_dss_device *dssdev = pdata->devices[i]; |
| 978 | |
| 979 | if (dssdev->type != OMAP_DISPLAY_TYPE_HDMI) |
| 980 | continue; |
| 981 | |
Tomi Valkeinen | 1521653 | 2012-09-06 14:29:31 +0300 | [diff] [blame] | 982 | if (def_dssdev == NULL) |
| 983 | def_dssdev = dssdev; |
Tomi Valkeinen | cca3501 | 2012-04-26 14:48:32 +0300 | [diff] [blame] | 984 | |
Tomi Valkeinen | 1521653 | 2012-09-06 14:29:31 +0300 | [diff] [blame] | 985 | if (def_disp_name != NULL && |
| 986 | strcmp(dssdev->name, def_disp_name) == 0) { |
| 987 | def_dssdev = dssdev; |
| 988 | break; |
Tomi Valkeinen | 38f3daf | 2012-05-02 14:55:12 +0300 | [diff] [blame] | 989 | } |
Tomi Valkeinen | 1521653 | 2012-09-06 14:29:31 +0300 | [diff] [blame] | 990 | } |
Tomi Valkeinen | 38f3daf | 2012-05-02 14:55:12 +0300 | [diff] [blame] | 991 | |
Tomi Valkeinen | 1521653 | 2012-09-06 14:29:31 +0300 | [diff] [blame] | 992 | return def_dssdev; |
| 993 | } |
| 994 | |
Tomi Valkeinen | c098029 | 2013-04-26 14:52:23 +0300 | [diff] [blame] | 995 | static int hdmi_probe_pdata(struct platform_device *pdev) |
Tomi Valkeinen | 1521653 | 2012-09-06 14:29:31 +0300 | [diff] [blame] | 996 | { |
Tomi Valkeinen | 5274484 | 2012-09-10 13:58:29 +0300 | [diff] [blame] | 997 | struct omap_dss_device *plat_dssdev; |
Tomi Valkeinen | 1521653 | 2012-09-06 14:29:31 +0300 | [diff] [blame] | 998 | struct omap_dss_device *dssdev; |
| 999 | struct omap_dss_hdmi_data *priv; |
| 1000 | int r; |
| 1001 | |
Tomi Valkeinen | 5274484 | 2012-09-10 13:58:29 +0300 | [diff] [blame] | 1002 | plat_dssdev = hdmi_find_dssdev(pdev); |
Tomi Valkeinen | 1521653 | 2012-09-06 14:29:31 +0300 | [diff] [blame] | 1003 | |
Tomi Valkeinen | 5274484 | 2012-09-10 13:58:29 +0300 | [diff] [blame] | 1004 | if (!plat_dssdev) |
Tomi Valkeinen | c098029 | 2013-04-26 14:52:23 +0300 | [diff] [blame] | 1005 | return 0; |
Tomi Valkeinen | 5274484 | 2012-09-10 13:58:29 +0300 | [diff] [blame] | 1006 | |
| 1007 | dssdev = dss_alloc_and_init_device(&pdev->dev); |
Tomi Valkeinen | 1521653 | 2012-09-06 14:29:31 +0300 | [diff] [blame] | 1008 | if (!dssdev) |
Tomi Valkeinen | c098029 | 2013-04-26 14:52:23 +0300 | [diff] [blame] | 1009 | return -ENOMEM; |
Tomi Valkeinen | 1521653 | 2012-09-06 14:29:31 +0300 | [diff] [blame] | 1010 | |
Tomi Valkeinen | 5274484 | 2012-09-10 13:58:29 +0300 | [diff] [blame] | 1011 | dss_copy_device_pdata(dssdev, plat_dssdev); |
| 1012 | |
Tomi Valkeinen | 1521653 | 2012-09-06 14:29:31 +0300 | [diff] [blame] | 1013 | priv = dssdev->data; |
| 1014 | |
| 1015 | hdmi.ct_cp_hpd_gpio = priv->ct_cp_hpd_gpio; |
| 1016 | hdmi.ls_oe_gpio = priv->ls_oe_gpio; |
| 1017 | hdmi.hpd_gpio = priv->hpd_gpio; |
| 1018 | |
| 1019 | r = hdmi_init_display(dssdev); |
| 1020 | if (r) { |
| 1021 | DSSERR("device %s init failed: %d\n", dssdev->name, r); |
Tomi Valkeinen | 5274484 | 2012-09-10 13:58:29 +0300 | [diff] [blame] | 1022 | dss_put_device(dssdev); |
Tomi Valkeinen | c098029 | 2013-04-26 14:52:23 +0300 | [diff] [blame] | 1023 | return r; |
Tomi Valkeinen | 1521653 | 2012-09-06 14:29:31 +0300 | [diff] [blame] | 1024 | } |
| 1025 | |
Tomi Valkeinen | 486c0e1 | 2012-12-07 12:50:08 +0200 | [diff] [blame] | 1026 | r = omapdss_output_set_device(&hdmi.output, dssdev); |
| 1027 | if (r) { |
| 1028 | DSSERR("failed to connect output to new device: %s\n", |
| 1029 | dssdev->name); |
| 1030 | dss_put_device(dssdev); |
Tomi Valkeinen | c098029 | 2013-04-26 14:52:23 +0300 | [diff] [blame] | 1031 | return r; |
Tomi Valkeinen | 486c0e1 | 2012-12-07 12:50:08 +0200 | [diff] [blame] | 1032 | } |
| 1033 | |
Tomi Valkeinen | 5274484 | 2012-09-10 13:58:29 +0300 | [diff] [blame] | 1034 | r = dss_add_device(dssdev); |
Tomi Valkeinen | 1521653 | 2012-09-06 14:29:31 +0300 | [diff] [blame] | 1035 | if (r) { |
| 1036 | DSSERR("device %s register failed: %d\n", dssdev->name, r); |
Tomi Valkeinen | 486c0e1 | 2012-12-07 12:50:08 +0200 | [diff] [blame] | 1037 | omapdss_output_unset_device(&hdmi.output); |
Ricardo Neri | d18bc45 | 2012-11-06 00:19:15 -0600 | [diff] [blame] | 1038 | hdmi_uninit_display(dssdev); |
Tomi Valkeinen | 5274484 | 2012-09-10 13:58:29 +0300 | [diff] [blame] | 1039 | dss_put_device(dssdev); |
Tomi Valkeinen | c098029 | 2013-04-26 14:52:23 +0300 | [diff] [blame] | 1040 | return r; |
Tomi Valkeinen | 38f3daf | 2012-05-02 14:55:12 +0300 | [diff] [blame] | 1041 | } |
Tomi Valkeinen | c098029 | 2013-04-26 14:52:23 +0300 | [diff] [blame] | 1042 | |
| 1043 | return 0; |
Tomi Valkeinen | 38f3daf | 2012-05-02 14:55:12 +0300 | [diff] [blame] | 1044 | } |
| 1045 | |
Tomi Valkeinen | 17ae4e8 | 2013-04-26 14:48:43 +0300 | [diff] [blame] | 1046 | static void hdmi_init_output(struct platform_device *pdev) |
Archit Taneja | 81b87f5 | 2012-09-26 16:30:49 +0530 | [diff] [blame] | 1047 | { |
| 1048 | struct omap_dss_output *out = &hdmi.output; |
| 1049 | |
| 1050 | out->pdev = pdev; |
| 1051 | out->id = OMAP_DSS_OUTPUT_HDMI; |
| 1052 | out->type = OMAP_DISPLAY_TYPE_HDMI; |
Tomi Valkeinen | 7286a08 | 2013-02-18 13:06:01 +0200 | [diff] [blame] | 1053 | out->name = "hdmi.0"; |
Tomi Valkeinen | 2eea5ae | 2013-02-13 11:23:54 +0200 | [diff] [blame] | 1054 | out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT; |
Archit Taneja | 81b87f5 | 2012-09-26 16:30:49 +0530 | [diff] [blame] | 1055 | |
| 1056 | dss_register_output(out); |
| 1057 | } |
| 1058 | |
| 1059 | static void __exit hdmi_uninit_output(struct platform_device *pdev) |
| 1060 | { |
| 1061 | struct omap_dss_output *out = &hdmi.output; |
| 1062 | |
| 1063 | dss_unregister_output(out); |
| 1064 | } |
| 1065 | |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 1066 | /* HDMI HW IP initialisation */ |
Tomi Valkeinen | 17ae4e8 | 2013-04-26 14:48:43 +0300 | [diff] [blame] | 1067 | static int omapdss_hdmihw_probe(struct platform_device *pdev) |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 1068 | { |
Ricardo Neri | af23cb3 | 2012-11-06 00:19:11 -0600 | [diff] [blame] | 1069 | struct resource *res; |
Tomi Valkeinen | 38f3daf | 2012-05-02 14:55:12 +0300 | [diff] [blame] | 1070 | int r; |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 1071 | |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 1072 | hdmi.pdev = pdev; |
| 1073 | |
| 1074 | mutex_init(&hdmi.lock); |
Ricardo Neri | 66a06b0 | 2012-11-06 00:19:14 -0600 | [diff] [blame] | 1075 | mutex_init(&hdmi.ip_data.lock); |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 1076 | |
Ricardo Neri | af23cb3 | 2012-11-06 00:19:11 -0600 | [diff] [blame] | 1077 | res = platform_get_resource(hdmi.pdev, IORESOURCE_MEM, 0); |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 1078 | |
| 1079 | /* Base address taken from platform */ |
Thierry Reding | bc3bad1 | 2013-01-21 11:09:23 +0100 | [diff] [blame] | 1080 | hdmi.ip_data.base_wp = devm_ioremap_resource(&pdev->dev, res); |
| 1081 | if (IS_ERR(hdmi.ip_data.base_wp)) |
| 1082 | return PTR_ERR(hdmi.ip_data.base_wp); |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 1083 | |
Tomi Valkeinen | 4fbafaf | 2011-05-27 10:52:19 +0300 | [diff] [blame] | 1084 | r = hdmi_get_clocks(pdev); |
| 1085 | if (r) { |
Ricardo Neri | 47e443b | 2012-11-06 00:19:12 -0600 | [diff] [blame] | 1086 | DSSERR("can't get clocks\n"); |
Tomi Valkeinen | 4fbafaf | 2011-05-27 10:52:19 +0300 | [diff] [blame] | 1087 | return r; |
| 1088 | } |
| 1089 | |
| 1090 | pm_runtime_enable(&pdev->dev); |
| 1091 | |
Mythri P K | 95a8aeb | 2011-09-08 19:06:18 +0530 | [diff] [blame] | 1092 | hdmi.ip_data.core_sys_offset = HDMI_CORE_SYS; |
| 1093 | hdmi.ip_data.core_av_offset = HDMI_CORE_AV; |
| 1094 | hdmi.ip_data.pll_offset = HDMI_PLLCTRL; |
| 1095 | hdmi.ip_data.phy_offset = HDMI_PHY; |
Archit Taneja | 7849398 | 2012-08-08 16:50:42 +0530 | [diff] [blame] | 1096 | |
Tomi Valkeinen | 002d368 | 2013-02-13 12:17:43 +0200 | [diff] [blame] | 1097 | hdmi_init_output(pdev); |
| 1098 | |
Ricardo Neri | 66a06b0 | 2012-11-06 00:19:14 -0600 | [diff] [blame] | 1099 | r = hdmi_panel_init(); |
| 1100 | if (r) { |
| 1101 | DSSERR("can't init panel\n"); |
Archit Taneja | b2c9c8e | 2013-04-08 11:55:00 +0300 | [diff] [blame] | 1102 | return r; |
Ricardo Neri | 66a06b0 | 2012-11-06 00:19:14 -0600 | [diff] [blame] | 1103 | } |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 1104 | |
Tomi Valkeinen | e40402c | 2012-03-02 18:01:07 +0200 | [diff] [blame] | 1105 | dss_debugfs_create_file("hdmi", hdmi_dump_regs); |
| 1106 | |
Tomi Valkeinen | c6ca5b2 | 2013-03-14 15:47:29 +0200 | [diff] [blame] | 1107 | if (pdev->dev.platform_data) { |
| 1108 | r = hdmi_probe_pdata(pdev); |
| 1109 | if (r) |
| 1110 | goto err_probe; |
Tomi Valkeinen | c098029 | 2013-04-26 14:52:23 +0300 | [diff] [blame] | 1111 | } |
Tomi Valkeinen | 35deca3 | 2012-03-01 15:45:53 +0200 | [diff] [blame] | 1112 | |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 1113 | return 0; |
Tomi Valkeinen | c6ca5b2 | 2013-03-14 15:47:29 +0200 | [diff] [blame] | 1114 | |
| 1115 | err_probe: |
| 1116 | hdmi_panel_exit(); |
| 1117 | hdmi_uninit_output(pdev); |
| 1118 | pm_runtime_disable(&pdev->dev); |
| 1119 | return r; |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 1120 | } |
| 1121 | |
Tomi Valkeinen | cca3501 | 2012-04-26 14:48:32 +0300 | [diff] [blame] | 1122 | static int __exit hdmi_remove_child(struct device *dev, void *data) |
| 1123 | { |
| 1124 | struct omap_dss_device *dssdev = to_dss_device(dev); |
| 1125 | hdmi_uninit_display(dssdev); |
| 1126 | return 0; |
| 1127 | } |
| 1128 | |
Tomi Valkeinen | 6e7e8f0 | 2012-02-17 17:41:13 +0200 | [diff] [blame] | 1129 | static int __exit omapdss_hdmihw_remove(struct platform_device *pdev) |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 1130 | { |
Tomi Valkeinen | cca3501 | 2012-04-26 14:48:32 +0300 | [diff] [blame] | 1131 | device_for_each_child(&pdev->dev, NULL, hdmi_remove_child); |
| 1132 | |
Tomi Valkeinen | 5274484 | 2012-09-10 13:58:29 +0300 | [diff] [blame] | 1133 | dss_unregister_child_devices(&pdev->dev); |
Tomi Valkeinen | 35deca3 | 2012-03-01 15:45:53 +0200 | [diff] [blame] | 1134 | |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 1135 | hdmi_panel_exit(); |
| 1136 | |
Archit Taneja | 81b87f5 | 2012-09-26 16:30:49 +0530 | [diff] [blame] | 1137 | hdmi_uninit_output(pdev); |
| 1138 | |
Tomi Valkeinen | 4fbafaf | 2011-05-27 10:52:19 +0300 | [diff] [blame] | 1139 | pm_runtime_disable(&pdev->dev); |
| 1140 | |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 1141 | return 0; |
| 1142 | } |
| 1143 | |
Tomi Valkeinen | 4fbafaf | 2011-05-27 10:52:19 +0300 | [diff] [blame] | 1144 | static int hdmi_runtime_suspend(struct device *dev) |
| 1145 | { |
Rajendra Nayak | f11766d | 2012-06-27 14:21:26 +0530 | [diff] [blame] | 1146 | clk_disable_unprepare(hdmi.sys_clk); |
Tomi Valkeinen | 4fbafaf | 2011-05-27 10:52:19 +0300 | [diff] [blame] | 1147 | |
| 1148 | dispc_runtime_put(); |
Tomi Valkeinen | 4fbafaf | 2011-05-27 10:52:19 +0300 | [diff] [blame] | 1149 | |
| 1150 | return 0; |
| 1151 | } |
| 1152 | |
| 1153 | static int hdmi_runtime_resume(struct device *dev) |
| 1154 | { |
| 1155 | int r; |
| 1156 | |
Tomi Valkeinen | 4fbafaf | 2011-05-27 10:52:19 +0300 | [diff] [blame] | 1157 | r = dispc_runtime_get(); |
| 1158 | if (r < 0) |
Tomi Valkeinen | 852f083 | 2012-02-17 17:58:04 +0200 | [diff] [blame] | 1159 | return r; |
Tomi Valkeinen | 4fbafaf | 2011-05-27 10:52:19 +0300 | [diff] [blame] | 1160 | |
Rajendra Nayak | f11766d | 2012-06-27 14:21:26 +0530 | [diff] [blame] | 1161 | clk_prepare_enable(hdmi.sys_clk); |
Tomi Valkeinen | 4fbafaf | 2011-05-27 10:52:19 +0300 | [diff] [blame] | 1162 | |
| 1163 | return 0; |
Tomi Valkeinen | 4fbafaf | 2011-05-27 10:52:19 +0300 | [diff] [blame] | 1164 | } |
| 1165 | |
| 1166 | static const struct dev_pm_ops hdmi_pm_ops = { |
| 1167 | .runtime_suspend = hdmi_runtime_suspend, |
| 1168 | .runtime_resume = hdmi_runtime_resume, |
| 1169 | }; |
| 1170 | |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 1171 | static struct platform_driver omapdss_hdmihw_driver = { |
Tomi Valkeinen | 17ae4e8 | 2013-04-26 14:48:43 +0300 | [diff] [blame] | 1172 | .probe = omapdss_hdmihw_probe, |
Tomi Valkeinen | 6e7e8f0 | 2012-02-17 17:41:13 +0200 | [diff] [blame] | 1173 | .remove = __exit_p(omapdss_hdmihw_remove), |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 1174 | .driver = { |
| 1175 | .name = "omapdss_hdmi", |
| 1176 | .owner = THIS_MODULE, |
Tomi Valkeinen | 4fbafaf | 2011-05-27 10:52:19 +0300 | [diff] [blame] | 1177 | .pm = &hdmi_pm_ops, |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 1178 | }, |
| 1179 | }; |
| 1180 | |
Tomi Valkeinen | 6e7e8f0 | 2012-02-17 17:41:13 +0200 | [diff] [blame] | 1181 | int __init hdmi_init_platform_driver(void) |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 1182 | { |
Tomi Valkeinen | 17ae4e8 | 2013-04-26 14:48:43 +0300 | [diff] [blame] | 1183 | return platform_driver_register(&omapdss_hdmihw_driver); |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 1184 | } |
| 1185 | |
Tomi Valkeinen | 6e7e8f0 | 2012-02-17 17:41:13 +0200 | [diff] [blame] | 1186 | void __exit hdmi_uninit_platform_driver(void) |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 1187 | { |
Tomi Valkeinen | 04c742c | 2012-02-23 15:32:37 +0200 | [diff] [blame] | 1188 | platform_driver_unregister(&omapdss_hdmihw_driver); |
Mythri P K | c3198a5 | 2011-03-12 12:04:27 +0530 | [diff] [blame] | 1189 | } |