Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2011 Freescale Semiconductor, Inc. |
| 3 | * Copyright 2011 Linaro Ltd. |
| 4 | * |
| 5 | * The code contained herein is licensed under the GNU General Public |
| 6 | * License. You may obtain a copy of the GNU General Public License |
| 7 | * Version 2 or later at the following locations: |
| 8 | * |
| 9 | * http://www.opensource.org/licenses/gpl-license.html |
| 10 | * http://www.gnu.org/copyleft/gpl.html |
| 11 | */ |
| 12 | |
Shawn Guo | 36dffd8 | 2013-04-07 10:49:34 +0800 | [diff] [blame] | 13 | #include "skeleton.dtsi" |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 14 | |
| 15 | / { |
| 16 | aliases { |
Shawn Guo | 5230f8f | 2012-08-05 14:01:28 +0800 | [diff] [blame] | 17 | gpio0 = &gpio1; |
| 18 | gpio1 = &gpio2; |
| 19 | gpio2 = &gpio3; |
| 20 | gpio3 = &gpio4; |
| 21 | gpio4 = &gpio5; |
| 22 | gpio5 = &gpio6; |
| 23 | gpio6 = &gpio7; |
Sascha Hauer | 80fa058 | 2013-06-25 15:51:57 +0200 | [diff] [blame^] | 24 | i2c0 = &i2c1; |
| 25 | i2c1 = &i2c2; |
| 26 | i2c2 = &i2c3; |
| 27 | serial0 = &uart1; |
| 28 | serial1 = &uart2; |
| 29 | serial2 = &uart3; |
| 30 | serial3 = &uart4; |
| 31 | serial4 = &uart5; |
| 32 | spi0 = &ecspi1; |
| 33 | spi1 = &ecspi2; |
| 34 | spi2 = &ecspi3; |
| 35 | spi3 = &ecspi4; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 36 | }; |
| 37 | |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 38 | intc: interrupt-controller@00a01000 { |
| 39 | compatible = "arm,cortex-a9-gic"; |
| 40 | #interrupt-cells = <3>; |
| 41 | #address-cells = <1>; |
| 42 | #size-cells = <1>; |
| 43 | interrupt-controller; |
| 44 | reg = <0x00a01000 0x1000>, |
| 45 | <0x00a00100 0x100>; |
| 46 | }; |
| 47 | |
| 48 | clocks { |
| 49 | #address-cells = <1>; |
| 50 | #size-cells = <0>; |
| 51 | |
| 52 | ckil { |
| 53 | compatible = "fsl,imx-ckil", "fixed-clock"; |
| 54 | clock-frequency = <32768>; |
| 55 | }; |
| 56 | |
| 57 | ckih1 { |
| 58 | compatible = "fsl,imx-ckih1", "fixed-clock"; |
| 59 | clock-frequency = <0>; |
| 60 | }; |
| 61 | |
| 62 | osc { |
| 63 | compatible = "fsl,imx-osc", "fixed-clock"; |
| 64 | clock-frequency = <24000000>; |
| 65 | }; |
| 66 | }; |
| 67 | |
| 68 | soc { |
| 69 | #address-cells = <1>; |
| 70 | #size-cells = <1>; |
| 71 | compatible = "simple-bus"; |
| 72 | interrupt-parent = <&intc>; |
| 73 | ranges; |
| 74 | |
Shawn Guo | f30fb03 | 2013-02-25 21:56:56 +0800 | [diff] [blame] | 75 | dma_apbh: dma-apbh@00110000 { |
Huang Shijie | e5d0f9f | 2012-06-06 21:22:57 -0400 | [diff] [blame] | 76 | compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh"; |
| 77 | reg = <0x00110000 0x2000>; |
Shawn Guo | f30fb03 | 2013-02-25 21:56:56 +0800 | [diff] [blame] | 78 | interrupts = <0 13 0x04>, <0 13 0x04>, <0 13 0x04>, <0 13 0x04>; |
| 79 | interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3"; |
| 80 | #dma-cells = <1>; |
| 81 | dma-channels = <4>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 82 | clocks = <&clks 106>; |
Huang Shijie | e5d0f9f | 2012-06-06 21:22:57 -0400 | [diff] [blame] | 83 | }; |
| 84 | |
Shawn Guo | be4ccfc | 2012-12-31 11:32:48 +0800 | [diff] [blame] | 85 | gpmi: gpmi-nand@00112000 { |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 86 | compatible = "fsl,imx6q-gpmi-nand"; |
| 87 | #address-cells = <1>; |
| 88 | #size-cells = <1>; |
| 89 | reg = <0x00112000 0x2000>, <0x00114000 0x2000>; |
| 90 | reg-names = "gpmi-nand", "bch"; |
| 91 | interrupts = <0 13 0x04>, <0 15 0x04>; |
| 92 | interrupt-names = "gpmi-dma", "bch"; |
| 93 | clocks = <&clks 152>, <&clks 153>, <&clks 151>, |
| 94 | <&clks 150>, <&clks 149>; |
| 95 | clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch", |
| 96 | "gpmi_bch_apb", "per1_bch"; |
Shawn Guo | f30fb03 | 2013-02-25 21:56:56 +0800 | [diff] [blame] | 97 | dmas = <&dma_apbh 0>; |
| 98 | dma-names = "rx-tx"; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 99 | fsl,gpmi-dma-channel = <0>; |
| 100 | status = "disabled"; |
Huang Shijie | cf922fa | 2012-07-01 23:38:46 -0400 | [diff] [blame] | 101 | }; |
| 102 | |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 103 | timer@00a00600 { |
Marc Zyngier | 58458e0 | 2012-01-10 19:44:19 +0000 | [diff] [blame] | 104 | compatible = "arm,cortex-a9-twd-timer"; |
| 105 | reg = <0x00a00600 0x20>; |
| 106 | interrupts = <1 13 0xf01>; |
Shawn Guo | 2bb4b70 | 2013-04-03 23:50:09 +0800 | [diff] [blame] | 107 | clocks = <&clks 15>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 108 | }; |
| 109 | |
| 110 | L2: l2-cache@00a02000 { |
| 111 | compatible = "arm,pl310-cache"; |
| 112 | reg = <0x00a02000 0x1000>; |
| 113 | interrupts = <0 92 0x04>; |
| 114 | cache-unified; |
| 115 | cache-level = <2>; |
Dirk Behme | 5a5ca56 | 2013-04-26 10:13:55 +0200 | [diff] [blame] | 116 | arm,tag-latency = <4 2 3>; |
| 117 | arm,data-latency = <4 2 3>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 118 | }; |
| 119 | |
Dirk Behme | 218abe6 | 2013-02-15 15:10:01 +0100 | [diff] [blame] | 120 | pmu { |
| 121 | compatible = "arm,cortex-a9-pmu"; |
| 122 | interrupts = <0 94 0x04>; |
| 123 | }; |
| 124 | |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 125 | aips-bus@02000000 { /* AIPS1 */ |
| 126 | compatible = "fsl,aips-bus", "simple-bus"; |
| 127 | #address-cells = <1>; |
| 128 | #size-cells = <1>; |
| 129 | reg = <0x02000000 0x100000>; |
| 130 | ranges; |
| 131 | |
| 132 | spba-bus@02000000 { |
| 133 | compatible = "fsl,spba-bus", "simple-bus"; |
| 134 | #address-cells = <1>; |
| 135 | #size-cells = <1>; |
| 136 | reg = <0x02000000 0x40000>; |
| 137 | ranges; |
| 138 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 139 | spdif: spdif@02004000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 140 | reg = <0x02004000 0x4000>; |
| 141 | interrupts = <0 52 0x04>; |
| 142 | }; |
| 143 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 144 | ecspi1: ecspi@02008000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 145 | #address-cells = <1>; |
| 146 | #size-cells = <0>; |
| 147 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
| 148 | reg = <0x02008000 0x4000>; |
| 149 | interrupts = <0 31 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 150 | clocks = <&clks 112>, <&clks 112>; |
| 151 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 152 | status = "disabled"; |
| 153 | }; |
| 154 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 155 | ecspi2: ecspi@0200c000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 156 | #address-cells = <1>; |
| 157 | #size-cells = <0>; |
| 158 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
| 159 | reg = <0x0200c000 0x4000>; |
| 160 | interrupts = <0 32 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 161 | clocks = <&clks 113>, <&clks 113>; |
| 162 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 163 | status = "disabled"; |
| 164 | }; |
| 165 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 166 | ecspi3: ecspi@02010000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 167 | #address-cells = <1>; |
| 168 | #size-cells = <0>; |
| 169 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
| 170 | reg = <0x02010000 0x4000>; |
| 171 | interrupts = <0 33 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 172 | clocks = <&clks 114>, <&clks 114>; |
| 173 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 174 | status = "disabled"; |
| 175 | }; |
| 176 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 177 | ecspi4: ecspi@02014000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 178 | #address-cells = <1>; |
| 179 | #size-cells = <0>; |
| 180 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
| 181 | reg = <0x02014000 0x4000>; |
| 182 | interrupts = <0 34 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 183 | clocks = <&clks 115>, <&clks 115>; |
| 184 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 185 | status = "disabled"; |
| 186 | }; |
| 187 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 188 | uart1: serial@02020000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 189 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
| 190 | reg = <0x02020000 0x4000>; |
| 191 | interrupts = <0 26 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 192 | clocks = <&clks 160>, <&clks 161>; |
| 193 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 194 | status = "disabled"; |
| 195 | }; |
| 196 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 197 | esai: esai@02024000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 198 | reg = <0x02024000 0x4000>; |
| 199 | interrupts = <0 51 0x04>; |
| 200 | }; |
| 201 | |
Richard Zhao | b1a5da8 | 2012-05-02 10:29:10 +0800 | [diff] [blame] | 202 | ssi1: ssi@02028000 { |
| 203 | compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 204 | reg = <0x02028000 0x4000>; |
| 205 | interrupts = <0 46 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 206 | clocks = <&clks 178>; |
Richard Zhao | b1a5da8 | 2012-05-02 10:29:10 +0800 | [diff] [blame] | 207 | fsl,fifo-depth = <15>; |
| 208 | fsl,ssi-dma-events = <38 37>; |
| 209 | status = "disabled"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 210 | }; |
| 211 | |
Richard Zhao | b1a5da8 | 2012-05-02 10:29:10 +0800 | [diff] [blame] | 212 | ssi2: ssi@0202c000 { |
| 213 | compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 214 | reg = <0x0202c000 0x4000>; |
| 215 | interrupts = <0 47 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 216 | clocks = <&clks 179>; |
Richard Zhao | b1a5da8 | 2012-05-02 10:29:10 +0800 | [diff] [blame] | 217 | fsl,fifo-depth = <15>; |
| 218 | fsl,ssi-dma-events = <42 41>; |
| 219 | status = "disabled"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 220 | }; |
| 221 | |
Richard Zhao | b1a5da8 | 2012-05-02 10:29:10 +0800 | [diff] [blame] | 222 | ssi3: ssi@02030000 { |
| 223 | compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 224 | reg = <0x02030000 0x4000>; |
| 225 | interrupts = <0 48 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 226 | clocks = <&clks 180>; |
Richard Zhao | b1a5da8 | 2012-05-02 10:29:10 +0800 | [diff] [blame] | 227 | fsl,fifo-depth = <15>; |
| 228 | fsl,ssi-dma-events = <46 45>; |
| 229 | status = "disabled"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 230 | }; |
| 231 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 232 | asrc: asrc@02034000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 233 | reg = <0x02034000 0x4000>; |
| 234 | interrupts = <0 50 0x04>; |
| 235 | }; |
| 236 | |
| 237 | spba@0203c000 { |
| 238 | reg = <0x0203c000 0x4000>; |
| 239 | }; |
| 240 | }; |
| 241 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 242 | vpu: vpu@02040000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 243 | reg = <0x02040000 0x3c000>; |
| 244 | interrupts = <0 3 0x04 0 12 0x04>; |
| 245 | }; |
| 246 | |
| 247 | aipstz@0207c000 { /* AIPSTZ1 */ |
| 248 | reg = <0x0207c000 0x4000>; |
| 249 | }; |
| 250 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 251 | pwm1: pwm@02080000 { |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 252 | #pwm-cells = <2>; |
| 253 | compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 254 | reg = <0x02080000 0x4000>; |
| 255 | interrupts = <0 83 0x04>; |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 256 | clocks = <&clks 62>, <&clks 145>; |
| 257 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 258 | }; |
| 259 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 260 | pwm2: pwm@02084000 { |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 261 | #pwm-cells = <2>; |
| 262 | compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 263 | reg = <0x02084000 0x4000>; |
| 264 | interrupts = <0 84 0x04>; |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 265 | clocks = <&clks 62>, <&clks 146>; |
| 266 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 267 | }; |
| 268 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 269 | pwm3: pwm@02088000 { |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 270 | #pwm-cells = <2>; |
| 271 | compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 272 | reg = <0x02088000 0x4000>; |
| 273 | interrupts = <0 85 0x04>; |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 274 | clocks = <&clks 62>, <&clks 147>; |
| 275 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 276 | }; |
| 277 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 278 | pwm4: pwm@0208c000 { |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 279 | #pwm-cells = <2>; |
| 280 | compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 281 | reg = <0x0208c000 0x4000>; |
| 282 | interrupts = <0 86 0x04>; |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 283 | clocks = <&clks 62>, <&clks 148>; |
| 284 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 285 | }; |
| 286 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 287 | can1: flexcan@02090000 { |
Sascha Hauer | 0f22521 | 2013-06-25 15:51:46 +0200 | [diff] [blame] | 288 | compatible = "fsl,imx6q-flexcan"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 289 | reg = <0x02090000 0x4000>; |
| 290 | interrupts = <0 110 0x04>; |
Sascha Hauer | 0f22521 | 2013-06-25 15:51:46 +0200 | [diff] [blame] | 291 | clocks = <&clks 108>, <&clks 109>; |
| 292 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 293 | }; |
| 294 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 295 | can2: flexcan@02094000 { |
Sascha Hauer | 0f22521 | 2013-06-25 15:51:46 +0200 | [diff] [blame] | 296 | compatible = "fsl,imx6q-flexcan"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 297 | reg = <0x02094000 0x4000>; |
| 298 | interrupts = <0 111 0x04>; |
Sascha Hauer | 0f22521 | 2013-06-25 15:51:46 +0200 | [diff] [blame] | 299 | clocks = <&clks 110>, <&clks 111>; |
| 300 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 301 | }; |
| 302 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 303 | gpt: gpt@02098000 { |
Sascha Hauer | 97b108f | 2013-06-25 15:51:47 +0200 | [diff] [blame] | 304 | compatible = "fsl,imx6q-gpt", "fsl,imx31-gpt"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 305 | reg = <0x02098000 0x4000>; |
| 306 | interrupts = <0 55 0x04>; |
Sascha Hauer | 4efccad | 2013-03-14 13:09:01 +0100 | [diff] [blame] | 307 | clocks = <&clks 119>, <&clks 120>; |
| 308 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 309 | }; |
| 310 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 311 | gpio1: gpio@0209c000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 312 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 313 | reg = <0x0209c000 0x4000>; |
| 314 | interrupts = <0 66 0x04 0 67 0x04>; |
| 315 | gpio-controller; |
| 316 | #gpio-cells = <2>; |
| 317 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 318 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 319 | }; |
| 320 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 321 | gpio2: gpio@020a0000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 322 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 323 | reg = <0x020a0000 0x4000>; |
| 324 | interrupts = <0 68 0x04 0 69 0x04>; |
| 325 | gpio-controller; |
| 326 | #gpio-cells = <2>; |
| 327 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 328 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 329 | }; |
| 330 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 331 | gpio3: gpio@020a4000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 332 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 333 | reg = <0x020a4000 0x4000>; |
| 334 | interrupts = <0 70 0x04 0 71 0x04>; |
| 335 | gpio-controller; |
| 336 | #gpio-cells = <2>; |
| 337 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 338 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 339 | }; |
| 340 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 341 | gpio4: gpio@020a8000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 342 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 343 | reg = <0x020a8000 0x4000>; |
| 344 | interrupts = <0 72 0x04 0 73 0x04>; |
| 345 | gpio-controller; |
| 346 | #gpio-cells = <2>; |
| 347 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 348 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 349 | }; |
| 350 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 351 | gpio5: gpio@020ac000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 352 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 353 | reg = <0x020ac000 0x4000>; |
| 354 | interrupts = <0 74 0x04 0 75 0x04>; |
| 355 | gpio-controller; |
| 356 | #gpio-cells = <2>; |
| 357 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 358 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 359 | }; |
| 360 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 361 | gpio6: gpio@020b0000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 362 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 363 | reg = <0x020b0000 0x4000>; |
| 364 | interrupts = <0 76 0x04 0 77 0x04>; |
| 365 | gpio-controller; |
| 366 | #gpio-cells = <2>; |
| 367 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 368 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 369 | }; |
| 370 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 371 | gpio7: gpio@020b4000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 372 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 373 | reg = <0x020b4000 0x4000>; |
| 374 | interrupts = <0 78 0x04 0 79 0x04>; |
| 375 | gpio-controller; |
| 376 | #gpio-cells = <2>; |
| 377 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 378 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 379 | }; |
| 380 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 381 | kpp: kpp@020b8000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 382 | reg = <0x020b8000 0x4000>; |
| 383 | interrupts = <0 82 0x04>; |
| 384 | }; |
| 385 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 386 | wdog1: wdog@020bc000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 387 | compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; |
| 388 | reg = <0x020bc000 0x4000>; |
| 389 | interrupts = <0 80 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 390 | clocks = <&clks 0>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 391 | }; |
| 392 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 393 | wdog2: wdog@020c0000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 394 | compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; |
| 395 | reg = <0x020c0000 0x4000>; |
| 396 | interrupts = <0 81 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 397 | clocks = <&clks 0>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 398 | status = "disabled"; |
| 399 | }; |
| 400 | |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 401 | clks: ccm@020c4000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 402 | compatible = "fsl,imx6q-ccm"; |
| 403 | reg = <0x020c4000 0x4000>; |
| 404 | interrupts = <0 87 0x04 0 88 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 405 | #clock-cells = <1>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 406 | }; |
| 407 | |
Dong Aisheng | baa6415 | 2012-09-05 10:57:15 +0800 | [diff] [blame] | 408 | anatop: anatop@020c8000 { |
| 409 | compatible = "fsl,imx6q-anatop", "syscon", "simple-bus"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 410 | reg = <0x020c8000 0x1000>; |
| 411 | interrupts = <0 49 0x04 0 54 0x04 0 127 0x04>; |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 412 | |
| 413 | regulator-1p1@110 { |
| 414 | compatible = "fsl,anatop-regulator"; |
| 415 | regulator-name = "vdd1p1"; |
| 416 | regulator-min-microvolt = <800000>; |
| 417 | regulator-max-microvolt = <1375000>; |
| 418 | regulator-always-on; |
| 419 | anatop-reg-offset = <0x110>; |
| 420 | anatop-vol-bit-shift = <8>; |
| 421 | anatop-vol-bit-width = <5>; |
| 422 | anatop-min-bit-val = <4>; |
| 423 | anatop-min-voltage = <800000>; |
| 424 | anatop-max-voltage = <1375000>; |
| 425 | }; |
| 426 | |
| 427 | regulator-3p0@120 { |
| 428 | compatible = "fsl,anatop-regulator"; |
| 429 | regulator-name = "vdd3p0"; |
| 430 | regulator-min-microvolt = <2800000>; |
| 431 | regulator-max-microvolt = <3150000>; |
| 432 | regulator-always-on; |
| 433 | anatop-reg-offset = <0x120>; |
| 434 | anatop-vol-bit-shift = <8>; |
| 435 | anatop-vol-bit-width = <5>; |
| 436 | anatop-min-bit-val = <0>; |
| 437 | anatop-min-voltage = <2625000>; |
| 438 | anatop-max-voltage = <3400000>; |
| 439 | }; |
| 440 | |
| 441 | regulator-2p5@130 { |
| 442 | compatible = "fsl,anatop-regulator"; |
| 443 | regulator-name = "vdd2p5"; |
| 444 | regulator-min-microvolt = <2000000>; |
| 445 | regulator-max-microvolt = <2750000>; |
| 446 | regulator-always-on; |
| 447 | anatop-reg-offset = <0x130>; |
| 448 | anatop-vol-bit-shift = <8>; |
| 449 | anatop-vol-bit-width = <5>; |
| 450 | anatop-min-bit-val = <0>; |
| 451 | anatop-min-voltage = <2000000>; |
| 452 | anatop-max-voltage = <2750000>; |
| 453 | }; |
| 454 | |
Shawn Guo | 96574a6 | 2013-01-08 14:25:14 +0800 | [diff] [blame] | 455 | reg_arm: regulator-vddcore@140 { |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 456 | compatible = "fsl,anatop-regulator"; |
| 457 | regulator-name = "cpu"; |
| 458 | regulator-min-microvolt = <725000>; |
| 459 | regulator-max-microvolt = <1450000>; |
| 460 | regulator-always-on; |
| 461 | anatop-reg-offset = <0x140>; |
| 462 | anatop-vol-bit-shift = <0>; |
| 463 | anatop-vol-bit-width = <5>; |
Anson Huang | 46743dd | 2013-01-30 17:33:44 -0500 | [diff] [blame] | 464 | anatop-delay-reg-offset = <0x170>; |
| 465 | anatop-delay-bit-shift = <24>; |
| 466 | anatop-delay-bit-width = <2>; |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 467 | anatop-min-bit-val = <1>; |
| 468 | anatop-min-voltage = <725000>; |
| 469 | anatop-max-voltage = <1450000>; |
| 470 | }; |
| 471 | |
Shawn Guo | 96574a6 | 2013-01-08 14:25:14 +0800 | [diff] [blame] | 472 | reg_pu: regulator-vddpu@140 { |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 473 | compatible = "fsl,anatop-regulator"; |
| 474 | regulator-name = "vddpu"; |
| 475 | regulator-min-microvolt = <725000>; |
| 476 | regulator-max-microvolt = <1450000>; |
| 477 | regulator-always-on; |
| 478 | anatop-reg-offset = <0x140>; |
| 479 | anatop-vol-bit-shift = <9>; |
| 480 | anatop-vol-bit-width = <5>; |
Anson Huang | 46743dd | 2013-01-30 17:33:44 -0500 | [diff] [blame] | 481 | anatop-delay-reg-offset = <0x170>; |
| 482 | anatop-delay-bit-shift = <26>; |
| 483 | anatop-delay-bit-width = <2>; |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 484 | anatop-min-bit-val = <1>; |
| 485 | anatop-min-voltage = <725000>; |
| 486 | anatop-max-voltage = <1450000>; |
| 487 | }; |
| 488 | |
Shawn Guo | 96574a6 | 2013-01-08 14:25:14 +0800 | [diff] [blame] | 489 | reg_soc: regulator-vddsoc@140 { |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 490 | compatible = "fsl,anatop-regulator"; |
| 491 | regulator-name = "vddsoc"; |
| 492 | regulator-min-microvolt = <725000>; |
| 493 | regulator-max-microvolt = <1450000>; |
| 494 | regulator-always-on; |
| 495 | anatop-reg-offset = <0x140>; |
| 496 | anatop-vol-bit-shift = <18>; |
| 497 | anatop-vol-bit-width = <5>; |
Anson Huang | 46743dd | 2013-01-30 17:33:44 -0500 | [diff] [blame] | 498 | anatop-delay-reg-offset = <0x170>; |
| 499 | anatop-delay-bit-shift = <28>; |
| 500 | anatop-delay-bit-width = <2>; |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 501 | anatop-min-bit-val = <1>; |
| 502 | anatop-min-voltage = <725000>; |
| 503 | anatop-max-voltage = <1450000>; |
| 504 | }; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 505 | }; |
| 506 | |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 507 | usbphy1: usbphy@020c9000 { |
| 508 | compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 509 | reg = <0x020c9000 0x1000>; |
| 510 | interrupts = <0 44 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 511 | clocks = <&clks 182>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 512 | }; |
| 513 | |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 514 | usbphy2: usbphy@020ca000 { |
| 515 | compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 516 | reg = <0x020ca000 0x1000>; |
| 517 | interrupts = <0 45 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 518 | clocks = <&clks 183>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 519 | }; |
| 520 | |
| 521 | snvs@020cc000 { |
Shawn Guo | c925038 | 2012-07-02 20:13:03 +0800 | [diff] [blame] | 522 | compatible = "fsl,sec-v4.0-mon", "simple-bus"; |
| 523 | #address-cells = <1>; |
| 524 | #size-cells = <1>; |
| 525 | ranges = <0 0x020cc000 0x4000>; |
| 526 | |
| 527 | snvs-rtc-lp@34 { |
| 528 | compatible = "fsl,sec-v4.0-mon-rtc-lp"; |
| 529 | reg = <0x34 0x58>; |
| 530 | interrupts = <0 19 0x04 0 20 0x04>; |
| 531 | }; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 532 | }; |
| 533 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 534 | epit1: epit@020d0000 { /* EPIT1 */ |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 535 | reg = <0x020d0000 0x4000>; |
| 536 | interrupts = <0 56 0x04>; |
| 537 | }; |
| 538 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 539 | epit2: epit@020d4000 { /* EPIT2 */ |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 540 | reg = <0x020d4000 0x4000>; |
| 541 | interrupts = <0 57 0x04>; |
| 542 | }; |
| 543 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 544 | src: src@020d8000 { |
Philipp Zabel | bd3d924 | 2013-03-28 17:35:22 +0100 | [diff] [blame] | 545 | compatible = "fsl,imx6q-src", "fsl,imx51-src"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 546 | reg = <0x020d8000 0x4000>; |
| 547 | interrupts = <0 91 0x04 0 96 0x04>; |
Philipp Zabel | 09ebf36 | 2013-03-28 17:35:20 +0100 | [diff] [blame] | 548 | #reset-cells = <1>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 549 | }; |
| 550 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 551 | gpc: gpc@020dc000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 552 | compatible = "fsl,imx6q-gpc"; |
| 553 | reg = <0x020dc000 0x4000>; |
| 554 | interrupts = <0 89 0x04 0 90 0x04>; |
| 555 | }; |
| 556 | |
Dong Aisheng | df37e0c | 2012-09-05 10:57:14 +0800 | [diff] [blame] | 557 | gpr: iomuxc-gpr@020e0000 { |
| 558 | compatible = "fsl,imx6q-iomuxc-gpr", "syscon"; |
| 559 | reg = <0x020e0000 0x38>; |
| 560 | }; |
| 561 | |
Steffen Trumtrar | 41c0434 | 2013-03-28 16:23:35 +0100 | [diff] [blame] | 562 | ldb: ldb@020e0008 { |
| 563 | #address-cells = <1>; |
| 564 | #size-cells = <0>; |
| 565 | compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb"; |
| 566 | gpr = <&gpr>; |
| 567 | status = "disabled"; |
| 568 | |
| 569 | lvds-channel@0 { |
| 570 | reg = <0>; |
| 571 | crtcs = <&ipu1 0>; |
| 572 | status = "disabled"; |
| 573 | }; |
| 574 | |
| 575 | lvds-channel@1 { |
| 576 | reg = <1>; |
| 577 | crtcs = <&ipu1 1>; |
| 578 | status = "disabled"; |
| 579 | }; |
| 580 | }; |
| 581 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 582 | dcic1: dcic@020e4000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 583 | reg = <0x020e4000 0x4000>; |
| 584 | interrupts = <0 124 0x04>; |
| 585 | }; |
| 586 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 587 | dcic2: dcic@020e8000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 588 | reg = <0x020e8000 0x4000>; |
| 589 | interrupts = <0 125 0x04>; |
| 590 | }; |
| 591 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 592 | sdma: sdma@020ec000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 593 | compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma"; |
| 594 | reg = <0x020ec000 0x4000>; |
| 595 | interrupts = <0 2 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 596 | clocks = <&clks 155>, <&clks 155>; |
| 597 | clock-names = "ipg", "ahb"; |
Fabio Estevam | d6b9c59 | 2013-01-17 12:13:25 -0200 | [diff] [blame] | 598 | fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 599 | }; |
| 600 | }; |
| 601 | |
| 602 | aips-bus@02100000 { /* AIPS2 */ |
| 603 | compatible = "fsl,aips-bus", "simple-bus"; |
| 604 | #address-cells = <1>; |
| 605 | #size-cells = <1>; |
| 606 | reg = <0x02100000 0x100000>; |
| 607 | ranges; |
| 608 | |
| 609 | caam@02100000 { |
| 610 | reg = <0x02100000 0x40000>; |
| 611 | interrupts = <0 105 0x04 0 106 0x04>; |
| 612 | }; |
| 613 | |
| 614 | aipstz@0217c000 { /* AIPSTZ2 */ |
| 615 | reg = <0x0217c000 0x4000>; |
| 616 | }; |
| 617 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 618 | usbotg: usb@02184000 { |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 619 | compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; |
| 620 | reg = <0x02184000 0x200>; |
| 621 | interrupts = <0 43 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 622 | clocks = <&clks 162>; |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 623 | fsl,usbphy = <&usbphy1>; |
Richard Zhao | 28342c6 | 2012-09-14 14:42:45 +0800 | [diff] [blame] | 624 | fsl,usbmisc = <&usbmisc 0>; |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 625 | status = "disabled"; |
| 626 | }; |
| 627 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 628 | usbh1: usb@02184200 { |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 629 | compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; |
| 630 | reg = <0x02184200 0x200>; |
| 631 | interrupts = <0 40 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 632 | clocks = <&clks 162>; |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 633 | fsl,usbphy = <&usbphy2>; |
Richard Zhao | 28342c6 | 2012-09-14 14:42:45 +0800 | [diff] [blame] | 634 | fsl,usbmisc = <&usbmisc 1>; |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 635 | status = "disabled"; |
| 636 | }; |
| 637 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 638 | usbh2: usb@02184400 { |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 639 | compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; |
| 640 | reg = <0x02184400 0x200>; |
| 641 | interrupts = <0 41 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 642 | clocks = <&clks 162>; |
Richard Zhao | 28342c6 | 2012-09-14 14:42:45 +0800 | [diff] [blame] | 643 | fsl,usbmisc = <&usbmisc 2>; |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 644 | status = "disabled"; |
| 645 | }; |
| 646 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 647 | usbh3: usb@02184600 { |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 648 | compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; |
| 649 | reg = <0x02184600 0x200>; |
| 650 | interrupts = <0 42 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 651 | clocks = <&clks 162>; |
Richard Zhao | 28342c6 | 2012-09-14 14:42:45 +0800 | [diff] [blame] | 652 | fsl,usbmisc = <&usbmisc 3>; |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 653 | status = "disabled"; |
| 654 | }; |
| 655 | |
Shawn Guo | 60984bd | 2013-04-28 09:59:54 +0800 | [diff] [blame] | 656 | usbmisc: usbmisc@02184800 { |
Richard Zhao | 28342c6 | 2012-09-14 14:42:45 +0800 | [diff] [blame] | 657 | #index-cells = <1>; |
| 658 | compatible = "fsl,imx6q-usbmisc"; |
| 659 | reg = <0x02184800 0x200>; |
| 660 | clocks = <&clks 162>; |
| 661 | }; |
| 662 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 663 | fec: ethernet@02188000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 664 | compatible = "fsl,imx6q-fec"; |
| 665 | reg = <0x02188000 0x4000>; |
| 666 | interrupts = <0 118 0x04 0 119 0x04>; |
Frank Li | 8dd5c66 | 2013-02-05 14:21:06 +0800 | [diff] [blame] | 667 | clocks = <&clks 117>, <&clks 117>, <&clks 190>; |
Frank Li | 7629838 | 2012-10-30 18:24:57 +0000 | [diff] [blame] | 668 | clock-names = "ipg", "ahb", "ptp"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 669 | status = "disabled"; |
| 670 | }; |
| 671 | |
| 672 | mlb@0218c000 { |
| 673 | reg = <0x0218c000 0x4000>; |
| 674 | interrupts = <0 53 0x04 0 117 0x04 0 126 0x04>; |
| 675 | }; |
| 676 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 677 | usdhc1: usdhc@02190000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 678 | compatible = "fsl,imx6q-usdhc"; |
| 679 | reg = <0x02190000 0x4000>; |
| 680 | interrupts = <0 22 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 681 | clocks = <&clks 163>, <&clks 163>, <&clks 163>; |
| 682 | clock-names = "ipg", "ahb", "per"; |
Sascha Hauer | c104b6a | 2012-09-25 11:49:33 +0200 | [diff] [blame] | 683 | bus-width = <4>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 684 | status = "disabled"; |
| 685 | }; |
| 686 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 687 | usdhc2: usdhc@02194000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 688 | compatible = "fsl,imx6q-usdhc"; |
| 689 | reg = <0x02194000 0x4000>; |
| 690 | interrupts = <0 23 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 691 | clocks = <&clks 164>, <&clks 164>, <&clks 164>; |
| 692 | clock-names = "ipg", "ahb", "per"; |
Sascha Hauer | c104b6a | 2012-09-25 11:49:33 +0200 | [diff] [blame] | 693 | bus-width = <4>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 694 | status = "disabled"; |
| 695 | }; |
| 696 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 697 | usdhc3: usdhc@02198000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 698 | compatible = "fsl,imx6q-usdhc"; |
| 699 | reg = <0x02198000 0x4000>; |
| 700 | interrupts = <0 24 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 701 | clocks = <&clks 165>, <&clks 165>, <&clks 165>; |
| 702 | clock-names = "ipg", "ahb", "per"; |
Sascha Hauer | c104b6a | 2012-09-25 11:49:33 +0200 | [diff] [blame] | 703 | bus-width = <4>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 704 | status = "disabled"; |
| 705 | }; |
| 706 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 707 | usdhc4: usdhc@0219c000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 708 | compatible = "fsl,imx6q-usdhc"; |
| 709 | reg = <0x0219c000 0x4000>; |
| 710 | interrupts = <0 25 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 711 | clocks = <&clks 166>, <&clks 166>, <&clks 166>; |
| 712 | clock-names = "ipg", "ahb", "per"; |
Sascha Hauer | c104b6a | 2012-09-25 11:49:33 +0200 | [diff] [blame] | 713 | bus-width = <4>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 714 | status = "disabled"; |
| 715 | }; |
| 716 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 717 | i2c1: i2c@021a0000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 718 | #address-cells = <1>; |
| 719 | #size-cells = <0>; |
Shawn Guo | 5bdfba2 | 2012-09-14 15:19:00 +0800 | [diff] [blame] | 720 | compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 721 | reg = <0x021a0000 0x4000>; |
| 722 | interrupts = <0 36 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 723 | clocks = <&clks 125>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 724 | status = "disabled"; |
| 725 | }; |
| 726 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 727 | i2c2: i2c@021a4000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 728 | #address-cells = <1>; |
| 729 | #size-cells = <0>; |
Shawn Guo | 5bdfba2 | 2012-09-14 15:19:00 +0800 | [diff] [blame] | 730 | compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 731 | reg = <0x021a4000 0x4000>; |
| 732 | interrupts = <0 37 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 733 | clocks = <&clks 126>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 734 | status = "disabled"; |
| 735 | }; |
| 736 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 737 | i2c3: i2c@021a8000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 738 | #address-cells = <1>; |
| 739 | #size-cells = <0>; |
Shawn Guo | 5bdfba2 | 2012-09-14 15:19:00 +0800 | [diff] [blame] | 740 | compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 741 | reg = <0x021a8000 0x4000>; |
| 742 | interrupts = <0 38 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 743 | clocks = <&clks 127>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 744 | status = "disabled"; |
| 745 | }; |
| 746 | |
| 747 | romcp@021ac000 { |
| 748 | reg = <0x021ac000 0x4000>; |
| 749 | }; |
| 750 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 751 | mmdc0: mmdc@021b0000 { /* MMDC0 */ |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 752 | compatible = "fsl,imx6q-mmdc"; |
| 753 | reg = <0x021b0000 0x4000>; |
| 754 | }; |
| 755 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 756 | mmdc1: mmdc@021b4000 { /* MMDC1 */ |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 757 | reg = <0x021b4000 0x4000>; |
| 758 | }; |
| 759 | |
Huang Shijie | 05e3f8e | 2013-05-28 14:20:09 +0800 | [diff] [blame] | 760 | weim: weim@021b8000 { |
| 761 | compatible = "fsl,imx6q-weim"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 762 | reg = <0x021b8000 0x4000>; |
| 763 | interrupts = <0 14 0x04>; |
Huang Shijie | 05e3f8e | 2013-05-28 14:20:09 +0800 | [diff] [blame] | 764 | clocks = <&clks 196>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 765 | }; |
| 766 | |
| 767 | ocotp@021bc000 { |
Shawn Guo | 96574a6 | 2013-01-08 14:25:14 +0800 | [diff] [blame] | 768 | compatible = "fsl,imx6q-ocotp"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 769 | reg = <0x021bc000 0x4000>; |
| 770 | }; |
| 771 | |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 772 | tzasc@021d0000 { /* TZASC1 */ |
| 773 | reg = <0x021d0000 0x4000>; |
| 774 | interrupts = <0 108 0x04>; |
| 775 | }; |
| 776 | |
| 777 | tzasc@021d4000 { /* TZASC2 */ |
| 778 | reg = <0x021d4000 0x4000>; |
| 779 | interrupts = <0 109 0x04>; |
| 780 | }; |
| 781 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 782 | audmux: audmux@021d8000 { |
Richard Zhao | f965cd5 | 2012-05-02 10:32:26 +0800 | [diff] [blame] | 783 | compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 784 | reg = <0x021d8000 0x4000>; |
Richard Zhao | f965cd5 | 2012-05-02 10:32:26 +0800 | [diff] [blame] | 785 | status = "disabled"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 786 | }; |
| 787 | |
| 788 | mipi@021dc000 { /* MIPI-CSI */ |
| 789 | reg = <0x021dc000 0x4000>; |
| 790 | }; |
| 791 | |
| 792 | mipi@021e0000 { /* MIPI-DSI */ |
| 793 | reg = <0x021e0000 0x4000>; |
| 794 | }; |
| 795 | |
| 796 | vdoa@021e4000 { |
| 797 | reg = <0x021e4000 0x4000>; |
| 798 | interrupts = <0 18 0x04>; |
| 799 | }; |
| 800 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 801 | uart2: serial@021e8000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 802 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
| 803 | reg = <0x021e8000 0x4000>; |
| 804 | interrupts = <0 27 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 805 | clocks = <&clks 160>, <&clks 161>; |
| 806 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 807 | status = "disabled"; |
| 808 | }; |
| 809 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 810 | uart3: serial@021ec000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 811 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
| 812 | reg = <0x021ec000 0x4000>; |
| 813 | interrupts = <0 28 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 814 | clocks = <&clks 160>, <&clks 161>; |
| 815 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 816 | status = "disabled"; |
| 817 | }; |
| 818 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 819 | uart4: serial@021f0000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 820 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
| 821 | reg = <0x021f0000 0x4000>; |
| 822 | interrupts = <0 29 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 823 | clocks = <&clks 160>, <&clks 161>; |
| 824 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 825 | status = "disabled"; |
| 826 | }; |
| 827 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 828 | uart5: serial@021f4000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 829 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
| 830 | reg = <0x021f4000 0x4000>; |
| 831 | interrupts = <0 30 0x04>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 832 | clocks = <&clks 160>, <&clks 161>; |
| 833 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 834 | status = "disabled"; |
| 835 | }; |
| 836 | }; |
Sascha Hauer | 91660d7 | 2012-11-12 15:52:21 +0100 | [diff] [blame] | 837 | |
| 838 | ipu1: ipu@02400000 { |
| 839 | #crtc-cells = <1>; |
| 840 | compatible = "fsl,imx6q-ipu"; |
| 841 | reg = <0x02400000 0x400000>; |
| 842 | interrupts = <0 6 0x4 0 5 0x4>; |
| 843 | clocks = <&clks 130>, <&clks 131>, <&clks 132>; |
| 844 | clock-names = "bus", "di0", "di1"; |
Philipp Zabel | 09ebf36 | 2013-03-28 17:35:20 +0100 | [diff] [blame] | 845 | resets = <&src 2>; |
Sascha Hauer | 91660d7 | 2012-11-12 15:52:21 +0100 | [diff] [blame] | 846 | }; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 847 | }; |
| 848 | }; |