Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Based on arch/arm/mm/mmu.c |
| 3 | * |
| 4 | * Copyright (C) 1995-2005 Russell King |
| 5 | * Copyright (C) 2012 ARM Ltd. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 18 | */ |
| 19 | |
Jisheng Zhang | 5a9e3e1 | 2016-08-15 14:45:46 +0800 | [diff] [blame] | 20 | #include <linux/cache.h> |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 21 | #include <linux/export.h> |
| 22 | #include <linux/kernel.h> |
| 23 | #include <linux/errno.h> |
| 24 | #include <linux/init.h> |
Takahiro Akashi | 98d2e15 | 2017-04-03 11:24:34 +0900 | [diff] [blame] | 25 | #include <linux/ioport.h> |
| 26 | #include <linux/kexec.h> |
Ard Biesheuvel | 61bd93c | 2015-06-01 13:40:32 +0200 | [diff] [blame] | 27 | #include <linux/libfdt.h> |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 28 | #include <linux/mman.h> |
| 29 | #include <linux/nodemask.h> |
| 30 | #include <linux/memblock.h> |
| 31 | #include <linux/fs.h> |
Catalin Marinas | 2475ff9 | 2012-10-23 14:55:08 +0100 | [diff] [blame] | 32 | #include <linux/io.h> |
Laura Abbott | 2077be6 | 2017-01-10 13:35:49 -0800 | [diff] [blame] | 33 | #include <linux/mm.h> |
Tobias Klauser | 6efd849 | 2017-05-15 13:40:20 +0200 | [diff] [blame] | 34 | #include <linux/vmalloc.h> |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 35 | |
Mark Rutland | 21ab99c | 2016-01-25 11:44:56 +0000 | [diff] [blame] | 36 | #include <asm/barrier.h> |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 37 | #include <asm/cputype.h> |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 38 | #include <asm/fixmap.h> |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 39 | #include <asm/kasan.h> |
Suzuki K. Poulose | b433dce | 2015-10-19 14:19:28 +0100 | [diff] [blame] | 40 | #include <asm/kernel-pgtable.h> |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 41 | #include <asm/sections.h> |
| 42 | #include <asm/setup.h> |
| 43 | #include <asm/sizes.h> |
| 44 | #include <asm/tlb.h> |
Jungseok Lee | c79b954 | 2014-05-12 18:40:51 +0900 | [diff] [blame] | 45 | #include <asm/memblock.h> |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 46 | #include <asm/mmu_context.h> |
Laura Abbott | 1404d6f | 2016-10-27 09:27:34 -0700 | [diff] [blame] | 47 | #include <asm/ptdump.h> |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 48 | |
Ard Biesheuvel | c095136 | 2017-03-09 21:52:07 +0100 | [diff] [blame] | 49 | #define NO_BLOCK_MAPPINGS BIT(0) |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 50 | #define NO_CONT_MAPPINGS BIT(1) |
Ard Biesheuvel | c095136 | 2017-03-09 21:52:07 +0100 | [diff] [blame] | 51 | |
Ard Biesheuvel | dd006da | 2015-03-19 16:42:27 +0000 | [diff] [blame] | 52 | u64 idmap_t0sz = TCR_T0SZ(VA_BITS); |
Kristina Martsenko | fa2a844 | 2017-12-13 17:07:24 +0000 | [diff] [blame] | 53 | u64 idmap_ptrs_per_pgd = PTRS_PER_PGD; |
Ard Biesheuvel | dd006da | 2015-03-19 16:42:27 +0000 | [diff] [blame] | 54 | |
Jisheng Zhang | 5a9e3e1 | 2016-08-15 14:45:46 +0800 | [diff] [blame] | 55 | u64 kimage_voffset __ro_after_init; |
Ard Biesheuvel | a7f8de1 | 2016-02-16 13:52:42 +0100 | [diff] [blame] | 56 | EXPORT_SYMBOL(kimage_voffset); |
| 57 | |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 58 | /* |
| 59 | * Empty_zero_page is a special page that is used for zero-initialized data |
| 60 | * and COW. |
| 61 | */ |
Mark Rutland | 5227cfa | 2016-01-25 11:44:57 +0000 | [diff] [blame] | 62 | unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] __page_aligned_bss; |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 63 | EXPORT_SYMBOL(empty_zero_page); |
| 64 | |
Ard Biesheuvel | f904077 | 2016-02-16 13:52:40 +0100 | [diff] [blame] | 65 | static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss; |
| 66 | static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss __maybe_unused; |
| 67 | static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss __maybe_unused; |
| 68 | |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 69 | pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, |
| 70 | unsigned long size, pgprot_t vma_prot) |
| 71 | { |
| 72 | if (!pfn_valid(pfn)) |
| 73 | return pgprot_noncached(vma_prot); |
| 74 | else if (file->f_flags & O_SYNC) |
| 75 | return pgprot_writecombine(vma_prot); |
| 76 | return vma_prot; |
| 77 | } |
| 78 | EXPORT_SYMBOL(phys_mem_access_prot); |
| 79 | |
Mark Rutland | f471044 | 2016-01-25 11:45:08 +0000 | [diff] [blame] | 80 | static phys_addr_t __init early_pgtable_alloc(void) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 81 | { |
Suzuki K. Poulose | 7142392 | 2015-11-20 17:45:40 +0000 | [diff] [blame] | 82 | phys_addr_t phys; |
| 83 | void *ptr; |
| 84 | |
Mark Rutland | 21ab99c | 2016-01-25 11:44:56 +0000 | [diff] [blame] | 85 | phys = memblock_alloc(PAGE_SIZE, PAGE_SIZE); |
Mark Rutland | f471044 | 2016-01-25 11:45:08 +0000 | [diff] [blame] | 86 | |
| 87 | /* |
| 88 | * The FIX_{PGD,PUD,PMD} slots may be in active use, but the FIX_PTE |
| 89 | * slot will be free, so we can (ab)use the FIX_PTE slot to initialise |
| 90 | * any level of table. |
| 91 | */ |
| 92 | ptr = pte_set_fixmap(phys); |
| 93 | |
Mark Rutland | 21ab99c | 2016-01-25 11:44:56 +0000 | [diff] [blame] | 94 | memset(ptr, 0, PAGE_SIZE); |
| 95 | |
Mark Rutland | f471044 | 2016-01-25 11:45:08 +0000 | [diff] [blame] | 96 | /* |
| 97 | * Implicit barriers also ensure the zeroed page is visible to the page |
| 98 | * table walker |
| 99 | */ |
| 100 | pte_clear_fixmap(); |
| 101 | |
| 102 | return phys; |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 103 | } |
| 104 | |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 105 | static bool pgattr_change_is_safe(u64 old, u64 new) |
| 106 | { |
| 107 | /* |
| 108 | * The following mapping attributes may be updated in live |
| 109 | * kernel mappings without the need for break-before-make. |
| 110 | */ |
Ard Biesheuvel | 753e8ab | 2018-02-23 18:04:48 +0000 | [diff] [blame] | 111 | static const pteval_t mask = PTE_PXN | PTE_RDONLY | PTE_WRITE | PTE_NG; |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 112 | |
Ard Biesheuvel | 141d149 | 2017-03-09 21:52:06 +0100 | [diff] [blame] | 113 | /* creating or taking down mappings is always safe */ |
| 114 | if (old == 0 || new == 0) |
| 115 | return true; |
| 116 | |
| 117 | /* live contiguous mappings may not be manipulated at all */ |
| 118 | if ((old | new) & PTE_CONT) |
| 119 | return false; |
| 120 | |
Ard Biesheuvel | 753e8ab | 2018-02-23 18:04:48 +0000 | [diff] [blame] | 121 | /* Transitioning from Non-Global to Global is unsafe */ |
| 122 | if (old & ~new & PTE_NG) |
| 123 | return false; |
Will Deacon | 4e60205 | 2018-01-29 11:59:54 +0000 | [diff] [blame] | 124 | |
Ard Biesheuvel | 141d149 | 2017-03-09 21:52:06 +0100 | [diff] [blame] | 125 | return ((old ^ new) & ~mask) == 0; |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 126 | } |
| 127 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 128 | static void init_pte(pmd_t *pmdp, unsigned long addr, unsigned long end, |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 129 | phys_addr_t phys, pgprot_t prot) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 130 | { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 131 | pte_t *ptep; |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 132 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 133 | ptep = pte_set_fixmap_offset(pmdp, addr); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 134 | do { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 135 | pte_t old_pte = READ_ONCE(*ptep); |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 136 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 137 | set_pte(ptep, pfn_pte(__phys_to_pfn(phys), prot)); |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 138 | |
| 139 | /* |
| 140 | * After the PTE entry has been populated once, we |
| 141 | * only allow updates to the permission attributes. |
| 142 | */ |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 143 | BUG_ON(!pgattr_change_is_safe(pte_val(old_pte), |
| 144 | READ_ONCE(pte_val(*ptep)))); |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 145 | |
Ard Biesheuvel | e393cf4 | 2017-03-09 21:52:04 +0100 | [diff] [blame] | 146 | phys += PAGE_SIZE; |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 147 | } while (ptep++, addr += PAGE_SIZE, addr != end); |
Mark Rutland | f471044 | 2016-01-25 11:45:08 +0000 | [diff] [blame] | 148 | |
| 149 | pte_clear_fixmap(); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 150 | } |
| 151 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 152 | static void alloc_init_cont_pte(pmd_t *pmdp, unsigned long addr, |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 153 | unsigned long end, phys_addr_t phys, |
| 154 | pgprot_t prot, |
| 155 | phys_addr_t (*pgtable_alloc)(void), |
| 156 | int flags) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 157 | { |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 158 | unsigned long next; |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 159 | pmd_t pmd = READ_ONCE(*pmdp); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 160 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 161 | BUG_ON(pmd_sect(pmd)); |
| 162 | if (pmd_none(pmd)) { |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 163 | phys_addr_t pte_phys; |
Laura Abbott | 132233a | 2016-02-05 16:24:46 -0800 | [diff] [blame] | 164 | BUG_ON(!pgtable_alloc); |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 165 | pte_phys = pgtable_alloc(); |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 166 | __pmd_populate(pmdp, pte_phys, PMD_TYPE_TABLE); |
| 167 | pmd = READ_ONCE(*pmdp); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 168 | } |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 169 | BUG_ON(pmd_bad(pmd)); |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 170 | |
| 171 | do { |
| 172 | pgprot_t __prot = prot; |
| 173 | |
| 174 | next = pte_cont_addr_end(addr, end); |
| 175 | |
| 176 | /* use a contiguous mapping if the range is suitably aligned */ |
| 177 | if ((((addr | next | phys) & ~CONT_PTE_MASK) == 0) && |
| 178 | (flags & NO_CONT_MAPPINGS) == 0) |
| 179 | __prot = __pgprot(pgprot_val(prot) | PTE_CONT); |
| 180 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 181 | init_pte(pmdp, addr, next, phys, __prot); |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 182 | |
| 183 | phys += next - addr; |
| 184 | } while (addr = next, addr != end); |
| 185 | } |
| 186 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 187 | static void init_pmd(pud_t *pudp, unsigned long addr, unsigned long end, |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 188 | phys_addr_t phys, pgprot_t prot, |
| 189 | phys_addr_t (*pgtable_alloc)(void), int flags) |
| 190 | { |
| 191 | unsigned long next; |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 192 | pmd_t *pmdp; |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 193 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 194 | pmdp = pmd_set_fixmap_offset(pudp, addr); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 195 | do { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 196 | pmd_t old_pmd = READ_ONCE(*pmdp); |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 197 | |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 198 | next = pmd_addr_end(addr, end); |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 199 | |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 200 | /* try section mapping first */ |
Laura Abbott | 83863f2 | 2016-02-05 16:24:47 -0800 | [diff] [blame] | 201 | if (((addr | next | phys) & ~SECTION_MASK) == 0 && |
Ard Biesheuvel | c095136 | 2017-03-09 21:52:07 +0100 | [diff] [blame] | 202 | (flags & NO_BLOCK_MAPPINGS) == 0) { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 203 | pmd_set_huge(pmdp, phys, prot); |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 204 | |
Catalin Marinas | a55f992 | 2014-02-04 16:01:31 +0000 | [diff] [blame] | 205 | /* |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 206 | * After the PMD entry has been populated once, we |
| 207 | * only allow updates to the permission attributes. |
Catalin Marinas | a55f992 | 2014-02-04 16:01:31 +0000 | [diff] [blame] | 208 | */ |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 209 | BUG_ON(!pgattr_change_is_safe(pmd_val(old_pmd), |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 210 | READ_ONCE(pmd_val(*pmdp)))); |
Catalin Marinas | a55f992 | 2014-02-04 16:01:31 +0000 | [diff] [blame] | 211 | } else { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 212 | alloc_init_cont_pte(pmdp, addr, next, phys, prot, |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 213 | pgtable_alloc, flags); |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 214 | |
| 215 | BUG_ON(pmd_val(old_pmd) != 0 && |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 216 | pmd_val(old_pmd) != READ_ONCE(pmd_val(*pmdp))); |
Catalin Marinas | a55f992 | 2014-02-04 16:01:31 +0000 | [diff] [blame] | 217 | } |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 218 | phys += next - addr; |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 219 | } while (pmdp++, addr = next, addr != end); |
Mark Rutland | f471044 | 2016-01-25 11:45:08 +0000 | [diff] [blame] | 220 | |
| 221 | pmd_clear_fixmap(); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 222 | } |
| 223 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 224 | static void alloc_init_cont_pmd(pud_t *pudp, unsigned long addr, |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 225 | unsigned long end, phys_addr_t phys, |
| 226 | pgprot_t prot, |
| 227 | phys_addr_t (*pgtable_alloc)(void), int flags) |
| 228 | { |
| 229 | unsigned long next; |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 230 | pud_t pud = READ_ONCE(*pudp); |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 231 | |
| 232 | /* |
| 233 | * Check for initial section mappings in the pgd/pud. |
| 234 | */ |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 235 | BUG_ON(pud_sect(pud)); |
| 236 | if (pud_none(pud)) { |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 237 | phys_addr_t pmd_phys; |
| 238 | BUG_ON(!pgtable_alloc); |
| 239 | pmd_phys = pgtable_alloc(); |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 240 | __pud_populate(pudp, pmd_phys, PUD_TYPE_TABLE); |
| 241 | pud = READ_ONCE(*pudp); |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 242 | } |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 243 | BUG_ON(pud_bad(pud)); |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 244 | |
| 245 | do { |
| 246 | pgprot_t __prot = prot; |
| 247 | |
| 248 | next = pmd_cont_addr_end(addr, end); |
| 249 | |
| 250 | /* use a contiguous mapping if the range is suitably aligned */ |
| 251 | if ((((addr | next | phys) & ~CONT_PMD_MASK) == 0) && |
| 252 | (flags & NO_CONT_MAPPINGS) == 0) |
| 253 | __prot = __pgprot(pgprot_val(prot) | PTE_CONT); |
| 254 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 255 | init_pmd(pudp, addr, next, phys, __prot, pgtable_alloc, flags); |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 256 | |
| 257 | phys += next - addr; |
| 258 | } while (addr = next, addr != end); |
| 259 | } |
| 260 | |
Laura Abbott | da14170 | 2015-01-21 17:36:06 -0800 | [diff] [blame] | 261 | static inline bool use_1G_block(unsigned long addr, unsigned long next, |
| 262 | unsigned long phys) |
| 263 | { |
| 264 | if (PAGE_SHIFT != 12) |
| 265 | return false; |
| 266 | |
| 267 | if (((addr | next | phys) & ~PUD_MASK) != 0) |
| 268 | return false; |
| 269 | |
| 270 | return true; |
| 271 | } |
| 272 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 273 | static void alloc_init_pud(pgd_t *pgdp, unsigned long addr, unsigned long end, |
| 274 | phys_addr_t phys, pgprot_t prot, |
| 275 | phys_addr_t (*pgtable_alloc)(void), |
| 276 | int flags) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 277 | { |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 278 | unsigned long next; |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 279 | pud_t *pudp; |
| 280 | pgd_t pgd = READ_ONCE(*pgdp); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 281 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 282 | if (pgd_none(pgd)) { |
Laura Abbott | 132233a | 2016-02-05 16:24:46 -0800 | [diff] [blame] | 283 | phys_addr_t pud_phys; |
| 284 | BUG_ON(!pgtable_alloc); |
| 285 | pud_phys = pgtable_alloc(); |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 286 | __pgd_populate(pgdp, pud_phys, PUD_TYPE_TABLE); |
| 287 | pgd = READ_ONCE(*pgdp); |
Jungseok Lee | c79b954 | 2014-05-12 18:40:51 +0900 | [diff] [blame] | 288 | } |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 289 | BUG_ON(pgd_bad(pgd)); |
Jungseok Lee | c79b954 | 2014-05-12 18:40:51 +0900 | [diff] [blame] | 290 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 291 | pudp = pud_set_fixmap_offset(pgdp, addr); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 292 | do { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 293 | pud_t old_pud = READ_ONCE(*pudp); |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 294 | |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 295 | next = pud_addr_end(addr, end); |
Steve Capper | 206a2a7 | 2014-05-06 14:02:27 +0100 | [diff] [blame] | 296 | |
| 297 | /* |
| 298 | * For 4K granule only, attempt to put down a 1GB block |
| 299 | */ |
Ard Biesheuvel | c095136 | 2017-03-09 21:52:07 +0100 | [diff] [blame] | 300 | if (use_1G_block(addr, next, phys) && |
| 301 | (flags & NO_BLOCK_MAPPINGS) == 0) { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 302 | pud_set_huge(pudp, phys, prot); |
Steve Capper | 206a2a7 | 2014-05-06 14:02:27 +0100 | [diff] [blame] | 303 | |
| 304 | /* |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 305 | * After the PUD entry has been populated once, we |
| 306 | * only allow updates to the permission attributes. |
Steve Capper | 206a2a7 | 2014-05-06 14:02:27 +0100 | [diff] [blame] | 307 | */ |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 308 | BUG_ON(!pgattr_change_is_safe(pud_val(old_pud), |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 309 | READ_ONCE(pud_val(*pudp)))); |
Steve Capper | 206a2a7 | 2014-05-06 14:02:27 +0100 | [diff] [blame] | 310 | } else { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 311 | alloc_init_cont_pmd(pudp, addr, next, phys, prot, |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 312 | pgtable_alloc, flags); |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 313 | |
| 314 | BUG_ON(pud_val(old_pud) != 0 && |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 315 | pud_val(old_pud) != READ_ONCE(pud_val(*pudp))); |
Steve Capper | 206a2a7 | 2014-05-06 14:02:27 +0100 | [diff] [blame] | 316 | } |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 317 | phys += next - addr; |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 318 | } while (pudp++, addr = next, addr != end); |
Mark Rutland | f471044 | 2016-01-25 11:45:08 +0000 | [diff] [blame] | 319 | |
| 320 | pud_clear_fixmap(); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 321 | } |
| 322 | |
Ard Biesheuvel | 40f87d3 | 2016-06-29 14:51:30 +0200 | [diff] [blame] | 323 | static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys, |
| 324 | unsigned long virt, phys_addr_t size, |
| 325 | pgprot_t prot, |
| 326 | phys_addr_t (*pgtable_alloc)(void), |
Ard Biesheuvel | c095136 | 2017-03-09 21:52:07 +0100 | [diff] [blame] | 327 | int flags) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 328 | { |
| 329 | unsigned long addr, length, end, next; |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 330 | pgd_t *pgdp = pgd_offset_raw(pgdir, virt); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 331 | |
Mark Rutland | cc5d2b3 | 2015-11-23 13:26:19 +0000 | [diff] [blame] | 332 | /* |
| 333 | * If the virtual and physical address don't have the same offset |
| 334 | * within a page, we cannot map the region as the caller expects. |
| 335 | */ |
| 336 | if (WARN_ON((phys ^ virt) & ~PAGE_MASK)) |
| 337 | return; |
| 338 | |
Mark Rutland | 9c4e08a | 2015-11-23 13:26:20 +0000 | [diff] [blame] | 339 | phys &= PAGE_MASK; |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 340 | addr = virt & PAGE_MASK; |
| 341 | length = PAGE_ALIGN(size + (virt & ~PAGE_MASK)); |
| 342 | |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 343 | end = addr + length; |
| 344 | do { |
| 345 | next = pgd_addr_end(addr, end); |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 346 | alloc_init_pud(pgdp, addr, next, phys, prot, pgtable_alloc, |
Ard Biesheuvel | c095136 | 2017-03-09 21:52:07 +0100 | [diff] [blame] | 347 | flags); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 348 | phys += next - addr; |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 349 | } while (pgdp++, addr = next, addr != end); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 350 | } |
| 351 | |
Ard Biesheuvel | 1378dc3 | 2016-07-22 19:32:25 +0200 | [diff] [blame] | 352 | static phys_addr_t pgd_pgtable_alloc(void) |
Laura Abbott | da14170 | 2015-01-21 17:36:06 -0800 | [diff] [blame] | 353 | { |
Mark Rutland | 21ab99c | 2016-01-25 11:44:56 +0000 | [diff] [blame] | 354 | void *ptr = (void *)__get_free_page(PGALLOC_GFP); |
Ard Biesheuvel | 1378dc3 | 2016-07-22 19:32:25 +0200 | [diff] [blame] | 355 | if (!ptr || !pgtable_page_ctor(virt_to_page(ptr))) |
| 356 | BUG(); |
Mark Rutland | 21ab99c | 2016-01-25 11:44:56 +0000 | [diff] [blame] | 357 | |
| 358 | /* Ensure the zeroed page is visible to the page table walker */ |
| 359 | dsb(ishst); |
Mark Rutland | f471044 | 2016-01-25 11:45:08 +0000 | [diff] [blame] | 360 | return __pa(ptr); |
Laura Abbott | da14170 | 2015-01-21 17:36:06 -0800 | [diff] [blame] | 361 | } |
| 362 | |
Laura Abbott | 132233a | 2016-02-05 16:24:46 -0800 | [diff] [blame] | 363 | /* |
| 364 | * This function can only be used to modify existing table entries, |
| 365 | * without allocating new levels of table. Note that this permits the |
| 366 | * creation of new section or page entries. |
| 367 | */ |
| 368 | static void __init create_mapping_noalloc(phys_addr_t phys, unsigned long virt, |
Laura Abbott | da14170 | 2015-01-21 17:36:06 -0800 | [diff] [blame] | 369 | phys_addr_t size, pgprot_t prot) |
Mark Salter | d7ecbdd | 2014-03-12 12:28:06 -0400 | [diff] [blame] | 370 | { |
| 371 | if (virt < VMALLOC_START) { |
| 372 | pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", |
| 373 | &phys, virt); |
| 374 | return; |
| 375 | } |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 376 | __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, |
| 377 | NO_CONT_MAPPINGS); |
Mark Salter | d7ecbdd | 2014-03-12 12:28:06 -0400 | [diff] [blame] | 378 | } |
| 379 | |
Ard Biesheuvel | 8ce837c | 2014-10-20 15:42:07 +0200 | [diff] [blame] | 380 | void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys, |
| 381 | unsigned long virt, phys_addr_t size, |
Ard Biesheuvel | f14c66c | 2016-10-21 12:22:57 +0100 | [diff] [blame] | 382 | pgprot_t prot, bool page_mappings_only) |
Ard Biesheuvel | 8ce837c | 2014-10-20 15:42:07 +0200 | [diff] [blame] | 383 | { |
Ard Biesheuvel | c095136 | 2017-03-09 21:52:07 +0100 | [diff] [blame] | 384 | int flags = 0; |
| 385 | |
Ard Biesheuvel | 1378dc3 | 2016-07-22 19:32:25 +0200 | [diff] [blame] | 386 | BUG_ON(mm == &init_mm); |
| 387 | |
Ard Biesheuvel | c095136 | 2017-03-09 21:52:07 +0100 | [diff] [blame] | 388 | if (page_mappings_only) |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 389 | flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS; |
Ard Biesheuvel | c095136 | 2017-03-09 21:52:07 +0100 | [diff] [blame] | 390 | |
Mark Rutland | 11509a3 | 2016-01-25 11:45:10 +0000 | [diff] [blame] | 391 | __create_pgd_mapping(mm->pgd, phys, virt, size, prot, |
Ard Biesheuvel | c095136 | 2017-03-09 21:52:07 +0100 | [diff] [blame] | 392 | pgd_pgtable_alloc, flags); |
Mark Salter | d7ecbdd | 2014-03-12 12:28:06 -0400 | [diff] [blame] | 393 | } |
| 394 | |
Ard Biesheuvel | aa8c09b | 2017-03-09 21:52:00 +0100 | [diff] [blame] | 395 | static void update_mapping_prot(phys_addr_t phys, unsigned long virt, |
| 396 | phys_addr_t size, pgprot_t prot) |
Laura Abbott | da14170 | 2015-01-21 17:36:06 -0800 | [diff] [blame] | 397 | { |
| 398 | if (virt < VMALLOC_START) { |
Ard Biesheuvel | aa8c09b | 2017-03-09 21:52:00 +0100 | [diff] [blame] | 399 | pr_warn("BUG: not updating mapping for %pa at 0x%016lx - outside kernel range\n", |
Laura Abbott | da14170 | 2015-01-21 17:36:06 -0800 | [diff] [blame] | 400 | &phys, virt); |
| 401 | return; |
| 402 | } |
| 403 | |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 404 | __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, |
| 405 | NO_CONT_MAPPINGS); |
Ard Biesheuvel | aa8c09b | 2017-03-09 21:52:00 +0100 | [diff] [blame] | 406 | |
| 407 | /* flush the TLBs after updating live kernel mappings */ |
| 408 | flush_tlb_kernel_range(virt, virt + size); |
Laura Abbott | da14170 | 2015-01-21 17:36:06 -0800 | [diff] [blame] | 409 | } |
| 410 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 411 | static void __init __map_memblock(pgd_t *pgdp, phys_addr_t start, |
Takahiro Akashi | 98d2e15 | 2017-04-03 11:24:34 +0900 | [diff] [blame] | 412 | phys_addr_t end, pgprot_t prot, int flags) |
Laura Abbott | da14170 | 2015-01-21 17:36:06 -0800 | [diff] [blame] | 413 | { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 414 | __create_pgd_mapping(pgdp, start, __phys_to_virt(start), end - start, |
Takahiro Akashi | 98d2e15 | 2017-04-03 11:24:34 +0900 | [diff] [blame] | 415 | prot, early_pgtable_alloc, flags); |
Laura Abbott | da14170 | 2015-01-21 17:36:06 -0800 | [diff] [blame] | 416 | } |
Laura Abbott | da14170 | 2015-01-21 17:36:06 -0800 | [diff] [blame] | 417 | |
Ard Biesheuvel | 5ea5306 | 2017-03-09 21:52:01 +0100 | [diff] [blame] | 418 | void __init mark_linear_text_alias_ro(void) |
| 419 | { |
| 420 | /* |
| 421 | * Remove the write permissions from the linear alias of .text/.rodata |
| 422 | */ |
| 423 | update_mapping_prot(__pa_symbol(_text), (unsigned long)lm_alias(_text), |
| 424 | (unsigned long)__init_begin - (unsigned long)_text, |
| 425 | PAGE_KERNEL_RO); |
| 426 | } |
| 427 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 428 | static void __init map_mem(pgd_t *pgdp) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 429 | { |
Takahiro Akashi | 98d2e15 | 2017-04-03 11:24:34 +0900 | [diff] [blame] | 430 | phys_addr_t kernel_start = __pa_symbol(_text); |
| 431 | phys_addr_t kernel_end = __pa_symbol(__init_begin); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 432 | struct memblock_region *reg; |
Takahiro Akashi | 98d2e15 | 2017-04-03 11:24:34 +0900 | [diff] [blame] | 433 | int flags = 0; |
| 434 | |
| 435 | if (debug_pagealloc_enabled()) |
| 436 | flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS; |
| 437 | |
| 438 | /* |
| 439 | * Take care not to create a writable alias for the |
| 440 | * read-only text and rodata sections of the kernel image. |
| 441 | * So temporarily mark them as NOMAP to skip mappings in |
| 442 | * the following for-loop |
| 443 | */ |
| 444 | memblock_mark_nomap(kernel_start, kernel_end - kernel_start); |
| 445 | #ifdef CONFIG_KEXEC_CORE |
| 446 | if (crashk_res.end) |
| 447 | memblock_mark_nomap(crashk_res.start, |
| 448 | resource_size(&crashk_res)); |
| 449 | #endif |
Steve Capper | f6bc87c | 2013-04-30 11:00:33 +0100 | [diff] [blame] | 450 | |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 451 | /* map all the memory banks */ |
| 452 | for_each_memblock(memory, reg) { |
| 453 | phys_addr_t start = reg->base; |
| 454 | phys_addr_t end = start + reg->size; |
| 455 | |
| 456 | if (start >= end) |
| 457 | break; |
Ard Biesheuvel | 68709f4 | 2015-11-30 13:28:16 +0100 | [diff] [blame] | 458 | if (memblock_is_nomap(reg)) |
| 459 | continue; |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 460 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 461 | __map_memblock(pgdp, start, end, PAGE_KERNEL, flags); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 462 | } |
Takahiro Akashi | 98d2e15 | 2017-04-03 11:24:34 +0900 | [diff] [blame] | 463 | |
| 464 | /* |
| 465 | * Map the linear alias of the [_text, __init_begin) interval |
| 466 | * as non-executable now, and remove the write permission in |
| 467 | * mark_linear_text_alias_ro() below (which will be called after |
| 468 | * alternative patching has completed). This makes the contents |
| 469 | * of the region accessible to subsystems such as hibernate, |
| 470 | * but protects it from inadvertent modification or execution. |
| 471 | * Note that contiguous mappings cannot be remapped in this way, |
| 472 | * so we should avoid them here. |
| 473 | */ |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 474 | __map_memblock(pgdp, kernel_start, kernel_end, |
Takahiro Akashi | 98d2e15 | 2017-04-03 11:24:34 +0900 | [diff] [blame] | 475 | PAGE_KERNEL, NO_CONT_MAPPINGS); |
| 476 | memblock_clear_nomap(kernel_start, kernel_end - kernel_start); |
| 477 | |
| 478 | #ifdef CONFIG_KEXEC_CORE |
| 479 | /* |
| 480 | * Use page-level mappings here so that we can shrink the region |
| 481 | * in page granularity and put back unused memory to buddy system |
| 482 | * through /sys/kernel/kexec_crash_size interface. |
| 483 | */ |
| 484 | if (crashk_res.end) { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 485 | __map_memblock(pgdp, crashk_res.start, crashk_res.end + 1, |
Takahiro Akashi | 98d2e15 | 2017-04-03 11:24:34 +0900 | [diff] [blame] | 486 | PAGE_KERNEL, |
| 487 | NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS); |
| 488 | memblock_clear_nomap(crashk_res.start, |
| 489 | resource_size(&crashk_res)); |
| 490 | } |
| 491 | #endif |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 492 | } |
| 493 | |
Laura Abbott | da14170 | 2015-01-21 17:36:06 -0800 | [diff] [blame] | 494 | void mark_rodata_ro(void) |
| 495 | { |
Jeremy Linton | 2f39b5f | 2016-02-19 11:50:32 -0600 | [diff] [blame] | 496 | unsigned long section_size; |
Ard Biesheuvel | f904077 | 2016-02-16 13:52:40 +0100 | [diff] [blame] | 497 | |
Jeremy Linton | 2f39b5f | 2016-02-19 11:50:32 -0600 | [diff] [blame] | 498 | /* |
Ard Biesheuvel | 9fdc14c5 | 2016-06-23 15:53:17 +0200 | [diff] [blame] | 499 | * mark .rodata as read only. Use __init_begin rather than __end_rodata |
| 500 | * to cover NOTES and EXCEPTION_TABLE. |
Jeremy Linton | 2f39b5f | 2016-02-19 11:50:32 -0600 | [diff] [blame] | 501 | */ |
Ard Biesheuvel | 9fdc14c5 | 2016-06-23 15:53:17 +0200 | [diff] [blame] | 502 | section_size = (unsigned long)__init_begin - (unsigned long)__start_rodata; |
Ard Biesheuvel | aa8c09b | 2017-03-09 21:52:00 +0100 | [diff] [blame] | 503 | update_mapping_prot(__pa_symbol(__start_rodata), (unsigned long)__start_rodata, |
Jeremy Linton | 2f39b5f | 2016-02-19 11:50:32 -0600 | [diff] [blame] | 504 | section_size, PAGE_KERNEL_RO); |
Ard Biesheuvel | e98216b | 2016-10-21 12:22:56 +0100 | [diff] [blame] | 505 | |
Laura Abbott | 1404d6f | 2016-10-27 09:27:34 -0700 | [diff] [blame] | 506 | debug_checkwx(); |
Laura Abbott | da14170 | 2015-01-21 17:36:06 -0800 | [diff] [blame] | 507 | } |
Laura Abbott | da14170 | 2015-01-21 17:36:06 -0800 | [diff] [blame] | 508 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 509 | static void __init map_kernel_segment(pgd_t *pgdp, void *va_start, void *va_end, |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 510 | pgprot_t prot, struct vm_struct *vma, |
Will Deacon | 92bbd16 | 2017-07-24 11:46:09 +0100 | [diff] [blame] | 511 | int flags, unsigned long vm_flags) |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 512 | { |
Laura Abbott | 2077be6 | 2017-01-10 13:35:49 -0800 | [diff] [blame] | 513 | phys_addr_t pa_start = __pa_symbol(va_start); |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 514 | unsigned long size = va_end - va_start; |
| 515 | |
| 516 | BUG_ON(!PAGE_ALIGNED(pa_start)); |
| 517 | BUG_ON(!PAGE_ALIGNED(size)); |
| 518 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 519 | __create_pgd_mapping(pgdp, pa_start, (unsigned long)va_start, size, prot, |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 520 | early_pgtable_alloc, flags); |
Ard Biesheuvel | f904077 | 2016-02-16 13:52:40 +0100 | [diff] [blame] | 521 | |
Will Deacon | 92bbd16 | 2017-07-24 11:46:09 +0100 | [diff] [blame] | 522 | if (!(vm_flags & VM_NO_GUARD)) |
| 523 | size += PAGE_SIZE; |
| 524 | |
Ard Biesheuvel | f904077 | 2016-02-16 13:52:40 +0100 | [diff] [blame] | 525 | vma->addr = va_start; |
| 526 | vma->phys_addr = pa_start; |
| 527 | vma->size = size; |
Will Deacon | 92bbd16 | 2017-07-24 11:46:09 +0100 | [diff] [blame] | 528 | vma->flags = VM_MAP | vm_flags; |
Ard Biesheuvel | f904077 | 2016-02-16 13:52:40 +0100 | [diff] [blame] | 529 | vma->caller = __builtin_return_address(0); |
| 530 | |
| 531 | vm_area_add_early(vma); |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 532 | } |
| 533 | |
Ard Biesheuvel | 28b066d | 2017-03-09 21:52:02 +0100 | [diff] [blame] | 534 | static int __init parse_rodata(char *arg) |
| 535 | { |
| 536 | return strtobool(arg, &rodata_enabled); |
| 537 | } |
| 538 | early_param("rodata", parse_rodata); |
| 539 | |
Will Deacon | 51a0048 | 2017-11-14 14:14:17 +0000 | [diff] [blame] | 540 | #ifdef CONFIG_UNMAP_KERNEL_AT_EL0 |
| 541 | static int __init map_entry_trampoline(void) |
| 542 | { |
Will Deacon | 51a0048 | 2017-11-14 14:14:17 +0000 | [diff] [blame] | 543 | pgprot_t prot = rodata_enabled ? PAGE_KERNEL_ROX : PAGE_KERNEL_EXEC; |
| 544 | phys_addr_t pa_start = __pa_symbol(__entry_tramp_text_start); |
| 545 | |
| 546 | /* The trampoline is always mapped and can therefore be global */ |
| 547 | pgprot_val(prot) &= ~PTE_NG; |
| 548 | |
| 549 | /* Map only the text into the trampoline page table */ |
| 550 | memset(tramp_pg_dir, 0, PGD_SIZE); |
| 551 | __create_pgd_mapping(tramp_pg_dir, pa_start, TRAMP_VALIAS, PAGE_SIZE, |
| 552 | prot, pgd_pgtable_alloc, 0); |
| 553 | |
Will Deacon | 6c27c40 | 2017-12-06 11:24:02 +0000 | [diff] [blame] | 554 | /* Map both the text and data into the kernel page table */ |
Will Deacon | 51a0048 | 2017-11-14 14:14:17 +0000 | [diff] [blame] | 555 | __set_fixmap(FIX_ENTRY_TRAMP_TEXT, pa_start, prot); |
Will Deacon | 6c27c40 | 2017-12-06 11:24:02 +0000 | [diff] [blame] | 556 | if (IS_ENABLED(CONFIG_RANDOMIZE_BASE)) { |
| 557 | extern char __entry_tramp_data_start[]; |
| 558 | |
| 559 | __set_fixmap(FIX_ENTRY_TRAMP_DATA, |
| 560 | __pa_symbol(__entry_tramp_data_start), |
| 561 | PAGE_KERNEL_RO); |
| 562 | } |
| 563 | |
Will Deacon | 51a0048 | 2017-11-14 14:14:17 +0000 | [diff] [blame] | 564 | return 0; |
| 565 | } |
| 566 | core_initcall(map_entry_trampoline); |
| 567 | #endif |
| 568 | |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 569 | /* |
| 570 | * Create fine-grained mappings for the kernel. |
| 571 | */ |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 572 | static void __init map_kernel(pgd_t *pgdp) |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 573 | { |
Ard Biesheuvel | 2ebe088b | 2017-03-09 21:52:03 +0100 | [diff] [blame] | 574 | static struct vm_struct vmlinux_text, vmlinux_rodata, vmlinux_inittext, |
| 575 | vmlinux_initdata, vmlinux_data; |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 576 | |
Ard Biesheuvel | 28b066d | 2017-03-09 21:52:02 +0100 | [diff] [blame] | 577 | /* |
| 578 | * External debuggers may need to write directly to the text |
| 579 | * mapping to install SW breakpoints. Allow this (only) when |
| 580 | * explicitly requested with rodata=off. |
| 581 | */ |
| 582 | pgprot_t text_prot = rodata_enabled ? PAGE_KERNEL_ROX : PAGE_KERNEL_EXEC; |
| 583 | |
Ard Biesheuvel | d27cfa1 | 2017-03-09 21:52:09 +0100 | [diff] [blame] | 584 | /* |
| 585 | * Only rodata will be remapped with different permissions later on, |
| 586 | * all other segments are allowed to use contiguous mappings. |
| 587 | */ |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 588 | map_kernel_segment(pgdp, _text, _etext, text_prot, &vmlinux_text, 0, |
Will Deacon | 92bbd16 | 2017-07-24 11:46:09 +0100 | [diff] [blame] | 589 | VM_NO_GUARD); |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 590 | map_kernel_segment(pgdp, __start_rodata, __inittext_begin, PAGE_KERNEL, |
Will Deacon | 92bbd16 | 2017-07-24 11:46:09 +0100 | [diff] [blame] | 591 | &vmlinux_rodata, NO_CONT_MAPPINGS, VM_NO_GUARD); |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 592 | map_kernel_segment(pgdp, __inittext_begin, __inittext_end, text_prot, |
Will Deacon | 92bbd16 | 2017-07-24 11:46:09 +0100 | [diff] [blame] | 593 | &vmlinux_inittext, 0, VM_NO_GUARD); |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 594 | map_kernel_segment(pgdp, __initdata_begin, __initdata_end, PAGE_KERNEL, |
Will Deacon | 92bbd16 | 2017-07-24 11:46:09 +0100 | [diff] [blame] | 595 | &vmlinux_initdata, 0, VM_NO_GUARD); |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 596 | map_kernel_segment(pgdp, _data, _end, PAGE_KERNEL, &vmlinux_data, 0, 0); |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 597 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 598 | if (!READ_ONCE(pgd_val(*pgd_offset_raw(pgdp, FIXADDR_START)))) { |
Ard Biesheuvel | f904077 | 2016-02-16 13:52:40 +0100 | [diff] [blame] | 599 | /* |
| 600 | * The fixmap falls in a separate pgd to the kernel, and doesn't |
| 601 | * live in the carveout for the swapper_pg_dir. We can simply |
| 602 | * re-use the existing dir for the fixmap. |
| 603 | */ |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 604 | set_pgd(pgd_offset_raw(pgdp, FIXADDR_START), |
| 605 | READ_ONCE(*pgd_offset_k(FIXADDR_START))); |
Ard Biesheuvel | f904077 | 2016-02-16 13:52:40 +0100 | [diff] [blame] | 606 | } else if (CONFIG_PGTABLE_LEVELS > 3) { |
| 607 | /* |
| 608 | * The fixmap shares its top level pgd entry with the kernel |
| 609 | * mapping. This can really only occur when we are running |
| 610 | * with 16k/4 levels, so we can simply reuse the pud level |
| 611 | * entry instead. |
| 612 | */ |
| 613 | BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES)); |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 614 | pud_populate(&init_mm, |
| 615 | pud_set_fixmap_offset(pgdp, FIXADDR_START), |
Kristina Martsenko | 1933830 | 2017-12-13 17:07:20 +0000 | [diff] [blame] | 616 | lm_alias(bm_pmd)); |
Ard Biesheuvel | f904077 | 2016-02-16 13:52:40 +0100 | [diff] [blame] | 617 | pud_clear_fixmap(); |
| 618 | } else { |
| 619 | BUG(); |
| 620 | } |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 621 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 622 | kasan_copy_shadow(pgdp); |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 623 | } |
| 624 | |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 625 | /* |
| 626 | * paging_init() sets up the page tables, initialises the zone memory |
| 627 | * maps and sets up the zero page. |
| 628 | */ |
| 629 | void __init paging_init(void) |
| 630 | { |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 631 | phys_addr_t pgd_phys = early_pgtable_alloc(); |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 632 | pgd_t *pgdp = pgd_set_fixmap(pgd_phys); |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 633 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 634 | map_kernel(pgdp); |
| 635 | map_mem(pgdp); |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 636 | |
| 637 | /* |
| 638 | * We want to reuse the original swapper_pg_dir so we don't have to |
| 639 | * communicate the new address to non-coherent secondaries in |
| 640 | * secondary_entry, and so cpu_switch_mm can generate the address with |
| 641 | * adrp+add rather than a load from some global variable. |
| 642 | * |
| 643 | * To do this we need to go via a temporary pgd. |
| 644 | */ |
| 645 | cpu_replace_ttbr1(__va(pgd_phys)); |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 646 | memcpy(swapper_pg_dir, pgdp, PGD_SIZE); |
Laura Abbott | 2077be6 | 2017-01-10 13:35:49 -0800 | [diff] [blame] | 647 | cpu_replace_ttbr1(lm_alias(swapper_pg_dir)); |
Mark Rutland | 068a17a | 2016-01-25 11:45:12 +0000 | [diff] [blame] | 648 | |
| 649 | pgd_clear_fixmap(); |
| 650 | memblock_free(pgd_phys, PAGE_SIZE); |
| 651 | |
| 652 | /* |
| 653 | * We only reuse the PGD from the swapper_pg_dir, not the pud + pmd |
| 654 | * allocated with it. |
| 655 | */ |
Laura Abbott | 2077be6 | 2017-01-10 13:35:49 -0800 | [diff] [blame] | 656 | memblock_free(__pa_symbol(swapper_pg_dir) + PAGE_SIZE, |
Steve Capper | 0370b31 | 2018-01-11 10:11:59 +0000 | [diff] [blame] | 657 | __pa_symbol(swapper_pg_end) - __pa_symbol(swapper_pg_dir) |
| 658 | - PAGE_SIZE); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 659 | } |
| 660 | |
| 661 | /* |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 662 | * Check whether a kernel address is valid (derived from arch/x86/). |
| 663 | */ |
| 664 | int kern_addr_valid(unsigned long addr) |
| 665 | { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 666 | pgd_t *pgdp; |
| 667 | pud_t *pudp, pud; |
| 668 | pmd_t *pmdp, pmd; |
| 669 | pte_t *ptep, pte; |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 670 | |
| 671 | if ((((long)addr) >> VA_BITS) != -1UL) |
| 672 | return 0; |
| 673 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 674 | pgdp = pgd_offset_k(addr); |
| 675 | if (pgd_none(READ_ONCE(*pgdp))) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 676 | return 0; |
| 677 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 678 | pudp = pud_offset(pgdp, addr); |
| 679 | pud = READ_ONCE(*pudp); |
| 680 | if (pud_none(pud)) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 681 | return 0; |
| 682 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 683 | if (pud_sect(pud)) |
| 684 | return pfn_valid(pud_pfn(pud)); |
Steve Capper | 206a2a7 | 2014-05-06 14:02:27 +0100 | [diff] [blame] | 685 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 686 | pmdp = pmd_offset(pudp, addr); |
| 687 | pmd = READ_ONCE(*pmdp); |
| 688 | if (pmd_none(pmd)) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 689 | return 0; |
| 690 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 691 | if (pmd_sect(pmd)) |
| 692 | return pfn_valid(pmd_pfn(pmd)); |
Dave Anderson | da6e4cb | 2014-04-15 18:53:24 +0100 | [diff] [blame] | 693 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 694 | ptep = pte_offset_kernel(pmdp, addr); |
| 695 | pte = READ_ONCE(*ptep); |
| 696 | if (pte_none(pte)) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 697 | return 0; |
| 698 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 699 | return pfn_valid(pte_pfn(pte)); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 700 | } |
| 701 | #ifdef CONFIG_SPARSEMEM_VMEMMAP |
Suzuki K. Poulose | b433dce | 2015-10-19 14:19:28 +0100 | [diff] [blame] | 702 | #if !ARM64_SWAPPER_USES_SECTION_MAPS |
Christoph Hellwig | 7b73d97 | 2017-12-29 08:53:54 +0100 | [diff] [blame] | 703 | int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, |
| 704 | struct vmem_altmap *altmap) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 705 | { |
Johannes Weiner | 0aad818 | 2013-04-29 15:07:50 -0700 | [diff] [blame] | 706 | return vmemmap_populate_basepages(start, end, node); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 707 | } |
Suzuki K. Poulose | b433dce | 2015-10-19 14:19:28 +0100 | [diff] [blame] | 708 | #else /* !ARM64_SWAPPER_USES_SECTION_MAPS */ |
Christoph Hellwig | 7b73d97 | 2017-12-29 08:53:54 +0100 | [diff] [blame] | 709 | int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, |
| 710 | struct vmem_altmap *altmap) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 711 | { |
Johannes Weiner | 0aad818 | 2013-04-29 15:07:50 -0700 | [diff] [blame] | 712 | unsigned long addr = start; |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 713 | unsigned long next; |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 714 | pgd_t *pgdp; |
| 715 | pud_t *pudp; |
| 716 | pmd_t *pmdp; |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 717 | |
| 718 | do { |
| 719 | next = pmd_addr_end(addr, end); |
| 720 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 721 | pgdp = vmemmap_pgd_populate(addr, node); |
| 722 | if (!pgdp) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 723 | return -ENOMEM; |
| 724 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 725 | pudp = vmemmap_pud_populate(pgdp, addr, node); |
| 726 | if (!pudp) |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 727 | return -ENOMEM; |
| 728 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 729 | pmdp = pmd_offset(pudp, addr); |
| 730 | if (pmd_none(READ_ONCE(*pmdp))) { |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 731 | void *p = NULL; |
| 732 | |
| 733 | p = vmemmap_alloc_block_buf(PMD_SIZE, node); |
| 734 | if (!p) |
| 735 | return -ENOMEM; |
| 736 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 737 | pmd_set_huge(pmdp, __pa(p), __pgprot(PROT_SECT_NORMAL)); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 738 | } else |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 739 | vmemmap_verify((pte_t *)pmdp, node, addr, next); |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 740 | } while (addr = next, addr != end); |
| 741 | |
| 742 | return 0; |
| 743 | } |
| 744 | #endif /* CONFIG_ARM64_64K_PAGES */ |
Christoph Hellwig | 24b6d41 | 2017-12-29 08:53:56 +0100 | [diff] [blame] | 745 | void vmemmap_free(unsigned long start, unsigned long end, |
| 746 | struct vmem_altmap *altmap) |
Tang Chen | 0197518 | 2013-02-22 16:33:08 -0800 | [diff] [blame] | 747 | { |
| 748 | } |
Catalin Marinas | c1cc155 | 2012-03-05 11:49:27 +0000 | [diff] [blame] | 749 | #endif /* CONFIG_SPARSEMEM_VMEMMAP */ |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 750 | |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 751 | static inline pud_t * fixmap_pud(unsigned long addr) |
| 752 | { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 753 | pgd_t *pgdp = pgd_offset_k(addr); |
| 754 | pgd_t pgd = READ_ONCE(*pgdp); |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 755 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 756 | BUG_ON(pgd_none(pgd) || pgd_bad(pgd)); |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 757 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 758 | return pud_offset_kimg(pgdp, addr); |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 759 | } |
| 760 | |
| 761 | static inline pmd_t * fixmap_pmd(unsigned long addr) |
| 762 | { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 763 | pud_t *pudp = fixmap_pud(addr); |
| 764 | pud_t pud = READ_ONCE(*pudp); |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 765 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 766 | BUG_ON(pud_none(pud) || pud_bad(pud)); |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 767 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 768 | return pmd_offset_kimg(pudp, addr); |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 769 | } |
| 770 | |
| 771 | static inline pte_t * fixmap_pte(unsigned long addr) |
| 772 | { |
Ard Biesheuvel | 157962f | 2016-02-16 13:52:38 +0100 | [diff] [blame] | 773 | return &bm_pte[pte_index(addr)]; |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 774 | } |
| 775 | |
Laura Abbott | 2077be6 | 2017-01-10 13:35:49 -0800 | [diff] [blame] | 776 | /* |
| 777 | * The p*d_populate functions call virt_to_phys implicitly so they can't be used |
| 778 | * directly on kernel symbols (bm_p*d). This function is called too early to use |
| 779 | * lm_alias so __p*d_populate functions must be used to populate with the |
| 780 | * physical address from __pa_symbol. |
| 781 | */ |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 782 | void __init early_fixmap_init(void) |
| 783 | { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 784 | pgd_t *pgdp, pgd; |
| 785 | pud_t *pudp; |
| 786 | pmd_t *pmdp; |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 787 | unsigned long addr = FIXADDR_START; |
| 788 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 789 | pgdp = pgd_offset_k(addr); |
| 790 | pgd = READ_ONCE(*pgdp); |
Ard Biesheuvel | f80fb3a | 2016-01-26 14:12:01 +0100 | [diff] [blame] | 791 | if (CONFIG_PGTABLE_LEVELS > 3 && |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 792 | !(pgd_none(pgd) || pgd_page_paddr(pgd) == __pa_symbol(bm_pud))) { |
Ard Biesheuvel | f904077 | 2016-02-16 13:52:40 +0100 | [diff] [blame] | 793 | /* |
| 794 | * We only end up here if the kernel mapping and the fixmap |
| 795 | * share the top level pgd entry, which should only happen on |
| 796 | * 16k/4 levels configurations. |
| 797 | */ |
| 798 | BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES)); |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 799 | pudp = pud_offset_kimg(pgdp, addr); |
Ard Biesheuvel | f904077 | 2016-02-16 13:52:40 +0100 | [diff] [blame] | 800 | } else { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 801 | if (pgd_none(pgd)) |
| 802 | __pgd_populate(pgdp, __pa_symbol(bm_pud), PUD_TYPE_TABLE); |
| 803 | pudp = fixmap_pud(addr); |
Ard Biesheuvel | f904077 | 2016-02-16 13:52:40 +0100 | [diff] [blame] | 804 | } |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 805 | if (pud_none(READ_ONCE(*pudp))) |
| 806 | __pud_populate(pudp, __pa_symbol(bm_pmd), PMD_TYPE_TABLE); |
| 807 | pmdp = fixmap_pmd(addr); |
| 808 | __pmd_populate(pmdp, __pa_symbol(bm_pte), PMD_TYPE_TABLE); |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 809 | |
| 810 | /* |
| 811 | * The boot-ioremap range spans multiple pmds, for which |
Ard Biesheuvel | 157962f | 2016-02-16 13:52:38 +0100 | [diff] [blame] | 812 | * we are not prepared: |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 813 | */ |
| 814 | BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT) |
| 815 | != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT)); |
| 816 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 817 | if ((pmdp != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN))) |
| 818 | || pmdp != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) { |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 819 | WARN_ON(1); |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 820 | pr_warn("pmdp %p != %p, %p\n", |
| 821 | pmdp, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)), |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 822 | fixmap_pmd(fix_to_virt(FIX_BTMAP_END))); |
| 823 | pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", |
| 824 | fix_to_virt(FIX_BTMAP_BEGIN)); |
| 825 | pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n", |
| 826 | fix_to_virt(FIX_BTMAP_END)); |
| 827 | |
| 828 | pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END); |
| 829 | pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN); |
| 830 | } |
| 831 | } |
| 832 | |
James Morse | 18b4b27 | 2017-11-06 18:44:26 +0000 | [diff] [blame] | 833 | /* |
| 834 | * Unusually, this is also called in IRQ context (ghes_iounmap_irq) so if we |
| 835 | * ever need to use IPIs for TLB broadcasting, then we're in trouble here. |
| 836 | */ |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 837 | void __set_fixmap(enum fixed_addresses idx, |
| 838 | phys_addr_t phys, pgprot_t flags) |
| 839 | { |
| 840 | unsigned long addr = __fix_to_virt(idx); |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 841 | pte_t *ptep; |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 842 | |
Mark Rutland | b63dbef | 2015-03-04 13:27:35 +0000 | [diff] [blame] | 843 | BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses); |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 844 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 845 | ptep = fixmap_pte(addr); |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 846 | |
| 847 | if (pgprot_val(flags)) { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 848 | set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, flags)); |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 849 | } else { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 850 | pte_clear(&init_mm, addr, ptep); |
Laura Abbott | af86e59 | 2014-11-21 21:50:42 +0000 | [diff] [blame] | 851 | flush_tlb_kernel_range(addr, addr+PAGE_SIZE); |
| 852 | } |
| 853 | } |
Ard Biesheuvel | 61bd93c | 2015-06-01 13:40:32 +0200 | [diff] [blame] | 854 | |
Ard Biesheuvel | f80fb3a | 2016-01-26 14:12:01 +0100 | [diff] [blame] | 855 | void *__init __fixmap_remap_fdt(phys_addr_t dt_phys, int *size, pgprot_t prot) |
Ard Biesheuvel | 61bd93c | 2015-06-01 13:40:32 +0200 | [diff] [blame] | 856 | { |
| 857 | const u64 dt_virt_base = __fix_to_virt(FIX_FDT); |
Ard Biesheuvel | f80fb3a | 2016-01-26 14:12:01 +0100 | [diff] [blame] | 858 | int offset; |
Ard Biesheuvel | 61bd93c | 2015-06-01 13:40:32 +0200 | [diff] [blame] | 859 | void *dt_virt; |
| 860 | |
| 861 | /* |
| 862 | * Check whether the physical FDT address is set and meets the minimum |
| 863 | * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be |
Ard Biesheuvel | 04a8481 | 2016-08-01 13:29:31 +0200 | [diff] [blame] | 864 | * at least 8 bytes so that we can always access the magic and size |
| 865 | * fields of the FDT header after mapping the first chunk, double check |
| 866 | * here if that is indeed the case. |
Ard Biesheuvel | 61bd93c | 2015-06-01 13:40:32 +0200 | [diff] [blame] | 867 | */ |
| 868 | BUILD_BUG_ON(MIN_FDT_ALIGN < 8); |
| 869 | if (!dt_phys || dt_phys % MIN_FDT_ALIGN) |
| 870 | return NULL; |
| 871 | |
| 872 | /* |
| 873 | * Make sure that the FDT region can be mapped without the need to |
| 874 | * allocate additional translation table pages, so that it is safe |
Laura Abbott | 132233a | 2016-02-05 16:24:46 -0800 | [diff] [blame] | 875 | * to call create_mapping_noalloc() this early. |
Ard Biesheuvel | 61bd93c | 2015-06-01 13:40:32 +0200 | [diff] [blame] | 876 | * |
| 877 | * On 64k pages, the FDT will be mapped using PTEs, so we need to |
| 878 | * be in the same PMD as the rest of the fixmap. |
| 879 | * On 4k pages, we'll use section mappings for the FDT so we only |
| 880 | * have to be in the same PUD. |
| 881 | */ |
| 882 | BUILD_BUG_ON(dt_virt_base % SZ_2M); |
| 883 | |
Suzuki K. Poulose | b433dce | 2015-10-19 14:19:28 +0100 | [diff] [blame] | 884 | BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> SWAPPER_TABLE_SHIFT != |
| 885 | __fix_to_virt(FIX_BTMAP_BEGIN) >> SWAPPER_TABLE_SHIFT); |
Ard Biesheuvel | 61bd93c | 2015-06-01 13:40:32 +0200 | [diff] [blame] | 886 | |
Suzuki K. Poulose | b433dce | 2015-10-19 14:19:28 +0100 | [diff] [blame] | 887 | offset = dt_phys % SWAPPER_BLOCK_SIZE; |
Ard Biesheuvel | 61bd93c | 2015-06-01 13:40:32 +0200 | [diff] [blame] | 888 | dt_virt = (void *)dt_virt_base + offset; |
| 889 | |
| 890 | /* map the first chunk so we can read the size from the header */ |
Laura Abbott | 132233a | 2016-02-05 16:24:46 -0800 | [diff] [blame] | 891 | create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), |
| 892 | dt_virt_base, SWAPPER_BLOCK_SIZE, prot); |
Ard Biesheuvel | 61bd93c | 2015-06-01 13:40:32 +0200 | [diff] [blame] | 893 | |
Ard Biesheuvel | 04a8481 | 2016-08-01 13:29:31 +0200 | [diff] [blame] | 894 | if (fdt_magic(dt_virt) != FDT_MAGIC) |
Ard Biesheuvel | 61bd93c | 2015-06-01 13:40:32 +0200 | [diff] [blame] | 895 | return NULL; |
| 896 | |
Ard Biesheuvel | f80fb3a | 2016-01-26 14:12:01 +0100 | [diff] [blame] | 897 | *size = fdt_totalsize(dt_virt); |
| 898 | if (*size > MAX_FDT_SIZE) |
Ard Biesheuvel | 61bd93c | 2015-06-01 13:40:32 +0200 | [diff] [blame] | 899 | return NULL; |
| 900 | |
Ard Biesheuvel | f80fb3a | 2016-01-26 14:12:01 +0100 | [diff] [blame] | 901 | if (offset + *size > SWAPPER_BLOCK_SIZE) |
Laura Abbott | 132233a | 2016-02-05 16:24:46 -0800 | [diff] [blame] | 902 | create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base, |
Ard Biesheuvel | f80fb3a | 2016-01-26 14:12:01 +0100 | [diff] [blame] | 903 | round_up(offset + *size, SWAPPER_BLOCK_SIZE), prot); |
| 904 | |
| 905 | return dt_virt; |
| 906 | } |
| 907 | |
| 908 | void *__init fixmap_remap_fdt(phys_addr_t dt_phys) |
| 909 | { |
| 910 | void *dt_virt; |
| 911 | int size; |
| 912 | |
| 913 | dt_virt = __fixmap_remap_fdt(dt_phys, &size, PAGE_KERNEL_RO); |
| 914 | if (!dt_virt) |
| 915 | return NULL; |
Ard Biesheuvel | 61bd93c | 2015-06-01 13:40:32 +0200 | [diff] [blame] | 916 | |
| 917 | memblock_reserve(dt_phys, size); |
Ard Biesheuvel | 61bd93c | 2015-06-01 13:40:32 +0200 | [diff] [blame] | 918 | return dt_virt; |
| 919 | } |
Ard Biesheuvel | 324420b | 2016-02-16 13:52:35 +0100 | [diff] [blame] | 920 | |
| 921 | int __init arch_ioremap_pud_supported(void) |
| 922 | { |
| 923 | /* only 4k granule supports level 1 block mappings */ |
| 924 | return IS_ENABLED(CONFIG_ARM64_4K_PAGES); |
| 925 | } |
| 926 | |
| 927 | int __init arch_ioremap_pmd_supported(void) |
| 928 | { |
| 929 | return 1; |
| 930 | } |
| 931 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 932 | int pud_set_huge(pud_t *pudp, phys_addr_t phys, pgprot_t prot) |
Ard Biesheuvel | 324420b | 2016-02-16 13:52:35 +0100 | [diff] [blame] | 933 | { |
Kristina Martsenko | 1933830 | 2017-12-13 17:07:20 +0000 | [diff] [blame] | 934 | pgprot_t sect_prot = __pgprot(PUD_TYPE_SECT | |
| 935 | pgprot_val(mk_sect_prot(prot))); |
Laura Abbott | 82034c2 | 2018-05-23 11:43:46 -0700 | [diff] [blame] | 936 | pud_t new_pud = pfn_pud(__phys_to_pfn(phys), sect_prot); |
Will Deacon | 15122ee | 2018-02-21 12:59:27 +0000 | [diff] [blame] | 937 | |
Laura Abbott | 82034c2 | 2018-05-23 11:43:46 -0700 | [diff] [blame] | 938 | /* Only allow permission changes for now */ |
| 939 | if (!pgattr_change_is_safe(READ_ONCE(pud_val(*pudp)), |
| 940 | pud_val(new_pud))) |
Will Deacon | 15122ee | 2018-02-21 12:59:27 +0000 | [diff] [blame] | 941 | return 0; |
| 942 | |
Ard Biesheuvel | 324420b | 2016-02-16 13:52:35 +0100 | [diff] [blame] | 943 | BUG_ON(phys & ~PUD_MASK); |
Laura Abbott | 82034c2 | 2018-05-23 11:43:46 -0700 | [diff] [blame] | 944 | set_pud(pudp, new_pud); |
Ard Biesheuvel | 324420b | 2016-02-16 13:52:35 +0100 | [diff] [blame] | 945 | return 1; |
| 946 | } |
| 947 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 948 | int pmd_set_huge(pmd_t *pmdp, phys_addr_t phys, pgprot_t prot) |
Ard Biesheuvel | 324420b | 2016-02-16 13:52:35 +0100 | [diff] [blame] | 949 | { |
Kristina Martsenko | 1933830 | 2017-12-13 17:07:20 +0000 | [diff] [blame] | 950 | pgprot_t sect_prot = __pgprot(PMD_TYPE_SECT | |
| 951 | pgprot_val(mk_sect_prot(prot))); |
Laura Abbott | 82034c2 | 2018-05-23 11:43:46 -0700 | [diff] [blame] | 952 | pmd_t new_pmd = pfn_pmd(__phys_to_pfn(phys), sect_prot); |
Will Deacon | 15122ee | 2018-02-21 12:59:27 +0000 | [diff] [blame] | 953 | |
Laura Abbott | 82034c2 | 2018-05-23 11:43:46 -0700 | [diff] [blame] | 954 | /* Only allow permission changes for now */ |
| 955 | if (!pgattr_change_is_safe(READ_ONCE(pmd_val(*pmdp)), |
| 956 | pmd_val(new_pmd))) |
Will Deacon | 15122ee | 2018-02-21 12:59:27 +0000 | [diff] [blame] | 957 | return 0; |
| 958 | |
Ard Biesheuvel | 324420b | 2016-02-16 13:52:35 +0100 | [diff] [blame] | 959 | BUG_ON(phys & ~PMD_MASK); |
Laura Abbott | 82034c2 | 2018-05-23 11:43:46 -0700 | [diff] [blame] | 960 | set_pmd(pmdp, new_pmd); |
Ard Biesheuvel | 324420b | 2016-02-16 13:52:35 +0100 | [diff] [blame] | 961 | return 1; |
| 962 | } |
| 963 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 964 | int pud_clear_huge(pud_t *pudp) |
Ard Biesheuvel | 324420b | 2016-02-16 13:52:35 +0100 | [diff] [blame] | 965 | { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 966 | if (!pud_sect(READ_ONCE(*pudp))) |
Ard Biesheuvel | 324420b | 2016-02-16 13:52:35 +0100 | [diff] [blame] | 967 | return 0; |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 968 | pud_clear(pudp); |
Ard Biesheuvel | 324420b | 2016-02-16 13:52:35 +0100 | [diff] [blame] | 969 | return 1; |
| 970 | } |
| 971 | |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 972 | int pmd_clear_huge(pmd_t *pmdp) |
Ard Biesheuvel | 324420b | 2016-02-16 13:52:35 +0100 | [diff] [blame] | 973 | { |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 974 | if (!pmd_sect(READ_ONCE(*pmdp))) |
Ard Biesheuvel | 324420b | 2016-02-16 13:52:35 +0100 | [diff] [blame] | 975 | return 0; |
Will Deacon | 20a004e | 2018-02-15 11:14:56 +0000 | [diff] [blame] | 976 | pmd_clear(pmdp); |
Ard Biesheuvel | 324420b | 2016-02-16 13:52:35 +0100 | [diff] [blame] | 977 | return 1; |
| 978 | } |
Toshi Kani | b6bdb75 | 2018-03-22 16:17:20 -0700 | [diff] [blame] | 979 | |
| 980 | int pud_free_pmd_page(pud_t *pud) |
| 981 | { |
| 982 | return pud_none(*pud); |
| 983 | } |
| 984 | |
| 985 | int pmd_free_pte_page(pmd_t *pmd) |
| 986 | { |
| 987 | return pmd_none(*pmd); |
| 988 | } |