Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * ahci.c - AHCI SATA support |
| 3 | * |
Jeff Garzik | af36d7f | 2005-08-28 20:18:39 -0400 | [diff] [blame] | 4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> |
| 5 | * Please ALWAYS copy linux-ide@vger.kernel.org |
| 6 | * on emails. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | * |
Jeff Garzik | af36d7f | 2005-08-28 20:18:39 -0400 | [diff] [blame] | 8 | * Copyright 2004-2005 Red Hat, Inc. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10 | * |
Jeff Garzik | af36d7f | 2005-08-28 20:18:39 -0400 | [diff] [blame] | 11 | * This program is free software; you can redistribute it and/or modify |
| 12 | * it under the terms of the GNU General Public License as published by |
| 13 | * the Free Software Foundation; either version 2, or (at your option) |
| 14 | * any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; see the file COPYING. If not, write to |
| 23 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. |
| 24 | * |
| 25 | * |
| 26 | * libata documentation is available via 'make {ps|pdf}docs', |
| 27 | * as Documentation/DocBook/libata.* |
| 28 | * |
| 29 | * AHCI hardware documentation: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 30 | * http://www.intel.com/technology/serialata/pdf/rev1_0.pdf |
Jeff Garzik | af36d7f | 2005-08-28 20:18:39 -0400 | [diff] [blame] | 31 | * http://www.intel.com/technology/serialata/pdf/rev1_1.pdf |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | * |
| 33 | */ |
| 34 | |
| 35 | #include <linux/kernel.h> |
| 36 | #include <linux/module.h> |
| 37 | #include <linux/pci.h> |
| 38 | #include <linux/init.h> |
| 39 | #include <linux/blkdev.h> |
| 40 | #include <linux/delay.h> |
| 41 | #include <linux/interrupt.h> |
domen@coderock.org | 87507cf | 2005-04-08 09:53:06 +0200 | [diff] [blame] | 42 | #include <linux/dma-mapping.h> |
Jeff Garzik | a9524a7 | 2005-10-30 14:39:11 -0500 | [diff] [blame] | 43 | #include <linux/device.h> |
Tejun Heo | edc9305 | 2007-10-25 14:59:16 +0900 | [diff] [blame] | 44 | #include <linux/dmi.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 45 | #include <linux/gfp.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 46 | #include <scsi/scsi_host.h> |
Jeff Garzik | 193515d | 2005-11-07 00:59:37 -0500 | [diff] [blame] | 47 | #include <scsi/scsi_cmnd.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | #include <linux/libata.h> |
Anton Vorontsov | 365cfa1 | 2010-03-28 00:22:14 -0400 | [diff] [blame] | 49 | #include "ahci.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 50 | |
| 51 | #define DRV_NAME "ahci" |
Tejun Heo | 7d50b60 | 2007-09-23 13:19:54 +0900 | [diff] [blame] | 52 | #define DRV_VERSION "3.0" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 53 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 54 | enum { |
| 55 | AHCI_PCI_BAR = 5, |
Tejun Heo | 441577e | 2010-03-29 10:32:39 +0900 | [diff] [blame] | 56 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 57 | |
Tejun Heo | 441577e | 2010-03-29 10:32:39 +0900 | [diff] [blame] | 58 | enum board_ids { |
| 59 | /* board IDs by feature in alphabetical order */ |
| 60 | board_ahci, |
| 61 | board_ahci_ign_iferr, |
| 62 | board_ahci_nosntf, |
Tejun Heo | 5f17310 | 2010-07-24 16:53:48 +0200 | [diff] [blame] | 63 | board_ahci_yes_fbs, |
Tejun Heo | 441577e | 2010-03-29 10:32:39 +0900 | [diff] [blame] | 64 | |
| 65 | /* board IDs for specific chipsets in alphabetical order */ |
| 66 | board_ahci_mcp65, |
Tejun Heo | 83f2b96 | 2010-03-30 10:28:32 +0900 | [diff] [blame] | 67 | board_ahci_mcp77, |
| 68 | board_ahci_mcp89, |
Tejun Heo | 441577e | 2010-03-29 10:32:39 +0900 | [diff] [blame] | 69 | board_ahci_mv, |
| 70 | board_ahci_sb600, |
| 71 | board_ahci_sb700, /* for SB700 and SB800 */ |
| 72 | board_ahci_vt8251, |
| 73 | |
| 74 | /* aliases */ |
| 75 | board_ahci_mcp_linux = board_ahci_mcp65, |
| 76 | board_ahci_mcp67 = board_ahci_mcp65, |
| 77 | board_ahci_mcp73 = board_ahci_mcp65, |
Tejun Heo | 83f2b96 | 2010-03-30 10:28:32 +0900 | [diff] [blame] | 78 | board_ahci_mcp79 = board_ahci_mcp77, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 79 | }; |
| 80 | |
Jeff Garzik | 2dcb407 | 2007-10-19 06:42:56 -0400 | [diff] [blame] | 81 | static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); |
Shane Huang | bd17243 | 2008-06-10 15:52:04 +0800 | [diff] [blame] | 82 | static int ahci_sb600_softreset(struct ata_link *link, unsigned int *class, |
| 83 | unsigned long deadline); |
Tejun Heo | a1efdab | 2008-03-25 12:22:50 +0900 | [diff] [blame] | 84 | static int ahci_vt8251_hardreset(struct ata_link *link, unsigned int *class, |
| 85 | unsigned long deadline); |
| 86 | static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class, |
| 87 | unsigned long deadline); |
Tejun Heo | 438ac6d | 2007-03-02 17:31:26 +0900 | [diff] [blame] | 88 | #ifdef CONFIG_PM |
Tejun Heo | c133287 | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 89 | static int ahci_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg); |
| 90 | static int ahci_pci_device_resume(struct pci_dev *pdev); |
Tejun Heo | 438ac6d | 2007-03-02 17:31:26 +0900 | [diff] [blame] | 91 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 92 | |
Tejun Heo | fad16e7 | 2010-09-21 09:25:48 +0200 | [diff] [blame] | 93 | static struct scsi_host_template ahci_sht = { |
| 94 | AHCI_SHT("ahci"), |
| 95 | }; |
| 96 | |
Tejun Heo | 029cfd6 | 2008-03-25 12:22:49 +0900 | [diff] [blame] | 97 | static struct ata_port_operations ahci_vt8251_ops = { |
| 98 | .inherits = &ahci_ops, |
Tejun Heo | a1efdab | 2008-03-25 12:22:50 +0900 | [diff] [blame] | 99 | .hardreset = ahci_vt8251_hardreset, |
Tejun Heo | ad616ff | 2006-11-01 18:00:24 +0900 | [diff] [blame] | 100 | }; |
| 101 | |
Tejun Heo | 029cfd6 | 2008-03-25 12:22:49 +0900 | [diff] [blame] | 102 | static struct ata_port_operations ahci_p5wdh_ops = { |
| 103 | .inherits = &ahci_ops, |
Tejun Heo | a1efdab | 2008-03-25 12:22:50 +0900 | [diff] [blame] | 104 | .hardreset = ahci_p5wdh_hardreset, |
Tejun Heo | edc9305 | 2007-10-25 14:59:16 +0900 | [diff] [blame] | 105 | }; |
| 106 | |
Shane Huang | bd17243 | 2008-06-10 15:52:04 +0800 | [diff] [blame] | 107 | static struct ata_port_operations ahci_sb600_ops = { |
| 108 | .inherits = &ahci_ops, |
| 109 | .softreset = ahci_sb600_softreset, |
| 110 | .pmp_softreset = ahci_sb600_softreset, |
| 111 | }; |
| 112 | |
Tejun Heo | 417a1a6 | 2007-09-23 13:19:55 +0900 | [diff] [blame] | 113 | #define AHCI_HFLAGS(flags) .private_data = (void *)(flags) |
| 114 | |
Arjan van de Ven | 98ac62d | 2005-11-28 10:06:23 +0100 | [diff] [blame] | 115 | static const struct ata_port_info ahci_port_info[] = { |
Tejun Heo | 441577e | 2010-03-29 10:32:39 +0900 | [diff] [blame] | 116 | /* by features */ |
Jeff Garzik | 4da646b | 2009-04-08 02:00:13 -0400 | [diff] [blame] | 117 | [board_ahci] = |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 118 | { |
Tejun Heo | 1188c0d | 2007-04-23 02:41:05 +0900 | [diff] [blame] | 119 | .flags = AHCI_FLAG_COMMON, |
Erik Inge Bolsø | 14bdef9 | 2009-03-14 21:38:24 +0100 | [diff] [blame] | 120 | .pio_mask = ATA_PIO4, |
Jeff Garzik | 469248a | 2007-07-08 01:13:16 -0400 | [diff] [blame] | 121 | .udma_mask = ATA_UDMA6, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 122 | .port_ops = &ahci_ops, |
| 123 | }, |
Jeff Garzik | 4da646b | 2009-04-08 02:00:13 -0400 | [diff] [blame] | 124 | [board_ahci_ign_iferr] = |
Tejun Heo | 4166955 | 2006-11-29 11:33:14 +0900 | [diff] [blame] | 125 | { |
Tejun Heo | 417a1a6 | 2007-09-23 13:19:55 +0900 | [diff] [blame] | 126 | AHCI_HFLAGS (AHCI_HFLAG_IGN_IRQ_IF_ERR), |
| 127 | .flags = AHCI_FLAG_COMMON, |
Erik Inge Bolsø | 14bdef9 | 2009-03-14 21:38:24 +0100 | [diff] [blame] | 128 | .pio_mask = ATA_PIO4, |
Jeff Garzik | 469248a | 2007-07-08 01:13:16 -0400 | [diff] [blame] | 129 | .udma_mask = ATA_UDMA6, |
Tejun Heo | 4166955 | 2006-11-29 11:33:14 +0900 | [diff] [blame] | 130 | .port_ops = &ahci_ops, |
| 131 | }, |
Tejun Heo | 441577e | 2010-03-29 10:32:39 +0900 | [diff] [blame] | 132 | [board_ahci_nosntf] = |
| 133 | { |
| 134 | AHCI_HFLAGS (AHCI_HFLAG_NO_SNTF), |
| 135 | .flags = AHCI_FLAG_COMMON, |
| 136 | .pio_mask = ATA_PIO4, |
| 137 | .udma_mask = ATA_UDMA6, |
| 138 | .port_ops = &ahci_ops, |
| 139 | }, |
Tejun Heo | 5f17310 | 2010-07-24 16:53:48 +0200 | [diff] [blame] | 140 | [board_ahci_yes_fbs] = |
| 141 | { |
| 142 | AHCI_HFLAGS (AHCI_HFLAG_YES_FBS), |
| 143 | .flags = AHCI_FLAG_COMMON, |
| 144 | .pio_mask = ATA_PIO4, |
| 145 | .udma_mask = ATA_UDMA6, |
| 146 | .port_ops = &ahci_ops, |
| 147 | }, |
Tejun Heo | 441577e | 2010-03-29 10:32:39 +0900 | [diff] [blame] | 148 | /* by chipsets */ |
| 149 | [board_ahci_mcp65] = |
| 150 | { |
Tejun Heo | 83f2b96 | 2010-03-30 10:28:32 +0900 | [diff] [blame] | 151 | AHCI_HFLAGS (AHCI_HFLAG_NO_FPDMA_AA | AHCI_HFLAG_NO_PMP | |
| 152 | AHCI_HFLAG_YES_NCQ), |
| 153 | .flags = AHCI_FLAG_COMMON, |
| 154 | .pio_mask = ATA_PIO4, |
| 155 | .udma_mask = ATA_UDMA6, |
| 156 | .port_ops = &ahci_ops, |
| 157 | }, |
| 158 | [board_ahci_mcp77] = |
| 159 | { |
| 160 | AHCI_HFLAGS (AHCI_HFLAG_NO_FPDMA_AA | AHCI_HFLAG_NO_PMP), |
| 161 | .flags = AHCI_FLAG_COMMON, |
| 162 | .pio_mask = ATA_PIO4, |
| 163 | .udma_mask = ATA_UDMA6, |
| 164 | .port_ops = &ahci_ops, |
| 165 | }, |
| 166 | [board_ahci_mcp89] = |
| 167 | { |
| 168 | AHCI_HFLAGS (AHCI_HFLAG_NO_FPDMA_AA), |
Tejun Heo | 441577e | 2010-03-29 10:32:39 +0900 | [diff] [blame] | 169 | .flags = AHCI_FLAG_COMMON, |
| 170 | .pio_mask = ATA_PIO4, |
| 171 | .udma_mask = ATA_UDMA6, |
| 172 | .port_ops = &ahci_ops, |
| 173 | }, |
| 174 | [board_ahci_mv] = |
| 175 | { |
| 176 | AHCI_HFLAGS (AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_MSI | |
| 177 | AHCI_HFLAG_MV_PATA | AHCI_HFLAG_NO_PMP), |
| 178 | .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | |
| 179 | ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA, |
| 180 | .pio_mask = ATA_PIO4, |
| 181 | .udma_mask = ATA_UDMA6, |
| 182 | .port_ops = &ahci_ops, |
| 183 | }, |
Jeff Garzik | 4da646b | 2009-04-08 02:00:13 -0400 | [diff] [blame] | 184 | [board_ahci_sb600] = |
Conke Hu | 55a6160 | 2007-03-27 18:33:05 +0800 | [diff] [blame] | 185 | { |
Tejun Heo | 417a1a6 | 2007-09-23 13:19:55 +0900 | [diff] [blame] | 186 | AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL | |
Tejun Heo | 2fcad9d | 2009-10-03 18:27:29 +0900 | [diff] [blame] | 187 | AHCI_HFLAG_NO_MSI | AHCI_HFLAG_SECT255 | |
| 188 | AHCI_HFLAG_32BIT_ONLY), |
Tejun Heo | 417a1a6 | 2007-09-23 13:19:55 +0900 | [diff] [blame] | 189 | .flags = AHCI_FLAG_COMMON, |
Erik Inge Bolsø | 14bdef9 | 2009-03-14 21:38:24 +0100 | [diff] [blame] | 190 | .pio_mask = ATA_PIO4, |
Jeff Garzik | 469248a | 2007-07-08 01:13:16 -0400 | [diff] [blame] | 191 | .udma_mask = ATA_UDMA6, |
Shane Huang | bd17243 | 2008-06-10 15:52:04 +0800 | [diff] [blame] | 192 | .port_ops = &ahci_sb600_ops, |
Conke Hu | 55a6160 | 2007-03-27 18:33:05 +0800 | [diff] [blame] | 193 | }, |
Jeff Garzik | 4da646b | 2009-04-08 02:00:13 -0400 | [diff] [blame] | 194 | [board_ahci_sb700] = /* for SB700 and SB800 */ |
Shane Huang | e39fc8c | 2008-02-22 05:00:31 -0800 | [diff] [blame] | 195 | { |
Shane Huang | bd17243 | 2008-06-10 15:52:04 +0800 | [diff] [blame] | 196 | AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL), |
Shane Huang | e39fc8c | 2008-02-22 05:00:31 -0800 | [diff] [blame] | 197 | .flags = AHCI_FLAG_COMMON, |
Erik Inge Bolsø | 14bdef9 | 2009-03-14 21:38:24 +0100 | [diff] [blame] | 198 | .pio_mask = ATA_PIO4, |
Shane Huang | e39fc8c | 2008-02-22 05:00:31 -0800 | [diff] [blame] | 199 | .udma_mask = ATA_UDMA6, |
Shane Huang | bd17243 | 2008-06-10 15:52:04 +0800 | [diff] [blame] | 200 | .port_ops = &ahci_sb600_ops, |
Shane Huang | e39fc8c | 2008-02-22 05:00:31 -0800 | [diff] [blame] | 201 | }, |
Tejun Heo | 441577e | 2010-03-29 10:32:39 +0900 | [diff] [blame] | 202 | [board_ahci_vt8251] = |
Tejun Heo | e297d99 | 2008-06-10 00:13:04 +0900 | [diff] [blame] | 203 | { |
Tejun Heo | 441577e | 2010-03-29 10:32:39 +0900 | [diff] [blame] | 204 | AHCI_HFLAGS (AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_PMP), |
Tejun Heo | e297d99 | 2008-06-10 00:13:04 +0900 | [diff] [blame] | 205 | .flags = AHCI_FLAG_COMMON, |
Erik Inge Bolsø | 14bdef9 | 2009-03-14 21:38:24 +0100 | [diff] [blame] | 206 | .pio_mask = ATA_PIO4, |
Tejun Heo | e297d99 | 2008-06-10 00:13:04 +0900 | [diff] [blame] | 207 | .udma_mask = ATA_UDMA6, |
Tejun Heo | 441577e | 2010-03-29 10:32:39 +0900 | [diff] [blame] | 208 | .port_ops = &ahci_vt8251_ops, |
Shaohua Li | 1b677af | 2009-11-16 09:56:05 +0800 | [diff] [blame] | 209 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 210 | }; |
| 211 | |
Jeff Garzik | 3b7d697 | 2005-11-10 11:04:11 -0500 | [diff] [blame] | 212 | static const struct pci_device_id ahci_pci_tbl[] = { |
Jeff Garzik | fe7fa31 | 2006-06-22 23:05:36 -0400 | [diff] [blame] | 213 | /* Intel */ |
Jeff Garzik | 54bb3a94 | 2006-09-27 22:20:11 -0400 | [diff] [blame] | 214 | { PCI_VDEVICE(INTEL, 0x2652), board_ahci }, /* ICH6 */ |
| 215 | { PCI_VDEVICE(INTEL, 0x2653), board_ahci }, /* ICH6M */ |
| 216 | { PCI_VDEVICE(INTEL, 0x27c1), board_ahci }, /* ICH7 */ |
| 217 | { PCI_VDEVICE(INTEL, 0x27c5), board_ahci }, /* ICH7M */ |
| 218 | { PCI_VDEVICE(INTEL, 0x27c3), board_ahci }, /* ICH7R */ |
Tejun Heo | 82490c0 | 2007-01-23 15:13:39 +0900 | [diff] [blame] | 219 | { PCI_VDEVICE(AL, 0x5288), board_ahci_ign_iferr }, /* ULi M5288 */ |
Jeff Garzik | 54bb3a94 | 2006-09-27 22:20:11 -0400 | [diff] [blame] | 220 | { PCI_VDEVICE(INTEL, 0x2681), board_ahci }, /* ESB2 */ |
| 221 | { PCI_VDEVICE(INTEL, 0x2682), board_ahci }, /* ESB2 */ |
| 222 | { PCI_VDEVICE(INTEL, 0x2683), board_ahci }, /* ESB2 */ |
| 223 | { PCI_VDEVICE(INTEL, 0x27c6), board_ahci }, /* ICH7-M DH */ |
Tejun Heo | 7a234af | 2007-09-03 12:44:57 +0900 | [diff] [blame] | 224 | { PCI_VDEVICE(INTEL, 0x2821), board_ahci }, /* ICH8 */ |
Shaohua Li | 1b677af | 2009-11-16 09:56:05 +0800 | [diff] [blame] | 225 | { PCI_VDEVICE(INTEL, 0x2822), board_ahci_nosntf }, /* ICH8 */ |
Tejun Heo | 7a234af | 2007-09-03 12:44:57 +0900 | [diff] [blame] | 226 | { PCI_VDEVICE(INTEL, 0x2824), board_ahci }, /* ICH8 */ |
| 227 | { PCI_VDEVICE(INTEL, 0x2829), board_ahci }, /* ICH8M */ |
| 228 | { PCI_VDEVICE(INTEL, 0x282a), board_ahci }, /* ICH8M */ |
| 229 | { PCI_VDEVICE(INTEL, 0x2922), board_ahci }, /* ICH9 */ |
| 230 | { PCI_VDEVICE(INTEL, 0x2923), board_ahci }, /* ICH9 */ |
| 231 | { PCI_VDEVICE(INTEL, 0x2924), board_ahci }, /* ICH9 */ |
| 232 | { PCI_VDEVICE(INTEL, 0x2925), board_ahci }, /* ICH9 */ |
| 233 | { PCI_VDEVICE(INTEL, 0x2927), board_ahci }, /* ICH9 */ |
| 234 | { PCI_VDEVICE(INTEL, 0x2929), board_ahci }, /* ICH9M */ |
| 235 | { PCI_VDEVICE(INTEL, 0x292a), board_ahci }, /* ICH9M */ |
| 236 | { PCI_VDEVICE(INTEL, 0x292b), board_ahci }, /* ICH9M */ |
| 237 | { PCI_VDEVICE(INTEL, 0x292c), board_ahci }, /* ICH9M */ |
| 238 | { PCI_VDEVICE(INTEL, 0x292f), board_ahci }, /* ICH9M */ |
| 239 | { PCI_VDEVICE(INTEL, 0x294d), board_ahci }, /* ICH9 */ |
| 240 | { PCI_VDEVICE(INTEL, 0x294e), board_ahci }, /* ICH9M */ |
Jason Gaston | d4155e6 | 2007-09-20 17:35:00 -0400 | [diff] [blame] | 241 | { PCI_VDEVICE(INTEL, 0x502a), board_ahci }, /* Tolapai */ |
| 242 | { PCI_VDEVICE(INTEL, 0x502b), board_ahci }, /* Tolapai */ |
Jason Gaston | 16ad1ad | 2008-01-28 17:34:14 -0800 | [diff] [blame] | 243 | { PCI_VDEVICE(INTEL, 0x3a05), board_ahci }, /* ICH10 */ |
Mark Goodwin | b2dde6a | 2009-06-26 10:44:11 -0500 | [diff] [blame] | 244 | { PCI_VDEVICE(INTEL, 0x3a22), board_ahci }, /* ICH10 */ |
Jason Gaston | 16ad1ad | 2008-01-28 17:34:14 -0800 | [diff] [blame] | 245 | { PCI_VDEVICE(INTEL, 0x3a25), board_ahci }, /* ICH10 */ |
David Milburn | c1f57d9 | 2009-07-22 15:15:56 -0500 | [diff] [blame] | 246 | { PCI_VDEVICE(INTEL, 0x3b22), board_ahci }, /* PCH AHCI */ |
| 247 | { PCI_VDEVICE(INTEL, 0x3b23), board_ahci }, /* PCH AHCI */ |
Seth Heasley | adcb530 | 2008-08-11 17:03:09 -0700 | [diff] [blame] | 248 | { PCI_VDEVICE(INTEL, 0x3b24), board_ahci }, /* PCH RAID */ |
Seth Heasley | 8e48b6b | 2008-08-27 16:47:22 -0700 | [diff] [blame] | 249 | { PCI_VDEVICE(INTEL, 0x3b25), board_ahci }, /* PCH RAID */ |
David Milburn | c1f57d9 | 2009-07-22 15:15:56 -0500 | [diff] [blame] | 250 | { PCI_VDEVICE(INTEL, 0x3b29), board_ahci }, /* PCH AHCI */ |
Seth Heasley | adcb530 | 2008-08-11 17:03:09 -0700 | [diff] [blame] | 251 | { PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */ |
Seth Heasley | 8e48b6b | 2008-08-27 16:47:22 -0700 | [diff] [blame] | 252 | { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci }, /* PCH RAID */ |
David Milburn | c1f57d9 | 2009-07-22 15:15:56 -0500 | [diff] [blame] | 253 | { PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */ |
Seth Heasley | 5623cab | 2010-01-12 17:00:18 -0800 | [diff] [blame] | 254 | { PCI_VDEVICE(INTEL, 0x1c02), board_ahci }, /* CPT AHCI */ |
| 255 | { PCI_VDEVICE(INTEL, 0x1c03), board_ahci }, /* CPT AHCI */ |
| 256 | { PCI_VDEVICE(INTEL, 0x1c04), board_ahci }, /* CPT RAID */ |
| 257 | { PCI_VDEVICE(INTEL, 0x1c05), board_ahci }, /* CPT RAID */ |
| 258 | { PCI_VDEVICE(INTEL, 0x1c06), board_ahci }, /* CPT RAID */ |
| 259 | { PCI_VDEVICE(INTEL, 0x1c07), board_ahci }, /* CPT RAID */ |
Seth Heasley | 992b3fb | 2010-09-09 09:44:56 -0700 | [diff] [blame] | 260 | { PCI_VDEVICE(INTEL, 0x1d02), board_ahci }, /* PBG AHCI */ |
| 261 | { PCI_VDEVICE(INTEL, 0x1d04), board_ahci }, /* PBG RAID */ |
| 262 | { PCI_VDEVICE(INTEL, 0x1d06), board_ahci }, /* PBG RAID */ |
Jeff Garzik | fe7fa31 | 2006-06-22 23:05:36 -0400 | [diff] [blame] | 263 | |
Tejun Heo | e34bb37 | 2007-02-26 20:24:03 +0900 | [diff] [blame] | 264 | /* JMicron 360/1/3/5/6, match class to avoid IDE function */ |
| 265 | { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, |
| 266 | PCI_CLASS_STORAGE_SATA_AHCI, 0xffffff, board_ahci_ign_iferr }, |
Jeff Garzik | fe7fa31 | 2006-06-22 23:05:36 -0400 | [diff] [blame] | 267 | |
| 268 | /* ATI */ |
Conke Hu | c65ec1c | 2007-04-11 18:23:14 +0800 | [diff] [blame] | 269 | { PCI_VDEVICE(ATI, 0x4380), board_ahci_sb600 }, /* ATI SB600 */ |
Shane Huang | e39fc8c | 2008-02-22 05:00:31 -0800 | [diff] [blame] | 270 | { PCI_VDEVICE(ATI, 0x4390), board_ahci_sb700 }, /* ATI SB700/800 */ |
| 271 | { PCI_VDEVICE(ATI, 0x4391), board_ahci_sb700 }, /* ATI SB700/800 */ |
| 272 | { PCI_VDEVICE(ATI, 0x4392), board_ahci_sb700 }, /* ATI SB700/800 */ |
| 273 | { PCI_VDEVICE(ATI, 0x4393), board_ahci_sb700 }, /* ATI SB700/800 */ |
| 274 | { PCI_VDEVICE(ATI, 0x4394), board_ahci_sb700 }, /* ATI SB700/800 */ |
| 275 | { PCI_VDEVICE(ATI, 0x4395), board_ahci_sb700 }, /* ATI SB700/800 */ |
Jeff Garzik | fe7fa31 | 2006-06-22 23:05:36 -0400 | [diff] [blame] | 276 | |
Shane Huang | e2dd90b | 2009-07-29 11:34:49 +0800 | [diff] [blame] | 277 | /* AMD */ |
Shane Huang | 5deab53 | 2009-10-13 11:14:00 +0800 | [diff] [blame] | 278 | { PCI_VDEVICE(AMD, 0x7800), board_ahci }, /* AMD Hudson-2 */ |
Shane Huang | e2dd90b | 2009-07-29 11:34:49 +0800 | [diff] [blame] | 279 | /* AMD is using RAID class only for ahci controllers */ |
| 280 | { PCI_VENDOR_ID_AMD, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, |
| 281 | PCI_CLASS_STORAGE_RAID << 8, 0xffffff, board_ahci }, |
| 282 | |
Jeff Garzik | fe7fa31 | 2006-06-22 23:05:36 -0400 | [diff] [blame] | 283 | /* VIA */ |
Jeff Garzik | 54bb3a94 | 2006-09-27 22:20:11 -0400 | [diff] [blame] | 284 | { PCI_VDEVICE(VIA, 0x3349), board_ahci_vt8251 }, /* VIA VT8251 */ |
Tejun Heo | bf33554 | 2007-04-11 17:27:14 +0900 | [diff] [blame] | 285 | { PCI_VDEVICE(VIA, 0x6287), board_ahci_vt8251 }, /* VIA VT8251 */ |
Jeff Garzik | fe7fa31 | 2006-06-22 23:05:36 -0400 | [diff] [blame] | 286 | |
| 287 | /* NVIDIA */ |
Tejun Heo | e297d99 | 2008-06-10 00:13:04 +0900 | [diff] [blame] | 288 | { PCI_VDEVICE(NVIDIA, 0x044c), board_ahci_mcp65 }, /* MCP65 */ |
| 289 | { PCI_VDEVICE(NVIDIA, 0x044d), board_ahci_mcp65 }, /* MCP65 */ |
| 290 | { PCI_VDEVICE(NVIDIA, 0x044e), board_ahci_mcp65 }, /* MCP65 */ |
| 291 | { PCI_VDEVICE(NVIDIA, 0x044f), board_ahci_mcp65 }, /* MCP65 */ |
| 292 | { PCI_VDEVICE(NVIDIA, 0x045c), board_ahci_mcp65 }, /* MCP65 */ |
| 293 | { PCI_VDEVICE(NVIDIA, 0x045d), board_ahci_mcp65 }, /* MCP65 */ |
| 294 | { PCI_VDEVICE(NVIDIA, 0x045e), board_ahci_mcp65 }, /* MCP65 */ |
| 295 | { PCI_VDEVICE(NVIDIA, 0x045f), board_ahci_mcp65 }, /* MCP65 */ |
Tejun Heo | 441577e | 2010-03-29 10:32:39 +0900 | [diff] [blame] | 296 | { PCI_VDEVICE(NVIDIA, 0x0550), board_ahci_mcp67 }, /* MCP67 */ |
| 297 | { PCI_VDEVICE(NVIDIA, 0x0551), board_ahci_mcp67 }, /* MCP67 */ |
| 298 | { PCI_VDEVICE(NVIDIA, 0x0552), board_ahci_mcp67 }, /* MCP67 */ |
| 299 | { PCI_VDEVICE(NVIDIA, 0x0553), board_ahci_mcp67 }, /* MCP67 */ |
| 300 | { PCI_VDEVICE(NVIDIA, 0x0554), board_ahci_mcp67 }, /* MCP67 */ |
| 301 | { PCI_VDEVICE(NVIDIA, 0x0555), board_ahci_mcp67 }, /* MCP67 */ |
| 302 | { PCI_VDEVICE(NVIDIA, 0x0556), board_ahci_mcp67 }, /* MCP67 */ |
| 303 | { PCI_VDEVICE(NVIDIA, 0x0557), board_ahci_mcp67 }, /* MCP67 */ |
| 304 | { PCI_VDEVICE(NVIDIA, 0x0558), board_ahci_mcp67 }, /* MCP67 */ |
| 305 | { PCI_VDEVICE(NVIDIA, 0x0559), board_ahci_mcp67 }, /* MCP67 */ |
| 306 | { PCI_VDEVICE(NVIDIA, 0x055a), board_ahci_mcp67 }, /* MCP67 */ |
| 307 | { PCI_VDEVICE(NVIDIA, 0x055b), board_ahci_mcp67 }, /* MCP67 */ |
| 308 | { PCI_VDEVICE(NVIDIA, 0x0580), board_ahci_mcp_linux }, /* Linux ID */ |
| 309 | { PCI_VDEVICE(NVIDIA, 0x0581), board_ahci_mcp_linux }, /* Linux ID */ |
| 310 | { PCI_VDEVICE(NVIDIA, 0x0582), board_ahci_mcp_linux }, /* Linux ID */ |
| 311 | { PCI_VDEVICE(NVIDIA, 0x0583), board_ahci_mcp_linux }, /* Linux ID */ |
| 312 | { PCI_VDEVICE(NVIDIA, 0x0584), board_ahci_mcp_linux }, /* Linux ID */ |
| 313 | { PCI_VDEVICE(NVIDIA, 0x0585), board_ahci_mcp_linux }, /* Linux ID */ |
| 314 | { PCI_VDEVICE(NVIDIA, 0x0586), board_ahci_mcp_linux }, /* Linux ID */ |
| 315 | { PCI_VDEVICE(NVIDIA, 0x0587), board_ahci_mcp_linux }, /* Linux ID */ |
| 316 | { PCI_VDEVICE(NVIDIA, 0x0588), board_ahci_mcp_linux }, /* Linux ID */ |
| 317 | { PCI_VDEVICE(NVIDIA, 0x0589), board_ahci_mcp_linux }, /* Linux ID */ |
| 318 | { PCI_VDEVICE(NVIDIA, 0x058a), board_ahci_mcp_linux }, /* Linux ID */ |
| 319 | { PCI_VDEVICE(NVIDIA, 0x058b), board_ahci_mcp_linux }, /* Linux ID */ |
| 320 | { PCI_VDEVICE(NVIDIA, 0x058c), board_ahci_mcp_linux }, /* Linux ID */ |
| 321 | { PCI_VDEVICE(NVIDIA, 0x058d), board_ahci_mcp_linux }, /* Linux ID */ |
| 322 | { PCI_VDEVICE(NVIDIA, 0x058e), board_ahci_mcp_linux }, /* Linux ID */ |
| 323 | { PCI_VDEVICE(NVIDIA, 0x058f), board_ahci_mcp_linux }, /* Linux ID */ |
| 324 | { PCI_VDEVICE(NVIDIA, 0x07f0), board_ahci_mcp73 }, /* MCP73 */ |
| 325 | { PCI_VDEVICE(NVIDIA, 0x07f1), board_ahci_mcp73 }, /* MCP73 */ |
| 326 | { PCI_VDEVICE(NVIDIA, 0x07f2), board_ahci_mcp73 }, /* MCP73 */ |
| 327 | { PCI_VDEVICE(NVIDIA, 0x07f3), board_ahci_mcp73 }, /* MCP73 */ |
| 328 | { PCI_VDEVICE(NVIDIA, 0x07f4), board_ahci_mcp73 }, /* MCP73 */ |
| 329 | { PCI_VDEVICE(NVIDIA, 0x07f5), board_ahci_mcp73 }, /* MCP73 */ |
| 330 | { PCI_VDEVICE(NVIDIA, 0x07f6), board_ahci_mcp73 }, /* MCP73 */ |
| 331 | { PCI_VDEVICE(NVIDIA, 0x07f7), board_ahci_mcp73 }, /* MCP73 */ |
| 332 | { PCI_VDEVICE(NVIDIA, 0x07f8), board_ahci_mcp73 }, /* MCP73 */ |
| 333 | { PCI_VDEVICE(NVIDIA, 0x07f9), board_ahci_mcp73 }, /* MCP73 */ |
| 334 | { PCI_VDEVICE(NVIDIA, 0x07fa), board_ahci_mcp73 }, /* MCP73 */ |
| 335 | { PCI_VDEVICE(NVIDIA, 0x07fb), board_ahci_mcp73 }, /* MCP73 */ |
| 336 | { PCI_VDEVICE(NVIDIA, 0x0ad0), board_ahci_mcp77 }, /* MCP77 */ |
| 337 | { PCI_VDEVICE(NVIDIA, 0x0ad1), board_ahci_mcp77 }, /* MCP77 */ |
| 338 | { PCI_VDEVICE(NVIDIA, 0x0ad2), board_ahci_mcp77 }, /* MCP77 */ |
| 339 | { PCI_VDEVICE(NVIDIA, 0x0ad3), board_ahci_mcp77 }, /* MCP77 */ |
| 340 | { PCI_VDEVICE(NVIDIA, 0x0ad4), board_ahci_mcp77 }, /* MCP77 */ |
| 341 | { PCI_VDEVICE(NVIDIA, 0x0ad5), board_ahci_mcp77 }, /* MCP77 */ |
| 342 | { PCI_VDEVICE(NVIDIA, 0x0ad6), board_ahci_mcp77 }, /* MCP77 */ |
| 343 | { PCI_VDEVICE(NVIDIA, 0x0ad7), board_ahci_mcp77 }, /* MCP77 */ |
| 344 | { PCI_VDEVICE(NVIDIA, 0x0ad8), board_ahci_mcp77 }, /* MCP77 */ |
| 345 | { PCI_VDEVICE(NVIDIA, 0x0ad9), board_ahci_mcp77 }, /* MCP77 */ |
| 346 | { PCI_VDEVICE(NVIDIA, 0x0ada), board_ahci_mcp77 }, /* MCP77 */ |
| 347 | { PCI_VDEVICE(NVIDIA, 0x0adb), board_ahci_mcp77 }, /* MCP77 */ |
| 348 | { PCI_VDEVICE(NVIDIA, 0x0ab4), board_ahci_mcp79 }, /* MCP79 */ |
| 349 | { PCI_VDEVICE(NVIDIA, 0x0ab5), board_ahci_mcp79 }, /* MCP79 */ |
| 350 | { PCI_VDEVICE(NVIDIA, 0x0ab6), board_ahci_mcp79 }, /* MCP79 */ |
| 351 | { PCI_VDEVICE(NVIDIA, 0x0ab7), board_ahci_mcp79 }, /* MCP79 */ |
| 352 | { PCI_VDEVICE(NVIDIA, 0x0ab8), board_ahci_mcp79 }, /* MCP79 */ |
| 353 | { PCI_VDEVICE(NVIDIA, 0x0ab9), board_ahci_mcp79 }, /* MCP79 */ |
| 354 | { PCI_VDEVICE(NVIDIA, 0x0aba), board_ahci_mcp79 }, /* MCP79 */ |
| 355 | { PCI_VDEVICE(NVIDIA, 0x0abb), board_ahci_mcp79 }, /* MCP79 */ |
| 356 | { PCI_VDEVICE(NVIDIA, 0x0abc), board_ahci_mcp79 }, /* MCP79 */ |
| 357 | { PCI_VDEVICE(NVIDIA, 0x0abd), board_ahci_mcp79 }, /* MCP79 */ |
| 358 | { PCI_VDEVICE(NVIDIA, 0x0abe), board_ahci_mcp79 }, /* MCP79 */ |
| 359 | { PCI_VDEVICE(NVIDIA, 0x0abf), board_ahci_mcp79 }, /* MCP79 */ |
| 360 | { PCI_VDEVICE(NVIDIA, 0x0d84), board_ahci_mcp89 }, /* MCP89 */ |
| 361 | { PCI_VDEVICE(NVIDIA, 0x0d85), board_ahci_mcp89 }, /* MCP89 */ |
| 362 | { PCI_VDEVICE(NVIDIA, 0x0d86), board_ahci_mcp89 }, /* MCP89 */ |
| 363 | { PCI_VDEVICE(NVIDIA, 0x0d87), board_ahci_mcp89 }, /* MCP89 */ |
| 364 | { PCI_VDEVICE(NVIDIA, 0x0d88), board_ahci_mcp89 }, /* MCP89 */ |
| 365 | { PCI_VDEVICE(NVIDIA, 0x0d89), board_ahci_mcp89 }, /* MCP89 */ |
| 366 | { PCI_VDEVICE(NVIDIA, 0x0d8a), board_ahci_mcp89 }, /* MCP89 */ |
| 367 | { PCI_VDEVICE(NVIDIA, 0x0d8b), board_ahci_mcp89 }, /* MCP89 */ |
| 368 | { PCI_VDEVICE(NVIDIA, 0x0d8c), board_ahci_mcp89 }, /* MCP89 */ |
| 369 | { PCI_VDEVICE(NVIDIA, 0x0d8d), board_ahci_mcp89 }, /* MCP89 */ |
| 370 | { PCI_VDEVICE(NVIDIA, 0x0d8e), board_ahci_mcp89 }, /* MCP89 */ |
| 371 | { PCI_VDEVICE(NVIDIA, 0x0d8f), board_ahci_mcp89 }, /* MCP89 */ |
Jeff Garzik | fe7fa31 | 2006-06-22 23:05:36 -0400 | [diff] [blame] | 372 | |
Jeff Garzik | 95916ed | 2006-07-29 04:10:14 -0400 | [diff] [blame] | 373 | /* SiS */ |
Tejun Heo | 20e2de4 | 2008-08-01 12:51:43 +0900 | [diff] [blame] | 374 | { PCI_VDEVICE(SI, 0x1184), board_ahci }, /* SiS 966 */ |
| 375 | { PCI_VDEVICE(SI, 0x1185), board_ahci }, /* SiS 968 */ |
| 376 | { PCI_VDEVICE(SI, 0x0186), board_ahci }, /* SiS 968 */ |
Jeff Garzik | 95916ed | 2006-07-29 04:10:14 -0400 | [diff] [blame] | 377 | |
Jeff Garzik | cd70c26 | 2007-07-08 02:29:42 -0400 | [diff] [blame] | 378 | /* Marvell */ |
| 379 | { PCI_VDEVICE(MARVELL, 0x6145), board_ahci_mv }, /* 6145 */ |
Jose Alberto Reguero | c40e7cb | 2008-03-13 23:22:24 +0100 | [diff] [blame] | 380 | { PCI_VDEVICE(MARVELL, 0x6121), board_ahci_mv }, /* 6121 */ |
Tejun Heo | 5f17310 | 2010-07-24 16:53:48 +0200 | [diff] [blame] | 381 | { PCI_DEVICE(0x1b4b, 0x9123), |
| 382 | .driver_data = board_ahci_yes_fbs }, /* 88se9128 */ |
Jeff Garzik | cd70c26 | 2007-07-08 02:29:42 -0400 | [diff] [blame] | 383 | |
Mark Nelson | c77a036 | 2008-10-23 14:08:16 +1100 | [diff] [blame] | 384 | /* Promise */ |
| 385 | { PCI_VDEVICE(PROMISE, 0x3f20), board_ahci }, /* PDC42819 */ |
| 386 | |
Jeff Garzik | 415ae2b | 2006-11-01 05:10:42 -0500 | [diff] [blame] | 387 | /* Generic, PCI class code for AHCI */ |
| 388 | { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, |
Conke Hu | c9f8947 | 2007-01-09 05:32:51 -0500 | [diff] [blame] | 389 | PCI_CLASS_STORAGE_SATA_AHCI, 0xffffff, board_ahci }, |
Jeff Garzik | 415ae2b | 2006-11-01 05:10:42 -0500 | [diff] [blame] | 390 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 391 | { } /* terminate list */ |
| 392 | }; |
| 393 | |
| 394 | |
| 395 | static struct pci_driver ahci_pci_driver = { |
| 396 | .name = DRV_NAME, |
| 397 | .id_table = ahci_pci_tbl, |
| 398 | .probe = ahci_init_one, |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 399 | .remove = ata_pci_remove_one, |
Tejun Heo | 438ac6d | 2007-03-02 17:31:26 +0900 | [diff] [blame] | 400 | #ifdef CONFIG_PM |
Tejun Heo | c133287 | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 401 | .suspend = ahci_pci_device_suspend, |
| 402 | .resume = ahci_pci_device_resume, |
Tejun Heo | 438ac6d | 2007-03-02 17:31:26 +0900 | [diff] [blame] | 403 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 404 | }; |
| 405 | |
Alan Cox | 5b66c82 | 2008-09-03 14:48:34 +0100 | [diff] [blame] | 406 | #if defined(CONFIG_PATA_MARVELL) || defined(CONFIG_PATA_MARVELL_MODULE) |
| 407 | static int marvell_enable; |
| 408 | #else |
| 409 | static int marvell_enable = 1; |
| 410 | #endif |
| 411 | module_param(marvell_enable, int, 0644); |
| 412 | MODULE_PARM_DESC(marvell_enable, "Marvell SATA via AHCI (1 = enabled)"); |
| 413 | |
| 414 | |
Anton Vorontsov | 394d6e5 | 2010-03-03 20:17:36 +0300 | [diff] [blame] | 415 | static void ahci_pci_save_initial_config(struct pci_dev *pdev, |
| 416 | struct ahci_host_priv *hpriv) |
| 417 | { |
| 418 | unsigned int force_port_map = 0; |
| 419 | unsigned int mask_port_map = 0; |
| 420 | |
| 421 | if (pdev->vendor == PCI_VENDOR_ID_JMICRON && pdev->device == 0x2361) { |
| 422 | dev_info(&pdev->dev, "JMB361 has only one port\n"); |
| 423 | force_port_map = 1; |
| 424 | } |
| 425 | |
| 426 | /* |
| 427 | * Temporary Marvell 6145 hack: PATA port presence |
| 428 | * is asserted through the standard AHCI port |
| 429 | * presence register, as bit 4 (counting from 0) |
| 430 | */ |
| 431 | if (hpriv->flags & AHCI_HFLAG_MV_PATA) { |
| 432 | if (pdev->device == 0x6121) |
| 433 | mask_port_map = 0x3; |
| 434 | else |
| 435 | mask_port_map = 0xf; |
| 436 | dev_info(&pdev->dev, |
| 437 | "Disabling your PATA port. Use the boot option 'ahci.marvell_enable=0' to avoid this.\n"); |
| 438 | } |
| 439 | |
Anton Vorontsov | 1d51335 | 2010-03-03 20:17:37 +0300 | [diff] [blame] | 440 | ahci_save_initial_config(&pdev->dev, hpriv, force_port_map, |
| 441 | mask_port_map); |
Anton Vorontsov | 394d6e5 | 2010-03-03 20:17:36 +0300 | [diff] [blame] | 442 | } |
| 443 | |
Anton Vorontsov | 3303040 | 2010-03-03 20:17:39 +0300 | [diff] [blame] | 444 | static int ahci_pci_reset_controller(struct ata_host *host) |
| 445 | { |
| 446 | struct pci_dev *pdev = to_pci_dev(host->dev); |
| 447 | |
| 448 | ahci_reset_controller(host); |
| 449 | |
Tejun Heo | d91542c | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 450 | if (pdev->vendor == PCI_VENDOR_ID_INTEL) { |
Anton Vorontsov | 3303040 | 2010-03-03 20:17:39 +0300 | [diff] [blame] | 451 | struct ahci_host_priv *hpriv = host->private_data; |
Tejun Heo | d91542c | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 452 | u16 tmp16; |
| 453 | |
| 454 | /* configure PCS */ |
| 455 | pci_read_config_word(pdev, 0x92, &tmp16); |
Tejun Heo | 49f2909 | 2007-11-19 16:03:44 +0900 | [diff] [blame] | 456 | if ((tmp16 & hpriv->port_map) != hpriv->port_map) { |
| 457 | tmp16 |= hpriv->port_map; |
| 458 | pci_write_config_word(pdev, 0x92, tmp16); |
| 459 | } |
Tejun Heo | d91542c | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 460 | } |
| 461 | |
| 462 | return 0; |
| 463 | } |
| 464 | |
Anton Vorontsov | 781d655 | 2010-03-03 20:17:42 +0300 | [diff] [blame] | 465 | static void ahci_pci_init_controller(struct ata_host *host) |
| 466 | { |
| 467 | struct ahci_host_priv *hpriv = host->private_data; |
| 468 | struct pci_dev *pdev = to_pci_dev(host->dev); |
| 469 | void __iomem *port_mmio; |
| 470 | u32 tmp; |
Jose Alberto Reguero | c40e7cb | 2008-03-13 23:22:24 +0100 | [diff] [blame] | 471 | int mv; |
Tejun Heo | d91542c | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 472 | |
Tejun Heo | 417a1a6 | 2007-09-23 13:19:55 +0900 | [diff] [blame] | 473 | if (hpriv->flags & AHCI_HFLAG_MV_PATA) { |
Jose Alberto Reguero | c40e7cb | 2008-03-13 23:22:24 +0100 | [diff] [blame] | 474 | if (pdev->device == 0x6121) |
| 475 | mv = 2; |
| 476 | else |
| 477 | mv = 4; |
| 478 | port_mmio = __ahci_port_base(host, mv); |
Jeff Garzik | cd70c26 | 2007-07-08 02:29:42 -0400 | [diff] [blame] | 479 | |
| 480 | writel(0, port_mmio + PORT_IRQ_MASK); |
| 481 | |
| 482 | /* clear port IRQ */ |
| 483 | tmp = readl(port_mmio + PORT_IRQ_STAT); |
| 484 | VPRINTK("PORT_IRQ_STAT 0x%x\n", tmp); |
| 485 | if (tmp) |
| 486 | writel(tmp, port_mmio + PORT_IRQ_STAT); |
| 487 | } |
| 488 | |
Anton Vorontsov | 781d655 | 2010-03-03 20:17:42 +0300 | [diff] [blame] | 489 | ahci_init_controller(host); |
Tejun Heo | d91542c | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 490 | } |
| 491 | |
Shane Huang | bd17243 | 2008-06-10 15:52:04 +0800 | [diff] [blame] | 492 | static int ahci_sb600_check_ready(struct ata_link *link) |
| 493 | { |
| 494 | void __iomem *port_mmio = ahci_port_base(link->ap); |
| 495 | u8 status = readl(port_mmio + PORT_TFDATA) & 0xFF; |
| 496 | u32 irq_status = readl(port_mmio + PORT_IRQ_STAT); |
| 497 | |
| 498 | /* |
| 499 | * There is no need to check TFDATA if BAD PMP is found due to HW bug, |
| 500 | * which can save timeout delay. |
| 501 | */ |
| 502 | if (irq_status & PORT_IRQ_BAD_PMP) |
| 503 | return -EIO; |
| 504 | |
| 505 | return ata_check_ready(status); |
| 506 | } |
| 507 | |
| 508 | static int ahci_sb600_softreset(struct ata_link *link, unsigned int *class, |
| 509 | unsigned long deadline) |
| 510 | { |
| 511 | struct ata_port *ap = link->ap; |
| 512 | void __iomem *port_mmio = ahci_port_base(ap); |
| 513 | int pmp = sata_srst_pmp(link); |
| 514 | int rc; |
| 515 | u32 irq_sts; |
| 516 | |
| 517 | DPRINTK("ENTER\n"); |
| 518 | |
| 519 | rc = ahci_do_softreset(link, class, pmp, deadline, |
| 520 | ahci_sb600_check_ready); |
| 521 | |
| 522 | /* |
| 523 | * Soft reset fails on some ATI chips with IPMS set when PMP |
| 524 | * is enabled but SATA HDD/ODD is connected to SATA port, |
| 525 | * do soft reset again to port 0. |
| 526 | */ |
| 527 | if (rc == -EIO) { |
| 528 | irq_sts = readl(port_mmio + PORT_IRQ_STAT); |
| 529 | if (irq_sts & PORT_IRQ_BAD_PMP) { |
| 530 | ata_link_printk(link, KERN_WARNING, |
Shane Huang | b6931c1 | 2009-08-05 10:10:41 +0800 | [diff] [blame] | 531 | "applying SB600 PMP SRST workaround " |
| 532 | "and retrying\n"); |
Shane Huang | bd17243 | 2008-06-10 15:52:04 +0800 | [diff] [blame] | 533 | rc = ahci_do_softreset(link, class, 0, deadline, |
| 534 | ahci_check_ready); |
| 535 | } |
| 536 | } |
| 537 | |
| 538 | return rc; |
| 539 | } |
| 540 | |
Tejun Heo | cc0680a | 2007-08-06 18:36:23 +0900 | [diff] [blame] | 541 | static int ahci_vt8251_hardreset(struct ata_link *link, unsigned int *class, |
Tejun Heo | d4b2bab | 2007-02-02 16:50:52 +0900 | [diff] [blame] | 542 | unsigned long deadline) |
Tejun Heo | ad616ff | 2006-11-01 18:00:24 +0900 | [diff] [blame] | 543 | { |
Tejun Heo | cc0680a | 2007-08-06 18:36:23 +0900 | [diff] [blame] | 544 | struct ata_port *ap = link->ap; |
Tejun Heo | 9dadd45 | 2008-04-07 22:47:19 +0900 | [diff] [blame] | 545 | bool online; |
Tejun Heo | ad616ff | 2006-11-01 18:00:24 +0900 | [diff] [blame] | 546 | int rc; |
| 547 | |
| 548 | DPRINTK("ENTER\n"); |
| 549 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 550 | ahci_stop_engine(ap); |
Tejun Heo | ad616ff | 2006-11-01 18:00:24 +0900 | [diff] [blame] | 551 | |
Tejun Heo | cc0680a | 2007-08-06 18:36:23 +0900 | [diff] [blame] | 552 | rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context), |
Tejun Heo | 9dadd45 | 2008-04-07 22:47:19 +0900 | [diff] [blame] | 553 | deadline, &online, NULL); |
Tejun Heo | ad616ff | 2006-11-01 18:00:24 +0900 | [diff] [blame] | 554 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 555 | ahci_start_engine(ap); |
Tejun Heo | ad616ff | 2006-11-01 18:00:24 +0900 | [diff] [blame] | 556 | |
| 557 | DPRINTK("EXIT, rc=%d, class=%u\n", rc, *class); |
| 558 | |
| 559 | /* vt8251 doesn't clear BSY on signature FIS reception, |
| 560 | * request follow-up softreset. |
| 561 | */ |
Tejun Heo | 9dadd45 | 2008-04-07 22:47:19 +0900 | [diff] [blame] | 562 | return online ? -EAGAIN : rc; |
Tejun Heo | ad616ff | 2006-11-01 18:00:24 +0900 | [diff] [blame] | 563 | } |
| 564 | |
Tejun Heo | edc9305 | 2007-10-25 14:59:16 +0900 | [diff] [blame] | 565 | static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class, |
| 566 | unsigned long deadline) |
| 567 | { |
| 568 | struct ata_port *ap = link->ap; |
| 569 | struct ahci_port_priv *pp = ap->private_data; |
| 570 | u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG; |
| 571 | struct ata_taskfile tf; |
Tejun Heo | 9dadd45 | 2008-04-07 22:47:19 +0900 | [diff] [blame] | 572 | bool online; |
Tejun Heo | edc9305 | 2007-10-25 14:59:16 +0900 | [diff] [blame] | 573 | int rc; |
| 574 | |
| 575 | ahci_stop_engine(ap); |
| 576 | |
| 577 | /* clear D2H reception area to properly wait for D2H FIS */ |
| 578 | ata_tf_init(link->device, &tf); |
| 579 | tf.command = 0x80; |
| 580 | ata_tf_to_fis(&tf, 0, 0, d2h_fis); |
| 581 | |
| 582 | rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context), |
Tejun Heo | 9dadd45 | 2008-04-07 22:47:19 +0900 | [diff] [blame] | 583 | deadline, &online, NULL); |
Tejun Heo | edc9305 | 2007-10-25 14:59:16 +0900 | [diff] [blame] | 584 | |
| 585 | ahci_start_engine(ap); |
| 586 | |
Tejun Heo | edc9305 | 2007-10-25 14:59:16 +0900 | [diff] [blame] | 587 | /* The pseudo configuration device on SIMG4726 attached to |
| 588 | * ASUS P5W-DH Deluxe doesn't send signature FIS after |
| 589 | * hardreset if no device is attached to the first downstream |
| 590 | * port && the pseudo device locks up on SRST w/ PMP==0. To |
| 591 | * work around this, wait for !BSY only briefly. If BSY isn't |
| 592 | * cleared, perform CLO and proceed to IDENTIFY (achieved by |
| 593 | * ATA_LFLAG_NO_SRST and ATA_LFLAG_ASSUME_ATA). |
| 594 | * |
| 595 | * Wait for two seconds. Devices attached to downstream port |
| 596 | * which can't process the following IDENTIFY after this will |
| 597 | * have to be reset again. For most cases, this should |
| 598 | * suffice while making probing snappish enough. |
| 599 | */ |
Tejun Heo | 9dadd45 | 2008-04-07 22:47:19 +0900 | [diff] [blame] | 600 | if (online) { |
| 601 | rc = ata_wait_after_reset(link, jiffies + 2 * HZ, |
| 602 | ahci_check_ready); |
| 603 | if (rc) |
Shane Huang | 78d5ae3 | 2009-08-07 15:05:52 +0800 | [diff] [blame] | 604 | ahci_kick_engine(ap); |
Tejun Heo | 9dadd45 | 2008-04-07 22:47:19 +0900 | [diff] [blame] | 605 | } |
Tejun Heo | 9dadd45 | 2008-04-07 22:47:19 +0900 | [diff] [blame] | 606 | return rc; |
Tejun Heo | edc9305 | 2007-10-25 14:59:16 +0900 | [diff] [blame] | 607 | } |
| 608 | |
Tejun Heo | 438ac6d | 2007-03-02 17:31:26 +0900 | [diff] [blame] | 609 | #ifdef CONFIG_PM |
Tejun Heo | c133287 | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 610 | static int ahci_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg) |
| 611 | { |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 612 | struct ata_host *host = dev_get_drvdata(&pdev->dev); |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 613 | struct ahci_host_priv *hpriv = host->private_data; |
Anton Vorontsov | d899334 | 2010-03-03 20:17:34 +0300 | [diff] [blame] | 614 | void __iomem *mmio = hpriv->mmio; |
Tejun Heo | c133287 | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 615 | u32 ctl; |
| 616 | |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 617 | if (mesg.event & PM_EVENT_SUSPEND && |
| 618 | hpriv->flags & AHCI_HFLAG_NO_SUSPEND) { |
| 619 | dev_printk(KERN_ERR, &pdev->dev, |
| 620 | "BIOS update required for suspend/resume\n"); |
| 621 | return -EIO; |
| 622 | } |
| 623 | |
Rafael J. Wysocki | 3a2d5b7 | 2008-02-23 19:13:25 +0100 | [diff] [blame] | 624 | if (mesg.event & PM_EVENT_SLEEP) { |
Tejun Heo | c133287 | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 625 | /* AHCI spec rev1.1 section 8.3.3: |
| 626 | * Software must disable interrupts prior to requesting a |
| 627 | * transition of the HBA to D3 state. |
| 628 | */ |
| 629 | ctl = readl(mmio + HOST_CTL); |
| 630 | ctl &= ~HOST_IRQ_EN; |
| 631 | writel(ctl, mmio + HOST_CTL); |
| 632 | readl(mmio + HOST_CTL); /* flush */ |
| 633 | } |
| 634 | |
| 635 | return ata_pci_device_suspend(pdev, mesg); |
| 636 | } |
| 637 | |
| 638 | static int ahci_pci_device_resume(struct pci_dev *pdev) |
| 639 | { |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 640 | struct ata_host *host = dev_get_drvdata(&pdev->dev); |
Tejun Heo | c133287 | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 641 | int rc; |
| 642 | |
Tejun Heo | 553c4aa | 2006-12-26 19:39:50 +0900 | [diff] [blame] | 643 | rc = ata_pci_device_do_resume(pdev); |
| 644 | if (rc) |
| 645 | return rc; |
Tejun Heo | c133287 | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 646 | |
| 647 | if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND) { |
Anton Vorontsov | 3303040 | 2010-03-03 20:17:39 +0300 | [diff] [blame] | 648 | rc = ahci_pci_reset_controller(host); |
Tejun Heo | c133287 | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 649 | if (rc) |
| 650 | return rc; |
| 651 | |
Anton Vorontsov | 781d655 | 2010-03-03 20:17:42 +0300 | [diff] [blame] | 652 | ahci_pci_init_controller(host); |
Tejun Heo | c133287 | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 653 | } |
| 654 | |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 655 | ata_host_resume(host); |
Tejun Heo | c133287 | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 656 | |
| 657 | return 0; |
| 658 | } |
Tejun Heo | 438ac6d | 2007-03-02 17:31:26 +0900 | [diff] [blame] | 659 | #endif |
Tejun Heo | c133287 | 2006-07-26 15:59:26 +0900 | [diff] [blame] | 660 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 661 | static int ahci_configure_dma_masks(struct pci_dev *pdev, int using_dac) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 662 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 663 | int rc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 664 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 665 | if (using_dac && |
Yang Hongyang | 6a35528 | 2009-04-06 19:01:13 -0700 | [diff] [blame] | 666 | !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) { |
| 667 | rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 668 | if (rc) { |
Yang Hongyang | 284901a | 2009-04-06 19:01:15 -0700 | [diff] [blame] | 669 | rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 670 | if (rc) { |
Jeff Garzik | a9524a7 | 2005-10-30 14:39:11 -0500 | [diff] [blame] | 671 | dev_printk(KERN_ERR, &pdev->dev, |
| 672 | "64-bit DMA enable failed\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 673 | return rc; |
| 674 | } |
| 675 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 676 | } else { |
Yang Hongyang | 284901a | 2009-04-06 19:01:15 -0700 | [diff] [blame] | 677 | rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 678 | if (rc) { |
Jeff Garzik | a9524a7 | 2005-10-30 14:39:11 -0500 | [diff] [blame] | 679 | dev_printk(KERN_ERR, &pdev->dev, |
| 680 | "32-bit DMA enable failed\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 681 | return rc; |
| 682 | } |
Yang Hongyang | 284901a | 2009-04-06 19:01:15 -0700 | [diff] [blame] | 683 | rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 684 | if (rc) { |
Jeff Garzik | a9524a7 | 2005-10-30 14:39:11 -0500 | [diff] [blame] | 685 | dev_printk(KERN_ERR, &pdev->dev, |
| 686 | "32-bit consistent DMA enable failed\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 687 | return rc; |
| 688 | } |
| 689 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 690 | return 0; |
| 691 | } |
| 692 | |
Anton Vorontsov | 439fcae | 2010-03-03 20:17:43 +0300 | [diff] [blame] | 693 | static void ahci_pci_print_info(struct ata_host *host) |
| 694 | { |
| 695 | struct pci_dev *pdev = to_pci_dev(host->dev); |
| 696 | u16 cc; |
| 697 | const char *scc_s; |
| 698 | |
| 699 | pci_read_config_word(pdev, 0x0a, &cc); |
| 700 | if (cc == PCI_CLASS_STORAGE_IDE) |
| 701 | scc_s = "IDE"; |
| 702 | else if (cc == PCI_CLASS_STORAGE_SATA) |
| 703 | scc_s = "SATA"; |
| 704 | else if (cc == PCI_CLASS_STORAGE_RAID) |
| 705 | scc_s = "RAID"; |
| 706 | else |
| 707 | scc_s = "unknown"; |
| 708 | |
| 709 | ahci_print_info(host, scc_s); |
| 710 | } |
| 711 | |
Tejun Heo | edc9305 | 2007-10-25 14:59:16 +0900 | [diff] [blame] | 712 | /* On ASUS P5W DH Deluxe, the second port of PCI device 00:1f.2 is |
| 713 | * hardwired to on-board SIMG 4726. The chipset is ICH8 and doesn't |
| 714 | * support PMP and the 4726 either directly exports the device |
| 715 | * attached to the first downstream port or acts as a hardware storage |
| 716 | * controller and emulate a single ATA device (can be RAID 0/1 or some |
| 717 | * other configuration). |
| 718 | * |
| 719 | * When there's no device attached to the first downstream port of the |
| 720 | * 4726, "Config Disk" appears, which is a pseudo ATA device to |
| 721 | * configure the 4726. However, ATA emulation of the device is very |
| 722 | * lame. It doesn't send signature D2H Reg FIS after the initial |
| 723 | * hardreset, pukes on SRST w/ PMP==0 and has bunch of other issues. |
| 724 | * |
| 725 | * The following function works around the problem by always using |
| 726 | * hardreset on the port and not depending on receiving signature FIS |
| 727 | * afterward. If signature FIS isn't received soon, ATA class is |
| 728 | * assumed without follow-up softreset. |
| 729 | */ |
| 730 | static void ahci_p5wdh_workaround(struct ata_host *host) |
| 731 | { |
| 732 | static struct dmi_system_id sysids[] = { |
| 733 | { |
| 734 | .ident = "P5W DH Deluxe", |
| 735 | .matches = { |
| 736 | DMI_MATCH(DMI_SYS_VENDOR, |
| 737 | "ASUSTEK COMPUTER INC"), |
| 738 | DMI_MATCH(DMI_PRODUCT_NAME, "P5W DH Deluxe"), |
| 739 | }, |
| 740 | }, |
| 741 | { } |
| 742 | }; |
| 743 | struct pci_dev *pdev = to_pci_dev(host->dev); |
| 744 | |
| 745 | if (pdev->bus->number == 0 && pdev->devfn == PCI_DEVFN(0x1f, 2) && |
| 746 | dmi_check_system(sysids)) { |
| 747 | struct ata_port *ap = host->ports[1]; |
| 748 | |
| 749 | dev_printk(KERN_INFO, &pdev->dev, "enabling ASUS P5W DH " |
| 750 | "Deluxe on-board SIMG4726 workaround\n"); |
| 751 | |
| 752 | ap->ops = &ahci_p5wdh_ops; |
| 753 | ap->link.flags |= ATA_LFLAG_NO_SRST | ATA_LFLAG_ASSUME_ATA; |
| 754 | } |
| 755 | } |
| 756 | |
Tejun Heo | 2fcad9d | 2009-10-03 18:27:29 +0900 | [diff] [blame] | 757 | /* only some SB600 ahci controllers can do 64bit DMA */ |
| 758 | static bool ahci_sb600_enable_64bit(struct pci_dev *pdev) |
Shane Huang | 58a09b3 | 2009-05-27 15:04:43 +0800 | [diff] [blame] | 759 | { |
| 760 | static const struct dmi_system_id sysids[] = { |
Tejun Heo | 03d783b | 2009-08-16 21:04:02 +0900 | [diff] [blame] | 761 | /* |
| 762 | * The oldest version known to be broken is 0901 and |
| 763 | * working is 1501 which was released on 2007-10-26. |
Tejun Heo | 2fcad9d | 2009-10-03 18:27:29 +0900 | [diff] [blame] | 764 | * Enable 64bit DMA on 1501 and anything newer. |
| 765 | * |
Tejun Heo | 03d783b | 2009-08-16 21:04:02 +0900 | [diff] [blame] | 766 | * Please read bko#9412 for more info. |
| 767 | */ |
Shane Huang | 58a09b3 | 2009-05-27 15:04:43 +0800 | [diff] [blame] | 768 | { |
| 769 | .ident = "ASUS M2A-VM", |
| 770 | .matches = { |
| 771 | DMI_MATCH(DMI_BOARD_VENDOR, |
| 772 | "ASUSTeK Computer INC."), |
| 773 | DMI_MATCH(DMI_BOARD_NAME, "M2A-VM"), |
| 774 | }, |
Tejun Heo | 03d783b | 2009-08-16 21:04:02 +0900 | [diff] [blame] | 775 | .driver_data = "20071026", /* yyyymmdd */ |
Shane Huang | 58a09b3 | 2009-05-27 15:04:43 +0800 | [diff] [blame] | 776 | }, |
Mark Nelson | e65cc19 | 2009-11-03 20:06:48 +1100 | [diff] [blame] | 777 | /* |
| 778 | * All BIOS versions for the MSI K9A2 Platinum (MS-7376) |
| 779 | * support 64bit DMA. |
| 780 | * |
| 781 | * BIOS versions earlier than 1.5 had the Manufacturer DMI |
| 782 | * fields as "MICRO-STAR INTERANTIONAL CO.,LTD". |
| 783 | * This spelling mistake was fixed in BIOS version 1.5, so |
| 784 | * 1.5 and later have the Manufacturer as |
| 785 | * "MICRO-STAR INTERNATIONAL CO.,LTD". |
| 786 | * So try to match on DMI_BOARD_VENDOR of "MICRO-STAR INTER". |
| 787 | * |
| 788 | * BIOS versions earlier than 1.9 had a Board Product Name |
| 789 | * DMI field of "MS-7376". This was changed to be |
| 790 | * "K9A2 Platinum (MS-7376)" in version 1.9, but we can still |
| 791 | * match on DMI_BOARD_NAME of "MS-7376". |
| 792 | */ |
| 793 | { |
| 794 | .ident = "MSI K9A2 Platinum", |
| 795 | .matches = { |
| 796 | DMI_MATCH(DMI_BOARD_VENDOR, |
| 797 | "MICRO-STAR INTER"), |
| 798 | DMI_MATCH(DMI_BOARD_NAME, "MS-7376"), |
| 799 | }, |
| 800 | }, |
Shane Huang | 58a09b3 | 2009-05-27 15:04:43 +0800 | [diff] [blame] | 801 | { } |
| 802 | }; |
Tejun Heo | 03d783b | 2009-08-16 21:04:02 +0900 | [diff] [blame] | 803 | const struct dmi_system_id *match; |
Tejun Heo | 2fcad9d | 2009-10-03 18:27:29 +0900 | [diff] [blame] | 804 | int year, month, date; |
| 805 | char buf[9]; |
Shane Huang | 58a09b3 | 2009-05-27 15:04:43 +0800 | [diff] [blame] | 806 | |
Tejun Heo | 03d783b | 2009-08-16 21:04:02 +0900 | [diff] [blame] | 807 | match = dmi_first_match(sysids); |
Shane Huang | 58a09b3 | 2009-05-27 15:04:43 +0800 | [diff] [blame] | 808 | if (pdev->bus->number != 0 || pdev->devfn != PCI_DEVFN(0x12, 0) || |
Tejun Heo | 03d783b | 2009-08-16 21:04:02 +0900 | [diff] [blame] | 809 | !match) |
Shane Huang | 58a09b3 | 2009-05-27 15:04:43 +0800 | [diff] [blame] | 810 | return false; |
| 811 | |
Mark Nelson | e65cc19 | 2009-11-03 20:06:48 +1100 | [diff] [blame] | 812 | if (!match->driver_data) |
| 813 | goto enable_64bit; |
| 814 | |
Tejun Heo | 2fcad9d | 2009-10-03 18:27:29 +0900 | [diff] [blame] | 815 | dmi_get_date(DMI_BIOS_DATE, &year, &month, &date); |
| 816 | snprintf(buf, sizeof(buf), "%04d%02d%02d", year, month, date); |
Shane Huang | 58a09b3 | 2009-05-27 15:04:43 +0800 | [diff] [blame] | 817 | |
Mark Nelson | e65cc19 | 2009-11-03 20:06:48 +1100 | [diff] [blame] | 818 | if (strcmp(buf, match->driver_data) >= 0) |
| 819 | goto enable_64bit; |
| 820 | else { |
Tejun Heo | 03d783b | 2009-08-16 21:04:02 +0900 | [diff] [blame] | 821 | dev_printk(KERN_WARNING, &pdev->dev, "%s: BIOS too old, " |
| 822 | "forcing 32bit DMA, update BIOS\n", match->ident); |
Tejun Heo | 2fcad9d | 2009-10-03 18:27:29 +0900 | [diff] [blame] | 823 | return false; |
| 824 | } |
Mark Nelson | e65cc19 | 2009-11-03 20:06:48 +1100 | [diff] [blame] | 825 | |
| 826 | enable_64bit: |
| 827 | dev_printk(KERN_WARNING, &pdev->dev, "%s: enabling 64bit DMA\n", |
| 828 | match->ident); |
| 829 | return true; |
Shane Huang | 58a09b3 | 2009-05-27 15:04:43 +0800 | [diff] [blame] | 830 | } |
| 831 | |
Rafael J. Wysocki | 1fd6843 | 2009-01-19 20:57:36 +0100 | [diff] [blame] | 832 | static bool ahci_broken_system_poweroff(struct pci_dev *pdev) |
| 833 | { |
| 834 | static const struct dmi_system_id broken_systems[] = { |
| 835 | { |
| 836 | .ident = "HP Compaq nx6310", |
| 837 | .matches = { |
| 838 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), |
| 839 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6310"), |
| 840 | }, |
| 841 | /* PCI slot number of the controller */ |
| 842 | .driver_data = (void *)0x1FUL, |
| 843 | }, |
Maciej Rutecki | d2f9c06 | 2009-03-20 00:06:46 +0100 | [diff] [blame] | 844 | { |
| 845 | .ident = "HP Compaq 6720s", |
| 846 | .matches = { |
| 847 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), |
| 848 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq 6720s"), |
| 849 | }, |
| 850 | /* PCI slot number of the controller */ |
| 851 | .driver_data = (void *)0x1FUL, |
| 852 | }, |
Rafael J. Wysocki | 1fd6843 | 2009-01-19 20:57:36 +0100 | [diff] [blame] | 853 | |
| 854 | { } /* terminate list */ |
| 855 | }; |
| 856 | const struct dmi_system_id *dmi = dmi_first_match(broken_systems); |
| 857 | |
| 858 | if (dmi) { |
| 859 | unsigned long slot = (unsigned long)dmi->driver_data; |
| 860 | /* apply the quirk only to on-board controllers */ |
| 861 | return slot == PCI_SLOT(pdev->devfn); |
| 862 | } |
| 863 | |
| 864 | return false; |
| 865 | } |
| 866 | |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 867 | static bool ahci_broken_suspend(struct pci_dev *pdev) |
| 868 | { |
| 869 | static const struct dmi_system_id sysids[] = { |
| 870 | /* |
| 871 | * On HP dv[4-6] and HDX18 with earlier BIOSen, link |
| 872 | * to the harddisk doesn't become online after |
| 873 | * resuming from STR. Warn and fail suspend. |
Tejun Heo | 9deb343 | 2010-03-16 09:50:26 +0900 | [diff] [blame] | 874 | * |
| 875 | * http://bugzilla.kernel.org/show_bug.cgi?id=12276 |
| 876 | * |
| 877 | * Use dates instead of versions to match as HP is |
| 878 | * apparently recycling both product and version |
| 879 | * strings. |
| 880 | * |
| 881 | * http://bugzilla.kernel.org/show_bug.cgi?id=15462 |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 882 | */ |
| 883 | { |
| 884 | .ident = "dv4", |
| 885 | .matches = { |
| 886 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), |
| 887 | DMI_MATCH(DMI_PRODUCT_NAME, |
| 888 | "HP Pavilion dv4 Notebook PC"), |
| 889 | }, |
Tejun Heo | 9deb343 | 2010-03-16 09:50:26 +0900 | [diff] [blame] | 890 | .driver_data = "20090105", /* F.30 */ |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 891 | }, |
| 892 | { |
| 893 | .ident = "dv5", |
| 894 | .matches = { |
| 895 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), |
| 896 | DMI_MATCH(DMI_PRODUCT_NAME, |
| 897 | "HP Pavilion dv5 Notebook PC"), |
| 898 | }, |
Tejun Heo | 9deb343 | 2010-03-16 09:50:26 +0900 | [diff] [blame] | 899 | .driver_data = "20090506", /* F.16 */ |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 900 | }, |
| 901 | { |
| 902 | .ident = "dv6", |
| 903 | .matches = { |
| 904 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), |
| 905 | DMI_MATCH(DMI_PRODUCT_NAME, |
| 906 | "HP Pavilion dv6 Notebook PC"), |
| 907 | }, |
Tejun Heo | 9deb343 | 2010-03-16 09:50:26 +0900 | [diff] [blame] | 908 | .driver_data = "20090423", /* F.21 */ |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 909 | }, |
| 910 | { |
| 911 | .ident = "HDX18", |
| 912 | .matches = { |
| 913 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), |
| 914 | DMI_MATCH(DMI_PRODUCT_NAME, |
| 915 | "HP HDX18 Notebook PC"), |
| 916 | }, |
Tejun Heo | 9deb343 | 2010-03-16 09:50:26 +0900 | [diff] [blame] | 917 | .driver_data = "20090430", /* F.23 */ |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 918 | }, |
Tejun Heo | cedc9bf | 2010-01-28 16:04:15 +0900 | [diff] [blame] | 919 | /* |
| 920 | * Acer eMachines G725 has the same problem. BIOS |
| 921 | * V1.03 is known to be broken. V3.04 is known to |
| 922 | * work. Inbetween, there are V1.06, V2.06 and V3.03 |
| 923 | * that we don't have much idea about. For now, |
| 924 | * blacklist anything older than V3.04. |
Tejun Heo | 9deb343 | 2010-03-16 09:50:26 +0900 | [diff] [blame] | 925 | * |
| 926 | * http://bugzilla.kernel.org/show_bug.cgi?id=15104 |
Tejun Heo | cedc9bf | 2010-01-28 16:04:15 +0900 | [diff] [blame] | 927 | */ |
| 928 | { |
| 929 | .ident = "G725", |
| 930 | .matches = { |
| 931 | DMI_MATCH(DMI_SYS_VENDOR, "eMachines"), |
| 932 | DMI_MATCH(DMI_PRODUCT_NAME, "eMachines G725"), |
| 933 | }, |
Tejun Heo | 9deb343 | 2010-03-16 09:50:26 +0900 | [diff] [blame] | 934 | .driver_data = "20091216", /* V3.04 */ |
Tejun Heo | cedc9bf | 2010-01-28 16:04:15 +0900 | [diff] [blame] | 935 | }, |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 936 | { } /* terminate list */ |
| 937 | }; |
| 938 | const struct dmi_system_id *dmi = dmi_first_match(sysids); |
Tejun Heo | 9deb343 | 2010-03-16 09:50:26 +0900 | [diff] [blame] | 939 | int year, month, date; |
| 940 | char buf[9]; |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 941 | |
| 942 | if (!dmi || pdev->bus->number || pdev->devfn != PCI_DEVFN(0x1f, 2)) |
| 943 | return false; |
| 944 | |
Tejun Heo | 9deb343 | 2010-03-16 09:50:26 +0900 | [diff] [blame] | 945 | dmi_get_date(DMI_BIOS_DATE, &year, &month, &date); |
| 946 | snprintf(buf, sizeof(buf), "%04d%02d%02d", year, month, date); |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 947 | |
Tejun Heo | 9deb343 | 2010-03-16 09:50:26 +0900 | [diff] [blame] | 948 | return strcmp(buf, dmi->driver_data) < 0; |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 949 | } |
| 950 | |
Tejun Heo | 5594639 | 2009-08-04 14:30:08 +0900 | [diff] [blame] | 951 | static bool ahci_broken_online(struct pci_dev *pdev) |
| 952 | { |
| 953 | #define ENCODE_BUSDEVFN(bus, slot, func) \ |
| 954 | (void *)(unsigned long)(((bus) << 8) | PCI_DEVFN((slot), (func))) |
| 955 | static const struct dmi_system_id sysids[] = { |
| 956 | /* |
| 957 | * There are several gigabyte boards which use |
| 958 | * SIMG5723s configured as hardware RAID. Certain |
| 959 | * 5723 firmware revisions shipped there keep the link |
| 960 | * online but fail to answer properly to SRST or |
| 961 | * IDENTIFY when no device is attached downstream |
| 962 | * causing libata to retry quite a few times leading |
| 963 | * to excessive detection delay. |
| 964 | * |
| 965 | * As these firmwares respond to the second reset try |
| 966 | * with invalid device signature, considering unknown |
| 967 | * sig as offline works around the problem acceptably. |
| 968 | */ |
| 969 | { |
| 970 | .ident = "EP45-DQ6", |
| 971 | .matches = { |
| 972 | DMI_MATCH(DMI_BOARD_VENDOR, |
| 973 | "Gigabyte Technology Co., Ltd."), |
| 974 | DMI_MATCH(DMI_BOARD_NAME, "EP45-DQ6"), |
| 975 | }, |
| 976 | .driver_data = ENCODE_BUSDEVFN(0x0a, 0x00, 0), |
| 977 | }, |
| 978 | { |
| 979 | .ident = "EP45-DS5", |
| 980 | .matches = { |
| 981 | DMI_MATCH(DMI_BOARD_VENDOR, |
| 982 | "Gigabyte Technology Co., Ltd."), |
| 983 | DMI_MATCH(DMI_BOARD_NAME, "EP45-DS5"), |
| 984 | }, |
| 985 | .driver_data = ENCODE_BUSDEVFN(0x03, 0x00, 0), |
| 986 | }, |
| 987 | { } /* terminate list */ |
| 988 | }; |
| 989 | #undef ENCODE_BUSDEVFN |
| 990 | const struct dmi_system_id *dmi = dmi_first_match(sysids); |
| 991 | unsigned int val; |
| 992 | |
| 993 | if (!dmi) |
| 994 | return false; |
| 995 | |
| 996 | val = (unsigned long)dmi->driver_data; |
| 997 | |
| 998 | return pdev->bus->number == (val >> 8) && pdev->devfn == (val & 0xff); |
| 999 | } |
| 1000 | |
Markus Trippelsdorf | 8e51321 | 2009-10-09 05:41:47 +0200 | [diff] [blame] | 1001 | #ifdef CONFIG_ATA_ACPI |
Tejun Heo | f80ae7e | 2009-09-16 04:18:03 +0900 | [diff] [blame] | 1002 | static void ahci_gtf_filter_workaround(struct ata_host *host) |
| 1003 | { |
| 1004 | static const struct dmi_system_id sysids[] = { |
| 1005 | /* |
| 1006 | * Aspire 3810T issues a bunch of SATA enable commands |
| 1007 | * via _GTF including an invalid one and one which is |
| 1008 | * rejected by the device. Among the successful ones |
| 1009 | * is FPDMA non-zero offset enable which when enabled |
| 1010 | * only on the drive side leads to NCQ command |
| 1011 | * failures. Filter it out. |
| 1012 | */ |
| 1013 | { |
| 1014 | .ident = "Aspire 3810T", |
| 1015 | .matches = { |
| 1016 | DMI_MATCH(DMI_SYS_VENDOR, "Acer"), |
| 1017 | DMI_MATCH(DMI_PRODUCT_NAME, "Aspire 3810T"), |
| 1018 | }, |
| 1019 | .driver_data = (void *)ATA_ACPI_FILTER_FPDMA_OFFSET, |
| 1020 | }, |
| 1021 | { } |
| 1022 | }; |
| 1023 | const struct dmi_system_id *dmi = dmi_first_match(sysids); |
| 1024 | unsigned int filter; |
| 1025 | int i; |
| 1026 | |
| 1027 | if (!dmi) |
| 1028 | return; |
| 1029 | |
| 1030 | filter = (unsigned long)dmi->driver_data; |
| 1031 | dev_printk(KERN_INFO, host->dev, |
| 1032 | "applying extra ACPI _GTF filter 0x%x for %s\n", |
| 1033 | filter, dmi->ident); |
| 1034 | |
| 1035 | for (i = 0; i < host->n_ports; i++) { |
| 1036 | struct ata_port *ap = host->ports[i]; |
| 1037 | struct ata_link *link; |
| 1038 | struct ata_device *dev; |
| 1039 | |
| 1040 | ata_for_each_link(link, ap, EDGE) |
| 1041 | ata_for_each_dev(dev, link, ALL) |
| 1042 | dev->gtf_filter |= filter; |
| 1043 | } |
| 1044 | } |
Markus Trippelsdorf | 8e51321 | 2009-10-09 05:41:47 +0200 | [diff] [blame] | 1045 | #else |
| 1046 | static inline void ahci_gtf_filter_workaround(struct ata_host *host) |
| 1047 | {} |
| 1048 | #endif |
Tejun Heo | f80ae7e | 2009-09-16 04:18:03 +0900 | [diff] [blame] | 1049 | |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 1050 | static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1051 | { |
| 1052 | static int printed_version; |
Tejun Heo | e297d99 | 2008-06-10 00:13:04 +0900 | [diff] [blame] | 1053 | unsigned int board_id = ent->driver_data; |
| 1054 | struct ata_port_info pi = ahci_port_info[board_id]; |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1055 | const struct ata_port_info *ppi[] = { &pi, NULL }; |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 1056 | struct device *dev = &pdev->dev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1057 | struct ahci_host_priv *hpriv; |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1058 | struct ata_host *host; |
Tejun Heo | 837f5f8 | 2008-02-06 15:13:51 +0900 | [diff] [blame] | 1059 | int n_ports, i, rc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1060 | |
| 1061 | VPRINTK("ENTER\n"); |
| 1062 | |
Justin P. Mattock | b429dd5 | 2010-07-03 07:29:25 -0700 | [diff] [blame] | 1063 | WARN_ON((int)ATA_MAX_QUEUE > AHCI_MAX_CMDS); |
Tejun Heo | 12fad3f | 2006-05-15 21:03:55 +0900 | [diff] [blame] | 1064 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1065 | if (!printed_version++) |
Jeff Garzik | a9524a7 | 2005-10-30 14:39:11 -0500 | [diff] [blame] | 1066 | dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1067 | |
Alan Cox | 5b66c82 | 2008-09-03 14:48:34 +0100 | [diff] [blame] | 1068 | /* The AHCI driver can only drive the SATA ports, the PATA driver |
| 1069 | can drive them all so if both drivers are selected make sure |
| 1070 | AHCI stays out of the way */ |
| 1071 | if (pdev->vendor == PCI_VENDOR_ID_MARVELL && !marvell_enable) |
| 1072 | return -ENODEV; |
| 1073 | |
Tejun Heo | c6353b4 | 2010-06-17 11:42:22 +0200 | [diff] [blame] | 1074 | /* |
| 1075 | * For some reason, MCP89 on MacBook 7,1 doesn't work with |
| 1076 | * ahci, use ata_generic instead. |
| 1077 | */ |
| 1078 | if (pdev->vendor == PCI_VENDOR_ID_NVIDIA && |
| 1079 | pdev->device == PCI_DEVICE_ID_NVIDIA_NFORCE_MCP89_SATA && |
| 1080 | pdev->subsystem_vendor == PCI_VENDOR_ID_APPLE && |
| 1081 | pdev->subsystem_device == 0xcb89) |
| 1082 | return -ENODEV; |
| 1083 | |
Mark Nelson | 7a02267 | 2009-11-22 12:07:41 +1100 | [diff] [blame] | 1084 | /* Promise's PDC42819 is a SAS/SATA controller that has an AHCI mode. |
| 1085 | * At the moment, we can only use the AHCI mode. Let the users know |
| 1086 | * that for SAS drives they're out of luck. |
| 1087 | */ |
| 1088 | if (pdev->vendor == PCI_VENDOR_ID_PROMISE) |
| 1089 | dev_printk(KERN_INFO, &pdev->dev, "PDC42819 " |
| 1090 | "can only drive SATA devices with this driver\n"); |
| 1091 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1092 | /* acquire resources */ |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 1093 | rc = pcim_enable_device(pdev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1094 | if (rc) |
| 1095 | return rc; |
| 1096 | |
Tejun Heo | dea5513 | 2008-03-11 19:52:31 +0900 | [diff] [blame] | 1097 | /* AHCI controllers often implement SFF compatible interface. |
| 1098 | * Grab all PCI BARs just in case. |
| 1099 | */ |
| 1100 | rc = pcim_iomap_regions_request_all(pdev, 1 << AHCI_PCI_BAR, DRV_NAME); |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 1101 | if (rc == -EBUSY) |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 1102 | pcim_pin_device(pdev); |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 1103 | if (rc) |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 1104 | return rc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1105 | |
Tejun Heo | c4f7792 | 2007-12-06 15:09:43 +0900 | [diff] [blame] | 1106 | if (pdev->vendor == PCI_VENDOR_ID_INTEL && |
| 1107 | (pdev->device == 0x2652 || pdev->device == 0x2653)) { |
| 1108 | u8 map; |
| 1109 | |
| 1110 | /* ICH6s share the same PCI ID for both piix and ahci |
| 1111 | * modes. Enabling ahci mode while MAP indicates |
| 1112 | * combined mode is a bad idea. Yield to ata_piix. |
| 1113 | */ |
| 1114 | pci_read_config_byte(pdev, ICH_MAP, &map); |
| 1115 | if (map & 0x3) { |
| 1116 | dev_printk(KERN_INFO, &pdev->dev, "controller is in " |
| 1117 | "combined mode, can't enable AHCI mode\n"); |
| 1118 | return -ENODEV; |
| 1119 | } |
| 1120 | } |
| 1121 | |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 1122 | hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL); |
| 1123 | if (!hpriv) |
| 1124 | return -ENOMEM; |
Tejun Heo | 417a1a6 | 2007-09-23 13:19:55 +0900 | [diff] [blame] | 1125 | hpriv->flags |= (unsigned long)pi.private_data; |
| 1126 | |
Tejun Heo | e297d99 | 2008-06-10 00:13:04 +0900 | [diff] [blame] | 1127 | /* MCP65 revision A1 and A2 can't do MSI */ |
| 1128 | if (board_id == board_ahci_mcp65 && |
| 1129 | (pdev->revision == 0xa1 || pdev->revision == 0xa2)) |
| 1130 | hpriv->flags |= AHCI_HFLAG_NO_MSI; |
| 1131 | |
Shane Huang | e427fe0 | 2008-12-30 10:53:41 +0800 | [diff] [blame] | 1132 | /* SB800 does NOT need the workaround to ignore SERR_INTERNAL */ |
| 1133 | if (board_id == board_ahci_sb700 && pdev->revision >= 0x40) |
| 1134 | hpriv->flags &= ~AHCI_HFLAG_IGN_SERR_INTERNAL; |
| 1135 | |
Tejun Heo | 2fcad9d | 2009-10-03 18:27:29 +0900 | [diff] [blame] | 1136 | /* only some SB600s can do 64bit DMA */ |
| 1137 | if (ahci_sb600_enable_64bit(pdev)) |
| 1138 | hpriv->flags &= ~AHCI_HFLAG_32BIT_ONLY; |
Shane Huang | 58a09b3 | 2009-05-27 15:04:43 +0800 | [diff] [blame] | 1139 | |
Tejun Heo | 31b239a | 2009-09-17 00:34:39 +0900 | [diff] [blame] | 1140 | if ((hpriv->flags & AHCI_HFLAG_NO_MSI) || pci_enable_msi(pdev)) |
| 1141 | pci_intx(pdev, 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1142 | |
Anton Vorontsov | d899334 | 2010-03-03 20:17:34 +0300 | [diff] [blame] | 1143 | hpriv->mmio = pcim_iomap_table(pdev)[AHCI_PCI_BAR]; |
| 1144 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1145 | /* save initial config */ |
Anton Vorontsov | 394d6e5 | 2010-03-03 20:17:36 +0300 | [diff] [blame] | 1146 | ahci_pci_save_initial_config(pdev, hpriv); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1147 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1148 | /* prepare host */ |
Robert Hancock | 453d313 | 2010-01-26 22:33:23 -0600 | [diff] [blame] | 1149 | if (hpriv->cap & HOST_CAP_NCQ) { |
| 1150 | pi.flags |= ATA_FLAG_NCQ; |
Tejun Heo | 83f2b96 | 2010-03-30 10:28:32 +0900 | [diff] [blame] | 1151 | /* |
| 1152 | * Auto-activate optimization is supposed to be |
| 1153 | * supported on all AHCI controllers indicating NCQ |
| 1154 | * capability, but it seems to be broken on some |
| 1155 | * chipsets including NVIDIAs. |
| 1156 | */ |
| 1157 | if (!(hpriv->flags & AHCI_HFLAG_NO_FPDMA_AA)) |
Robert Hancock | 453d313 | 2010-01-26 22:33:23 -0600 | [diff] [blame] | 1158 | pi.flags |= ATA_FLAG_FPDMA_AA; |
| 1159 | } |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1160 | |
Tejun Heo | 7d50b60 | 2007-09-23 13:19:54 +0900 | [diff] [blame] | 1161 | if (hpriv->cap & HOST_CAP_PMP) |
| 1162 | pi.flags |= ATA_FLAG_PMP; |
| 1163 | |
Anton Vorontsov | 0cbb0e7 | 2010-03-03 20:17:45 +0300 | [diff] [blame] | 1164 | ahci_set_em_messages(hpriv, &pi); |
Kristen Carlson Accardi | 18f7ba4 | 2008-06-03 10:33:55 -0700 | [diff] [blame] | 1165 | |
Rafael J. Wysocki | 1fd6843 | 2009-01-19 20:57:36 +0100 | [diff] [blame] | 1166 | if (ahci_broken_system_poweroff(pdev)) { |
| 1167 | pi.flags |= ATA_FLAG_NO_POWEROFF_SPINDOWN; |
| 1168 | dev_info(&pdev->dev, |
| 1169 | "quirky BIOS, skipping spindown on poweroff\n"); |
| 1170 | } |
| 1171 | |
Tejun Heo | 9b10ae8 | 2009-05-30 20:50:12 +0900 | [diff] [blame] | 1172 | if (ahci_broken_suspend(pdev)) { |
| 1173 | hpriv->flags |= AHCI_HFLAG_NO_SUSPEND; |
| 1174 | dev_printk(KERN_WARNING, &pdev->dev, |
| 1175 | "BIOS update required for suspend/resume\n"); |
| 1176 | } |
| 1177 | |
Tejun Heo | 5594639 | 2009-08-04 14:30:08 +0900 | [diff] [blame] | 1178 | if (ahci_broken_online(pdev)) { |
| 1179 | hpriv->flags |= AHCI_HFLAG_SRST_TOUT_IS_OFFLINE; |
| 1180 | dev_info(&pdev->dev, |
| 1181 | "online status unreliable, applying workaround\n"); |
| 1182 | } |
| 1183 | |
Tejun Heo | 837f5f8 | 2008-02-06 15:13:51 +0900 | [diff] [blame] | 1184 | /* CAP.NP sometimes indicate the index of the last enabled |
| 1185 | * port, at other times, that of the last possible port, so |
| 1186 | * determining the maximum port number requires looking at |
| 1187 | * both CAP.NP and port_map. |
| 1188 | */ |
| 1189 | n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map)); |
| 1190 | |
| 1191 | host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports); |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1192 | if (!host) |
| 1193 | return -ENOMEM; |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1194 | host->private_data = hpriv; |
| 1195 | |
Arjan van de Ven | f3d7f23 | 2009-01-26 02:05:44 -0800 | [diff] [blame] | 1196 | if (!(hpriv->cap & HOST_CAP_SSS) || ahci_ignore_sss) |
Arjan van de Ven | 886ad09 | 2009-01-09 15:54:07 -0800 | [diff] [blame] | 1197 | host->flags |= ATA_HOST_PARALLEL_SCAN; |
Arjan van de Ven | f3d7f23 | 2009-01-26 02:05:44 -0800 | [diff] [blame] | 1198 | else |
| 1199 | printk(KERN_INFO "ahci: SSS flag set, parallel bus scan disabled\n"); |
Arjan van de Ven | 886ad09 | 2009-01-09 15:54:07 -0800 | [diff] [blame] | 1200 | |
Kristen Carlson Accardi | 18f7ba4 | 2008-06-03 10:33:55 -0700 | [diff] [blame] | 1201 | if (pi.flags & ATA_FLAG_EM) |
| 1202 | ahci_reset_em(host); |
| 1203 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1204 | for (i = 0; i < host->n_ports; i++) { |
Jeff Garzik | dab632e | 2007-05-28 08:33:01 -0400 | [diff] [blame] | 1205 | struct ata_port *ap = host->ports[i]; |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1206 | |
Tejun Heo | cbcdd87 | 2007-08-18 13:14:55 +0900 | [diff] [blame] | 1207 | ata_port_pbar_desc(ap, AHCI_PCI_BAR, -1, "abar"); |
| 1208 | ata_port_pbar_desc(ap, AHCI_PCI_BAR, |
| 1209 | 0x100 + ap->port_no * 0x80, "port"); |
| 1210 | |
Kristen Carlson Accardi | 18f7ba4 | 2008-06-03 10:33:55 -0700 | [diff] [blame] | 1211 | /* set enclosure management message type */ |
| 1212 | if (ap->flags & ATA_FLAG_EM) |
Harry Zhang | 008dbd6 | 2010-04-23 17:27:19 +0800 | [diff] [blame] | 1213 | ap->em_message_type = hpriv->em_msg_type; |
Kristen Carlson Accardi | 18f7ba4 | 2008-06-03 10:33:55 -0700 | [diff] [blame] | 1214 | |
| 1215 | |
Jeff Garzik | dab632e | 2007-05-28 08:33:01 -0400 | [diff] [blame] | 1216 | /* disabled/not-implemented port */ |
Tejun Heo | 350756f | 2008-04-07 22:47:21 +0900 | [diff] [blame] | 1217 | if (!(hpriv->port_map & (1 << i))) |
Jeff Garzik | dab632e | 2007-05-28 08:33:01 -0400 | [diff] [blame] | 1218 | ap->ops = &ata_dummy_port_ops; |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1219 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1220 | |
Tejun Heo | edc9305 | 2007-10-25 14:59:16 +0900 | [diff] [blame] | 1221 | /* apply workaround for ASUS P5W DH Deluxe mainboard */ |
| 1222 | ahci_p5wdh_workaround(host); |
| 1223 | |
Tejun Heo | f80ae7e | 2009-09-16 04:18:03 +0900 | [diff] [blame] | 1224 | /* apply gtf filter quirk */ |
| 1225 | ahci_gtf_filter_workaround(host); |
| 1226 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1227 | /* initialize adapter */ |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1228 | rc = ahci_configure_dma_masks(pdev, hpriv->cap & HOST_CAP_64); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1229 | if (rc) |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 1230 | return rc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1231 | |
Anton Vorontsov | 3303040 | 2010-03-03 20:17:39 +0300 | [diff] [blame] | 1232 | rc = ahci_pci_reset_controller(host); |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1233 | if (rc) |
| 1234 | return rc; |
Tejun Heo | 12fad3f | 2006-05-15 21:03:55 +0900 | [diff] [blame] | 1235 | |
Anton Vorontsov | 781d655 | 2010-03-03 20:17:42 +0300 | [diff] [blame] | 1236 | ahci_pci_init_controller(host); |
Anton Vorontsov | 439fcae | 2010-03-03 20:17:43 +0300 | [diff] [blame] | 1237 | ahci_pci_print_info(host); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1238 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1239 | pci_set_master(pdev); |
| 1240 | return ata_host_activate(host, pdev->irq, ahci_interrupt, IRQF_SHARED, |
| 1241 | &ahci_sht); |
Jeff Garzik | 907f467 | 2005-05-12 15:03:42 -0400 | [diff] [blame] | 1242 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1243 | |
| 1244 | static int __init ahci_init(void) |
| 1245 | { |
Pavel Roskin | b788719 | 2006-08-10 18:13:18 +0900 | [diff] [blame] | 1246 | return pci_register_driver(&ahci_pci_driver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1247 | } |
| 1248 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1249 | static void __exit ahci_exit(void) |
| 1250 | { |
| 1251 | pci_unregister_driver(&ahci_pci_driver); |
| 1252 | } |
| 1253 | |
| 1254 | |
| 1255 | MODULE_AUTHOR("Jeff Garzik"); |
| 1256 | MODULE_DESCRIPTION("AHCI SATA low-level driver"); |
| 1257 | MODULE_LICENSE("GPL"); |
| 1258 | MODULE_DEVICE_TABLE(pci, ahci_pci_tbl); |
Jeff Garzik | 6885433 | 2005-08-23 02:53:51 -0400 | [diff] [blame] | 1259 | MODULE_VERSION(DRV_VERSION); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1260 | |
| 1261 | module_init(ahci_init); |
| 1262 | module_exit(ahci_exit); |