Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2005-2011 Atheros Communications Inc. |
| 3 | * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. |
| 4 | * |
| 5 | * Permission to use, copy, modify, and/or distribute this software for any |
| 6 | * purpose with or without fee is hereby granted, provided that the above |
| 7 | * copyright notice and this permission notice appear in all copies. |
| 8 | * |
| 9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| 10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| 11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
| 12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| 13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
| 14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
| 15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| 16 | */ |
| 17 | |
Michal Kazior | edb8236 | 2013-07-05 16:15:14 +0300 | [diff] [blame] | 18 | #include "core.h" |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 19 | #include "htc.h" |
| 20 | #include "htt.h" |
| 21 | #include "txrx.h" |
| 22 | #include "debug.h" |
Kalle Valo | a9bf050 | 2013-09-03 11:43:55 +0300 | [diff] [blame] | 23 | #include "trace.h" |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 24 | |
| 25 | #include <linux/log2.h> |
| 26 | |
| 27 | /* slightly larger than one large A-MPDU */ |
| 28 | #define HTT_RX_RING_SIZE_MIN 128 |
| 29 | |
| 30 | /* roughly 20 ms @ 1 Gbps of 1500B MSDUs */ |
| 31 | #define HTT_RX_RING_SIZE_MAX 2048 |
| 32 | |
| 33 | #define HTT_RX_AVG_FRM_BYTES 1000 |
| 34 | |
| 35 | /* ms, very conservative */ |
| 36 | #define HTT_RX_HOST_LATENCY_MAX_MS 20 |
| 37 | |
| 38 | /* ms, conservative */ |
| 39 | #define HTT_RX_HOST_LATENCY_WORST_LIKELY_MS 10 |
| 40 | |
| 41 | /* when under memory pressure rx ring refill may fail and needs a retry */ |
| 42 | #define HTT_RX_RING_REFILL_RETRY_MS 50 |
| 43 | |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 44 | |
| 45 | static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb); |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 46 | static void ath10k_htt_txrx_compl_task(unsigned long ptr); |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 47 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 48 | static int ath10k_htt_rx_ring_size(struct ath10k_htt *htt) |
| 49 | { |
| 50 | int size; |
| 51 | |
| 52 | /* |
| 53 | * It is expected that the host CPU will typically be able to |
| 54 | * service the rx indication from one A-MPDU before the rx |
| 55 | * indication from the subsequent A-MPDU happens, roughly 1-2 ms |
| 56 | * later. However, the rx ring should be sized very conservatively, |
| 57 | * to accomodate the worst reasonable delay before the host CPU |
| 58 | * services a rx indication interrupt. |
| 59 | * |
| 60 | * The rx ring need not be kept full of empty buffers. In theory, |
| 61 | * the htt host SW can dynamically track the low-water mark in the |
| 62 | * rx ring, and dynamically adjust the level to which the rx ring |
| 63 | * is filled with empty buffers, to dynamically meet the desired |
| 64 | * low-water mark. |
| 65 | * |
| 66 | * In contrast, it's difficult to resize the rx ring itself, once |
| 67 | * it's in use. Thus, the ring itself should be sized very |
| 68 | * conservatively, while the degree to which the ring is filled |
| 69 | * with empty buffers should be sized moderately conservatively. |
| 70 | */ |
| 71 | |
| 72 | /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */ |
| 73 | size = |
| 74 | htt->max_throughput_mbps + |
| 75 | 1000 / |
| 76 | (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_MAX_MS; |
| 77 | |
| 78 | if (size < HTT_RX_RING_SIZE_MIN) |
| 79 | size = HTT_RX_RING_SIZE_MIN; |
| 80 | |
| 81 | if (size > HTT_RX_RING_SIZE_MAX) |
| 82 | size = HTT_RX_RING_SIZE_MAX; |
| 83 | |
| 84 | size = roundup_pow_of_two(size); |
| 85 | |
| 86 | return size; |
| 87 | } |
| 88 | |
| 89 | static int ath10k_htt_rx_ring_fill_level(struct ath10k_htt *htt) |
| 90 | { |
| 91 | int size; |
| 92 | |
| 93 | /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */ |
| 94 | size = |
| 95 | htt->max_throughput_mbps * |
| 96 | 1000 / |
| 97 | (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_WORST_LIKELY_MS; |
| 98 | |
| 99 | /* |
| 100 | * Make sure the fill level is at least 1 less than the ring size. |
| 101 | * Leaving 1 element empty allows the SW to easily distinguish |
| 102 | * between a full ring vs. an empty ring. |
| 103 | */ |
| 104 | if (size >= htt->rx_ring.size) |
| 105 | size = htt->rx_ring.size - 1; |
| 106 | |
| 107 | return size; |
| 108 | } |
| 109 | |
| 110 | static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt) |
| 111 | { |
| 112 | struct sk_buff *skb; |
| 113 | struct ath10k_skb_cb *cb; |
| 114 | int i; |
| 115 | |
| 116 | for (i = 0; i < htt->rx_ring.fill_cnt; i++) { |
| 117 | skb = htt->rx_ring.netbufs_ring[i]; |
| 118 | cb = ATH10K_SKB_CB(skb); |
| 119 | dma_unmap_single(htt->ar->dev, cb->paddr, |
| 120 | skb->len + skb_tailroom(skb), |
| 121 | DMA_FROM_DEVICE); |
| 122 | dev_kfree_skb_any(skb); |
| 123 | } |
| 124 | |
| 125 | htt->rx_ring.fill_cnt = 0; |
| 126 | } |
| 127 | |
| 128 | static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num) |
| 129 | { |
| 130 | struct htt_rx_desc *rx_desc; |
| 131 | struct sk_buff *skb; |
| 132 | dma_addr_t paddr; |
| 133 | int ret = 0, idx; |
| 134 | |
| 135 | idx = __le32_to_cpu(*(htt->rx_ring.alloc_idx.vaddr)); |
| 136 | while (num > 0) { |
| 137 | skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN); |
| 138 | if (!skb) { |
| 139 | ret = -ENOMEM; |
| 140 | goto fail; |
| 141 | } |
| 142 | |
| 143 | if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN)) |
| 144 | skb_pull(skb, |
| 145 | PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) - |
| 146 | skb->data); |
| 147 | |
| 148 | /* Clear rx_desc attention word before posting to Rx ring */ |
| 149 | rx_desc = (struct htt_rx_desc *)skb->data; |
| 150 | rx_desc->attention.flags = __cpu_to_le32(0); |
| 151 | |
| 152 | paddr = dma_map_single(htt->ar->dev, skb->data, |
| 153 | skb->len + skb_tailroom(skb), |
| 154 | DMA_FROM_DEVICE); |
| 155 | |
| 156 | if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) { |
| 157 | dev_kfree_skb_any(skb); |
| 158 | ret = -ENOMEM; |
| 159 | goto fail; |
| 160 | } |
| 161 | |
| 162 | ATH10K_SKB_CB(skb)->paddr = paddr; |
| 163 | htt->rx_ring.netbufs_ring[idx] = skb; |
| 164 | htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr); |
| 165 | htt->rx_ring.fill_cnt++; |
| 166 | |
| 167 | num--; |
| 168 | idx++; |
| 169 | idx &= htt->rx_ring.size_mask; |
| 170 | } |
| 171 | |
| 172 | fail: |
| 173 | *(htt->rx_ring.alloc_idx.vaddr) = __cpu_to_le32(idx); |
| 174 | return ret; |
| 175 | } |
| 176 | |
| 177 | static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num) |
| 178 | { |
| 179 | lockdep_assert_held(&htt->rx_ring.lock); |
| 180 | return __ath10k_htt_rx_ring_fill_n(htt, num); |
| 181 | } |
| 182 | |
| 183 | static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt) |
| 184 | { |
Michal Kazior | 6e712d4 | 2013-09-24 10:18:36 +0200 | [diff] [blame] | 185 | int ret, num_deficit, num_to_fill; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 186 | |
Michal Kazior | 6e712d4 | 2013-09-24 10:18:36 +0200 | [diff] [blame] | 187 | /* Refilling the whole RX ring buffer proves to be a bad idea. The |
| 188 | * reason is RX may take up significant amount of CPU cycles and starve |
| 189 | * other tasks, e.g. TX on an ethernet device while acting as a bridge |
| 190 | * with ath10k wlan interface. This ended up with very poor performance |
| 191 | * once CPU the host system was overwhelmed with RX on ath10k. |
| 192 | * |
| 193 | * By limiting the number of refills the replenishing occurs |
| 194 | * progressively. This in turns makes use of the fact tasklets are |
| 195 | * processed in FIFO order. This means actual RX processing can starve |
| 196 | * out refilling. If there's not enough buffers on RX ring FW will not |
| 197 | * report RX until it is refilled with enough buffers. This |
| 198 | * automatically balances load wrt to CPU power. |
| 199 | * |
| 200 | * This probably comes at a cost of lower maximum throughput but |
| 201 | * improves the avarage and stability. */ |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 202 | spin_lock_bh(&htt->rx_ring.lock); |
Michal Kazior | 6e712d4 | 2013-09-24 10:18:36 +0200 | [diff] [blame] | 203 | num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt; |
| 204 | num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit); |
| 205 | num_deficit -= num_to_fill; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 206 | ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill); |
| 207 | if (ret == -ENOMEM) { |
| 208 | /* |
| 209 | * Failed to fill it to the desired level - |
| 210 | * we'll start a timer and try again next time. |
| 211 | * As long as enough buffers are left in the ring for |
| 212 | * another A-MPDU rx, no special recovery is needed. |
| 213 | */ |
| 214 | mod_timer(&htt->rx_ring.refill_retry_timer, jiffies + |
| 215 | msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS)); |
Michal Kazior | 6e712d4 | 2013-09-24 10:18:36 +0200 | [diff] [blame] | 216 | } else if (num_deficit > 0) { |
| 217 | tasklet_schedule(&htt->rx_replenish_task); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 218 | } |
| 219 | spin_unlock_bh(&htt->rx_ring.lock); |
| 220 | } |
| 221 | |
| 222 | static void ath10k_htt_rx_ring_refill_retry(unsigned long arg) |
| 223 | { |
| 224 | struct ath10k_htt *htt = (struct ath10k_htt *)arg; |
| 225 | ath10k_htt_rx_msdu_buff_replenish(htt); |
| 226 | } |
| 227 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 228 | void ath10k_htt_rx_detach(struct ath10k_htt *htt) |
| 229 | { |
| 230 | int sw_rd_idx = htt->rx_ring.sw_rd_idx.msdu_payld; |
| 231 | |
| 232 | del_timer_sync(&htt->rx_ring.refill_retry_timer); |
Michal Kazior | 6e712d4 | 2013-09-24 10:18:36 +0200 | [diff] [blame] | 233 | tasklet_kill(&htt->rx_replenish_task); |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 234 | tasklet_kill(&htt->txrx_compl_task); |
| 235 | |
| 236 | skb_queue_purge(&htt->tx_compl_q); |
| 237 | skb_queue_purge(&htt->rx_compl_q); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 238 | |
| 239 | while (sw_rd_idx != __le32_to_cpu(*(htt->rx_ring.alloc_idx.vaddr))) { |
| 240 | struct sk_buff *skb = |
| 241 | htt->rx_ring.netbufs_ring[sw_rd_idx]; |
| 242 | struct ath10k_skb_cb *cb = ATH10K_SKB_CB(skb); |
| 243 | |
| 244 | dma_unmap_single(htt->ar->dev, cb->paddr, |
| 245 | skb->len + skb_tailroom(skb), |
| 246 | DMA_FROM_DEVICE); |
| 247 | dev_kfree_skb_any(htt->rx_ring.netbufs_ring[sw_rd_idx]); |
| 248 | sw_rd_idx++; |
| 249 | sw_rd_idx &= htt->rx_ring.size_mask; |
| 250 | } |
| 251 | |
| 252 | dma_free_coherent(htt->ar->dev, |
| 253 | (htt->rx_ring.size * |
| 254 | sizeof(htt->rx_ring.paddrs_ring)), |
| 255 | htt->rx_ring.paddrs_ring, |
| 256 | htt->rx_ring.base_paddr); |
| 257 | |
| 258 | dma_free_coherent(htt->ar->dev, |
| 259 | sizeof(*htt->rx_ring.alloc_idx.vaddr), |
| 260 | htt->rx_ring.alloc_idx.vaddr, |
| 261 | htt->rx_ring.alloc_idx.paddr); |
| 262 | |
| 263 | kfree(htt->rx_ring.netbufs_ring); |
| 264 | } |
| 265 | |
| 266 | static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt) |
| 267 | { |
| 268 | int idx; |
| 269 | struct sk_buff *msdu; |
| 270 | |
Michal Kazior | 4596708 | 2014-02-27 18:50:05 +0200 | [diff] [blame] | 271 | lockdep_assert_held(&htt->rx_ring.lock); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 272 | |
Michal Kazior | 8d60ee8 | 2014-02-27 18:50:05 +0200 | [diff] [blame] | 273 | if (htt->rx_ring.fill_cnt == 0) { |
| 274 | ath10k_warn("tried to pop sk_buff from an empty rx ring\n"); |
| 275 | return NULL; |
| 276 | } |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 277 | |
| 278 | idx = htt->rx_ring.sw_rd_idx.msdu_payld; |
| 279 | msdu = htt->rx_ring.netbufs_ring[idx]; |
| 280 | |
| 281 | idx++; |
| 282 | idx &= htt->rx_ring.size_mask; |
| 283 | htt->rx_ring.sw_rd_idx.msdu_payld = idx; |
| 284 | htt->rx_ring.fill_cnt--; |
| 285 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 286 | return msdu; |
| 287 | } |
| 288 | |
| 289 | static void ath10k_htt_rx_free_msdu_chain(struct sk_buff *skb) |
| 290 | { |
| 291 | struct sk_buff *next; |
| 292 | |
| 293 | while (skb) { |
| 294 | next = skb->next; |
| 295 | dev_kfree_skb_any(skb); |
| 296 | skb = next; |
| 297 | } |
| 298 | } |
| 299 | |
Janusz Dziedzic | d84dd60 | 2014-03-24 21:23:20 +0100 | [diff] [blame] | 300 | /* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */ |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 301 | static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt, |
| 302 | u8 **fw_desc, int *fw_desc_len, |
| 303 | struct sk_buff **head_msdu, |
| 304 | struct sk_buff **tail_msdu) |
| 305 | { |
| 306 | int msdu_len, msdu_chaining = 0; |
| 307 | struct sk_buff *msdu; |
| 308 | struct htt_rx_desc *rx_desc; |
| 309 | |
Michal Kazior | 4596708 | 2014-02-27 18:50:05 +0200 | [diff] [blame] | 310 | lockdep_assert_held(&htt->rx_ring.lock); |
| 311 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 312 | if (htt->rx_confused) { |
| 313 | ath10k_warn("htt is confused. refusing rx\n"); |
Janusz Dziedzic | d84dd60 | 2014-03-24 21:23:20 +0100 | [diff] [blame] | 314 | return -1; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 315 | } |
| 316 | |
| 317 | msdu = *head_msdu = ath10k_htt_rx_netbuf_pop(htt); |
| 318 | while (msdu) { |
| 319 | int last_msdu, msdu_len_invalid, msdu_chained; |
| 320 | |
| 321 | dma_unmap_single(htt->ar->dev, |
| 322 | ATH10K_SKB_CB(msdu)->paddr, |
| 323 | msdu->len + skb_tailroom(msdu), |
| 324 | DMA_FROM_DEVICE); |
| 325 | |
Ben Greear | 75fb2f9 | 2014-02-05 13:58:34 -0800 | [diff] [blame] | 326 | ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx pop: ", |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 327 | msdu->data, msdu->len + skb_tailroom(msdu)); |
| 328 | |
| 329 | rx_desc = (struct htt_rx_desc *)msdu->data; |
| 330 | |
| 331 | /* FIXME: we must report msdu payload since this is what caller |
| 332 | * expects now */ |
| 333 | skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload)); |
| 334 | skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload)); |
| 335 | |
| 336 | /* |
| 337 | * Sanity check - confirm the HW is finished filling in the |
| 338 | * rx data. |
| 339 | * If the HW and SW are working correctly, then it's guaranteed |
| 340 | * that the HW's MAC DMA is done before this point in the SW. |
| 341 | * To prevent the case that we handle a stale Rx descriptor, |
| 342 | * just assert for now until we have a way to recover. |
| 343 | */ |
| 344 | if (!(__le32_to_cpu(rx_desc->attention.flags) |
| 345 | & RX_ATTENTION_FLAGS_MSDU_DONE)) { |
| 346 | ath10k_htt_rx_free_msdu_chain(*head_msdu); |
| 347 | *head_msdu = NULL; |
| 348 | msdu = NULL; |
| 349 | ath10k_err("htt rx stopped. cannot recover\n"); |
| 350 | htt->rx_confused = true; |
| 351 | break; |
| 352 | } |
| 353 | |
| 354 | /* |
| 355 | * Copy the FW rx descriptor for this MSDU from the rx |
| 356 | * indication message into the MSDU's netbuf. HL uses the |
| 357 | * same rx indication message definition as LL, and simply |
| 358 | * appends new info (fields from the HW rx desc, and the |
| 359 | * MSDU payload itself). So, the offset into the rx |
| 360 | * indication message only has to account for the standard |
| 361 | * offset of the per-MSDU FW rx desc info within the |
| 362 | * message, and how many bytes of the per-MSDU FW rx desc |
| 363 | * info have already been consumed. (And the endianness of |
| 364 | * the host, since for a big-endian host, the rx ind |
| 365 | * message contents, including the per-MSDU rx desc bytes, |
| 366 | * were byteswapped during upload.) |
| 367 | */ |
| 368 | if (*fw_desc_len > 0) { |
| 369 | rx_desc->fw_desc.info0 = **fw_desc; |
| 370 | /* |
| 371 | * The target is expected to only provide the basic |
| 372 | * per-MSDU rx descriptors. Just to be sure, verify |
| 373 | * that the target has not attached extension data |
| 374 | * (e.g. LRO flow ID). |
| 375 | */ |
| 376 | |
| 377 | /* or more, if there's extension data */ |
| 378 | (*fw_desc)++; |
| 379 | (*fw_desc_len)--; |
| 380 | } else { |
| 381 | /* |
| 382 | * When an oversized AMSDU happened, FW will lost |
| 383 | * some of MSDU status - in this case, the FW |
| 384 | * descriptors provided will be less than the |
| 385 | * actual MSDUs inside this MPDU. Mark the FW |
| 386 | * descriptors so that it will still deliver to |
| 387 | * upper stack, if no CRC error for this MPDU. |
| 388 | * |
| 389 | * FIX THIS - the FW descriptors are actually for |
| 390 | * MSDUs in the end of this A-MSDU instead of the |
| 391 | * beginning. |
| 392 | */ |
| 393 | rx_desc->fw_desc.info0 = 0; |
| 394 | } |
| 395 | |
| 396 | msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags) |
| 397 | & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR | |
| 398 | RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR)); |
| 399 | msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.info0), |
| 400 | RX_MSDU_START_INFO0_MSDU_LENGTH); |
| 401 | msdu_chained = rx_desc->frag_info.ring2_more_count; |
Ben Greear | bfa3536 | 2014-03-03 14:07:09 -0800 | [diff] [blame] | 402 | msdu_chaining = msdu_chained; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 403 | |
| 404 | if (msdu_len_invalid) |
| 405 | msdu_len = 0; |
| 406 | |
| 407 | skb_trim(msdu, 0); |
| 408 | skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE)); |
| 409 | msdu_len -= msdu->len; |
| 410 | |
| 411 | /* FIXME: Do chained buffers include htt_rx_desc or not? */ |
| 412 | while (msdu_chained--) { |
| 413 | struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt); |
| 414 | |
| 415 | dma_unmap_single(htt->ar->dev, |
| 416 | ATH10K_SKB_CB(next)->paddr, |
| 417 | next->len + skb_tailroom(next), |
| 418 | DMA_FROM_DEVICE); |
| 419 | |
Ben Greear | 75fb2f9 | 2014-02-05 13:58:34 -0800 | [diff] [blame] | 420 | ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, |
| 421 | "htt rx chained: ", next->data, |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 422 | next->len + skb_tailroom(next)); |
| 423 | |
| 424 | skb_trim(next, 0); |
| 425 | skb_put(next, min(msdu_len, HTT_RX_BUF_SIZE)); |
| 426 | msdu_len -= next->len; |
| 427 | |
| 428 | msdu->next = next; |
| 429 | msdu = next; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 430 | } |
| 431 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 432 | last_msdu = __le32_to_cpu(rx_desc->msdu_end.info0) & |
| 433 | RX_MSDU_END_INFO0_LAST_MSDU; |
| 434 | |
| 435 | if (last_msdu) { |
| 436 | msdu->next = NULL; |
| 437 | break; |
| 438 | } else { |
| 439 | struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt); |
| 440 | msdu->next = next; |
| 441 | msdu = next; |
| 442 | } |
| 443 | } |
| 444 | *tail_msdu = msdu; |
| 445 | |
Janusz Dziedzic | d84dd60 | 2014-03-24 21:23:20 +0100 | [diff] [blame] | 446 | if (*head_msdu == NULL) |
| 447 | msdu_chaining = -1; |
| 448 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 449 | /* |
| 450 | * Don't refill the ring yet. |
| 451 | * |
| 452 | * First, the elements popped here are still in use - it is not |
| 453 | * safe to overwrite them until the matching call to |
| 454 | * mpdu_desc_list_next. Second, for efficiency it is preferable to |
| 455 | * refill the rx ring with 1 PPDU's worth of rx buffers (something |
| 456 | * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers |
| 457 | * (something like 3 buffers). Consequently, we'll rely on the txrx |
| 458 | * SW to tell us when it is done pulling all the PPDU's rx buffers |
| 459 | * out of the rx ring, and then refill it just once. |
| 460 | */ |
| 461 | |
| 462 | return msdu_chaining; |
| 463 | } |
| 464 | |
Michal Kazior | 6e712d4 | 2013-09-24 10:18:36 +0200 | [diff] [blame] | 465 | static void ath10k_htt_rx_replenish_task(unsigned long ptr) |
| 466 | { |
| 467 | struct ath10k_htt *htt = (struct ath10k_htt *)ptr; |
| 468 | ath10k_htt_rx_msdu_buff_replenish(htt); |
| 469 | } |
| 470 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 471 | int ath10k_htt_rx_attach(struct ath10k_htt *htt) |
| 472 | { |
| 473 | dma_addr_t paddr; |
| 474 | void *vaddr; |
| 475 | struct timer_list *timer = &htt->rx_ring.refill_retry_timer; |
| 476 | |
| 477 | htt->rx_ring.size = ath10k_htt_rx_ring_size(htt); |
| 478 | if (!is_power_of_2(htt->rx_ring.size)) { |
| 479 | ath10k_warn("htt rx ring size is not power of 2\n"); |
| 480 | return -EINVAL; |
| 481 | } |
| 482 | |
| 483 | htt->rx_ring.size_mask = htt->rx_ring.size - 1; |
| 484 | |
| 485 | /* |
| 486 | * Set the initial value for the level to which the rx ring |
| 487 | * should be filled, based on the max throughput and the |
| 488 | * worst likely latency for the host to fill the rx ring |
| 489 | * with new buffers. In theory, this fill level can be |
| 490 | * dynamically adjusted from the initial value set here, to |
| 491 | * reflect the actual host latency rather than a |
| 492 | * conservative assumption about the host latency. |
| 493 | */ |
| 494 | htt->rx_ring.fill_level = ath10k_htt_rx_ring_fill_level(htt); |
| 495 | |
| 496 | htt->rx_ring.netbufs_ring = |
| 497 | kmalloc(htt->rx_ring.size * sizeof(struct sk_buff *), |
| 498 | GFP_KERNEL); |
| 499 | if (!htt->rx_ring.netbufs_ring) |
| 500 | goto err_netbuf; |
| 501 | |
| 502 | vaddr = dma_alloc_coherent(htt->ar->dev, |
| 503 | (htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring)), |
| 504 | &paddr, GFP_DMA); |
| 505 | if (!vaddr) |
| 506 | goto err_dma_ring; |
| 507 | |
| 508 | htt->rx_ring.paddrs_ring = vaddr; |
| 509 | htt->rx_ring.base_paddr = paddr; |
| 510 | |
| 511 | vaddr = dma_alloc_coherent(htt->ar->dev, |
| 512 | sizeof(*htt->rx_ring.alloc_idx.vaddr), |
| 513 | &paddr, GFP_DMA); |
| 514 | if (!vaddr) |
| 515 | goto err_dma_idx; |
| 516 | |
| 517 | htt->rx_ring.alloc_idx.vaddr = vaddr; |
| 518 | htt->rx_ring.alloc_idx.paddr = paddr; |
| 519 | htt->rx_ring.sw_rd_idx.msdu_payld = 0; |
| 520 | *htt->rx_ring.alloc_idx.vaddr = 0; |
| 521 | |
| 522 | /* Initialize the Rx refill retry timer */ |
| 523 | setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt); |
| 524 | |
| 525 | spin_lock_init(&htt->rx_ring.lock); |
| 526 | |
| 527 | htt->rx_ring.fill_cnt = 0; |
| 528 | if (__ath10k_htt_rx_ring_fill_n(htt, htt->rx_ring.fill_level)) |
| 529 | goto err_fill_ring; |
| 530 | |
Michal Kazior | 6e712d4 | 2013-09-24 10:18:36 +0200 | [diff] [blame] | 531 | tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task, |
| 532 | (unsigned long)htt); |
| 533 | |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 534 | skb_queue_head_init(&htt->tx_compl_q); |
| 535 | skb_queue_head_init(&htt->rx_compl_q); |
| 536 | |
| 537 | tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task, |
| 538 | (unsigned long)htt); |
| 539 | |
Kalle Valo | aad0b65 | 2013-09-08 17:56:02 +0300 | [diff] [blame] | 540 | ath10k_dbg(ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n", |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 541 | htt->rx_ring.size, htt->rx_ring.fill_level); |
| 542 | return 0; |
| 543 | |
| 544 | err_fill_ring: |
| 545 | ath10k_htt_rx_ring_free(htt); |
| 546 | dma_free_coherent(htt->ar->dev, |
| 547 | sizeof(*htt->rx_ring.alloc_idx.vaddr), |
| 548 | htt->rx_ring.alloc_idx.vaddr, |
| 549 | htt->rx_ring.alloc_idx.paddr); |
| 550 | err_dma_idx: |
| 551 | dma_free_coherent(htt->ar->dev, |
| 552 | (htt->rx_ring.size * |
| 553 | sizeof(htt->rx_ring.paddrs_ring)), |
| 554 | htt->rx_ring.paddrs_ring, |
| 555 | htt->rx_ring.base_paddr); |
| 556 | err_dma_ring: |
| 557 | kfree(htt->rx_ring.netbufs_ring); |
| 558 | err_netbuf: |
| 559 | return -ENOMEM; |
| 560 | } |
| 561 | |
| 562 | static int ath10k_htt_rx_crypto_param_len(enum htt_rx_mpdu_encrypt_type type) |
| 563 | { |
| 564 | switch (type) { |
| 565 | case HTT_RX_MPDU_ENCRYPT_WEP40: |
| 566 | case HTT_RX_MPDU_ENCRYPT_WEP104: |
| 567 | return 4; |
| 568 | case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC: |
| 569 | case HTT_RX_MPDU_ENCRYPT_WEP128: /* not tested */ |
| 570 | case HTT_RX_MPDU_ENCRYPT_TKIP_WPA: |
| 571 | case HTT_RX_MPDU_ENCRYPT_WAPI: /* not tested */ |
| 572 | case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2: |
| 573 | return 8; |
| 574 | case HTT_RX_MPDU_ENCRYPT_NONE: |
| 575 | return 0; |
| 576 | } |
| 577 | |
| 578 | ath10k_warn("unknown encryption type %d\n", type); |
| 579 | return 0; |
| 580 | } |
| 581 | |
| 582 | static int ath10k_htt_rx_crypto_tail_len(enum htt_rx_mpdu_encrypt_type type) |
| 583 | { |
| 584 | switch (type) { |
| 585 | case HTT_RX_MPDU_ENCRYPT_NONE: |
| 586 | case HTT_RX_MPDU_ENCRYPT_WEP40: |
| 587 | case HTT_RX_MPDU_ENCRYPT_WEP104: |
| 588 | case HTT_RX_MPDU_ENCRYPT_WEP128: |
| 589 | case HTT_RX_MPDU_ENCRYPT_WAPI: |
| 590 | return 0; |
| 591 | case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC: |
| 592 | case HTT_RX_MPDU_ENCRYPT_TKIP_WPA: |
| 593 | return 4; |
| 594 | case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2: |
| 595 | return 8; |
| 596 | } |
| 597 | |
| 598 | ath10k_warn("unknown encryption type %d\n", type); |
| 599 | return 0; |
| 600 | } |
| 601 | |
| 602 | /* Applies for first msdu in chain, before altering it. */ |
| 603 | static struct ieee80211_hdr *ath10k_htt_rx_skb_get_hdr(struct sk_buff *skb) |
| 604 | { |
| 605 | struct htt_rx_desc *rxd; |
| 606 | enum rx_msdu_decap_format fmt; |
| 607 | |
| 608 | rxd = (void *)skb->data - sizeof(*rxd); |
| 609 | fmt = MS(__le32_to_cpu(rxd->msdu_start.info1), |
| 610 | RX_MSDU_START_INFO1_DECAP_FORMAT); |
| 611 | |
| 612 | if (fmt == RX_MSDU_DECAP_RAW) |
| 613 | return (void *)skb->data; |
| 614 | else |
| 615 | return (void *)skb->data - RX_HTT_HDR_STATUS_LEN; |
| 616 | } |
| 617 | |
| 618 | /* This function only applies for first msdu in an msdu chain */ |
| 619 | static bool ath10k_htt_rx_hdr_is_amsdu(struct ieee80211_hdr *hdr) |
| 620 | { |
| 621 | if (ieee80211_is_data_qos(hdr->frame_control)) { |
| 622 | u8 *qc = ieee80211_get_qos_ctl(hdr); |
| 623 | if (qc[0] & 0x80) |
| 624 | return true; |
| 625 | } |
| 626 | return false; |
| 627 | } |
| 628 | |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 629 | struct rfc1042_hdr { |
| 630 | u8 llc_dsap; |
| 631 | u8 llc_ssap; |
| 632 | u8 llc_ctrl; |
| 633 | u8 snap_oui[3]; |
| 634 | __be16 snap_type; |
| 635 | } __packed; |
| 636 | |
| 637 | struct amsdu_subframe_hdr { |
| 638 | u8 dst[ETH_ALEN]; |
| 639 | u8 src[ETH_ALEN]; |
| 640 | __be16 len; |
| 641 | } __packed; |
| 642 | |
Janusz Dziedzic | 73539b4 | 2014-03-24 21:23:15 +0100 | [diff] [blame] | 643 | static const u8 rx_legacy_rate_idx[] = { |
| 644 | 3, /* 0x00 - 11Mbps */ |
| 645 | 2, /* 0x01 - 5.5Mbps */ |
| 646 | 1, /* 0x02 - 2Mbps */ |
| 647 | 0, /* 0x03 - 1Mbps */ |
| 648 | 3, /* 0x04 - 11Mbps */ |
| 649 | 2, /* 0x05 - 5.5Mbps */ |
| 650 | 1, /* 0x06 - 2Mbps */ |
| 651 | 0, /* 0x07 - 1Mbps */ |
| 652 | 10, /* 0x08 - 48Mbps */ |
| 653 | 8, /* 0x09 - 24Mbps */ |
| 654 | 6, /* 0x0A - 12Mbps */ |
| 655 | 4, /* 0x0B - 6Mbps */ |
| 656 | 11, /* 0x0C - 54Mbps */ |
| 657 | 9, /* 0x0D - 36Mbps */ |
| 658 | 7, /* 0x0E - 18Mbps */ |
| 659 | 5, /* 0x0F - 9Mbps */ |
| 660 | }; |
| 661 | |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 662 | static void ath10k_htt_rx_h_rates(struct ath10k *ar, |
Janusz Dziedzic | cfadd9b | 2014-03-24 21:23:16 +0100 | [diff] [blame] | 663 | enum ieee80211_band band, |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 664 | u8 info0, u32 info1, u32 info2, |
Janusz Dziedzic | cfadd9b | 2014-03-24 21:23:16 +0100 | [diff] [blame] | 665 | struct ieee80211_rx_status *status) |
Janusz Dziedzic | 73539b4 | 2014-03-24 21:23:15 +0100 | [diff] [blame] | 666 | { |
| 667 | u8 cck, rate, rate_idx, bw, sgi, mcs, nss; |
Janusz Dziedzic | 73539b4 | 2014-03-24 21:23:15 +0100 | [diff] [blame] | 668 | u8 preamble = 0; |
| 669 | |
| 670 | /* Check if valid fields */ |
| 671 | if (!(info0 & HTT_RX_INDICATION_INFO0_START_VALID)) |
| 672 | return; |
| 673 | |
| 674 | preamble = MS(info1, HTT_RX_INDICATION_INFO1_PREAMBLE_TYPE); |
| 675 | |
| 676 | switch (preamble) { |
| 677 | case HTT_RX_LEGACY: |
| 678 | cck = info0 & HTT_RX_INDICATION_INFO0_LEGACY_RATE_CCK; |
| 679 | rate = MS(info0, HTT_RX_INDICATION_INFO0_LEGACY_RATE); |
| 680 | rate_idx = 0; |
| 681 | |
| 682 | if (rate < 0x08 || rate > 0x0F) |
| 683 | break; |
| 684 | |
| 685 | switch (band) { |
| 686 | case IEEE80211_BAND_2GHZ: |
| 687 | if (cck) |
| 688 | rate &= ~BIT(3); |
| 689 | rate_idx = rx_legacy_rate_idx[rate]; |
| 690 | break; |
| 691 | case IEEE80211_BAND_5GHZ: |
| 692 | rate_idx = rx_legacy_rate_idx[rate]; |
| 693 | /* We are using same rate table registering |
| 694 | HW - ath10k_rates[]. In case of 5GHz skip |
| 695 | CCK rates, so -4 here */ |
| 696 | rate_idx -= 4; |
| 697 | break; |
| 698 | default: |
| 699 | break; |
| 700 | } |
| 701 | |
| 702 | status->rate_idx = rate_idx; |
| 703 | break; |
| 704 | case HTT_RX_HT: |
| 705 | case HTT_RX_HT_WITH_TXBF: |
| 706 | /* HT-SIG - Table 20-11 in info1 and info2 */ |
| 707 | mcs = info1 & 0x1F; |
| 708 | nss = mcs >> 3; |
| 709 | bw = (info1 >> 7) & 1; |
| 710 | sgi = (info2 >> 7) & 1; |
| 711 | |
| 712 | status->rate_idx = mcs; |
| 713 | status->flag |= RX_FLAG_HT; |
| 714 | if (sgi) |
| 715 | status->flag |= RX_FLAG_SHORT_GI; |
| 716 | if (bw) |
| 717 | status->flag |= RX_FLAG_40MHZ; |
| 718 | break; |
| 719 | case HTT_RX_VHT: |
| 720 | case HTT_RX_VHT_WITH_TXBF: |
| 721 | /* VHT-SIG-A1 in info 1, VHT-SIG-A2 in info2 |
| 722 | TODO check this */ |
| 723 | mcs = (info2 >> 4) & 0x0F; |
| 724 | nss = ((info1 >> 10) & 0x07) + 1; |
| 725 | bw = info1 & 3; |
| 726 | sgi = info2 & 1; |
| 727 | |
| 728 | status->rate_idx = mcs; |
| 729 | status->vht_nss = nss; |
| 730 | |
| 731 | if (sgi) |
| 732 | status->flag |= RX_FLAG_SHORT_GI; |
| 733 | |
| 734 | switch (bw) { |
| 735 | /* 20MHZ */ |
| 736 | case 0: |
| 737 | break; |
| 738 | /* 40MHZ */ |
| 739 | case 1: |
| 740 | status->flag |= RX_FLAG_40MHZ; |
| 741 | break; |
| 742 | /* 80MHZ */ |
| 743 | case 2: |
| 744 | status->vht_flag |= RX_VHT_FLAG_80MHZ; |
| 745 | } |
| 746 | |
| 747 | status->flag |= RX_FLAG_VHT; |
| 748 | break; |
| 749 | default: |
| 750 | break; |
| 751 | } |
| 752 | } |
| 753 | |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 754 | static void ath10k_htt_rx_h_protected(struct ath10k_htt *htt, |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 755 | struct ieee80211_rx_status *rx_status, |
| 756 | struct sk_buff *skb, |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 757 | enum htt_rx_mpdu_encrypt_type enctype) |
| 758 | { |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 759 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 760 | |
| 761 | |
| 762 | if (enctype == HTT_RX_MPDU_ENCRYPT_NONE) { |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 763 | rx_status->flag &= ~(RX_FLAG_DECRYPTED | |
| 764 | RX_FLAG_IV_STRIPPED | |
| 765 | RX_FLAG_MMIC_STRIPPED); |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 766 | return; |
| 767 | } |
| 768 | |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 769 | rx_status->flag |= RX_FLAG_DECRYPTED | |
| 770 | RX_FLAG_IV_STRIPPED | |
| 771 | RX_FLAG_MMIC_STRIPPED; |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 772 | hdr->frame_control = __cpu_to_le16(__le16_to_cpu(hdr->frame_control) & |
| 773 | ~IEEE80211_FCTL_PROTECTED); |
| 774 | } |
| 775 | |
Janusz Dziedzic | 36653f05 | 2014-03-24 21:23:18 +0100 | [diff] [blame] | 776 | static bool ath10k_htt_rx_h_channel(struct ath10k *ar, |
| 777 | struct ieee80211_rx_status *status) |
| 778 | { |
| 779 | struct ieee80211_channel *ch; |
| 780 | |
| 781 | spin_lock_bh(&ar->data_lock); |
| 782 | ch = ar->scan_channel; |
| 783 | if (!ch) |
| 784 | ch = ar->rx_channel; |
| 785 | spin_unlock_bh(&ar->data_lock); |
| 786 | |
| 787 | if (!ch) |
| 788 | return false; |
| 789 | |
| 790 | status->band = ch->band; |
| 791 | status->freq = ch->center_freq; |
| 792 | |
| 793 | return true; |
| 794 | } |
| 795 | |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 796 | static void ath10k_process_rx(struct ath10k *ar, |
| 797 | struct ieee80211_rx_status *rx_status, |
| 798 | struct sk_buff *skb) |
Janusz Dziedzic | 73539b4 | 2014-03-24 21:23:15 +0100 | [diff] [blame] | 799 | { |
| 800 | struct ieee80211_rx_status *status; |
Janusz Dziedzic | 73539b4 | 2014-03-24 21:23:15 +0100 | [diff] [blame] | 801 | |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 802 | status = IEEE80211_SKB_RXCB(skb); |
| 803 | *status = *rx_status; |
Janusz Dziedzic | 73539b4 | 2014-03-24 21:23:15 +0100 | [diff] [blame] | 804 | |
Janusz Dziedzic | 73539b4 | 2014-03-24 21:23:15 +0100 | [diff] [blame] | 805 | ath10k_dbg(ATH10K_DBG_DATA, |
Janusz Dziedzic | 78433f9 | 2014-03-24 21:23:21 +0100 | [diff] [blame] | 806 | "rx skb %p len %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %imic-err %i\n", |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 807 | skb, |
| 808 | skb->len, |
Janusz Dziedzic | 73539b4 | 2014-03-24 21:23:15 +0100 | [diff] [blame] | 809 | status->flag == 0 ? "legacy" : "", |
| 810 | status->flag & RX_FLAG_HT ? "ht" : "", |
| 811 | status->flag & RX_FLAG_VHT ? "vht" : "", |
| 812 | status->flag & RX_FLAG_40MHZ ? "40" : "", |
| 813 | status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "", |
| 814 | status->flag & RX_FLAG_SHORT_GI ? "sgi " : "", |
| 815 | status->rate_idx, |
| 816 | status->vht_nss, |
| 817 | status->freq, |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 818 | status->band, status->flag, |
Janusz Dziedzic | 78433f9 | 2014-03-24 21:23:21 +0100 | [diff] [blame] | 819 | !!(status->flag & RX_FLAG_FAILED_FCS_CRC), |
| 820 | !!(status->flag & RX_FLAG_MMIC_ERROR)); |
Janusz Dziedzic | 73539b4 | 2014-03-24 21:23:15 +0100 | [diff] [blame] | 821 | ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ", |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 822 | skb->data, skb->len); |
Janusz Dziedzic | 73539b4 | 2014-03-24 21:23:15 +0100 | [diff] [blame] | 823 | |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 824 | ieee80211_rx(ar->hw, skb); |
Janusz Dziedzic | 73539b4 | 2014-03-24 21:23:15 +0100 | [diff] [blame] | 825 | } |
| 826 | |
Michal Kazior | d960c36 | 2014-02-25 09:29:57 +0200 | [diff] [blame] | 827 | static int ath10k_htt_rx_nwifi_hdrlen(struct ieee80211_hdr *hdr) |
| 828 | { |
| 829 | /* nwifi header is padded to 4 bytes. this fixes 4addr rx */ |
| 830 | return round_up(ieee80211_hdrlen(hdr->frame_control), 4); |
| 831 | } |
| 832 | |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 833 | static void ath10k_htt_rx_amsdu(struct ath10k_htt *htt, |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 834 | struct ieee80211_rx_status *rx_status, |
| 835 | struct sk_buff *skb_in) |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 836 | { |
| 837 | struct htt_rx_desc *rxd; |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 838 | struct sk_buff *skb = skb_in; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 839 | struct sk_buff *first; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 840 | enum rx_msdu_decap_format fmt; |
| 841 | enum htt_rx_mpdu_encrypt_type enctype; |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 842 | struct ieee80211_hdr *hdr; |
Michal Kazior | 784f69d | 2013-09-26 10:12:23 +0300 | [diff] [blame] | 843 | u8 hdr_buf[64], addr[ETH_ALEN], *qos; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 844 | unsigned int hdr_len; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 845 | |
| 846 | rxd = (void *)skb->data - sizeof(*rxd); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 847 | enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0), |
| 848 | RX_MPDU_START_INFO0_ENCRYPT_TYPE); |
| 849 | |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 850 | hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status; |
| 851 | hdr_len = ieee80211_hdrlen(hdr->frame_control); |
| 852 | memcpy(hdr_buf, hdr, hdr_len); |
| 853 | hdr = (struct ieee80211_hdr *)hdr_buf; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 854 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 855 | first = skb; |
| 856 | while (skb) { |
| 857 | void *decap_hdr; |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 858 | int len; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 859 | |
| 860 | rxd = (void *)skb->data - sizeof(*rxd); |
| 861 | fmt = MS(__le32_to_cpu(rxd->msdu_start.info1), |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 862 | RX_MSDU_START_INFO1_DECAP_FORMAT); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 863 | decap_hdr = (void *)rxd->rx_hdr_status; |
| 864 | |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 865 | skb->ip_summed = ath10k_htt_rx_get_csum_state(skb); |
| 866 | |
| 867 | /* First frame in an A-MSDU chain has more decapped data. */ |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 868 | if (skb == first) { |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 869 | len = round_up(ieee80211_hdrlen(hdr->frame_control), 4); |
| 870 | len += round_up(ath10k_htt_rx_crypto_param_len(enctype), |
| 871 | 4); |
| 872 | decap_hdr += len; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 873 | } |
| 874 | |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 875 | switch (fmt) { |
| 876 | case RX_MSDU_DECAP_RAW: |
Michal Kazior | e3fbf8d | 2013-09-26 10:12:23 +0300 | [diff] [blame] | 877 | /* remove trailing FCS */ |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 878 | skb_trim(skb, skb->len - FCS_LEN); |
| 879 | break; |
| 880 | case RX_MSDU_DECAP_NATIVE_WIFI: |
Michal Kazior | 784f69d | 2013-09-26 10:12:23 +0300 | [diff] [blame] | 881 | /* pull decapped header and copy DA */ |
| 882 | hdr = (struct ieee80211_hdr *)skb->data; |
Michal Kazior | d960c36 | 2014-02-25 09:29:57 +0200 | [diff] [blame] | 883 | hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr); |
Michal Kazior | 784f69d | 2013-09-26 10:12:23 +0300 | [diff] [blame] | 884 | memcpy(addr, ieee80211_get_DA(hdr), ETH_ALEN); |
| 885 | skb_pull(skb, hdr_len); |
| 886 | |
| 887 | /* push original 802.11 header */ |
| 888 | hdr = (struct ieee80211_hdr *)hdr_buf; |
| 889 | hdr_len = ieee80211_hdrlen(hdr->frame_control); |
| 890 | memcpy(skb_push(skb, hdr_len), hdr, hdr_len); |
| 891 | |
| 892 | /* original A-MSDU header has the bit set but we're |
| 893 | * not including A-MSDU subframe header */ |
| 894 | hdr = (struct ieee80211_hdr *)skb->data; |
| 895 | qos = ieee80211_get_qos_ctl(hdr); |
| 896 | qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT; |
| 897 | |
| 898 | /* original 802.11 header has a different DA */ |
| 899 | memcpy(ieee80211_get_DA(hdr), addr, ETH_ALEN); |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 900 | break; |
| 901 | case RX_MSDU_DECAP_ETHERNET2_DIX: |
Michal Kazior | e3fbf8d | 2013-09-26 10:12:23 +0300 | [diff] [blame] | 902 | /* strip ethernet header and insert decapped 802.11 |
| 903 | * header, amsdu subframe header and rfc1042 header */ |
| 904 | |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 905 | len = 0; |
| 906 | len += sizeof(struct rfc1042_hdr); |
| 907 | len += sizeof(struct amsdu_subframe_hdr); |
Michal Kazior | dfa95b5 | 2013-08-13 07:59:37 +0200 | [diff] [blame] | 908 | |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 909 | skb_pull(skb, sizeof(struct ethhdr)); |
| 910 | memcpy(skb_push(skb, len), decap_hdr, len); |
| 911 | memcpy(skb_push(skb, hdr_len), hdr, hdr_len); |
| 912 | break; |
| 913 | case RX_MSDU_DECAP_8023_SNAP_LLC: |
Michal Kazior | e3fbf8d | 2013-09-26 10:12:23 +0300 | [diff] [blame] | 914 | /* insert decapped 802.11 header making a singly |
| 915 | * A-MSDU */ |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 916 | memcpy(skb_push(skb, hdr_len), hdr, hdr_len); |
| 917 | break; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 918 | } |
| 919 | |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 920 | skb_in = skb; |
| 921 | ath10k_htt_rx_h_protected(htt, rx_status, skb_in, enctype); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 922 | skb = skb->next; |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 923 | skb_in->next = NULL; |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 924 | |
Kalle Valo | 652de35 | 2013-11-13 15:23:30 +0200 | [diff] [blame] | 925 | if (skb) |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 926 | rx_status->flag |= RX_FLAG_AMSDU_MORE; |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 927 | else |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 928 | rx_status->flag &= ~RX_FLAG_AMSDU_MORE; |
Kalle Valo | 652de35 | 2013-11-13 15:23:30 +0200 | [diff] [blame] | 929 | |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 930 | ath10k_process_rx(htt->ar, rx_status, skb_in); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 931 | } |
| 932 | |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 933 | /* FIXME: It might be nice to re-assemble the A-MSDU when there's a |
| 934 | * monitor interface active for sniffing purposes. */ |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 935 | } |
| 936 | |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 937 | static void ath10k_htt_rx_msdu(struct ath10k_htt *htt, |
| 938 | struct ieee80211_rx_status *rx_status, |
| 939 | struct sk_buff *skb) |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 940 | { |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 941 | struct htt_rx_desc *rxd; |
| 942 | struct ieee80211_hdr *hdr; |
| 943 | enum rx_msdu_decap_format fmt; |
| 944 | enum htt_rx_mpdu_encrypt_type enctype; |
Michal Kazior | e3fbf8d | 2013-09-26 10:12:23 +0300 | [diff] [blame] | 945 | int hdr_len; |
| 946 | void *rfc1042; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 947 | |
| 948 | /* This shouldn't happen. If it does than it may be a FW bug. */ |
| 949 | if (skb->next) { |
Ben Greear | 75fb2f9 | 2014-02-05 13:58:34 -0800 | [diff] [blame] | 950 | ath10k_warn("htt rx received chained non A-MSDU frame\n"); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 951 | ath10k_htt_rx_free_msdu_chain(skb->next); |
| 952 | skb->next = NULL; |
| 953 | } |
| 954 | |
| 955 | rxd = (void *)skb->data - sizeof(*rxd); |
| 956 | fmt = MS(__le32_to_cpu(rxd->msdu_start.info1), |
| 957 | RX_MSDU_START_INFO1_DECAP_FORMAT); |
| 958 | enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0), |
| 959 | RX_MPDU_START_INFO0_ENCRYPT_TYPE); |
Michal Kazior | e3fbf8d | 2013-09-26 10:12:23 +0300 | [diff] [blame] | 960 | hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status; |
| 961 | hdr_len = ieee80211_hdrlen(hdr->frame_control); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 962 | |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 963 | skb->ip_summed = ath10k_htt_rx_get_csum_state(skb); |
| 964 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 965 | switch (fmt) { |
| 966 | case RX_MSDU_DECAP_RAW: |
| 967 | /* remove trailing FCS */ |
Michal Kazior | e3fbf8d | 2013-09-26 10:12:23 +0300 | [diff] [blame] | 968 | skb_trim(skb, skb->len - FCS_LEN); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 969 | break; |
| 970 | case RX_MSDU_DECAP_NATIVE_WIFI: |
Michal Kazior | 784f69d | 2013-09-26 10:12:23 +0300 | [diff] [blame] | 971 | /* Pull decapped header */ |
| 972 | hdr = (struct ieee80211_hdr *)skb->data; |
Michal Kazior | d960c36 | 2014-02-25 09:29:57 +0200 | [diff] [blame] | 973 | hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr); |
Michal Kazior | 784f69d | 2013-09-26 10:12:23 +0300 | [diff] [blame] | 974 | skb_pull(skb, hdr_len); |
| 975 | |
| 976 | /* Push original header */ |
| 977 | hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status; |
| 978 | hdr_len = ieee80211_hdrlen(hdr->frame_control); |
| 979 | memcpy(skb_push(skb, hdr_len), hdr, hdr_len); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 980 | break; |
| 981 | case RX_MSDU_DECAP_ETHERNET2_DIX: |
Michal Kazior | e3fbf8d | 2013-09-26 10:12:23 +0300 | [diff] [blame] | 982 | /* strip ethernet header and insert decapped 802.11 header and |
| 983 | * rfc1042 header */ |
| 984 | |
| 985 | rfc1042 = hdr; |
| 986 | rfc1042 += roundup(hdr_len, 4); |
| 987 | rfc1042 += roundup(ath10k_htt_rx_crypto_param_len(enctype), 4); |
| 988 | |
| 989 | skb_pull(skb, sizeof(struct ethhdr)); |
| 990 | memcpy(skb_push(skb, sizeof(struct rfc1042_hdr)), |
| 991 | rfc1042, sizeof(struct rfc1042_hdr)); |
| 992 | memcpy(skb_push(skb, hdr_len), hdr, hdr_len); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 993 | break; |
| 994 | case RX_MSDU_DECAP_8023_SNAP_LLC: |
Michal Kazior | e3fbf8d | 2013-09-26 10:12:23 +0300 | [diff] [blame] | 995 | /* remove A-MSDU subframe header and insert |
| 996 | * decapped 802.11 header. rfc1042 header is already there */ |
| 997 | |
| 998 | skb_pull(skb, sizeof(struct amsdu_subframe_hdr)); |
| 999 | memcpy(skb_push(skb, hdr_len), hdr, hdr_len); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1000 | break; |
| 1001 | } |
| 1002 | |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 1003 | ath10k_htt_rx_h_protected(htt, rx_status, skb, enctype); |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 1004 | |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 1005 | ath10k_process_rx(htt->ar, rx_status, skb); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1006 | } |
| 1007 | |
Michal Kazior | 605f81a | 2013-07-31 10:47:56 +0200 | [diff] [blame] | 1008 | static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb) |
| 1009 | { |
| 1010 | struct htt_rx_desc *rxd; |
| 1011 | u32 flags, info; |
| 1012 | bool is_ip4, is_ip6; |
| 1013 | bool is_tcp, is_udp; |
| 1014 | bool ip_csum_ok, tcpudp_csum_ok; |
| 1015 | |
| 1016 | rxd = (void *)skb->data - sizeof(*rxd); |
| 1017 | flags = __le32_to_cpu(rxd->attention.flags); |
| 1018 | info = __le32_to_cpu(rxd->msdu_start.info1); |
| 1019 | |
| 1020 | is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO); |
| 1021 | is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO); |
| 1022 | is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO); |
| 1023 | is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO); |
| 1024 | ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL); |
| 1025 | tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL); |
| 1026 | |
| 1027 | if (!is_ip4 && !is_ip6) |
| 1028 | return CHECKSUM_NONE; |
| 1029 | if (!is_tcp && !is_udp) |
| 1030 | return CHECKSUM_NONE; |
| 1031 | if (!ip_csum_ok) |
| 1032 | return CHECKSUM_NONE; |
| 1033 | if (!tcpudp_csum_ok) |
| 1034 | return CHECKSUM_NONE; |
| 1035 | |
| 1036 | return CHECKSUM_UNNECESSARY; |
| 1037 | } |
| 1038 | |
Ben Greear | bfa3536 | 2014-03-03 14:07:09 -0800 | [diff] [blame] | 1039 | static int ath10k_unchain_msdu(struct sk_buff *msdu_head) |
| 1040 | { |
| 1041 | struct sk_buff *next = msdu_head->next; |
| 1042 | struct sk_buff *to_free = next; |
| 1043 | int space; |
| 1044 | int total_len = 0; |
| 1045 | |
| 1046 | /* TODO: Might could optimize this by using |
| 1047 | * skb_try_coalesce or similar method to |
| 1048 | * decrease copying, or maybe get mac80211 to |
| 1049 | * provide a way to just receive a list of |
| 1050 | * skb? |
| 1051 | */ |
| 1052 | |
| 1053 | msdu_head->next = NULL; |
| 1054 | |
| 1055 | /* Allocate total length all at once. */ |
| 1056 | while (next) { |
| 1057 | total_len += next->len; |
| 1058 | next = next->next; |
| 1059 | } |
| 1060 | |
| 1061 | space = total_len - skb_tailroom(msdu_head); |
| 1062 | if ((space > 0) && |
| 1063 | (pskb_expand_head(msdu_head, 0, space, GFP_ATOMIC) < 0)) { |
| 1064 | /* TODO: bump some rx-oom error stat */ |
| 1065 | /* put it back together so we can free the |
| 1066 | * whole list at once. |
| 1067 | */ |
| 1068 | msdu_head->next = to_free; |
| 1069 | return -1; |
| 1070 | } |
| 1071 | |
| 1072 | /* Walk list again, copying contents into |
| 1073 | * msdu_head |
| 1074 | */ |
| 1075 | next = to_free; |
| 1076 | while (next) { |
| 1077 | skb_copy_from_linear_data(next, skb_put(msdu_head, next->len), |
| 1078 | next->len); |
| 1079 | next = next->next; |
| 1080 | } |
| 1081 | |
| 1082 | /* If here, we have consolidated skb. Free the |
| 1083 | * fragments and pass the main skb on up the |
| 1084 | * stack. |
| 1085 | */ |
| 1086 | ath10k_htt_rx_free_msdu_chain(to_free); |
| 1087 | return 0; |
| 1088 | } |
| 1089 | |
Janusz Dziedzic | 2acc4eb | 2014-03-19 07:09:40 +0100 | [diff] [blame] | 1090 | static bool ath10k_htt_rx_amsdu_allowed(struct ath10k_htt *htt, |
| 1091 | struct sk_buff *head, |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1092 | enum htt_rx_mpdu_status status, |
Janusz Dziedzic | 78433f9 | 2014-03-24 21:23:21 +0100 | [diff] [blame] | 1093 | bool channel_set, |
| 1094 | u32 attention) |
Janusz Dziedzic | 2acc4eb | 2014-03-19 07:09:40 +0100 | [diff] [blame] | 1095 | { |
Janusz Dziedzic | 2acc4eb | 2014-03-19 07:09:40 +0100 | [diff] [blame] | 1096 | if (head->len == 0) { |
| 1097 | ath10k_dbg(ATH10K_DBG_HTT, |
| 1098 | "htt rx dropping due to zero-len\n"); |
| 1099 | return false; |
| 1100 | } |
| 1101 | |
Janusz Dziedzic | 78433f9 | 2014-03-24 21:23:21 +0100 | [diff] [blame] | 1102 | if (attention & RX_ATTENTION_FLAGS_DECRYPT_ERR) { |
Janusz Dziedzic | 2acc4eb | 2014-03-19 07:09:40 +0100 | [diff] [blame] | 1103 | ath10k_dbg(ATH10K_DBG_HTT, |
| 1104 | "htt rx dropping due to decrypt-err\n"); |
| 1105 | return false; |
| 1106 | } |
| 1107 | |
Janusz Dziedzic | 36653f05 | 2014-03-24 21:23:18 +0100 | [diff] [blame] | 1108 | if (!channel_set) { |
| 1109 | ath10k_warn("no channel configured; ignoring frame!\n"); |
| 1110 | return false; |
| 1111 | } |
| 1112 | |
Janusz Dziedzic | 2acc4eb | 2014-03-19 07:09:40 +0100 | [diff] [blame] | 1113 | /* Skip mgmt frames while we handle this in WMI */ |
| 1114 | if (status == HTT_RX_IND_MPDU_STATUS_MGMT_CTRL || |
Janusz Dziedzic | 78433f9 | 2014-03-24 21:23:21 +0100 | [diff] [blame] | 1115 | attention & RX_ATTENTION_FLAGS_MGMT_TYPE) { |
Janusz Dziedzic | 2acc4eb | 2014-03-19 07:09:40 +0100 | [diff] [blame] | 1116 | ath10k_dbg(ATH10K_DBG_HTT, "htt rx mgmt ctrl\n"); |
| 1117 | return false; |
| 1118 | } |
| 1119 | |
| 1120 | if (status != HTT_RX_IND_MPDU_STATUS_OK && |
| 1121 | status != HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR && |
| 1122 | status != HTT_RX_IND_MPDU_STATUS_ERR_INV_PEER && |
| 1123 | !htt->ar->monitor_enabled) { |
| 1124 | ath10k_dbg(ATH10K_DBG_HTT, |
| 1125 | "htt rx ignoring frame w/ status %d\n", |
| 1126 | status); |
| 1127 | return false; |
| 1128 | } |
| 1129 | |
| 1130 | if (test_bit(ATH10K_CAC_RUNNING, &htt->ar->dev_flags)) { |
| 1131 | ath10k_dbg(ATH10K_DBG_HTT, |
| 1132 | "htt rx CAC running\n"); |
| 1133 | return false; |
| 1134 | } |
| 1135 | |
| 1136 | return true; |
| 1137 | } |
| 1138 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1139 | static void ath10k_htt_rx_handler(struct ath10k_htt *htt, |
| 1140 | struct htt_rx_indication *rx) |
| 1141 | { |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 1142 | struct ieee80211_rx_status rx_status; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1143 | struct htt_rx_indication_mpdu_range *mpdu_ranges; |
Janusz Dziedzic | 78433f9 | 2014-03-24 21:23:21 +0100 | [diff] [blame] | 1144 | struct htt_rx_desc *rxd; |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1145 | enum htt_rx_mpdu_status status; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1146 | struct ieee80211_hdr *hdr; |
| 1147 | int num_mpdu_ranges; |
Janusz Dziedzic | 78433f9 | 2014-03-24 21:23:21 +0100 | [diff] [blame] | 1148 | u32 attention; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1149 | int fw_desc_len; |
| 1150 | u8 *fw_desc; |
Janusz Dziedzic | 78433f9 | 2014-03-24 21:23:21 +0100 | [diff] [blame] | 1151 | bool channel_set; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1152 | int i, j; |
Janusz Dziedzic | d84dd60 | 2014-03-24 21:23:20 +0100 | [diff] [blame] | 1153 | int ret; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1154 | |
Michal Kazior | 4596708 | 2014-02-27 18:50:05 +0200 | [diff] [blame] | 1155 | lockdep_assert_held(&htt->rx_ring.lock); |
| 1156 | |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 1157 | memset(&rx_status, 0, sizeof(rx_status)); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1158 | |
| 1159 | fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes); |
| 1160 | fw_desc = (u8 *)&rx->fw_desc; |
| 1161 | |
| 1162 | num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1), |
| 1163 | HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES); |
| 1164 | mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx); |
| 1165 | |
Janusz Dziedzic | e8dc1a9 | 2014-03-19 07:09:41 +0100 | [diff] [blame] | 1166 | /* Fill this once, while this is per-ppdu */ |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 1167 | rx_status.signal = ATH10K_DEFAULT_NOISE_FLOOR; |
| 1168 | rx_status.signal += rx->ppdu.combined_rssi; |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1169 | |
| 1170 | if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_END_VALID) { |
| 1171 | /* TSF available only in 32-bit */ |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 1172 | rx_status.mactime = __le32_to_cpu(rx->ppdu.tsf) & 0xffffffff; |
| 1173 | rx_status.flag |= RX_FLAG_MACTIME_END; |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1174 | } |
Janusz Dziedzic | e8dc1a9 | 2014-03-19 07:09:41 +0100 | [diff] [blame] | 1175 | |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 1176 | channel_set = ath10k_htt_rx_h_channel(htt->ar, &rx_status); |
Janusz Dziedzic | 36653f05 | 2014-03-24 21:23:18 +0100 | [diff] [blame] | 1177 | |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1178 | if (channel_set) { |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 1179 | ath10k_htt_rx_h_rates(htt->ar, rx_status.band, |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1180 | rx->ppdu.info0, |
| 1181 | __le32_to_cpu(rx->ppdu.info1), |
| 1182 | __le32_to_cpu(rx->ppdu.info2), |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 1183 | &rx_status); |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1184 | } |
Janusz Dziedzic | e8dc1a9 | 2014-03-19 07:09:41 +0100 | [diff] [blame] | 1185 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1186 | ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ", |
| 1187 | rx, sizeof(*rx) + |
| 1188 | (sizeof(struct htt_rx_indication_mpdu_range) * |
| 1189 | num_mpdu_ranges)); |
| 1190 | |
| 1191 | for (i = 0; i < num_mpdu_ranges; i++) { |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1192 | status = mpdu_ranges[i].mpdu_range_status; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1193 | |
| 1194 | for (j = 0; j < mpdu_ranges[i].mpdu_count; j++) { |
| 1195 | struct sk_buff *msdu_head, *msdu_tail; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1196 | |
| 1197 | msdu_head = NULL; |
| 1198 | msdu_tail = NULL; |
Janusz Dziedzic | d84dd60 | 2014-03-24 21:23:20 +0100 | [diff] [blame] | 1199 | ret = ath10k_htt_rx_amsdu_pop(htt, |
| 1200 | &fw_desc, |
| 1201 | &fw_desc_len, |
| 1202 | &msdu_head, |
| 1203 | &msdu_tail); |
| 1204 | |
| 1205 | if (ret < 0) { |
| 1206 | ath10k_warn("failed to pop amsdu from htt rx ring %d\n", |
| 1207 | ret); |
| 1208 | ath10k_htt_rx_free_msdu_chain(msdu_head); |
| 1209 | continue; |
| 1210 | } |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1211 | |
Janusz Dziedzic | 78433f9 | 2014-03-24 21:23:21 +0100 | [diff] [blame] | 1212 | rxd = container_of((void *)msdu_head->data, |
| 1213 | struct htt_rx_desc, |
| 1214 | msdu_payload); |
| 1215 | attention = __le32_to_cpu(rxd->attention.flags); |
| 1216 | |
Janusz Dziedzic | 2acc4eb | 2014-03-19 07:09:40 +0100 | [diff] [blame] | 1217 | if (!ath10k_htt_rx_amsdu_allowed(htt, msdu_head, |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1218 | status, |
Janusz Dziedzic | 78433f9 | 2014-03-24 21:23:21 +0100 | [diff] [blame] | 1219 | channel_set, |
| 1220 | attention)) { |
Marek Puzyniak | e8a50f8 | 2013-11-20 09:59:47 +0200 | [diff] [blame] | 1221 | ath10k_htt_rx_free_msdu_chain(msdu_head); |
| 1222 | continue; |
| 1223 | } |
| 1224 | |
Janusz Dziedzic | d84dd60 | 2014-03-24 21:23:20 +0100 | [diff] [blame] | 1225 | if (ret > 0 && |
| 1226 | ath10k_unchain_msdu(msdu_head) < 0) { |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1227 | ath10k_htt_rx_free_msdu_chain(msdu_head); |
| 1228 | continue; |
| 1229 | } |
| 1230 | |
Janusz Dziedzic | 78433f9 | 2014-03-24 21:23:21 +0100 | [diff] [blame] | 1231 | if (attention & RX_ATTENTION_FLAGS_FCS_ERR) |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 1232 | rx_status.flag |= RX_FLAG_FAILED_FCS_CRC; |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1233 | else |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 1234 | rx_status.flag &= ~RX_FLAG_FAILED_FCS_CRC; |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1235 | |
Janusz Dziedzic | 78433f9 | 2014-03-24 21:23:21 +0100 | [diff] [blame] | 1236 | if (attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR) |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 1237 | rx_status.flag |= RX_FLAG_MMIC_ERROR; |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1238 | else |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 1239 | rx_status.flag &= ~RX_FLAG_MMIC_ERROR; |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1240 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1241 | hdr = ath10k_htt_rx_skb_get_hdr(msdu_head); |
| 1242 | |
| 1243 | if (ath10k_htt_rx_hdr_is_amsdu(hdr)) |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 1244 | ath10k_htt_rx_amsdu(htt, &rx_status, msdu_head); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1245 | else |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 1246 | ath10k_htt_rx_msdu(htt, &rx_status, msdu_head); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1247 | } |
| 1248 | } |
| 1249 | |
Michal Kazior | 6e712d4 | 2013-09-24 10:18:36 +0200 | [diff] [blame] | 1250 | tasklet_schedule(&htt->rx_replenish_task); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1251 | } |
| 1252 | |
| 1253 | static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt, |
| 1254 | struct htt_rx_fragment_indication *frag) |
| 1255 | { |
| 1256 | struct sk_buff *msdu_head, *msdu_tail; |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1257 | enum htt_rx_mpdu_encrypt_type enctype; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1258 | struct htt_rx_desc *rxd; |
| 1259 | enum rx_msdu_decap_format fmt; |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 1260 | struct ieee80211_rx_status rx_status = {}; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1261 | struct ieee80211_hdr *hdr; |
Janusz Dziedzic | d84dd60 | 2014-03-24 21:23:20 +0100 | [diff] [blame] | 1262 | int ret; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1263 | bool tkip_mic_err; |
| 1264 | bool decrypt_err; |
| 1265 | u8 *fw_desc; |
| 1266 | int fw_desc_len, hdrlen, paramlen; |
| 1267 | int trim; |
| 1268 | |
| 1269 | fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes); |
| 1270 | fw_desc = (u8 *)frag->fw_msdu_rx_desc; |
| 1271 | |
| 1272 | msdu_head = NULL; |
| 1273 | msdu_tail = NULL; |
Michal Kazior | 4596708 | 2014-02-27 18:50:05 +0200 | [diff] [blame] | 1274 | |
| 1275 | spin_lock_bh(&htt->rx_ring.lock); |
Janusz Dziedzic | d84dd60 | 2014-03-24 21:23:20 +0100 | [diff] [blame] | 1276 | ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len, |
| 1277 | &msdu_head, &msdu_tail); |
Michal Kazior | 4596708 | 2014-02-27 18:50:05 +0200 | [diff] [blame] | 1278 | spin_unlock_bh(&htt->rx_ring.lock); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1279 | |
| 1280 | ath10k_dbg(ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n"); |
| 1281 | |
Janusz Dziedzic | d84dd60 | 2014-03-24 21:23:20 +0100 | [diff] [blame] | 1282 | if (ret) { |
| 1283 | ath10k_warn("failed to pop amsdu from httr rx ring for fragmented rx %d\n", |
| 1284 | ret); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1285 | ath10k_htt_rx_free_msdu_chain(msdu_head); |
| 1286 | return; |
| 1287 | } |
| 1288 | |
| 1289 | /* FIXME: implement signal strength */ |
| 1290 | |
| 1291 | hdr = (struct ieee80211_hdr *)msdu_head->data; |
| 1292 | rxd = (void *)msdu_head->data - sizeof(*rxd); |
| 1293 | tkip_mic_err = !!(__le32_to_cpu(rxd->attention.flags) & |
| 1294 | RX_ATTENTION_FLAGS_TKIP_MIC_ERR); |
| 1295 | decrypt_err = !!(__le32_to_cpu(rxd->attention.flags) & |
| 1296 | RX_ATTENTION_FLAGS_DECRYPT_ERR); |
| 1297 | fmt = MS(__le32_to_cpu(rxd->msdu_start.info1), |
| 1298 | RX_MSDU_START_INFO1_DECAP_FORMAT); |
| 1299 | |
| 1300 | if (fmt != RX_MSDU_DECAP_RAW) { |
| 1301 | ath10k_warn("we dont support non-raw fragmented rx yet\n"); |
| 1302 | dev_kfree_skb_any(msdu_head); |
| 1303 | goto end; |
| 1304 | } |
| 1305 | |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1306 | enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0), |
| 1307 | RX_MPDU_START_INFO0_ENCRYPT_TYPE); |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 1308 | ath10k_htt_rx_h_protected(htt, &rx_status, msdu_head, enctype); |
| 1309 | msdu_head->ip_summed = ath10k_htt_rx_get_csum_state(msdu_head); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1310 | |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1311 | if (tkip_mic_err) |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1312 | ath10k_warn("tkip mic error\n"); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1313 | |
| 1314 | if (decrypt_err) { |
| 1315 | ath10k_warn("decryption err in fragmented rx\n"); |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 1316 | dev_kfree_skb_any(msdu_head); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1317 | goto end; |
| 1318 | } |
| 1319 | |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1320 | if (enctype != HTT_RX_MPDU_ENCRYPT_NONE) { |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1321 | hdrlen = ieee80211_hdrlen(hdr->frame_control); |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1322 | paramlen = ath10k_htt_rx_crypto_param_len(enctype); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1323 | |
| 1324 | /* It is more efficient to move the header than the payload */ |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 1325 | memmove((void *)msdu_head->data + paramlen, |
| 1326 | (void *)msdu_head->data, |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1327 | hdrlen); |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 1328 | skb_pull(msdu_head, paramlen); |
| 1329 | hdr = (struct ieee80211_hdr *)msdu_head->data; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1330 | } |
| 1331 | |
| 1332 | /* remove trailing FCS */ |
| 1333 | trim = 4; |
| 1334 | |
| 1335 | /* remove crypto trailer */ |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1336 | trim += ath10k_htt_rx_crypto_tail_len(enctype); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1337 | |
| 1338 | /* last fragment of TKIP frags has MIC */ |
| 1339 | if (!ieee80211_has_morefrags(hdr->frame_control) && |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1340 | enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA) |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1341 | trim += 8; |
| 1342 | |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 1343 | if (trim > msdu_head->len) { |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1344 | ath10k_warn("htt rx fragment: trailer longer than the frame itself? drop\n"); |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 1345 | dev_kfree_skb_any(msdu_head); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1346 | goto end; |
| 1347 | } |
| 1348 | |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 1349 | skb_trim(msdu_head, msdu_head->len - trim); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1350 | |
Ben Greear | 75fb2f9 | 2014-02-05 13:58:34 -0800 | [diff] [blame] | 1351 | ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx frag mpdu: ", |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame^] | 1352 | msdu_head->data, msdu_head->len); |
| 1353 | ath10k_process_rx(htt->ar, &rx_status, msdu_head); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1354 | |
| 1355 | end: |
| 1356 | if (fw_desc_len > 0) { |
| 1357 | ath10k_dbg(ATH10K_DBG_HTT, |
| 1358 | "expecting more fragmented rx in one indication %d\n", |
| 1359 | fw_desc_len); |
| 1360 | } |
| 1361 | } |
| 1362 | |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 1363 | static void ath10k_htt_rx_frm_tx_compl(struct ath10k *ar, |
| 1364 | struct sk_buff *skb) |
| 1365 | { |
| 1366 | struct ath10k_htt *htt = &ar->htt; |
| 1367 | struct htt_resp *resp = (struct htt_resp *)skb->data; |
| 1368 | struct htt_tx_done tx_done = {}; |
| 1369 | int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS); |
| 1370 | __le16 msdu_id; |
| 1371 | int i; |
| 1372 | |
Michal Kazior | 4596708 | 2014-02-27 18:50:05 +0200 | [diff] [blame] | 1373 | lockdep_assert_held(&htt->tx_lock); |
| 1374 | |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 1375 | switch (status) { |
| 1376 | case HTT_DATA_TX_STATUS_NO_ACK: |
| 1377 | tx_done.no_ack = true; |
| 1378 | break; |
| 1379 | case HTT_DATA_TX_STATUS_OK: |
| 1380 | break; |
| 1381 | case HTT_DATA_TX_STATUS_DISCARD: |
| 1382 | case HTT_DATA_TX_STATUS_POSTPONE: |
| 1383 | case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL: |
| 1384 | tx_done.discard = true; |
| 1385 | break; |
| 1386 | default: |
| 1387 | ath10k_warn("unhandled tx completion status %d\n", status); |
| 1388 | tx_done.discard = true; |
| 1389 | break; |
| 1390 | } |
| 1391 | |
| 1392 | ath10k_dbg(ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n", |
| 1393 | resp->data_tx_completion.num_msdus); |
| 1394 | |
| 1395 | for (i = 0; i < resp->data_tx_completion.num_msdus; i++) { |
| 1396 | msdu_id = resp->data_tx_completion.msdus[i]; |
| 1397 | tx_done.msdu_id = __le16_to_cpu(msdu_id); |
| 1398 | ath10k_txrx_tx_unref(htt, &tx_done); |
| 1399 | } |
| 1400 | } |
| 1401 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1402 | void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb) |
| 1403 | { |
Michal Kazior | edb8236 | 2013-07-05 16:15:14 +0300 | [diff] [blame] | 1404 | struct ath10k_htt *htt = &ar->htt; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1405 | struct htt_resp *resp = (struct htt_resp *)skb->data; |
| 1406 | |
| 1407 | /* confirm alignment */ |
| 1408 | if (!IS_ALIGNED((unsigned long)skb->data, 4)) |
| 1409 | ath10k_warn("unaligned htt message, expect trouble\n"); |
| 1410 | |
Ben Greear | 75fb2f9 | 2014-02-05 13:58:34 -0800 | [diff] [blame] | 1411 | ath10k_dbg(ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n", |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1412 | resp->hdr.msg_type); |
| 1413 | switch (resp->hdr.msg_type) { |
| 1414 | case HTT_T2H_MSG_TYPE_VERSION_CONF: { |
| 1415 | htt->target_version_major = resp->ver_resp.major; |
| 1416 | htt->target_version_minor = resp->ver_resp.minor; |
| 1417 | complete(&htt->target_version_received); |
| 1418 | break; |
| 1419 | } |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 1420 | case HTT_T2H_MSG_TYPE_RX_IND: |
Michal Kazior | 4596708 | 2014-02-27 18:50:05 +0200 | [diff] [blame] | 1421 | spin_lock_bh(&htt->rx_ring.lock); |
| 1422 | __skb_queue_tail(&htt->rx_compl_q, skb); |
| 1423 | spin_unlock_bh(&htt->rx_ring.lock); |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 1424 | tasklet_schedule(&htt->txrx_compl_task); |
| 1425 | return; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1426 | case HTT_T2H_MSG_TYPE_PEER_MAP: { |
| 1427 | struct htt_peer_map_event ev = { |
| 1428 | .vdev_id = resp->peer_map.vdev_id, |
| 1429 | .peer_id = __le16_to_cpu(resp->peer_map.peer_id), |
| 1430 | }; |
| 1431 | memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr)); |
| 1432 | ath10k_peer_map_event(htt, &ev); |
| 1433 | break; |
| 1434 | } |
| 1435 | case HTT_T2H_MSG_TYPE_PEER_UNMAP: { |
| 1436 | struct htt_peer_unmap_event ev = { |
| 1437 | .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id), |
| 1438 | }; |
| 1439 | ath10k_peer_unmap_event(htt, &ev); |
| 1440 | break; |
| 1441 | } |
| 1442 | case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: { |
| 1443 | struct htt_tx_done tx_done = {}; |
| 1444 | int status = __le32_to_cpu(resp->mgmt_tx_completion.status); |
| 1445 | |
| 1446 | tx_done.msdu_id = |
| 1447 | __le32_to_cpu(resp->mgmt_tx_completion.desc_id); |
| 1448 | |
| 1449 | switch (status) { |
| 1450 | case HTT_MGMT_TX_STATUS_OK: |
| 1451 | break; |
| 1452 | case HTT_MGMT_TX_STATUS_RETRY: |
| 1453 | tx_done.no_ack = true; |
| 1454 | break; |
| 1455 | case HTT_MGMT_TX_STATUS_DROP: |
| 1456 | tx_done.discard = true; |
| 1457 | break; |
| 1458 | } |
| 1459 | |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 1460 | spin_lock_bh(&htt->tx_lock); |
Michal Kazior | 0a89f8a | 2013-09-18 14:43:20 +0200 | [diff] [blame] | 1461 | ath10k_txrx_tx_unref(htt, &tx_done); |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 1462 | spin_unlock_bh(&htt->tx_lock); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1463 | break; |
| 1464 | } |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 1465 | case HTT_T2H_MSG_TYPE_TX_COMPL_IND: |
| 1466 | spin_lock_bh(&htt->tx_lock); |
| 1467 | __skb_queue_tail(&htt->tx_compl_q, skb); |
| 1468 | spin_unlock_bh(&htt->tx_lock); |
| 1469 | tasklet_schedule(&htt->txrx_compl_task); |
| 1470 | return; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1471 | case HTT_T2H_MSG_TYPE_SEC_IND: { |
| 1472 | struct ath10k *ar = htt->ar; |
| 1473 | struct htt_security_indication *ev = &resp->security_indication; |
| 1474 | |
| 1475 | ath10k_dbg(ATH10K_DBG_HTT, |
| 1476 | "sec ind peer_id %d unicast %d type %d\n", |
| 1477 | __le16_to_cpu(ev->peer_id), |
| 1478 | !!(ev->flags & HTT_SECURITY_IS_UNICAST), |
| 1479 | MS(ev->flags, HTT_SECURITY_TYPE)); |
| 1480 | complete(&ar->install_key_done); |
| 1481 | break; |
| 1482 | } |
| 1483 | case HTT_T2H_MSG_TYPE_RX_FRAG_IND: { |
| 1484 | ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt event: ", |
| 1485 | skb->data, skb->len); |
| 1486 | ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind); |
| 1487 | break; |
| 1488 | } |
| 1489 | case HTT_T2H_MSG_TYPE_TEST: |
| 1490 | /* FIX THIS */ |
| 1491 | break; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1492 | case HTT_T2H_MSG_TYPE_STATS_CONF: |
Kalle Valo | a9bf050 | 2013-09-03 11:43:55 +0300 | [diff] [blame] | 1493 | trace_ath10k_htt_stats(skb->data, skb->len); |
| 1494 | break; |
| 1495 | case HTT_T2H_MSG_TYPE_TX_INSPECT_IND: |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1496 | case HTT_T2H_MSG_TYPE_RX_ADDBA: |
| 1497 | case HTT_T2H_MSG_TYPE_RX_DELBA: |
| 1498 | case HTT_T2H_MSG_TYPE_RX_FLUSH: |
| 1499 | default: |
| 1500 | ath10k_dbg(ATH10K_DBG_HTT, "htt event (%d) not handled\n", |
| 1501 | resp->hdr.msg_type); |
| 1502 | ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt event: ", |
| 1503 | skb->data, skb->len); |
| 1504 | break; |
| 1505 | }; |
| 1506 | |
| 1507 | /* Free the indication buffer */ |
| 1508 | dev_kfree_skb_any(skb); |
| 1509 | } |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 1510 | |
| 1511 | static void ath10k_htt_txrx_compl_task(unsigned long ptr) |
| 1512 | { |
| 1513 | struct ath10k_htt *htt = (struct ath10k_htt *)ptr; |
| 1514 | struct htt_resp *resp; |
| 1515 | struct sk_buff *skb; |
| 1516 | |
Michal Kazior | 4596708 | 2014-02-27 18:50:05 +0200 | [diff] [blame] | 1517 | spin_lock_bh(&htt->tx_lock); |
| 1518 | while ((skb = __skb_dequeue(&htt->tx_compl_q))) { |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 1519 | ath10k_htt_rx_frm_tx_compl(htt->ar, skb); |
| 1520 | dev_kfree_skb_any(skb); |
| 1521 | } |
Michal Kazior | 4596708 | 2014-02-27 18:50:05 +0200 | [diff] [blame] | 1522 | spin_unlock_bh(&htt->tx_lock); |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 1523 | |
Michal Kazior | 4596708 | 2014-02-27 18:50:05 +0200 | [diff] [blame] | 1524 | spin_lock_bh(&htt->rx_ring.lock); |
| 1525 | while ((skb = __skb_dequeue(&htt->rx_compl_q))) { |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 1526 | resp = (struct htt_resp *)skb->data; |
| 1527 | ath10k_htt_rx_handler(htt, &resp->rx_ind); |
| 1528 | dev_kfree_skb_any(skb); |
| 1529 | } |
Michal Kazior | 4596708 | 2014-02-27 18:50:05 +0200 | [diff] [blame] | 1530 | spin_unlock_bh(&htt->rx_ring.lock); |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 1531 | } |