Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2012 Freescale Semiconductor, Inc. |
| 3 | * |
Viresh Kumar | 748c876 | 2014-08-28 11:22:24 +0530 | [diff] [blame] | 4 | * Copyright (C) 2014 Linaro. |
| 5 | * Viresh Kumar <viresh.kumar@linaro.org> |
| 6 | * |
Viresh Kumar | bbcf071 | 2014-09-09 19:58:03 +0530 | [diff] [blame] | 7 | * The OPP code in function set_target() is reused from |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 8 | * drivers/cpufreq/omap-cpufreq.c |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License version 2 as |
| 12 | * published by the Free Software Foundation. |
| 13 | */ |
| 14 | |
| 15 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 16 | |
| 17 | #include <linux/clk.h> |
Sudeep KarkadaNagesha | e1825b2 | 2013-09-10 18:59:46 +0100 | [diff] [blame] | 18 | #include <linux/cpu.h> |
Eduardo Valentin | 77cff59 | 2013-07-15 09:09:14 -0400 | [diff] [blame] | 19 | #include <linux/cpu_cooling.h> |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 20 | #include <linux/cpufreq.h> |
Thomas Petazzoni | 34e5a52 | 2014-10-19 11:30:28 +0200 | [diff] [blame] | 21 | #include <linux/cpufreq-dt.h> |
Eduardo Valentin | 77cff59 | 2013-07-15 09:09:14 -0400 | [diff] [blame] | 22 | #include <linux/cpumask.h> |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 23 | #include <linux/err.h> |
| 24 | #include <linux/module.h> |
| 25 | #include <linux/of.h> |
Nishanth Menon | e4db1c7 | 2013-09-19 16:03:52 -0500 | [diff] [blame] | 26 | #include <linux/pm_opp.h> |
Shawn Guo | 5553f9e | 2013-01-30 14:27:49 +0000 | [diff] [blame] | 27 | #include <linux/platform_device.h> |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 28 | #include <linux/regulator/consumer.h> |
| 29 | #include <linux/slab.h> |
Eduardo Valentin | 77cff59 | 2013-07-15 09:09:14 -0400 | [diff] [blame] | 30 | #include <linux/thermal.h> |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 31 | |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 32 | struct private_data { |
| 33 | struct device *cpu_dev; |
| 34 | struct regulator *cpu_reg; |
| 35 | struct thermal_cooling_device *cdev; |
| 36 | unsigned int voltage_tolerance; /* in percentage */ |
| 37 | }; |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 38 | |
Bartlomiej Zolnierkiewicz | 21c36d3 | 2015-08-07 13:59:16 +0200 | [diff] [blame] | 39 | static struct freq_attr *cpufreq_dt_attr[] = { |
| 40 | &cpufreq_freq_attr_scaling_available_freqs, |
| 41 | NULL, /* Extra space for boost-attr if required */ |
| 42 | NULL, |
| 43 | }; |
| 44 | |
Viresh Kumar | bbcf071 | 2014-09-09 19:58:03 +0530 | [diff] [blame] | 45 | static int set_target(struct cpufreq_policy *policy, unsigned int index) |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 46 | { |
Nishanth Menon | 47d43ba | 2013-09-19 16:03:51 -0500 | [diff] [blame] | 47 | struct dev_pm_opp *opp; |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 48 | struct cpufreq_frequency_table *freq_table = policy->freq_table; |
| 49 | struct clk *cpu_clk = policy->clk; |
| 50 | struct private_data *priv = policy->driver_data; |
| 51 | struct device *cpu_dev = priv->cpu_dev; |
| 52 | struct regulator *cpu_reg = priv->cpu_reg; |
jhbird.choi@samsung.com | 5df6055 | 2013-03-18 08:09:42 +0000 | [diff] [blame] | 53 | unsigned long volt = 0, volt_old = 0, tol = 0; |
Viresh Kumar | d4019f0 | 2013-08-14 19:38:24 +0530 | [diff] [blame] | 54 | unsigned int old_freq, new_freq; |
Guennadi Liakhovetski | 0ca6843 | 2013-02-25 18:22:37 +0100 | [diff] [blame] | 55 | long freq_Hz, freq_exact; |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 56 | int ret; |
| 57 | |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 58 | freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000); |
Paul Walmsley | 2209b0c | 2013-11-25 18:01:18 -0800 | [diff] [blame] | 59 | if (freq_Hz <= 0) |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 60 | freq_Hz = freq_table[index].frequency * 1000; |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 61 | |
Viresh Kumar | d4019f0 | 2013-08-14 19:38:24 +0530 | [diff] [blame] | 62 | freq_exact = freq_Hz; |
| 63 | new_freq = freq_Hz / 1000; |
| 64 | old_freq = clk_get_rate(cpu_clk) / 1000; |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 65 | |
Mark Brown | 4a511de | 2013-08-13 14:58:24 +0200 | [diff] [blame] | 66 | if (!IS_ERR(cpu_reg)) { |
Stefan Wahren | 0a1e879 | 2014-10-17 22:09:48 +0000 | [diff] [blame] | 67 | unsigned long opp_freq; |
| 68 | |
Nishanth Menon | 78e8eb8 | 2013-01-18 19:52:33 +0000 | [diff] [blame] | 69 | rcu_read_lock(); |
Nishanth Menon | 5d4879c | 2013-09-19 16:03:50 -0500 | [diff] [blame] | 70 | opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_Hz); |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 71 | if (IS_ERR(opp)) { |
Nishanth Menon | 78e8eb8 | 2013-01-18 19:52:33 +0000 | [diff] [blame] | 72 | rcu_read_unlock(); |
Viresh Kumar | fbd48ca | 2014-08-28 11:22:27 +0530 | [diff] [blame] | 73 | dev_err(cpu_dev, "failed to find OPP for %ld\n", |
| 74 | freq_Hz); |
Viresh Kumar | d4019f0 | 2013-08-14 19:38:24 +0530 | [diff] [blame] | 75 | return PTR_ERR(opp); |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 76 | } |
Nishanth Menon | 5d4879c | 2013-09-19 16:03:50 -0500 | [diff] [blame] | 77 | volt = dev_pm_opp_get_voltage(opp); |
Stefan Wahren | 0a1e879 | 2014-10-17 22:09:48 +0000 | [diff] [blame] | 78 | opp_freq = dev_pm_opp_get_freq(opp); |
Nishanth Menon | 78e8eb8 | 2013-01-18 19:52:33 +0000 | [diff] [blame] | 79 | rcu_read_unlock(); |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 80 | tol = volt * priv->voltage_tolerance / 100; |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 81 | volt_old = regulator_get_voltage(cpu_reg); |
Stefan Wahren | 0a1e879 | 2014-10-17 22:09:48 +0000 | [diff] [blame] | 82 | dev_dbg(cpu_dev, "Found OPP: %ld kHz, %ld uV\n", |
| 83 | opp_freq / 1000, volt); |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 84 | } |
| 85 | |
Viresh Kumar | fbd48ca | 2014-08-28 11:22:27 +0530 | [diff] [blame] | 86 | dev_dbg(cpu_dev, "%u MHz, %ld mV --> %u MHz, %ld mV\n", |
Stefan Wahren | 8197bb1 | 2014-10-17 22:09:49 +0000 | [diff] [blame] | 87 | old_freq / 1000, (volt_old > 0) ? volt_old / 1000 : -1, |
Viresh Kumar | fbd48ca | 2014-08-28 11:22:27 +0530 | [diff] [blame] | 88 | new_freq / 1000, volt ? volt / 1000 : -1); |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 89 | |
| 90 | /* scaling up? scale voltage before frequency */ |
Viresh Kumar | d4019f0 | 2013-08-14 19:38:24 +0530 | [diff] [blame] | 91 | if (!IS_ERR(cpu_reg) && new_freq > old_freq) { |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 92 | ret = regulator_set_voltage_tol(cpu_reg, volt, tol); |
| 93 | if (ret) { |
Viresh Kumar | fbd48ca | 2014-08-28 11:22:27 +0530 | [diff] [blame] | 94 | dev_err(cpu_dev, "failed to scale voltage up: %d\n", |
| 95 | ret); |
Viresh Kumar | d4019f0 | 2013-08-14 19:38:24 +0530 | [diff] [blame] | 96 | return ret; |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 97 | } |
| 98 | } |
| 99 | |
Guennadi Liakhovetski | 0ca6843 | 2013-02-25 18:22:37 +0100 | [diff] [blame] | 100 | ret = clk_set_rate(cpu_clk, freq_exact); |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 101 | if (ret) { |
Viresh Kumar | fbd48ca | 2014-08-28 11:22:27 +0530 | [diff] [blame] | 102 | dev_err(cpu_dev, "failed to set clock rate: %d\n", ret); |
Stefan Wahren | 8197bb1 | 2014-10-17 22:09:49 +0000 | [diff] [blame] | 103 | if (!IS_ERR(cpu_reg) && volt_old > 0) |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 104 | regulator_set_voltage_tol(cpu_reg, volt_old, tol); |
Viresh Kumar | d4019f0 | 2013-08-14 19:38:24 +0530 | [diff] [blame] | 105 | return ret; |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 106 | } |
| 107 | |
| 108 | /* scaling down? scale voltage after frequency */ |
Viresh Kumar | d4019f0 | 2013-08-14 19:38:24 +0530 | [diff] [blame] | 109 | if (!IS_ERR(cpu_reg) && new_freq < old_freq) { |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 110 | ret = regulator_set_voltage_tol(cpu_reg, volt, tol); |
| 111 | if (ret) { |
Viresh Kumar | fbd48ca | 2014-08-28 11:22:27 +0530 | [diff] [blame] | 112 | dev_err(cpu_dev, "failed to scale voltage down: %d\n", |
| 113 | ret); |
Viresh Kumar | d4019f0 | 2013-08-14 19:38:24 +0530 | [diff] [blame] | 114 | clk_set_rate(cpu_clk, old_freq * 1000); |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 115 | } |
| 116 | } |
| 117 | |
Viresh Kumar | fd143b4 | 2013-04-01 12:57:44 +0000 | [diff] [blame] | 118 | return ret; |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 119 | } |
| 120 | |
Viresh Kumar | 95b6105 | 2014-08-28 11:22:30 +0530 | [diff] [blame] | 121 | static int allocate_resources(int cpu, struct device **cdev, |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 122 | struct regulator **creg, struct clk **cclk) |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 123 | { |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 124 | struct device *cpu_dev; |
| 125 | struct regulator *cpu_reg; |
| 126 | struct clk *cpu_clk; |
| 127 | int ret = 0; |
Viresh Kumar | 2d2c5e0 | 2014-08-28 11:22:29 +0530 | [diff] [blame] | 128 | char *reg_cpu0 = "cpu0", *reg_cpu = "cpu", *reg; |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 129 | |
Viresh Kumar | 95b6105 | 2014-08-28 11:22:30 +0530 | [diff] [blame] | 130 | cpu_dev = get_cpu_device(cpu); |
Sudeep KarkadaNagesha | e1825b2 | 2013-09-10 18:59:46 +0100 | [diff] [blame] | 131 | if (!cpu_dev) { |
Viresh Kumar | 95b6105 | 2014-08-28 11:22:30 +0530 | [diff] [blame] | 132 | pr_err("failed to get cpu%d device\n", cpu); |
Sudeep KarkadaNagesha | e1825b2 | 2013-09-10 18:59:46 +0100 | [diff] [blame] | 133 | return -ENODEV; |
| 134 | } |
Paolo Pisati | f5c3ef2 | 2013-03-28 09:24:29 +0000 | [diff] [blame] | 135 | |
Viresh Kumar | 2d2c5e0 | 2014-08-28 11:22:29 +0530 | [diff] [blame] | 136 | /* Try "cpu0" for older DTs */ |
Viresh Kumar | 95b6105 | 2014-08-28 11:22:30 +0530 | [diff] [blame] | 137 | if (!cpu) |
| 138 | reg = reg_cpu0; |
| 139 | else |
| 140 | reg = reg_cpu; |
Viresh Kumar | 2d2c5e0 | 2014-08-28 11:22:29 +0530 | [diff] [blame] | 141 | |
| 142 | try_again: |
| 143 | cpu_reg = regulator_get_optional(cpu_dev, reg); |
Nishanth Menon | fc31d6f | 2013-05-01 13:38:12 +0000 | [diff] [blame] | 144 | if (IS_ERR(cpu_reg)) { |
| 145 | /* |
Viresh Kumar | 95b6105 | 2014-08-28 11:22:30 +0530 | [diff] [blame] | 146 | * If cpu's regulator supply node is present, but regulator is |
Nishanth Menon | fc31d6f | 2013-05-01 13:38:12 +0000 | [diff] [blame] | 147 | * not yet registered, we should try defering probe. |
| 148 | */ |
| 149 | if (PTR_ERR(cpu_reg) == -EPROBE_DEFER) { |
Viresh Kumar | 95b6105 | 2014-08-28 11:22:30 +0530 | [diff] [blame] | 150 | dev_dbg(cpu_dev, "cpu%d regulator not ready, retry\n", |
| 151 | cpu); |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 152 | return -EPROBE_DEFER; |
Nishanth Menon | fc31d6f | 2013-05-01 13:38:12 +0000 | [diff] [blame] | 153 | } |
Viresh Kumar | 2d2c5e0 | 2014-08-28 11:22:29 +0530 | [diff] [blame] | 154 | |
| 155 | /* Try with "cpu-supply" */ |
| 156 | if (reg == reg_cpu0) { |
| 157 | reg = reg_cpu; |
| 158 | goto try_again; |
| 159 | } |
| 160 | |
Thomas Petazzoni | a00de1a | 2014-10-19 11:30:29 +0200 | [diff] [blame] | 161 | dev_dbg(cpu_dev, "no regulator for cpu%d: %ld\n", |
| 162 | cpu, PTR_ERR(cpu_reg)); |
Nishanth Menon | fc31d6f | 2013-05-01 13:38:12 +0000 | [diff] [blame] | 163 | } |
| 164 | |
Lucas Stach | e3beb0a | 2014-05-16 12:20:42 +0200 | [diff] [blame] | 165 | cpu_clk = clk_get(cpu_dev, NULL); |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 166 | if (IS_ERR(cpu_clk)) { |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 167 | /* put regulator */ |
| 168 | if (!IS_ERR(cpu_reg)) |
| 169 | regulator_put(cpu_reg); |
| 170 | |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 171 | ret = PTR_ERR(cpu_clk); |
Viresh Kumar | 48a8624 | 2014-08-28 11:22:26 +0530 | [diff] [blame] | 172 | |
| 173 | /* |
| 174 | * If cpu's clk node is present, but clock is not yet |
| 175 | * registered, we should try defering probe. |
| 176 | */ |
| 177 | if (ret == -EPROBE_DEFER) |
Viresh Kumar | 95b6105 | 2014-08-28 11:22:30 +0530 | [diff] [blame] | 178 | dev_dbg(cpu_dev, "cpu%d clock not ready, retry\n", cpu); |
Viresh Kumar | 48a8624 | 2014-08-28 11:22:26 +0530 | [diff] [blame] | 179 | else |
Abhilash Kesavan | 7179621 | 2014-10-31 18:09:33 +0530 | [diff] [blame] | 180 | dev_err(cpu_dev, "failed to get cpu%d clock: %d\n", cpu, |
| 181 | ret); |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 182 | } else { |
| 183 | *cdev = cpu_dev; |
| 184 | *creg = cpu_reg; |
| 185 | *cclk = cpu_clk; |
| 186 | } |
Viresh Kumar | 48a8624 | 2014-08-28 11:22:26 +0530 | [diff] [blame] | 187 | |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 188 | return ret; |
| 189 | } |
| 190 | |
Viresh Kumar | bbcf071 | 2014-09-09 19:58:03 +0530 | [diff] [blame] | 191 | static int cpufreq_init(struct cpufreq_policy *policy) |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 192 | { |
| 193 | struct cpufreq_frequency_table *freq_table; |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 194 | struct device_node *np; |
| 195 | struct private_data *priv; |
| 196 | struct device *cpu_dev; |
| 197 | struct regulator *cpu_reg; |
| 198 | struct clk *cpu_clk; |
Lucas Stach | 045ee45 | 2014-10-24 15:05:55 +0200 | [diff] [blame] | 199 | unsigned long min_uV = ~0, max_uV = 0; |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 200 | unsigned int transition_latency; |
Viresh Kumar | 2e02d87 | 2015-07-29 16:23:10 +0530 | [diff] [blame] | 201 | bool need_update = false; |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 202 | int ret; |
| 203 | |
Viresh Kumar | 95b6105 | 2014-08-28 11:22:30 +0530 | [diff] [blame] | 204 | ret = allocate_resources(policy->cpu, &cpu_dev, &cpu_reg, &cpu_clk); |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 205 | if (ret) { |
Geert Uytterhoeven | edd52b1 | 2014-10-23 11:52:54 +0200 | [diff] [blame] | 206 | pr_err("%s: Failed to allocate resources: %d\n", __func__, ret); |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 207 | return ret; |
| 208 | } |
| 209 | |
| 210 | np = of_node_get(cpu_dev->of_node); |
| 211 | if (!np) { |
| 212 | dev_err(cpu_dev, "failed to find cpu%d node\n", policy->cpu); |
| 213 | ret = -ENOENT; |
| 214 | goto out_put_reg_clk; |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 215 | } |
| 216 | |
Viresh Kumar | 2e02d87 | 2015-07-29 16:23:10 +0530 | [diff] [blame] | 217 | /* Get OPP-sharing information from "operating-points-v2" bindings */ |
| 218 | ret = of_get_cpus_sharing_opps(cpu_dev, policy->cpus); |
| 219 | if (ret) { |
| 220 | /* |
| 221 | * operating-points-v2 not supported, fallback to old method of |
| 222 | * finding shared-OPPs for backward compatibility. |
| 223 | */ |
| 224 | if (ret == -ENOENT) |
| 225 | need_update = true; |
| 226 | else |
| 227 | goto out_node_put; |
| 228 | } |
| 229 | |
| 230 | /* |
| 231 | * Initialize OPP tables for all policy->cpus. They will be shared by |
| 232 | * all CPUs which have marked their CPUs shared with OPP bindings. |
| 233 | * |
| 234 | * For platforms not using operating-points-v2 bindings, we do this |
| 235 | * before updating policy->cpus. Otherwise, we will end up creating |
| 236 | * duplicate OPPs for policy->cpus. |
| 237 | * |
| 238 | * OPPs might be populated at runtime, don't check for error here |
| 239 | */ |
| 240 | of_cpumask_init_opp_table(policy->cpus); |
| 241 | |
Viresh Kumar | 7d5d0c8 | 2015-09-02 14:36:48 +0530 | [diff] [blame] | 242 | /* |
| 243 | * But we need OPP table to function so if it is not there let's |
| 244 | * give platform code chance to provide it for us. |
| 245 | */ |
| 246 | ret = dev_pm_opp_get_opp_count(cpu_dev); |
| 247 | if (ret <= 0) { |
| 248 | pr_debug("OPP table is not ready, deferring probe\n"); |
| 249 | ret = -EPROBE_DEFER; |
| 250 | goto out_free_opp; |
| 251 | } |
| 252 | |
Viresh Kumar | 2e02d87 | 2015-07-29 16:23:10 +0530 | [diff] [blame] | 253 | if (need_update) { |
| 254 | struct cpufreq_dt_platform_data *pd = cpufreq_get_driver_data(); |
| 255 | |
| 256 | if (!pd || !pd->independent_clocks) |
| 257 | cpumask_setall(policy->cpus); |
| 258 | |
| 259 | /* |
| 260 | * OPP tables are initialized only for policy->cpu, do it for |
| 261 | * others as well. |
| 262 | */ |
Viresh Kumar | 8bc8628 | 2015-09-02 14:36:49 +0530 | [diff] [blame^] | 263 | ret = set_cpus_sharing_opps(cpu_dev, policy->cpus); |
| 264 | if (ret) |
| 265 | dev_err(cpu_dev, "%s: failed to mark OPPs as shared: %d\n", |
| 266 | __func__, ret); |
Viresh Kumar | 2e02d87 | 2015-07-29 16:23:10 +0530 | [diff] [blame] | 267 | |
| 268 | of_property_read_u32(np, "clock-latency", &transition_latency); |
| 269 | } else { |
| 270 | transition_latency = dev_pm_opp_get_max_clock_latency(cpu_dev); |
| 271 | } |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 272 | |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 273 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); |
| 274 | if (!priv) { |
| 275 | ret = -ENOMEM; |
Viresh Kumar | 2f0f609 | 2014-11-25 16:04:21 +0530 | [diff] [blame] | 276 | goto out_free_opp; |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 277 | } |
| 278 | |
| 279 | of_property_read_u32(np, "voltage-tolerance", &priv->voltage_tolerance); |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 280 | |
Viresh Kumar | 2e02d87 | 2015-07-29 16:23:10 +0530 | [diff] [blame] | 281 | if (!transition_latency) |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 282 | transition_latency = CPUFREQ_ETERNAL; |
| 283 | |
Philipp Zabel | 43c638e | 2013-09-26 11:19:37 +0200 | [diff] [blame] | 284 | if (!IS_ERR(cpu_reg)) { |
Lucas Stach | 045ee45 | 2014-10-24 15:05:55 +0200 | [diff] [blame] | 285 | unsigned long opp_freq = 0; |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 286 | |
| 287 | /* |
Lucas Stach | 045ee45 | 2014-10-24 15:05:55 +0200 | [diff] [blame] | 288 | * Disable any OPPs where the connected regulator isn't able to |
| 289 | * provide the specified voltage and record minimum and maximum |
| 290 | * voltage levels. |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 291 | */ |
Lucas Stach | 045ee45 | 2014-10-24 15:05:55 +0200 | [diff] [blame] | 292 | while (1) { |
| 293 | struct dev_pm_opp *opp; |
| 294 | unsigned long opp_uV, tol_uV; |
| 295 | |
| 296 | rcu_read_lock(); |
| 297 | opp = dev_pm_opp_find_freq_ceil(cpu_dev, &opp_freq); |
| 298 | if (IS_ERR(opp)) { |
| 299 | rcu_read_unlock(); |
| 300 | break; |
| 301 | } |
| 302 | opp_uV = dev_pm_opp_get_voltage(opp); |
| 303 | rcu_read_unlock(); |
| 304 | |
| 305 | tol_uV = opp_uV * priv->voltage_tolerance / 100; |
| 306 | if (regulator_is_supported_voltage(cpu_reg, opp_uV, |
| 307 | opp_uV + tol_uV)) { |
| 308 | if (opp_uV < min_uV) |
| 309 | min_uV = opp_uV; |
| 310 | if (opp_uV > max_uV) |
| 311 | max_uV = opp_uV; |
| 312 | } else { |
| 313 | dev_pm_opp_disable(cpu_dev, opp_freq); |
| 314 | } |
| 315 | |
| 316 | opp_freq++; |
| 317 | } |
| 318 | |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 319 | ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV); |
| 320 | if (ret > 0) |
| 321 | transition_latency += ret * 1000; |
| 322 | } |
| 323 | |
Lucas Stach | 045ee45 | 2014-10-24 15:05:55 +0200 | [diff] [blame] | 324 | ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table); |
| 325 | if (ret) { |
| 326 | pr_err("failed to init cpufreq table: %d\n", ret); |
| 327 | goto out_free_priv; |
| 328 | } |
| 329 | |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 330 | priv->cpu_dev = cpu_dev; |
| 331 | priv->cpu_reg = cpu_reg; |
| 332 | policy->driver_data = priv; |
| 333 | |
| 334 | policy->clk = cpu_clk; |
Thomas Petazzoni | 34e5a52 | 2014-10-19 11:30:28 +0200 | [diff] [blame] | 335 | ret = cpufreq_table_validate_and_show(policy, freq_table); |
| 336 | if (ret) { |
| 337 | dev_err(cpu_dev, "%s: invalid frequency table: %d\n", __func__, |
| 338 | ret); |
Viresh Kumar | 9a00442 | 2014-11-27 06:07:52 +0530 | [diff] [blame] | 339 | goto out_free_cpufreq_table; |
Thomas Petazzoni | 34e5a52 | 2014-10-19 11:30:28 +0200 | [diff] [blame] | 340 | } |
| 341 | |
Viresh Kumar | d15fa86 | 2015-07-29 16:23:11 +0530 | [diff] [blame] | 342 | /* Support turbo/boost mode */ |
| 343 | if (policy_has_boost_freq(policy)) { |
| 344 | /* This gets disabled by core on driver unregister */ |
| 345 | ret = cpufreq_enable_boost_support(); |
| 346 | if (ret) |
| 347 | goto out_free_cpufreq_table; |
Bartlomiej Zolnierkiewicz | 21c36d3 | 2015-08-07 13:59:16 +0200 | [diff] [blame] | 348 | cpufreq_dt_attr[1] = &cpufreq_freq_attr_scaling_boost_freqs; |
Viresh Kumar | d15fa86 | 2015-07-29 16:23:11 +0530 | [diff] [blame] | 349 | } |
| 350 | |
Thomas Petazzoni | 34e5a52 | 2014-10-19 11:30:28 +0200 | [diff] [blame] | 351 | policy->cpuinfo.transition_latency = transition_latency; |
| 352 | |
Lucas Stach | f9739d2 | 2014-09-26 15:33:46 +0200 | [diff] [blame] | 353 | of_node_put(np); |
| 354 | |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 355 | return 0; |
| 356 | |
Viresh Kumar | 9a00442 | 2014-11-27 06:07:52 +0530 | [diff] [blame] | 357 | out_free_cpufreq_table: |
Nishanth Menon | 5d4879c | 2013-09-19 16:03:50 -0500 | [diff] [blame] | 358 | dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table); |
Lucas Stach | 045ee45 | 2014-10-24 15:05:55 +0200 | [diff] [blame] | 359 | out_free_priv: |
| 360 | kfree(priv); |
Viresh Kumar | 2f0f609 | 2014-11-25 16:04:21 +0530 | [diff] [blame] | 361 | out_free_opp: |
Viresh Kumar | 2e02d87 | 2015-07-29 16:23:10 +0530 | [diff] [blame] | 362 | of_cpumask_free_opp_table(policy->cpus); |
| 363 | out_node_put: |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 364 | of_node_put(np); |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 365 | out_put_reg_clk: |
| 366 | clk_put(cpu_clk); |
| 367 | if (!IS_ERR(cpu_reg)) |
| 368 | regulator_put(cpu_reg); |
| 369 | |
| 370 | return ret; |
| 371 | } |
| 372 | |
Viresh Kumar | bbcf071 | 2014-09-09 19:58:03 +0530 | [diff] [blame] | 373 | static int cpufreq_exit(struct cpufreq_policy *policy) |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 374 | { |
| 375 | struct private_data *priv = policy->driver_data; |
| 376 | |
Markus Elfring | 17ad13b | 2015-02-03 19:21:21 +0100 | [diff] [blame] | 377 | cpufreq_cooling_unregister(priv->cdev); |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 378 | dev_pm_opp_free_cpufreq_table(priv->cpu_dev, &policy->freq_table); |
Viresh Kumar | 2e02d87 | 2015-07-29 16:23:10 +0530 | [diff] [blame] | 379 | of_cpumask_free_opp_table(policy->related_cpus); |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 380 | clk_put(policy->clk); |
| 381 | if (!IS_ERR(priv->cpu_reg)) |
| 382 | regulator_put(priv->cpu_reg); |
| 383 | kfree(priv); |
| 384 | |
| 385 | return 0; |
| 386 | } |
| 387 | |
Viresh Kumar | 9a00442 | 2014-11-27 06:07:52 +0530 | [diff] [blame] | 388 | static void cpufreq_ready(struct cpufreq_policy *policy) |
| 389 | { |
| 390 | struct private_data *priv = policy->driver_data; |
| 391 | struct device_node *np = of_node_get(priv->cpu_dev->of_node); |
| 392 | |
| 393 | if (WARN_ON(!np)) |
| 394 | return; |
| 395 | |
| 396 | /* |
| 397 | * For now, just loading the cooling device; |
| 398 | * thermal DT code takes care of matching them. |
| 399 | */ |
| 400 | if (of_find_property(np, "#cooling-cells", NULL)) { |
| 401 | priv->cdev = of_cpufreq_cooling_register(np, |
| 402 | policy->related_cpus); |
| 403 | if (IS_ERR(priv->cdev)) { |
| 404 | dev_err(priv->cpu_dev, |
| 405 | "running cpufreq without cooling device: %ld\n", |
| 406 | PTR_ERR(priv->cdev)); |
| 407 | |
| 408 | priv->cdev = NULL; |
| 409 | } |
| 410 | } |
| 411 | |
| 412 | of_node_put(np); |
| 413 | } |
| 414 | |
Viresh Kumar | bbcf071 | 2014-09-09 19:58:03 +0530 | [diff] [blame] | 415 | static struct cpufreq_driver dt_cpufreq_driver = { |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 416 | .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK, |
| 417 | .verify = cpufreq_generic_frequency_table_verify, |
Viresh Kumar | bbcf071 | 2014-09-09 19:58:03 +0530 | [diff] [blame] | 418 | .target_index = set_target, |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 419 | .get = cpufreq_generic_get, |
Viresh Kumar | bbcf071 | 2014-09-09 19:58:03 +0530 | [diff] [blame] | 420 | .init = cpufreq_init, |
| 421 | .exit = cpufreq_exit, |
Viresh Kumar | 9a00442 | 2014-11-27 06:07:52 +0530 | [diff] [blame] | 422 | .ready = cpufreq_ready, |
Viresh Kumar | bbcf071 | 2014-09-09 19:58:03 +0530 | [diff] [blame] | 423 | .name = "cpufreq-dt", |
Bartlomiej Zolnierkiewicz | 21c36d3 | 2015-08-07 13:59:16 +0200 | [diff] [blame] | 424 | .attr = cpufreq_dt_attr, |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 425 | }; |
| 426 | |
Viresh Kumar | bbcf071 | 2014-09-09 19:58:03 +0530 | [diff] [blame] | 427 | static int dt_cpufreq_probe(struct platform_device *pdev) |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 428 | { |
| 429 | struct device *cpu_dev; |
| 430 | struct regulator *cpu_reg; |
| 431 | struct clk *cpu_clk; |
| 432 | int ret; |
| 433 | |
| 434 | /* |
| 435 | * All per-cluster (CPUs sharing clock/voltages) initialization is done |
| 436 | * from ->init(). In probe(), we just need to make sure that clk and |
| 437 | * regulators are available. Else defer probe and retry. |
| 438 | * |
| 439 | * FIXME: Is checking this only for CPU0 sufficient ? |
| 440 | */ |
Viresh Kumar | 95b6105 | 2014-08-28 11:22:30 +0530 | [diff] [blame] | 441 | ret = allocate_resources(0, &cpu_dev, &cpu_reg, &cpu_clk); |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 442 | if (ret) |
| 443 | return ret; |
| 444 | |
| 445 | clk_put(cpu_clk); |
| 446 | if (!IS_ERR(cpu_reg)) |
| 447 | regulator_put(cpu_reg); |
| 448 | |
Thomas Petazzoni | 34e5a52 | 2014-10-19 11:30:28 +0200 | [diff] [blame] | 449 | dt_cpufreq_driver.driver_data = dev_get_platdata(&pdev->dev); |
| 450 | |
Viresh Kumar | bbcf071 | 2014-09-09 19:58:03 +0530 | [diff] [blame] | 451 | ret = cpufreq_register_driver(&dt_cpufreq_driver); |
Viresh Kumar | d2f31f1 | 2014-08-28 11:22:28 +0530 | [diff] [blame] | 452 | if (ret) |
| 453 | dev_err(cpu_dev, "failed register driver: %d\n", ret); |
| 454 | |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 455 | return ret; |
| 456 | } |
Shawn Guo | 5553f9e | 2013-01-30 14:27:49 +0000 | [diff] [blame] | 457 | |
Viresh Kumar | bbcf071 | 2014-09-09 19:58:03 +0530 | [diff] [blame] | 458 | static int dt_cpufreq_remove(struct platform_device *pdev) |
Shawn Guo | 5553f9e | 2013-01-30 14:27:49 +0000 | [diff] [blame] | 459 | { |
Viresh Kumar | bbcf071 | 2014-09-09 19:58:03 +0530 | [diff] [blame] | 460 | cpufreq_unregister_driver(&dt_cpufreq_driver); |
Shawn Guo | 5553f9e | 2013-01-30 14:27:49 +0000 | [diff] [blame] | 461 | return 0; |
| 462 | } |
| 463 | |
Viresh Kumar | bbcf071 | 2014-09-09 19:58:03 +0530 | [diff] [blame] | 464 | static struct platform_driver dt_cpufreq_platdrv = { |
Shawn Guo | 5553f9e | 2013-01-30 14:27:49 +0000 | [diff] [blame] | 465 | .driver = { |
Viresh Kumar | bbcf071 | 2014-09-09 19:58:03 +0530 | [diff] [blame] | 466 | .name = "cpufreq-dt", |
Shawn Guo | 5553f9e | 2013-01-30 14:27:49 +0000 | [diff] [blame] | 467 | }, |
Viresh Kumar | bbcf071 | 2014-09-09 19:58:03 +0530 | [diff] [blame] | 468 | .probe = dt_cpufreq_probe, |
| 469 | .remove = dt_cpufreq_remove, |
Shawn Guo | 5553f9e | 2013-01-30 14:27:49 +0000 | [diff] [blame] | 470 | }; |
Viresh Kumar | bbcf071 | 2014-09-09 19:58:03 +0530 | [diff] [blame] | 471 | module_platform_driver(dt_cpufreq_platdrv); |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 472 | |
Felipe Balbi | 07949bf | 2015-05-08 14:57:30 -0500 | [diff] [blame] | 473 | MODULE_ALIAS("platform:cpufreq-dt"); |
Viresh Kumar | 748c876 | 2014-08-28 11:22:24 +0530 | [diff] [blame] | 474 | MODULE_AUTHOR("Viresh Kumar <viresh.kumar@linaro.org>"); |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 475 | MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>"); |
Viresh Kumar | bbcf071 | 2014-09-09 19:58:03 +0530 | [diff] [blame] | 476 | MODULE_DESCRIPTION("Generic cpufreq driver"); |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 477 | MODULE_LICENSE("GPL"); |