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Zou Nan hai8187a2b2010-05-21 09:08:55 +08001#ifndef _INTEL_RINGBUFFER_H_
2#define _INTEL_RINGBUFFER_H_
3
4struct intel_hw_status_page {
5 void *page_addr;
6 unsigned int gfx_addr;
7 struct drm_gem_object *obj;
8};
9
Daniel Vetter870e86d2010-08-02 16:29:44 +020010#define I915_READ_TAIL(ring) I915_READ(RING_TAIL(ring->mmio_base))
11#define I915_WRITE_TAIL(ring, val) I915_WRITE(RING_TAIL(ring->mmio_base), val)
Daniel Vetter6c0e1c52010-08-02 16:33:33 +020012#define I915_READ_START(ring) I915_READ(RING_START(ring->mmio_base))
13#define I915_WRITE_START(ring, val) I915_WRITE(RING_START(ring->mmio_base), val)
Daniel Vetter570ef602010-08-02 17:06:23 +020014#define I915_READ_HEAD(ring) I915_READ(RING_HEAD(ring->mmio_base))
15#define I915_WRITE_HEAD(ring, val) I915_WRITE(RING_HEAD(ring->mmio_base), val)
Daniel Vetter7f2ab692010-08-02 17:06:59 +020016#define I915_READ_CTL(ring) I915_READ(RING_CTL(ring->mmio_base))
17#define I915_WRITE_CTL(ring, val) I915_WRITE(RING_CTL(ring->mmio_base), val)
Daniel Vetter870e86d2010-08-02 16:29:44 +020018
Zou Nan hai8187a2b2010-05-21 09:08:55 +080019struct drm_i915_gem_execbuffer2;
20struct intel_ring_buffer {
21 const char *name;
Chris Wilson92204342010-09-18 11:02:01 +010022 enum intel_ring_id {
23 RING_RENDER = 0x1,
24 RING_BSD = 0x2,
Chris Wilson549f7362010-10-19 11:19:32 +010025 RING_BLT = 0x4,
Chris Wilson92204342010-09-18 11:02:01 +010026 } id;
Daniel Vetter333e9fe2010-08-02 16:24:01 +020027 u32 mmio_base;
Zou Nan hai8187a2b2010-05-21 09:08:55 +080028 unsigned long size;
Zou Nan hai8187a2b2010-05-21 09:08:55 +080029 void *virtual_start;
30 struct drm_device *dev;
31 struct drm_gem_object *gem_object;
32
Chris Wilson8c0a6bf2010-12-09 12:56:37 +000033 u32 actual_head;
34 u32 head;
35 u32 tail;
Chris Wilson780f0ca2010-09-23 17:45:39 +010036 int space;
Zou Nan hai8187a2b2010-05-21 09:08:55 +080037 struct intel_hw_status_page status_page;
38
39 u32 irq_gem_seqno; /* last seq seem at irq time */
40 u32 waiting_gem_seqno;
41 int user_irq_refcount;
42 void (*user_irq_get)(struct drm_device *dev,
43 struct intel_ring_buffer *ring);
44 void (*user_irq_put)(struct drm_device *dev,
45 struct intel_ring_buffer *ring);
Zou Nan hai8187a2b2010-05-21 09:08:55 +080046
47 int (*init)(struct drm_device *dev,
48 struct intel_ring_buffer *ring);
49
Chris Wilson297b0c52010-10-22 17:02:41 +010050 void (*write_tail)(struct drm_device *dev,
51 struct intel_ring_buffer *ring,
52 u32 value);
Zou Nan hai8187a2b2010-05-21 09:08:55 +080053 void (*flush)(struct drm_device *dev,
54 struct intel_ring_buffer *ring,
55 u32 invalidate_domains,
56 u32 flush_domains);
57 u32 (*add_request)(struct drm_device *dev,
58 struct intel_ring_buffer *ring,
Zou Nan hai8187a2b2010-05-21 09:08:55 +080059 u32 flush_domains);
Chris Wilsonf787a5f2010-09-24 16:02:42 +010060 u32 (*get_seqno)(struct drm_device *dev,
61 struct intel_ring_buffer *ring);
Zou Nan hai8187a2b2010-05-21 09:08:55 +080062 int (*dispatch_gem_execbuffer)(struct drm_device *dev,
63 struct intel_ring_buffer *ring,
64 struct drm_i915_gem_execbuffer2 *exec,
65 struct drm_clip_rect *cliprects,
66 uint64_t exec_offset);
Chris Wilson55889782010-11-02 10:38:58 +000067 void (*cleanup)(struct intel_ring_buffer *ring);
Zou Nan hai8187a2b2010-05-21 09:08:55 +080068
69 /**
70 * List of objects currently involved in rendering from the
71 * ringbuffer.
72 *
73 * Includes buffers having the contents of their GPU caches
74 * flushed, not necessarily primitives. last_rendering_seqno
75 * represents when the rendering involved will be completed.
76 *
77 * A reference is held on the buffer while on this list.
78 */
79 struct list_head active_list;
80
81 /**
82 * List of breadcrumbs associated with GPU requests currently
83 * outstanding.
84 */
85 struct list_head request_list;
86
Chris Wilsona56ba562010-09-28 10:07:56 +010087 /**
Chris Wilson64193402010-10-24 12:38:05 +010088 * List of objects currently pending a GPU write flush.
89 *
90 * All elements on this list will belong to either the
91 * active_list or flushing_list, last_rendering_seqno can
92 * be used to differentiate between the two elements.
93 */
94 struct list_head gpu_write_list;
95
96 /**
Chris Wilsona56ba562010-09-28 10:07:56 +010097 * Do we have some not yet emitted requests outstanding?
98 */
99 bool outstanding_lazy_request;
100
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800101 wait_queue_head_t irq_queue;
102 drm_local_map_t map;
Chris Wilson55889782010-11-02 10:38:58 +0000103
104 void *private;
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800105};
106
107static inline u32
108intel_read_status_page(struct intel_ring_buffer *ring,
109 int reg)
110{
111 u32 *regs = ring->status_page.page_addr;
112 return regs[reg];
113}
114
115int intel_init_ring_buffer(struct drm_device *dev,
Chris Wilsonab6f8e32010-09-19 17:53:44 +0100116 struct intel_ring_buffer *ring);
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800117void intel_cleanup_ring_buffer(struct drm_device *dev,
Chris Wilsonab6f8e32010-09-19 17:53:44 +0100118 struct intel_ring_buffer *ring);
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800119int intel_wait_ring_buffer(struct drm_device *dev,
Chris Wilsonab6f8e32010-09-19 17:53:44 +0100120 struct intel_ring_buffer *ring, int n);
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800121void intel_ring_begin(struct drm_device *dev,
Chris Wilsonab6f8e32010-09-19 17:53:44 +0100122 struct intel_ring_buffer *ring, int n);
Chris Wilsone898cd22010-08-04 15:18:14 +0100123
124static inline void intel_ring_emit(struct drm_device *dev,
125 struct intel_ring_buffer *ring,
126 unsigned int data)
127{
128 unsigned int *virt = ring->virtual_start + ring->tail;
129 *virt = data;
130 ring->tail += 4;
131}
132
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800133void intel_ring_advance(struct drm_device *dev,
134 struct intel_ring_buffer *ring);
135
136u32 intel_ring_get_seqno(struct drm_device *dev,
137 struct intel_ring_buffer *ring);
138
Xiang, Haihao5c1143b2010-09-16 10:43:11 +0800139int intel_init_render_ring_buffer(struct drm_device *dev);
140int intel_init_bsd_ring_buffer(struct drm_device *dev);
Chris Wilson549f7362010-10-19 11:19:32 +0100141int intel_init_blt_ring_buffer(struct drm_device *dev);
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800142
Daniel Vetter79f321b2010-09-24 21:20:10 +0200143u32 intel_ring_get_active_head(struct drm_device *dev,
144 struct intel_ring_buffer *ring);
Daniel Vetter447da182010-09-24 21:49:27 +0200145void intel_ring_setup_status_page(struct drm_device *dev,
146 struct intel_ring_buffer *ring);
Daniel Vetter79f321b2010-09-24 21:20:10 +0200147
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800148#endif /* _INTEL_RINGBUFFER_H_ */