Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1 | /* |
Jamie Iles | f75ba50 | 2011-11-08 10:12:32 +0000 | [diff] [blame] | 2 | * Cadence MACB/GEM Ethernet Controller driver |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2004-2006 Atmel Corporation |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | */ |
| 10 | |
Jamie Iles | c220f8c | 2011-03-08 20:27:08 +0000 | [diff] [blame] | 11 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 12 | #include <linux/clk.h> |
| 13 | #include <linux/module.h> |
| 14 | #include <linux/moduleparam.h> |
| 15 | #include <linux/kernel.h> |
| 16 | #include <linux/types.h> |
Nicolas Ferre | 909a858 | 2012-11-19 06:00:21 +0000 | [diff] [blame] | 17 | #include <linux/circ_buf.h> |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 18 | #include <linux/slab.h> |
| 19 | #include <linux/init.h> |
Soren Brinkmann | 60fe716 | 2013-12-10 16:07:21 -0800 | [diff] [blame] | 20 | #include <linux/io.h> |
Joachim Eastwood | 2dbfdbb | 2012-11-11 13:56:27 +0000 | [diff] [blame] | 21 | #include <linux/gpio.h> |
Gregory CLEMENT | 270c499 | 2015-12-17 10:51:04 +0100 | [diff] [blame] | 22 | #include <linux/gpio/consumer.h> |
Alexey Dobriyan | a6b7a40 | 2011-06-06 10:43:46 +0000 | [diff] [blame] | 23 | #include <linux/interrupt.h> |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 24 | #include <linux/netdevice.h> |
| 25 | #include <linux/etherdevice.h> |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 26 | #include <linux/dma-mapping.h> |
Jamie Iles | 84e0cdb | 2011-03-08 20:17:06 +0000 | [diff] [blame] | 27 | #include <linux/platform_data/macb.h> |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 28 | #include <linux/platform_device.h> |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 29 | #include <linux/phy.h> |
Olof Johansson | b17471f | 2011-12-20 13:13:07 -0800 | [diff] [blame] | 30 | #include <linux/of.h> |
Jean-Christophe PLAGNIOL-VILLARD | fb97a84 | 2011-11-18 15:29:25 +0100 | [diff] [blame] | 31 | #include <linux/of_device.h> |
Gregory CLEMENT | 270c499 | 2015-12-17 10:51:04 +0100 | [diff] [blame] | 32 | #include <linux/of_gpio.h> |
Boris BREZILLON | 148cbb5 | 2013-08-22 17:57:28 +0200 | [diff] [blame] | 33 | #include <linux/of_mdio.h> |
Jean-Christophe PLAGNIOL-VILLARD | fb97a84 | 2011-11-18 15:29:25 +0100 | [diff] [blame] | 34 | #include <linux/of_net.h> |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 35 | |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 36 | #include "macb.h" |
| 37 | |
Nicolas Ferre | 1b44791 | 2013-06-04 21:57:11 +0000 | [diff] [blame] | 38 | #define MACB_RX_BUFFER_SIZE 128 |
Nicolas Ferre | 1b44791 | 2013-06-04 21:57:11 +0000 | [diff] [blame] | 39 | #define RX_BUFFER_MULTIPLE 64 /* bytes */ |
Havard Skinnemoen | 55054a1 | 2012-10-31 06:04:55 +0000 | [diff] [blame] | 40 | #define RX_RING_SIZE 512 /* must be power of 2 */ |
| 41 | #define RX_RING_BYTES (sizeof(struct macb_dma_desc) * RX_RING_SIZE) |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 42 | |
Havard Skinnemoen | 55054a1 | 2012-10-31 06:04:55 +0000 | [diff] [blame] | 43 | #define TX_RING_SIZE 128 /* must be power of 2 */ |
| 44 | #define TX_RING_BYTES (sizeof(struct macb_dma_desc) * TX_RING_SIZE) |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 45 | |
Nicolas Ferre | 909a858 | 2012-11-19 06:00:21 +0000 | [diff] [blame] | 46 | /* level of occupied TX descriptors under which we wake up TX process */ |
| 47 | #define MACB_TX_WAKEUP_THRESH (3 * TX_RING_SIZE / 4) |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 48 | |
| 49 | #define MACB_RX_INT_FLAGS (MACB_BIT(RCOMP) | MACB_BIT(RXUBR) \ |
| 50 | | MACB_BIT(ISR_ROVR)) |
Nicolas Ferre | e86cd53 | 2012-10-31 06:04:57 +0000 | [diff] [blame] | 51 | #define MACB_TX_ERR_FLAGS (MACB_BIT(ISR_TUND) \ |
| 52 | | MACB_BIT(ISR_RLE) \ |
| 53 | | MACB_BIT(TXERR)) |
| 54 | #define MACB_TX_INT_FLAGS (MACB_TX_ERR_FLAGS | MACB_BIT(TCOMP)) |
| 55 | |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 56 | #define MACB_MAX_TX_LEN ((unsigned int)((1 << MACB_TX_FRMLEN_SIZE) - 1)) |
| 57 | #define GEM_MAX_TX_LEN ((unsigned int)((1 << GEM_TX_FRMLEN_SIZE) - 1)) |
| 58 | |
Harini Katakam | a5898ea | 2015-05-06 22:27:18 +0530 | [diff] [blame] | 59 | #define GEM_MTU_MIN_SIZE 68 |
| 60 | |
Sergio Prado | 3e2a5e1 | 2016-02-09 12:07:16 -0200 | [diff] [blame] | 61 | #define MACB_WOL_HAS_MAGIC_PACKET (0x1 << 0) |
| 62 | #define MACB_WOL_ENABLED (0x1 << 1) |
| 63 | |
Nicolas Ferre | e86cd53 | 2012-10-31 06:04:57 +0000 | [diff] [blame] | 64 | /* |
| 65 | * Graceful stop timeouts in us. We should allow up to |
| 66 | * 1 frame time (10 Mbits/s, full-duplex, ignoring collisions) |
| 67 | */ |
| 68 | #define MACB_HALT_TIMEOUT 1230 |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 69 | |
Havard Skinnemoen | 55054a1 | 2012-10-31 06:04:55 +0000 | [diff] [blame] | 70 | /* Ring buffer accessors */ |
| 71 | static unsigned int macb_tx_ring_wrap(unsigned int index) |
| 72 | { |
| 73 | return index & (TX_RING_SIZE - 1); |
| 74 | } |
| 75 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 76 | static struct macb_dma_desc *macb_tx_desc(struct macb_queue *queue, |
| 77 | unsigned int index) |
Havard Skinnemoen | 55054a1 | 2012-10-31 06:04:55 +0000 | [diff] [blame] | 78 | { |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 79 | return &queue->tx_ring[macb_tx_ring_wrap(index)]; |
Havard Skinnemoen | 55054a1 | 2012-10-31 06:04:55 +0000 | [diff] [blame] | 80 | } |
| 81 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 82 | static struct macb_tx_skb *macb_tx_skb(struct macb_queue *queue, |
| 83 | unsigned int index) |
Havard Skinnemoen | 55054a1 | 2012-10-31 06:04:55 +0000 | [diff] [blame] | 84 | { |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 85 | return &queue->tx_skb[macb_tx_ring_wrap(index)]; |
Havard Skinnemoen | 55054a1 | 2012-10-31 06:04:55 +0000 | [diff] [blame] | 86 | } |
| 87 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 88 | static dma_addr_t macb_tx_dma(struct macb_queue *queue, unsigned int index) |
Havard Skinnemoen | 55054a1 | 2012-10-31 06:04:55 +0000 | [diff] [blame] | 89 | { |
| 90 | dma_addr_t offset; |
| 91 | |
| 92 | offset = macb_tx_ring_wrap(index) * sizeof(struct macb_dma_desc); |
| 93 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 94 | return queue->tx_ring_dma + offset; |
Havard Skinnemoen | 55054a1 | 2012-10-31 06:04:55 +0000 | [diff] [blame] | 95 | } |
| 96 | |
| 97 | static unsigned int macb_rx_ring_wrap(unsigned int index) |
| 98 | { |
| 99 | return index & (RX_RING_SIZE - 1); |
| 100 | } |
| 101 | |
| 102 | static struct macb_dma_desc *macb_rx_desc(struct macb *bp, unsigned int index) |
| 103 | { |
| 104 | return &bp->rx_ring[macb_rx_ring_wrap(index)]; |
| 105 | } |
| 106 | |
| 107 | static void *macb_rx_buffer(struct macb *bp, unsigned int index) |
| 108 | { |
Nicolas Ferre | 1b44791 | 2013-06-04 21:57:11 +0000 | [diff] [blame] | 109 | return bp->rx_buffers + bp->rx_buffer_size * macb_rx_ring_wrap(index); |
Havard Skinnemoen | 55054a1 | 2012-10-31 06:04:55 +0000 | [diff] [blame] | 110 | } |
| 111 | |
Andy Shevchenko | f2ce8a9 | 2015-07-24 21:23:59 +0300 | [diff] [blame] | 112 | /* I/O accessors */ |
| 113 | static u32 hw_readl_native(struct macb *bp, int offset) |
| 114 | { |
| 115 | return __raw_readl(bp->regs + offset); |
| 116 | } |
| 117 | |
| 118 | static void hw_writel_native(struct macb *bp, int offset, u32 value) |
| 119 | { |
| 120 | __raw_writel(value, bp->regs + offset); |
| 121 | } |
| 122 | |
| 123 | static u32 hw_readl(struct macb *bp, int offset) |
| 124 | { |
| 125 | return readl_relaxed(bp->regs + offset); |
| 126 | } |
| 127 | |
| 128 | static void hw_writel(struct macb *bp, int offset, u32 value) |
| 129 | { |
| 130 | writel_relaxed(value, bp->regs + offset); |
| 131 | } |
| 132 | |
| 133 | /* |
| 134 | * Find the CPU endianness by using the loopback bit of NCR register. When the |
| 135 | * CPU is in big endian we need to program swaped mode for management |
| 136 | * descriptor access. |
| 137 | */ |
| 138 | static bool hw_is_native_io(void __iomem *addr) |
| 139 | { |
| 140 | u32 value = MACB_BIT(LLB); |
| 141 | |
| 142 | __raw_writel(value, addr + MACB_NCR); |
| 143 | value = __raw_readl(addr + MACB_NCR); |
| 144 | |
| 145 | /* Write 0 back to disable everything */ |
| 146 | __raw_writel(0, addr + MACB_NCR); |
| 147 | |
| 148 | return value == MACB_BIT(LLB); |
| 149 | } |
| 150 | |
| 151 | static bool hw_is_gem(void __iomem *addr, bool native_io) |
| 152 | { |
| 153 | u32 id; |
| 154 | |
| 155 | if (native_io) |
| 156 | id = __raw_readl(addr + MACB_MID); |
| 157 | else |
| 158 | id = readl_relaxed(addr + MACB_MID); |
| 159 | |
| 160 | return MACB_BFEXT(IDNUM, id) >= 0x2; |
| 161 | } |
| 162 | |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 163 | static void macb_set_hwaddr(struct macb *bp) |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 164 | { |
| 165 | u32 bottom; |
| 166 | u16 top; |
| 167 | |
| 168 | bottom = cpu_to_le32(*((u32 *)bp->dev->dev_addr)); |
Jamie Iles | f75ba50 | 2011-11-08 10:12:32 +0000 | [diff] [blame] | 169 | macb_or_gem_writel(bp, SA1B, bottom); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 170 | top = cpu_to_le16(*((u16 *)(bp->dev->dev_addr + 4))); |
Jamie Iles | f75ba50 | 2011-11-08 10:12:32 +0000 | [diff] [blame] | 171 | macb_or_gem_writel(bp, SA1T, top); |
Joachim Eastwood | 3629a6c | 2012-11-11 13:56:28 +0000 | [diff] [blame] | 172 | |
| 173 | /* Clear unused address register sets */ |
| 174 | macb_or_gem_writel(bp, SA2B, 0); |
| 175 | macb_or_gem_writel(bp, SA2T, 0); |
| 176 | macb_or_gem_writel(bp, SA3B, 0); |
| 177 | macb_or_gem_writel(bp, SA3T, 0); |
| 178 | macb_or_gem_writel(bp, SA4B, 0); |
| 179 | macb_or_gem_writel(bp, SA4T, 0); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 180 | } |
| 181 | |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 182 | static void macb_get_hwaddr(struct macb *bp) |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 183 | { |
Joachim Eastwood | d25e78a | 2012-11-07 08:14:51 +0000 | [diff] [blame] | 184 | struct macb_platform_data *pdata; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 185 | u32 bottom; |
| 186 | u16 top; |
| 187 | u8 addr[6]; |
Joachim Eastwood | 17b8bb3 | 2012-11-07 08:14:50 +0000 | [diff] [blame] | 188 | int i; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 189 | |
Jingoo Han | c607a0d | 2013-08-30 14:12:21 +0900 | [diff] [blame] | 190 | pdata = dev_get_platdata(&bp->pdev->dev); |
Joachim Eastwood | d25e78a | 2012-11-07 08:14:51 +0000 | [diff] [blame] | 191 | |
Joachim Eastwood | 17b8bb3 | 2012-11-07 08:14:50 +0000 | [diff] [blame] | 192 | /* Check all 4 address register for vaild address */ |
| 193 | for (i = 0; i < 4; i++) { |
| 194 | bottom = macb_or_gem_readl(bp, SA1B + i * 8); |
| 195 | top = macb_or_gem_readl(bp, SA1T + i * 8); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 196 | |
Joachim Eastwood | d25e78a | 2012-11-07 08:14:51 +0000 | [diff] [blame] | 197 | if (pdata && pdata->rev_eth_addr) { |
| 198 | addr[5] = bottom & 0xff; |
| 199 | addr[4] = (bottom >> 8) & 0xff; |
| 200 | addr[3] = (bottom >> 16) & 0xff; |
| 201 | addr[2] = (bottom >> 24) & 0xff; |
| 202 | addr[1] = top & 0xff; |
| 203 | addr[0] = (top & 0xff00) >> 8; |
| 204 | } else { |
| 205 | addr[0] = bottom & 0xff; |
| 206 | addr[1] = (bottom >> 8) & 0xff; |
| 207 | addr[2] = (bottom >> 16) & 0xff; |
| 208 | addr[3] = (bottom >> 24) & 0xff; |
| 209 | addr[4] = top & 0xff; |
| 210 | addr[5] = (top >> 8) & 0xff; |
| 211 | } |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 212 | |
Joachim Eastwood | 17b8bb3 | 2012-11-07 08:14:50 +0000 | [diff] [blame] | 213 | if (is_valid_ether_addr(addr)) { |
| 214 | memcpy(bp->dev->dev_addr, addr, sizeof(addr)); |
| 215 | return; |
| 216 | } |
Sven Schnelle | d1d5741 | 2008-06-09 16:33:57 -0700 | [diff] [blame] | 217 | } |
Joachim Eastwood | 17b8bb3 | 2012-11-07 08:14:50 +0000 | [diff] [blame] | 218 | |
Andy Shevchenko | a35919e | 2015-07-24 21:24:01 +0300 | [diff] [blame] | 219 | dev_info(&bp->pdev->dev, "invalid hw address, using random\n"); |
Joachim Eastwood | 17b8bb3 | 2012-11-07 08:14:50 +0000 | [diff] [blame] | 220 | eth_hw_addr_random(bp->dev); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 221 | } |
| 222 | |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 223 | static int macb_mdio_read(struct mii_bus *bus, int mii_id, int regnum) |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 224 | { |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 225 | struct macb *bp = bus->priv; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 226 | int value; |
| 227 | |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 228 | macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_SOF) |
| 229 | | MACB_BF(RW, MACB_MAN_READ) |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 230 | | MACB_BF(PHYA, mii_id) |
| 231 | | MACB_BF(REGA, regnum) |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 232 | | MACB_BF(CODE, MACB_MAN_CODE))); |
| 233 | |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 234 | /* wait for end of transfer */ |
| 235 | while (!MACB_BFEXT(IDLE, macb_readl(bp, NSR))) |
| 236 | cpu_relax(); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 237 | |
| 238 | value = MACB_BFEXT(DATA, macb_readl(bp, MAN)); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 239 | |
| 240 | return value; |
| 241 | } |
| 242 | |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 243 | static int macb_mdio_write(struct mii_bus *bus, int mii_id, int regnum, |
| 244 | u16 value) |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 245 | { |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 246 | struct macb *bp = bus->priv; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 247 | |
| 248 | macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_SOF) |
| 249 | | MACB_BF(RW, MACB_MAN_WRITE) |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 250 | | MACB_BF(PHYA, mii_id) |
| 251 | | MACB_BF(REGA, regnum) |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 252 | | MACB_BF(CODE, MACB_MAN_CODE) |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 253 | | MACB_BF(DATA, value))); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 254 | |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 255 | /* wait for end of transfer */ |
| 256 | while (!MACB_BFEXT(IDLE, macb_readl(bp, NSR))) |
| 257 | cpu_relax(); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 258 | |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 259 | return 0; |
| 260 | } |
| 261 | |
Soren Brinkmann | e1824df | 2013-12-10 16:07:23 -0800 | [diff] [blame] | 262 | /** |
| 263 | * macb_set_tx_clk() - Set a clock to a new frequency |
| 264 | * @clk Pointer to the clock to change |
| 265 | * @rate New frequency in Hz |
| 266 | * @dev Pointer to the struct net_device |
| 267 | */ |
| 268 | static void macb_set_tx_clk(struct clk *clk, int speed, struct net_device *dev) |
| 269 | { |
| 270 | long ferr, rate, rate_rounded; |
| 271 | |
Cyrille Pitchen | 93b31f4 | 2015-03-07 07:23:31 +0100 | [diff] [blame] | 272 | if (!clk) |
| 273 | return; |
| 274 | |
Soren Brinkmann | e1824df | 2013-12-10 16:07:23 -0800 | [diff] [blame] | 275 | switch (speed) { |
| 276 | case SPEED_10: |
| 277 | rate = 2500000; |
| 278 | break; |
| 279 | case SPEED_100: |
| 280 | rate = 25000000; |
| 281 | break; |
| 282 | case SPEED_1000: |
| 283 | rate = 125000000; |
| 284 | break; |
| 285 | default: |
Soren Brinkmann | 9319e47 | 2013-12-10 20:57:57 -0800 | [diff] [blame] | 286 | return; |
Soren Brinkmann | e1824df | 2013-12-10 16:07:23 -0800 | [diff] [blame] | 287 | } |
| 288 | |
| 289 | rate_rounded = clk_round_rate(clk, rate); |
| 290 | if (rate_rounded < 0) |
| 291 | return; |
| 292 | |
| 293 | /* RGMII allows 50 ppm frequency error. Test and warn if this limit |
| 294 | * is not satisfied. |
| 295 | */ |
| 296 | ferr = abs(rate_rounded - rate); |
| 297 | ferr = DIV_ROUND_UP(ferr, rate / 100000); |
| 298 | if (ferr > 5) |
| 299 | netdev_warn(dev, "unable to generate target frequency: %ld Hz\n", |
| 300 | rate); |
| 301 | |
| 302 | if (clk_set_rate(clk, rate_rounded)) |
| 303 | netdev_err(dev, "adjusting tx_clk failed.\n"); |
| 304 | } |
| 305 | |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 306 | static void macb_handle_link_change(struct net_device *dev) |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 307 | { |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 308 | struct macb *bp = netdev_priv(dev); |
| 309 | struct phy_device *phydev = bp->phy_dev; |
| 310 | unsigned long flags; |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 311 | int status_change = 0; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 312 | |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 313 | spin_lock_irqsave(&bp->lock, flags); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 314 | |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 315 | if (phydev->link) { |
| 316 | if ((bp->speed != phydev->speed) || |
| 317 | (bp->duplex != phydev->duplex)) { |
| 318 | u32 reg; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 319 | |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 320 | reg = macb_readl(bp, NCFGR); |
| 321 | reg &= ~(MACB_BIT(SPD) | MACB_BIT(FD)); |
Patrice Vilchez | 140b755 | 2012-10-31 06:04:50 +0000 | [diff] [blame] | 322 | if (macb_is_gem(bp)) |
| 323 | reg &= ~GEM_BIT(GBE); |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 324 | |
| 325 | if (phydev->duplex) |
| 326 | reg |= MACB_BIT(FD); |
Atsushi Nemoto | 179956f | 2008-02-21 22:50:54 +0900 | [diff] [blame] | 327 | if (phydev->speed == SPEED_100) |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 328 | reg |= MACB_BIT(SPD); |
Nicolas Ferre | e175587 | 2014-07-24 13:50:58 +0200 | [diff] [blame] | 329 | if (phydev->speed == SPEED_1000 && |
| 330 | bp->caps & MACB_CAPS_GIGABIT_MODE_AVAILABLE) |
Patrice Vilchez | 140b755 | 2012-10-31 06:04:50 +0000 | [diff] [blame] | 331 | reg |= GEM_BIT(GBE); |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 332 | |
Patrice Vilchez | 140b755 | 2012-10-31 06:04:50 +0000 | [diff] [blame] | 333 | macb_or_gem_writel(bp, NCFGR, reg); |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 334 | |
| 335 | bp->speed = phydev->speed; |
| 336 | bp->duplex = phydev->duplex; |
| 337 | status_change = 1; |
| 338 | } |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 339 | } |
| 340 | |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 341 | if (phydev->link != bp->link) { |
Anton Vorontsov | c8f1568 | 2008-07-22 15:41:24 -0700 | [diff] [blame] | 342 | if (!phydev->link) { |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 343 | bp->speed = 0; |
| 344 | bp->duplex = -1; |
| 345 | } |
| 346 | bp->link = phydev->link; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 347 | |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 348 | status_change = 1; |
| 349 | } |
| 350 | |
| 351 | spin_unlock_irqrestore(&bp->lock, flags); |
| 352 | |
| 353 | if (status_change) { |
Nicolas Ferre | 03fc472 | 2012-07-03 23:14:13 +0000 | [diff] [blame] | 354 | if (phydev->link) { |
Jaeden Amero | 2c29b23 | 2015-03-12 18:07:54 -0500 | [diff] [blame] | 355 | /* Update the TX clock rate if and only if the link is |
| 356 | * up and there has been a link change. |
| 357 | */ |
| 358 | macb_set_tx_clk(bp->tx_clk, phydev->speed, dev); |
| 359 | |
Nicolas Ferre | 03fc472 | 2012-07-03 23:14:13 +0000 | [diff] [blame] | 360 | netif_carrier_on(dev); |
Jamie Iles | c220f8c | 2011-03-08 20:27:08 +0000 | [diff] [blame] | 361 | netdev_info(dev, "link up (%d/%s)\n", |
| 362 | phydev->speed, |
| 363 | phydev->duplex == DUPLEX_FULL ? |
| 364 | "Full" : "Half"); |
Nicolas Ferre | 03fc472 | 2012-07-03 23:14:13 +0000 | [diff] [blame] | 365 | } else { |
| 366 | netif_carrier_off(dev); |
Jamie Iles | c220f8c | 2011-03-08 20:27:08 +0000 | [diff] [blame] | 367 | netdev_info(dev, "link down\n"); |
Nicolas Ferre | 03fc472 | 2012-07-03 23:14:13 +0000 | [diff] [blame] | 368 | } |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 369 | } |
| 370 | } |
| 371 | |
| 372 | /* based on au1000_eth. c*/ |
| 373 | static int macb_mii_probe(struct net_device *dev) |
| 374 | { |
| 375 | struct macb *bp = netdev_priv(dev); |
Joachim Eastwood | 2dbfdbb | 2012-11-11 13:56:27 +0000 | [diff] [blame] | 376 | struct macb_platform_data *pdata; |
Jiri Pirko | 7455a76 | 2010-02-08 05:12:08 +0000 | [diff] [blame] | 377 | struct phy_device *phydev; |
Joachim Eastwood | 2dbfdbb | 2012-11-11 13:56:27 +0000 | [diff] [blame] | 378 | int phy_irq; |
Jiri Pirko | 7455a76 | 2010-02-08 05:12:08 +0000 | [diff] [blame] | 379 | int ret; |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 380 | |
Jiri Pirko | 7455a76 | 2010-02-08 05:12:08 +0000 | [diff] [blame] | 381 | phydev = phy_find_first(bp->mii_bus); |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 382 | if (!phydev) { |
Jamie Iles | c220f8c | 2011-03-08 20:27:08 +0000 | [diff] [blame] | 383 | netdev_err(dev, "no PHY found\n"); |
Boris BREZILLON | 7daa78e | 2013-08-27 14:36:14 +0200 | [diff] [blame] | 384 | return -ENXIO; |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 385 | } |
| 386 | |
Joachim Eastwood | 2dbfdbb | 2012-11-11 13:56:27 +0000 | [diff] [blame] | 387 | pdata = dev_get_platdata(&bp->pdev->dev); |
| 388 | if (pdata && gpio_is_valid(pdata->phy_irq_pin)) { |
| 389 | ret = devm_gpio_request(&bp->pdev->dev, pdata->phy_irq_pin, "phy int"); |
| 390 | if (!ret) { |
| 391 | phy_irq = gpio_to_irq(pdata->phy_irq_pin); |
| 392 | phydev->irq = (phy_irq < 0) ? PHY_POLL : phy_irq; |
| 393 | } |
| 394 | } |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 395 | |
| 396 | /* attach the mac to the phy */ |
Florian Fainelli | f9a8f83 | 2013-01-14 00:52:52 +0000 | [diff] [blame] | 397 | ret = phy_connect_direct(dev, phydev, &macb_handle_link_change, |
Jean-Christophe PLAGNIOL-VILLARD | fb97a84 | 2011-11-18 15:29:25 +0100 | [diff] [blame] | 398 | bp->phy_interface); |
Jiri Pirko | 7455a76 | 2010-02-08 05:12:08 +0000 | [diff] [blame] | 399 | if (ret) { |
Jamie Iles | c220f8c | 2011-03-08 20:27:08 +0000 | [diff] [blame] | 400 | netdev_err(dev, "Could not attach to PHY\n"); |
Jiri Pirko | 7455a76 | 2010-02-08 05:12:08 +0000 | [diff] [blame] | 401 | return ret; |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 402 | } |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 403 | |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 404 | /* mask with MAC supported features */ |
Nicolas Ferre | e175587 | 2014-07-24 13:50:58 +0200 | [diff] [blame] | 405 | if (macb_is_gem(bp) && bp->caps & MACB_CAPS_GIGABIT_MODE_AVAILABLE) |
Patrice Vilchez | 140b755 | 2012-10-31 06:04:50 +0000 | [diff] [blame] | 406 | phydev->supported &= PHY_GBIT_FEATURES; |
| 407 | else |
| 408 | phydev->supported &= PHY_BASIC_FEATURES; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 409 | |
Nathan Sullivan | 222ca8e | 2015-05-22 09:22:10 -0500 | [diff] [blame] | 410 | if (bp->caps & MACB_CAPS_NO_GIGABIT_HALF) |
| 411 | phydev->supported &= ~SUPPORTED_1000baseT_Half; |
| 412 | |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 413 | phydev->advertising = phydev->supported; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 414 | |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 415 | bp->link = 0; |
| 416 | bp->speed = 0; |
| 417 | bp->duplex = -1; |
| 418 | bp->phy_dev = phydev; |
| 419 | |
| 420 | return 0; |
| 421 | } |
| 422 | |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 423 | static int macb_mii_init(struct macb *bp) |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 424 | { |
Jamie Iles | 84e0cdb | 2011-03-08 20:17:06 +0000 | [diff] [blame] | 425 | struct macb_platform_data *pdata; |
Boris BREZILLON | 148cbb5 | 2013-08-22 17:57:28 +0200 | [diff] [blame] | 426 | struct device_node *np; |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 427 | int err = -ENXIO, i; |
| 428 | |
Uwe Kleine-Koenig | 3dbda77 | 2009-07-23 08:31:31 +0200 | [diff] [blame] | 429 | /* Enable management port */ |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 430 | macb_writel(bp, NCR, MACB_BIT(MPE)); |
| 431 | |
Lennert Buytenhek | 298cf9b | 2008-10-08 16:29:57 -0700 | [diff] [blame] | 432 | bp->mii_bus = mdiobus_alloc(); |
| 433 | if (bp->mii_bus == NULL) { |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 434 | err = -ENOMEM; |
| 435 | goto err_out; |
| 436 | } |
| 437 | |
Lennert Buytenhek | 298cf9b | 2008-10-08 16:29:57 -0700 | [diff] [blame] | 438 | bp->mii_bus->name = "MACB_mii_bus"; |
| 439 | bp->mii_bus->read = &macb_mdio_read; |
| 440 | bp->mii_bus->write = &macb_mdio_write; |
Florian Fainelli | 98d5e57 | 2012-01-09 23:59:11 +0000 | [diff] [blame] | 441 | snprintf(bp->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x", |
| 442 | bp->pdev->name, bp->pdev->id); |
Lennert Buytenhek | 298cf9b | 2008-10-08 16:29:57 -0700 | [diff] [blame] | 443 | bp->mii_bus->priv = bp; |
| 444 | bp->mii_bus->parent = &bp->dev->dev; |
Jingoo Han | c607a0d | 2013-08-30 14:12:21 +0900 | [diff] [blame] | 445 | pdata = dev_get_platdata(&bp->pdev->dev); |
Lennert Buytenhek | 298cf9b | 2008-10-08 16:29:57 -0700 | [diff] [blame] | 446 | |
Jamie Iles | 9152394 | 2011-02-28 04:05:25 +0000 | [diff] [blame] | 447 | dev_set_drvdata(&bp->dev->dev, bp->mii_bus); |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 448 | |
Boris BREZILLON | 148cbb5 | 2013-08-22 17:57:28 +0200 | [diff] [blame] | 449 | np = bp->pdev->dev.of_node; |
| 450 | if (np) { |
| 451 | /* try dt phy registration */ |
| 452 | err = of_mdiobus_register(bp->mii_bus, np); |
| 453 | |
| 454 | /* fallback to standard phy registration if no phy were |
| 455 | found during dt phy registration */ |
| 456 | if (!err && !phy_find_first(bp->mii_bus)) { |
| 457 | for (i = 0; i < PHY_MAX_ADDR; i++) { |
| 458 | struct phy_device *phydev; |
| 459 | |
| 460 | phydev = mdiobus_scan(bp->mii_bus, i); |
| 461 | if (IS_ERR(phydev)) { |
| 462 | err = PTR_ERR(phydev); |
| 463 | break; |
| 464 | } |
| 465 | } |
| 466 | |
| 467 | if (err) |
| 468 | goto err_out_unregister_bus; |
| 469 | } |
| 470 | } else { |
Boris BREZILLON | 148cbb5 | 2013-08-22 17:57:28 +0200 | [diff] [blame] | 471 | if (pdata) |
| 472 | bp->mii_bus->phy_mask = pdata->phy_mask; |
| 473 | |
| 474 | err = mdiobus_register(bp->mii_bus); |
| 475 | } |
| 476 | |
| 477 | if (err) |
Andrew Lunn | e7f4dc3 | 2016-01-06 20:11:15 +0100 | [diff] [blame] | 478 | goto err_out_free_mdiobus; |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 479 | |
Boris BREZILLON | 7daa78e | 2013-08-27 14:36:14 +0200 | [diff] [blame] | 480 | err = macb_mii_probe(bp->dev); |
| 481 | if (err) |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 482 | goto err_out_unregister_bus; |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 483 | |
| 484 | return 0; |
| 485 | |
| 486 | err_out_unregister_bus: |
Lennert Buytenhek | 298cf9b | 2008-10-08 16:29:57 -0700 | [diff] [blame] | 487 | mdiobus_unregister(bp->mii_bus); |
Lennert Buytenhek | 298cf9b | 2008-10-08 16:29:57 -0700 | [diff] [blame] | 488 | err_out_free_mdiobus: |
| 489 | mdiobus_free(bp->mii_bus); |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 490 | err_out: |
| 491 | return err; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 492 | } |
| 493 | |
| 494 | static void macb_update_stats(struct macb *bp) |
| 495 | { |
Jamie Iles | a494ed8 | 2011-03-09 16:26:35 +0000 | [diff] [blame] | 496 | u32 *p = &bp->hw_stats.macb.rx_pause_frames; |
| 497 | u32 *end = &bp->hw_stats.macb.tx_pause_frames + 1; |
Andy Shevchenko | f2ce8a9 | 2015-07-24 21:23:59 +0300 | [diff] [blame] | 498 | int offset = MACB_PFR; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 499 | |
| 500 | WARN_ON((unsigned long)(end - p - 1) != (MACB_TPF - MACB_PFR) / 4); |
| 501 | |
Moritz Fischer | 96ec631 | 2016-03-29 19:11:11 -0700 | [diff] [blame^] | 502 | for (; p < end; p++, offset += 4) |
David S. Miller | 7a6e070 | 2015-07-27 14:24:48 -0700 | [diff] [blame] | 503 | *p += bp->macb_reg_readl(bp, offset); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 504 | } |
| 505 | |
Nicolas Ferre | e86cd53 | 2012-10-31 06:04:57 +0000 | [diff] [blame] | 506 | static int macb_halt_tx(struct macb *bp) |
| 507 | { |
| 508 | unsigned long halt_time, timeout; |
| 509 | u32 status; |
| 510 | |
| 511 | macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(THALT)); |
| 512 | |
| 513 | timeout = jiffies + usecs_to_jiffies(MACB_HALT_TIMEOUT); |
| 514 | do { |
| 515 | halt_time = jiffies; |
| 516 | status = macb_readl(bp, TSR); |
| 517 | if (!(status & MACB_BIT(TGO))) |
| 518 | return 0; |
| 519 | |
| 520 | usleep_range(10, 250); |
| 521 | } while (time_before(halt_time, timeout)); |
| 522 | |
| 523 | return -ETIMEDOUT; |
| 524 | } |
| 525 | |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 526 | static void macb_tx_unmap(struct macb *bp, struct macb_tx_skb *tx_skb) |
| 527 | { |
| 528 | if (tx_skb->mapping) { |
| 529 | if (tx_skb->mapped_as_page) |
| 530 | dma_unmap_page(&bp->pdev->dev, tx_skb->mapping, |
| 531 | tx_skb->size, DMA_TO_DEVICE); |
| 532 | else |
| 533 | dma_unmap_single(&bp->pdev->dev, tx_skb->mapping, |
| 534 | tx_skb->size, DMA_TO_DEVICE); |
| 535 | tx_skb->mapping = 0; |
| 536 | } |
| 537 | |
| 538 | if (tx_skb->skb) { |
| 539 | dev_kfree_skb_any(tx_skb->skb); |
| 540 | tx_skb->skb = NULL; |
| 541 | } |
| 542 | } |
| 543 | |
Nicolas Ferre | e86cd53 | 2012-10-31 06:04:57 +0000 | [diff] [blame] | 544 | static void macb_tx_error_task(struct work_struct *work) |
| 545 | { |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 546 | struct macb_queue *queue = container_of(work, struct macb_queue, |
| 547 | tx_error_task); |
| 548 | struct macb *bp = queue->bp; |
Nicolas Ferre | e86cd53 | 2012-10-31 06:04:57 +0000 | [diff] [blame] | 549 | struct macb_tx_skb *tx_skb; |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 550 | struct macb_dma_desc *desc; |
Nicolas Ferre | e86cd53 | 2012-10-31 06:04:57 +0000 | [diff] [blame] | 551 | struct sk_buff *skb; |
| 552 | unsigned int tail; |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 553 | unsigned long flags; |
Nicolas Ferre | e86cd53 | 2012-10-31 06:04:57 +0000 | [diff] [blame] | 554 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 555 | netdev_vdbg(bp->dev, "macb_tx_error_task: q = %u, t = %u, h = %u\n", |
| 556 | (unsigned int)(queue - bp->queues), |
| 557 | queue->tx_tail, queue->tx_head); |
| 558 | |
| 559 | /* Prevent the queue IRQ handlers from running: each of them may call |
| 560 | * macb_tx_interrupt(), which in turn may call netif_wake_subqueue(). |
| 561 | * As explained below, we have to halt the transmission before updating |
| 562 | * TBQP registers so we call netif_tx_stop_all_queues() to notify the |
| 563 | * network engine about the macb/gem being halted. |
| 564 | */ |
| 565 | spin_lock_irqsave(&bp->lock, flags); |
Nicolas Ferre | e86cd53 | 2012-10-31 06:04:57 +0000 | [diff] [blame] | 566 | |
| 567 | /* Make sure nobody is trying to queue up new packets */ |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 568 | netif_tx_stop_all_queues(bp->dev); |
Nicolas Ferre | e86cd53 | 2012-10-31 06:04:57 +0000 | [diff] [blame] | 569 | |
| 570 | /* |
| 571 | * Stop transmission now |
| 572 | * (in case we have just queued new packets) |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 573 | * macb/gem must be halted to write TBQP register |
Nicolas Ferre | e86cd53 | 2012-10-31 06:04:57 +0000 | [diff] [blame] | 574 | */ |
| 575 | if (macb_halt_tx(bp)) |
| 576 | /* Just complain for now, reinitializing TX path can be good */ |
| 577 | netdev_err(bp->dev, "BUG: halt tx timed out\n"); |
| 578 | |
Nicolas Ferre | e86cd53 | 2012-10-31 06:04:57 +0000 | [diff] [blame] | 579 | /* |
| 580 | * Treat frames in TX queue including the ones that caused the error. |
| 581 | * Free transmit buffers in upper layer. |
| 582 | */ |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 583 | for (tail = queue->tx_tail; tail != queue->tx_head; tail++) { |
| 584 | u32 ctrl; |
Nicolas Ferre | e86cd53 | 2012-10-31 06:04:57 +0000 | [diff] [blame] | 585 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 586 | desc = macb_tx_desc(queue, tail); |
Nicolas Ferre | e86cd53 | 2012-10-31 06:04:57 +0000 | [diff] [blame] | 587 | ctrl = desc->ctrl; |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 588 | tx_skb = macb_tx_skb(queue, tail); |
Nicolas Ferre | e86cd53 | 2012-10-31 06:04:57 +0000 | [diff] [blame] | 589 | skb = tx_skb->skb; |
| 590 | |
| 591 | if (ctrl & MACB_BIT(TX_USED)) { |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 592 | /* skb is set for the last buffer of the frame */ |
| 593 | while (!skb) { |
| 594 | macb_tx_unmap(bp, tx_skb); |
| 595 | tail++; |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 596 | tx_skb = macb_tx_skb(queue, tail); |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 597 | skb = tx_skb->skb; |
| 598 | } |
| 599 | |
| 600 | /* ctrl still refers to the first buffer descriptor |
| 601 | * since it's the only one written back by the hardware |
| 602 | */ |
| 603 | if (!(ctrl & MACB_BIT(TX_BUF_EXHAUSTED))) { |
| 604 | netdev_vdbg(bp->dev, "txerr skb %u (data %p) TX complete\n", |
| 605 | macb_tx_ring_wrap(tail), skb->data); |
| 606 | bp->stats.tx_packets++; |
| 607 | bp->stats.tx_bytes += skb->len; |
| 608 | } |
Nicolas Ferre | e86cd53 | 2012-10-31 06:04:57 +0000 | [diff] [blame] | 609 | } else { |
| 610 | /* |
| 611 | * "Buffers exhausted mid-frame" errors may only happen |
| 612 | * if the driver is buggy, so complain loudly about those. |
| 613 | * Statistics are updated by hardware. |
| 614 | */ |
| 615 | if (ctrl & MACB_BIT(TX_BUF_EXHAUSTED)) |
| 616 | netdev_err(bp->dev, |
| 617 | "BUG: TX buffers exhausted mid-frame\n"); |
| 618 | |
| 619 | desc->ctrl = ctrl | MACB_BIT(TX_USED); |
| 620 | } |
| 621 | |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 622 | macb_tx_unmap(bp, tx_skb); |
Nicolas Ferre | e86cd53 | 2012-10-31 06:04:57 +0000 | [diff] [blame] | 623 | } |
| 624 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 625 | /* Set end of TX queue */ |
| 626 | desc = macb_tx_desc(queue, 0); |
| 627 | desc->addr = 0; |
| 628 | desc->ctrl = MACB_BIT(TX_USED); |
| 629 | |
Nicolas Ferre | e86cd53 | 2012-10-31 06:04:57 +0000 | [diff] [blame] | 630 | /* Make descriptor updates visible to hardware */ |
| 631 | wmb(); |
| 632 | |
| 633 | /* Reinitialize the TX desc queue */ |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 634 | queue_writel(queue, TBQP, queue->tx_ring_dma); |
Nicolas Ferre | e86cd53 | 2012-10-31 06:04:57 +0000 | [diff] [blame] | 635 | /* Make TX ring reflect state of hardware */ |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 636 | queue->tx_head = 0; |
| 637 | queue->tx_tail = 0; |
Nicolas Ferre | e86cd53 | 2012-10-31 06:04:57 +0000 | [diff] [blame] | 638 | |
| 639 | /* Housework before enabling TX IRQ */ |
| 640 | macb_writel(bp, TSR, macb_readl(bp, TSR)); |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 641 | queue_writel(queue, IER, MACB_TX_INT_FLAGS); |
| 642 | |
| 643 | /* Now we are ready to start transmission again */ |
| 644 | netif_tx_start_all_queues(bp->dev); |
| 645 | macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(TSTART)); |
| 646 | |
| 647 | spin_unlock_irqrestore(&bp->lock, flags); |
Nicolas Ferre | e86cd53 | 2012-10-31 06:04:57 +0000 | [diff] [blame] | 648 | } |
| 649 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 650 | static void macb_tx_interrupt(struct macb_queue *queue) |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 651 | { |
| 652 | unsigned int tail; |
| 653 | unsigned int head; |
| 654 | u32 status; |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 655 | struct macb *bp = queue->bp; |
| 656 | u16 queue_index = queue - bp->queues; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 657 | |
| 658 | status = macb_readl(bp, TSR); |
| 659 | macb_writel(bp, TSR, status); |
| 660 | |
Nicolas Ferre | 581df9e | 2013-05-14 03:00:16 +0000 | [diff] [blame] | 661 | if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 662 | queue_writel(queue, ISR, MACB_BIT(TCOMP)); |
Steffen Trumtrar | 749a2b6 | 2013-03-27 23:07:05 +0000 | [diff] [blame] | 663 | |
Nicolas Ferre | e86cd53 | 2012-10-31 06:04:57 +0000 | [diff] [blame] | 664 | netdev_vdbg(bp->dev, "macb_tx_interrupt status = 0x%03lx\n", |
| 665 | (unsigned long)status); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 666 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 667 | head = queue->tx_head; |
| 668 | for (tail = queue->tx_tail; tail != head; tail++) { |
Havard Skinnemoen | 55054a1 | 2012-10-31 06:04:55 +0000 | [diff] [blame] | 669 | struct macb_tx_skb *tx_skb; |
| 670 | struct sk_buff *skb; |
| 671 | struct macb_dma_desc *desc; |
| 672 | u32 ctrl; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 673 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 674 | desc = macb_tx_desc(queue, tail); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 675 | |
Havard Skinnemoen | 03dbe05 | 2012-10-31 06:04:51 +0000 | [diff] [blame] | 676 | /* Make hw descriptor updates visible to CPU */ |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 677 | rmb(); |
Havard Skinnemoen | 03dbe05 | 2012-10-31 06:04:51 +0000 | [diff] [blame] | 678 | |
Havard Skinnemoen | 55054a1 | 2012-10-31 06:04:55 +0000 | [diff] [blame] | 679 | ctrl = desc->ctrl; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 680 | |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 681 | /* TX_USED bit is only set by hardware on the very first buffer |
| 682 | * descriptor of the transmitted frame. |
| 683 | */ |
Havard Skinnemoen | 55054a1 | 2012-10-31 06:04:55 +0000 | [diff] [blame] | 684 | if (!(ctrl & MACB_BIT(TX_USED))) |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 685 | break; |
| 686 | |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 687 | /* Process all buffers of the current transmitted frame */ |
| 688 | for (;; tail++) { |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 689 | tx_skb = macb_tx_skb(queue, tail); |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 690 | skb = tx_skb->skb; |
Havard Skinnemoen | 55054a1 | 2012-10-31 06:04:55 +0000 | [diff] [blame] | 691 | |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 692 | /* First, update TX stats if needed */ |
| 693 | if (skb) { |
| 694 | netdev_vdbg(bp->dev, "skb %u (data %p) TX complete\n", |
| 695 | macb_tx_ring_wrap(tail), skb->data); |
| 696 | bp->stats.tx_packets++; |
| 697 | bp->stats.tx_bytes += skb->len; |
| 698 | } |
| 699 | |
| 700 | /* Now we can safely release resources */ |
| 701 | macb_tx_unmap(bp, tx_skb); |
| 702 | |
| 703 | /* skb is set only for the last buffer of the frame. |
| 704 | * WARNING: at this point skb has been freed by |
| 705 | * macb_tx_unmap(). |
| 706 | */ |
| 707 | if (skb) |
| 708 | break; |
| 709 | } |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 710 | } |
| 711 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 712 | queue->tx_tail = tail; |
| 713 | if (__netif_subqueue_stopped(bp->dev, queue_index) && |
| 714 | CIRC_CNT(queue->tx_head, queue->tx_tail, |
| 715 | TX_RING_SIZE) <= MACB_TX_WAKEUP_THRESH) |
| 716 | netif_wake_subqueue(bp->dev, queue_index); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 717 | } |
| 718 | |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 719 | static void gem_rx_refill(struct macb *bp) |
| 720 | { |
| 721 | unsigned int entry; |
| 722 | struct sk_buff *skb; |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 723 | dma_addr_t paddr; |
| 724 | |
| 725 | while (CIRC_SPACE(bp->rx_prepared_head, bp->rx_tail, RX_RING_SIZE) > 0) { |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 726 | entry = macb_rx_ring_wrap(bp->rx_prepared_head); |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 727 | |
| 728 | /* Make hw descriptor updates visible to CPU */ |
| 729 | rmb(); |
| 730 | |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 731 | bp->rx_prepared_head++; |
| 732 | |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 733 | if (bp->rx_skbuff[entry] == NULL) { |
| 734 | /* allocate sk_buff for this free entry in ring */ |
| 735 | skb = netdev_alloc_skb(bp->dev, bp->rx_buffer_size); |
| 736 | if (unlikely(skb == NULL)) { |
| 737 | netdev_err(bp->dev, |
| 738 | "Unable to allocate sk_buff\n"); |
| 739 | break; |
| 740 | } |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 741 | |
| 742 | /* now fill corresponding descriptor entry */ |
| 743 | paddr = dma_map_single(&bp->pdev->dev, skb->data, |
| 744 | bp->rx_buffer_size, DMA_FROM_DEVICE); |
Soren Brinkmann | 9203090 | 2014-03-04 08:46:39 -0800 | [diff] [blame] | 745 | if (dma_mapping_error(&bp->pdev->dev, paddr)) { |
| 746 | dev_kfree_skb(skb); |
| 747 | break; |
| 748 | } |
| 749 | |
| 750 | bp->rx_skbuff[entry] = skb; |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 751 | |
| 752 | if (entry == RX_RING_SIZE - 1) |
| 753 | paddr |= MACB_BIT(RX_WRAP); |
| 754 | bp->rx_ring[entry].addr = paddr; |
| 755 | bp->rx_ring[entry].ctrl = 0; |
| 756 | |
| 757 | /* properly align Ethernet header */ |
| 758 | skb_reserve(skb, NET_IP_ALIGN); |
Punnaiah Choudary Kalluri | d4c216c | 2015-04-29 08:34:46 +0530 | [diff] [blame] | 759 | } else { |
| 760 | bp->rx_ring[entry].addr &= ~MACB_BIT(RX_USED); |
| 761 | bp->rx_ring[entry].ctrl = 0; |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 762 | } |
| 763 | } |
| 764 | |
| 765 | /* Make descriptor updates visible to hardware */ |
| 766 | wmb(); |
| 767 | |
| 768 | netdev_vdbg(bp->dev, "rx ring: prepared head %d, tail %d\n", |
| 769 | bp->rx_prepared_head, bp->rx_tail); |
| 770 | } |
| 771 | |
| 772 | /* Mark DMA descriptors from begin up to and not including end as unused */ |
| 773 | static void discard_partial_frame(struct macb *bp, unsigned int begin, |
| 774 | unsigned int end) |
| 775 | { |
| 776 | unsigned int frag; |
| 777 | |
| 778 | for (frag = begin; frag != end; frag++) { |
| 779 | struct macb_dma_desc *desc = macb_rx_desc(bp, frag); |
| 780 | desc->addr &= ~MACB_BIT(RX_USED); |
| 781 | } |
| 782 | |
| 783 | /* Make descriptor updates visible to hardware */ |
| 784 | wmb(); |
| 785 | |
| 786 | /* |
| 787 | * When this happens, the hardware stats registers for |
| 788 | * whatever caused this is updated, so we don't have to record |
| 789 | * anything. |
| 790 | */ |
| 791 | } |
| 792 | |
| 793 | static int gem_rx(struct macb *bp, int budget) |
| 794 | { |
| 795 | unsigned int len; |
| 796 | unsigned int entry; |
| 797 | struct sk_buff *skb; |
| 798 | struct macb_dma_desc *desc; |
| 799 | int count = 0; |
| 800 | |
| 801 | while (count < budget) { |
| 802 | u32 addr, ctrl; |
| 803 | |
| 804 | entry = macb_rx_ring_wrap(bp->rx_tail); |
| 805 | desc = &bp->rx_ring[entry]; |
| 806 | |
| 807 | /* Make hw descriptor updates visible to CPU */ |
| 808 | rmb(); |
| 809 | |
| 810 | addr = desc->addr; |
| 811 | ctrl = desc->ctrl; |
| 812 | |
| 813 | if (!(addr & MACB_BIT(RX_USED))) |
| 814 | break; |
| 815 | |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 816 | bp->rx_tail++; |
| 817 | count++; |
| 818 | |
| 819 | if (!(ctrl & MACB_BIT(RX_SOF) && ctrl & MACB_BIT(RX_EOF))) { |
| 820 | netdev_err(bp->dev, |
| 821 | "not whole frame pointed by descriptor\n"); |
| 822 | bp->stats.rx_dropped++; |
| 823 | break; |
| 824 | } |
| 825 | skb = bp->rx_skbuff[entry]; |
| 826 | if (unlikely(!skb)) { |
| 827 | netdev_err(bp->dev, |
| 828 | "inconsistent Rx descriptor chain\n"); |
| 829 | bp->stats.rx_dropped++; |
| 830 | break; |
| 831 | } |
| 832 | /* now everything is ready for receiving packet */ |
| 833 | bp->rx_skbuff[entry] = NULL; |
Harini Katakam | 98b5a0f4 | 2015-05-06 22:27:17 +0530 | [diff] [blame] | 834 | len = ctrl & bp->rx_frm_len_mask; |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 835 | |
| 836 | netdev_vdbg(bp->dev, "gem_rx %u (len %u)\n", entry, len); |
| 837 | |
| 838 | skb_put(skb, len); |
| 839 | addr = MACB_BF(RX_WADDR, MACB_BFEXT(RX_WADDR, addr)); |
| 840 | dma_unmap_single(&bp->pdev->dev, addr, |
Soren Brinkmann | 48330e08 | 2014-03-04 08:46:40 -0800 | [diff] [blame] | 841 | bp->rx_buffer_size, DMA_FROM_DEVICE); |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 842 | |
| 843 | skb->protocol = eth_type_trans(skb, bp->dev); |
| 844 | skb_checksum_none_assert(skb); |
Cyrille Pitchen | 924ec53 | 2014-07-24 13:51:01 +0200 | [diff] [blame] | 845 | if (bp->dev->features & NETIF_F_RXCSUM && |
| 846 | !(bp->dev->flags & IFF_PROMISC) && |
| 847 | GEM_BFEXT(RX_CSUM, ctrl) & GEM_RX_CSUM_CHECKED_MASK) |
| 848 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 849 | |
| 850 | bp->stats.rx_packets++; |
| 851 | bp->stats.rx_bytes += skb->len; |
| 852 | |
| 853 | #if defined(DEBUG) && defined(VERBOSE_DEBUG) |
| 854 | netdev_vdbg(bp->dev, "received skb of length %u, csum: %08x\n", |
| 855 | skb->len, skb->csum); |
| 856 | print_hex_dump(KERN_DEBUG, " mac: ", DUMP_PREFIX_ADDRESS, 16, 1, |
Cyrille Pitchen | 51f8301 | 2014-12-11 11:15:54 +0100 | [diff] [blame] | 857 | skb_mac_header(skb), 16, true); |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 858 | print_hex_dump(KERN_DEBUG, "data: ", DUMP_PREFIX_ADDRESS, 16, 1, |
| 859 | skb->data, 32, true); |
| 860 | #endif |
| 861 | |
| 862 | netif_receive_skb(skb); |
| 863 | } |
| 864 | |
| 865 | gem_rx_refill(bp); |
| 866 | |
| 867 | return count; |
| 868 | } |
| 869 | |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 870 | static int macb_rx_frame(struct macb *bp, unsigned int first_frag, |
| 871 | unsigned int last_frag) |
| 872 | { |
| 873 | unsigned int len; |
| 874 | unsigned int frag; |
Havard Skinnemoen | 29bc2e1 | 2012-10-31 06:04:58 +0000 | [diff] [blame] | 875 | unsigned int offset; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 876 | struct sk_buff *skb; |
Havard Skinnemoen | 55054a1 | 2012-10-31 06:04:55 +0000 | [diff] [blame] | 877 | struct macb_dma_desc *desc; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 878 | |
Havard Skinnemoen | 55054a1 | 2012-10-31 06:04:55 +0000 | [diff] [blame] | 879 | desc = macb_rx_desc(bp, last_frag); |
Harini Katakam | 98b5a0f4 | 2015-05-06 22:27:17 +0530 | [diff] [blame] | 880 | len = desc->ctrl & bp->rx_frm_len_mask; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 881 | |
Havard Skinnemoen | a268adb | 2012-10-31 06:04:52 +0000 | [diff] [blame] | 882 | netdev_vdbg(bp->dev, "macb_rx_frame frags %u - %u (len %u)\n", |
Havard Skinnemoen | 55054a1 | 2012-10-31 06:04:55 +0000 | [diff] [blame] | 883 | macb_rx_ring_wrap(first_frag), |
| 884 | macb_rx_ring_wrap(last_frag), len); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 885 | |
Havard Skinnemoen | 29bc2e1 | 2012-10-31 06:04:58 +0000 | [diff] [blame] | 886 | /* |
| 887 | * The ethernet header starts NET_IP_ALIGN bytes into the |
| 888 | * first buffer. Since the header is 14 bytes, this makes the |
| 889 | * payload word-aligned. |
| 890 | * |
| 891 | * Instead of calling skb_reserve(NET_IP_ALIGN), we just copy |
| 892 | * the two padding bytes into the skb so that we avoid hitting |
| 893 | * the slowpath in memcpy(), and pull them off afterwards. |
| 894 | */ |
| 895 | skb = netdev_alloc_skb(bp->dev, len + NET_IP_ALIGN); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 896 | if (!skb) { |
| 897 | bp->stats.rx_dropped++; |
Havard Skinnemoen | 55054a1 | 2012-10-31 06:04:55 +0000 | [diff] [blame] | 898 | for (frag = first_frag; ; frag++) { |
| 899 | desc = macb_rx_desc(bp, frag); |
| 900 | desc->addr &= ~MACB_BIT(RX_USED); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 901 | if (frag == last_frag) |
| 902 | break; |
| 903 | } |
Havard Skinnemoen | 03dbe05 | 2012-10-31 06:04:51 +0000 | [diff] [blame] | 904 | |
| 905 | /* Make descriptor updates visible to hardware */ |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 906 | wmb(); |
Havard Skinnemoen | 03dbe05 | 2012-10-31 06:04:51 +0000 | [diff] [blame] | 907 | |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 908 | return 1; |
| 909 | } |
| 910 | |
Havard Skinnemoen | 29bc2e1 | 2012-10-31 06:04:58 +0000 | [diff] [blame] | 911 | offset = 0; |
| 912 | len += NET_IP_ALIGN; |
Eric Dumazet | bc8acf2 | 2010-09-02 13:07:41 -0700 | [diff] [blame] | 913 | skb_checksum_none_assert(skb); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 914 | skb_put(skb, len); |
| 915 | |
Havard Skinnemoen | 55054a1 | 2012-10-31 06:04:55 +0000 | [diff] [blame] | 916 | for (frag = first_frag; ; frag++) { |
Nicolas Ferre | 1b44791 | 2013-06-04 21:57:11 +0000 | [diff] [blame] | 917 | unsigned int frag_len = bp->rx_buffer_size; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 918 | |
| 919 | if (offset + frag_len > len) { |
Cyrille Pitchen | 9ba723b | 2016-03-25 10:37:34 +0100 | [diff] [blame] | 920 | if (unlikely(frag != last_frag)) { |
| 921 | dev_kfree_skb_any(skb); |
| 922 | return -1; |
| 923 | } |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 924 | frag_len = len - offset; |
| 925 | } |
Arnaldo Carvalho de Melo | 27d7ff4 | 2007-03-31 11:55:19 -0300 | [diff] [blame] | 926 | skb_copy_to_linear_data_offset(skb, offset, |
Havard Skinnemoen | 55054a1 | 2012-10-31 06:04:55 +0000 | [diff] [blame] | 927 | macb_rx_buffer(bp, frag), frag_len); |
Nicolas Ferre | 1b44791 | 2013-06-04 21:57:11 +0000 | [diff] [blame] | 928 | offset += bp->rx_buffer_size; |
Havard Skinnemoen | 55054a1 | 2012-10-31 06:04:55 +0000 | [diff] [blame] | 929 | desc = macb_rx_desc(bp, frag); |
| 930 | desc->addr &= ~MACB_BIT(RX_USED); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 931 | |
| 932 | if (frag == last_frag) |
| 933 | break; |
| 934 | } |
| 935 | |
Havard Skinnemoen | 03dbe05 | 2012-10-31 06:04:51 +0000 | [diff] [blame] | 936 | /* Make descriptor updates visible to hardware */ |
| 937 | wmb(); |
| 938 | |
Havard Skinnemoen | 29bc2e1 | 2012-10-31 06:04:58 +0000 | [diff] [blame] | 939 | __skb_pull(skb, NET_IP_ALIGN); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 940 | skb->protocol = eth_type_trans(skb, bp->dev); |
| 941 | |
| 942 | bp->stats.rx_packets++; |
Havard Skinnemoen | 29bc2e1 | 2012-10-31 06:04:58 +0000 | [diff] [blame] | 943 | bp->stats.rx_bytes += skb->len; |
Havard Skinnemoen | a268adb | 2012-10-31 06:04:52 +0000 | [diff] [blame] | 944 | netdev_vdbg(bp->dev, "received skb of length %u, csum: %08x\n", |
Jamie Iles | c220f8c | 2011-03-08 20:27:08 +0000 | [diff] [blame] | 945 | skb->len, skb->csum); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 946 | netif_receive_skb(skb); |
| 947 | |
| 948 | return 0; |
| 949 | } |
| 950 | |
Cyrille Pitchen | 9ba723b | 2016-03-25 10:37:34 +0100 | [diff] [blame] | 951 | static inline void macb_init_rx_ring(struct macb *bp) |
| 952 | { |
| 953 | dma_addr_t addr; |
| 954 | int i; |
| 955 | |
| 956 | addr = bp->rx_buffers_dma; |
| 957 | for (i = 0; i < RX_RING_SIZE; i++) { |
| 958 | bp->rx_ring[i].addr = addr; |
| 959 | bp->rx_ring[i].ctrl = 0; |
| 960 | addr += bp->rx_buffer_size; |
| 961 | } |
| 962 | bp->rx_ring[RX_RING_SIZE - 1].addr |= MACB_BIT(RX_WRAP); |
| 963 | } |
| 964 | |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 965 | static int macb_rx(struct macb *bp, int budget) |
| 966 | { |
Cyrille Pitchen | 9ba723b | 2016-03-25 10:37:34 +0100 | [diff] [blame] | 967 | bool reset_rx_queue = false; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 968 | int received = 0; |
Havard Skinnemoen | 55054a1 | 2012-10-31 06:04:55 +0000 | [diff] [blame] | 969 | unsigned int tail; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 970 | int first_frag = -1; |
| 971 | |
Havard Skinnemoen | 55054a1 | 2012-10-31 06:04:55 +0000 | [diff] [blame] | 972 | for (tail = bp->rx_tail; budget > 0; tail++) { |
| 973 | struct macb_dma_desc *desc = macb_rx_desc(bp, tail); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 974 | u32 addr, ctrl; |
| 975 | |
Havard Skinnemoen | 03dbe05 | 2012-10-31 06:04:51 +0000 | [diff] [blame] | 976 | /* Make hw descriptor updates visible to CPU */ |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 977 | rmb(); |
Havard Skinnemoen | 03dbe05 | 2012-10-31 06:04:51 +0000 | [diff] [blame] | 978 | |
Havard Skinnemoen | 55054a1 | 2012-10-31 06:04:55 +0000 | [diff] [blame] | 979 | addr = desc->addr; |
| 980 | ctrl = desc->ctrl; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 981 | |
| 982 | if (!(addr & MACB_BIT(RX_USED))) |
| 983 | break; |
| 984 | |
| 985 | if (ctrl & MACB_BIT(RX_SOF)) { |
| 986 | if (first_frag != -1) |
| 987 | discard_partial_frame(bp, first_frag, tail); |
| 988 | first_frag = tail; |
| 989 | } |
| 990 | |
| 991 | if (ctrl & MACB_BIT(RX_EOF)) { |
| 992 | int dropped; |
Cyrille Pitchen | 9ba723b | 2016-03-25 10:37:34 +0100 | [diff] [blame] | 993 | |
| 994 | if (unlikely(first_frag == -1)) { |
| 995 | reset_rx_queue = true; |
| 996 | continue; |
| 997 | } |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 998 | |
| 999 | dropped = macb_rx_frame(bp, first_frag, tail); |
| 1000 | first_frag = -1; |
Cyrille Pitchen | 9ba723b | 2016-03-25 10:37:34 +0100 | [diff] [blame] | 1001 | if (unlikely(dropped < 0)) { |
| 1002 | reset_rx_queue = true; |
| 1003 | continue; |
| 1004 | } |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1005 | if (!dropped) { |
| 1006 | received++; |
| 1007 | budget--; |
| 1008 | } |
| 1009 | } |
| 1010 | } |
| 1011 | |
Cyrille Pitchen | 9ba723b | 2016-03-25 10:37:34 +0100 | [diff] [blame] | 1012 | if (unlikely(reset_rx_queue)) { |
| 1013 | unsigned long flags; |
| 1014 | u32 ctrl; |
| 1015 | |
| 1016 | netdev_err(bp->dev, "RX queue corruption: reset it\n"); |
| 1017 | |
| 1018 | spin_lock_irqsave(&bp->lock, flags); |
| 1019 | |
| 1020 | ctrl = macb_readl(bp, NCR); |
| 1021 | macb_writel(bp, NCR, ctrl & ~MACB_BIT(RE)); |
| 1022 | |
| 1023 | macb_init_rx_ring(bp); |
| 1024 | macb_writel(bp, RBQP, bp->rx_ring_dma); |
| 1025 | |
| 1026 | macb_writel(bp, NCR, ctrl | MACB_BIT(RE)); |
| 1027 | |
| 1028 | spin_unlock_irqrestore(&bp->lock, flags); |
| 1029 | return received; |
| 1030 | } |
| 1031 | |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1032 | if (first_frag != -1) |
| 1033 | bp->rx_tail = first_frag; |
| 1034 | else |
| 1035 | bp->rx_tail = tail; |
| 1036 | |
| 1037 | return received; |
| 1038 | } |
| 1039 | |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 1040 | static int macb_poll(struct napi_struct *napi, int budget) |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1041 | { |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 1042 | struct macb *bp = container_of(napi, struct macb, napi); |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 1043 | int work_done; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1044 | u32 status; |
| 1045 | |
| 1046 | status = macb_readl(bp, RSR); |
| 1047 | macb_writel(bp, RSR, status); |
| 1048 | |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 1049 | work_done = 0; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1050 | |
Havard Skinnemoen | a268adb | 2012-10-31 06:04:52 +0000 | [diff] [blame] | 1051 | netdev_vdbg(bp->dev, "poll: status = %08lx, budget = %d\n", |
Jamie Iles | c220f8c | 2011-03-08 20:27:08 +0000 | [diff] [blame] | 1052 | (unsigned long)status, budget); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1053 | |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 1054 | work_done = bp->macbgem_ops.mog_rx(bp, budget); |
Joshua Hoke | b336369 | 2010-10-25 01:44:22 +0000 | [diff] [blame] | 1055 | if (work_done < budget) { |
Ben Hutchings | 288379f | 2009-01-19 16:43:59 -0800 | [diff] [blame] | 1056 | napi_complete(napi); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1057 | |
Nicolas Ferre | 8770e91 | 2013-02-12 11:08:48 +0100 | [diff] [blame] | 1058 | /* Packets received while interrupts were disabled */ |
| 1059 | status = macb_readl(bp, RSR); |
Soren Brinkmann | 504ad98 | 2014-05-04 15:43:01 -0700 | [diff] [blame] | 1060 | if (status) { |
Soren Brinkmann | 02f7a34 | 2014-05-04 15:43:00 -0700 | [diff] [blame] | 1061 | if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) |
| 1062 | macb_writel(bp, ISR, MACB_BIT(RCOMP)); |
Nicolas Ferre | 8770e91 | 2013-02-12 11:08:48 +0100 | [diff] [blame] | 1063 | napi_reschedule(napi); |
Soren Brinkmann | 02f7a34 | 2014-05-04 15:43:00 -0700 | [diff] [blame] | 1064 | } else { |
| 1065 | macb_writel(bp, IER, MACB_RX_INT_FLAGS); |
| 1066 | } |
Joshua Hoke | b336369 | 2010-10-25 01:44:22 +0000 | [diff] [blame] | 1067 | } |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1068 | |
| 1069 | /* TODO: Handle errors */ |
| 1070 | |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 1071 | return work_done; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1072 | } |
| 1073 | |
| 1074 | static irqreturn_t macb_interrupt(int irq, void *dev_id) |
| 1075 | { |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1076 | struct macb_queue *queue = dev_id; |
| 1077 | struct macb *bp = queue->bp; |
| 1078 | struct net_device *dev = bp->dev; |
Nathan Sullivan | bfbb92c | 2015-05-05 15:00:25 -0500 | [diff] [blame] | 1079 | u32 status, ctrl; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1080 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1081 | status = queue_readl(queue, ISR); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1082 | |
| 1083 | if (unlikely(!status)) |
| 1084 | return IRQ_NONE; |
| 1085 | |
| 1086 | spin_lock(&bp->lock); |
| 1087 | |
| 1088 | while (status) { |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1089 | /* close possible race with dev_close */ |
| 1090 | if (unlikely(!netif_running(dev))) { |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1091 | queue_writel(queue, IDR, -1); |
Nathan Sullivan | 2446837 | 2016-01-14 13:27:27 -0600 | [diff] [blame] | 1092 | if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) |
| 1093 | queue_writel(queue, ISR, -1); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1094 | break; |
| 1095 | } |
| 1096 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1097 | netdev_vdbg(bp->dev, "queue = %u, isr = 0x%08lx\n", |
| 1098 | (unsigned int)(queue - bp->queues), |
| 1099 | (unsigned long)status); |
Havard Skinnemoen | a268adb | 2012-10-31 06:04:52 +0000 | [diff] [blame] | 1100 | |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1101 | if (status & MACB_RX_INT_FLAGS) { |
Joshua Hoke | b336369 | 2010-10-25 01:44:22 +0000 | [diff] [blame] | 1102 | /* |
| 1103 | * There's no point taking any more interrupts |
| 1104 | * until we have processed the buffers. The |
| 1105 | * scheduling call may fail if the poll routine |
| 1106 | * is already scheduled, so disable interrupts |
| 1107 | * now. |
| 1108 | */ |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1109 | queue_writel(queue, IDR, MACB_RX_INT_FLAGS); |
Nicolas Ferre | 581df9e | 2013-05-14 03:00:16 +0000 | [diff] [blame] | 1110 | if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1111 | queue_writel(queue, ISR, MACB_BIT(RCOMP)); |
Joshua Hoke | b336369 | 2010-10-25 01:44:22 +0000 | [diff] [blame] | 1112 | |
Ben Hutchings | 288379f | 2009-01-19 16:43:59 -0800 | [diff] [blame] | 1113 | if (napi_schedule_prep(&bp->napi)) { |
Havard Skinnemoen | a268adb | 2012-10-31 06:04:52 +0000 | [diff] [blame] | 1114 | netdev_vdbg(bp->dev, "scheduling RX softirq\n"); |
Ben Hutchings | 288379f | 2009-01-19 16:43:59 -0800 | [diff] [blame] | 1115 | __napi_schedule(&bp->napi); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1116 | } |
| 1117 | } |
| 1118 | |
Nicolas Ferre | e86cd53 | 2012-10-31 06:04:57 +0000 | [diff] [blame] | 1119 | if (unlikely(status & (MACB_TX_ERR_FLAGS))) { |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1120 | queue_writel(queue, IDR, MACB_TX_INT_FLAGS); |
| 1121 | schedule_work(&queue->tx_error_task); |
Soren Brinkmann | 6a027b7 | 2014-05-04 15:42:59 -0700 | [diff] [blame] | 1122 | |
| 1123 | if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1124 | queue_writel(queue, ISR, MACB_TX_ERR_FLAGS); |
Soren Brinkmann | 6a027b7 | 2014-05-04 15:42:59 -0700 | [diff] [blame] | 1125 | |
Nicolas Ferre | e86cd53 | 2012-10-31 06:04:57 +0000 | [diff] [blame] | 1126 | break; |
| 1127 | } |
| 1128 | |
| 1129 | if (status & MACB_BIT(TCOMP)) |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1130 | macb_tx_interrupt(queue); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1131 | |
| 1132 | /* |
| 1133 | * Link change detection isn't possible with RMII, so we'll |
| 1134 | * add that if/when we get our hands on a full-blown MII PHY. |
| 1135 | */ |
| 1136 | |
Nathan Sullivan | 86b5e7d | 2015-05-13 17:01:36 -0500 | [diff] [blame] | 1137 | /* There is a hardware issue under heavy load where DMA can |
| 1138 | * stop, this causes endless "used buffer descriptor read" |
| 1139 | * interrupts but it can be cleared by re-enabling RX. See |
| 1140 | * the at91 manual, section 41.3.1 or the Zynq manual |
| 1141 | * section 16.7.4 for details. |
| 1142 | */ |
Nathan Sullivan | bfbb92c | 2015-05-05 15:00:25 -0500 | [diff] [blame] | 1143 | if (status & MACB_BIT(RXUBR)) { |
| 1144 | ctrl = macb_readl(bp, NCR); |
| 1145 | macb_writel(bp, NCR, ctrl & ~MACB_BIT(RE)); |
| 1146 | macb_writel(bp, NCR, ctrl | MACB_BIT(RE)); |
| 1147 | |
| 1148 | if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) |
Cyrille Pitchen | ba50499 | 2016-03-24 15:40:04 +0100 | [diff] [blame] | 1149 | queue_writel(queue, ISR, MACB_BIT(RXUBR)); |
Nathan Sullivan | bfbb92c | 2015-05-05 15:00:25 -0500 | [diff] [blame] | 1150 | } |
| 1151 | |
Alexander Stein | b19f7f7 | 2011-04-13 05:03:24 +0000 | [diff] [blame] | 1152 | if (status & MACB_BIT(ISR_ROVR)) { |
| 1153 | /* We missed at least one packet */ |
Jamie Iles | f75ba50 | 2011-11-08 10:12:32 +0000 | [diff] [blame] | 1154 | if (macb_is_gem(bp)) |
| 1155 | bp->hw_stats.gem.rx_overruns++; |
| 1156 | else |
| 1157 | bp->hw_stats.macb.rx_overruns++; |
Soren Brinkmann | 6a027b7 | 2014-05-04 15:42:59 -0700 | [diff] [blame] | 1158 | |
| 1159 | if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1160 | queue_writel(queue, ISR, MACB_BIT(ISR_ROVR)); |
Alexander Stein | b19f7f7 | 2011-04-13 05:03:24 +0000 | [diff] [blame] | 1161 | } |
| 1162 | |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1163 | if (status & MACB_BIT(HRESP)) { |
| 1164 | /* |
Jamie Iles | c220f8c | 2011-03-08 20:27:08 +0000 | [diff] [blame] | 1165 | * TODO: Reset the hardware, and maybe move the |
| 1166 | * netdev_err to a lower-priority context as well |
| 1167 | * (work queue?) |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1168 | */ |
Jamie Iles | c220f8c | 2011-03-08 20:27:08 +0000 | [diff] [blame] | 1169 | netdev_err(dev, "DMA bus error: HRESP not OK\n"); |
Soren Brinkmann | 6a027b7 | 2014-05-04 15:42:59 -0700 | [diff] [blame] | 1170 | |
| 1171 | if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1172 | queue_writel(queue, ISR, MACB_BIT(HRESP)); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1173 | } |
| 1174 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1175 | status = queue_readl(queue, ISR); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1176 | } |
| 1177 | |
| 1178 | spin_unlock(&bp->lock); |
| 1179 | |
| 1180 | return IRQ_HANDLED; |
| 1181 | } |
| 1182 | |
Thomas Petazzoni | 6e8cf5c | 2009-05-04 11:08:41 -0700 | [diff] [blame] | 1183 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 1184 | /* |
| 1185 | * Polling receive - used by netconsole and other diagnostic tools |
| 1186 | * to allow network i/o with interrupts disabled. |
| 1187 | */ |
| 1188 | static void macb_poll_controller(struct net_device *dev) |
| 1189 | { |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1190 | struct macb *bp = netdev_priv(dev); |
| 1191 | struct macb_queue *queue; |
Thomas Petazzoni | 6e8cf5c | 2009-05-04 11:08:41 -0700 | [diff] [blame] | 1192 | unsigned long flags; |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1193 | unsigned int q; |
Thomas Petazzoni | 6e8cf5c | 2009-05-04 11:08:41 -0700 | [diff] [blame] | 1194 | |
| 1195 | local_irq_save(flags); |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1196 | for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) |
| 1197 | macb_interrupt(dev->irq, queue); |
Thomas Petazzoni | 6e8cf5c | 2009-05-04 11:08:41 -0700 | [diff] [blame] | 1198 | local_irq_restore(flags); |
| 1199 | } |
| 1200 | #endif |
| 1201 | |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 1202 | static unsigned int macb_tx_map(struct macb *bp, |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1203 | struct macb_queue *queue, |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 1204 | struct sk_buff *skb) |
| 1205 | { |
| 1206 | dma_addr_t mapping; |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1207 | unsigned int len, entry, i, tx_head = queue->tx_head; |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 1208 | struct macb_tx_skb *tx_skb = NULL; |
| 1209 | struct macb_dma_desc *desc; |
| 1210 | unsigned int offset, size, count = 0; |
| 1211 | unsigned int f, nr_frags = skb_shinfo(skb)->nr_frags; |
| 1212 | unsigned int eof = 1; |
| 1213 | u32 ctrl; |
| 1214 | |
| 1215 | /* First, map non-paged data */ |
| 1216 | len = skb_headlen(skb); |
| 1217 | offset = 0; |
| 1218 | while (len) { |
| 1219 | size = min(len, bp->max_tx_length); |
| 1220 | entry = macb_tx_ring_wrap(tx_head); |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1221 | tx_skb = &queue->tx_skb[entry]; |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 1222 | |
| 1223 | mapping = dma_map_single(&bp->pdev->dev, |
| 1224 | skb->data + offset, |
| 1225 | size, DMA_TO_DEVICE); |
| 1226 | if (dma_mapping_error(&bp->pdev->dev, mapping)) |
| 1227 | goto dma_error; |
| 1228 | |
| 1229 | /* Save info to properly release resources */ |
| 1230 | tx_skb->skb = NULL; |
| 1231 | tx_skb->mapping = mapping; |
| 1232 | tx_skb->size = size; |
| 1233 | tx_skb->mapped_as_page = false; |
| 1234 | |
| 1235 | len -= size; |
| 1236 | offset += size; |
| 1237 | count++; |
| 1238 | tx_head++; |
| 1239 | } |
| 1240 | |
| 1241 | /* Then, map paged data from fragments */ |
| 1242 | for (f = 0; f < nr_frags; f++) { |
| 1243 | const skb_frag_t *frag = &skb_shinfo(skb)->frags[f]; |
| 1244 | |
| 1245 | len = skb_frag_size(frag); |
| 1246 | offset = 0; |
| 1247 | while (len) { |
| 1248 | size = min(len, bp->max_tx_length); |
| 1249 | entry = macb_tx_ring_wrap(tx_head); |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1250 | tx_skb = &queue->tx_skb[entry]; |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 1251 | |
| 1252 | mapping = skb_frag_dma_map(&bp->pdev->dev, frag, |
| 1253 | offset, size, DMA_TO_DEVICE); |
| 1254 | if (dma_mapping_error(&bp->pdev->dev, mapping)) |
| 1255 | goto dma_error; |
| 1256 | |
| 1257 | /* Save info to properly release resources */ |
| 1258 | tx_skb->skb = NULL; |
| 1259 | tx_skb->mapping = mapping; |
| 1260 | tx_skb->size = size; |
| 1261 | tx_skb->mapped_as_page = true; |
| 1262 | |
| 1263 | len -= size; |
| 1264 | offset += size; |
| 1265 | count++; |
| 1266 | tx_head++; |
| 1267 | } |
| 1268 | } |
| 1269 | |
| 1270 | /* Should never happen */ |
| 1271 | if (unlikely(tx_skb == NULL)) { |
| 1272 | netdev_err(bp->dev, "BUG! empty skb!\n"); |
| 1273 | return 0; |
| 1274 | } |
| 1275 | |
| 1276 | /* This is the last buffer of the frame: save socket buffer */ |
| 1277 | tx_skb->skb = skb; |
| 1278 | |
| 1279 | /* Update TX ring: update buffer descriptors in reverse order |
| 1280 | * to avoid race condition |
| 1281 | */ |
| 1282 | |
| 1283 | /* Set 'TX_USED' bit in buffer descriptor at tx_head position |
| 1284 | * to set the end of TX queue |
| 1285 | */ |
| 1286 | i = tx_head; |
| 1287 | entry = macb_tx_ring_wrap(i); |
| 1288 | ctrl = MACB_BIT(TX_USED); |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1289 | desc = &queue->tx_ring[entry]; |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 1290 | desc->ctrl = ctrl; |
| 1291 | |
| 1292 | do { |
| 1293 | i--; |
| 1294 | entry = macb_tx_ring_wrap(i); |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1295 | tx_skb = &queue->tx_skb[entry]; |
| 1296 | desc = &queue->tx_ring[entry]; |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 1297 | |
| 1298 | ctrl = (u32)tx_skb->size; |
| 1299 | if (eof) { |
| 1300 | ctrl |= MACB_BIT(TX_LAST); |
| 1301 | eof = 0; |
| 1302 | } |
| 1303 | if (unlikely(entry == (TX_RING_SIZE - 1))) |
| 1304 | ctrl |= MACB_BIT(TX_WRAP); |
| 1305 | |
| 1306 | /* Set TX buffer descriptor */ |
| 1307 | desc->addr = tx_skb->mapping; |
| 1308 | /* desc->addr must be visible to hardware before clearing |
| 1309 | * 'TX_USED' bit in desc->ctrl. |
| 1310 | */ |
| 1311 | wmb(); |
| 1312 | desc->ctrl = ctrl; |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1313 | } while (i != queue->tx_head); |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 1314 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1315 | queue->tx_head = tx_head; |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 1316 | |
| 1317 | return count; |
| 1318 | |
| 1319 | dma_error: |
| 1320 | netdev_err(bp->dev, "TX DMA map failed\n"); |
| 1321 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1322 | for (i = queue->tx_head; i != tx_head; i++) { |
| 1323 | tx_skb = macb_tx_skb(queue, i); |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 1324 | |
| 1325 | macb_tx_unmap(bp, tx_skb); |
| 1326 | } |
| 1327 | |
| 1328 | return 0; |
| 1329 | } |
| 1330 | |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1331 | static int macb_start_xmit(struct sk_buff *skb, struct net_device *dev) |
| 1332 | { |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1333 | u16 queue_index = skb_get_queue_mapping(skb); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1334 | struct macb *bp = netdev_priv(dev); |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1335 | struct macb_queue *queue = &bp->queues[queue_index]; |
Dongdong Deng | 4871953 | 2009-08-23 19:49:07 -0700 | [diff] [blame] | 1336 | unsigned long flags; |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 1337 | unsigned int count, nr_frags, frag_size, f; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1338 | |
Havard Skinnemoen | a268adb | 2012-10-31 06:04:52 +0000 | [diff] [blame] | 1339 | #if defined(DEBUG) && defined(VERBOSE_DEBUG) |
| 1340 | netdev_vdbg(bp->dev, |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1341 | "start_xmit: queue %hu len %u head %p data %p tail %p end %p\n", |
| 1342 | queue_index, skb->len, skb->head, skb->data, |
Jamie Iles | c220f8c | 2011-03-08 20:27:08 +0000 | [diff] [blame] | 1343 | skb_tail_pointer(skb), skb_end_pointer(skb)); |
| 1344 | print_hex_dump(KERN_DEBUG, "data: ", DUMP_PREFIX_OFFSET, 16, 1, |
| 1345 | skb->data, 16, true); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1346 | #endif |
| 1347 | |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 1348 | /* Count how many TX buffer descriptors are needed to send this |
| 1349 | * socket buffer: skb fragments of jumbo frames may need to be |
| 1350 | * splitted into many buffer descriptors. |
| 1351 | */ |
Andy Shevchenko | 94b295e | 2015-07-24 21:24:03 +0300 | [diff] [blame] | 1352 | count = DIV_ROUND_UP(skb_headlen(skb), bp->max_tx_length); |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 1353 | nr_frags = skb_shinfo(skb)->nr_frags; |
| 1354 | for (f = 0; f < nr_frags; f++) { |
| 1355 | frag_size = skb_frag_size(&skb_shinfo(skb)->frags[f]); |
Andy Shevchenko | 94b295e | 2015-07-24 21:24:03 +0300 | [diff] [blame] | 1356 | count += DIV_ROUND_UP(frag_size, bp->max_tx_length); |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 1357 | } |
| 1358 | |
Dongdong Deng | 4871953 | 2009-08-23 19:49:07 -0700 | [diff] [blame] | 1359 | spin_lock_irqsave(&bp->lock, flags); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1360 | |
| 1361 | /* This is a hard error, log it. */ |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1362 | if (CIRC_SPACE(queue->tx_head, queue->tx_tail, TX_RING_SIZE) < count) { |
| 1363 | netif_stop_subqueue(dev, queue_index); |
Dongdong Deng | 4871953 | 2009-08-23 19:49:07 -0700 | [diff] [blame] | 1364 | spin_unlock_irqrestore(&bp->lock, flags); |
Jamie Iles | c220f8c | 2011-03-08 20:27:08 +0000 | [diff] [blame] | 1365 | netdev_dbg(bp->dev, "tx_head = %u, tx_tail = %u\n", |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1366 | queue->tx_head, queue->tx_tail); |
Patrick McHardy | 5b54814 | 2009-06-12 06:22:29 +0000 | [diff] [blame] | 1367 | return NETDEV_TX_BUSY; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1368 | } |
| 1369 | |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 1370 | /* Map socket buffer for DMA transfer */ |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1371 | if (!macb_tx_map(bp, queue, skb)) { |
Eric W. Biederman | c88b5b6 | 2014-03-15 16:08:27 -0700 | [diff] [blame] | 1372 | dev_kfree_skb_any(skb); |
Soren Brinkmann | 9203090 | 2014-03-04 08:46:39 -0800 | [diff] [blame] | 1373 | goto unlock; |
| 1374 | } |
Havard Skinnemoen | 55054a1 | 2012-10-31 06:04:55 +0000 | [diff] [blame] | 1375 | |
Havard Skinnemoen | 03dbe05 | 2012-10-31 06:04:51 +0000 | [diff] [blame] | 1376 | /* Make newly initialized descriptor visible to hardware */ |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1377 | wmb(); |
| 1378 | |
Richard Cochran | e072092 | 2011-06-19 21:51:28 +0000 | [diff] [blame] | 1379 | skb_tx_timestamp(skb); |
| 1380 | |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1381 | macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(TSTART)); |
| 1382 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1383 | if (CIRC_SPACE(queue->tx_head, queue->tx_tail, TX_RING_SIZE) < 1) |
| 1384 | netif_stop_subqueue(dev, queue_index); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1385 | |
Soren Brinkmann | 9203090 | 2014-03-04 08:46:39 -0800 | [diff] [blame] | 1386 | unlock: |
Dongdong Deng | 4871953 | 2009-08-23 19:49:07 -0700 | [diff] [blame] | 1387 | spin_unlock_irqrestore(&bp->lock, flags); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1388 | |
Patrick McHardy | 6ed1065 | 2009-06-23 06:03:08 +0000 | [diff] [blame] | 1389 | return NETDEV_TX_OK; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1390 | } |
| 1391 | |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 1392 | static void macb_init_rx_buffer_size(struct macb *bp, size_t size) |
Nicolas Ferre | 1b44791 | 2013-06-04 21:57:11 +0000 | [diff] [blame] | 1393 | { |
| 1394 | if (!macb_is_gem(bp)) { |
| 1395 | bp->rx_buffer_size = MACB_RX_BUFFER_SIZE; |
| 1396 | } else { |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 1397 | bp->rx_buffer_size = size; |
Nicolas Ferre | 1b44791 | 2013-06-04 21:57:11 +0000 | [diff] [blame] | 1398 | |
Nicolas Ferre | 1b44791 | 2013-06-04 21:57:11 +0000 | [diff] [blame] | 1399 | if (bp->rx_buffer_size % RX_BUFFER_MULTIPLE) { |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 1400 | netdev_dbg(bp->dev, |
| 1401 | "RX buffer must be multiple of %d bytes, expanding\n", |
Nicolas Ferre | 1b44791 | 2013-06-04 21:57:11 +0000 | [diff] [blame] | 1402 | RX_BUFFER_MULTIPLE); |
| 1403 | bp->rx_buffer_size = |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 1404 | roundup(bp->rx_buffer_size, RX_BUFFER_MULTIPLE); |
Nicolas Ferre | 1b44791 | 2013-06-04 21:57:11 +0000 | [diff] [blame] | 1405 | } |
Nicolas Ferre | 1b44791 | 2013-06-04 21:57:11 +0000 | [diff] [blame] | 1406 | } |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 1407 | |
| 1408 | netdev_dbg(bp->dev, "mtu [%u] rx_buffer_size [%Zu]\n", |
| 1409 | bp->dev->mtu, bp->rx_buffer_size); |
Nicolas Ferre | 1b44791 | 2013-06-04 21:57:11 +0000 | [diff] [blame] | 1410 | } |
| 1411 | |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 1412 | static void gem_free_rx_buffers(struct macb *bp) |
| 1413 | { |
| 1414 | struct sk_buff *skb; |
| 1415 | struct macb_dma_desc *desc; |
| 1416 | dma_addr_t addr; |
| 1417 | int i; |
| 1418 | |
| 1419 | if (!bp->rx_skbuff) |
| 1420 | return; |
| 1421 | |
| 1422 | for (i = 0; i < RX_RING_SIZE; i++) { |
| 1423 | skb = bp->rx_skbuff[i]; |
| 1424 | |
| 1425 | if (skb == NULL) |
| 1426 | continue; |
| 1427 | |
| 1428 | desc = &bp->rx_ring[i]; |
| 1429 | addr = MACB_BF(RX_WADDR, MACB_BFEXT(RX_WADDR, desc->addr)); |
Soren Brinkmann | ccd6d0a | 2014-05-04 15:42:58 -0700 | [diff] [blame] | 1430 | dma_unmap_single(&bp->pdev->dev, addr, bp->rx_buffer_size, |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 1431 | DMA_FROM_DEVICE); |
| 1432 | dev_kfree_skb_any(skb); |
| 1433 | skb = NULL; |
| 1434 | } |
| 1435 | |
| 1436 | kfree(bp->rx_skbuff); |
| 1437 | bp->rx_skbuff = NULL; |
| 1438 | } |
| 1439 | |
| 1440 | static void macb_free_rx_buffers(struct macb *bp) |
| 1441 | { |
| 1442 | if (bp->rx_buffers) { |
| 1443 | dma_free_coherent(&bp->pdev->dev, |
| 1444 | RX_RING_SIZE * bp->rx_buffer_size, |
| 1445 | bp->rx_buffers, bp->rx_buffers_dma); |
| 1446 | bp->rx_buffers = NULL; |
| 1447 | } |
| 1448 | } |
Nicolas Ferre | 1b44791 | 2013-06-04 21:57:11 +0000 | [diff] [blame] | 1449 | |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1450 | static void macb_free_consistent(struct macb *bp) |
| 1451 | { |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1452 | struct macb_queue *queue; |
| 1453 | unsigned int q; |
| 1454 | |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 1455 | bp->macbgem_ops.mog_free_rx_buffers(bp); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1456 | if (bp->rx_ring) { |
| 1457 | dma_free_coherent(&bp->pdev->dev, RX_RING_BYTES, |
| 1458 | bp->rx_ring, bp->rx_ring_dma); |
| 1459 | bp->rx_ring = NULL; |
| 1460 | } |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1461 | |
| 1462 | for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { |
| 1463 | kfree(queue->tx_skb); |
| 1464 | queue->tx_skb = NULL; |
| 1465 | if (queue->tx_ring) { |
| 1466 | dma_free_coherent(&bp->pdev->dev, TX_RING_BYTES, |
| 1467 | queue->tx_ring, queue->tx_ring_dma); |
| 1468 | queue->tx_ring = NULL; |
| 1469 | } |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1470 | } |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 1471 | } |
| 1472 | |
| 1473 | static int gem_alloc_rx_buffers(struct macb *bp) |
| 1474 | { |
| 1475 | int size; |
| 1476 | |
| 1477 | size = RX_RING_SIZE * sizeof(struct sk_buff *); |
| 1478 | bp->rx_skbuff = kzalloc(size, GFP_KERNEL); |
| 1479 | if (!bp->rx_skbuff) |
| 1480 | return -ENOMEM; |
| 1481 | else |
| 1482 | netdev_dbg(bp->dev, |
| 1483 | "Allocated %d RX struct sk_buff entries at %p\n", |
| 1484 | RX_RING_SIZE, bp->rx_skbuff); |
| 1485 | return 0; |
| 1486 | } |
| 1487 | |
| 1488 | static int macb_alloc_rx_buffers(struct macb *bp) |
| 1489 | { |
| 1490 | int size; |
| 1491 | |
| 1492 | size = RX_RING_SIZE * bp->rx_buffer_size; |
| 1493 | bp->rx_buffers = dma_alloc_coherent(&bp->pdev->dev, size, |
| 1494 | &bp->rx_buffers_dma, GFP_KERNEL); |
| 1495 | if (!bp->rx_buffers) |
| 1496 | return -ENOMEM; |
| 1497 | else |
| 1498 | netdev_dbg(bp->dev, |
| 1499 | "Allocated RX buffers of %d bytes at %08lx (mapped %p)\n", |
| 1500 | size, (unsigned long)bp->rx_buffers_dma, bp->rx_buffers); |
| 1501 | return 0; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1502 | } |
| 1503 | |
| 1504 | static int macb_alloc_consistent(struct macb *bp) |
| 1505 | { |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1506 | struct macb_queue *queue; |
| 1507 | unsigned int q; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1508 | int size; |
| 1509 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1510 | for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { |
| 1511 | size = TX_RING_BYTES; |
| 1512 | queue->tx_ring = dma_alloc_coherent(&bp->pdev->dev, size, |
| 1513 | &queue->tx_ring_dma, |
| 1514 | GFP_KERNEL); |
| 1515 | if (!queue->tx_ring) |
| 1516 | goto out_err; |
| 1517 | netdev_dbg(bp->dev, |
| 1518 | "Allocated TX ring for queue %u of %d bytes at %08lx (mapped %p)\n", |
| 1519 | q, size, (unsigned long)queue->tx_ring_dma, |
| 1520 | queue->tx_ring); |
| 1521 | |
| 1522 | size = TX_RING_SIZE * sizeof(struct macb_tx_skb); |
| 1523 | queue->tx_skb = kmalloc(size, GFP_KERNEL); |
| 1524 | if (!queue->tx_skb) |
| 1525 | goto out_err; |
| 1526 | } |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1527 | |
| 1528 | size = RX_RING_BYTES; |
| 1529 | bp->rx_ring = dma_alloc_coherent(&bp->pdev->dev, size, |
| 1530 | &bp->rx_ring_dma, GFP_KERNEL); |
| 1531 | if (!bp->rx_ring) |
| 1532 | goto out_err; |
Jamie Iles | c220f8c | 2011-03-08 20:27:08 +0000 | [diff] [blame] | 1533 | netdev_dbg(bp->dev, |
| 1534 | "Allocated RX ring of %d bytes at %08lx (mapped %p)\n", |
| 1535 | size, (unsigned long)bp->rx_ring_dma, bp->rx_ring); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1536 | |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 1537 | if (bp->macbgem_ops.mog_alloc_rx_buffers(bp)) |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1538 | goto out_err; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1539 | |
| 1540 | return 0; |
| 1541 | |
| 1542 | out_err: |
| 1543 | macb_free_consistent(bp); |
| 1544 | return -ENOMEM; |
| 1545 | } |
| 1546 | |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 1547 | static void gem_init_rings(struct macb *bp) |
| 1548 | { |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1549 | struct macb_queue *queue; |
| 1550 | unsigned int q; |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 1551 | int i; |
| 1552 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1553 | for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { |
| 1554 | for (i = 0; i < TX_RING_SIZE; i++) { |
| 1555 | queue->tx_ring[i].addr = 0; |
| 1556 | queue->tx_ring[i].ctrl = MACB_BIT(TX_USED); |
| 1557 | } |
| 1558 | queue->tx_ring[TX_RING_SIZE - 1].ctrl |= MACB_BIT(TX_WRAP); |
| 1559 | queue->tx_head = 0; |
| 1560 | queue->tx_tail = 0; |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 1561 | } |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 1562 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1563 | bp->rx_tail = 0; |
| 1564 | bp->rx_prepared_head = 0; |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 1565 | |
| 1566 | gem_rx_refill(bp); |
| 1567 | } |
| 1568 | |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1569 | static void macb_init_rings(struct macb *bp) |
| 1570 | { |
| 1571 | int i; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1572 | |
Cyrille Pitchen | 9ba723b | 2016-03-25 10:37:34 +0100 | [diff] [blame] | 1573 | macb_init_rx_ring(bp); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1574 | |
| 1575 | for (i = 0; i < TX_RING_SIZE; i++) { |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1576 | bp->queues[0].tx_ring[i].addr = 0; |
| 1577 | bp->queues[0].tx_ring[i].ctrl = MACB_BIT(TX_USED); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1578 | } |
Ben Shelton | 21d3515 | 2015-04-22 17:28:54 -0500 | [diff] [blame] | 1579 | bp->queues[0].tx_head = 0; |
| 1580 | bp->queues[0].tx_tail = 0; |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1581 | bp->queues[0].tx_ring[TX_RING_SIZE - 1].ctrl |= MACB_BIT(TX_WRAP); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1582 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1583 | bp->rx_tail = 0; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1584 | } |
| 1585 | |
| 1586 | static void macb_reset_hw(struct macb *bp) |
| 1587 | { |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1588 | struct macb_queue *queue; |
| 1589 | unsigned int q; |
| 1590 | |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1591 | /* |
| 1592 | * Disable RX and TX (XXX: Should we halt the transmission |
| 1593 | * more gracefully?) |
| 1594 | */ |
| 1595 | macb_writel(bp, NCR, 0); |
| 1596 | |
| 1597 | /* Clear the stats registers (XXX: Update stats first?) */ |
| 1598 | macb_writel(bp, NCR, MACB_BIT(CLRSTAT)); |
| 1599 | |
| 1600 | /* Clear all status flags */ |
Joachim Eastwood | 95ebcea | 2012-10-22 08:45:31 +0000 | [diff] [blame] | 1601 | macb_writel(bp, TSR, -1); |
| 1602 | macb_writel(bp, RSR, -1); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1603 | |
| 1604 | /* Disable all interrupts */ |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1605 | for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { |
| 1606 | queue_writel(queue, IDR, -1); |
| 1607 | queue_readl(queue, ISR); |
Nathan Sullivan | 2446837 | 2016-01-14 13:27:27 -0600 | [diff] [blame] | 1608 | if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) |
| 1609 | queue_writel(queue, ISR, -1); |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1610 | } |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1611 | } |
| 1612 | |
Jamie Iles | 70c9f3d | 2011-03-09 16:22:54 +0000 | [diff] [blame] | 1613 | static u32 gem_mdc_clk_div(struct macb *bp) |
| 1614 | { |
| 1615 | u32 config; |
| 1616 | unsigned long pclk_hz = clk_get_rate(bp->pclk); |
| 1617 | |
| 1618 | if (pclk_hz <= 20000000) |
| 1619 | config = GEM_BF(CLK, GEM_CLK_DIV8); |
| 1620 | else if (pclk_hz <= 40000000) |
| 1621 | config = GEM_BF(CLK, GEM_CLK_DIV16); |
| 1622 | else if (pclk_hz <= 80000000) |
| 1623 | config = GEM_BF(CLK, GEM_CLK_DIV32); |
| 1624 | else if (pclk_hz <= 120000000) |
| 1625 | config = GEM_BF(CLK, GEM_CLK_DIV48); |
| 1626 | else if (pclk_hz <= 160000000) |
| 1627 | config = GEM_BF(CLK, GEM_CLK_DIV64); |
| 1628 | else |
| 1629 | config = GEM_BF(CLK, GEM_CLK_DIV96); |
| 1630 | |
| 1631 | return config; |
| 1632 | } |
| 1633 | |
| 1634 | static u32 macb_mdc_clk_div(struct macb *bp) |
| 1635 | { |
| 1636 | u32 config; |
| 1637 | unsigned long pclk_hz; |
| 1638 | |
| 1639 | if (macb_is_gem(bp)) |
| 1640 | return gem_mdc_clk_div(bp); |
| 1641 | |
| 1642 | pclk_hz = clk_get_rate(bp->pclk); |
| 1643 | if (pclk_hz <= 20000000) |
| 1644 | config = MACB_BF(CLK, MACB_CLK_DIV8); |
| 1645 | else if (pclk_hz <= 40000000) |
| 1646 | config = MACB_BF(CLK, MACB_CLK_DIV16); |
| 1647 | else if (pclk_hz <= 80000000) |
| 1648 | config = MACB_BF(CLK, MACB_CLK_DIV32); |
| 1649 | else |
| 1650 | config = MACB_BF(CLK, MACB_CLK_DIV64); |
| 1651 | |
| 1652 | return config; |
| 1653 | } |
| 1654 | |
Jamie Iles | 757a03c | 2011-03-09 16:29:59 +0000 | [diff] [blame] | 1655 | /* |
| 1656 | * Get the DMA bus width field of the network configuration register that we |
| 1657 | * should program. We find the width from decoding the design configuration |
| 1658 | * register to find the maximum supported data bus width. |
| 1659 | */ |
| 1660 | static u32 macb_dbw(struct macb *bp) |
| 1661 | { |
| 1662 | if (!macb_is_gem(bp)) |
| 1663 | return 0; |
| 1664 | |
| 1665 | switch (GEM_BFEXT(DBWDEF, gem_readl(bp, DCFG1))) { |
| 1666 | case 4: |
| 1667 | return GEM_BF(DBW, GEM_DBW128); |
| 1668 | case 2: |
| 1669 | return GEM_BF(DBW, GEM_DBW64); |
| 1670 | case 1: |
| 1671 | default: |
| 1672 | return GEM_BF(DBW, GEM_DBW32); |
| 1673 | } |
| 1674 | } |
| 1675 | |
Jamie Iles | 0116da4 | 2011-03-14 17:38:30 +0000 | [diff] [blame] | 1676 | /* |
Nicolas Ferre | b3e3bd71 | 2012-11-23 03:49:01 +0000 | [diff] [blame] | 1677 | * Configure the receive DMA engine |
| 1678 | * - use the correct receive buffer size |
Nicolas Ferre | e175587 | 2014-07-24 13:50:58 +0200 | [diff] [blame] | 1679 | * - set best burst length for DMA operations |
Nicolas Ferre | b3e3bd71 | 2012-11-23 03:49:01 +0000 | [diff] [blame] | 1680 | * (if not supported by FIFO, it will fallback to default) |
| 1681 | * - set both rx/tx packet buffers to full memory size |
| 1682 | * These are configurable parameters for GEM. |
Jamie Iles | 0116da4 | 2011-03-14 17:38:30 +0000 | [diff] [blame] | 1683 | */ |
| 1684 | static void macb_configure_dma(struct macb *bp) |
| 1685 | { |
| 1686 | u32 dmacfg; |
| 1687 | |
| 1688 | if (macb_is_gem(bp)) { |
| 1689 | dmacfg = gem_readl(bp, DMACFG) & ~GEM_BF(RXBS, -1L); |
Nicolas Ferre | 1b44791 | 2013-06-04 21:57:11 +0000 | [diff] [blame] | 1690 | dmacfg |= GEM_BF(RXBS, bp->rx_buffer_size / RX_BUFFER_MULTIPLE); |
Nicolas Ferre | e175587 | 2014-07-24 13:50:58 +0200 | [diff] [blame] | 1691 | if (bp->dma_burst_length) |
| 1692 | dmacfg = GEM_BFINS(FBLDO, bp->dma_burst_length, dmacfg); |
Nicolas Ferre | b3e3bd71 | 2012-11-23 03:49:01 +0000 | [diff] [blame] | 1693 | dmacfg |= GEM_BIT(TXPBMS) | GEM_BF(RXBMS, -1L); |
Arun Chandran | a50dad3 | 2015-02-18 16:59:35 +0530 | [diff] [blame] | 1694 | dmacfg &= ~GEM_BIT(ENDIA_PKT); |
Arun Chandran | 62f6924 | 2015-03-01 11:38:02 +0530 | [diff] [blame] | 1695 | |
Andy Shevchenko | f2ce8a9 | 2015-07-24 21:23:59 +0300 | [diff] [blame] | 1696 | if (bp->native_io) |
Arun Chandran | 62f6924 | 2015-03-01 11:38:02 +0530 | [diff] [blame] | 1697 | dmacfg &= ~GEM_BIT(ENDIA_DESC); |
| 1698 | else |
| 1699 | dmacfg |= GEM_BIT(ENDIA_DESC); /* CPU in big endian */ |
| 1700 | |
Cyrille Pitchen | 85ff3d8 | 2014-07-24 13:51:00 +0200 | [diff] [blame] | 1701 | if (bp->dev->features & NETIF_F_HW_CSUM) |
| 1702 | dmacfg |= GEM_BIT(TXCOEN); |
| 1703 | else |
| 1704 | dmacfg &= ~GEM_BIT(TXCOEN); |
Nicolas Ferre | e175587 | 2014-07-24 13:50:58 +0200 | [diff] [blame] | 1705 | netdev_dbg(bp->dev, "Cadence configure DMA with 0x%08x\n", |
| 1706 | dmacfg); |
Jamie Iles | 0116da4 | 2011-03-14 17:38:30 +0000 | [diff] [blame] | 1707 | gem_writel(bp, DMACFG, dmacfg); |
| 1708 | } |
| 1709 | } |
| 1710 | |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1711 | static void macb_init_hw(struct macb *bp) |
| 1712 | { |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1713 | struct macb_queue *queue; |
| 1714 | unsigned int q; |
| 1715 | |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1716 | u32 config; |
| 1717 | |
| 1718 | macb_reset_hw(bp); |
Joachim Eastwood | 314bccc | 2012-11-07 08:14:52 +0000 | [diff] [blame] | 1719 | macb_set_hwaddr(bp); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1720 | |
Jamie Iles | 70c9f3d | 2011-03-09 16:22:54 +0000 | [diff] [blame] | 1721 | config = macb_mdc_clk_div(bp); |
Punnaiah Choudary Kalluri | 022be25 | 2015-11-18 09:03:50 +0530 | [diff] [blame] | 1722 | if (bp->phy_interface == PHY_INTERFACE_MODE_SGMII) |
| 1723 | config |= GEM_BIT(SGMIIEN) | GEM_BIT(PCSSEL); |
Havard Skinnemoen | 29bc2e1 | 2012-10-31 06:04:58 +0000 | [diff] [blame] | 1724 | config |= MACB_BF(RBOF, NET_IP_ALIGN); /* Make eth data aligned */ |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1725 | config |= MACB_BIT(PAE); /* PAuse Enable */ |
| 1726 | config |= MACB_BIT(DRFCS); /* Discard Rx FCS */ |
Dan Carpenter | a104a6b | 2015-05-12 21:15:24 +0300 | [diff] [blame] | 1727 | if (bp->caps & MACB_CAPS_JUMBO) |
Harini Katakam | 98b5a0f4 | 2015-05-06 22:27:17 +0530 | [diff] [blame] | 1728 | config |= MACB_BIT(JFRAME); /* Enable jumbo frames */ |
| 1729 | else |
| 1730 | config |= MACB_BIT(BIG); /* Receive oversized frames */ |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1731 | if (bp->dev->flags & IFF_PROMISC) |
| 1732 | config |= MACB_BIT(CAF); /* Copy All Frames */ |
Cyrille Pitchen | 924ec53 | 2014-07-24 13:51:01 +0200 | [diff] [blame] | 1733 | else if (macb_is_gem(bp) && bp->dev->features & NETIF_F_RXCSUM) |
| 1734 | config |= GEM_BIT(RXCOEN); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1735 | if (!(bp->dev->flags & IFF_BROADCAST)) |
| 1736 | config |= MACB_BIT(NBC); /* No BroadCast */ |
Jamie Iles | 757a03c | 2011-03-09 16:29:59 +0000 | [diff] [blame] | 1737 | config |= macb_dbw(bp); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1738 | macb_writel(bp, NCFGR, config); |
Dan Carpenter | a104a6b | 2015-05-12 21:15:24 +0300 | [diff] [blame] | 1739 | if ((bp->caps & MACB_CAPS_JUMBO) && bp->jumbo_max_len) |
Harini Katakam | 98b5a0f4 | 2015-05-06 22:27:17 +0530 | [diff] [blame] | 1740 | gem_writel(bp, JML, bp->jumbo_max_len); |
Vitalii Demianets | 26cdfb4 | 2012-11-02 07:09:24 +0000 | [diff] [blame] | 1741 | bp->speed = SPEED_10; |
| 1742 | bp->duplex = DUPLEX_HALF; |
Harini Katakam | 98b5a0f4 | 2015-05-06 22:27:17 +0530 | [diff] [blame] | 1743 | bp->rx_frm_len_mask = MACB_RX_FRMLEN_MASK; |
Dan Carpenter | a104a6b | 2015-05-12 21:15:24 +0300 | [diff] [blame] | 1744 | if (bp->caps & MACB_CAPS_JUMBO) |
Harini Katakam | 98b5a0f4 | 2015-05-06 22:27:17 +0530 | [diff] [blame] | 1745 | bp->rx_frm_len_mask = MACB_RX_JFRMLEN_MASK; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1746 | |
Jamie Iles | 0116da4 | 2011-03-14 17:38:30 +0000 | [diff] [blame] | 1747 | macb_configure_dma(bp); |
| 1748 | |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1749 | /* Initialize TX and RX buffers */ |
| 1750 | macb_writel(bp, RBQP, bp->rx_ring_dma); |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1751 | for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { |
| 1752 | queue_writel(queue, TBQP, queue->tx_ring_dma); |
| 1753 | |
| 1754 | /* Enable interrupts */ |
| 1755 | queue_writel(queue, IER, |
| 1756 | MACB_RX_INT_FLAGS | |
| 1757 | MACB_TX_INT_FLAGS | |
| 1758 | MACB_BIT(HRESP)); |
| 1759 | } |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1760 | |
| 1761 | /* Enable TX and RX */ |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 1762 | macb_writel(bp, NCR, MACB_BIT(RE) | MACB_BIT(TE) | MACB_BIT(MPE)); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1763 | } |
| 1764 | |
Patrice Vilchez | 446ebd0 | 2007-07-12 19:07:25 +0200 | [diff] [blame] | 1765 | /* |
| 1766 | * The hash address register is 64 bits long and takes up two |
| 1767 | * locations in the memory map. The least significant bits are stored |
| 1768 | * in EMAC_HSL and the most significant bits in EMAC_HSH. |
| 1769 | * |
| 1770 | * The unicast hash enable and the multicast hash enable bits in the |
| 1771 | * network configuration register enable the reception of hash matched |
| 1772 | * frames. The destination address is reduced to a 6 bit index into |
| 1773 | * the 64 bit hash register using the following hash function. The |
| 1774 | * hash function is an exclusive or of every sixth bit of the |
| 1775 | * destination address. |
| 1776 | * |
| 1777 | * hi[5] = da[5] ^ da[11] ^ da[17] ^ da[23] ^ da[29] ^ da[35] ^ da[41] ^ da[47] |
| 1778 | * hi[4] = da[4] ^ da[10] ^ da[16] ^ da[22] ^ da[28] ^ da[34] ^ da[40] ^ da[46] |
| 1779 | * hi[3] = da[3] ^ da[09] ^ da[15] ^ da[21] ^ da[27] ^ da[33] ^ da[39] ^ da[45] |
| 1780 | * hi[2] = da[2] ^ da[08] ^ da[14] ^ da[20] ^ da[26] ^ da[32] ^ da[38] ^ da[44] |
| 1781 | * hi[1] = da[1] ^ da[07] ^ da[13] ^ da[19] ^ da[25] ^ da[31] ^ da[37] ^ da[43] |
| 1782 | * hi[0] = da[0] ^ da[06] ^ da[12] ^ da[18] ^ da[24] ^ da[30] ^ da[36] ^ da[42] |
| 1783 | * |
| 1784 | * da[0] represents the least significant bit of the first byte |
| 1785 | * received, that is, the multicast/unicast indicator, and da[47] |
| 1786 | * represents the most significant bit of the last byte received. If |
| 1787 | * the hash index, hi[n], points to a bit that is set in the hash |
| 1788 | * register then the frame will be matched according to whether the |
| 1789 | * frame is multicast or unicast. A multicast match will be signalled |
| 1790 | * if the multicast hash enable bit is set, da[0] is 1 and the hash |
| 1791 | * index points to a bit set in the hash register. A unicast match |
| 1792 | * will be signalled if the unicast hash enable bit is set, da[0] is 0 |
| 1793 | * and the hash index points to a bit set in the hash register. To |
| 1794 | * receive all multicast frames, the hash register should be set with |
| 1795 | * all ones and the multicast hash enable bit should be set in the |
| 1796 | * network configuration register. |
| 1797 | */ |
| 1798 | |
| 1799 | static inline int hash_bit_value(int bitnr, __u8 *addr) |
| 1800 | { |
| 1801 | if (addr[bitnr / 8] & (1 << (bitnr % 8))) |
| 1802 | return 1; |
| 1803 | return 0; |
| 1804 | } |
| 1805 | |
| 1806 | /* |
| 1807 | * Return the hash index value for the specified address. |
| 1808 | */ |
| 1809 | static int hash_get_index(__u8 *addr) |
| 1810 | { |
| 1811 | int i, j, bitval; |
| 1812 | int hash_index = 0; |
| 1813 | |
| 1814 | for (j = 0; j < 6; j++) { |
| 1815 | for (i = 0, bitval = 0; i < 8; i++) |
Xander Huff | 2fa45e2 | 2015-01-15 15:55:19 -0600 | [diff] [blame] | 1816 | bitval ^= hash_bit_value(i * 6 + j, addr); |
Patrice Vilchez | 446ebd0 | 2007-07-12 19:07:25 +0200 | [diff] [blame] | 1817 | |
| 1818 | hash_index |= (bitval << j); |
| 1819 | } |
| 1820 | |
| 1821 | return hash_index; |
| 1822 | } |
| 1823 | |
| 1824 | /* |
| 1825 | * Add multicast addresses to the internal multicast-hash table. |
| 1826 | */ |
| 1827 | static void macb_sethashtable(struct net_device *dev) |
| 1828 | { |
Jiri Pirko | 22bedad3 | 2010-04-01 21:22:57 +0000 | [diff] [blame] | 1829 | struct netdev_hw_addr *ha; |
Patrice Vilchez | 446ebd0 | 2007-07-12 19:07:25 +0200 | [diff] [blame] | 1830 | unsigned long mc_filter[2]; |
Jiri Pirko | f9dcbcc | 2010-02-23 09:19:49 +0000 | [diff] [blame] | 1831 | unsigned int bitnr; |
Patrice Vilchez | 446ebd0 | 2007-07-12 19:07:25 +0200 | [diff] [blame] | 1832 | struct macb *bp = netdev_priv(dev); |
| 1833 | |
| 1834 | mc_filter[0] = mc_filter[1] = 0; |
| 1835 | |
Jiri Pirko | 22bedad3 | 2010-04-01 21:22:57 +0000 | [diff] [blame] | 1836 | netdev_for_each_mc_addr(ha, dev) { |
| 1837 | bitnr = hash_get_index(ha->addr); |
Patrice Vilchez | 446ebd0 | 2007-07-12 19:07:25 +0200 | [diff] [blame] | 1838 | mc_filter[bitnr >> 5] |= 1 << (bitnr & 31); |
| 1839 | } |
| 1840 | |
Jamie Iles | f75ba50 | 2011-11-08 10:12:32 +0000 | [diff] [blame] | 1841 | macb_or_gem_writel(bp, HRB, mc_filter[0]); |
| 1842 | macb_or_gem_writel(bp, HRT, mc_filter[1]); |
Patrice Vilchez | 446ebd0 | 2007-07-12 19:07:25 +0200 | [diff] [blame] | 1843 | } |
| 1844 | |
| 1845 | /* |
| 1846 | * Enable/Disable promiscuous and multicast modes. |
| 1847 | */ |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 1848 | static void macb_set_rx_mode(struct net_device *dev) |
Patrice Vilchez | 446ebd0 | 2007-07-12 19:07:25 +0200 | [diff] [blame] | 1849 | { |
| 1850 | unsigned long cfg; |
| 1851 | struct macb *bp = netdev_priv(dev); |
| 1852 | |
| 1853 | cfg = macb_readl(bp, NCFGR); |
| 1854 | |
Cyrille Pitchen | 924ec53 | 2014-07-24 13:51:01 +0200 | [diff] [blame] | 1855 | if (dev->flags & IFF_PROMISC) { |
Patrice Vilchez | 446ebd0 | 2007-07-12 19:07:25 +0200 | [diff] [blame] | 1856 | /* Enable promiscuous mode */ |
| 1857 | cfg |= MACB_BIT(CAF); |
Cyrille Pitchen | 924ec53 | 2014-07-24 13:51:01 +0200 | [diff] [blame] | 1858 | |
| 1859 | /* Disable RX checksum offload */ |
| 1860 | if (macb_is_gem(bp)) |
| 1861 | cfg &= ~GEM_BIT(RXCOEN); |
| 1862 | } else { |
| 1863 | /* Disable promiscuous mode */ |
Patrice Vilchez | 446ebd0 | 2007-07-12 19:07:25 +0200 | [diff] [blame] | 1864 | cfg &= ~MACB_BIT(CAF); |
| 1865 | |
Cyrille Pitchen | 924ec53 | 2014-07-24 13:51:01 +0200 | [diff] [blame] | 1866 | /* Enable RX checksum offload only if requested */ |
| 1867 | if (macb_is_gem(bp) && dev->features & NETIF_F_RXCSUM) |
| 1868 | cfg |= GEM_BIT(RXCOEN); |
| 1869 | } |
| 1870 | |
Patrice Vilchez | 446ebd0 | 2007-07-12 19:07:25 +0200 | [diff] [blame] | 1871 | if (dev->flags & IFF_ALLMULTI) { |
| 1872 | /* Enable all multicast mode */ |
Jamie Iles | f75ba50 | 2011-11-08 10:12:32 +0000 | [diff] [blame] | 1873 | macb_or_gem_writel(bp, HRB, -1); |
| 1874 | macb_or_gem_writel(bp, HRT, -1); |
Patrice Vilchez | 446ebd0 | 2007-07-12 19:07:25 +0200 | [diff] [blame] | 1875 | cfg |= MACB_BIT(NCFGR_MTI); |
Jiri Pirko | 4cd24ea | 2010-02-08 04:30:35 +0000 | [diff] [blame] | 1876 | } else if (!netdev_mc_empty(dev)) { |
Patrice Vilchez | 446ebd0 | 2007-07-12 19:07:25 +0200 | [diff] [blame] | 1877 | /* Enable specific multicasts */ |
| 1878 | macb_sethashtable(dev); |
| 1879 | cfg |= MACB_BIT(NCFGR_MTI); |
| 1880 | } else if (dev->flags & (~IFF_ALLMULTI)) { |
| 1881 | /* Disable all multicast mode */ |
Jamie Iles | f75ba50 | 2011-11-08 10:12:32 +0000 | [diff] [blame] | 1882 | macb_or_gem_writel(bp, HRB, 0); |
| 1883 | macb_or_gem_writel(bp, HRT, 0); |
Patrice Vilchez | 446ebd0 | 2007-07-12 19:07:25 +0200 | [diff] [blame] | 1884 | cfg &= ~MACB_BIT(NCFGR_MTI); |
| 1885 | } |
| 1886 | |
| 1887 | macb_writel(bp, NCFGR, cfg); |
| 1888 | } |
| 1889 | |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1890 | static int macb_open(struct net_device *dev) |
| 1891 | { |
| 1892 | struct macb *bp = netdev_priv(dev); |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 1893 | size_t bufsz = dev->mtu + ETH_HLEN + ETH_FCS_LEN + NET_IP_ALIGN; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1894 | int err; |
| 1895 | |
Jamie Iles | c220f8c | 2011-03-08 20:27:08 +0000 | [diff] [blame] | 1896 | netdev_dbg(bp->dev, "open\n"); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1897 | |
Nicolas Ferre | 03fc472 | 2012-07-03 23:14:13 +0000 | [diff] [blame] | 1898 | /* carrier starts down */ |
| 1899 | netif_carrier_off(dev); |
| 1900 | |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 1901 | /* if the phy is not yet register, retry later*/ |
| 1902 | if (!bp->phy_dev) |
| 1903 | return -EAGAIN; |
| 1904 | |
Nicolas Ferre | 1b44791 | 2013-06-04 21:57:11 +0000 | [diff] [blame] | 1905 | /* RX buffers initialization */ |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 1906 | macb_init_rx_buffer_size(bp, bufsz); |
Nicolas Ferre | 1b44791 | 2013-06-04 21:57:11 +0000 | [diff] [blame] | 1907 | |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1908 | err = macb_alloc_consistent(bp); |
| 1909 | if (err) { |
Jamie Iles | c220f8c | 2011-03-08 20:27:08 +0000 | [diff] [blame] | 1910 | netdev_err(dev, "Unable to allocate DMA memory (error %d)\n", |
| 1911 | err); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1912 | return err; |
| 1913 | } |
| 1914 | |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 1915 | napi_enable(&bp->napi); |
| 1916 | |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 1917 | bp->macbgem_ops.mog_init_rings(bp); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1918 | macb_init_hw(bp); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1919 | |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 1920 | /* schedule a link state check */ |
| 1921 | phy_start(bp->phy_dev); |
| 1922 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1923 | netif_tx_start_all_queues(dev); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1924 | |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1925 | return 0; |
| 1926 | } |
| 1927 | |
| 1928 | static int macb_close(struct net_device *dev) |
| 1929 | { |
| 1930 | struct macb *bp = netdev_priv(dev); |
| 1931 | unsigned long flags; |
| 1932 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 1933 | netif_tx_stop_all_queues(dev); |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 1934 | napi_disable(&bp->napi); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1935 | |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 1936 | if (bp->phy_dev) |
| 1937 | phy_stop(bp->phy_dev); |
| 1938 | |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 1939 | spin_lock_irqsave(&bp->lock, flags); |
| 1940 | macb_reset_hw(bp); |
| 1941 | netif_carrier_off(dev); |
| 1942 | spin_unlock_irqrestore(&bp->lock, flags); |
| 1943 | |
| 1944 | macb_free_consistent(bp); |
| 1945 | |
| 1946 | return 0; |
| 1947 | } |
| 1948 | |
Harini Katakam | a5898ea | 2015-05-06 22:27:18 +0530 | [diff] [blame] | 1949 | static int macb_change_mtu(struct net_device *dev, int new_mtu) |
| 1950 | { |
| 1951 | struct macb *bp = netdev_priv(dev); |
| 1952 | u32 max_mtu; |
| 1953 | |
| 1954 | if (netif_running(dev)) |
| 1955 | return -EBUSY; |
| 1956 | |
| 1957 | max_mtu = ETH_DATA_LEN; |
Dan Carpenter | a104a6b | 2015-05-12 21:15:24 +0300 | [diff] [blame] | 1958 | if (bp->caps & MACB_CAPS_JUMBO) |
Harini Katakam | a5898ea | 2015-05-06 22:27:18 +0530 | [diff] [blame] | 1959 | max_mtu = gem_readl(bp, JML) - ETH_HLEN - ETH_FCS_LEN; |
| 1960 | |
| 1961 | if ((new_mtu > max_mtu) || (new_mtu < GEM_MTU_MIN_SIZE)) |
| 1962 | return -EINVAL; |
| 1963 | |
| 1964 | dev->mtu = new_mtu; |
| 1965 | |
| 1966 | return 0; |
| 1967 | } |
| 1968 | |
Jamie Iles | a494ed8 | 2011-03-09 16:26:35 +0000 | [diff] [blame] | 1969 | static void gem_update_stats(struct macb *bp) |
| 1970 | { |
Andy Shevchenko | 8bcbf82 | 2015-07-24 21:24:02 +0300 | [diff] [blame] | 1971 | unsigned int i; |
Jamie Iles | a494ed8 | 2011-03-09 16:26:35 +0000 | [diff] [blame] | 1972 | u32 *p = &bp->hw_stats.gem.tx_octets_31_0; |
Jamie Iles | a494ed8 | 2011-03-09 16:26:35 +0000 | [diff] [blame] | 1973 | |
Xander Huff | 3ff13f1 | 2015-01-13 16:15:51 -0600 | [diff] [blame] | 1974 | for (i = 0; i < GEM_STATS_LEN; ++i, ++p) { |
| 1975 | u32 offset = gem_statistics[i].offset; |
David S. Miller | 7a6e070 | 2015-07-27 14:24:48 -0700 | [diff] [blame] | 1976 | u64 val = bp->macb_reg_readl(bp, offset); |
Xander Huff | 3ff13f1 | 2015-01-13 16:15:51 -0600 | [diff] [blame] | 1977 | |
| 1978 | bp->ethtool_stats[i] += val; |
| 1979 | *p += val; |
| 1980 | |
| 1981 | if (offset == GEM_OCTTXL || offset == GEM_OCTRXL) { |
| 1982 | /* Add GEM_OCTTXH, GEM_OCTRXH */ |
David S. Miller | 7a6e070 | 2015-07-27 14:24:48 -0700 | [diff] [blame] | 1983 | val = bp->macb_reg_readl(bp, offset + 4); |
Xander Huff | 2fa45e2 | 2015-01-15 15:55:19 -0600 | [diff] [blame] | 1984 | bp->ethtool_stats[i] += ((u64)val) << 32; |
Xander Huff | 3ff13f1 | 2015-01-13 16:15:51 -0600 | [diff] [blame] | 1985 | *(++p) += val; |
| 1986 | } |
| 1987 | } |
Jamie Iles | a494ed8 | 2011-03-09 16:26:35 +0000 | [diff] [blame] | 1988 | } |
| 1989 | |
| 1990 | static struct net_device_stats *gem_get_stats(struct macb *bp) |
| 1991 | { |
| 1992 | struct gem_stats *hwstat = &bp->hw_stats.gem; |
| 1993 | struct net_device_stats *nstat = &bp->stats; |
| 1994 | |
| 1995 | gem_update_stats(bp); |
| 1996 | |
| 1997 | nstat->rx_errors = (hwstat->rx_frame_check_sequence_errors + |
| 1998 | hwstat->rx_alignment_errors + |
| 1999 | hwstat->rx_resource_errors + |
| 2000 | hwstat->rx_overruns + |
| 2001 | hwstat->rx_oversize_frames + |
| 2002 | hwstat->rx_jabbers + |
| 2003 | hwstat->rx_undersized_frames + |
| 2004 | hwstat->rx_length_field_frame_errors); |
| 2005 | nstat->tx_errors = (hwstat->tx_late_collisions + |
| 2006 | hwstat->tx_excessive_collisions + |
| 2007 | hwstat->tx_underrun + |
| 2008 | hwstat->tx_carrier_sense_errors); |
| 2009 | nstat->multicast = hwstat->rx_multicast_frames; |
| 2010 | nstat->collisions = (hwstat->tx_single_collision_frames + |
| 2011 | hwstat->tx_multiple_collision_frames + |
| 2012 | hwstat->tx_excessive_collisions); |
| 2013 | nstat->rx_length_errors = (hwstat->rx_oversize_frames + |
| 2014 | hwstat->rx_jabbers + |
| 2015 | hwstat->rx_undersized_frames + |
| 2016 | hwstat->rx_length_field_frame_errors); |
| 2017 | nstat->rx_over_errors = hwstat->rx_resource_errors; |
| 2018 | nstat->rx_crc_errors = hwstat->rx_frame_check_sequence_errors; |
| 2019 | nstat->rx_frame_errors = hwstat->rx_alignment_errors; |
| 2020 | nstat->rx_fifo_errors = hwstat->rx_overruns; |
| 2021 | nstat->tx_aborted_errors = hwstat->tx_excessive_collisions; |
| 2022 | nstat->tx_carrier_errors = hwstat->tx_carrier_sense_errors; |
| 2023 | nstat->tx_fifo_errors = hwstat->tx_underrun; |
| 2024 | |
| 2025 | return nstat; |
| 2026 | } |
| 2027 | |
Xander Huff | 3ff13f1 | 2015-01-13 16:15:51 -0600 | [diff] [blame] | 2028 | static void gem_get_ethtool_stats(struct net_device *dev, |
| 2029 | struct ethtool_stats *stats, u64 *data) |
| 2030 | { |
| 2031 | struct macb *bp; |
| 2032 | |
| 2033 | bp = netdev_priv(dev); |
| 2034 | gem_update_stats(bp); |
Xander Huff | 2fa45e2 | 2015-01-15 15:55:19 -0600 | [diff] [blame] | 2035 | memcpy(data, &bp->ethtool_stats, sizeof(u64) * GEM_STATS_LEN); |
Xander Huff | 3ff13f1 | 2015-01-13 16:15:51 -0600 | [diff] [blame] | 2036 | } |
| 2037 | |
| 2038 | static int gem_get_sset_count(struct net_device *dev, int sset) |
| 2039 | { |
| 2040 | switch (sset) { |
| 2041 | case ETH_SS_STATS: |
| 2042 | return GEM_STATS_LEN; |
| 2043 | default: |
| 2044 | return -EOPNOTSUPP; |
| 2045 | } |
| 2046 | } |
| 2047 | |
| 2048 | static void gem_get_ethtool_strings(struct net_device *dev, u32 sset, u8 *p) |
| 2049 | { |
Andy Shevchenko | 8bcbf82 | 2015-07-24 21:24:02 +0300 | [diff] [blame] | 2050 | unsigned int i; |
Xander Huff | 3ff13f1 | 2015-01-13 16:15:51 -0600 | [diff] [blame] | 2051 | |
| 2052 | switch (sset) { |
| 2053 | case ETH_SS_STATS: |
| 2054 | for (i = 0; i < GEM_STATS_LEN; i++, p += ETH_GSTRING_LEN) |
| 2055 | memcpy(p, gem_statistics[i].stat_string, |
| 2056 | ETH_GSTRING_LEN); |
| 2057 | break; |
| 2058 | } |
| 2059 | } |
| 2060 | |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2061 | static struct net_device_stats *macb_get_stats(struct net_device *dev) |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 2062 | { |
| 2063 | struct macb *bp = netdev_priv(dev); |
| 2064 | struct net_device_stats *nstat = &bp->stats; |
Jamie Iles | a494ed8 | 2011-03-09 16:26:35 +0000 | [diff] [blame] | 2065 | struct macb_stats *hwstat = &bp->hw_stats.macb; |
| 2066 | |
| 2067 | if (macb_is_gem(bp)) |
| 2068 | return gem_get_stats(bp); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 2069 | |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 2070 | /* read stats from hardware */ |
| 2071 | macb_update_stats(bp); |
| 2072 | |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 2073 | /* Convert HW stats into netdevice stats */ |
| 2074 | nstat->rx_errors = (hwstat->rx_fcs_errors + |
| 2075 | hwstat->rx_align_errors + |
| 2076 | hwstat->rx_resource_errors + |
| 2077 | hwstat->rx_overruns + |
| 2078 | hwstat->rx_oversize_pkts + |
| 2079 | hwstat->rx_jabbers + |
| 2080 | hwstat->rx_undersize_pkts + |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 2081 | hwstat->rx_length_mismatch); |
| 2082 | nstat->tx_errors = (hwstat->tx_late_cols + |
| 2083 | hwstat->tx_excessive_cols + |
| 2084 | hwstat->tx_underruns + |
Wolfgang Steinwender | 716723c | 2015-04-10 11:42:56 +0200 | [diff] [blame] | 2085 | hwstat->tx_carrier_errors + |
| 2086 | hwstat->sqe_test_errors); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 2087 | nstat->collisions = (hwstat->tx_single_cols + |
| 2088 | hwstat->tx_multiple_cols + |
| 2089 | hwstat->tx_excessive_cols); |
| 2090 | nstat->rx_length_errors = (hwstat->rx_oversize_pkts + |
| 2091 | hwstat->rx_jabbers + |
| 2092 | hwstat->rx_undersize_pkts + |
| 2093 | hwstat->rx_length_mismatch); |
Alexander Stein | b19f7f7 | 2011-04-13 05:03:24 +0000 | [diff] [blame] | 2094 | nstat->rx_over_errors = hwstat->rx_resource_errors + |
| 2095 | hwstat->rx_overruns; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 2096 | nstat->rx_crc_errors = hwstat->rx_fcs_errors; |
| 2097 | nstat->rx_frame_errors = hwstat->rx_align_errors; |
| 2098 | nstat->rx_fifo_errors = hwstat->rx_overruns; |
| 2099 | /* XXX: What does "missed" mean? */ |
| 2100 | nstat->tx_aborted_errors = hwstat->tx_excessive_cols; |
| 2101 | nstat->tx_carrier_errors = hwstat->tx_carrier_errors; |
| 2102 | nstat->tx_fifo_errors = hwstat->tx_underruns; |
| 2103 | /* Don't know about heartbeat or window errors... */ |
| 2104 | |
| 2105 | return nstat; |
| 2106 | } |
| 2107 | |
| 2108 | static int macb_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
| 2109 | { |
| 2110 | struct macb *bp = netdev_priv(dev); |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 2111 | struct phy_device *phydev = bp->phy_dev; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 2112 | |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 2113 | if (!phydev) |
| 2114 | return -ENODEV; |
| 2115 | |
| 2116 | return phy_ethtool_gset(phydev, cmd); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 2117 | } |
| 2118 | |
| 2119 | static int macb_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
| 2120 | { |
| 2121 | struct macb *bp = netdev_priv(dev); |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 2122 | struct phy_device *phydev = bp->phy_dev; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 2123 | |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 2124 | if (!phydev) |
| 2125 | return -ENODEV; |
| 2126 | |
| 2127 | return phy_ethtool_sset(phydev, cmd); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 2128 | } |
| 2129 | |
Nicolas Ferre | d1d1b53 | 2012-10-31 06:04:56 +0000 | [diff] [blame] | 2130 | static int macb_get_regs_len(struct net_device *netdev) |
| 2131 | { |
| 2132 | return MACB_GREGS_NBR * sizeof(u32); |
| 2133 | } |
| 2134 | |
| 2135 | static void macb_get_regs(struct net_device *dev, struct ethtool_regs *regs, |
| 2136 | void *p) |
| 2137 | { |
| 2138 | struct macb *bp = netdev_priv(dev); |
| 2139 | unsigned int tail, head; |
| 2140 | u32 *regs_buff = p; |
| 2141 | |
| 2142 | regs->version = (macb_readl(bp, MID) & ((1 << MACB_REV_SIZE) - 1)) |
| 2143 | | MACB_GREGS_VERSION; |
| 2144 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 2145 | tail = macb_tx_ring_wrap(bp->queues[0].tx_tail); |
| 2146 | head = macb_tx_ring_wrap(bp->queues[0].tx_head); |
Nicolas Ferre | d1d1b53 | 2012-10-31 06:04:56 +0000 | [diff] [blame] | 2147 | |
| 2148 | regs_buff[0] = macb_readl(bp, NCR); |
| 2149 | regs_buff[1] = macb_or_gem_readl(bp, NCFGR); |
| 2150 | regs_buff[2] = macb_readl(bp, NSR); |
| 2151 | regs_buff[3] = macb_readl(bp, TSR); |
| 2152 | regs_buff[4] = macb_readl(bp, RBQP); |
| 2153 | regs_buff[5] = macb_readl(bp, TBQP); |
| 2154 | regs_buff[6] = macb_readl(bp, RSR); |
| 2155 | regs_buff[7] = macb_readl(bp, IMR); |
| 2156 | |
| 2157 | regs_buff[8] = tail; |
| 2158 | regs_buff[9] = head; |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 2159 | regs_buff[10] = macb_tx_dma(&bp->queues[0], tail); |
| 2160 | regs_buff[11] = macb_tx_dma(&bp->queues[0], head); |
Nicolas Ferre | d1d1b53 | 2012-10-31 06:04:56 +0000 | [diff] [blame] | 2161 | |
Neil Armstrong | ce721a7 | 2016-01-05 14:39:16 +0100 | [diff] [blame] | 2162 | if (!(bp->caps & MACB_CAPS_USRIO_DISABLED)) |
| 2163 | regs_buff[12] = macb_or_gem_readl(bp, USRIO); |
Nicolas Ferre | d1d1b53 | 2012-10-31 06:04:56 +0000 | [diff] [blame] | 2164 | if (macb_is_gem(bp)) { |
Nicolas Ferre | d1d1b53 | 2012-10-31 06:04:56 +0000 | [diff] [blame] | 2165 | regs_buff[13] = gem_readl(bp, DMACFG); |
| 2166 | } |
| 2167 | } |
| 2168 | |
Sergio Prado | 3e2a5e1 | 2016-02-09 12:07:16 -0200 | [diff] [blame] | 2169 | static void macb_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) |
| 2170 | { |
| 2171 | struct macb *bp = netdev_priv(netdev); |
| 2172 | |
| 2173 | wol->supported = 0; |
| 2174 | wol->wolopts = 0; |
| 2175 | |
| 2176 | if (bp->wol & MACB_WOL_HAS_MAGIC_PACKET) { |
| 2177 | wol->supported = WAKE_MAGIC; |
| 2178 | |
| 2179 | if (bp->wol & MACB_WOL_ENABLED) |
| 2180 | wol->wolopts |= WAKE_MAGIC; |
| 2181 | } |
| 2182 | } |
| 2183 | |
| 2184 | static int macb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) |
| 2185 | { |
| 2186 | struct macb *bp = netdev_priv(netdev); |
| 2187 | |
| 2188 | if (!(bp->wol & MACB_WOL_HAS_MAGIC_PACKET) || |
| 2189 | (wol->wolopts & ~WAKE_MAGIC)) |
| 2190 | return -EOPNOTSUPP; |
| 2191 | |
| 2192 | if (wol->wolopts & WAKE_MAGIC) |
| 2193 | bp->wol |= MACB_WOL_ENABLED; |
| 2194 | else |
| 2195 | bp->wol &= ~MACB_WOL_ENABLED; |
| 2196 | |
| 2197 | device_set_wakeup_enable(&bp->pdev->dev, bp->wol & MACB_WOL_ENABLED); |
| 2198 | |
| 2199 | return 0; |
| 2200 | } |
| 2201 | |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2202 | static const struct ethtool_ops macb_ethtool_ops = { |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 2203 | .get_settings = macb_get_settings, |
| 2204 | .set_settings = macb_set_settings, |
Nicolas Ferre | d1d1b53 | 2012-10-31 06:04:56 +0000 | [diff] [blame] | 2205 | .get_regs_len = macb_get_regs_len, |
| 2206 | .get_regs = macb_get_regs, |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 2207 | .get_link = ethtool_op_get_link, |
Richard Cochran | 17f393e | 2012-04-03 22:59:31 +0000 | [diff] [blame] | 2208 | .get_ts_info = ethtool_op_get_ts_info, |
Sergio Prado | 3e2a5e1 | 2016-02-09 12:07:16 -0200 | [diff] [blame] | 2209 | .get_wol = macb_get_wol, |
| 2210 | .set_wol = macb_set_wol, |
Xander Huff | 8cd5a56 | 2015-01-15 15:55:20 -0600 | [diff] [blame] | 2211 | }; |
Xander Huff | 8cd5a56 | 2015-01-15 15:55:20 -0600 | [diff] [blame] | 2212 | |
Lad, Prabhakar | 8093b1c | 2015-02-05 16:21:07 +0000 | [diff] [blame] | 2213 | static const struct ethtool_ops gem_ethtool_ops = { |
Xander Huff | 8cd5a56 | 2015-01-15 15:55:20 -0600 | [diff] [blame] | 2214 | .get_settings = macb_get_settings, |
| 2215 | .set_settings = macb_set_settings, |
| 2216 | .get_regs_len = macb_get_regs_len, |
| 2217 | .get_regs = macb_get_regs, |
| 2218 | .get_link = ethtool_op_get_link, |
| 2219 | .get_ts_info = ethtool_op_get_ts_info, |
Xander Huff | 3ff13f1 | 2015-01-13 16:15:51 -0600 | [diff] [blame] | 2220 | .get_ethtool_stats = gem_get_ethtool_stats, |
| 2221 | .get_strings = gem_get_ethtool_strings, |
| 2222 | .get_sset_count = gem_get_sset_count, |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 2223 | }; |
| 2224 | |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2225 | static int macb_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 2226 | { |
| 2227 | struct macb *bp = netdev_priv(dev); |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 2228 | struct phy_device *phydev = bp->phy_dev; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 2229 | |
| 2230 | if (!netif_running(dev)) |
| 2231 | return -EINVAL; |
| 2232 | |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 2233 | if (!phydev) |
| 2234 | return -ENODEV; |
| 2235 | |
Richard Cochran | 28b0411 | 2010-07-17 08:48:55 +0000 | [diff] [blame] | 2236 | return phy_mii_ioctl(phydev, rq, cmd); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 2237 | } |
| 2238 | |
Cyrille Pitchen | 85ff3d8 | 2014-07-24 13:51:00 +0200 | [diff] [blame] | 2239 | static int macb_set_features(struct net_device *netdev, |
| 2240 | netdev_features_t features) |
| 2241 | { |
| 2242 | struct macb *bp = netdev_priv(netdev); |
| 2243 | netdev_features_t changed = features ^ netdev->features; |
| 2244 | |
| 2245 | /* TX checksum offload */ |
| 2246 | if ((changed & NETIF_F_HW_CSUM) && macb_is_gem(bp)) { |
| 2247 | u32 dmacfg; |
| 2248 | |
| 2249 | dmacfg = gem_readl(bp, DMACFG); |
| 2250 | if (features & NETIF_F_HW_CSUM) |
| 2251 | dmacfg |= GEM_BIT(TXCOEN); |
| 2252 | else |
| 2253 | dmacfg &= ~GEM_BIT(TXCOEN); |
| 2254 | gem_writel(bp, DMACFG, dmacfg); |
| 2255 | } |
| 2256 | |
Cyrille Pitchen | 924ec53 | 2014-07-24 13:51:01 +0200 | [diff] [blame] | 2257 | /* RX checksum offload */ |
| 2258 | if ((changed & NETIF_F_RXCSUM) && macb_is_gem(bp)) { |
| 2259 | u32 netcfg; |
| 2260 | |
| 2261 | netcfg = gem_readl(bp, NCFGR); |
| 2262 | if (features & NETIF_F_RXCSUM && |
| 2263 | !(netdev->flags & IFF_PROMISC)) |
| 2264 | netcfg |= GEM_BIT(RXCOEN); |
| 2265 | else |
| 2266 | netcfg &= ~GEM_BIT(RXCOEN); |
| 2267 | gem_writel(bp, NCFGR, netcfg); |
| 2268 | } |
| 2269 | |
Cyrille Pitchen | 85ff3d8 | 2014-07-24 13:51:00 +0200 | [diff] [blame] | 2270 | return 0; |
| 2271 | } |
| 2272 | |
Alexander Beregalov | 5f1fa99 | 2009-04-11 07:42:26 +0000 | [diff] [blame] | 2273 | static const struct net_device_ops macb_netdev_ops = { |
| 2274 | .ndo_open = macb_open, |
| 2275 | .ndo_stop = macb_close, |
| 2276 | .ndo_start_xmit = macb_start_xmit, |
Jiri Pirko | afc4b13 | 2011-08-16 06:29:01 +0000 | [diff] [blame] | 2277 | .ndo_set_rx_mode = macb_set_rx_mode, |
Alexander Beregalov | 5f1fa99 | 2009-04-11 07:42:26 +0000 | [diff] [blame] | 2278 | .ndo_get_stats = macb_get_stats, |
| 2279 | .ndo_do_ioctl = macb_ioctl, |
| 2280 | .ndo_validate_addr = eth_validate_addr, |
Harini Katakam | a5898ea | 2015-05-06 22:27:18 +0530 | [diff] [blame] | 2281 | .ndo_change_mtu = macb_change_mtu, |
Alexander Beregalov | 5f1fa99 | 2009-04-11 07:42:26 +0000 | [diff] [blame] | 2282 | .ndo_set_mac_address = eth_mac_addr, |
Thomas Petazzoni | 6e8cf5c | 2009-05-04 11:08:41 -0700 | [diff] [blame] | 2283 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 2284 | .ndo_poll_controller = macb_poll_controller, |
| 2285 | #endif |
Cyrille Pitchen | 85ff3d8 | 2014-07-24 13:51:00 +0200 | [diff] [blame] | 2286 | .ndo_set_features = macb_set_features, |
Alexander Beregalov | 5f1fa99 | 2009-04-11 07:42:26 +0000 | [diff] [blame] | 2287 | }; |
| 2288 | |
Nicolas Ferre | e175587 | 2014-07-24 13:50:58 +0200 | [diff] [blame] | 2289 | /* |
Nicolas Ferre | ad78347 | 2015-03-31 15:02:02 +0200 | [diff] [blame] | 2290 | * Configure peripheral capabilities according to device tree |
Nicolas Ferre | e175587 | 2014-07-24 13:50:58 +0200 | [diff] [blame] | 2291 | * and integration options used |
| 2292 | */ |
Nicolas Ferre | f697050 | 2015-03-31 15:02:01 +0200 | [diff] [blame] | 2293 | static void macb_configure_caps(struct macb *bp, const struct macb_config *dt_conf) |
Nicolas Ferre | e175587 | 2014-07-24 13:50:58 +0200 | [diff] [blame] | 2294 | { |
| 2295 | u32 dcfg; |
Nicolas Ferre | e175587 | 2014-07-24 13:50:58 +0200 | [diff] [blame] | 2296 | |
Nicolas Ferre | f697050 | 2015-03-31 15:02:01 +0200 | [diff] [blame] | 2297 | if (dt_conf) |
| 2298 | bp->caps = dt_conf->caps; |
| 2299 | |
Andy Shevchenko | f2ce8a9 | 2015-07-24 21:23:59 +0300 | [diff] [blame] | 2300 | if (hw_is_gem(bp->regs, bp->native_io)) { |
Nicolas Ferre | e175587 | 2014-07-24 13:50:58 +0200 | [diff] [blame] | 2301 | bp->caps |= MACB_CAPS_MACB_IS_GEM; |
| 2302 | |
Nicolas Ferre | e175587 | 2014-07-24 13:50:58 +0200 | [diff] [blame] | 2303 | dcfg = gem_readl(bp, DCFG1); |
| 2304 | if (GEM_BFEXT(IRQCOR, dcfg) == 0) |
| 2305 | bp->caps |= MACB_CAPS_ISR_CLEAR_ON_WRITE; |
| 2306 | dcfg = gem_readl(bp, DCFG2); |
| 2307 | if ((dcfg & (GEM_BIT(RX_PKT_BUFF) | GEM_BIT(TX_PKT_BUFF))) == 0) |
| 2308 | bp->caps |= MACB_CAPS_FIFO_MODE; |
| 2309 | } |
| 2310 | |
Andy Shevchenko | a35919e | 2015-07-24 21:24:01 +0300 | [diff] [blame] | 2311 | dev_dbg(&bp->pdev->dev, "Cadence caps 0x%08x\n", bp->caps); |
Nicolas Ferre | e175587 | 2014-07-24 13:50:58 +0200 | [diff] [blame] | 2312 | } |
| 2313 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 2314 | static void macb_probe_queues(void __iomem *mem, |
Andy Shevchenko | f2ce8a9 | 2015-07-24 21:23:59 +0300 | [diff] [blame] | 2315 | bool native_io, |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 2316 | unsigned int *queue_mask, |
| 2317 | unsigned int *num_queues) |
| 2318 | { |
| 2319 | unsigned int hw_q; |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 2320 | |
| 2321 | *queue_mask = 0x1; |
| 2322 | *num_queues = 1; |
| 2323 | |
Nicolas Ferre | da12011 | 2015-03-31 15:02:00 +0200 | [diff] [blame] | 2324 | /* is it macb or gem ? |
| 2325 | * |
| 2326 | * We need to read directly from the hardware here because |
| 2327 | * we are early in the probe process and don't have the |
| 2328 | * MACB_CAPS_MACB_IS_GEM flag positioned |
| 2329 | */ |
Andy Shevchenko | f2ce8a9 | 2015-07-24 21:23:59 +0300 | [diff] [blame] | 2330 | if (!hw_is_gem(mem, native_io)) |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 2331 | return; |
| 2332 | |
| 2333 | /* bit 0 is never set but queue 0 always exists */ |
Arun Chandran | a50dad3 | 2015-02-18 16:59:35 +0530 | [diff] [blame] | 2334 | *queue_mask = readl_relaxed(mem + GEM_DCFG6) & 0xff; |
| 2335 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 2336 | *queue_mask |= 0x1; |
| 2337 | |
| 2338 | for (hw_q = 1; hw_q < MACB_MAX_QUEUES; ++hw_q) |
| 2339 | if (*queue_mask & (1 << hw_q)) |
| 2340 | (*num_queues)++; |
| 2341 | } |
| 2342 | |
Nicolas Ferre | c69618b | 2015-03-31 15:02:03 +0200 | [diff] [blame] | 2343 | static int macb_clk_init(struct platform_device *pdev, struct clk **pclk, |
| 2344 | struct clk **hclk, struct clk **tx_clk) |
| 2345 | { |
| 2346 | int err; |
| 2347 | |
| 2348 | *pclk = devm_clk_get(&pdev->dev, "pclk"); |
| 2349 | if (IS_ERR(*pclk)) { |
| 2350 | err = PTR_ERR(*pclk); |
| 2351 | dev_err(&pdev->dev, "failed to get macb_clk (%u)\n", err); |
| 2352 | return err; |
| 2353 | } |
| 2354 | |
| 2355 | *hclk = devm_clk_get(&pdev->dev, "hclk"); |
| 2356 | if (IS_ERR(*hclk)) { |
| 2357 | err = PTR_ERR(*hclk); |
| 2358 | dev_err(&pdev->dev, "failed to get hclk (%u)\n", err); |
| 2359 | return err; |
| 2360 | } |
| 2361 | |
| 2362 | *tx_clk = devm_clk_get(&pdev->dev, "tx_clk"); |
| 2363 | if (IS_ERR(*tx_clk)) |
| 2364 | *tx_clk = NULL; |
| 2365 | |
| 2366 | err = clk_prepare_enable(*pclk); |
| 2367 | if (err) { |
| 2368 | dev_err(&pdev->dev, "failed to enable pclk (%u)\n", err); |
| 2369 | return err; |
| 2370 | } |
| 2371 | |
| 2372 | err = clk_prepare_enable(*hclk); |
| 2373 | if (err) { |
| 2374 | dev_err(&pdev->dev, "failed to enable hclk (%u)\n", err); |
| 2375 | goto err_disable_pclk; |
| 2376 | } |
| 2377 | |
| 2378 | err = clk_prepare_enable(*tx_clk); |
| 2379 | if (err) { |
| 2380 | dev_err(&pdev->dev, "failed to enable tx_clk (%u)\n", err); |
| 2381 | goto err_disable_hclk; |
| 2382 | } |
| 2383 | |
| 2384 | return 0; |
| 2385 | |
| 2386 | err_disable_hclk: |
| 2387 | clk_disable_unprepare(*hclk); |
| 2388 | |
| 2389 | err_disable_pclk: |
| 2390 | clk_disable_unprepare(*pclk); |
| 2391 | |
| 2392 | return err; |
| 2393 | } |
| 2394 | |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2395 | static int macb_init(struct platform_device *pdev) |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 2396 | { |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2397 | struct net_device *dev = platform_get_drvdata(pdev); |
Nicolas Ferre | bfa0914 | 2015-03-31 15:01:59 +0200 | [diff] [blame] | 2398 | unsigned int hw_q, q; |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2399 | struct macb *bp = netdev_priv(dev); |
| 2400 | struct macb_queue *queue; |
| 2401 | int err; |
| 2402 | u32 val; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 2403 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 2404 | /* set the queue register mapping once for all: queue0 has a special |
| 2405 | * register mapping but we don't want to test the queue index then |
| 2406 | * compute the corresponding register offset at run time. |
| 2407 | */ |
Cyrille Pitchen | cf250de | 2014-12-15 15:13:32 +0100 | [diff] [blame] | 2408 | for (hw_q = 0, q = 0; hw_q < MACB_MAX_QUEUES; ++hw_q) { |
Nicolas Ferre | bfa0914 | 2015-03-31 15:01:59 +0200 | [diff] [blame] | 2409 | if (!(bp->queue_mask & (1 << hw_q))) |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 2410 | continue; |
Jamie Iles | 461845d | 2011-03-08 20:19:23 +0000 | [diff] [blame] | 2411 | |
Cyrille Pitchen | cf250de | 2014-12-15 15:13:32 +0100 | [diff] [blame] | 2412 | queue = &bp->queues[q]; |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 2413 | queue->bp = bp; |
| 2414 | if (hw_q) { |
| 2415 | queue->ISR = GEM_ISR(hw_q - 1); |
| 2416 | queue->IER = GEM_IER(hw_q - 1); |
| 2417 | queue->IDR = GEM_IDR(hw_q - 1); |
| 2418 | queue->IMR = GEM_IMR(hw_q - 1); |
| 2419 | queue->TBQP = GEM_TBQP(hw_q - 1); |
| 2420 | } else { |
| 2421 | /* queue0 uses legacy registers */ |
| 2422 | queue->ISR = MACB_ISR; |
| 2423 | queue->IER = MACB_IER; |
| 2424 | queue->IDR = MACB_IDR; |
| 2425 | queue->IMR = MACB_IMR; |
| 2426 | queue->TBQP = MACB_TBQP; |
Soren Brinkmann | e1824df | 2013-12-10 16:07:23 -0800 | [diff] [blame] | 2427 | } |
Soren Brinkmann | e1824df | 2013-12-10 16:07:23 -0800 | [diff] [blame] | 2428 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 2429 | /* get irq: here we use the linux queue index, not the hardware |
| 2430 | * queue index. the queue irq definitions in the device tree |
| 2431 | * must remove the optional gaps that could exist in the |
| 2432 | * hardware queue mask. |
| 2433 | */ |
Cyrille Pitchen | cf250de | 2014-12-15 15:13:32 +0100 | [diff] [blame] | 2434 | queue->irq = platform_get_irq(pdev, q); |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 2435 | err = devm_request_irq(&pdev->dev, queue->irq, macb_interrupt, |
Punnaiah Choudary Kalluri | 2048823 | 2015-03-06 18:29:12 +0100 | [diff] [blame] | 2436 | IRQF_SHARED, dev->name, queue); |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 2437 | if (err) { |
| 2438 | dev_err(&pdev->dev, |
| 2439 | "Unable to request IRQ %d (error %d)\n", |
| 2440 | queue->irq, err); |
Nicolas Ferre | c69618b | 2015-03-31 15:02:03 +0200 | [diff] [blame] | 2441 | return err; |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 2442 | } |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 2443 | |
Cyrille Pitchen | 02c958d | 2014-12-12 13:26:44 +0100 | [diff] [blame] | 2444 | INIT_WORK(&queue->tx_error_task, macb_tx_error_task); |
Cyrille Pitchen | cf250de | 2014-12-15 15:13:32 +0100 | [diff] [blame] | 2445 | q++; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 2446 | } |
| 2447 | |
Alexander Beregalov | 5f1fa99 | 2009-04-11 07:42:26 +0000 | [diff] [blame] | 2448 | dev->netdev_ops = &macb_netdev_ops; |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 2449 | netif_napi_add(dev, &bp->napi, macb_poll, 64); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 2450 | |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 2451 | /* setup appropriated routines according to adapter type */ |
| 2452 | if (macb_is_gem(bp)) { |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 2453 | bp->max_tx_length = GEM_MAX_TX_LEN; |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 2454 | bp->macbgem_ops.mog_alloc_rx_buffers = gem_alloc_rx_buffers; |
| 2455 | bp->macbgem_ops.mog_free_rx_buffers = gem_free_rx_buffers; |
| 2456 | bp->macbgem_ops.mog_init_rings = gem_init_rings; |
| 2457 | bp->macbgem_ops.mog_rx = gem_rx; |
Xander Huff | 8cd5a56 | 2015-01-15 15:55:20 -0600 | [diff] [blame] | 2458 | dev->ethtool_ops = &gem_ethtool_ops; |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 2459 | } else { |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 2460 | bp->max_tx_length = MACB_MAX_TX_LEN; |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 2461 | bp->macbgem_ops.mog_alloc_rx_buffers = macb_alloc_rx_buffers; |
| 2462 | bp->macbgem_ops.mog_free_rx_buffers = macb_free_rx_buffers; |
| 2463 | bp->macbgem_ops.mog_init_rings = macb_init_rings; |
| 2464 | bp->macbgem_ops.mog_rx = macb_rx; |
Xander Huff | 8cd5a56 | 2015-01-15 15:55:20 -0600 | [diff] [blame] | 2465 | dev->ethtool_ops = &macb_ethtool_ops; |
Nicolas Ferre | 4df9513 | 2013-06-04 21:57:12 +0000 | [diff] [blame] | 2466 | } |
| 2467 | |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 2468 | /* Set features */ |
| 2469 | dev->hw_features = NETIF_F_SG; |
Cyrille Pitchen | 85ff3d8 | 2014-07-24 13:51:00 +0200 | [diff] [blame] | 2470 | /* Checksum offload is only available on gem with packet buffer */ |
| 2471 | if (macb_is_gem(bp) && !(bp->caps & MACB_CAPS_FIFO_MODE)) |
Cyrille Pitchen | 924ec53 | 2014-07-24 13:51:01 +0200 | [diff] [blame] | 2472 | dev->hw_features |= NETIF_F_HW_CSUM | NETIF_F_RXCSUM; |
Cyrille Pitchen | a4c35ed3 | 2014-07-24 13:50:59 +0200 | [diff] [blame] | 2473 | if (bp->caps & MACB_CAPS_SG_DISABLED) |
| 2474 | dev->hw_features &= ~NETIF_F_SG; |
| 2475 | dev->features = dev->hw_features; |
| 2476 | |
Neil Armstrong | ce721a7 | 2016-01-05 14:39:16 +0100 | [diff] [blame] | 2477 | if (!(bp->caps & MACB_CAPS_USRIO_DISABLED)) { |
| 2478 | val = 0; |
| 2479 | if (bp->phy_interface == PHY_INTERFACE_MODE_RGMII) |
| 2480 | val = GEM_BIT(RGMII); |
| 2481 | else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII && |
Nicolas Ferre | 6bdaa5e | 2016-03-10 16:44:32 +0100 | [diff] [blame] | 2482 | (bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII)) |
Neil Armstrong | ce721a7 | 2016-01-05 14:39:16 +0100 | [diff] [blame] | 2483 | val = MACB_BIT(RMII); |
Nicolas Ferre | 6bdaa5e | 2016-03-10 16:44:32 +0100 | [diff] [blame] | 2484 | else if (!(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII)) |
Neil Armstrong | ce721a7 | 2016-01-05 14:39:16 +0100 | [diff] [blame] | 2485 | val = MACB_BIT(MII); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 2486 | |
Neil Armstrong | ce721a7 | 2016-01-05 14:39:16 +0100 | [diff] [blame] | 2487 | if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN) |
| 2488 | val |= MACB_BIT(CLKEN); |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2489 | |
Neil Armstrong | ce721a7 | 2016-01-05 14:39:16 +0100 | [diff] [blame] | 2490 | macb_or_gem_writel(bp, USRIO, val); |
| 2491 | } |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2492 | |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2493 | /* Set MII management clock divider */ |
| 2494 | val = macb_mdc_clk_div(bp); |
| 2495 | val |= macb_dbw(bp); |
Punnaiah Choudary Kalluri | 022be25 | 2015-11-18 09:03:50 +0530 | [diff] [blame] | 2496 | if (bp->phy_interface == PHY_INTERFACE_MODE_SGMII) |
| 2497 | val |= GEM_BIT(SGMIIEN) | GEM_BIT(PCSSEL); |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2498 | macb_writel(bp, NCFGR, val); |
| 2499 | |
| 2500 | return 0; |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2501 | } |
| 2502 | |
| 2503 | #if defined(CONFIG_OF) |
| 2504 | /* 1518 rounded up */ |
| 2505 | #define AT91ETHER_MAX_RBUFF_SZ 0x600 |
| 2506 | /* max number of receive buffers */ |
| 2507 | #define AT91ETHER_MAX_RX_DESCR 9 |
| 2508 | |
| 2509 | /* Initialize and start the Receiver and Transmit subsystems */ |
| 2510 | static int at91ether_start(struct net_device *dev) |
| 2511 | { |
| 2512 | struct macb *lp = netdev_priv(dev); |
| 2513 | dma_addr_t addr; |
| 2514 | u32 ctl; |
| 2515 | int i; |
| 2516 | |
| 2517 | lp->rx_ring = dma_alloc_coherent(&lp->pdev->dev, |
| 2518 | (AT91ETHER_MAX_RX_DESCR * |
| 2519 | sizeof(struct macb_dma_desc)), |
| 2520 | &lp->rx_ring_dma, GFP_KERNEL); |
| 2521 | if (!lp->rx_ring) |
| 2522 | return -ENOMEM; |
| 2523 | |
| 2524 | lp->rx_buffers = dma_alloc_coherent(&lp->pdev->dev, |
| 2525 | AT91ETHER_MAX_RX_DESCR * |
| 2526 | AT91ETHER_MAX_RBUFF_SZ, |
| 2527 | &lp->rx_buffers_dma, GFP_KERNEL); |
| 2528 | if (!lp->rx_buffers) { |
| 2529 | dma_free_coherent(&lp->pdev->dev, |
| 2530 | AT91ETHER_MAX_RX_DESCR * |
| 2531 | sizeof(struct macb_dma_desc), |
| 2532 | lp->rx_ring, lp->rx_ring_dma); |
| 2533 | lp->rx_ring = NULL; |
| 2534 | return -ENOMEM; |
| 2535 | } |
| 2536 | |
| 2537 | addr = lp->rx_buffers_dma; |
| 2538 | for (i = 0; i < AT91ETHER_MAX_RX_DESCR; i++) { |
| 2539 | lp->rx_ring[i].addr = addr; |
| 2540 | lp->rx_ring[i].ctrl = 0; |
| 2541 | addr += AT91ETHER_MAX_RBUFF_SZ; |
| 2542 | } |
| 2543 | |
| 2544 | /* Set the Wrap bit on the last descriptor */ |
| 2545 | lp->rx_ring[AT91ETHER_MAX_RX_DESCR - 1].addr |= MACB_BIT(RX_WRAP); |
| 2546 | |
| 2547 | /* Reset buffer index */ |
| 2548 | lp->rx_tail = 0; |
| 2549 | |
| 2550 | /* Program address of descriptor list in Rx Buffer Queue register */ |
| 2551 | macb_writel(lp, RBQP, lp->rx_ring_dma); |
| 2552 | |
| 2553 | /* Enable Receive and Transmit */ |
| 2554 | ctl = macb_readl(lp, NCR); |
| 2555 | macb_writel(lp, NCR, ctl | MACB_BIT(RE) | MACB_BIT(TE)); |
| 2556 | |
| 2557 | return 0; |
| 2558 | } |
| 2559 | |
| 2560 | /* Open the ethernet interface */ |
| 2561 | static int at91ether_open(struct net_device *dev) |
| 2562 | { |
| 2563 | struct macb *lp = netdev_priv(dev); |
| 2564 | u32 ctl; |
| 2565 | int ret; |
| 2566 | |
| 2567 | /* Clear internal statistics */ |
| 2568 | ctl = macb_readl(lp, NCR); |
| 2569 | macb_writel(lp, NCR, ctl | MACB_BIT(CLRSTAT)); |
| 2570 | |
| 2571 | macb_set_hwaddr(lp); |
| 2572 | |
| 2573 | ret = at91ether_start(dev); |
| 2574 | if (ret) |
| 2575 | return ret; |
| 2576 | |
| 2577 | /* Enable MAC interrupts */ |
| 2578 | macb_writel(lp, IER, MACB_BIT(RCOMP) | |
| 2579 | MACB_BIT(RXUBR) | |
| 2580 | MACB_BIT(ISR_TUND) | |
| 2581 | MACB_BIT(ISR_RLE) | |
| 2582 | MACB_BIT(TCOMP) | |
| 2583 | MACB_BIT(ISR_ROVR) | |
| 2584 | MACB_BIT(HRESP)); |
| 2585 | |
| 2586 | /* schedule a link state check */ |
| 2587 | phy_start(lp->phy_dev); |
| 2588 | |
| 2589 | netif_start_queue(dev); |
| 2590 | |
| 2591 | return 0; |
| 2592 | } |
| 2593 | |
| 2594 | /* Close the interface */ |
| 2595 | static int at91ether_close(struct net_device *dev) |
| 2596 | { |
| 2597 | struct macb *lp = netdev_priv(dev); |
| 2598 | u32 ctl; |
| 2599 | |
| 2600 | /* Disable Receiver and Transmitter */ |
| 2601 | ctl = macb_readl(lp, NCR); |
| 2602 | macb_writel(lp, NCR, ctl & ~(MACB_BIT(TE) | MACB_BIT(RE))); |
| 2603 | |
| 2604 | /* Disable MAC interrupts */ |
| 2605 | macb_writel(lp, IDR, MACB_BIT(RCOMP) | |
| 2606 | MACB_BIT(RXUBR) | |
| 2607 | MACB_BIT(ISR_TUND) | |
| 2608 | MACB_BIT(ISR_RLE) | |
| 2609 | MACB_BIT(TCOMP) | |
| 2610 | MACB_BIT(ISR_ROVR) | |
| 2611 | MACB_BIT(HRESP)); |
| 2612 | |
| 2613 | netif_stop_queue(dev); |
| 2614 | |
| 2615 | dma_free_coherent(&lp->pdev->dev, |
| 2616 | AT91ETHER_MAX_RX_DESCR * |
| 2617 | sizeof(struct macb_dma_desc), |
| 2618 | lp->rx_ring, lp->rx_ring_dma); |
| 2619 | lp->rx_ring = NULL; |
| 2620 | |
| 2621 | dma_free_coherent(&lp->pdev->dev, |
| 2622 | AT91ETHER_MAX_RX_DESCR * AT91ETHER_MAX_RBUFF_SZ, |
| 2623 | lp->rx_buffers, lp->rx_buffers_dma); |
| 2624 | lp->rx_buffers = NULL; |
| 2625 | |
| 2626 | return 0; |
| 2627 | } |
| 2628 | |
| 2629 | /* Transmit packet */ |
| 2630 | static int at91ether_start_xmit(struct sk_buff *skb, struct net_device *dev) |
| 2631 | { |
| 2632 | struct macb *lp = netdev_priv(dev); |
| 2633 | |
| 2634 | if (macb_readl(lp, TSR) & MACB_BIT(RM9200_BNQ)) { |
| 2635 | netif_stop_queue(dev); |
| 2636 | |
| 2637 | /* Store packet information (to free when Tx completed) */ |
| 2638 | lp->skb = skb; |
| 2639 | lp->skb_length = skb->len; |
| 2640 | lp->skb_physaddr = dma_map_single(NULL, skb->data, skb->len, |
| 2641 | DMA_TO_DEVICE); |
| 2642 | |
| 2643 | /* Set address of the data in the Transmit Address register */ |
| 2644 | macb_writel(lp, TAR, lp->skb_physaddr); |
| 2645 | /* Set length of the packet in the Transmit Control register */ |
| 2646 | macb_writel(lp, TCR, skb->len); |
| 2647 | |
| 2648 | } else { |
| 2649 | netdev_err(dev, "%s called, but device is busy!\n", __func__); |
| 2650 | return NETDEV_TX_BUSY; |
| 2651 | } |
| 2652 | |
| 2653 | return NETDEV_TX_OK; |
| 2654 | } |
| 2655 | |
| 2656 | /* Extract received frame from buffer descriptors and sent to upper layers. |
| 2657 | * (Called from interrupt context) |
| 2658 | */ |
| 2659 | static void at91ether_rx(struct net_device *dev) |
| 2660 | { |
| 2661 | struct macb *lp = netdev_priv(dev); |
| 2662 | unsigned char *p_recv; |
| 2663 | struct sk_buff *skb; |
| 2664 | unsigned int pktlen; |
| 2665 | |
| 2666 | while (lp->rx_ring[lp->rx_tail].addr & MACB_BIT(RX_USED)) { |
| 2667 | p_recv = lp->rx_buffers + lp->rx_tail * AT91ETHER_MAX_RBUFF_SZ; |
| 2668 | pktlen = MACB_BF(RX_FRMLEN, lp->rx_ring[lp->rx_tail].ctrl); |
| 2669 | skb = netdev_alloc_skb(dev, pktlen + 2); |
| 2670 | if (skb) { |
| 2671 | skb_reserve(skb, 2); |
| 2672 | memcpy(skb_put(skb, pktlen), p_recv, pktlen); |
| 2673 | |
| 2674 | skb->protocol = eth_type_trans(skb, dev); |
| 2675 | lp->stats.rx_packets++; |
| 2676 | lp->stats.rx_bytes += pktlen; |
| 2677 | netif_rx(skb); |
| 2678 | } else { |
| 2679 | lp->stats.rx_dropped++; |
| 2680 | } |
| 2681 | |
| 2682 | if (lp->rx_ring[lp->rx_tail].ctrl & MACB_BIT(RX_MHASH_MATCH)) |
| 2683 | lp->stats.multicast++; |
| 2684 | |
| 2685 | /* reset ownership bit */ |
| 2686 | lp->rx_ring[lp->rx_tail].addr &= ~MACB_BIT(RX_USED); |
| 2687 | |
| 2688 | /* wrap after last buffer */ |
| 2689 | if (lp->rx_tail == AT91ETHER_MAX_RX_DESCR - 1) |
| 2690 | lp->rx_tail = 0; |
| 2691 | else |
| 2692 | lp->rx_tail++; |
| 2693 | } |
| 2694 | } |
| 2695 | |
| 2696 | /* MAC interrupt handler */ |
| 2697 | static irqreturn_t at91ether_interrupt(int irq, void *dev_id) |
| 2698 | { |
| 2699 | struct net_device *dev = dev_id; |
| 2700 | struct macb *lp = netdev_priv(dev); |
| 2701 | u32 intstatus, ctl; |
| 2702 | |
| 2703 | /* MAC Interrupt Status register indicates what interrupts are pending. |
| 2704 | * It is automatically cleared once read. |
| 2705 | */ |
| 2706 | intstatus = macb_readl(lp, ISR); |
| 2707 | |
| 2708 | /* Receive complete */ |
| 2709 | if (intstatus & MACB_BIT(RCOMP)) |
| 2710 | at91ether_rx(dev); |
| 2711 | |
| 2712 | /* Transmit complete */ |
| 2713 | if (intstatus & MACB_BIT(TCOMP)) { |
| 2714 | /* The TCOM bit is set even if the transmission failed */ |
| 2715 | if (intstatus & (MACB_BIT(ISR_TUND) | MACB_BIT(ISR_RLE))) |
| 2716 | lp->stats.tx_errors++; |
| 2717 | |
| 2718 | if (lp->skb) { |
| 2719 | dev_kfree_skb_irq(lp->skb); |
| 2720 | lp->skb = NULL; |
| 2721 | dma_unmap_single(NULL, lp->skb_physaddr, |
| 2722 | lp->skb_length, DMA_TO_DEVICE); |
| 2723 | lp->stats.tx_packets++; |
| 2724 | lp->stats.tx_bytes += lp->skb_length; |
| 2725 | } |
| 2726 | netif_wake_queue(dev); |
| 2727 | } |
| 2728 | |
| 2729 | /* Work-around for EMAC Errata section 41.3.1 */ |
| 2730 | if (intstatus & MACB_BIT(RXUBR)) { |
| 2731 | ctl = macb_readl(lp, NCR); |
| 2732 | macb_writel(lp, NCR, ctl & ~MACB_BIT(RE)); |
| 2733 | macb_writel(lp, NCR, ctl | MACB_BIT(RE)); |
| 2734 | } |
| 2735 | |
| 2736 | if (intstatus & MACB_BIT(ISR_ROVR)) |
| 2737 | netdev_err(dev, "ROVR error\n"); |
| 2738 | |
| 2739 | return IRQ_HANDLED; |
| 2740 | } |
| 2741 | |
| 2742 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 2743 | static void at91ether_poll_controller(struct net_device *dev) |
| 2744 | { |
| 2745 | unsigned long flags; |
| 2746 | |
| 2747 | local_irq_save(flags); |
| 2748 | at91ether_interrupt(dev->irq, dev); |
| 2749 | local_irq_restore(flags); |
| 2750 | } |
| 2751 | #endif |
| 2752 | |
| 2753 | static const struct net_device_ops at91ether_netdev_ops = { |
| 2754 | .ndo_open = at91ether_open, |
| 2755 | .ndo_stop = at91ether_close, |
| 2756 | .ndo_start_xmit = at91ether_start_xmit, |
| 2757 | .ndo_get_stats = macb_get_stats, |
| 2758 | .ndo_set_rx_mode = macb_set_rx_mode, |
| 2759 | .ndo_set_mac_address = eth_mac_addr, |
| 2760 | .ndo_do_ioctl = macb_ioctl, |
| 2761 | .ndo_validate_addr = eth_validate_addr, |
| 2762 | .ndo_change_mtu = eth_change_mtu, |
| 2763 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 2764 | .ndo_poll_controller = at91ether_poll_controller, |
| 2765 | #endif |
| 2766 | }; |
| 2767 | |
Nicolas Ferre | c69618b | 2015-03-31 15:02:03 +0200 | [diff] [blame] | 2768 | static int at91ether_clk_init(struct platform_device *pdev, struct clk **pclk, |
| 2769 | struct clk **hclk, struct clk **tx_clk) |
| 2770 | { |
| 2771 | int err; |
| 2772 | |
| 2773 | *hclk = NULL; |
| 2774 | *tx_clk = NULL; |
| 2775 | |
| 2776 | *pclk = devm_clk_get(&pdev->dev, "ether_clk"); |
| 2777 | if (IS_ERR(*pclk)) |
| 2778 | return PTR_ERR(*pclk); |
| 2779 | |
| 2780 | err = clk_prepare_enable(*pclk); |
| 2781 | if (err) { |
| 2782 | dev_err(&pdev->dev, "failed to enable pclk (%u)\n", err); |
| 2783 | return err; |
| 2784 | } |
| 2785 | |
| 2786 | return 0; |
| 2787 | } |
| 2788 | |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2789 | static int at91ether_init(struct platform_device *pdev) |
| 2790 | { |
| 2791 | struct net_device *dev = platform_get_drvdata(pdev); |
| 2792 | struct macb *bp = netdev_priv(dev); |
| 2793 | int err; |
| 2794 | u32 reg; |
| 2795 | |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2796 | dev->netdev_ops = &at91ether_netdev_ops; |
| 2797 | dev->ethtool_ops = &macb_ethtool_ops; |
| 2798 | |
| 2799 | err = devm_request_irq(&pdev->dev, dev->irq, at91ether_interrupt, |
| 2800 | 0, dev->name, dev); |
| 2801 | if (err) |
Nicolas Ferre | c69618b | 2015-03-31 15:02:03 +0200 | [diff] [blame] | 2802 | return err; |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2803 | |
| 2804 | macb_writel(bp, NCR, 0); |
| 2805 | |
| 2806 | reg = MACB_BF(CLK, MACB_CLK_DIV32) | MACB_BIT(BIG); |
| 2807 | if (bp->phy_interface == PHY_INTERFACE_MODE_RMII) |
| 2808 | reg |= MACB_BIT(RM9200_RMII); |
| 2809 | |
| 2810 | macb_writel(bp, NCFGR, reg); |
| 2811 | |
| 2812 | return 0; |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2813 | } |
| 2814 | |
David S. Miller | 3cef5c5 | 2015-03-09 23:38:02 -0400 | [diff] [blame] | 2815 | static const struct macb_config at91sam9260_config = { |
Nicolas Ferre | 6bdaa5e | 2016-03-10 16:44:32 +0100 | [diff] [blame] | 2816 | .caps = MACB_CAPS_USRIO_HAS_CLKEN | MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII, |
Nicolas Ferre | c69618b | 2015-03-31 15:02:03 +0200 | [diff] [blame] | 2817 | .clk_init = macb_clk_init, |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2818 | .init = macb_init, |
| 2819 | }; |
| 2820 | |
David S. Miller | 3cef5c5 | 2015-03-09 23:38:02 -0400 | [diff] [blame] | 2821 | static const struct macb_config pc302gem_config = { |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2822 | .caps = MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE, |
| 2823 | .dma_burst_length = 16, |
Nicolas Ferre | c69618b | 2015-03-31 15:02:03 +0200 | [diff] [blame] | 2824 | .clk_init = macb_clk_init, |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2825 | .init = macb_init, |
| 2826 | }; |
| 2827 | |
Cyrille Pitchen | 5c8fe71 | 2015-06-18 16:27:23 +0200 | [diff] [blame] | 2828 | static const struct macb_config sama5d2_config = { |
Nicolas Ferre | 6bdaa5e | 2016-03-10 16:44:32 +0100 | [diff] [blame] | 2829 | .caps = MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII, |
Cyrille Pitchen | 5c8fe71 | 2015-06-18 16:27:23 +0200 | [diff] [blame] | 2830 | .dma_burst_length = 16, |
| 2831 | .clk_init = macb_clk_init, |
| 2832 | .init = macb_init, |
| 2833 | }; |
| 2834 | |
David S. Miller | 3cef5c5 | 2015-03-09 23:38:02 -0400 | [diff] [blame] | 2835 | static const struct macb_config sama5d3_config = { |
Nicolas Ferre | 6bdaa5e | 2016-03-10 16:44:32 +0100 | [diff] [blame] | 2836 | .caps = MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE |
| 2837 | | MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII, |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2838 | .dma_burst_length = 16, |
Nicolas Ferre | c69618b | 2015-03-31 15:02:03 +0200 | [diff] [blame] | 2839 | .clk_init = macb_clk_init, |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2840 | .init = macb_init, |
| 2841 | }; |
| 2842 | |
David S. Miller | 3cef5c5 | 2015-03-09 23:38:02 -0400 | [diff] [blame] | 2843 | static const struct macb_config sama5d4_config = { |
Nicolas Ferre | 6bdaa5e | 2016-03-10 16:44:32 +0100 | [diff] [blame] | 2844 | .caps = MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII, |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2845 | .dma_burst_length = 4, |
Nicolas Ferre | c69618b | 2015-03-31 15:02:03 +0200 | [diff] [blame] | 2846 | .clk_init = macb_clk_init, |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2847 | .init = macb_init, |
| 2848 | }; |
| 2849 | |
David S. Miller | 3cef5c5 | 2015-03-09 23:38:02 -0400 | [diff] [blame] | 2850 | static const struct macb_config emac_config = { |
Nicolas Ferre | c69618b | 2015-03-31 15:02:03 +0200 | [diff] [blame] | 2851 | .clk_init = at91ether_clk_init, |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2852 | .init = at91ether_init, |
| 2853 | }; |
| 2854 | |
Neil Armstrong | e611b5b | 2016-01-05 14:39:17 +0100 | [diff] [blame] | 2855 | static const struct macb_config np4_config = { |
| 2856 | .caps = MACB_CAPS_USRIO_DISABLED, |
| 2857 | .clk_init = macb_clk_init, |
| 2858 | .init = macb_init, |
| 2859 | }; |
David S. Miller | 36583eb | 2015-05-23 01:22:35 -0400 | [diff] [blame] | 2860 | |
Harini Katakam | 7b61f9c | 2015-05-06 22:27:16 +0530 | [diff] [blame] | 2861 | static const struct macb_config zynqmp_config = { |
Punnaiah Choudary Kalluri | 7baaa90 | 2015-07-06 10:02:53 +0530 | [diff] [blame] | 2862 | .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO, |
Harini Katakam | 7b61f9c | 2015-05-06 22:27:16 +0530 | [diff] [blame] | 2863 | .dma_burst_length = 16, |
| 2864 | .clk_init = macb_clk_init, |
| 2865 | .init = macb_init, |
Harini Katakam | 98b5a0f4 | 2015-05-06 22:27:17 +0530 | [diff] [blame] | 2866 | .jumbo_max_len = 10240, |
Harini Katakam | 7b61f9c | 2015-05-06 22:27:16 +0530 | [diff] [blame] | 2867 | }; |
| 2868 | |
Nathan Sullivan | 222ca8e | 2015-05-22 09:22:10 -0500 | [diff] [blame] | 2869 | static const struct macb_config zynq_config = { |
Punnaiah Choudary Kalluri | 7baaa90 | 2015-07-06 10:02:53 +0530 | [diff] [blame] | 2870 | .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_NO_GIGABIT_HALF, |
Nathan Sullivan | 222ca8e | 2015-05-22 09:22:10 -0500 | [diff] [blame] | 2871 | .dma_burst_length = 16, |
| 2872 | .clk_init = macb_clk_init, |
| 2873 | .init = macb_init, |
| 2874 | }; |
| 2875 | |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2876 | static const struct of_device_id macb_dt_ids[] = { |
| 2877 | { .compatible = "cdns,at32ap7000-macb" }, |
| 2878 | { .compatible = "cdns,at91sam9260-macb", .data = &at91sam9260_config }, |
| 2879 | { .compatible = "cdns,macb" }, |
Neil Armstrong | e611b5b | 2016-01-05 14:39:17 +0100 | [diff] [blame] | 2880 | { .compatible = "cdns,np4-macb", .data = &np4_config }, |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2881 | { .compatible = "cdns,pc302-gem", .data = &pc302gem_config }, |
| 2882 | { .compatible = "cdns,gem", .data = &pc302gem_config }, |
Cyrille Pitchen | 5c8fe71 | 2015-06-18 16:27:23 +0200 | [diff] [blame] | 2883 | { .compatible = "atmel,sama5d2-gem", .data = &sama5d2_config }, |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2884 | { .compatible = "atmel,sama5d3-gem", .data = &sama5d3_config }, |
| 2885 | { .compatible = "atmel,sama5d4-gem", .data = &sama5d4_config }, |
| 2886 | { .compatible = "cdns,at91rm9200-emac", .data = &emac_config }, |
| 2887 | { .compatible = "cdns,emac", .data = &emac_config }, |
Harini Katakam | 7b61f9c | 2015-05-06 22:27:16 +0530 | [diff] [blame] | 2888 | { .compatible = "cdns,zynqmp-gem", .data = &zynqmp_config}, |
Nathan Sullivan | 222ca8e | 2015-05-22 09:22:10 -0500 | [diff] [blame] | 2889 | { .compatible = "cdns,zynq-gem", .data = &zynq_config }, |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2890 | { /* sentinel */ } |
| 2891 | }; |
| 2892 | MODULE_DEVICE_TABLE(of, macb_dt_ids); |
| 2893 | #endif /* CONFIG_OF */ |
| 2894 | |
| 2895 | static int macb_probe(struct platform_device *pdev) |
| 2896 | { |
Nicolas Ferre | c69618b | 2015-03-31 15:02:03 +0200 | [diff] [blame] | 2897 | int (*clk_init)(struct platform_device *, struct clk **, |
| 2898 | struct clk **, struct clk **) |
| 2899 | = macb_clk_init; |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2900 | int (*init)(struct platform_device *) = macb_init; |
| 2901 | struct device_node *np = pdev->dev.of_node; |
Gregory CLEMENT | 270c499 | 2015-12-17 10:51:04 +0100 | [diff] [blame] | 2902 | struct device_node *phy_node; |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2903 | const struct macb_config *macb_config = NULL; |
Sudip Mukherjee | 36df745 | 2016-01-25 11:43:09 +0530 | [diff] [blame] | 2904 | struct clk *pclk, *hclk = NULL, *tx_clk = NULL; |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2905 | unsigned int queue_mask, num_queues; |
| 2906 | struct macb_platform_data *pdata; |
Andy Shevchenko | f2ce8a9 | 2015-07-24 21:23:59 +0300 | [diff] [blame] | 2907 | bool native_io; |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2908 | struct phy_device *phydev; |
| 2909 | struct net_device *dev; |
| 2910 | struct resource *regs; |
| 2911 | void __iomem *mem; |
| 2912 | const char *mac; |
| 2913 | struct macb *bp; |
| 2914 | int err; |
| 2915 | |
Andy Shevchenko | f2ce8a9 | 2015-07-24 21:23:59 +0300 | [diff] [blame] | 2916 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 2917 | mem = devm_ioremap_resource(&pdev->dev, regs); |
| 2918 | if (IS_ERR(mem)) |
| 2919 | return PTR_ERR(mem); |
| 2920 | |
Nicolas Ferre | c69618b | 2015-03-31 15:02:03 +0200 | [diff] [blame] | 2921 | if (np) { |
| 2922 | const struct of_device_id *match; |
| 2923 | |
| 2924 | match = of_match_node(macb_dt_ids, np); |
| 2925 | if (match && match->data) { |
| 2926 | macb_config = match->data; |
| 2927 | clk_init = macb_config->clk_init; |
| 2928 | init = macb_config->init; |
| 2929 | } |
| 2930 | } |
| 2931 | |
| 2932 | err = clk_init(pdev, &pclk, &hclk, &tx_clk); |
| 2933 | if (err) |
| 2934 | return err; |
| 2935 | |
Andy Shevchenko | f2ce8a9 | 2015-07-24 21:23:59 +0300 | [diff] [blame] | 2936 | native_io = hw_is_native_io(mem); |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2937 | |
Andy Shevchenko | f2ce8a9 | 2015-07-24 21:23:59 +0300 | [diff] [blame] | 2938 | macb_probe_queues(mem, native_io, &queue_mask, &num_queues); |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2939 | dev = alloc_etherdev_mq(sizeof(*bp), num_queues); |
Nicolas Ferre | c69618b | 2015-03-31 15:02:03 +0200 | [diff] [blame] | 2940 | if (!dev) { |
| 2941 | err = -ENOMEM; |
| 2942 | goto err_disable_clocks; |
| 2943 | } |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2944 | |
| 2945 | dev->base_addr = regs->start; |
| 2946 | |
| 2947 | SET_NETDEV_DEV(dev, &pdev->dev); |
| 2948 | |
| 2949 | bp = netdev_priv(dev); |
| 2950 | bp->pdev = pdev; |
| 2951 | bp->dev = dev; |
| 2952 | bp->regs = mem; |
Andy Shevchenko | f2ce8a9 | 2015-07-24 21:23:59 +0300 | [diff] [blame] | 2953 | bp->native_io = native_io; |
| 2954 | if (native_io) { |
David S. Miller | 7a6e070 | 2015-07-27 14:24:48 -0700 | [diff] [blame] | 2955 | bp->macb_reg_readl = hw_readl_native; |
| 2956 | bp->macb_reg_writel = hw_writel_native; |
Andy Shevchenko | f2ce8a9 | 2015-07-24 21:23:59 +0300 | [diff] [blame] | 2957 | } else { |
David S. Miller | 7a6e070 | 2015-07-27 14:24:48 -0700 | [diff] [blame] | 2958 | bp->macb_reg_readl = hw_readl; |
| 2959 | bp->macb_reg_writel = hw_writel; |
Andy Shevchenko | f2ce8a9 | 2015-07-24 21:23:59 +0300 | [diff] [blame] | 2960 | } |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2961 | bp->num_queues = num_queues; |
Nicolas Ferre | bfa0914 | 2015-03-31 15:01:59 +0200 | [diff] [blame] | 2962 | bp->queue_mask = queue_mask; |
Nicolas Ferre | c69618b | 2015-03-31 15:02:03 +0200 | [diff] [blame] | 2963 | if (macb_config) |
| 2964 | bp->dma_burst_length = macb_config->dma_burst_length; |
| 2965 | bp->pclk = pclk; |
| 2966 | bp->hclk = hclk; |
| 2967 | bp->tx_clk = tx_clk; |
Andy Shevchenko | f36dbe6 | 2015-07-24 21:24:00 +0300 | [diff] [blame] | 2968 | if (macb_config) |
Harini Katakam | 98b5a0f4 | 2015-05-06 22:27:17 +0530 | [diff] [blame] | 2969 | bp->jumbo_max_len = macb_config->jumbo_max_len; |
Harini Katakam | 98b5a0f4 | 2015-05-06 22:27:17 +0530 | [diff] [blame] | 2970 | |
Sergio Prado | 3e2a5e1 | 2016-02-09 12:07:16 -0200 | [diff] [blame] | 2971 | bp->wol = 0; |
Sergio Prado | 7c4a1d0 | 2016-02-16 21:10:45 -0200 | [diff] [blame] | 2972 | if (of_get_property(np, "magic-packet", NULL)) |
Sergio Prado | 3e2a5e1 | 2016-02-09 12:07:16 -0200 | [diff] [blame] | 2973 | bp->wol |= MACB_WOL_HAS_MAGIC_PACKET; |
| 2974 | device_init_wakeup(&pdev->dev, bp->wol & MACB_WOL_HAS_MAGIC_PACKET); |
| 2975 | |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2976 | spin_lock_init(&bp->lock); |
| 2977 | |
Nicolas Ferre | ad78347 | 2015-03-31 15:02:02 +0200 | [diff] [blame] | 2978 | /* setup capabilities */ |
Nicolas Ferre | f697050 | 2015-03-31 15:02:01 +0200 | [diff] [blame] | 2979 | macb_configure_caps(bp, macb_config); |
| 2980 | |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2981 | platform_set_drvdata(pdev, dev); |
| 2982 | |
| 2983 | dev->irq = platform_get_irq(pdev, 0); |
Nicolas Ferre | c69618b | 2015-03-31 15:02:03 +0200 | [diff] [blame] | 2984 | if (dev->irq < 0) { |
| 2985 | err = dev->irq; |
| 2986 | goto err_disable_clocks; |
| 2987 | } |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 2988 | |
| 2989 | mac = of_get_mac_address(np); |
Guenter Roeck | 5090704 | 2013-04-02 09:35:09 +0000 | [diff] [blame] | 2990 | if (mac) |
| 2991 | memcpy(bp->dev->dev_addr, mac, ETH_ALEN); |
| 2992 | else |
Jean-Christophe PLAGNIOL-VILLARD | fb97a84 | 2011-11-18 15:29:25 +0100 | [diff] [blame] | 2993 | macb_get_hwaddr(bp); |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 2994 | |
Gregory CLEMENT | 5833e05 | 2015-12-11 11:34:53 +0100 | [diff] [blame] | 2995 | /* Power up the PHY if there is a GPIO reset */ |
Gregory CLEMENT | 270c499 | 2015-12-17 10:51:04 +0100 | [diff] [blame] | 2996 | phy_node = of_get_next_available_child(np, NULL); |
| 2997 | if (phy_node) { |
| 2998 | int gpio = of_get_named_gpio(phy_node, "reset-gpios", 0); |
Charles Keepax | 0e3e799 | 2016-03-28 13:47:42 +0100 | [diff] [blame] | 2999 | if (gpio_is_valid(gpio)) { |
Gregory CLEMENT | 270c499 | 2015-12-17 10:51:04 +0100 | [diff] [blame] | 3000 | bp->reset_gpio = gpio_to_desc(gpio); |
Charles Keepax | 0e3e799 | 2016-03-28 13:47:42 +0100 | [diff] [blame] | 3001 | gpiod_direction_output(bp->reset_gpio, 1); |
| 3002 | } |
Gregory CLEMENT | 270c499 | 2015-12-17 10:51:04 +0100 | [diff] [blame] | 3003 | } |
| 3004 | of_node_put(phy_node); |
Gregory CLEMENT | 5833e05 | 2015-12-11 11:34:53 +0100 | [diff] [blame] | 3005 | |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 3006 | err = of_get_phy_mode(np); |
Jean-Christophe PLAGNIOL-VILLARD | fb97a84 | 2011-11-18 15:29:25 +0100 | [diff] [blame] | 3007 | if (err < 0) { |
Jingoo Han | c607a0d | 2013-08-30 14:12:21 +0900 | [diff] [blame] | 3008 | pdata = dev_get_platdata(&pdev->dev); |
Jean-Christophe PLAGNIOL-VILLARD | fb97a84 | 2011-11-18 15:29:25 +0100 | [diff] [blame] | 3009 | if (pdata && pdata->is_rmii) |
| 3010 | bp->phy_interface = PHY_INTERFACE_MODE_RMII; |
| 3011 | else |
| 3012 | bp->phy_interface = PHY_INTERFACE_MODE_MII; |
| 3013 | } else { |
| 3014 | bp->phy_interface = err; |
| 3015 | } |
| 3016 | |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 3017 | /* IP specific init */ |
| 3018 | err = init(pdev); |
| 3019 | if (err) |
| 3020 | goto err_out_free_netdev; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 3021 | |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 3022 | err = register_netdev(dev); |
| 3023 | if (err) { |
| 3024 | dev_err(&pdev->dev, "Cannot register net device, aborting.\n"); |
Nicolas Ferre | c69618b | 2015-03-31 15:02:03 +0200 | [diff] [blame] | 3025 | goto err_out_unregister_netdev; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 3026 | } |
| 3027 | |
Nicolas Ferre | 72ca820 | 2013-04-14 22:04:33 +0000 | [diff] [blame] | 3028 | err = macb_mii_init(bp); |
| 3029 | if (err) |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 3030 | goto err_out_unregister_netdev; |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 3031 | |
Nicolas Ferre | 03fc472 | 2012-07-03 23:14:13 +0000 | [diff] [blame] | 3032 | netif_carrier_off(dev); |
| 3033 | |
Bo Shen | 5879823 | 2014-09-13 01:57:49 +0200 | [diff] [blame] | 3034 | netdev_info(dev, "Cadence %s rev 0x%08x at 0x%08lx irq %d (%pM)\n", |
| 3035 | macb_is_gem(bp) ? "GEM" : "MACB", macb_readl(bp, MID), |
| 3036 | dev->base_addr, dev->irq, dev->dev_addr); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 3037 | |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 3038 | phydev = bp->phy_dev; |
Andrew Lunn | 2220943 | 2016-01-06 20:11:13 +0100 | [diff] [blame] | 3039 | phy_attached_info(phydev); |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 3040 | |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 3041 | return 0; |
| 3042 | |
frederic RODO | 6c36a70 | 2007-07-12 19:07:24 +0200 | [diff] [blame] | 3043 | err_out_unregister_netdev: |
| 3044 | unregister_netdev(dev); |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 3045 | |
Cyrille Pitchen | cf250de | 2014-12-15 15:13:32 +0100 | [diff] [blame] | 3046 | err_out_free_netdev: |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 3047 | free_netdev(dev); |
Cyrille Pitchen | 421d9df | 2015-03-07 07:23:32 +0100 | [diff] [blame] | 3048 | |
Nicolas Ferre | c69618b | 2015-03-31 15:02:03 +0200 | [diff] [blame] | 3049 | err_disable_clocks: |
| 3050 | clk_disable_unprepare(tx_clk); |
| 3051 | clk_disable_unprepare(hclk); |
| 3052 | clk_disable_unprepare(pclk); |
| 3053 | |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 3054 | return err; |
| 3055 | } |
| 3056 | |
Nicolae Rosia | 9e86d76 | 2015-01-22 17:31:05 +0000 | [diff] [blame] | 3057 | static int macb_remove(struct platform_device *pdev) |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 3058 | { |
| 3059 | struct net_device *dev; |
| 3060 | struct macb *bp; |
| 3061 | |
| 3062 | dev = platform_get_drvdata(pdev); |
| 3063 | |
| 3064 | if (dev) { |
| 3065 | bp = netdev_priv(dev); |
Atsushi Nemoto | 84b7901 | 2008-04-10 23:30:07 +0900 | [diff] [blame] | 3066 | if (bp->phy_dev) |
| 3067 | phy_disconnect(bp->phy_dev); |
Lennert Buytenhek | 298cf9b | 2008-10-08 16:29:57 -0700 | [diff] [blame] | 3068 | mdiobus_unregister(bp->mii_bus); |
Lennert Buytenhek | 298cf9b | 2008-10-08 16:29:57 -0700 | [diff] [blame] | 3069 | mdiobus_free(bp->mii_bus); |
Gregory CLEMENT | 5833e05 | 2015-12-11 11:34:53 +0100 | [diff] [blame] | 3070 | |
| 3071 | /* Shutdown the PHY if there is a GPIO reset */ |
Charles Keepax | 0e3e799 | 2016-03-28 13:47:42 +0100 | [diff] [blame] | 3072 | if (bp->reset_gpio) |
| 3073 | gpiod_set_value(bp->reset_gpio, 0); |
Gregory CLEMENT | 5833e05 | 2015-12-11 11:34:53 +0100 | [diff] [blame] | 3074 | |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 3075 | unregister_netdev(dev); |
Cyrille Pitchen | 93b31f4 | 2015-03-07 07:23:31 +0100 | [diff] [blame] | 3076 | clk_disable_unprepare(bp->tx_clk); |
Steffen Trumtrar | ace5801 | 2013-03-27 23:07:07 +0000 | [diff] [blame] | 3077 | clk_disable_unprepare(bp->hclk); |
Steffen Trumtrar | ace5801 | 2013-03-27 23:07:07 +0000 | [diff] [blame] | 3078 | clk_disable_unprepare(bp->pclk); |
Cyrille Pitchen | e965be7 | 2014-12-15 15:13:31 +0100 | [diff] [blame] | 3079 | free_netdev(dev); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 3080 | } |
| 3081 | |
| 3082 | return 0; |
| 3083 | } |
| 3084 | |
Michal Simek | d23823d | 2015-01-23 09:36:03 +0100 | [diff] [blame] | 3085 | static int __maybe_unused macb_suspend(struct device *dev) |
Haavard Skinnemoen | c1f598f | 2008-03-04 13:39:29 +0100 | [diff] [blame] | 3086 | { |
Soren Brinkmann | 0dfc3e1 | 2013-12-10 16:07:19 -0800 | [diff] [blame] | 3087 | struct platform_device *pdev = to_platform_device(dev); |
Haavard Skinnemoen | c1f598f | 2008-03-04 13:39:29 +0100 | [diff] [blame] | 3088 | struct net_device *netdev = platform_get_drvdata(pdev); |
| 3089 | struct macb *bp = netdev_priv(netdev); |
| 3090 | |
Nicolas Ferre | 03fc472 | 2012-07-03 23:14:13 +0000 | [diff] [blame] | 3091 | netif_carrier_off(netdev); |
Haavard Skinnemoen | c1f598f | 2008-03-04 13:39:29 +0100 | [diff] [blame] | 3092 | netif_device_detach(netdev); |
| 3093 | |
Sergio Prado | 3e2a5e1 | 2016-02-09 12:07:16 -0200 | [diff] [blame] | 3094 | if (bp->wol & MACB_WOL_ENABLED) { |
| 3095 | macb_writel(bp, IER, MACB_BIT(WOL)); |
| 3096 | macb_writel(bp, WOL, MACB_BIT(MAG)); |
| 3097 | enable_irq_wake(bp->queues[0].irq); |
| 3098 | } else { |
| 3099 | clk_disable_unprepare(bp->tx_clk); |
| 3100 | clk_disable_unprepare(bp->hclk); |
| 3101 | clk_disable_unprepare(bp->pclk); |
| 3102 | } |
Haavard Skinnemoen | c1f598f | 2008-03-04 13:39:29 +0100 | [diff] [blame] | 3103 | |
| 3104 | return 0; |
| 3105 | } |
| 3106 | |
Michal Simek | d23823d | 2015-01-23 09:36:03 +0100 | [diff] [blame] | 3107 | static int __maybe_unused macb_resume(struct device *dev) |
Haavard Skinnemoen | c1f598f | 2008-03-04 13:39:29 +0100 | [diff] [blame] | 3108 | { |
Soren Brinkmann | 0dfc3e1 | 2013-12-10 16:07:19 -0800 | [diff] [blame] | 3109 | struct platform_device *pdev = to_platform_device(dev); |
Haavard Skinnemoen | c1f598f | 2008-03-04 13:39:29 +0100 | [diff] [blame] | 3110 | struct net_device *netdev = platform_get_drvdata(pdev); |
| 3111 | struct macb *bp = netdev_priv(netdev); |
| 3112 | |
Sergio Prado | 3e2a5e1 | 2016-02-09 12:07:16 -0200 | [diff] [blame] | 3113 | if (bp->wol & MACB_WOL_ENABLED) { |
| 3114 | macb_writel(bp, IDR, MACB_BIT(WOL)); |
| 3115 | macb_writel(bp, WOL, 0); |
| 3116 | disable_irq_wake(bp->queues[0].irq); |
| 3117 | } else { |
| 3118 | clk_prepare_enable(bp->pclk); |
| 3119 | clk_prepare_enable(bp->hclk); |
| 3120 | clk_prepare_enable(bp->tx_clk); |
| 3121 | } |
Haavard Skinnemoen | c1f598f | 2008-03-04 13:39:29 +0100 | [diff] [blame] | 3122 | |
| 3123 | netif_device_attach(netdev); |
| 3124 | |
| 3125 | return 0; |
| 3126 | } |
Haavard Skinnemoen | c1f598f | 2008-03-04 13:39:29 +0100 | [diff] [blame] | 3127 | |
Soren Brinkmann | 0dfc3e1 | 2013-12-10 16:07:19 -0800 | [diff] [blame] | 3128 | static SIMPLE_DEV_PM_OPS(macb_pm_ops, macb_suspend, macb_resume); |
| 3129 | |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 3130 | static struct platform_driver macb_driver = { |
Nicolae Rosia | 9e86d76 | 2015-01-22 17:31:05 +0000 | [diff] [blame] | 3131 | .probe = macb_probe, |
| 3132 | .remove = macb_remove, |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 3133 | .driver = { |
| 3134 | .name = "macb", |
Jean-Christophe PLAGNIOL-VILLARD | fb97a84 | 2011-11-18 15:29:25 +0100 | [diff] [blame] | 3135 | .of_match_table = of_match_ptr(macb_dt_ids), |
Soren Brinkmann | 0dfc3e1 | 2013-12-10 16:07:19 -0800 | [diff] [blame] | 3136 | .pm = &macb_pm_ops, |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 3137 | }, |
| 3138 | }; |
| 3139 | |
Nicolae Rosia | 9e86d76 | 2015-01-22 17:31:05 +0000 | [diff] [blame] | 3140 | module_platform_driver(macb_driver); |
Haavard Skinnemoen | 89e5785 | 2006-11-09 14:51:17 +0100 | [diff] [blame] | 3141 | |
| 3142 | MODULE_LICENSE("GPL"); |
Jamie Iles | f75ba50 | 2011-11-08 10:12:32 +0000 | [diff] [blame] | 3143 | MODULE_DESCRIPTION("Cadence MACB/GEM Ethernet driver"); |
Jean Delvare | e05503e | 2011-05-18 16:49:24 +0200 | [diff] [blame] | 3144 | MODULE_AUTHOR("Haavard Skinnemoen (Atmel)"); |
Kay Sievers | 72abb46 | 2008-04-18 13:50:44 -0700 | [diff] [blame] | 3145 | MODULE_ALIAS("platform:macb"); |