blob: 021855605a1f8e39e3cc38fe59893229df2f47a0 [file] [log] [blame]
Rob Clarkcd5351f2011-11-12 12:09:40 -06001/*
Rob Clark8bb0daf2013-02-11 12:43:09 -05002 * drivers/gpu/drm/omapdrm/omap_drv.c
Rob Clarkcd5351f2011-11-12 12:09:40 -06003 *
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include "omap_drv.h"
21
22#include "drm_crtc_helper.h"
23#include "drm_fb_helper.h"
Andy Gross5c137792012-03-05 10:48:39 -060024#include "omap_dmm_tiler.h"
Rob Clarkcd5351f2011-11-12 12:09:40 -060025
26#define DRIVER_NAME MODULE_NAME
27#define DRIVER_DESC "OMAP DRM"
28#define DRIVER_DATE "20110917"
29#define DRIVER_MAJOR 1
30#define DRIVER_MINOR 0
31#define DRIVER_PATCHLEVEL 0
32
Rob Clarkcd5351f2011-11-12 12:09:40 -060033static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS;
34
35MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs");
36module_param(num_crtc, int, 0600);
37
38/*
39 * mode config funcs
40 */
41
42/* Notes about mapping DSS and DRM entities:
43 * CRTC: overlay
44 * encoder: manager.. with some extension to allow one primary CRTC
45 * and zero or more video CRTC's to be mapped to one encoder?
46 * connector: dssdev.. manager can be attached/detached from different
47 * devices
48 */
49
50static void omap_fb_output_poll_changed(struct drm_device *dev)
51{
52 struct omap_drm_private *priv = dev->dev_private;
53 DBG("dev=%p", dev);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +090054 if (priv->fbdev)
Rob Clarkcd5351f2011-11-12 12:09:40 -060055 drm_fb_helper_hotplug_event(priv->fbdev);
Rob Clarkcd5351f2011-11-12 12:09:40 -060056}
57
Laurent Pincharte6ecefa2012-05-17 13:27:23 +020058static const struct drm_mode_config_funcs omap_mode_config_funcs = {
Rob Clarkcd5351f2011-11-12 12:09:40 -060059 .fb_create = omap_framebuffer_create,
60 .output_poll_changed = omap_fb_output_poll_changed,
61};
62
63static int get_connector_type(struct omap_dss_device *dssdev)
64{
65 switch (dssdev->type) {
66 case OMAP_DISPLAY_TYPE_HDMI:
67 return DRM_MODE_CONNECTOR_HDMIA;
Tomi Valkeinen4635c172013-05-14 14:14:15 +030068 case OMAP_DISPLAY_TYPE_DVI:
69 return DRM_MODE_CONNECTOR_DVID;
Rob Clarkcd5351f2011-11-12 12:09:40 -060070 default:
71 return DRM_MODE_CONNECTOR_Unknown;
72 }
73}
74
Archit Taneja0d8f3712013-03-26 19:15:19 +053075static bool channel_used(struct drm_device *dev, enum omap_channel channel)
76{
77 struct omap_drm_private *priv = dev->dev_private;
78 int i;
79
80 for (i = 0; i < priv->num_crtcs; i++) {
81 struct drm_crtc *crtc = priv->crtcs[i];
82
83 if (omap_crtc_channel(crtc) == channel)
84 return true;
85 }
86
87 return false;
88}
Archit Tanejacc823bd2014-01-02 14:49:52 +053089static void omap_disconnect_dssdevs(void)
90{
91 struct omap_dss_device *dssdev = NULL;
92
93 for_each_dss_dev(dssdev)
94 dssdev->driver->disconnect(dssdev);
95}
Archit Taneja0d8f3712013-03-26 19:15:19 +053096
Archit Taneja3a01ab22014-01-02 14:49:51 +053097static int omap_connect_dssdevs(void)
98{
99 int r;
100 struct omap_dss_device *dssdev = NULL;
101 bool no_displays = true;
102
103 for_each_dss_dev(dssdev) {
104 r = dssdev->driver->connect(dssdev);
105 if (r == -EPROBE_DEFER) {
106 omap_dss_put_device(dssdev);
107 goto cleanup;
108 } else if (r) {
109 dev_warn(dssdev->dev, "could not connect display: %s\n",
110 dssdev->name);
111 } else {
112 no_displays = false;
113 }
114 }
115
116 if (no_displays)
117 return -EPROBE_DEFER;
118
119 return 0;
120
121cleanup:
122 /*
123 * if we are deferring probe, we disconnect the devices we previously
124 * connected
125 */
Archit Tanejacc823bd2014-01-02 14:49:52 +0530126 omap_disconnect_dssdevs();
Archit Taneja3a01ab22014-01-02 14:49:51 +0530127
128 return r;
129}
Rob Clarkcd5351f2011-11-12 12:09:40 -0600130
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200131static int omap_modeset_create_crtc(struct drm_device *dev, int id,
132 enum omap_channel channel)
133{
134 struct omap_drm_private *priv = dev->dev_private;
135 struct drm_plane *plane;
136 struct drm_crtc *crtc;
137
138 plane = omap_plane_init(dev, id, true);
139 if (IS_ERR(plane))
140 return PTR_ERR(plane);
141
142 crtc = omap_crtc_init(dev, plane, channel, id);
143
144 BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs));
145 priv->crtcs[id] = crtc;
146 priv->num_crtcs++;
147
148 priv->planes[id] = plane;
149 priv->num_planes++;
150
151 return 0;
152}
153
Rob Clarkcd5351f2011-11-12 12:09:40 -0600154static int omap_modeset_init(struct drm_device *dev)
155{
Rob Clarkcd5351f2011-11-12 12:09:40 -0600156 struct omap_drm_private *priv = dev->dev_private;
157 struct omap_dss_device *dssdev = NULL;
Rob Clarkf5f94542012-12-04 13:59:12 -0600158 int num_ovls = dss_feat_get_num_ovls();
Archit Taneja0d8f3712013-03-26 19:15:19 +0530159 int num_mgrs = dss_feat_get_num_mgrs();
160 int num_crtcs;
161 int i, id = 0;
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200162 int ret;
Tomi Valkeinen04b1fc02013-05-14 10:55:19 +0300163
Rob Clarkcd5351f2011-11-12 12:09:40 -0600164 drm_mode_config_init(dev);
165
Rob Clarkf5f94542012-12-04 13:59:12 -0600166 omap_drm_irq_install(dev);
Andy Gross71e88312011-12-05 19:19:21 -0600167
Rob Clarkf5f94542012-12-04 13:59:12 -0600168 /*
Archit Taneja0d8f3712013-03-26 19:15:19 +0530169 * We usually don't want to create a CRTC for each manager, at least
170 * not until we have a way to expose private planes to userspace.
171 * Otherwise there would not be enough video pipes left for drm planes.
172 * We use the num_crtc argument to limit the number of crtcs we create.
Rob Clarkf5f94542012-12-04 13:59:12 -0600173 */
Archit Taneja0d8f3712013-03-26 19:15:19 +0530174 num_crtcs = min3(num_crtc, num_mgrs, num_ovls);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600175
Archit Taneja0d8f3712013-03-26 19:15:19 +0530176 dssdev = NULL;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600177
Rob Clarkf5f94542012-12-04 13:59:12 -0600178 for_each_dss_dev(dssdev) {
179 struct drm_connector *connector;
180 struct drm_encoder *encoder;
Archit Taneja0d8f3712013-03-26 19:15:19 +0530181 enum omap_channel channel;
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300182 struct omap_overlay_manager *mgr;
Rob Clarkf5f94542012-12-04 13:59:12 -0600183
Archit Taneja3a01ab22014-01-02 14:49:51 +0530184 if (!omapdss_device_is_connected(dssdev))
Archit Taneja581382e2013-03-26 19:15:18 +0530185 continue;
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300186
Rob Clarkf5f94542012-12-04 13:59:12 -0600187 encoder = omap_encoder_init(dev, dssdev);
188
189 if (!encoder) {
190 dev_err(dev->dev, "could not create encoder: %s\n",
191 dssdev->name);
192 return -ENOMEM;
193 }
194
195 connector = omap_connector_init(dev,
196 get_connector_type(dssdev), dssdev, encoder);
197
198 if (!connector) {
199 dev_err(dev->dev, "could not create connector: %s\n",
200 dssdev->name);
201 return -ENOMEM;
202 }
203
204 BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders));
205 BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors));
206
207 priv->encoders[priv->num_encoders++] = encoder;
208 priv->connectors[priv->num_connectors++] = connector;
209
210 drm_mode_connector_attach_encoder(connector, encoder);
211
Archit Taneja0d8f3712013-03-26 19:15:19 +0530212 /*
213 * if we have reached the limit of the crtcs we are allowed to
214 * create, let's not try to look for a crtc for this
215 * panel/encoder and onwards, we will, of course, populate the
216 * the possible_crtcs field for all the encoders with the final
217 * set of crtcs we create
218 */
219 if (id == num_crtcs)
220 continue;
221
222 /*
223 * get the recommended DISPC channel for this encoder. For now,
224 * we only try to get create a crtc out of the recommended, the
225 * other possible channels to which the encoder can connect are
226 * not considered.
227 */
Archit Taneja0d8f3712013-03-26 19:15:19 +0530228
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300229 mgr = omapdss_find_mgr_from_display(dssdev);
230 channel = mgr->id;
Archit Taneja0d8f3712013-03-26 19:15:19 +0530231 /*
232 * if this channel hasn't already been taken by a previously
233 * allocated crtc, we create a new crtc for it
234 */
235 if (!channel_used(dev, channel)) {
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200236 ret = omap_modeset_create_crtc(dev, id, channel);
237 if (ret < 0) {
238 dev_err(dev->dev,
239 "could not create CRTC (channel %u)\n",
240 channel);
241 return ret;
242 }
Archit Taneja0d8f3712013-03-26 19:15:19 +0530243
244 id++;
245 }
246 }
247
248 /*
249 * we have allocated crtcs according to the need of the panels/encoders,
250 * adding more crtcs here if needed
251 */
252 for (; id < num_crtcs; id++) {
253
254 /* find a free manager for this crtc */
255 for (i = 0; i < num_mgrs; i++) {
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200256 if (!channel_used(dev, i))
Archit Taneja0d8f3712013-03-26 19:15:19 +0530257 break;
Archit Taneja0d8f3712013-03-26 19:15:19 +0530258 }
259
260 if (i == num_mgrs) {
261 /* this shouldn't really happen */
262 dev_err(dev->dev, "no managers left for crtc\n");
263 return -ENOMEM;
264 }
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200265
266 ret = omap_modeset_create_crtc(dev, id, i);
267 if (ret < 0) {
268 dev_err(dev->dev,
269 "could not create CRTC (channel %u)\n", i);
270 return ret;
271 }
Archit Taneja0d8f3712013-03-26 19:15:19 +0530272 }
273
274 /*
275 * Create normal planes for the remaining overlays:
276 */
277 for (; id < num_ovls; id++) {
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200278 struct drm_plane *plane;
279
280 plane = omap_plane_init(dev, id, false);
281 if (IS_ERR(plane))
282 return PTR_ERR(plane);
Archit Taneja0d8f3712013-03-26 19:15:19 +0530283
284 BUG_ON(priv->num_planes >= ARRAY_SIZE(priv->planes));
285 priv->planes[priv->num_planes++] = plane;
286 }
287
288 for (i = 0; i < priv->num_encoders; i++) {
289 struct drm_encoder *encoder = priv->encoders[i];
290 struct omap_dss_device *dssdev =
291 omap_encoder_get_dssdev(encoder);
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300292 struct omap_dss_device *output;
Tomi Valkeinenbe8e8e12013-04-23 15:35:35 +0300293
294 output = omapdss_find_output_from_display(dssdev);
Archit Taneja0d8f3712013-03-26 19:15:19 +0530295
Rob Clarkf5f94542012-12-04 13:59:12 -0600296 /* figure out which crtc's we can connect the encoder to: */
297 encoder->possible_crtcs = 0;
298 for (id = 0; id < priv->num_crtcs; id++) {
Archit Taneja0d8f3712013-03-26 19:15:19 +0530299 struct drm_crtc *crtc = priv->crtcs[id];
300 enum omap_channel crtc_channel;
301 enum omap_dss_output_id supported_outputs;
302
303 crtc_channel = omap_crtc_channel(crtc);
304 supported_outputs =
305 dss_feat_get_supported_outputs(crtc_channel);
306
Tomi Valkeinenbe8e8e12013-04-23 15:35:35 +0300307 if (supported_outputs & output->id)
Rob Clarkf5f94542012-12-04 13:59:12 -0600308 encoder->possible_crtcs |= (1 << id);
309 }
Tomi Valkeinen820caab2013-04-25 14:53:18 +0300310
311 omap_dss_put_device(output);
Rob Clarkf5f94542012-12-04 13:59:12 -0600312 }
Rob Clarkcd5351f2011-11-12 12:09:40 -0600313
Archit Taneja0d8f3712013-03-26 19:15:19 +0530314 DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
315 priv->num_planes, priv->num_crtcs, priv->num_encoders,
316 priv->num_connectors);
317
Rob Clark6b8ca4c2012-01-08 19:37:37 -0600318 dev->mode_config.min_width = 32;
319 dev->mode_config.min_height = 32;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600320
321 /* note: eventually will need some cpu_is_omapXYZ() type stuff here
322 * to fill in these limits properly on different OMAP generations..
323 */
324 dev->mode_config.max_width = 2048;
325 dev->mode_config.max_height = 2048;
326
327 dev->mode_config.funcs = &omap_mode_config_funcs;
328
329 return 0;
330}
331
332static void omap_modeset_free(struct drm_device *dev)
333{
334 drm_mode_config_cleanup(dev);
335}
336
337/*
338 * drm ioctl funcs
339 */
340
341
342static int ioctl_get_param(struct drm_device *dev, void *data,
343 struct drm_file *file_priv)
344{
Rob Clark5e3b0872012-10-29 09:31:12 +0100345 struct omap_drm_private *priv = dev->dev_private;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600346 struct drm_omap_param *args = data;
347
348 DBG("%p: param=%llu", dev, args->param);
349
350 switch (args->param) {
351 case OMAP_PARAM_CHIPSET_ID:
Rob Clark5e3b0872012-10-29 09:31:12 +0100352 args->value = priv->omaprev;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600353 break;
354 default:
355 DBG("unknown parameter %lld", args->param);
356 return -EINVAL;
357 }
358
359 return 0;
360}
361
362static int ioctl_set_param(struct drm_device *dev, void *data,
363 struct drm_file *file_priv)
364{
365 struct drm_omap_param *args = data;
366
367 switch (args->param) {
368 default:
369 DBG("unknown parameter %lld", args->param);
370 return -EINVAL;
371 }
372
373 return 0;
374}
375
376static int ioctl_gem_new(struct drm_device *dev, void *data,
377 struct drm_file *file_priv)
378{
379 struct drm_omap_gem_new *args = data;
Rob Clarkf5f94542012-12-04 13:59:12 -0600380 VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600381 args->size.bytes, args->flags);
382 return omap_gem_new_handle(dev, file_priv, args->size,
383 args->flags, &args->handle);
384}
385
386static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
387 struct drm_file *file_priv)
388{
389 struct drm_omap_gem_cpu_prep *args = data;
390 struct drm_gem_object *obj;
391 int ret;
392
393 VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op);
394
395 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900396 if (!obj)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600397 return -ENOENT;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600398
399 ret = omap_gem_op_sync(obj, args->op);
400
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900401 if (!ret)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600402 ret = omap_gem_op_start(obj, args->op);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600403
404 drm_gem_object_unreference_unlocked(obj);
405
406 return ret;
407}
408
409static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
410 struct drm_file *file_priv)
411{
412 struct drm_omap_gem_cpu_fini *args = data;
413 struct drm_gem_object *obj;
414 int ret;
415
416 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
417
418 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900419 if (!obj)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600420 return -ENOENT;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600421
422 /* XXX flushy, flushy */
423 ret = 0;
424
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900425 if (!ret)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600426 ret = omap_gem_op_finish(obj, args->op);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600427
428 drm_gem_object_unreference_unlocked(obj);
429
430 return ret;
431}
432
433static int ioctl_gem_info(struct drm_device *dev, void *data,
434 struct drm_file *file_priv)
435{
436 struct drm_omap_gem_info *args = data;
437 struct drm_gem_object *obj;
438 int ret = 0;
439
Rob Clarkf5f94542012-12-04 13:59:12 -0600440 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600441
442 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900443 if (!obj)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600444 return -ENOENT;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600445
Rob Clarkf7f9f452011-12-05 19:19:22 -0600446 args->size = omap_gem_mmap_size(obj);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600447 args->offset = omap_gem_mmap_offset(obj);
448
449 drm_gem_object_unreference_unlocked(obj);
450
451 return ret;
452}
453
Rob Clarkbaa70942013-08-02 13:27:49 -0400454static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
Rob Clarkcd5351f2011-11-12 12:09:40 -0600455 DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_UNLOCKED|DRM_AUTH),
456 DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
457 DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_UNLOCKED|DRM_AUTH),
458 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
459 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
460 DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, DRM_UNLOCKED|DRM_AUTH),
461};
462
463/*
464 * drm driver funcs
465 */
466
467/**
468 * load - setup chip and create an initial config
469 * @dev: DRM device
470 * @flags: startup flags
471 *
472 * The driver load routine has to do several things:
473 * - initialize the memory manager
474 * - allocate initial config memory
475 * - setup the DRM framebuffer with the allocated memory
476 */
477static int dev_load(struct drm_device *dev, unsigned long flags)
478{
Rob Clark5e3b0872012-10-29 09:31:12 +0100479 struct omap_drm_platform_data *pdata = dev->dev->platform_data;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600480 struct omap_drm_private *priv;
481 int ret;
482
483 DBG("load: dev=%p", dev);
484
Rob Clarkcd5351f2011-11-12 12:09:40 -0600485 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
Joe Perches78110bb2013-02-11 09:41:29 -0800486 if (!priv)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600487 return -ENOMEM;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600488
Rob Clark5e3b0872012-10-29 09:31:12 +0100489 priv->omaprev = pdata->omaprev;
490
Rob Clarkcd5351f2011-11-12 12:09:40 -0600491 dev->dev_private = priv;
492
Tejun Heo4619cdb2012-08-22 16:49:44 -0700493 priv->wq = alloc_ordered_workqueue("omapdrm", 0);
Rob Clark5609f7f2012-03-05 10:48:32 -0600494
Rob Clarkf6b60362012-03-05 10:48:36 -0600495 INIT_LIST_HEAD(&priv->obj_list);
496
Rob Clarkf7f9f452011-12-05 19:19:22 -0600497 omap_gem_init(dev);
498
Rob Clarkcd5351f2011-11-12 12:09:40 -0600499 ret = omap_modeset_init(dev);
500 if (ret) {
501 dev_err(dev->dev, "omap_modeset_init failed: ret=%d\n", ret);
502 dev->dev_private = NULL;
503 kfree(priv);
504 return ret;
505 }
506
Rob Clarkf5f94542012-12-04 13:59:12 -0600507 ret = drm_vblank_init(dev, priv->num_crtcs);
508 if (ret)
509 dev_warn(dev->dev, "could not init vblank\n");
510
Rob Clarkcd5351f2011-11-12 12:09:40 -0600511 priv->fbdev = omap_fbdev_init(dev);
512 if (!priv->fbdev) {
513 dev_warn(dev->dev, "omap_fbdev_init failed\n");
514 /* well, limp along without an fbdev.. maybe X11 will work? */
515 }
516
Andy Grosse78edba2012-12-19 14:53:37 -0600517 /* store off drm_device for use in pm ops */
518 dev_set_drvdata(dev->dev, dev);
519
Rob Clarkcd5351f2011-11-12 12:09:40 -0600520 drm_kms_helper_poll_init(dev);
521
Rob Clarkcd5351f2011-11-12 12:09:40 -0600522 return 0;
523}
524
525static int dev_unload(struct drm_device *dev)
526{
Rob Clark5609f7f2012-03-05 10:48:32 -0600527 struct omap_drm_private *priv = dev->dev_private;
Tomi Valkeinene2f8fd72014-04-02 14:31:57 +0300528 int i;
Rob Clark5609f7f2012-03-05 10:48:32 -0600529
Rob Clarkcd5351f2011-11-12 12:09:40 -0600530 DBG("unload: dev=%p", dev);
531
Rob Clarkcd5351f2011-11-12 12:09:40 -0600532 drm_kms_helper_poll_fini(dev);
533
534 omap_fbdev_free(dev);
Tomi Valkeinene2f8fd72014-04-02 14:31:57 +0300535
536 /* flush crtcs so the fbs get released */
537 for (i = 0; i < priv->num_crtcs; i++)
538 omap_crtc_flush(priv->crtcs[i]);
539
Rob Clarkcd5351f2011-11-12 12:09:40 -0600540 omap_modeset_free(dev);
Rob Clarkf7f9f452011-12-05 19:19:22 -0600541 omap_gem_deinit(dev);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600542
Rob Clark5609f7f2012-03-05 10:48:32 -0600543 destroy_workqueue(priv->wq);
544
Archit Taneja80e4ed52014-01-02 14:49:54 +0530545 drm_vblank_cleanup(dev);
546 omap_drm_irq_uninstall(dev);
547
Rob Clarkcd5351f2011-11-12 12:09:40 -0600548 kfree(dev->dev_private);
549 dev->dev_private = NULL;
550
Andy Grosse78edba2012-12-19 14:53:37 -0600551 dev_set_drvdata(dev->dev, NULL);
552
Rob Clarkcd5351f2011-11-12 12:09:40 -0600553 return 0;
554}
555
556static int dev_open(struct drm_device *dev, struct drm_file *file)
557{
558 file->driver_priv = NULL;
559
560 DBG("open: dev=%p, file=%p", dev, file);
561
562 return 0;
563}
564
Rob Clarkcd5351f2011-11-12 12:09:40 -0600565/**
566 * lastclose - clean up after all DRM clients have exited
567 * @dev: DRM device
568 *
569 * Take care of cleaning up after all DRM clients have exited. In the
570 * mode setting case, we want to restore the kernel's initial mode (just
571 * in case the last client left us in a bad state).
572 */
573static void dev_lastclose(struct drm_device *dev)
574{
Rob Clark3c810c62012-08-15 15:18:01 -0500575 int i;
576
Rob Clarkcd5351f2011-11-12 12:09:40 -0600577 /* we don't support vga-switcheroo.. so just make sure the fbdev
578 * mode is active
579 */
580 struct omap_drm_private *priv = dev->dev_private;
581 int ret;
582
583 DBG("lastclose: dev=%p", dev);
584
Rob Clarkc2a6a552012-10-25 17:14:13 -0500585 if (priv->rotation_prop) {
586 /* need to restore default rotation state.. not sure
587 * if there is a cleaner way to restore properties to
588 * default state? Maybe a flag that properties should
589 * automatically be restored to default state on
590 * lastclose?
591 */
592 for (i = 0; i < priv->num_crtcs; i++) {
593 drm_object_property_set_value(&priv->crtcs[i]->base,
594 priv->rotation_prop, 0);
595 }
Rob Clark3c810c62012-08-15 15:18:01 -0500596
Rob Clarkc2a6a552012-10-25 17:14:13 -0500597 for (i = 0; i < priv->num_planes; i++) {
598 drm_object_property_set_value(&priv->planes[i]->base,
599 priv->rotation_prop, 0);
600 }
Rob Clark3c810c62012-08-15 15:18:01 -0500601 }
602
Rob Clark5ea1f752014-05-30 12:29:48 -0400603 ret = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600604 if (ret)
605 DBG("failed to restore crtc mode");
606}
607
608static void dev_preclose(struct drm_device *dev, struct drm_file *file)
609{
610 DBG("preclose: dev=%p", dev);
611}
612
613static void dev_postclose(struct drm_device *dev, struct drm_file *file)
614{
615 DBG("postclose: dev=%p, file=%p", dev, file);
616}
617
Laurent Pinchart78b68552012-05-17 13:27:22 +0200618static const struct vm_operations_struct omap_gem_vm_ops = {
Rob Clarkcd5351f2011-11-12 12:09:40 -0600619 .fault = omap_gem_fault,
620 .open = drm_gem_vm_open,
621 .close = drm_gem_vm_close,
622};
623
Rob Clarkff4f3872012-01-16 12:51:14 -0600624static const struct file_operations omapdriver_fops = {
Laurent Pinchart222025e2015-01-11 00:02:07 +0200625 .owner = THIS_MODULE,
626 .open = drm_open,
627 .unlocked_ioctl = drm_ioctl,
628 .release = drm_release,
629 .mmap = omap_gem_mmap,
630 .poll = drm_poll,
631 .read = drm_read,
632 .llseek = noop_llseek,
Rob Clarkff4f3872012-01-16 12:51:14 -0600633};
634
Rob Clarkcd5351f2011-11-12 12:09:40 -0600635static struct drm_driver omap_drm_driver = {
Laurent Pinchart222025e2015-01-11 00:02:07 +0200636 .driver_features = DRIVER_HAVE_IRQ | DRIVER_MODESET | DRIVER_GEM
637 | DRIVER_PRIME,
638 .load = dev_load,
639 .unload = dev_unload,
640 .open = dev_open,
641 .lastclose = dev_lastclose,
642 .preclose = dev_preclose,
643 .postclose = dev_postclose,
644 .set_busid = drm_platform_set_busid,
645 .get_vblank_counter = drm_vblank_count,
646 .enable_vblank = omap_irq_enable_vblank,
647 .disable_vblank = omap_irq_disable_vblank,
648 .irq_preinstall = omap_irq_preinstall,
649 .irq_postinstall = omap_irq_postinstall,
650 .irq_uninstall = omap_irq_uninstall,
651 .irq_handler = omap_irq_handler,
Andy Gross6169a1482011-12-15 21:05:17 -0600652#ifdef CONFIG_DEBUG_FS
Laurent Pinchart222025e2015-01-11 00:02:07 +0200653 .debugfs_init = omap_debugfs_init,
654 .debugfs_cleanup = omap_debugfs_cleanup,
Andy Gross6169a1482011-12-15 21:05:17 -0600655#endif
Laurent Pinchart222025e2015-01-11 00:02:07 +0200656 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
657 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
658 .gem_prime_export = omap_gem_prime_export,
659 .gem_prime_import = omap_gem_prime_import,
660 .gem_free_object = omap_gem_free_object,
661 .gem_vm_ops = &omap_gem_vm_ops,
662 .dumb_create = omap_gem_dumb_create,
663 .dumb_map_offset = omap_gem_dumb_map_offset,
664 .dumb_destroy = drm_gem_dumb_destroy,
665 .ioctls = ioctls,
666 .num_ioctls = DRM_OMAP_NUM_IOCTLS,
667 .fops = &omapdriver_fops,
668 .name = DRIVER_NAME,
669 .desc = DRIVER_DESC,
670 .date = DRIVER_DATE,
671 .major = DRIVER_MAJOR,
672 .minor = DRIVER_MINOR,
673 .patchlevel = DRIVER_PATCHLEVEL,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600674};
675
676static int pdev_suspend(struct platform_device *pDevice, pm_message_t state)
677{
678 DBG("");
679 return 0;
680}
681
682static int pdev_resume(struct platform_device *device)
683{
684 DBG("");
685 return 0;
686}
687
688static void pdev_shutdown(struct platform_device *device)
689{
690 DBG("");
691}
692
693static int pdev_probe(struct platform_device *device)
694{
Archit Taneja3a01ab22014-01-02 14:49:51 +0530695 int r;
696
Tomi Valkeinen591a0ac2013-05-23 12:07:50 +0300697 if (omapdss_is_initialized() == false)
698 return -EPROBE_DEFER;
699
Archit Taneja3a01ab22014-01-02 14:49:51 +0530700 omap_crtc_pre_init();
701
702 r = omap_connect_dssdevs();
703 if (r) {
704 omap_crtc_pre_uninit();
705 return r;
706 }
707
Rob Clarkcd5351f2011-11-12 12:09:40 -0600708 DBG("%s", device->name);
709 return drm_platform_init(&omap_drm_driver, device);
710}
711
712static int pdev_remove(struct platform_device *device)
713{
714 DBG("");
Andy Gross5c137792012-03-05 10:48:39 -0600715
Tomi Valkeinen707cf582014-04-02 13:47:43 +0300716 drm_put_dev(platform_get_drvdata(device));
717
Archit Tanejacc823bd2014-01-02 14:49:52 +0530718 omap_disconnect_dssdevs();
719 omap_crtc_pre_uninit();
Daniel Vetterfd3c0252013-12-11 11:34:26 +0100720
Rob Clarkcd5351f2011-11-12 12:09:40 -0600721 return 0;
722}
723
Andy Grosse78edba2012-12-19 14:53:37 -0600724#ifdef CONFIG_PM
725static const struct dev_pm_ops omapdrm_pm_ops = {
726 .resume = omap_gem_resume,
727};
728#endif
729
Tomi Valkeinen6717cd22013-04-10 10:44:00 +0300730static struct platform_driver pdev = {
Laurent Pinchart222025e2015-01-11 00:02:07 +0200731 .driver = {
732 .name = DRIVER_NAME,
Andy Grosse78edba2012-12-19 14:53:37 -0600733#ifdef CONFIG_PM
Laurent Pinchart222025e2015-01-11 00:02:07 +0200734 .pm = &omapdrm_pm_ops,
Andy Grosse78edba2012-12-19 14:53:37 -0600735#endif
Laurent Pinchart222025e2015-01-11 00:02:07 +0200736 },
737 .probe = pdev_probe,
738 .remove = pdev_remove,
739 .suspend = pdev_suspend,
740 .resume = pdev_resume,
741 .shutdown = pdev_shutdown,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600742};
743
744static int __init omap_drm_init(void)
745{
Tomi Valkeinenea7e3a62014-04-02 14:31:50 +0300746 int r;
747
Rob Clarkcd5351f2011-11-12 12:09:40 -0600748 DBG("init");
Tomi Valkeinenea7e3a62014-04-02 14:31:50 +0300749
750 r = platform_driver_register(&omap_dmm_driver);
751 if (r) {
752 pr_err("DMM driver registration failed\n");
753 return r;
Rob Clarkbe0775a2012-04-05 10:34:56 -0500754 }
Tomi Valkeinenea7e3a62014-04-02 14:31:50 +0300755
756 r = platform_driver_register(&pdev);
757 if (r) {
758 pr_err("omapdrm driver registration failed\n");
759 platform_driver_unregister(&omap_dmm_driver);
760 return r;
761 }
762
763 return 0;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600764}
765
766static void __exit omap_drm_fini(void)
767{
768 DBG("fini");
Tomi Valkeinenea7e3a62014-04-02 14:31:50 +0300769
Rob Clarkcd5351f2011-11-12 12:09:40 -0600770 platform_driver_unregister(&pdev);
Tomi Valkeinenea7e3a62014-04-02 14:31:50 +0300771
772 platform_driver_unregister(&omap_dmm_driver);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600773}
774
775/* need late_initcall() so we load after dss_driver's are loaded */
776late_initcall(omap_drm_init);
777module_exit(omap_drm_fini);
778
779MODULE_AUTHOR("Rob Clark <rob@ti.com>");
780MODULE_DESCRIPTION("OMAP DRM Display Driver");
781MODULE_ALIAS("platform:" DRIVER_NAME);
782MODULE_LICENSE("GPL v2");