blob: e8e030171ec44123ffae2c0bc09f1d7308134c17 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* linux/drivers/mtd/nand/s3c2410.c
2 *
Ben Dooksa4f957f2005-06-20 12:48:25 +01003 * Copyright (c) 2004,2005 Simtec Electronics
Ben Dooksfdf2fd52005-02-18 14:46:15 +00004 * http://www.simtec.co.uk/products/SWLINUX/
5 * Ben Dooks <ben@simtec.co.uk>
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 *
Ben Dooksa4f957f2005-06-20 12:48:25 +01007 * Samsung S3C2410/S3C240 NAND driver
Linus Torvalds1da177e2005-04-16 15:20:36 -07008 *
9 * Changelog:
10 * 21-Sep-2004 BJD Initial version
11 * 23-Sep-2004 BJD Mulitple device support
12 * 28-Sep-2004 BJD Fixed ECC placement for Hardware mode
13 * 12-Oct-2004 BJD Fixed errors in use of platform data
Ben Dooks3e4ef3b2005-03-17 11:31:30 +000014 * 18-Feb-2005 BJD Fix sparse errors
15 * 14-Mar-2005 BJD Applied tglx's code reduction patch
Ben Dooksa4f957f2005-06-20 12:48:25 +010016 * 02-May-2005 BJD Fixed s3c2440 support
17 * 02-May-2005 BJD Reduced hwcontrol decode
18 * 20-Jun-2005 BJD Updated s3c2440 support, fixed timing bug
Ben Dooksfb8d82a2005-07-06 21:05:10 +010019 * 08-Jul-2005 BJD Fix OOPS when no platform data supplied
Ben Dookscfd320f2005-10-20 22:22:58 +010020 * 20-Oct-2005 BJD Fix timing calculation bug
Ben Dooksd1fef3c2006-06-19 09:29:38 +010021 * 14-Jan-2006 BJD Allow clock to be stopped when idle
Linus Torvalds1da177e2005-04-16 15:20:36 -070022 *
Ben Dooksd1fef3c2006-06-19 09:29:38 +010023 * $Id: s3c2410.c,v 1.23 2006/04/01 18:06:29 bjd Exp $
Linus Torvalds1da177e2005-04-16 15:20:36 -070024 *
25 * This program is free software; you can redistribute it and/or modify
26 * it under the terms of the GNU General Public License as published by
27 * the Free Software Foundation; either version 2 of the License, or
28 * (at your option) any later version.
29 *
30 * This program is distributed in the hope that it will be useful,
31 * but WITHOUT ANY WARRANTY; without even the implied warranty of
32 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
33 * GNU General Public License for more details.
34 *
35 * You should have received a copy of the GNU General Public License
36 * along with this program; if not, write to the Free Software
37 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
38*/
39
Linus Torvalds1da177e2005-04-16 15:20:36 -070040#ifdef CONFIG_MTD_NAND_S3C2410_DEBUG
41#define DEBUG
42#endif
43
44#include <linux/module.h>
45#include <linux/types.h>
46#include <linux/init.h>
47#include <linux/kernel.h>
48#include <linux/string.h>
49#include <linux/ioport.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010050#include <linux/platform_device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070051#include <linux/delay.h>
52#include <linux/err.h>
Tim Schmielau4e57b682005-10-30 15:03:48 -080053#include <linux/slab.h>
Russell Kingf8ce2542006-01-07 16:15:52 +000054#include <linux/clk.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070055
56#include <linux/mtd/mtd.h>
57#include <linux/mtd/nand.h>
58#include <linux/mtd/nand_ecc.h>
59#include <linux/mtd/partitions.h>
60
61#include <asm/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070062
63#include <asm/arch/regs-nand.h>
64#include <asm/arch/nand.h>
65
Linus Torvalds1da177e2005-04-16 15:20:36 -070066#ifdef CONFIG_MTD_NAND_S3C2410_HWECC
67static int hardware_ecc = 1;
68#else
69static int hardware_ecc = 0;
70#endif
71
Ben Dooksd1fef3c2006-06-19 09:29:38 +010072#ifdef CONFIG_MTD_NAND_S3C2410_CLKSTOP
73static int clock_stop = 1;
74#else
75static const int clock_stop = 0;
76#endif
77
78
Linus Torvalds1da177e2005-04-16 15:20:36 -070079/* new oob placement block for use with hardware ecc generation
80 */
81
Thomas Gleixner5bd34c02006-05-27 22:16:10 +020082static struct nand_ecclayout nand_hw_eccoob = {
David Woodhousee0c7d762006-05-13 18:07:53 +010083 .eccbytes = 3,
84 .eccpos = {0, 1, 2},
85 .oobfree = {{8, 8}}
Linus Torvalds1da177e2005-04-16 15:20:36 -070086};
87
88/* controller and mtd information */
89
90struct s3c2410_nand_info;
91
92struct s3c2410_nand_mtd {
93 struct mtd_info mtd;
94 struct nand_chip chip;
95 struct s3c2410_nand_set *set;
96 struct s3c2410_nand_info *info;
97 int scan_res;
98};
99
Ben Dooks2c06a082006-06-27 14:35:46 +0100100enum s3c_cpu_type {
101 TYPE_S3C2410,
102 TYPE_S3C2412,
103 TYPE_S3C2440,
104};
105
Linus Torvalds1da177e2005-04-16 15:20:36 -0700106/* overview of the s3c2410 nand state */
107
108struct s3c2410_nand_info {
109 /* mtd info */
110 struct nand_hw_control controller;
111 struct s3c2410_nand_mtd *mtds;
112 struct s3c2410_platform_nand *platform;
113
114 /* device info */
115 struct device *device;
116 struct resource *area;
117 struct clk *clk;
Ben Dooksfdf2fd52005-02-18 14:46:15 +0000118 void __iomem *regs;
Ben Dooks2c06a082006-06-27 14:35:46 +0100119 void __iomem *sel_reg;
120 int sel_bit;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700121 int mtd_count;
Ben Dooksa4f957f2005-06-20 12:48:25 +0100122
Ben Dooks2c06a082006-06-27 14:35:46 +0100123 enum s3c_cpu_type cpu_type;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700124};
125
126/* conversion functions */
127
128static struct s3c2410_nand_mtd *s3c2410_nand_mtd_toours(struct mtd_info *mtd)
129{
130 return container_of(mtd, struct s3c2410_nand_mtd, mtd);
131}
132
133static struct s3c2410_nand_info *s3c2410_nand_mtd_toinfo(struct mtd_info *mtd)
134{
135 return s3c2410_nand_mtd_toours(mtd)->info;
136}
137
Russell King3ae5eae2005-11-09 22:32:44 +0000138static struct s3c2410_nand_info *to_nand_info(struct platform_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139{
Russell King3ae5eae2005-11-09 22:32:44 +0000140 return platform_get_drvdata(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700141}
142
Russell King3ae5eae2005-11-09 22:32:44 +0000143static struct s3c2410_platform_nand *to_nand_plat(struct platform_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700144{
Russell King3ae5eae2005-11-09 22:32:44 +0000145 return dev->dev.platform_data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700146}
147
Ben Dooksd1fef3c2006-06-19 09:29:38 +0100148static inline int allow_clk_stop(struct s3c2410_nand_info *info)
149{
150 return clock_stop;
151}
152
Linus Torvalds1da177e2005-04-16 15:20:36 -0700153/* timing calculations */
154
Ben Dookscfd320f2005-10-20 22:22:58 +0100155#define NS_IN_KHZ 1000000
Linus Torvalds1da177e2005-04-16 15:20:36 -0700156
Ben Dooks2c06a082006-06-27 14:35:46 +0100157static int s3c_nand_calc_rate(int wanted, unsigned long clk, int max)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700158{
159 int result;
160
Ben Dookscfd320f2005-10-20 22:22:58 +0100161 result = (wanted * clk) / NS_IN_KHZ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700162 result++;
163
164 pr_debug("result %d from %ld, %d\n", result, clk, wanted);
165
166 if (result > max) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100167 printk("%d ns is too big for current clock rate %ld\n", wanted, clk);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700168 return -1;
169 }
170
171 if (result < 1)
172 result = 1;
173
174 return result;
175}
176
Ben Dookscfd320f2005-10-20 22:22:58 +0100177#define to_ns(ticks,clk) (((ticks) * NS_IN_KHZ) / (unsigned int)(clk))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700178
179/* controller setup */
180
Ben Dooks2c06a082006-06-27 14:35:46 +0100181static int s3c2410_nand_inithw(struct s3c2410_nand_info *info,
182 struct platform_device *pdev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700183{
Russell King3ae5eae2005-11-09 22:32:44 +0000184 struct s3c2410_platform_nand *plat = to_nand_plat(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700185 unsigned long clkrate = clk_get_rate(info->clk);
Ben Dooks2c06a082006-06-27 14:35:46 +0100186 int tacls_max = (info->cpu_type == TYPE_S3C2412) ? 8 : 4;
Ben Dookscfd320f2005-10-20 22:22:58 +0100187 int tacls, twrph0, twrph1;
Ben Dooks2c06a082006-06-27 14:35:46 +0100188 unsigned long cfg = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700189
190 /* calculate the timing information for the controller */
191
Ben Dookscfd320f2005-10-20 22:22:58 +0100192 clkrate /= 1000; /* turn clock into kHz for ease of use */
193
Linus Torvalds1da177e2005-04-16 15:20:36 -0700194 if (plat != NULL) {
Ben Dooks2c06a082006-06-27 14:35:46 +0100195 tacls = s3c_nand_calc_rate(plat->tacls, clkrate, tacls_max);
196 twrph0 = s3c_nand_calc_rate(plat->twrph0, clkrate, 8);
197 twrph1 = s3c_nand_calc_rate(plat->twrph1, clkrate, 8);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700198 } else {
199 /* default timings */
Ben Dooks2c06a082006-06-27 14:35:46 +0100200 tacls = tacls_max;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700201 twrph0 = 8;
202 twrph1 = 8;
203 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000204
Linus Torvalds1da177e2005-04-16 15:20:36 -0700205 if (tacls < 0 || twrph0 < 0 || twrph1 < 0) {
Ben Dooks99974c62006-06-21 15:43:05 +0100206 dev_err(info->device, "cannot get suitable timings\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700207 return -EINVAL;
208 }
209
Ben Dooks99974c62006-06-21 15:43:05 +0100210 dev_info(info->device, "Tacls=%d, %dns Twrph0=%d %dns, Twrph1=%d %dns\n",
David Woodhousee0c7d762006-05-13 18:07:53 +0100211 tacls, to_ns(tacls, clkrate), twrph0, to_ns(twrph0, clkrate), twrph1, to_ns(twrph1, clkrate));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700212
Ben Dooks2c06a082006-06-27 14:35:46 +0100213 switch (info->cpu_type) {
214 case TYPE_S3C2410:
David Woodhousee0c7d762006-05-13 18:07:53 +0100215 cfg = S3C2410_NFCONF_EN;
216 cfg |= S3C2410_NFCONF_TACLS(tacls - 1);
217 cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1);
218 cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1);
Ben Dooks2c06a082006-06-27 14:35:46 +0100219 break;
220
221 case TYPE_S3C2440:
222 case TYPE_S3C2412:
David Woodhousee0c7d762006-05-13 18:07:53 +0100223 cfg = S3C2440_NFCONF_TACLS(tacls - 1);
224 cfg |= S3C2440_NFCONF_TWRPH0(twrph0 - 1);
225 cfg |= S3C2440_NFCONF_TWRPH1(twrph1 - 1);
Ben Dooksd1fef3c2006-06-19 09:29:38 +0100226
227 /* enable the controller and de-assert nFCE */
228
Ben Dooks2c06a082006-06-27 14:35:46 +0100229 writel(S3C2440_NFCONT_ENABLE, info->regs + S3C2440_NFCONT);
Ben Dooksa4f957f2005-06-20 12:48:25 +0100230 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700231
Ben Dooks99974c62006-06-21 15:43:05 +0100232 dev_dbg(info->device, "NF_CONF is 0x%lx\n", cfg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700233
234 writel(cfg, info->regs + S3C2410_NFCONF);
235 return 0;
236}
237
238/* select chip */
239
240static void s3c2410_nand_select_chip(struct mtd_info *mtd, int chip)
241{
242 struct s3c2410_nand_info *info;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000243 struct s3c2410_nand_mtd *nmtd;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700244 struct nand_chip *this = mtd->priv;
245 unsigned long cur;
246
247 nmtd = this->priv;
248 info = nmtd->info;
249
Ben Dooksd1fef3c2006-06-19 09:29:38 +0100250 if (chip != -1 && allow_clk_stop(info))
251 clk_enable(info->clk);
252
Ben Dooks2c06a082006-06-27 14:35:46 +0100253 cur = readl(info->sel_reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700254
255 if (chip == -1) {
Ben Dooks2c06a082006-06-27 14:35:46 +0100256 cur |= info->sel_bit;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700257 } else {
Ben Dooksfb8d82a2005-07-06 21:05:10 +0100258 if (nmtd->set != NULL && chip > nmtd->set->nr_chips) {
Ben Dooks99974c62006-06-21 15:43:05 +0100259 dev_err(info->device, "invalid chip %d\n", chip);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700260 return;
261 }
262
263 if (info->platform != NULL) {
264 if (info->platform->select_chip != NULL)
David Woodhousee0c7d762006-05-13 18:07:53 +0100265 (info->platform->select_chip) (nmtd->set, chip);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700266 }
267
Ben Dooks2c06a082006-06-27 14:35:46 +0100268 cur &= ~info->sel_bit;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700269 }
270
Ben Dooks2c06a082006-06-27 14:35:46 +0100271 writel(cur, info->sel_reg);
Ben Dooksd1fef3c2006-06-19 09:29:38 +0100272
273 if (chip == -1 && allow_clk_stop(info))
274 clk_disable(info->clk);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700275}
276
Ben Dooksad3b5fb2006-06-19 09:43:23 +0100277/* s3c2410_nand_hwcontrol
Ben Dooksa4f957f2005-06-20 12:48:25 +0100278 *
Ben Dooksad3b5fb2006-06-19 09:43:23 +0100279 * Issue command and address cycles to the chip
Ben Dooksa4f957f2005-06-20 12:48:25 +0100280*/
Linus Torvalds1da177e2005-04-16 15:20:36 -0700281
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200282static void s3c2410_nand_hwcontrol(struct mtd_info *mtd, int cmd,
David Woodhousef9068872006-06-10 00:53:16 +0100283 unsigned int ctrl)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700284{
285 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
David Woodhousec9ac5972006-11-30 08:17:38 +0000286
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200287 if (cmd == NAND_CMD_NONE)
288 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700289
David Woodhousef9068872006-06-10 00:53:16 +0100290 if (ctrl & NAND_CLE)
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200291 writeb(cmd, info->regs + S3C2410_NFCMD);
292 else
293 writeb(cmd, info->regs + S3C2410_NFADDR);
Ben Dooksa4f957f2005-06-20 12:48:25 +0100294}
295
296/* command and control functions */
297
David Woodhousef9068872006-06-10 00:53:16 +0100298static void s3c2440_nand_hwcontrol(struct mtd_info *mtd, int cmd,
299 unsigned int ctrl)
Ben Dooksa4f957f2005-06-20 12:48:25 +0100300{
301 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
Ben Dooksa4f957f2005-06-20 12:48:25 +0100302
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200303 if (cmd == NAND_CMD_NONE)
304 return;
Ben Dooksa4f957f2005-06-20 12:48:25 +0100305
David Woodhousef9068872006-06-10 00:53:16 +0100306 if (ctrl & NAND_CLE)
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200307 writeb(cmd, info->regs + S3C2440_NFCMD);
308 else
309 writeb(cmd, info->regs + S3C2440_NFADDR);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700310}
311
Linus Torvalds1da177e2005-04-16 15:20:36 -0700312/* s3c2410_nand_devready()
313 *
314 * returns 0 if the nand is busy, 1 if it is ready
315*/
316
317static int s3c2410_nand_devready(struct mtd_info *mtd)
318{
319 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700320 return readb(info->regs + S3C2410_NFSTAT) & S3C2410_NFSTAT_BUSY;
321}
322
Ben Dooks2c06a082006-06-27 14:35:46 +0100323static int s3c2440_nand_devready(struct mtd_info *mtd)
324{
325 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
326 return readb(info->regs + S3C2440_NFSTAT) & S3C2440_NFSTAT_READY;
327}
328
329static int s3c2412_nand_devready(struct mtd_info *mtd)
330{
331 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
332 return readb(info->regs + S3C2412_NFSTAT) & S3C2412_NFSTAT_READY;
333}
334
Linus Torvalds1da177e2005-04-16 15:20:36 -0700335/* ECC handling functions */
336
Ben Dooks2c06a082006-06-27 14:35:46 +0100337static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat,
338 u_char *read_ecc, u_char *calc_ecc)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700339{
Ben Dooksa2593242007-02-02 16:59:33 +0000340 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
341 unsigned int diff0, diff1, diff2;
342 unsigned int bit, byte;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700343
Ben Dooksa2593242007-02-02 16:59:33 +0000344 pr_debug("%s(%p,%p,%p,%p)\n", __func__, mtd, dat, read_ecc, calc_ecc);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700345
Ben Dooksa2593242007-02-02 16:59:33 +0000346 diff0 = read_ecc[0] ^ calc_ecc[0];
347 diff1 = read_ecc[1] ^ calc_ecc[1];
348 diff2 = read_ecc[2] ^ calc_ecc[2];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700349
Ben Dooksa2593242007-02-02 16:59:33 +0000350 pr_debug("%s: rd %02x%02x%02x calc %02x%02x%02x diff %02x%02x%02x\n",
351 __func__,
352 read_ecc[0], read_ecc[1], read_ecc[2],
353 calc_ecc[0], calc_ecc[1], calc_ecc[2],
354 diff0, diff1, diff2);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700355
Ben Dooksa2593242007-02-02 16:59:33 +0000356 if (diff0 == 0 && diff1 == 0 && diff2 == 0)
357 return 0; /* ECC is ok */
358
359 /* Can we correct this ECC (ie, one row and column change).
360 * Note, this is similar to the 256 error code on smartmedia */
361
362 if (((diff0 ^ (diff0 >> 1)) & 0x55) == 0x55 &&
363 ((diff1 ^ (diff1 >> 1)) & 0x55) == 0x55 &&
364 ((diff2 ^ (diff2 >> 1)) & 0x55) == 0x55) {
365 /* calculate the bit position of the error */
366
367 bit = (diff2 >> 2) & 1;
368 bit |= (diff2 >> 3) & 2;
369 bit |= (diff2 >> 4) & 4;
370
371 /* calculate the byte position of the error */
372
373 byte = (diff1 << 1) & 0x80;
374 byte |= (diff1 << 2) & 0x40;
375 byte |= (diff1 << 3) & 0x20;
376 byte |= (diff1 << 4) & 0x10;
377
378 byte |= (diff0 >> 3) & 0x08;
379 byte |= (diff0 >> 2) & 0x04;
380 byte |= (diff0 >> 1) & 0x02;
381 byte |= (diff0 >> 0) & 0x01;
382
383 byte |= (diff2 << 8) & 0x100;
384
385 dev_dbg(info->device, "correcting error bit %d, byte %d\n",
386 bit, byte);
387
388 dat[byte] ^= (1 << bit);
389 return 1;
390 }
391
392 /* if there is only one bit difference in the ECC, then
393 * one of only a row or column parity has changed, which
394 * means the error is most probably in the ECC itself */
395
396 diff0 |= (diff1 << 8);
397 diff0 |= (diff2 << 16);
398
399 if ((diff0 & ~(1<<fls(diff0))) == 0)
400 return 1;
401
402 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700403}
404
Ben Dooksa4f957f2005-06-20 12:48:25 +0100405/* ECC functions
406 *
407 * These allow the s3c2410 and s3c2440 to use the controller's ECC
408 * generator block to ECC the data as it passes through]
409*/
410
Linus Torvalds1da177e2005-04-16 15:20:36 -0700411static void s3c2410_nand_enable_hwecc(struct mtd_info *mtd, int mode)
412{
413 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
414 unsigned long ctrl;
415
416 ctrl = readl(info->regs + S3C2410_NFCONF);
417 ctrl |= S3C2410_NFCONF_INITECC;
418 writel(ctrl, info->regs + S3C2410_NFCONF);
419}
420
Ben Dooksa4f957f2005-06-20 12:48:25 +0100421static void s3c2440_nand_enable_hwecc(struct mtd_info *mtd, int mode)
422{
423 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
424 unsigned long ctrl;
425
426 ctrl = readl(info->regs + S3C2440_NFCONT);
427 writel(ctrl | S3C2440_NFCONT_INITECC, info->regs + S3C2440_NFCONT);
428}
429
David Woodhousee0c7d762006-05-13 18:07:53 +0100430static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700431{
432 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
433
434 ecc_code[0] = readb(info->regs + S3C2410_NFECC + 0);
435 ecc_code[1] = readb(info->regs + S3C2410_NFECC + 1);
436 ecc_code[2] = readb(info->regs + S3C2410_NFECC + 2);
437
Ben Dooksa2593242007-02-02 16:59:33 +0000438 pr_debug("%s: returning ecc %02x%02x%02x\n", __func__,
439 ecc_code[0], ecc_code[1], ecc_code[2]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700440
441 return 0;
442}
443
David Woodhousee0c7d762006-05-13 18:07:53 +0100444static int s3c2440_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
Ben Dooksa4f957f2005-06-20 12:48:25 +0100445{
446 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
447 unsigned long ecc = readl(info->regs + S3C2440_NFMECC0);
448
449 ecc_code[0] = ecc;
450 ecc_code[1] = ecc >> 8;
451 ecc_code[2] = ecc >> 16;
452
Ben Dooksa2593242007-02-02 16:59:33 +0000453 pr_debug("%s: returning ecc %06x\n", __func__, ecc);
Ben Dooksa4f957f2005-06-20 12:48:25 +0100454
455 return 0;
456}
457
Ben Dooksa4f957f2005-06-20 12:48:25 +0100458/* over-ride the standard functions for a little more speed. We can
459 * use read/write block to move the data buffers to/from the controller
460*/
Linus Torvalds1da177e2005-04-16 15:20:36 -0700461
462static void s3c2410_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
463{
464 struct nand_chip *this = mtd->priv;
465 readsb(this->IO_ADDR_R, buf, len);
466}
467
David Woodhousee0c7d762006-05-13 18:07:53 +0100468static void s3c2410_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700469{
470 struct nand_chip *this = mtd->priv;
471 writesb(this->IO_ADDR_W, buf, len);
472}
473
474/* device management functions */
475
Russell King3ae5eae2005-11-09 22:32:44 +0000476static int s3c2410_nand_remove(struct platform_device *pdev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700477{
Russell King3ae5eae2005-11-09 22:32:44 +0000478 struct s3c2410_nand_info *info = to_nand_info(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700479
Russell King3ae5eae2005-11-09 22:32:44 +0000480 platform_set_drvdata(pdev, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700481
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000482 if (info == NULL)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700483 return 0;
484
485 /* first thing we need to do is release all our mtds
486 * and their partitions, then go through freeing the
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000487 * resources used
Linus Torvalds1da177e2005-04-16 15:20:36 -0700488 */
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000489
Linus Torvalds1da177e2005-04-16 15:20:36 -0700490 if (info->mtds != NULL) {
491 struct s3c2410_nand_mtd *ptr = info->mtds;
492 int mtdno;
493
494 for (mtdno = 0; mtdno < info->mtd_count; mtdno++, ptr++) {
495 pr_debug("releasing mtd %d (%p)\n", mtdno, ptr);
496 nand_release(&ptr->mtd);
497 }
498
499 kfree(info->mtds);
500 }
501
502 /* free the common resources */
503
504 if (info->clk != NULL && !IS_ERR(info->clk)) {
Ben Dooksd1fef3c2006-06-19 09:29:38 +0100505 if (!allow_clk_stop(info))
506 clk_disable(info->clk);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700507 clk_put(info->clk);
508 }
509
510 if (info->regs != NULL) {
511 iounmap(info->regs);
512 info->regs = NULL;
513 }
514
515 if (info->area != NULL) {
516 release_resource(info->area);
517 kfree(info->area);
518 info->area = NULL;
519 }
520
521 kfree(info);
522
523 return 0;
524}
525
526#ifdef CONFIG_MTD_PARTITIONS
527static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info,
528 struct s3c2410_nand_mtd *mtd,
529 struct s3c2410_nand_set *set)
530{
531 if (set == NULL)
532 return add_mtd_device(&mtd->mtd);
533
534 if (set->nr_partitions > 0 && set->partitions != NULL) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100535 return add_mtd_partitions(&mtd->mtd, set->partitions, set->nr_partitions);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700536 }
537
538 return add_mtd_device(&mtd->mtd);
539}
540#else
541static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info,
542 struct s3c2410_nand_mtd *mtd,
543 struct s3c2410_nand_set *set)
544{
545 return add_mtd_device(&mtd->mtd);
546}
547#endif
548
549/* s3c2410_nand_init_chip
550 *
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000551 * init a single instance of an chip
Linus Torvalds1da177e2005-04-16 15:20:36 -0700552*/
553
554static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
555 struct s3c2410_nand_mtd *nmtd,
556 struct s3c2410_nand_set *set)
557{
558 struct nand_chip *chip = &nmtd->chip;
Ben Dooks2c06a082006-06-27 14:35:46 +0100559 void __iomem *regs = info->regs;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700560
Linus Torvalds1da177e2005-04-16 15:20:36 -0700561 chip->write_buf = s3c2410_nand_write_buf;
562 chip->read_buf = s3c2410_nand_read_buf;
563 chip->select_chip = s3c2410_nand_select_chip;
564 chip->chip_delay = 50;
565 chip->priv = nmtd;
566 chip->options = 0;
567 chip->controller = &info->controller;
568
Ben Dooks2c06a082006-06-27 14:35:46 +0100569 switch (info->cpu_type) {
570 case TYPE_S3C2410:
571 chip->IO_ADDR_W = regs + S3C2410_NFDATA;
572 info->sel_reg = regs + S3C2410_NFCONF;
573 info->sel_bit = S3C2410_NFCONF_nFCE;
574 chip->cmd_ctrl = s3c2410_nand_hwcontrol;
575 chip->dev_ready = s3c2410_nand_devready;
576 break;
577
578 case TYPE_S3C2440:
579 chip->IO_ADDR_W = regs + S3C2440_NFDATA;
580 info->sel_reg = regs + S3C2440_NFCONT;
581 info->sel_bit = S3C2440_NFCONT_nFCE;
582 chip->cmd_ctrl = s3c2440_nand_hwcontrol;
583 chip->dev_ready = s3c2440_nand_devready;
584 break;
585
586 case TYPE_S3C2412:
587 chip->IO_ADDR_W = regs + S3C2440_NFDATA;
588 info->sel_reg = regs + S3C2440_NFCONT;
589 info->sel_bit = S3C2412_NFCONT_nFCE0;
590 chip->cmd_ctrl = s3c2440_nand_hwcontrol;
591 chip->dev_ready = s3c2412_nand_devready;
592
593 if (readl(regs + S3C2410_NFCONF) & S3C2412_NFCONF_NANDBOOT)
594 dev_info(info->device, "System booted from NAND\n");
595
596 break;
597 }
598
599 chip->IO_ADDR_R = chip->IO_ADDR_W;
Ben Dooksa4f957f2005-06-20 12:48:25 +0100600
Linus Torvalds1da177e2005-04-16 15:20:36 -0700601 nmtd->info = info;
602 nmtd->mtd.priv = chip;
David Woodhouse552d9202006-05-14 01:20:46 +0100603 nmtd->mtd.owner = THIS_MODULE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700604 nmtd->set = set;
605
606 if (hardware_ecc) {
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +0200607 chip->ecc.calculate = s3c2410_nand_calculate_ecc;
Ben Dooks2c06a082006-06-27 14:35:46 +0100608 chip->ecc.correct = s3c2410_nand_correct_data;
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +0200609 chip->ecc.mode = NAND_ECC_HW;
610 chip->ecc.size = 512;
611 chip->ecc.bytes = 3;
Thomas Gleixner5bd34c02006-05-27 22:16:10 +0200612 chip->ecc.layout = &nand_hw_eccoob;
Ben Dooksa4f957f2005-06-20 12:48:25 +0100613
Ben Dooks2c06a082006-06-27 14:35:46 +0100614 switch (info->cpu_type) {
615 case TYPE_S3C2410:
616 chip->ecc.hwctl = s3c2410_nand_enable_hwecc;
617 chip->ecc.calculate = s3c2410_nand_calculate_ecc;
618 break;
619
620 case TYPE_S3C2412:
621 case TYPE_S3C2440:
622 chip->ecc.hwctl = s3c2440_nand_enable_hwecc;
623 chip->ecc.calculate = s3c2440_nand_calculate_ecc;
624 break;
625
Ben Dooksa4f957f2005-06-20 12:48:25 +0100626 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700627 } else {
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +0200628 chip->ecc.mode = NAND_ECC_SOFT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700629 }
630}
631
632/* s3c2410_nand_probe
633 *
634 * called by device layer when it finds a device matching
635 * one our driver can handled. This code checks to see if
636 * it can allocate all necessary resources then calls the
637 * nand layer to look for devices
638*/
639
Ben Dooks2c06a082006-06-27 14:35:46 +0100640static int s3c24xx_nand_probe(struct platform_device *pdev,
641 enum s3c_cpu_type cpu_type)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700642{
Russell King3ae5eae2005-11-09 22:32:44 +0000643 struct s3c2410_platform_nand *plat = to_nand_plat(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700644 struct s3c2410_nand_info *info;
645 struct s3c2410_nand_mtd *nmtd;
646 struct s3c2410_nand_set *sets;
647 struct resource *res;
648 int err = 0;
649 int size;
650 int nr_sets;
651 int setno;
652
Russell King3ae5eae2005-11-09 22:32:44 +0000653 pr_debug("s3c2410_nand_probe(%p)\n", pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700654
655 info = kmalloc(sizeof(*info), GFP_KERNEL);
656 if (info == NULL) {
Russell King3ae5eae2005-11-09 22:32:44 +0000657 dev_err(&pdev->dev, "no memory for flash info\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700658 err = -ENOMEM;
659 goto exit_error;
660 }
661
662 memzero(info, sizeof(*info));
Russell King3ae5eae2005-11-09 22:32:44 +0000663 platform_set_drvdata(pdev, info);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700664
665 spin_lock_init(&info->controller.lock);
Ben Dooksa4f957f2005-06-20 12:48:25 +0100666 init_waitqueue_head(&info->controller.wq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700667
668 /* get the clock source and enable it */
669
Russell King3ae5eae2005-11-09 22:32:44 +0000670 info->clk = clk_get(&pdev->dev, "nand");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700671 if (IS_ERR(info->clk)) {
Russell King3ae5eae2005-11-09 22:32:44 +0000672 dev_err(&pdev->dev, "failed to get clock");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700673 err = -ENOENT;
674 goto exit_error;
675 }
676
Linus Torvalds1da177e2005-04-16 15:20:36 -0700677 clk_enable(info->clk);
678
679 /* allocate and map the resource */
680
Ben Dooksa4f957f2005-06-20 12:48:25 +0100681 /* currently we assume we have the one resource */
682 res = pdev->resource;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700683 size = res->end - res->start + 1;
684
685 info->area = request_mem_region(res->start, size, pdev->name);
686
687 if (info->area == NULL) {
Russell King3ae5eae2005-11-09 22:32:44 +0000688 dev_err(&pdev->dev, "cannot reserve register region\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700689 err = -ENOENT;
690 goto exit_error;
691 }
692
Russell King3ae5eae2005-11-09 22:32:44 +0000693 info->device = &pdev->dev;
Ben Dooksa4f957f2005-06-20 12:48:25 +0100694 info->platform = plat;
695 info->regs = ioremap(res->start, size);
Ben Dooks2c06a082006-06-27 14:35:46 +0100696 info->cpu_type = cpu_type;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700697
698 if (info->regs == NULL) {
Russell King3ae5eae2005-11-09 22:32:44 +0000699 dev_err(&pdev->dev, "cannot reserve register region\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700700 err = -EIO;
701 goto exit_error;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000702 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700703
Russell King3ae5eae2005-11-09 22:32:44 +0000704 dev_dbg(&pdev->dev, "mapped registers at %p\n", info->regs);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700705
706 /* initialise the hardware */
707
Russell King3ae5eae2005-11-09 22:32:44 +0000708 err = s3c2410_nand_inithw(info, pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700709 if (err != 0)
710 goto exit_error;
711
712 sets = (plat != NULL) ? plat->sets : NULL;
713 nr_sets = (plat != NULL) ? plat->nr_sets : 1;
714
715 info->mtd_count = nr_sets;
716
717 /* allocate our information */
718
719 size = nr_sets * sizeof(*info->mtds);
720 info->mtds = kmalloc(size, GFP_KERNEL);
721 if (info->mtds == NULL) {
Russell King3ae5eae2005-11-09 22:32:44 +0000722 dev_err(&pdev->dev, "failed to allocate mtd storage\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700723 err = -ENOMEM;
724 goto exit_error;
725 }
726
727 memzero(info->mtds, size);
728
729 /* initialise all possible chips */
730
731 nmtd = info->mtds;
732
733 for (setno = 0; setno < nr_sets; setno++, nmtd++) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100734 pr_debug("initialising set %d (%p, info %p)\n", setno, nmtd, info);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000735
Linus Torvalds1da177e2005-04-16 15:20:36 -0700736 s3c2410_nand_init_chip(info, nmtd, sets);
737
David Woodhousee0c7d762006-05-13 18:07:53 +0100738 nmtd->scan_res = nand_scan(&nmtd->mtd, (sets) ? sets->nr_chips : 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700739
740 if (nmtd->scan_res == 0) {
741 s3c2410_nand_add_partition(info, nmtd, sets);
742 }
743
744 if (sets != NULL)
745 sets++;
746 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000747
Ben Dooksd1fef3c2006-06-19 09:29:38 +0100748 if (allow_clk_stop(info)) {
749 dev_info(&pdev->dev, "clock idle support enabled\n");
750 clk_disable(info->clk);
751 }
752
Linus Torvalds1da177e2005-04-16 15:20:36 -0700753 pr_debug("initialised ok\n");
754 return 0;
755
756 exit_error:
Russell King3ae5eae2005-11-09 22:32:44 +0000757 s3c2410_nand_remove(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700758
759 if (err == 0)
760 err = -EINVAL;
761 return err;
762}
763
Ben Dooksd1fef3c2006-06-19 09:29:38 +0100764/* PM Support */
765#ifdef CONFIG_PM
766
767static int s3c24xx_nand_suspend(struct platform_device *dev, pm_message_t pm)
768{
769 struct s3c2410_nand_info *info = platform_get_drvdata(dev);
770
771 if (info) {
772 if (!allow_clk_stop(info))
773 clk_disable(info->clk);
774 }
775
776 return 0;
777}
778
779static int s3c24xx_nand_resume(struct platform_device *dev)
780{
781 struct s3c2410_nand_info *info = platform_get_drvdata(dev);
782
783 if (info) {
784 clk_enable(info->clk);
785 s3c2410_nand_inithw(info, dev);
786
787 if (allow_clk_stop(info))
788 clk_disable(info->clk);
789 }
790
791 return 0;
792}
793
794#else
795#define s3c24xx_nand_suspend NULL
796#define s3c24xx_nand_resume NULL
797#endif
798
Ben Dooksa4f957f2005-06-20 12:48:25 +0100799/* driver device registration */
800
Russell King3ae5eae2005-11-09 22:32:44 +0000801static int s3c2410_nand_probe(struct platform_device *dev)
Ben Dooksa4f957f2005-06-20 12:48:25 +0100802{
Ben Dooks2c06a082006-06-27 14:35:46 +0100803 return s3c24xx_nand_probe(dev, TYPE_S3C2410);
Ben Dooksa4f957f2005-06-20 12:48:25 +0100804}
805
Russell King3ae5eae2005-11-09 22:32:44 +0000806static int s3c2440_nand_probe(struct platform_device *dev)
Ben Dooksa4f957f2005-06-20 12:48:25 +0100807{
Ben Dooks2c06a082006-06-27 14:35:46 +0100808 return s3c24xx_nand_probe(dev, TYPE_S3C2440);
809}
810
811static int s3c2412_nand_probe(struct platform_device *dev)
812{
813 return s3c24xx_nand_probe(dev, TYPE_S3C2412);
Ben Dooksa4f957f2005-06-20 12:48:25 +0100814}
815
Russell King3ae5eae2005-11-09 22:32:44 +0000816static struct platform_driver s3c2410_nand_driver = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700817 .probe = s3c2410_nand_probe,
818 .remove = s3c2410_nand_remove,
Ben Dooksd1fef3c2006-06-19 09:29:38 +0100819 .suspend = s3c24xx_nand_suspend,
820 .resume = s3c24xx_nand_resume,
Russell King3ae5eae2005-11-09 22:32:44 +0000821 .driver = {
822 .name = "s3c2410-nand",
823 .owner = THIS_MODULE,
824 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700825};
826
Russell King3ae5eae2005-11-09 22:32:44 +0000827static struct platform_driver s3c2440_nand_driver = {
Ben Dooksa4f957f2005-06-20 12:48:25 +0100828 .probe = s3c2440_nand_probe,
829 .remove = s3c2410_nand_remove,
Ben Dooksd1fef3c2006-06-19 09:29:38 +0100830 .suspend = s3c24xx_nand_suspend,
831 .resume = s3c24xx_nand_resume,
Russell King3ae5eae2005-11-09 22:32:44 +0000832 .driver = {
833 .name = "s3c2440-nand",
834 .owner = THIS_MODULE,
835 },
Ben Dooksa4f957f2005-06-20 12:48:25 +0100836};
837
Ben Dooks2c06a082006-06-27 14:35:46 +0100838static struct platform_driver s3c2412_nand_driver = {
839 .probe = s3c2412_nand_probe,
840 .remove = s3c2410_nand_remove,
841 .suspend = s3c24xx_nand_suspend,
842 .resume = s3c24xx_nand_resume,
843 .driver = {
844 .name = "s3c2412-nand",
845 .owner = THIS_MODULE,
846 },
847};
848
Linus Torvalds1da177e2005-04-16 15:20:36 -0700849static int __init s3c2410_nand_init(void)
850{
Ben Dooksa4f957f2005-06-20 12:48:25 +0100851 printk("S3C24XX NAND Driver, (c) 2004 Simtec Electronics\n");
852
Ben Dooks2c06a082006-06-27 14:35:46 +0100853 platform_driver_register(&s3c2412_nand_driver);
Russell King3ae5eae2005-11-09 22:32:44 +0000854 platform_driver_register(&s3c2440_nand_driver);
855 return platform_driver_register(&s3c2410_nand_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700856}
857
858static void __exit s3c2410_nand_exit(void)
859{
Ben Dooks2c06a082006-06-27 14:35:46 +0100860 platform_driver_unregister(&s3c2412_nand_driver);
Russell King3ae5eae2005-11-09 22:32:44 +0000861 platform_driver_unregister(&s3c2440_nand_driver);
862 platform_driver_unregister(&s3c2410_nand_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700863}
864
865module_init(s3c2410_nand_init);
866module_exit(s3c2410_nand_exit);
867
868MODULE_LICENSE("GPL");
869MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
Ben Dooksa4f957f2005-06-20 12:48:25 +0100870MODULE_DESCRIPTION("S3C24XX MTD NAND driver");