blob: 2c13ec696ac541f96d781c5a94c251bad36e481a [file] [log] [blame]
Stefan Agnerefb45b32014-11-02 21:36:46 +01001/*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
Stefan Agner4a4d45c2015-12-07 13:51:13 -08004 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * Or, alternatively
19 *
20 * b) Permission is hereby granted, free of charge, to any person
21 * obtaining a copy of this software and associated documentation
22 * files (the "Software"), to deal in the Software without
23 * restriction, including without limitation the rights to use
24 * copy, modify, merge, publish, distribute, sublicense, and/or
25 * sell copies of the Software, and to permit persons to whom the
26 * Software is furnished to do so, subject to the following
27 * conditions:
28 *
29 * The above copyright notice and this permission notice shall be
30 * included in all copies or substantial portions of the Software.
31 *
32 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 * OTHER DEALINGS IN THE SOFTWARE.
Stefan Agnerefb45b32014-11-02 21:36:46 +010040 */
41
42#include "vf610-pinfunc.h"
43#include <dt-bindings/clock/vf610-clock.h>
44#include <dt-bindings/interrupt-controller/irq.h>
Stefan Agner2b36bda2014-11-04 14:07:08 +010045#include <dt-bindings/gpio/gpio.h>
Stefan Agnerefb45b32014-11-02 21:36:46 +010046
47/ {
48 aliases {
49 can0 = &can0;
50 can1 = &can1;
Stefan Agner17566c72016-01-29 16:04:48 -080051 ethernet0 = &fec0;
52 ethernet1 = &fec1;
Stefan Agnerefb45b32014-11-02 21:36:46 +010053 serial0 = &uart0;
54 serial1 = &uart1;
55 serial2 = &uart2;
56 serial3 = &uart3;
57 serial4 = &uart4;
58 serial5 = &uart5;
Stefan Agner76713952015-01-16 18:06:15 +010059 gpio0 = &gpio0;
60 gpio1 = &gpio1;
61 gpio2 = &gpio2;
62 gpio3 = &gpio3;
63 gpio4 = &gpio4;
Stefan Agnerefb45b32014-11-02 21:36:46 +010064 usbphy0 = &usbphy0;
65 usbphy1 = &usbphy1;
66 };
67
68 fxosc: fxosc {
69 compatible = "fixed-clock";
70 #clock-cells = <0>;
71 clock-frequency = <24000000>;
72 };
73
74 sxosc: sxosc {
75 compatible = "fixed-clock";
76 #clock-cells = <0>;
77 clock-frequency = <32768>;
78 };
79
Stefan Agner0d018d72014-12-02 18:11:59 +010080 reboot: syscon-reboot {
81 compatible = "syscon-reboot";
82 regmap = <&src>;
83 offset = <0x0>;
84 mask = <0x1000>;
85 };
86
Stefan Agnerefb45b32014-11-02 21:36:46 +010087 soc {
88 #address-cells = <1>;
89 #size-cells = <1>;
90 compatible = "simple-bus";
Stefan Agnerc09d0f72015-03-01 23:41:29 +010091 interrupt-parent = <&mscm_ir>;
Stefan Agnerefb45b32014-11-02 21:36:46 +010092 ranges;
93
94 aips0: aips-bus@40000000 {
95 compatible = "fsl,aips-bus", "simple-bus";
96 #address-cells = <1>;
97 #size-cells = <1>;
Stefan Agneref4a4e12016-04-01 23:13:41 -070098 reg = <0x40000000 0x00070000>;
Stefan Agnerefb45b32014-11-02 21:36:46 +010099 ranges;
100
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100101 mscm_cpucfg: cpucfg@40001000 {
102 compatible = "fsl,vf610-mscm-cpucfg", "syscon";
103 reg = <0x40001000 0x800>;
104 };
105
106 mscm_ir: interrupt-controller@40001800 {
107 compatible = "fsl,vf610-mscm-ir";
108 reg = <0x40001800 0x400>;
109 fsl,cpucfg = <&mscm_cpucfg>;
110 interrupt-controller;
111 #interrupt-cells = <2>;
112 };
113
Stefan Agnerefb45b32014-11-02 21:36:46 +0100114 edma0: dma-controller@40018000 {
115 #dma-cells = <2>;
116 compatible = "fsl,vf610-edma";
117 reg = <0x40018000 0x2000>,
118 <0x40024000 0x1000>,
119 <0x40025000 0x1000>;
120 dma-channels = <32>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100121 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>,
122 <9 IRQ_TYPE_LEVEL_HIGH>;
123 interrupt-names = "edma-tx", "edma-err";
Stefan Agnerefb45b32014-11-02 21:36:46 +0100124 clock-names = "dmamux0", "dmamux1";
125 clocks = <&clks VF610_CLK_DMAMUX0>,
126 <&clks VF610_CLK_DMAMUX1>;
127 status = "disabled";
128 };
129
130 can0: flexcan@40020000 {
131 compatible = "fsl,vf610-flexcan";
132 reg = <0x40020000 0x4000>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100133 interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100134 clocks = <&clks VF610_CLK_FLEXCAN0>,
135 <&clks VF610_CLK_FLEXCAN0>;
136 clock-names = "ipg", "per";
137 status = "disabled";
138 };
139
140 uart0: serial@40027000 {
141 compatible = "fsl,vf610-lpuart";
142 reg = <0x40027000 0x1000>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100143 interrupts = <61 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100144 clocks = <&clks VF610_CLK_UART0>;
145 clock-names = "ipg";
146 dmas = <&edma0 0 2>,
147 <&edma0 0 3>;
148 dma-names = "rx","tx";
149 status = "disabled";
150 };
151
152 uart1: serial@40028000 {
153 compatible = "fsl,vf610-lpuart";
154 reg = <0x40028000 0x1000>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100155 interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100156 clocks = <&clks VF610_CLK_UART1>;
157 clock-names = "ipg";
158 dmas = <&edma0 0 4>,
159 <&edma0 0 5>;
160 dma-names = "rx","tx";
161 status = "disabled";
162 };
163
164 uart2: serial@40029000 {
165 compatible = "fsl,vf610-lpuart";
166 reg = <0x40029000 0x1000>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100167 interrupts = <63 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100168 clocks = <&clks VF610_CLK_UART2>;
169 clock-names = "ipg";
170 dmas = <&edma0 0 6>,
171 <&edma0 0 7>;
172 dma-names = "rx","tx";
173 status = "disabled";
174 };
175
176 uart3: serial@4002a000 {
177 compatible = "fsl,vf610-lpuart";
178 reg = <0x4002a000 0x1000>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100179 interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100180 clocks = <&clks VF610_CLK_UART3>;
181 clock-names = "ipg";
182 dmas = <&edma0 0 8>,
183 <&edma0 0 9>;
184 dma-names = "rx","tx";
185 status = "disabled";
186 };
187
188 dspi0: dspi0@4002c000 {
189 #address-cells = <1>;
190 #size-cells = <0>;
191 compatible = "fsl,vf610-dspi";
192 reg = <0x4002c000 0x1000>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100193 interrupts = <67 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100194 clocks = <&clks VF610_CLK_DSPI0>;
195 clock-names = "dspi";
Cory Tusar897ed0c2015-11-18 22:54:39 -0500196 spi-num-chipselects = <6>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100197 status = "disabled";
198 };
199
Bhuvanchandra DV1b545c12015-01-27 16:27:18 +0530200 dspi1: dspi1@4002d000 {
201 #address-cells = <1>;
202 #size-cells = <0>;
203 compatible = "fsl,vf610-dspi";
204 reg = <0x4002d000 0x1000>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100205 interrupts = <68 IRQ_TYPE_LEVEL_HIGH>;
Bhuvanchandra DV1b545c12015-01-27 16:27:18 +0530206 clocks = <&clks VF610_CLK_DSPI1>;
207 clock-names = "dspi";
Cory Tusar897ed0c2015-11-18 22:54:39 -0500208 spi-num-chipselects = <4>;
Bhuvanchandra DV1b545c12015-01-27 16:27:18 +0530209 status = "disabled";
210 };
211
Stefan Agner26a91d82015-10-17 21:05:22 -0700212 sai0: sai@4002f000 {
213 compatible = "fsl,vf610-sai";
214 reg = <0x4002f000 0x1000>;
215 interrupts = <84 IRQ_TYPE_LEVEL_HIGH>;
216 clocks = <&clks VF610_CLK_SAI0>,
217 <&clks VF610_CLK_SAI0_DIV>,
218 <&clks 0>, <&clks 0>;
219 clock-names = "bus", "mclk1", "mclk2", "mclk3";
220 dma-names = "tx", "rx";
221 dmas = <&edma0 0 17>,
222 <&edma0 0 16>;
223 status = "disabled";
224 };
225
226 sai1: sai@40030000 {
227 compatible = "fsl,vf610-sai";
228 reg = <0x40030000 0x1000>;
229 interrupts = <85 IRQ_TYPE_LEVEL_HIGH>;
230 clocks = <&clks VF610_CLK_SAI1>,
231 <&clks VF610_CLK_SAI1_DIV>,
232 <&clks 0>, <&clks 0>;
233 clock-names = "bus", "mclk1", "mclk2", "mclk3";
234 dma-names = "tx", "rx";
235 dmas = <&edma0 0 19>,
236 <&edma0 0 18>;
237 status = "disabled";
238 };
239
Stefan Agnerefb45b32014-11-02 21:36:46 +0100240 sai2: sai@40031000 {
241 compatible = "fsl,vf610-sai";
242 reg = <0x40031000 0x1000>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100243 interrupts = <86 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agner531ee1f2015-10-17 21:05:21 -0700244 clocks = <&clks VF610_CLK_SAI2>,
245 <&clks VF610_CLK_SAI2_DIV>,
246 <&clks 0>, <&clks 0>;
247 clock-names = "bus", "mclk1", "mclk2", "mclk3";
Stefan Agnerefb45b32014-11-02 21:36:46 +0100248 dma-names = "tx", "rx";
249 dmas = <&edma0 0 21>,
250 <&edma0 0 20>;
251 status = "disabled";
252 };
253
Stefan Agner26a91d82015-10-17 21:05:22 -0700254 sai3: sai@40032000 {
255 compatible = "fsl,vf610-sai";
256 reg = <0x40032000 0x1000>;
257 interrupts = <87 IRQ_TYPE_LEVEL_HIGH>;
258 clocks = <&clks VF610_CLK_SAI3>,
259 <&clks VF610_CLK_SAI3_DIV>,
260 <&clks 0>, <&clks 0>;
261 clock-names = "bus", "mclk1", "mclk2", "mclk3";
262 dma-names = "tx", "rx";
263 dmas = <&edma0 1 9>,
264 <&edma0 1 8>;
265 status = "disabled";
266 };
267
Stefan Agnerefb45b32014-11-02 21:36:46 +0100268 pit: pit@40037000 {
269 compatible = "fsl,vf610-pit";
270 reg = <0x40037000 0x1000>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100271 interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100272 clocks = <&clks VF610_CLK_PIT>;
273 clock-names = "pit";
274 };
275
276 pwm0: pwm@40038000 {
277 compatible = "fsl,vf610-ftm-pwm";
278 #pwm-cells = <3>;
279 reg = <0x40038000 0x1000>;
280 clock-names = "ftm_sys", "ftm_ext",
281 "ftm_fix", "ftm_cnt_clk_en";
282 clocks = <&clks VF610_CLK_FTM0>,
283 <&clks VF610_CLK_FTM0_EXT_SEL>,
284 <&clks VF610_CLK_FTM0_FIX_SEL>,
285 <&clks VF610_CLK_FTM0_EXT_FIX_EN>;
286 status = "disabled";
287 };
288
289 pwm1: pwm@40039000 {
290 compatible = "fsl,vf610-ftm-pwm";
291 #pwm-cells = <3>;
292 reg = <0x40039000 0x1000>;
293 clock-names = "ftm_sys", "ftm_ext",
294 "ftm_fix", "ftm_cnt_clk_en";
295 clocks = <&clks VF610_CLK_FTM1>,
296 <&clks VF610_CLK_FTM1_EXT_SEL>,
297 <&clks VF610_CLK_FTM1_FIX_SEL>,
298 <&clks VF610_CLK_FTM1_EXT_FIX_EN>;
299 status = "disabled";
300 };
301
302 adc0: adc@4003b000 {
303 compatible = "fsl,vf610-adc";
304 reg = <0x4003b000 0x1000>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100305 interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100306 clocks = <&clks VF610_CLK_ADC0>;
307 clock-names = "adc";
Sanchayan Maity9b1793a2015-07-16 20:43:19 +0530308 #io-channel-cells = <1>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100309 status = "disabled";
Stefan Agnerdef06412015-05-27 14:47:52 +0200310 fsl,adck-max-frequency = <30000000>, <40000000>,
311 <20000000>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100312 };
313
Stefan Agner1d0fc332016-04-04 22:28:39 -0700314 tcon0: timing-controller@4003d000 {
315 compatible = "fsl,vf610-tcon";
316 reg = <0x4003d000 0x1000>;
317 clocks = <&clks VF610_CLK_TCON0>;
318 clock-names = "ipg";
319 status = "disabled";
320 };
321
Stefan Agnerc134e092014-11-28 00:35:36 +0100322 wdoga5: wdog@4003e000 {
Stefan Agnerefb45b32014-11-02 21:36:46 +0100323 compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
324 reg = <0x4003e000 0x1000>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100325 interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100326 clocks = <&clks VF610_CLK_WDT>;
327 clock-names = "wdog";
328 status = "disabled";
329 };
330
331 qspi0: quadspi@40044000 {
332 #address-cells = <1>;
333 #size-cells = <0>;
334 compatible = "fsl,vf610-qspi";
Cory Tusarf4b89232015-07-08 16:21:15 -0400335 reg = <0x40044000 0x1000>, <0x20000000 0x10000000>;
336 reg-names = "QuadSPI", "QuadSPI-memory";
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100337 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100338 clocks = <&clks VF610_CLK_QSPI0_EN>,
339 <&clks VF610_CLK_QSPI0>;
340 clock-names = "qspi_en", "qspi";
341 status = "disabled";
342 };
343
344 iomuxc: iomuxc@40048000 {
345 compatible = "fsl,vf610-iomuxc";
346 reg = <0x40048000 0x1000>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100347 };
348
Stefan Agner76713952015-01-16 18:06:15 +0100349 gpio0: gpio@40049000 {
Stefan Agnerefb45b32014-11-02 21:36:46 +0100350 compatible = "fsl,vf610-gpio";
351 reg = <0x40049000 0x1000 0x400ff000 0x40>;
352 gpio-controller;
353 #gpio-cells = <2>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100354 interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100355 interrupt-controller;
356 #interrupt-cells = <2>;
357 gpio-ranges = <&iomuxc 0 0 32>;
358 };
359
Stefan Agner76713952015-01-16 18:06:15 +0100360 gpio1: gpio@4004a000 {
Stefan Agnerefb45b32014-11-02 21:36:46 +0100361 compatible = "fsl,vf610-gpio";
362 reg = <0x4004a000 0x1000 0x400ff040 0x40>;
363 gpio-controller;
364 #gpio-cells = <2>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100365 interrupts = <108 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100366 interrupt-controller;
367 #interrupt-cells = <2>;
368 gpio-ranges = <&iomuxc 0 32 32>;
369 };
370
Stefan Agner76713952015-01-16 18:06:15 +0100371 gpio2: gpio@4004b000 {
Stefan Agnerefb45b32014-11-02 21:36:46 +0100372 compatible = "fsl,vf610-gpio";
373 reg = <0x4004b000 0x1000 0x400ff080 0x40>;
374 gpio-controller;
375 #gpio-cells = <2>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100376 interrupts = <109 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100377 interrupt-controller;
378 #interrupt-cells = <2>;
379 gpio-ranges = <&iomuxc 0 64 32>;
380 };
381
Stefan Agner76713952015-01-16 18:06:15 +0100382 gpio3: gpio@4004c000 {
Stefan Agnerefb45b32014-11-02 21:36:46 +0100383 compatible = "fsl,vf610-gpio";
384 reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
385 gpio-controller;
386 #gpio-cells = <2>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100387 interrupts = <110 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100388 interrupt-controller;
389 #interrupt-cells = <2>;
390 gpio-ranges = <&iomuxc 0 96 32>;
391 };
392
Stefan Agner76713952015-01-16 18:06:15 +0100393 gpio4: gpio@4004d000 {
Stefan Agnerefb45b32014-11-02 21:36:46 +0100394 compatible = "fsl,vf610-gpio";
395 reg = <0x4004d000 0x1000 0x400ff100 0x40>;
396 gpio-controller;
397 #gpio-cells = <2>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100398 interrupts = <111 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100399 interrupt-controller;
400 #interrupt-cells = <2>;
401 gpio-ranges = <&iomuxc 0 128 7>;
402 };
403
404 anatop: anatop@40050000 {
405 compatible = "fsl,vf610-anatop", "syscon";
406 reg = <0x40050000 0x400>;
407 };
408
409 usbphy0: usbphy@40050800 {
410 compatible = "fsl,vf610-usbphy";
411 reg = <0x40050800 0x400>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100412 interrupts = <50 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100413 clocks = <&clks VF610_CLK_USBPHY0>;
414 fsl,anatop = <&anatop>;
415 status = "disabled";
416 };
417
418 usbphy1: usbphy@40050c00 {
419 compatible = "fsl,vf610-usbphy";
420 reg = <0x40050c00 0x400>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100421 interrupts = <51 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100422 clocks = <&clks VF610_CLK_USBPHY1>;
423 fsl,anatop = <&anatop>;
424 status = "disabled";
425 };
426
Stefan Agner1d0fc332016-04-04 22:28:39 -0700427 dcu0: dcu@40058000 {
428 compatible = "fsl,vf610-dcu";
429 reg = <0x40058000 0x1200>;
430 interrupts = <30 IRQ_TYPE_LEVEL_HIGH>;
431 clocks = <&clks VF610_CLK_DCU0>,
432 <&clks VF610_CLK_DCU0_DIV>;
433 clock-names = "dcu", "pix";
434 fsl,tcon = <&tcon0>;
435 status = "disabled";
436 };
437
Stefan Agnerefb45b32014-11-02 21:36:46 +0100438 i2c0: i2c@40066000 {
439 #address-cells = <1>;
440 #size-cells = <0>;
441 compatible = "fsl,vf610-i2c";
442 reg = <0x40066000 0x1000>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100443 interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100444 clocks = <&clks VF610_CLK_I2C0>;
445 clock-names = "ipg";
446 dmas = <&edma0 0 50>,
447 <&edma0 0 51>;
448 dma-names = "rx","tx";
449 status = "disabled";
450 };
451
Cory Tusar2d4e4a62015-06-14 20:19:59 -0400452 i2c1: i2c@40067000 {
453 #address-cells = <1>;
454 #size-cells = <0>;
455 compatible = "fsl,vf610-i2c";
456 reg = <0x40067000 0x1000>;
457 interrupts = <72 IRQ_TYPE_LEVEL_HIGH>;
458 clocks = <&clks VF610_CLK_I2C1>;
459 clock-names = "ipg";
460 dmas = <&edma0 0 52>,
461 <&edma0 0 53>;
462 dma-names = "rx","tx";
463 status = "disabled";
464 };
465
Stefan Agnerefb45b32014-11-02 21:36:46 +0100466 clks: ccm@4006b000 {
467 compatible = "fsl,vf610-ccm";
468 reg = <0x4006b000 0x1000>;
469 clocks = <&sxosc>, <&fxosc>;
470 clock-names = "sxosc", "fxosc";
471 #clock-cells = <1>;
472 };
473
474 usbdev0: usb@40034000 {
475 compatible = "fsl,vf610-usb", "fsl,imx27-usb";
476 reg = <0x40034000 0x800>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100477 interrupts = <75 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100478 clocks = <&clks VF610_CLK_USBC0>;
479 fsl,usbphy = <&usbphy0>;
480 fsl,usbmisc = <&usbmisc0 0>;
481 dr_mode = "peripheral";
482 status = "disabled";
483 };
484
485 usbmisc0: usb@40034800 {
486 #index-cells = <1>;
487 compatible = "fsl,vf610-usbmisc";
488 reg = <0x40034800 0x200>;
489 clocks = <&clks VF610_CLK_USBC0>;
490 status = "disabled";
491 };
Stefan Agner0d018d72014-12-02 18:11:59 +0100492
493 src: src@4006e000 {
494 compatible = "fsl,vf610-src", "syscon";
495 reg = <0x4006e000 0x1000>;
Stefan Agner53f643d2015-03-30 12:10:39 +0800496 interrupts = <96 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agner0d018d72014-12-02 18:11:59 +0100497 };
Stefan Agnerefb45b32014-11-02 21:36:46 +0100498 };
499
500 aips1: aips-bus@40080000 {
501 compatible = "fsl,aips-bus", "simple-bus";
502 #address-cells = <1>;
503 #size-cells = <1>;
Stefan Agneref4a4e12016-04-01 23:13:41 -0700504 reg = <0x40080000 0x0007f000>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100505 ranges;
506
507 edma1: dma-controller@40098000 {
508 #dma-cells = <2>;
509 compatible = "fsl,vf610-edma";
510 reg = <0x40098000 0x2000>,
511 <0x400a1000 0x1000>,
512 <0x400a2000 0x1000>;
513 dma-channels = <32>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100514 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>,
515 <11 IRQ_TYPE_LEVEL_HIGH>;
516 interrupt-names = "edma-tx", "edma-err";
Stefan Agnerefb45b32014-11-02 21:36:46 +0100517 clock-names = "dmamux0", "dmamux1";
518 clocks = <&clks VF610_CLK_DMAMUX2>,
519 <&clks VF610_CLK_DMAMUX3>;
520 status = "disabled";
521 };
522
Sanchayan Maity8455dd02015-01-07 12:39:30 +0530523 snvs0: snvs@400a7000 {
Frank Li95d739b2015-05-27 00:25:59 +0800524 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
525 reg = <0x400a7000 0x2000>;
Sanchayan Maity8455dd02015-01-07 12:39:30 +0530526
Frank Li95d739b2015-05-27 00:25:59 +0800527 snvsrtc: snvs-rtc-lp {
Sanchayan Maity8455dd02015-01-07 12:39:30 +0530528 compatible = "fsl,sec-v4.0-mon-rtc-lp";
Frank Li95d739b2015-05-27 00:25:59 +0800529 regmap = <&snvs0>;
530 offset = <0x34>;
Stefan Agner53f643d2015-03-30 12:10:39 +0800531 interrupts = <100 IRQ_TYPE_LEVEL_HIGH>;
Sanchayan Maity8455dd02015-01-07 12:39:30 +0530532 clocks = <&clks VF610_CLK_SNVS>;
533 clock-names = "snvs-rtc";
534 };
535 };
536
Stefan Agnerefb45b32014-11-02 21:36:46 +0100537 uart4: serial@400a9000 {
538 compatible = "fsl,vf610-lpuart";
539 reg = <0x400a9000 0x1000>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100540 interrupts = <65 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100541 clocks = <&clks VF610_CLK_UART4>;
542 clock-names = "ipg";
543 status = "disabled";
544 };
545
546 uart5: serial@400aa000 {
547 compatible = "fsl,vf610-lpuart";
548 reg = <0x400aa000 0x1000>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100549 interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100550 clocks = <&clks VF610_CLK_UART5>;
551 clock-names = "ipg";
552 status = "disabled";
553 };
554
Cory Tusar5f060c72015-11-18 22:54:40 -0500555 dspi2: dspi2@400ac000 {
556 #address-cells = <1>;
557 #size-cells = <0>;
558 compatible = "fsl,vf610-dspi";
559 reg = <0x400ac000 0x1000>;
560 interrupts = <69 IRQ_TYPE_LEVEL_HIGH>;
561 clocks = <&clks VF610_CLK_DSPI2>;
562 clock-names = "dspi";
563 spi-num-chipselects = <2>;
564 status = "disabled";
565 };
566
567 dspi3: dspi3@400ad000 {
568 #address-cells = <1>;
569 #size-cells = <0>;
570 compatible = "fsl,vf610-dspi";
571 reg = <0x400ad000 0x1000>;
572 interrupts = <70 IRQ_TYPE_LEVEL_HIGH>;
573 clocks = <&clks VF610_CLK_DSPI3>;
574 clock-names = "dspi";
575 spi-num-chipselects = <2>;
576 status = "disabled";
577 };
578
Stefan Agnerefb45b32014-11-02 21:36:46 +0100579 adc1: adc@400bb000 {
580 compatible = "fsl,vf610-adc";
581 reg = <0x400bb000 0x1000>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100582 interrupts = <54 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100583 clocks = <&clks VF610_CLK_ADC1>;
584 clock-names = "adc";
Sanchayan Maity9b1793a2015-07-16 20:43:19 +0530585 #io-channel-cells = <1>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100586 status = "disabled";
Sanchayan Maity3fa2f942015-10-18 11:18:48 +0530587 fsl,adck-max-frequency = <30000000>, <40000000>,
588 <20000000>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100589 };
590
Cory Tusar3b7816b2015-07-08 16:51:06 -0400591 esdhc0: esdhc@400b1000 {
592 compatible = "fsl,imx53-esdhc";
593 reg = <0x400b1000 0x1000>;
594 interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
595 clocks = <&clks VF610_CLK_IPG_BUS>,
596 <&clks VF610_CLK_PLATFORM_BUS>,
597 <&clks VF610_CLK_ESDHC0>;
598 clock-names = "ipg", "ahb", "per";
599 status = "disabled";
600 };
601
Stefan Agnerefb45b32014-11-02 21:36:46 +0100602 esdhc1: esdhc@400b2000 {
603 compatible = "fsl,imx53-esdhc";
604 reg = <0x400b2000 0x1000>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100605 interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100606 clocks = <&clks VF610_CLK_IPG_BUS>,
607 <&clks VF610_CLK_PLATFORM_BUS>,
608 <&clks VF610_CLK_ESDHC1>;
609 clock-names = "ipg", "ahb", "per";
610 status = "disabled";
611 };
612
613 usbh1: usb@400b4000 {
614 compatible = "fsl,vf610-usb", "fsl,imx27-usb";
615 reg = <0x400b4000 0x800>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100616 interrupts = <76 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100617 clocks = <&clks VF610_CLK_USBC1>;
618 fsl,usbphy = <&usbphy1>;
619 fsl,usbmisc = <&usbmisc1 0>;
620 dr_mode = "host";
621 status = "disabled";
622 };
623
624 usbmisc1: usb@400b4800 {
625 #index-cells = <1>;
626 compatible = "fsl,vf610-usbmisc";
627 reg = <0x400b4800 0x200>;
628 clocks = <&clks VF610_CLK_USBC1>;
629 status = "disabled";
630 };
631
632 ftm: ftm@400b8000 {
633 compatible = "fsl,ftm-timer";
634 reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100635 interrupts = <44 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100636 clock-names = "ftm-evt", "ftm-src",
637 "ftm-evt-counter-en", "ftm-src-counter-en";
638 clocks = <&clks VF610_CLK_FTM2>,
639 <&clks VF610_CLK_FTM3>,
640 <&clks VF610_CLK_FTM2_EXT_FIX_EN>,
641 <&clks VF610_CLK_FTM3_EXT_FIX_EN>;
642 status = "disabled";
643 };
644
Cory Tusar6f5e6962015-07-08 16:21:16 -0400645 qspi1: quadspi@400c4000 {
646 #address-cells = <1>;
647 #size-cells = <0>;
648 compatible = "fsl,vf610-qspi";
649 reg = <0x400c4000 0x1000>, <0x50000000 0x10000000>;
650 reg-names = "QuadSPI", "QuadSPI-memory";
651 interrupts = <25 IRQ_TYPE_LEVEL_HIGH>;
652 clocks = <&clks VF610_CLK_QSPI1_EN>,
653 <&clks VF610_CLK_QSPI1>;
654 clock-names = "qspi_en", "qspi";
655 status = "disabled";
656 };
657
Sanchayan Maity18e75ad2016-02-22 11:48:36 +0530658 dac0: dac@400cc000 {
659 compatible = "fsl,vf610-dac";
660 reg = <0x400cc000 1000>;
661 interrupts = <55 IRQ_TYPE_LEVEL_HIGH>;
662 clock-names = "dac";
663 clocks = <&clks VF610_CLK_DAC0>;
664 status = "disabled";
665 };
666
667 dac1: dac@400cd000 {
668 compatible = "fsl,vf610-dac";
669 reg = <0x400cd000 1000>;
670 interrupts = <56 IRQ_TYPE_LEVEL_HIGH>;
671 clock-names = "dac";
672 clocks = <&clks VF610_CLK_DAC1>;
673 status = "disabled";
674 };
675
Stefan Agnerefb45b32014-11-02 21:36:46 +0100676 fec0: ethernet@400d0000 {
677 compatible = "fsl,mvf600-fec";
678 reg = <0x400d0000 0x1000>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100679 interrupts = <78 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100680 clocks = <&clks VF610_CLK_ENET0>,
681 <&clks VF610_CLK_ENET0>,
682 <&clks VF610_CLK_ENET>;
683 clock-names = "ipg", "ahb", "ptp";
684 status = "disabled";
685 };
686
687 fec1: ethernet@400d1000 {
688 compatible = "fsl,mvf600-fec";
689 reg = <0x400d1000 0x1000>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100690 interrupts = <79 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100691 clocks = <&clks VF610_CLK_ENET1>,
692 <&clks VF610_CLK_ENET1>,
693 <&clks VF610_CLK_ENET>;
694 clock-names = "ipg", "ahb", "ptp";
695 status = "disabled";
696 };
697
698 can1: flexcan@400d4000 {
699 compatible = "fsl,vf610-flexcan";
700 reg = <0x400d4000 0x4000>;
Stefan Agnerc09d0f72015-03-01 23:41:29 +0100701 interrupts = <59 IRQ_TYPE_LEVEL_HIGH>;
Stefan Agnerefb45b32014-11-02 21:36:46 +0100702 clocks = <&clks VF610_CLK_FLEXCAN1>,
703 <&clks VF610_CLK_FLEXCAN1>;
704 clock-names = "ipg", "per";
705 status = "disabled";
706 };
707
Stefan Agnerbaeeb542015-10-07 16:58:35 -0700708 nfc: nand@400e0000 {
709 #address-cells = <1>;
710 #size-cells = <0>;
711 compatible = "fsl,vf610-nfc";
712 reg = <0x400e0000 0x4000>;
713 interrupts = <83 IRQ_TYPE_LEVEL_HIGH>;
714 clocks = <&clks VF610_CLK_NFC>;
715 clock-names = "nfc";
716 status = "disabled";
717 };
718
Cory Tusar2d4e4a62015-06-14 20:19:59 -0400719 i2c2: i2c@400e6000 {
720 #address-cells = <1>;
721 #size-cells = <0>;
722 compatible = "fsl,vf610-i2c";
723 reg = <0x400e6000 0x1000>;
724 interrupts = <73 IRQ_TYPE_LEVEL_HIGH>;
725 clocks = <&clks VF610_CLK_I2C2>;
726 clock-names = "ipg";
727 dmas = <&edma0 1 36>,
728 <&edma0 1 37>;
729 dma-names = "rx","tx";
730 status = "disabled";
731 };
732
733 i2c3: i2c@400e7000 {
734 #address-cells = <1>;
735 #size-cells = <0>;
736 compatible = "fsl,vf610-i2c";
737 reg = <0x400e7000 0x1000>;
738 interrupts = <74 IRQ_TYPE_LEVEL_HIGH>;
739 clocks = <&clks VF610_CLK_I2C3>;
740 clock-names = "ipg";
741 dmas = <&edma0 1 38>,
742 <&edma0 1 39>;
743 dma-names = "rx","tx";
744 status = "disabled";
745 };
Stefan Agnerefb45b32014-11-02 21:36:46 +0100746 };
Sanchayan Maity0aa8a992016-02-16 10:30:55 +0530747
748 iio-hwmon {
749 compatible = "iio-hwmon";
750 io-channels = <&adc0 16>, <&adc1 16>;
751 };
Stefan Agnerefb45b32014-11-02 21:36:46 +0100752 };
753};