Ohad Ben-Cohen | ab493a0 | 2011-06-02 02:48:05 +0300 | [diff] [blame] | 1 | # IOMMU_API always gets selected by whoever wants it. |
| 2 | config IOMMU_API |
| 3 | bool |
Ohad Ben-Cohen | b10f127 | 2011-06-02 03:20:08 +0300 | [diff] [blame] | 4 | |
Joerg Roedel | 68255b6 | 2011-06-14 15:51:54 +0200 | [diff] [blame] | 5 | menuconfig IOMMU_SUPPORT |
| 6 | bool "IOMMU Hardware Support" |
Arnd Bergmann | e5144c9 | 2015-01-28 15:45:53 +0100 | [diff] [blame] | 7 | depends on MMU |
Joerg Roedel | 68255b6 | 2011-06-14 15:51:54 +0200 | [diff] [blame] | 8 | default y |
| 9 | ---help--- |
| 10 | Say Y here if you want to compile device drivers for IO Memory |
| 11 | Management Units into the kernel. These devices usually allow to |
| 12 | remap DMA requests and/or remap interrupts from other devices on the |
| 13 | system. |
| 14 | |
| 15 | if IOMMU_SUPPORT |
| 16 | |
Will Deacon | fdb1d7b | 2014-11-14 17:16:49 +0000 | [diff] [blame] | 17 | menu "Generic IOMMU Pagetable Support" |
| 18 | |
| 19 | # Selected by the actual pagetable implementations |
| 20 | config IOMMU_IO_PGTABLE |
| 21 | bool |
| 22 | |
Will Deacon | e1d3c0f | 2014-11-14 17:18:23 +0000 | [diff] [blame] | 23 | config IOMMU_IO_PGTABLE_LPAE |
| 24 | bool "ARMv7/v8 Long Descriptor Format" |
| 25 | select IOMMU_IO_PGTABLE |
| 26 | help |
| 27 | Enable support for the ARM long descriptor pagetable format. |
| 28 | This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page |
| 29 | sizes at both stage-1 and stage-2, as well as address spaces |
| 30 | up to 48-bits in size. |
| 31 | |
Will Deacon | fe4b991 | 2014-11-17 23:31:12 +0000 | [diff] [blame] | 32 | config IOMMU_IO_PGTABLE_LPAE_SELFTEST |
| 33 | bool "LPAE selftests" |
| 34 | depends on IOMMU_IO_PGTABLE_LPAE |
| 35 | help |
| 36 | Enable self-tests for LPAE page table allocator. This performs |
| 37 | a series of page-table consistency checks during boot. |
| 38 | |
| 39 | If unsure, say N here. |
| 40 | |
Will Deacon | fdb1d7b | 2014-11-14 17:16:49 +0000 | [diff] [blame] | 41 | endmenu |
| 42 | |
Robin Murphy | 114150d | 2015-01-12 17:51:13 +0000 | [diff] [blame] | 43 | config IOMMU_IOVA |
| 44 | bool |
| 45 | |
Hiroshi Doyu | 4e0ee78 | 2012-06-25 14:23:54 +0300 | [diff] [blame] | 46 | config OF_IOMMU |
| 47 | def_bool y |
Will Deacon | 7eba1d5 | 2014-08-27 16:20:32 +0100 | [diff] [blame] | 48 | depends on OF && IOMMU_API |
Hiroshi Doyu | 4e0ee78 | 2012-06-25 14:23:54 +0300 | [diff] [blame] | 49 | |
Varun Sethi | 695093e | 2013-07-15 10:20:57 +0530 | [diff] [blame] | 50 | config FSL_PAMU |
| 51 | bool "Freescale IOMMU support" |
Joerg Roedel | 477ab7a | 2015-01-20 16:13:33 +0100 | [diff] [blame] | 52 | depends on PPC32 |
| 53 | depends on PPC_E500MC || COMPILE_TEST |
Varun Sethi | 695093e | 2013-07-15 10:20:57 +0530 | [diff] [blame] | 54 | select IOMMU_API |
| 55 | select GENERIC_ALLOCATOR |
| 56 | help |
| 57 | Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms. |
| 58 | PAMU can authorize memory access, remap the memory address, and remap I/O |
| 59 | transaction types. |
| 60 | |
Ohad Ben-Cohen | b10f127 | 2011-06-02 03:20:08 +0300 | [diff] [blame] | 61 | # MSM IOMMU support |
| 62 | config MSM_IOMMU |
| 63 | bool "MSM IOMMU Support" |
Joerg Roedel | 477ab7a | 2015-01-20 16:13:33 +0100 | [diff] [blame] | 64 | depends on ARM |
| 65 | depends on ARCH_MSM8X60 || ARCH_MSM8960 || COMPILE_TEST |
Thierry Reding | a3f447a | 2015-02-06 11:44:08 +0100 | [diff] [blame^] | 66 | depends on BROKEN |
Ohad Ben-Cohen | b10f127 | 2011-06-02 03:20:08 +0300 | [diff] [blame] | 67 | select IOMMU_API |
| 68 | help |
| 69 | Support for the IOMMUs found on certain Qualcomm SOCs. |
| 70 | These IOMMUs allow virtualization of the address space used by most |
| 71 | cores within the multimedia subsystem. |
| 72 | |
| 73 | If unsure, say N here. |
| 74 | |
| 75 | config IOMMU_PGTABLES_L2 |
| 76 | def_bool y |
| 77 | depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n |
Ohad Ben-Cohen | 29b6841 | 2011-06-05 18:22:18 +0300 | [diff] [blame] | 78 | |
| 79 | # AMD IOMMU support |
| 80 | config AMD_IOMMU |
| 81 | bool "AMD IOMMU support" |
| 82 | select SWIOTLB |
| 83 | select PCI_MSI |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 84 | select PCI_ATS |
| 85 | select PCI_PRI |
| 86 | select PCI_PASID |
Ohad Ben-Cohen | 29b6841 | 2011-06-05 18:22:18 +0300 | [diff] [blame] | 87 | select IOMMU_API |
Thomas Petazzoni | 0dbc607 | 2013-10-03 11:59:14 +0200 | [diff] [blame] | 88 | depends on X86_64 && PCI && ACPI |
Ohad Ben-Cohen | 29b6841 | 2011-06-05 18:22:18 +0300 | [diff] [blame] | 89 | ---help--- |
| 90 | With this option you can enable support for AMD IOMMU hardware in |
| 91 | your system. An IOMMU is a hardware component which provides |
| 92 | remapping of DMA memory accesses from devices. With an AMD IOMMU you |
Masanari Iida | 59bf896 | 2012-04-18 00:01:21 +0900 | [diff] [blame] | 93 | can isolate the DMA memory of different devices and protect the |
Ohad Ben-Cohen | 29b6841 | 2011-06-05 18:22:18 +0300 | [diff] [blame] | 94 | system from misbehaving device drivers or hardware. |
| 95 | |
| 96 | You can find out if your system has an AMD IOMMU if you look into |
| 97 | your BIOS for an option to enable it or if you have an IVRS ACPI |
| 98 | table. |
| 99 | |
| 100 | config AMD_IOMMU_STATS |
| 101 | bool "Export AMD IOMMU statistics to debugfs" |
| 102 | depends on AMD_IOMMU |
| 103 | select DEBUG_FS |
| 104 | ---help--- |
| 105 | This option enables code in the AMD IOMMU driver to collect various |
| 106 | statistics about whats happening in the driver and exports that |
| 107 | information to userspace via debugfs. |
| 108 | If unsure, say N. |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 109 | |
Joerg Roedel | e3c495c | 2011-11-09 12:31:15 +0100 | [diff] [blame] | 110 | config AMD_IOMMU_V2 |
Kees Cook | a446e21 | 2013-01-16 18:53:39 -0800 | [diff] [blame] | 111 | tristate "AMD IOMMU Version 2 driver" |
Borislav Petkov | e5cac32 | 2014-07-10 12:44:56 +0200 | [diff] [blame] | 112 | depends on AMD_IOMMU |
Joerg Roedel | 8736b2c | 2011-11-24 16:21:52 +0100 | [diff] [blame] | 113 | select MMU_NOTIFIER |
Joerg Roedel | e3c495c | 2011-11-09 12:31:15 +0100 | [diff] [blame] | 114 | ---help--- |
| 115 | This option enables support for the AMD IOMMUv2 features of the IOMMU |
| 116 | hardware. Select this option if you want to use devices that support |
Masanari Iida | 59bf896 | 2012-04-18 00:01:21 +0900 | [diff] [blame] | 117 | the PCI PRI and PASID interface. |
Joerg Roedel | e3c495c | 2011-11-09 12:31:15 +0100 | [diff] [blame] | 118 | |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 119 | # Intel IOMMU support |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 120 | config DMAR_TABLE |
| 121 | bool |
| 122 | |
| 123 | config INTEL_IOMMU |
| 124 | bool "Support for Intel IOMMU using DMA Remapping Devices" |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 125 | depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC) |
| 126 | select IOMMU_API |
Robin Murphy | 114150d | 2015-01-12 17:51:13 +0000 | [diff] [blame] | 127 | select IOMMU_IOVA |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 128 | select DMAR_TABLE |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 129 | help |
| 130 | DMA remapping (DMAR) devices support enables independent address |
| 131 | translations for Direct Memory Access (DMA) from devices. |
| 132 | These DMA remapping devices are reported via ACPI tables |
| 133 | and include PCI device scope covered by these DMA |
| 134 | remapping devices. |
| 135 | |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 136 | config INTEL_IOMMU_DEFAULT_ON |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 137 | def_bool y |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 138 | prompt "Enable Intel DMA Remapping Devices by default" |
| 139 | depends on INTEL_IOMMU |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 140 | help |
| 141 | Selecting this option will enable a DMAR device at boot time if |
| 142 | one is found. If this option is not selected, DMAR support can |
| 143 | be enabled by passing intel_iommu=on to the kernel. |
| 144 | |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 145 | config INTEL_IOMMU_BROKEN_GFX_WA |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 146 | bool "Workaround broken graphics drivers (going away soon)" |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 147 | depends on INTEL_IOMMU && BROKEN && X86 |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 148 | ---help--- |
| 149 | Current Graphics drivers tend to use physical address |
| 150 | for DMA and avoid using DMA APIs. Setting this config |
| 151 | option permits the IOMMU driver to set a unity map for |
| 152 | all the OS-visible memory. Hence the driver can continue |
| 153 | to use physical addresses for DMA, at least until this |
| 154 | option is removed in the 2.6.32 kernel. |
| 155 | |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 156 | config INTEL_IOMMU_FLOPPY_WA |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 157 | def_bool y |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 158 | depends on INTEL_IOMMU && X86 |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 159 | ---help--- |
| 160 | Floppy disk drivers are known to bypass DMA API calls |
| 161 | thereby failing to work when IOMMU is enabled. This |
| 162 | workaround will setup a 1:1 mapping for the first |
| 163 | 16MiB to make floppy (an ISA device) work. |
| 164 | |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 165 | config IRQ_REMAP |
Kees Cook | a446e21 | 2013-01-16 18:53:39 -0800 | [diff] [blame] | 166 | bool "Support for Interrupt Remapping" |
| 167 | depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 168 | select DMAR_TABLE |
Ohad Ben-Cohen | 166e927 | 2011-06-10 21:42:27 +0300 | [diff] [blame] | 169 | ---help--- |
| 170 | Supports Interrupt remapping for IO-APIC and MSI devices. |
| 171 | To use x2apic mode in the CPU's which support x2APIC enhancements or |
| 172 | to support platforms with CPU's having > 8 bit APIC ID, say Y. |
Joerg Roedel | 68255b6 | 2011-06-14 15:51:54 +0200 | [diff] [blame] | 173 | |
Ohad Ben-Cohen | fcf3a6e | 2011-08-15 23:21:41 +0300 | [diff] [blame] | 174 | # OMAP IOMMU support |
| 175 | config OMAP_IOMMU |
| 176 | bool "OMAP IOMMU Support" |
Joerg Roedel | 477ab7a | 2015-01-20 16:13:33 +0100 | [diff] [blame] | 177 | depends on ARM && MMU |
| 178 | depends on ARCH_OMAP2PLUS || COMPILE_TEST |
Ohad Ben-Cohen | fcf3a6e | 2011-08-15 23:21:41 +0300 | [diff] [blame] | 179 | select IOMMU_API |
| 180 | |
Ohad Ben-Cohen | fcf3a6e | 2011-08-15 23:21:41 +0300 | [diff] [blame] | 181 | config OMAP_IOMMU_DEBUG |
Suman Anna | 61c7535 | 2014-10-22 17:22:30 -0500 | [diff] [blame] | 182 | bool "Export OMAP IOMMU internals in DebugFS" |
| 183 | depends on OMAP_IOMMU && DEBUG_FS |
| 184 | ---help--- |
| 185 | Select this to see extensive information about |
| 186 | the internal state of OMAP IOMMU in debugfs. |
Ohad Ben-Cohen | fcf3a6e | 2011-08-15 23:21:41 +0300 | [diff] [blame] | 187 | |
Suman Anna | 61c7535 | 2014-10-22 17:22:30 -0500 | [diff] [blame] | 188 | Say N unless you know you need this. |
Ohad Ben-Cohen | fcf3a6e | 2011-08-15 23:21:41 +0300 | [diff] [blame] | 189 | |
Daniel Kurtz | c68a292 | 2014-11-03 10:53:27 +0800 | [diff] [blame] | 190 | config ROCKCHIP_IOMMU |
| 191 | bool "Rockchip IOMMU Support" |
Joerg Roedel | 1117588 | 2014-11-03 18:16:56 +0100 | [diff] [blame] | 192 | depends on ARM |
| 193 | depends on ARCH_ROCKCHIP || COMPILE_TEST |
Daniel Kurtz | c68a292 | 2014-11-03 10:53:27 +0800 | [diff] [blame] | 194 | select IOMMU_API |
| 195 | select ARM_DMA_USE_IOMMU |
| 196 | help |
| 197 | Support for IOMMUs found on Rockchip rk32xx SOCs. |
| 198 | These IOMMUs allow virtualization of the address space used by most |
| 199 | cores within the multimedia subsystem. |
| 200 | Say Y here if you are using a Rockchip SoC that includes an IOMMU |
| 201 | device. |
Ohad Ben-Cohen | ab493a0 | 2011-06-02 02:48:05 +0300 | [diff] [blame] | 202 | |
Hiroshi DOYU | d53e54b | 2011-11-16 17:36:37 +0200 | [diff] [blame] | 203 | config TEGRA_IOMMU_GART |
| 204 | bool "Tegra GART IOMMU Support" |
| 205 | depends on ARCH_TEGRA_2x_SOC |
| 206 | select IOMMU_API |
| 207 | help |
| 208 | Enables support for remapping discontiguous physical memory |
| 209 | shared with the operating system into contiguous I/O virtual |
| 210 | space through the GART (Graphics Address Relocation Table) |
| 211 | hardware included on Tegra SoCs. |
| 212 | |
Hiroshi DOYU | 7a31f6f | 2011-11-17 07:31:31 +0200 | [diff] [blame] | 213 | config TEGRA_IOMMU_SMMU |
Thierry Reding | 8918465 | 2014-04-16 09:24:44 +0200 | [diff] [blame] | 214 | bool "NVIDIA Tegra SMMU Support" |
| 215 | depends on ARCH_TEGRA |
| 216 | depends on TEGRA_AHB |
| 217 | depends on TEGRA_MC |
Hiroshi DOYU | 7a31f6f | 2011-11-17 07:31:31 +0200 | [diff] [blame] | 218 | select IOMMU_API |
| 219 | help |
Thierry Reding | 8918465 | 2014-04-16 09:24:44 +0200 | [diff] [blame] | 220 | This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra |
| 221 | SoCs (Tegra30 up to Tegra124). |
Hiroshi DOYU | 7a31f6f | 2011-11-17 07:31:31 +0200 | [diff] [blame] | 222 | |
KyongHo Cho | 2a96536 | 2012-05-12 05:56:09 +0900 | [diff] [blame] | 223 | config EXYNOS_IOMMU |
| 224 | bool "Exynos IOMMU Support" |
Arnd Bergmann | e5144c9 | 2015-01-28 15:45:53 +0100 | [diff] [blame] | 225 | depends on ARCH_EXYNOS && ARM && MMU |
KyongHo Cho | 2a96536 | 2012-05-12 05:56:09 +0900 | [diff] [blame] | 226 | select IOMMU_API |
Tushar Behera | 4802c1d | 2014-07-04 15:01:08 +0530 | [diff] [blame] | 227 | select ARM_DMA_USE_IOMMU |
KyongHo Cho | 2a96536 | 2012-05-12 05:56:09 +0900 | [diff] [blame] | 228 | help |
Sachin Kamat | 5455d70 | 2014-05-22 09:50:55 +0530 | [diff] [blame] | 229 | Support for the IOMMU (System MMU) of Samsung Exynos application |
| 230 | processor family. This enables H/W multimedia accelerators to see |
| 231 | non-linear physical memory chunks as linear memory in their |
| 232 | address space. |
KyongHo Cho | 2a96536 | 2012-05-12 05:56:09 +0900 | [diff] [blame] | 233 | |
| 234 | If unsure, say N here. |
| 235 | |
| 236 | config EXYNOS_IOMMU_DEBUG |
| 237 | bool "Debugging log for Exynos IOMMU" |
| 238 | depends on EXYNOS_IOMMU |
| 239 | help |
| 240 | Select this to see the detailed log message that shows what |
Sachin Kamat | 5455d70 | 2014-05-22 09:50:55 +0530 | [diff] [blame] | 241 | happens in the IOMMU driver. |
KyongHo Cho | 2a96536 | 2012-05-12 05:56:09 +0900 | [diff] [blame] | 242 | |
Sachin Kamat | 5455d70 | 2014-05-22 09:50:55 +0530 | [diff] [blame] | 243 | Say N unless you need kernel log message for IOMMU debugging. |
KyongHo Cho | 2a96536 | 2012-05-12 05:56:09 +0900 | [diff] [blame] | 244 | |
Hideki EIRAKU | c2c460f | 2013-01-21 19:54:26 +0900 | [diff] [blame] | 245 | config SHMOBILE_IPMMU |
| 246 | bool |
| 247 | |
| 248 | config SHMOBILE_IPMMU_TLB |
| 249 | bool |
| 250 | |
| 251 | config SHMOBILE_IOMMU |
| 252 | bool "IOMMU for Renesas IPMMU/IPMMUI" |
| 253 | default n |
Arnd Bergmann | e5144c9 | 2015-01-28 15:45:53 +0100 | [diff] [blame] | 254 | depends on ARM && MMU |
Paul Bolle | b835443 | 2014-02-08 22:21:54 +0100 | [diff] [blame] | 255 | depends on ARCH_SHMOBILE || COMPILE_TEST |
Hideki EIRAKU | c2c460f | 2013-01-21 19:54:26 +0900 | [diff] [blame] | 256 | select IOMMU_API |
| 257 | select ARM_DMA_USE_IOMMU |
| 258 | select SHMOBILE_IPMMU |
| 259 | select SHMOBILE_IPMMU_TLB |
| 260 | help |
| 261 | Support for Renesas IPMMU/IPMMUI. This option enables |
| 262 | remapping of DMA memory accesses from all of the IP blocks |
| 263 | on the ICB. |
| 264 | |
| 265 | Warning: Drivers (including userspace drivers of UIO |
| 266 | devices) of the IP blocks on the ICB *must* use addresses |
| 267 | allocated from the IPMMU (iova) for DMA with this option |
| 268 | enabled. |
| 269 | |
| 270 | If unsure, say N. |
| 271 | |
| 272 | choice |
| 273 | prompt "IPMMU/IPMMUI address space size" |
| 274 | default SHMOBILE_IOMMU_ADDRSIZE_2048MB |
| 275 | depends on SHMOBILE_IOMMU |
| 276 | help |
| 277 | This option sets IPMMU/IPMMUI address space size by |
| 278 | adjusting the 1st level page table size. The page table size |
| 279 | is calculated as follows: |
| 280 | |
| 281 | page table size = number of page table entries * 4 bytes |
| 282 | number of page table entries = address space size / 1 MiB |
| 283 | |
| 284 | For example, when the address space size is 2048 MiB, the |
| 285 | 1st level page table size is 8192 bytes. |
| 286 | |
| 287 | config SHMOBILE_IOMMU_ADDRSIZE_2048MB |
| 288 | bool "2 GiB" |
| 289 | |
| 290 | config SHMOBILE_IOMMU_ADDRSIZE_1024MB |
| 291 | bool "1 GiB" |
| 292 | |
| 293 | config SHMOBILE_IOMMU_ADDRSIZE_512MB |
| 294 | bool "512 MiB" |
| 295 | |
| 296 | config SHMOBILE_IOMMU_ADDRSIZE_256MB |
| 297 | bool "256 MiB" |
| 298 | |
| 299 | config SHMOBILE_IOMMU_ADDRSIZE_128MB |
| 300 | bool "128 MiB" |
| 301 | |
| 302 | config SHMOBILE_IOMMU_ADDRSIZE_64MB |
| 303 | bool "64 MiB" |
| 304 | |
| 305 | config SHMOBILE_IOMMU_ADDRSIZE_32MB |
| 306 | bool "32 MiB" |
| 307 | |
| 308 | endchoice |
| 309 | |
| 310 | config SHMOBILE_IOMMU_L1SIZE |
| 311 | int |
| 312 | default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB |
| 313 | default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB |
| 314 | default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB |
| 315 | default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB |
| 316 | default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB |
| 317 | default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB |
| 318 | default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB |
| 319 | |
Laurent Pinchart | d25a2a1 | 2014-04-02 12:47:37 +0200 | [diff] [blame] | 320 | config IPMMU_VMSA |
| 321 | bool "Renesas VMSA-compatible IPMMU" |
| 322 | depends on ARM_LPAE |
| 323 | depends on ARCH_SHMOBILE || COMPILE_TEST |
| 324 | select IOMMU_API |
Laurent Pinchart | f20ed39 | 2015-01-20 18:30:04 +0200 | [diff] [blame] | 325 | select IOMMU_IO_PGTABLE_LPAE |
Laurent Pinchart | d25a2a1 | 2014-04-02 12:47:37 +0200 | [diff] [blame] | 326 | select ARM_DMA_USE_IOMMU |
| 327 | help |
| 328 | Support for the Renesas VMSA-compatible IPMMU Renesas found in the |
| 329 | R-Mobile APE6 and R-Car H2/M2 SoCs. |
| 330 | |
| 331 | If unsure, say N. |
| 332 | |
Alexey Kardashevskiy | 4e13c1a | 2013-05-21 13:33:09 +1000 | [diff] [blame] | 333 | config SPAPR_TCE_IOMMU |
| 334 | bool "sPAPR TCE IOMMU Support" |
Alexey Kardashevskiy | 5b25199 | 2013-05-21 13:33:11 +1000 | [diff] [blame] | 335 | depends on PPC_POWERNV || PPC_PSERIES |
Alexey Kardashevskiy | 4e13c1a | 2013-05-21 13:33:09 +1000 | [diff] [blame] | 336 | select IOMMU_API |
| 337 | help |
| 338 | Enables bits of IOMMU API required by VFIO. The iommu_ops |
| 339 | is not implemented as it is not necessary for VFIO. |
| 340 | |
Will Deacon | 45ae7cf | 2013-06-24 18:31:25 +0100 | [diff] [blame] | 341 | config ARM_SMMU |
| 342 | bool "ARM Ltd. System MMU (SMMU) Support" |
Joerg Roedel | a20cc76 | 2015-02-04 16:53:44 +0100 | [diff] [blame] | 343 | depends on (ARM64 || ARM) && MMU |
Will Deacon | 45ae7cf | 2013-06-24 18:31:25 +0100 | [diff] [blame] | 344 | select IOMMU_API |
Will Deacon | 518f713 | 2014-11-14 17:17:54 +0000 | [diff] [blame] | 345 | select IOMMU_IO_PGTABLE_LPAE |
Will Deacon | 45ae7cf | 2013-06-24 18:31:25 +0100 | [diff] [blame] | 346 | select ARM_DMA_USE_IOMMU if ARM |
| 347 | help |
| 348 | Support for implementations of the ARM System MMU architecture |
Will Deacon | 518f713 | 2014-11-14 17:17:54 +0000 | [diff] [blame] | 349 | versions 1 and 2. |
Will Deacon | 45ae7cf | 2013-06-24 18:31:25 +0100 | [diff] [blame] | 350 | |
| 351 | Say Y here if your SoC includes an IOMMU device implementing |
| 352 | the ARM SMMU architecture. |
| 353 | |
Ohad Ben-Cohen | ab493a0 | 2011-06-02 02:48:05 +0300 | [diff] [blame] | 354 | endif # IOMMU_SUPPORT |