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Ohad Ben-Cohenab493a02011-06-02 02:48:05 +03001# IOMMU_API always gets selected by whoever wants it.
2config IOMMU_API
3 bool
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +03004
Joerg Roedel68255b62011-06-14 15:51:54 +02005menuconfig IOMMU_SUPPORT
6 bool "IOMMU Hardware Support"
Arnd Bergmanne5144c92015-01-28 15:45:53 +01007 depends on MMU
Joerg Roedel68255b62011-06-14 15:51:54 +02008 default y
9 ---help---
10 Say Y here if you want to compile device drivers for IO Memory
11 Management Units into the kernel. These devices usually allow to
12 remap DMA requests and/or remap interrupts from other devices on the
13 system.
14
15if IOMMU_SUPPORT
16
Will Deaconfdb1d7b2014-11-14 17:16:49 +000017menu "Generic IOMMU Pagetable Support"
18
19# Selected by the actual pagetable implementations
20config IOMMU_IO_PGTABLE
21 bool
22
Will Deacone1d3c0f2014-11-14 17:18:23 +000023config IOMMU_IO_PGTABLE_LPAE
24 bool "ARMv7/v8 Long Descriptor Format"
25 select IOMMU_IO_PGTABLE
26 help
27 Enable support for the ARM long descriptor pagetable format.
28 This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page
29 sizes at both stage-1 and stage-2, as well as address spaces
30 up to 48-bits in size.
31
Will Deaconfe4b9912014-11-17 23:31:12 +000032config IOMMU_IO_PGTABLE_LPAE_SELFTEST
33 bool "LPAE selftests"
34 depends on IOMMU_IO_PGTABLE_LPAE
35 help
36 Enable self-tests for LPAE page table allocator. This performs
37 a series of page-table consistency checks during boot.
38
39 If unsure, say N here.
40
Will Deaconfdb1d7b2014-11-14 17:16:49 +000041endmenu
42
Robin Murphy114150d2015-01-12 17:51:13 +000043config IOMMU_IOVA
44 bool
45
Hiroshi Doyu4e0ee782012-06-25 14:23:54 +030046config OF_IOMMU
47 def_bool y
Will Deacon7eba1d52014-08-27 16:20:32 +010048 depends on OF && IOMMU_API
Hiroshi Doyu4e0ee782012-06-25 14:23:54 +030049
Varun Sethi695093e2013-07-15 10:20:57 +053050config FSL_PAMU
51 bool "Freescale IOMMU support"
Joerg Roedel477ab7a2015-01-20 16:13:33 +010052 depends on PPC32
53 depends on PPC_E500MC || COMPILE_TEST
Varun Sethi695093e2013-07-15 10:20:57 +053054 select IOMMU_API
55 select GENERIC_ALLOCATOR
56 help
57 Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms.
58 PAMU can authorize memory access, remap the memory address, and remap I/O
59 transaction types.
60
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030061# MSM IOMMU support
62config MSM_IOMMU
63 bool "MSM IOMMU Support"
Joerg Roedel477ab7a2015-01-20 16:13:33 +010064 depends on ARM
65 depends on ARCH_MSM8X60 || ARCH_MSM8960 || COMPILE_TEST
Thierry Redinga3f447a2015-02-06 11:44:08 +010066 depends on BROKEN
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030067 select IOMMU_API
68 help
69 Support for the IOMMUs found on certain Qualcomm SOCs.
70 These IOMMUs allow virtualization of the address space used by most
71 cores within the multimedia subsystem.
72
73 If unsure, say N here.
74
75config IOMMU_PGTABLES_L2
76 def_bool y
77 depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030078
79# AMD IOMMU support
80config AMD_IOMMU
81 bool "AMD IOMMU support"
82 select SWIOTLB
83 select PCI_MSI
Joerg Roedel52815b72011-11-17 17:24:28 +010084 select PCI_ATS
85 select PCI_PRI
86 select PCI_PASID
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030087 select IOMMU_API
Thomas Petazzoni0dbc6072013-10-03 11:59:14 +020088 depends on X86_64 && PCI && ACPI
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030089 ---help---
90 With this option you can enable support for AMD IOMMU hardware in
91 your system. An IOMMU is a hardware component which provides
92 remapping of DMA memory accesses from devices. With an AMD IOMMU you
Masanari Iida59bf8962012-04-18 00:01:21 +090093 can isolate the DMA memory of different devices and protect the
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030094 system from misbehaving device drivers or hardware.
95
96 You can find out if your system has an AMD IOMMU if you look into
97 your BIOS for an option to enable it or if you have an IVRS ACPI
98 table.
99
100config AMD_IOMMU_STATS
101 bool "Export AMD IOMMU statistics to debugfs"
102 depends on AMD_IOMMU
103 select DEBUG_FS
104 ---help---
105 This option enables code in the AMD IOMMU driver to collect various
106 statistics about whats happening in the driver and exports that
107 information to userspace via debugfs.
108 If unsure, say N.
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300109
Joerg Roedele3c495c2011-11-09 12:31:15 +0100110config AMD_IOMMU_V2
Kees Cooka446e212013-01-16 18:53:39 -0800111 tristate "AMD IOMMU Version 2 driver"
Borislav Petkove5cac322014-07-10 12:44:56 +0200112 depends on AMD_IOMMU
Joerg Roedel8736b2c2011-11-24 16:21:52 +0100113 select MMU_NOTIFIER
Joerg Roedele3c495c2011-11-09 12:31:15 +0100114 ---help---
115 This option enables support for the AMD IOMMUv2 features of the IOMMU
116 hardware. Select this option if you want to use devices that support
Masanari Iida59bf8962012-04-18 00:01:21 +0900117 the PCI PRI and PASID interface.
Joerg Roedele3c495c2011-11-09 12:31:15 +0100118
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300119# Intel IOMMU support
Suresh Siddhad3f13812011-08-23 17:05:25 -0700120config DMAR_TABLE
121 bool
122
123config INTEL_IOMMU
124 bool "Support for Intel IOMMU using DMA Remapping Devices"
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300125 depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)
126 select IOMMU_API
Robin Murphy114150d2015-01-12 17:51:13 +0000127 select IOMMU_IOVA
Suresh Siddhad3f13812011-08-23 17:05:25 -0700128 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300129 help
130 DMA remapping (DMAR) devices support enables independent address
131 translations for Direct Memory Access (DMA) from devices.
132 These DMA remapping devices are reported via ACPI tables
133 and include PCI device scope covered by these DMA
134 remapping devices.
135
Suresh Siddhad3f13812011-08-23 17:05:25 -0700136config INTEL_IOMMU_DEFAULT_ON
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300137 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700138 prompt "Enable Intel DMA Remapping Devices by default"
139 depends on INTEL_IOMMU
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300140 help
141 Selecting this option will enable a DMAR device at boot time if
142 one is found. If this option is not selected, DMAR support can
143 be enabled by passing intel_iommu=on to the kernel.
144
Suresh Siddhad3f13812011-08-23 17:05:25 -0700145config INTEL_IOMMU_BROKEN_GFX_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300146 bool "Workaround broken graphics drivers (going away soon)"
Suresh Siddhad3f13812011-08-23 17:05:25 -0700147 depends on INTEL_IOMMU && BROKEN && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300148 ---help---
149 Current Graphics drivers tend to use physical address
150 for DMA and avoid using DMA APIs. Setting this config
151 option permits the IOMMU driver to set a unity map for
152 all the OS-visible memory. Hence the driver can continue
153 to use physical addresses for DMA, at least until this
154 option is removed in the 2.6.32 kernel.
155
Suresh Siddhad3f13812011-08-23 17:05:25 -0700156config INTEL_IOMMU_FLOPPY_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300157 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700158 depends on INTEL_IOMMU && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300159 ---help---
160 Floppy disk drivers are known to bypass DMA API calls
161 thereby failing to work when IOMMU is enabled. This
162 workaround will setup a 1:1 mapping for the first
163 16MiB to make floppy (an ISA device) work.
164
Suresh Siddhad3f13812011-08-23 17:05:25 -0700165config IRQ_REMAP
Kees Cooka446e212013-01-16 18:53:39 -0800166 bool "Support for Interrupt Remapping"
167 depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI
Suresh Siddhad3f13812011-08-23 17:05:25 -0700168 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300169 ---help---
170 Supports Interrupt remapping for IO-APIC and MSI devices.
171 To use x2apic mode in the CPU's which support x2APIC enhancements or
172 to support platforms with CPU's having > 8 bit APIC ID, say Y.
Joerg Roedel68255b62011-06-14 15:51:54 +0200173
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300174# OMAP IOMMU support
175config OMAP_IOMMU
176 bool "OMAP IOMMU Support"
Joerg Roedel477ab7a2015-01-20 16:13:33 +0100177 depends on ARM && MMU
178 depends on ARCH_OMAP2PLUS || COMPILE_TEST
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300179 select IOMMU_API
180
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300181config OMAP_IOMMU_DEBUG
Suman Anna61c75352014-10-22 17:22:30 -0500182 bool "Export OMAP IOMMU internals in DebugFS"
183 depends on OMAP_IOMMU && DEBUG_FS
184 ---help---
185 Select this to see extensive information about
186 the internal state of OMAP IOMMU in debugfs.
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300187
Suman Anna61c75352014-10-22 17:22:30 -0500188 Say N unless you know you need this.
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300189
Daniel Kurtzc68a2922014-11-03 10:53:27 +0800190config ROCKCHIP_IOMMU
191 bool "Rockchip IOMMU Support"
Joerg Roedel11175882014-11-03 18:16:56 +0100192 depends on ARM
193 depends on ARCH_ROCKCHIP || COMPILE_TEST
Daniel Kurtzc68a2922014-11-03 10:53:27 +0800194 select IOMMU_API
195 select ARM_DMA_USE_IOMMU
196 help
197 Support for IOMMUs found on Rockchip rk32xx SOCs.
198 These IOMMUs allow virtualization of the address space used by most
199 cores within the multimedia subsystem.
200 Say Y here if you are using a Rockchip SoC that includes an IOMMU
201 device.
Ohad Ben-Cohenab493a02011-06-02 02:48:05 +0300202
Hiroshi DOYUd53e54b2011-11-16 17:36:37 +0200203config TEGRA_IOMMU_GART
204 bool "Tegra GART IOMMU Support"
205 depends on ARCH_TEGRA_2x_SOC
206 select IOMMU_API
207 help
208 Enables support for remapping discontiguous physical memory
209 shared with the operating system into contiguous I/O virtual
210 space through the GART (Graphics Address Relocation Table)
211 hardware included on Tegra SoCs.
212
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200213config TEGRA_IOMMU_SMMU
Thierry Reding89184652014-04-16 09:24:44 +0200214 bool "NVIDIA Tegra SMMU Support"
215 depends on ARCH_TEGRA
216 depends on TEGRA_AHB
217 depends on TEGRA_MC
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200218 select IOMMU_API
219 help
Thierry Reding89184652014-04-16 09:24:44 +0200220 This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra
221 SoCs (Tegra30 up to Tegra124).
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200222
KyongHo Cho2a965362012-05-12 05:56:09 +0900223config EXYNOS_IOMMU
224 bool "Exynos IOMMU Support"
Arnd Bergmanne5144c92015-01-28 15:45:53 +0100225 depends on ARCH_EXYNOS && ARM && MMU
KyongHo Cho2a965362012-05-12 05:56:09 +0900226 select IOMMU_API
Tushar Behera4802c1d2014-07-04 15:01:08 +0530227 select ARM_DMA_USE_IOMMU
KyongHo Cho2a965362012-05-12 05:56:09 +0900228 help
Sachin Kamat5455d702014-05-22 09:50:55 +0530229 Support for the IOMMU (System MMU) of Samsung Exynos application
230 processor family. This enables H/W multimedia accelerators to see
231 non-linear physical memory chunks as linear memory in their
232 address space.
KyongHo Cho2a965362012-05-12 05:56:09 +0900233
234 If unsure, say N here.
235
236config EXYNOS_IOMMU_DEBUG
237 bool "Debugging log for Exynos IOMMU"
238 depends on EXYNOS_IOMMU
239 help
240 Select this to see the detailed log message that shows what
Sachin Kamat5455d702014-05-22 09:50:55 +0530241 happens in the IOMMU driver.
KyongHo Cho2a965362012-05-12 05:56:09 +0900242
Sachin Kamat5455d702014-05-22 09:50:55 +0530243 Say N unless you need kernel log message for IOMMU debugging.
KyongHo Cho2a965362012-05-12 05:56:09 +0900244
Hideki EIRAKUc2c460f2013-01-21 19:54:26 +0900245config SHMOBILE_IPMMU
246 bool
247
248config SHMOBILE_IPMMU_TLB
249 bool
250
251config SHMOBILE_IOMMU
252 bool "IOMMU for Renesas IPMMU/IPMMUI"
253 default n
Arnd Bergmanne5144c92015-01-28 15:45:53 +0100254 depends on ARM && MMU
Paul Bolleb8354432014-02-08 22:21:54 +0100255 depends on ARCH_SHMOBILE || COMPILE_TEST
Hideki EIRAKUc2c460f2013-01-21 19:54:26 +0900256 select IOMMU_API
257 select ARM_DMA_USE_IOMMU
258 select SHMOBILE_IPMMU
259 select SHMOBILE_IPMMU_TLB
260 help
261 Support for Renesas IPMMU/IPMMUI. This option enables
262 remapping of DMA memory accesses from all of the IP blocks
263 on the ICB.
264
265 Warning: Drivers (including userspace drivers of UIO
266 devices) of the IP blocks on the ICB *must* use addresses
267 allocated from the IPMMU (iova) for DMA with this option
268 enabled.
269
270 If unsure, say N.
271
272choice
273 prompt "IPMMU/IPMMUI address space size"
274 default SHMOBILE_IOMMU_ADDRSIZE_2048MB
275 depends on SHMOBILE_IOMMU
276 help
277 This option sets IPMMU/IPMMUI address space size by
278 adjusting the 1st level page table size. The page table size
279 is calculated as follows:
280
281 page table size = number of page table entries * 4 bytes
282 number of page table entries = address space size / 1 MiB
283
284 For example, when the address space size is 2048 MiB, the
285 1st level page table size is 8192 bytes.
286
287 config SHMOBILE_IOMMU_ADDRSIZE_2048MB
288 bool "2 GiB"
289
290 config SHMOBILE_IOMMU_ADDRSIZE_1024MB
291 bool "1 GiB"
292
293 config SHMOBILE_IOMMU_ADDRSIZE_512MB
294 bool "512 MiB"
295
296 config SHMOBILE_IOMMU_ADDRSIZE_256MB
297 bool "256 MiB"
298
299 config SHMOBILE_IOMMU_ADDRSIZE_128MB
300 bool "128 MiB"
301
302 config SHMOBILE_IOMMU_ADDRSIZE_64MB
303 bool "64 MiB"
304
305 config SHMOBILE_IOMMU_ADDRSIZE_32MB
306 bool "32 MiB"
307
308endchoice
309
310config SHMOBILE_IOMMU_L1SIZE
311 int
312 default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB
313 default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB
314 default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB
315 default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB
316 default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB
317 default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB
318 default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB
319
Laurent Pinchartd25a2a12014-04-02 12:47:37 +0200320config IPMMU_VMSA
321 bool "Renesas VMSA-compatible IPMMU"
322 depends on ARM_LPAE
323 depends on ARCH_SHMOBILE || COMPILE_TEST
324 select IOMMU_API
Laurent Pinchartf20ed392015-01-20 18:30:04 +0200325 select IOMMU_IO_PGTABLE_LPAE
Laurent Pinchartd25a2a12014-04-02 12:47:37 +0200326 select ARM_DMA_USE_IOMMU
327 help
328 Support for the Renesas VMSA-compatible IPMMU Renesas found in the
329 R-Mobile APE6 and R-Car H2/M2 SoCs.
330
331 If unsure, say N.
332
Alexey Kardashevskiy4e13c1a2013-05-21 13:33:09 +1000333config SPAPR_TCE_IOMMU
334 bool "sPAPR TCE IOMMU Support"
Alexey Kardashevskiy5b251992013-05-21 13:33:11 +1000335 depends on PPC_POWERNV || PPC_PSERIES
Alexey Kardashevskiy4e13c1a2013-05-21 13:33:09 +1000336 select IOMMU_API
337 help
338 Enables bits of IOMMU API required by VFIO. The iommu_ops
339 is not implemented as it is not necessary for VFIO.
340
Will Deacon45ae7cf2013-06-24 18:31:25 +0100341config ARM_SMMU
342 bool "ARM Ltd. System MMU (SMMU) Support"
Joerg Roedela20cc762015-02-04 16:53:44 +0100343 depends on (ARM64 || ARM) && MMU
Will Deacon45ae7cf2013-06-24 18:31:25 +0100344 select IOMMU_API
Will Deacon518f7132014-11-14 17:17:54 +0000345 select IOMMU_IO_PGTABLE_LPAE
Will Deacon45ae7cf2013-06-24 18:31:25 +0100346 select ARM_DMA_USE_IOMMU if ARM
347 help
348 Support for implementations of the ARM System MMU architecture
Will Deacon518f7132014-11-14 17:17:54 +0000349 versions 1 and 2.
Will Deacon45ae7cf2013-06-24 18:31:25 +0100350
351 Say Y here if your SoC includes an IOMMU device implementing
352 the ARM SMMU architecture.
353
Ohad Ben-Cohenab493a02011-06-02 02:48:05 +0300354endif # IOMMU_SUPPORT