Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of version 2 of the GNU General Public License as |
| 6 | * published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, but |
| 9 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 11 | * General Public License for more details. |
| 12 | */ |
| 13 | #include <linux/list_sort.h> |
| 14 | #include <linux/libnvdimm.h> |
| 15 | #include <linux/module.h> |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 16 | #include <linux/mutex.h> |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 17 | #include <linux/ndctl.h> |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 18 | #include <linux/sysfs.h> |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 19 | #include <linux/delay.h> |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 20 | #include <linux/list.h> |
| 21 | #include <linux/acpi.h> |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 22 | #include <linux/sort.h> |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 23 | #include <linux/io.h> |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 24 | #include <linux/nd.h> |
Dan Williams | 96601ad | 2015-08-24 18:29:38 -0400 | [diff] [blame] | 25 | #include <asm/cacheflush.h> |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 26 | #include "nfit.h" |
| 27 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 28 | /* |
| 29 | * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is |
| 30 | * irrelevant. |
| 31 | */ |
Christoph Hellwig | 2f8e2c8 | 2015-08-28 09:27:14 +0200 | [diff] [blame] | 32 | #include <linux/io-64-nonatomic-hi-lo.h> |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 33 | |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 34 | static bool force_enable_dimms; |
| 35 | module_param(force_enable_dimms, bool, S_IRUGO|S_IWUSR); |
| 36 | MODULE_PARM_DESC(force_enable_dimms, "Ignore _STA (ACPI DIMM device) status"); |
| 37 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 38 | static unsigned int scrub_timeout = NFIT_ARS_TIMEOUT; |
| 39 | module_param(scrub_timeout, uint, S_IRUGO|S_IWUSR); |
| 40 | MODULE_PARM_DESC(scrub_timeout, "Initial scrub timeout in seconds"); |
| 41 | |
| 42 | /* after three payloads of overflow, it's dead jim */ |
| 43 | static unsigned int scrub_overflow_abort = 3; |
| 44 | module_param(scrub_overflow_abort, uint, S_IRUGO|S_IWUSR); |
| 45 | MODULE_PARM_DESC(scrub_overflow_abort, |
| 46 | "Number of times we overflow ARS results before abort"); |
| 47 | |
Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 48 | static bool disable_vendor_specific; |
| 49 | module_param(disable_vendor_specific, bool, S_IRUGO); |
| 50 | MODULE_PARM_DESC(disable_vendor_specific, |
Linda Knippers | f2668fa | 2017-03-07 16:35:14 -0500 | [diff] [blame] | 51 | "Limit commands to the publicly specified set"); |
Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 52 | |
Linda Knippers | 095ab4b | 2017-03-07 16:35:12 -0500 | [diff] [blame] | 53 | static unsigned long override_dsm_mask; |
| 54 | module_param(override_dsm_mask, ulong, S_IRUGO); |
| 55 | MODULE_PARM_DESC(override_dsm_mask, "Bitmask of allowed NVDIMM DSM functions"); |
| 56 | |
Linda Knippers | ba650cf | 2017-03-07 16:35:13 -0500 | [diff] [blame] | 57 | static int default_dsm_family = -1; |
| 58 | module_param(default_dsm_family, int, S_IRUGO); |
| 59 | MODULE_PARM_DESC(default_dsm_family, |
| 60 | "Try this DSM type first when identifying NVDIMM family"); |
| 61 | |
Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 62 | LIST_HEAD(acpi_descs); |
| 63 | DEFINE_MUTEX(acpi_desc_lock); |
| 64 | |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 65 | static struct workqueue_struct *nfit_wq; |
| 66 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 67 | struct nfit_table_prev { |
| 68 | struct list_head spas; |
| 69 | struct list_head memdevs; |
| 70 | struct list_head dcrs; |
| 71 | struct list_head bdws; |
| 72 | struct list_head idts; |
| 73 | struct list_head flushes; |
| 74 | }; |
| 75 | |
Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 76 | static guid_t nfit_uuid[NFIT_UUID_MAX]; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 77 | |
Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 78 | const guid_t *to_nfit_uuid(enum nfit_uuids id) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 79 | { |
Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 80 | return &nfit_uuid[id]; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 81 | } |
Dan Williams | 6bc7561 | 2015-06-17 17:23:32 -0400 | [diff] [blame] | 82 | EXPORT_SYMBOL(to_nfit_uuid); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 83 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 84 | static struct acpi_nfit_desc *to_acpi_nfit_desc( |
| 85 | struct nvdimm_bus_descriptor *nd_desc) |
| 86 | { |
| 87 | return container_of(nd_desc, struct acpi_nfit_desc, nd_desc); |
| 88 | } |
| 89 | |
| 90 | static struct acpi_device *to_acpi_dev(struct acpi_nfit_desc *acpi_desc) |
| 91 | { |
| 92 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| 93 | |
| 94 | /* |
| 95 | * If provider == 'ACPI.NFIT' we can assume 'dev' is a struct |
| 96 | * acpi_device. |
| 97 | */ |
| 98 | if (!nd_desc->provider_name |
| 99 | || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0) |
| 100 | return NULL; |
| 101 | |
| 102 | return to_acpi_device(acpi_desc->dev); |
| 103 | } |
| 104 | |
Dan Williams | d6eb270 | 2016-12-06 15:06:55 -0800 | [diff] [blame] | 105 | static int xlat_bus_status(void *buf, unsigned int cmd, u32 status) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 106 | { |
Dan Williams | d4f3236 | 2016-03-03 16:08:54 -0800 | [diff] [blame] | 107 | struct nd_cmd_clear_error *clear_err; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 108 | struct nd_cmd_ars_status *ars_status; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 109 | u16 flags; |
| 110 | |
| 111 | switch (cmd) { |
| 112 | case ND_CMD_ARS_CAP: |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 113 | if ((status & 0xffff) == NFIT_ARS_CAP_NONE) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 114 | return -ENOTTY; |
| 115 | |
| 116 | /* Command failed */ |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 117 | if (status & 0xffff) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 118 | return -EIO; |
| 119 | |
| 120 | /* No supported scan types for this range */ |
| 121 | flags = ND_ARS_PERSISTENT | ND_ARS_VOLATILE; |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 122 | if ((status >> 16 & flags) == 0) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 123 | return -ENOTTY; |
Vishal Verma | 9a901f5 | 2016-12-05 17:00:37 -0700 | [diff] [blame] | 124 | return 0; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 125 | case ND_CMD_ARS_START: |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 126 | /* ARS is in progress */ |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 127 | if ((status & 0xffff) == NFIT_ARS_START_BUSY) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 128 | return -EBUSY; |
| 129 | |
| 130 | /* Command failed */ |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 131 | if (status & 0xffff) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 132 | return -EIO; |
Vishal Verma | 9a901f5 | 2016-12-05 17:00:37 -0700 | [diff] [blame] | 133 | return 0; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 134 | case ND_CMD_ARS_STATUS: |
| 135 | ars_status = buf; |
| 136 | /* Command failed */ |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 137 | if (status & 0xffff) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 138 | return -EIO; |
| 139 | /* Check extended status (Upper two bytes) */ |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 140 | if (status == NFIT_ARS_STATUS_DONE) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 141 | return 0; |
| 142 | |
| 143 | /* ARS is in progress */ |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 144 | if (status == NFIT_ARS_STATUS_BUSY) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 145 | return -EBUSY; |
| 146 | |
| 147 | /* No ARS performed for the current boot */ |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 148 | if (status == NFIT_ARS_STATUS_NONE) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 149 | return -EAGAIN; |
| 150 | |
| 151 | /* |
| 152 | * ARS interrupted, either we overflowed or some other |
| 153 | * agent wants the scan to stop. If we didn't overflow |
| 154 | * then just continue with the returned results. |
| 155 | */ |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 156 | if (status == NFIT_ARS_STATUS_INTR) { |
Dan Williams | 82aa37c | 2016-12-06 12:45:24 -0800 | [diff] [blame] | 157 | if (ars_status->out_length >= 40 && (ars_status->flags |
| 158 | & NFIT_ARS_F_OVERFLOW)) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 159 | return -ENOSPC; |
| 160 | return 0; |
| 161 | } |
| 162 | |
| 163 | /* Unknown status */ |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 164 | if (status >> 16) |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 165 | return -EIO; |
Vishal Verma | 9a901f5 | 2016-12-05 17:00:37 -0700 | [diff] [blame] | 166 | return 0; |
Dan Williams | d4f3236 | 2016-03-03 16:08:54 -0800 | [diff] [blame] | 167 | case ND_CMD_CLEAR_ERROR: |
| 168 | clear_err = buf; |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 169 | if (status & 0xffff) |
Dan Williams | d4f3236 | 2016-03-03 16:08:54 -0800 | [diff] [blame] | 170 | return -EIO; |
| 171 | if (!clear_err->cleared) |
| 172 | return -EIO; |
| 173 | if (clear_err->length > clear_err->cleared) |
| 174 | return clear_err->cleared; |
Vishal Verma | 9a901f5 | 2016-12-05 17:00:37 -0700 | [diff] [blame] | 175 | return 0; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 176 | default: |
| 177 | break; |
| 178 | } |
| 179 | |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 180 | /* all other non-zero status results in an error */ |
| 181 | if (status) |
| 182 | return -EIO; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 183 | return 0; |
| 184 | } |
| 185 | |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 186 | #define ACPI_LABELS_LOCKED 3 |
| 187 | |
| 188 | static int xlat_nvdimm_status(struct nvdimm *nvdimm, void *buf, unsigned int cmd, |
| 189 | u32 status) |
Dan Williams | 9d62ed9 | 2017-05-04 11:47:22 -0700 | [diff] [blame] | 190 | { |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 191 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 192 | |
Dan Williams | 9d62ed9 | 2017-05-04 11:47:22 -0700 | [diff] [blame] | 193 | switch (cmd) { |
| 194 | case ND_CMD_GET_CONFIG_SIZE: |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 195 | /* |
| 196 | * In the _LSI, _LSR, _LSW case the locked status is |
| 197 | * communicated via the read/write commands |
| 198 | */ |
| 199 | if (nfit_mem->has_lsi) |
| 200 | break; |
| 201 | |
Dan Williams | 9d62ed9 | 2017-05-04 11:47:22 -0700 | [diff] [blame] | 202 | if (status >> 16 & ND_CONFIG_LOCKED) |
| 203 | return -EACCES; |
| 204 | break; |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 205 | case ND_CMD_GET_CONFIG_DATA: |
| 206 | if (nfit_mem->has_lsr && status == ACPI_LABELS_LOCKED) |
| 207 | return -EACCES; |
| 208 | break; |
| 209 | case ND_CMD_SET_CONFIG_DATA: |
| 210 | if (nfit_mem->has_lsw && status == ACPI_LABELS_LOCKED) |
| 211 | return -EACCES; |
| 212 | break; |
Dan Williams | 9d62ed9 | 2017-05-04 11:47:22 -0700 | [diff] [blame] | 213 | default: |
| 214 | break; |
| 215 | } |
| 216 | |
| 217 | /* all other non-zero status results in an error */ |
| 218 | if (status) |
| 219 | return -EIO; |
| 220 | return 0; |
| 221 | } |
| 222 | |
Dan Williams | d6eb270 | 2016-12-06 15:06:55 -0800 | [diff] [blame] | 223 | static int xlat_status(struct nvdimm *nvdimm, void *buf, unsigned int cmd, |
| 224 | u32 status) |
| 225 | { |
| 226 | if (!nvdimm) |
| 227 | return xlat_bus_status(buf, cmd, status); |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 228 | return xlat_nvdimm_status(nvdimm, buf, cmd, status); |
| 229 | } |
| 230 | |
| 231 | /* convert _LS{I,R} packages to the buffer object acpi_nfit_ctl expects */ |
| 232 | static union acpi_object *pkg_to_buf(union acpi_object *pkg) |
| 233 | { |
| 234 | int i; |
| 235 | void *dst; |
| 236 | size_t size = 0; |
| 237 | union acpi_object *buf = NULL; |
| 238 | |
| 239 | if (pkg->type != ACPI_TYPE_PACKAGE) { |
| 240 | WARN_ONCE(1, "BIOS bug, unexpected element type: %d\n", |
| 241 | pkg->type); |
| 242 | goto err; |
| 243 | } |
| 244 | |
| 245 | for (i = 0; i < pkg->package.count; i++) { |
| 246 | union acpi_object *obj = &pkg->package.elements[i]; |
| 247 | |
| 248 | if (obj->type == ACPI_TYPE_INTEGER) |
| 249 | size += 4; |
| 250 | else if (obj->type == ACPI_TYPE_BUFFER) |
| 251 | size += obj->buffer.length; |
| 252 | else { |
| 253 | WARN_ONCE(1, "BIOS bug, unexpected element type: %d\n", |
| 254 | obj->type); |
| 255 | goto err; |
| 256 | } |
| 257 | } |
| 258 | |
| 259 | buf = ACPI_ALLOCATE(sizeof(*buf) + size); |
| 260 | if (!buf) |
| 261 | goto err; |
| 262 | |
| 263 | dst = buf + 1; |
| 264 | buf->type = ACPI_TYPE_BUFFER; |
| 265 | buf->buffer.length = size; |
| 266 | buf->buffer.pointer = dst; |
| 267 | for (i = 0; i < pkg->package.count; i++) { |
| 268 | union acpi_object *obj = &pkg->package.elements[i]; |
| 269 | |
| 270 | if (obj->type == ACPI_TYPE_INTEGER) { |
| 271 | memcpy(dst, &obj->integer.value, 4); |
| 272 | dst += 4; |
| 273 | } else if (obj->type == ACPI_TYPE_BUFFER) { |
| 274 | memcpy(dst, obj->buffer.pointer, obj->buffer.length); |
| 275 | dst += obj->buffer.length; |
| 276 | } |
| 277 | } |
| 278 | err: |
| 279 | ACPI_FREE(pkg); |
| 280 | return buf; |
| 281 | } |
| 282 | |
| 283 | static union acpi_object *int_to_buf(union acpi_object *integer) |
| 284 | { |
| 285 | union acpi_object *buf = ACPI_ALLOCATE(sizeof(*buf) + 4); |
| 286 | void *dst = NULL; |
| 287 | |
| 288 | if (!buf) |
| 289 | goto err; |
| 290 | |
| 291 | if (integer->type != ACPI_TYPE_INTEGER) { |
| 292 | WARN_ONCE(1, "BIOS bug, unexpected element type: %d\n", |
| 293 | integer->type); |
| 294 | goto err; |
| 295 | } |
| 296 | |
| 297 | dst = buf + 1; |
| 298 | buf->type = ACPI_TYPE_BUFFER; |
| 299 | buf->buffer.length = 4; |
| 300 | buf->buffer.pointer = dst; |
| 301 | memcpy(dst, &integer->integer.value, 4); |
| 302 | err: |
| 303 | ACPI_FREE(integer); |
| 304 | return buf; |
| 305 | } |
| 306 | |
| 307 | static union acpi_object *acpi_label_write(acpi_handle handle, u32 offset, |
| 308 | u32 len, void *data) |
| 309 | { |
| 310 | acpi_status rc; |
| 311 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
| 312 | struct acpi_object_list input = { |
| 313 | .count = 3, |
| 314 | .pointer = (union acpi_object []) { |
| 315 | [0] = { |
| 316 | .integer.type = ACPI_TYPE_INTEGER, |
| 317 | .integer.value = offset, |
| 318 | }, |
| 319 | [1] = { |
| 320 | .integer.type = ACPI_TYPE_INTEGER, |
| 321 | .integer.value = len, |
| 322 | }, |
| 323 | [2] = { |
| 324 | .buffer.type = ACPI_TYPE_BUFFER, |
| 325 | .buffer.pointer = data, |
| 326 | .buffer.length = len, |
| 327 | }, |
| 328 | }, |
| 329 | }; |
| 330 | |
| 331 | rc = acpi_evaluate_object(handle, "_LSW", &input, &buf); |
| 332 | if (ACPI_FAILURE(rc)) |
| 333 | return NULL; |
| 334 | return int_to_buf(buf.pointer); |
| 335 | } |
| 336 | |
| 337 | static union acpi_object *acpi_label_read(acpi_handle handle, u32 offset, |
| 338 | u32 len) |
| 339 | { |
| 340 | acpi_status rc; |
| 341 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
| 342 | struct acpi_object_list input = { |
| 343 | .count = 2, |
| 344 | .pointer = (union acpi_object []) { |
| 345 | [0] = { |
| 346 | .integer.type = ACPI_TYPE_INTEGER, |
| 347 | .integer.value = offset, |
| 348 | }, |
| 349 | [1] = { |
| 350 | .integer.type = ACPI_TYPE_INTEGER, |
| 351 | .integer.value = len, |
| 352 | }, |
| 353 | }, |
| 354 | }; |
| 355 | |
| 356 | rc = acpi_evaluate_object(handle, "_LSR", &input, &buf); |
| 357 | if (ACPI_FAILURE(rc)) |
| 358 | return NULL; |
| 359 | return pkg_to_buf(buf.pointer); |
| 360 | } |
| 361 | |
| 362 | static union acpi_object *acpi_label_info(acpi_handle handle) |
| 363 | { |
| 364 | acpi_status rc; |
| 365 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
| 366 | |
| 367 | rc = acpi_evaluate_object(handle, "_LSI", NULL, &buf); |
| 368 | if (ACPI_FAILURE(rc)) |
| 369 | return NULL; |
| 370 | return pkg_to_buf(buf.pointer); |
Dan Williams | d6eb270 | 2016-12-06 15:06:55 -0800 | [diff] [blame] | 371 | } |
| 372 | |
Dan Williams | a7de92d | 2016-12-05 13:43:25 -0800 | [diff] [blame] | 373 | int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm, |
| 374 | unsigned int cmd, void *buf, unsigned int buf_len, int *cmd_rc) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 375 | { |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 376 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 377 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 378 | union acpi_object in_obj, in_buf, *out_obj; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 379 | const struct nd_cmd_desc *desc = NULL; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 380 | struct device *dev = acpi_desc->dev; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 381 | struct nd_cmd_pkg *call_pkg = NULL; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 382 | const char *cmd_name, *dimm_name; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 383 | unsigned long cmd_mask, dsm_mask; |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 384 | u32 offset, fw_status = 0; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 385 | acpi_handle handle; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 386 | unsigned int func; |
Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 387 | const guid_t *guid; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 388 | int rc, i; |
| 389 | |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 390 | func = cmd; |
| 391 | if (cmd == ND_CMD_CALL) { |
| 392 | call_pkg = buf; |
| 393 | func = call_pkg->nd_command; |
Meng Xu | 9edcad5 | 2017-09-04 11:34:33 -0400 | [diff] [blame] | 394 | |
| 395 | for (i = 0; i < ARRAY_SIZE(call_pkg->nd_reserved2); i++) |
| 396 | if (call_pkg->nd_reserved2[i]) |
| 397 | return -EINVAL; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 398 | } |
| 399 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 400 | if (nvdimm) { |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 401 | struct acpi_device *adev = nfit_mem->adev; |
| 402 | |
| 403 | if (!adev) |
| 404 | return -ENOTTY; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 405 | if (call_pkg && nfit_mem->family != call_pkg->nd_family) |
| 406 | return -ENOTTY; |
| 407 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 408 | dimm_name = nvdimm_name(nvdimm); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 409 | cmd_name = nvdimm_cmd_name(cmd); |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 410 | cmd_mask = nvdimm_cmd_mask(nvdimm); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 411 | dsm_mask = nfit_mem->dsm_mask; |
| 412 | desc = nd_cmd_dimm_desc(cmd); |
Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 413 | guid = to_nfit_uuid(nfit_mem->family); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 414 | handle = adev->handle; |
| 415 | } else { |
| 416 | struct acpi_device *adev = to_acpi_dev(acpi_desc); |
| 417 | |
| 418 | cmd_name = nvdimm_bus_cmd_name(cmd); |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 419 | cmd_mask = nd_desc->cmd_mask; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 420 | dsm_mask = cmd_mask; |
Jerry Hoemann | 7db5bb3 | 2017-06-30 20:53:24 -0700 | [diff] [blame] | 421 | if (cmd == ND_CMD_CALL) |
| 422 | dsm_mask = nd_desc->bus_dsm_mask; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 423 | desc = nd_cmd_bus_desc(cmd); |
Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 424 | guid = to_nfit_uuid(NFIT_DEV_BUS); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 425 | handle = adev->handle; |
| 426 | dimm_name = "bus"; |
| 427 | } |
| 428 | |
| 429 | if (!desc || (cmd && (desc->out_num + desc->in_num == 0))) |
| 430 | return -ENOTTY; |
| 431 | |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 432 | if (!test_bit(cmd, &cmd_mask) || !test_bit(func, &dsm_mask)) |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 433 | return -ENOTTY; |
| 434 | |
| 435 | in_obj.type = ACPI_TYPE_PACKAGE; |
| 436 | in_obj.package.count = 1; |
| 437 | in_obj.package.elements = &in_buf; |
| 438 | in_buf.type = ACPI_TYPE_BUFFER; |
| 439 | in_buf.buffer.pointer = buf; |
| 440 | in_buf.buffer.length = 0; |
| 441 | |
| 442 | /* libnvdimm has already validated the input envelope */ |
| 443 | for (i = 0; i < desc->in_num; i++) |
| 444 | in_buf.buffer.length += nd_cmd_in_size(nvdimm, cmd, desc, |
| 445 | i, buf); |
| 446 | |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 447 | if (call_pkg) { |
| 448 | /* skip over package wrapper */ |
| 449 | in_buf.buffer.pointer = (void *) &call_pkg->nd_payload; |
| 450 | in_buf.buffer.length = call_pkg->nd_size_in; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 451 | } |
| 452 | |
Dan Williams | 7699a6a | 2017-04-28 13:54:30 -0700 | [diff] [blame] | 453 | dev_dbg(dev, "%s:%s cmd: %d: func: %d input length: %d\n", |
| 454 | __func__, dimm_name, cmd, func, in_buf.buffer.length); |
| 455 | print_hex_dump_debug("nvdimm in ", DUMP_PREFIX_OFFSET, 4, 4, |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 456 | in_buf.buffer.pointer, |
| 457 | min_t(u32, 256, in_buf.buffer.length), true); |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 458 | |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 459 | /* call the BIOS, prefer the named methods over _DSM if available */ |
| 460 | if (cmd == ND_CMD_GET_CONFIG_SIZE && nfit_mem->has_lsi) |
| 461 | out_obj = acpi_label_info(handle); |
| 462 | else if (cmd == ND_CMD_GET_CONFIG_DATA && nfit_mem->has_lsr) { |
| 463 | struct nd_cmd_get_config_data_hdr *p = buf; |
| 464 | |
| 465 | out_obj = acpi_label_read(handle, p->in_offset, p->in_length); |
| 466 | } else if (cmd == ND_CMD_SET_CONFIG_DATA && nfit_mem->has_lsw) { |
| 467 | struct nd_cmd_set_config_hdr *p = buf; |
| 468 | |
| 469 | out_obj = acpi_label_write(handle, p->in_offset, p->in_length, |
| 470 | p->in_buf); |
| 471 | } else |
| 472 | out_obj = acpi_evaluate_dsm(handle, guid, 1, func, &in_obj); |
| 473 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 474 | if (!out_obj) { |
| 475 | dev_dbg(dev, "%s:%s _DSM failed cmd: %s\n", __func__, dimm_name, |
| 476 | cmd_name); |
| 477 | return -EINVAL; |
| 478 | } |
| 479 | |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 480 | if (call_pkg) { |
| 481 | call_pkg->nd_fw_size = out_obj->buffer.length; |
| 482 | memcpy(call_pkg->nd_payload + call_pkg->nd_size_in, |
| 483 | out_obj->buffer.pointer, |
| 484 | min(call_pkg->nd_fw_size, call_pkg->nd_size_out)); |
| 485 | |
| 486 | ACPI_FREE(out_obj); |
| 487 | /* |
| 488 | * Need to support FW function w/o known size in advance. |
| 489 | * Caller can determine required size based upon nd_fw_size. |
| 490 | * If we return an error (like elsewhere) then caller wouldn't |
| 491 | * be able to rely upon data returned to make calculation. |
| 492 | */ |
| 493 | return 0; |
| 494 | } |
| 495 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 496 | if (out_obj->package.type != ACPI_TYPE_BUFFER) { |
| 497 | dev_dbg(dev, "%s:%s unexpected output object type cmd: %s type: %d\n", |
| 498 | __func__, dimm_name, cmd_name, out_obj->type); |
| 499 | rc = -EINVAL; |
| 500 | goto out; |
| 501 | } |
| 502 | |
Dan Williams | 7699a6a | 2017-04-28 13:54:30 -0700 | [diff] [blame] | 503 | dev_dbg(dev, "%s:%s cmd: %s output length: %d\n", __func__, dimm_name, |
| 504 | cmd_name, out_obj->buffer.length); |
| 505 | print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4, 4, |
| 506 | out_obj->buffer.pointer, |
| 507 | min_t(u32, 128, out_obj->buffer.length), true); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 508 | |
| 509 | for (i = 0, offset = 0; i < desc->out_num; i++) { |
| 510 | u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, buf, |
Dan Williams | efda1b5d | 2016-12-06 09:10:12 -0800 | [diff] [blame] | 511 | (u32 *) out_obj->buffer.pointer, |
| 512 | out_obj->buffer.length - offset); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 513 | |
| 514 | if (offset + out_size > out_obj->buffer.length) { |
| 515 | dev_dbg(dev, "%s:%s output object underflow cmd: %s field: %d\n", |
| 516 | __func__, dimm_name, cmd_name, i); |
| 517 | break; |
| 518 | } |
| 519 | |
| 520 | if (in_buf.buffer.length + offset + out_size > buf_len) { |
| 521 | dev_dbg(dev, "%s:%s output overrun cmd: %s field: %d\n", |
| 522 | __func__, dimm_name, cmd_name, i); |
| 523 | rc = -ENXIO; |
| 524 | goto out; |
| 525 | } |
| 526 | memcpy(buf + in_buf.buffer.length + offset, |
| 527 | out_obj->buffer.pointer + offset, out_size); |
| 528 | offset += out_size; |
| 529 | } |
Dan Williams | 11294d6 | 2016-09-21 09:21:26 -0700 | [diff] [blame] | 530 | |
| 531 | /* |
| 532 | * Set fw_status for all the commands with a known format to be |
| 533 | * later interpreted by xlat_status(). |
| 534 | */ |
| 535 | if (i >= 1 && ((cmd >= ND_CMD_ARS_CAP && cmd <= ND_CMD_CLEAR_ERROR) |
| 536 | || (cmd >= ND_CMD_SMART && cmd <= ND_CMD_VENDOR))) |
| 537 | fw_status = *(u32 *) out_obj->buffer.pointer; |
| 538 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 539 | if (offset + in_buf.buffer.length < buf_len) { |
| 540 | if (i >= 1) { |
| 541 | /* |
| 542 | * status valid, return the number of bytes left |
| 543 | * unfilled in the output buffer |
| 544 | */ |
| 545 | rc = buf_len - offset - in_buf.buffer.length; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 546 | if (cmd_rc) |
Dan Williams | d6eb270 | 2016-12-06 15:06:55 -0800 | [diff] [blame] | 547 | *cmd_rc = xlat_status(nvdimm, buf, cmd, |
| 548 | fw_status); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 549 | } else { |
| 550 | dev_err(dev, "%s:%s underrun cmd: %s buf_len: %d out_len: %d\n", |
| 551 | __func__, dimm_name, cmd_name, buf_len, |
| 552 | offset); |
| 553 | rc = -ENXIO; |
| 554 | } |
Dan Williams | 2eea658 | 2016-05-02 09:11:53 -0700 | [diff] [blame] | 555 | } else { |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 556 | rc = 0; |
Dan Williams | 2eea658 | 2016-05-02 09:11:53 -0700 | [diff] [blame] | 557 | if (cmd_rc) |
Dan Williams | d6eb270 | 2016-12-06 15:06:55 -0800 | [diff] [blame] | 558 | *cmd_rc = xlat_status(nvdimm, buf, cmd, fw_status); |
Dan Williams | 2eea658 | 2016-05-02 09:11:53 -0700 | [diff] [blame] | 559 | } |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 560 | |
| 561 | out: |
| 562 | ACPI_FREE(out_obj); |
| 563 | |
| 564 | return rc; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 565 | } |
Dan Williams | a7de92d | 2016-12-05 13:43:25 -0800 | [diff] [blame] | 566 | EXPORT_SYMBOL_GPL(acpi_nfit_ctl); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 567 | |
| 568 | static const char *spa_type_name(u16 type) |
| 569 | { |
| 570 | static const char *to_name[] = { |
| 571 | [NFIT_SPA_VOLATILE] = "volatile", |
| 572 | [NFIT_SPA_PM] = "pmem", |
| 573 | [NFIT_SPA_DCR] = "dimm-control-region", |
| 574 | [NFIT_SPA_BDW] = "block-data-window", |
| 575 | [NFIT_SPA_VDISK] = "volatile-disk", |
| 576 | [NFIT_SPA_VCD] = "volatile-cd", |
| 577 | [NFIT_SPA_PDISK] = "persistent-disk", |
| 578 | [NFIT_SPA_PCD] = "persistent-cd", |
| 579 | |
| 580 | }; |
| 581 | |
| 582 | if (type > NFIT_SPA_PCD) |
| 583 | return "unknown"; |
| 584 | |
| 585 | return to_name[type]; |
| 586 | } |
| 587 | |
Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 588 | int nfit_spa_type(struct acpi_nfit_system_address *spa) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 589 | { |
| 590 | int i; |
| 591 | |
| 592 | for (i = 0; i < NFIT_UUID_MAX; i++) |
Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 593 | if (guid_equal(to_nfit_uuid(i), (guid_t *)&spa->range_guid)) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 594 | return i; |
| 595 | return -1; |
| 596 | } |
| 597 | |
| 598 | static bool add_spa(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 599 | struct nfit_table_prev *prev, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 600 | struct acpi_nfit_system_address *spa) |
| 601 | { |
| 602 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 603 | struct nfit_spa *nfit_spa; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 604 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 605 | if (spa->header.length != sizeof(*spa)) |
| 606 | return false; |
| 607 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 608 | list_for_each_entry(nfit_spa, &prev->spas, list) { |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 609 | if (memcmp(nfit_spa->spa, spa, sizeof(*spa)) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 610 | list_move_tail(&nfit_spa->list, &acpi_desc->spas); |
| 611 | return true; |
| 612 | } |
| 613 | } |
| 614 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 615 | nfit_spa = devm_kzalloc(dev, sizeof(*nfit_spa) + sizeof(*spa), |
| 616 | GFP_KERNEL); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 617 | if (!nfit_spa) |
| 618 | return false; |
| 619 | INIT_LIST_HEAD(&nfit_spa->list); |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 620 | memcpy(nfit_spa->spa, spa, sizeof(*spa)); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 621 | list_add_tail(&nfit_spa->list, &acpi_desc->spas); |
| 622 | dev_dbg(dev, "%s: spa index: %d type: %s\n", __func__, |
| 623 | spa->range_index, |
| 624 | spa_type_name(nfit_spa_type(spa))); |
| 625 | return true; |
| 626 | } |
| 627 | |
| 628 | static bool add_memdev(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 629 | struct nfit_table_prev *prev, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 630 | struct acpi_nfit_memory_map *memdev) |
| 631 | { |
| 632 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 633 | struct nfit_memdev *nfit_memdev; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 634 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 635 | if (memdev->header.length != sizeof(*memdev)) |
| 636 | return false; |
| 637 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 638 | list_for_each_entry(nfit_memdev, &prev->memdevs, list) |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 639 | if (memcmp(nfit_memdev->memdev, memdev, sizeof(*memdev)) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 640 | list_move_tail(&nfit_memdev->list, &acpi_desc->memdevs); |
| 641 | return true; |
| 642 | } |
| 643 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 644 | nfit_memdev = devm_kzalloc(dev, sizeof(*nfit_memdev) + sizeof(*memdev), |
| 645 | GFP_KERNEL); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 646 | if (!nfit_memdev) |
| 647 | return false; |
| 648 | INIT_LIST_HEAD(&nfit_memdev->list); |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 649 | memcpy(nfit_memdev->memdev, memdev, sizeof(*memdev)); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 650 | list_add_tail(&nfit_memdev->list, &acpi_desc->memdevs); |
Dan Williams | caa603a | 2017-04-14 10:27:11 -0700 | [diff] [blame] | 651 | dev_dbg(dev, "%s: memdev handle: %#x spa: %d dcr: %d flags: %#x\n", |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 652 | __func__, memdev->device_handle, memdev->range_index, |
Dan Williams | caa603a | 2017-04-14 10:27:11 -0700 | [diff] [blame] | 653 | memdev->region_index, memdev->flags); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 654 | return true; |
| 655 | } |
| 656 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 657 | /* |
| 658 | * An implementation may provide a truncated control region if no block windows |
| 659 | * are defined. |
| 660 | */ |
| 661 | static size_t sizeof_dcr(struct acpi_nfit_control_region *dcr) |
| 662 | { |
| 663 | if (dcr->header.length < offsetof(struct acpi_nfit_control_region, |
| 664 | window_size)) |
| 665 | return 0; |
| 666 | if (dcr->windows) |
| 667 | return sizeof(*dcr); |
| 668 | return offsetof(struct acpi_nfit_control_region, window_size); |
| 669 | } |
| 670 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 671 | static bool add_dcr(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 672 | struct nfit_table_prev *prev, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 673 | struct acpi_nfit_control_region *dcr) |
| 674 | { |
| 675 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 676 | struct nfit_dcr *nfit_dcr; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 677 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 678 | if (!sizeof_dcr(dcr)) |
| 679 | return false; |
| 680 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 681 | list_for_each_entry(nfit_dcr, &prev->dcrs, list) |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 682 | if (memcmp(nfit_dcr->dcr, dcr, sizeof_dcr(dcr)) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 683 | list_move_tail(&nfit_dcr->list, &acpi_desc->dcrs); |
| 684 | return true; |
| 685 | } |
| 686 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 687 | nfit_dcr = devm_kzalloc(dev, sizeof(*nfit_dcr) + sizeof(*dcr), |
| 688 | GFP_KERNEL); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 689 | if (!nfit_dcr) |
| 690 | return false; |
| 691 | INIT_LIST_HEAD(&nfit_dcr->list); |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 692 | memcpy(nfit_dcr->dcr, dcr, sizeof_dcr(dcr)); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 693 | list_add_tail(&nfit_dcr->list, &acpi_desc->dcrs); |
| 694 | dev_dbg(dev, "%s: dcr index: %d windows: %d\n", __func__, |
| 695 | dcr->region_index, dcr->windows); |
| 696 | return true; |
| 697 | } |
| 698 | |
| 699 | static bool add_bdw(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 700 | struct nfit_table_prev *prev, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 701 | struct acpi_nfit_data_region *bdw) |
| 702 | { |
| 703 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 704 | struct nfit_bdw *nfit_bdw; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 705 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 706 | if (bdw->header.length != sizeof(*bdw)) |
| 707 | return false; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 708 | list_for_each_entry(nfit_bdw, &prev->bdws, list) |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 709 | if (memcmp(nfit_bdw->bdw, bdw, sizeof(*bdw)) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 710 | list_move_tail(&nfit_bdw->list, &acpi_desc->bdws); |
| 711 | return true; |
| 712 | } |
| 713 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 714 | nfit_bdw = devm_kzalloc(dev, sizeof(*nfit_bdw) + sizeof(*bdw), |
| 715 | GFP_KERNEL); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 716 | if (!nfit_bdw) |
| 717 | return false; |
| 718 | INIT_LIST_HEAD(&nfit_bdw->list); |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 719 | memcpy(nfit_bdw->bdw, bdw, sizeof(*bdw)); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 720 | list_add_tail(&nfit_bdw->list, &acpi_desc->bdws); |
| 721 | dev_dbg(dev, "%s: bdw dcr: %d windows: %d\n", __func__, |
| 722 | bdw->region_index, bdw->windows); |
| 723 | return true; |
| 724 | } |
| 725 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 726 | static size_t sizeof_idt(struct acpi_nfit_interleave *idt) |
| 727 | { |
| 728 | if (idt->header.length < sizeof(*idt)) |
| 729 | return 0; |
| 730 | return sizeof(*idt) + sizeof(u32) * (idt->line_count - 1); |
| 731 | } |
| 732 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 733 | static bool add_idt(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 734 | struct nfit_table_prev *prev, |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 735 | struct acpi_nfit_interleave *idt) |
| 736 | { |
| 737 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 738 | struct nfit_idt *nfit_idt; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 739 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 740 | if (!sizeof_idt(idt)) |
| 741 | return false; |
| 742 | |
| 743 | list_for_each_entry(nfit_idt, &prev->idts, list) { |
| 744 | if (sizeof_idt(nfit_idt->idt) != sizeof_idt(idt)) |
| 745 | continue; |
| 746 | |
| 747 | if (memcmp(nfit_idt->idt, idt, sizeof_idt(idt)) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 748 | list_move_tail(&nfit_idt->list, &acpi_desc->idts); |
| 749 | return true; |
| 750 | } |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 751 | } |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 752 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 753 | nfit_idt = devm_kzalloc(dev, sizeof(*nfit_idt) + sizeof_idt(idt), |
| 754 | GFP_KERNEL); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 755 | if (!nfit_idt) |
| 756 | return false; |
| 757 | INIT_LIST_HEAD(&nfit_idt->list); |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 758 | memcpy(nfit_idt->idt, idt, sizeof_idt(idt)); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 759 | list_add_tail(&nfit_idt->list, &acpi_desc->idts); |
| 760 | dev_dbg(dev, "%s: idt index: %d num_lines: %d\n", __func__, |
| 761 | idt->interleave_index, idt->line_count); |
| 762 | return true; |
| 763 | } |
| 764 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 765 | static size_t sizeof_flush(struct acpi_nfit_flush_address *flush) |
| 766 | { |
| 767 | if (flush->header.length < sizeof(*flush)) |
| 768 | return 0; |
| 769 | return sizeof(*flush) + sizeof(u64) * (flush->hint_count - 1); |
| 770 | } |
| 771 | |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 772 | static bool add_flush(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 773 | struct nfit_table_prev *prev, |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 774 | struct acpi_nfit_flush_address *flush) |
| 775 | { |
| 776 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 777 | struct nfit_flush *nfit_flush; |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 778 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 779 | if (!sizeof_flush(flush)) |
| 780 | return false; |
| 781 | |
| 782 | list_for_each_entry(nfit_flush, &prev->flushes, list) { |
| 783 | if (sizeof_flush(nfit_flush->flush) != sizeof_flush(flush)) |
| 784 | continue; |
| 785 | |
| 786 | if (memcmp(nfit_flush->flush, flush, |
| 787 | sizeof_flush(flush)) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 788 | list_move_tail(&nfit_flush->list, &acpi_desc->flushes); |
| 789 | return true; |
| 790 | } |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 791 | } |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 792 | |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 793 | nfit_flush = devm_kzalloc(dev, sizeof(*nfit_flush) |
| 794 | + sizeof_flush(flush), GFP_KERNEL); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 795 | if (!nfit_flush) |
| 796 | return false; |
| 797 | INIT_LIST_HEAD(&nfit_flush->list); |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 798 | memcpy(nfit_flush->flush, flush, sizeof_flush(flush)); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 799 | list_add_tail(&nfit_flush->list, &acpi_desc->flushes); |
| 800 | dev_dbg(dev, "%s: nfit_flush handle: %d hint_count: %d\n", __func__, |
| 801 | flush->device_handle, flush->hint_count); |
| 802 | return true; |
| 803 | } |
| 804 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 805 | static void *add_table(struct acpi_nfit_desc *acpi_desc, |
| 806 | struct nfit_table_prev *prev, void *table, const void *end) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 807 | { |
| 808 | struct device *dev = acpi_desc->dev; |
| 809 | struct acpi_nfit_header *hdr; |
| 810 | void *err = ERR_PTR(-ENOMEM); |
| 811 | |
| 812 | if (table >= end) |
| 813 | return NULL; |
| 814 | |
| 815 | hdr = table; |
Vishal Verma | 564d501 | 2015-10-27 16:58:26 -0600 | [diff] [blame] | 816 | if (!hdr->length) { |
| 817 | dev_warn(dev, "found a zero length table '%d' parsing nfit\n", |
| 818 | hdr->type); |
| 819 | return NULL; |
| 820 | } |
| 821 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 822 | switch (hdr->type) { |
| 823 | case ACPI_NFIT_TYPE_SYSTEM_ADDRESS: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 824 | if (!add_spa(acpi_desc, prev, table)) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 825 | return err; |
| 826 | break; |
| 827 | case ACPI_NFIT_TYPE_MEMORY_MAP: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 828 | if (!add_memdev(acpi_desc, prev, table)) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 829 | return err; |
| 830 | break; |
| 831 | case ACPI_NFIT_TYPE_CONTROL_REGION: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 832 | if (!add_dcr(acpi_desc, prev, table)) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 833 | return err; |
| 834 | break; |
| 835 | case ACPI_NFIT_TYPE_DATA_REGION: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 836 | if (!add_bdw(acpi_desc, prev, table)) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 837 | return err; |
| 838 | break; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 839 | case ACPI_NFIT_TYPE_INTERLEAVE: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 840 | if (!add_idt(acpi_desc, prev, table)) |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 841 | return err; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 842 | break; |
| 843 | case ACPI_NFIT_TYPE_FLUSH_ADDRESS: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 844 | if (!add_flush(acpi_desc, prev, table)) |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 845 | return err; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 846 | break; |
| 847 | case ACPI_NFIT_TYPE_SMBIOS: |
| 848 | dev_dbg(dev, "%s: smbios\n", __func__); |
| 849 | break; |
| 850 | default: |
| 851 | dev_err(dev, "unknown table '%d' parsing nfit\n", hdr->type); |
| 852 | break; |
| 853 | } |
| 854 | |
| 855 | return table + hdr->length; |
| 856 | } |
| 857 | |
| 858 | static void nfit_mem_find_spa_bdw(struct acpi_nfit_desc *acpi_desc, |
| 859 | struct nfit_mem *nfit_mem) |
| 860 | { |
| 861 | u32 device_handle = __to_nfit_memdev(nfit_mem)->device_handle; |
| 862 | u16 dcr = nfit_mem->dcr->region_index; |
| 863 | struct nfit_spa *nfit_spa; |
| 864 | |
| 865 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| 866 | u16 range_index = nfit_spa->spa->range_index; |
| 867 | int type = nfit_spa_type(nfit_spa->spa); |
| 868 | struct nfit_memdev *nfit_memdev; |
| 869 | |
| 870 | if (type != NFIT_SPA_BDW) |
| 871 | continue; |
| 872 | |
| 873 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 874 | if (nfit_memdev->memdev->range_index != range_index) |
| 875 | continue; |
| 876 | if (nfit_memdev->memdev->device_handle != device_handle) |
| 877 | continue; |
| 878 | if (nfit_memdev->memdev->region_index != dcr) |
| 879 | continue; |
| 880 | |
| 881 | nfit_mem->spa_bdw = nfit_spa->spa; |
| 882 | return; |
| 883 | } |
| 884 | } |
| 885 | |
| 886 | dev_dbg(acpi_desc->dev, "SPA-BDW not found for SPA-DCR %d\n", |
| 887 | nfit_mem->spa_dcr->range_index); |
| 888 | nfit_mem->bdw = NULL; |
| 889 | } |
| 890 | |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 891 | static void nfit_mem_init_bdw(struct acpi_nfit_desc *acpi_desc, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 892 | struct nfit_mem *nfit_mem, struct acpi_nfit_system_address *spa) |
| 893 | { |
| 894 | u16 dcr = __to_nfit_memdev(nfit_mem)->region_index; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 895 | struct nfit_memdev *nfit_memdev; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 896 | struct nfit_bdw *nfit_bdw; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 897 | struct nfit_idt *nfit_idt; |
| 898 | u16 idt_idx, range_index; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 899 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 900 | list_for_each_entry(nfit_bdw, &acpi_desc->bdws, list) { |
| 901 | if (nfit_bdw->bdw->region_index != dcr) |
| 902 | continue; |
| 903 | nfit_mem->bdw = nfit_bdw->bdw; |
| 904 | break; |
| 905 | } |
| 906 | |
| 907 | if (!nfit_mem->bdw) |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 908 | return; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 909 | |
| 910 | nfit_mem_find_spa_bdw(acpi_desc, nfit_mem); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 911 | |
| 912 | if (!nfit_mem->spa_bdw) |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 913 | return; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 914 | |
| 915 | range_index = nfit_mem->spa_bdw->range_index; |
| 916 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 917 | if (nfit_memdev->memdev->range_index != range_index || |
| 918 | nfit_memdev->memdev->region_index != dcr) |
| 919 | continue; |
| 920 | nfit_mem->memdev_bdw = nfit_memdev->memdev; |
| 921 | idt_idx = nfit_memdev->memdev->interleave_index; |
| 922 | list_for_each_entry(nfit_idt, &acpi_desc->idts, list) { |
| 923 | if (nfit_idt->idt->interleave_index != idt_idx) |
| 924 | continue; |
| 925 | nfit_mem->idt_bdw = nfit_idt->idt; |
| 926 | break; |
| 927 | } |
| 928 | break; |
| 929 | } |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 930 | } |
| 931 | |
Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 932 | static int __nfit_mem_init(struct acpi_nfit_desc *acpi_desc, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 933 | struct acpi_nfit_system_address *spa) |
| 934 | { |
| 935 | struct nfit_mem *nfit_mem, *found; |
| 936 | struct nfit_memdev *nfit_memdev; |
Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 937 | int type = spa ? nfit_spa_type(spa) : 0; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 938 | |
| 939 | switch (type) { |
| 940 | case NFIT_SPA_DCR: |
| 941 | case NFIT_SPA_PM: |
| 942 | break; |
| 943 | default: |
Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 944 | if (spa) |
| 945 | return 0; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 946 | } |
| 947 | |
Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 948 | /* |
| 949 | * This loop runs in two modes, when a dimm is mapped the loop |
| 950 | * adds memdev associations to an existing dimm, or creates a |
| 951 | * dimm. In the unmapped dimm case this loop sweeps for memdev |
| 952 | * instances with an invalid / zero range_index and adds those |
| 953 | * dimms without spa associations. |
| 954 | */ |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 955 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
Dan Williams | ad9ac5e | 2016-05-26 11:38:08 -0700 | [diff] [blame] | 956 | struct nfit_flush *nfit_flush; |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 957 | struct nfit_dcr *nfit_dcr; |
| 958 | u32 device_handle; |
| 959 | u16 dcr; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 960 | |
Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 961 | if (spa && nfit_memdev->memdev->range_index != spa->range_index) |
| 962 | continue; |
| 963 | if (!spa && nfit_memdev->memdev->range_index) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 964 | continue; |
| 965 | found = NULL; |
| 966 | dcr = nfit_memdev->memdev->region_index; |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 967 | device_handle = nfit_memdev->memdev->device_handle; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 968 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 969 | if (__to_nfit_memdev(nfit_mem)->device_handle |
| 970 | == device_handle) { |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 971 | found = nfit_mem; |
| 972 | break; |
| 973 | } |
| 974 | |
| 975 | if (found) |
| 976 | nfit_mem = found; |
| 977 | else { |
| 978 | nfit_mem = devm_kzalloc(acpi_desc->dev, |
| 979 | sizeof(*nfit_mem), GFP_KERNEL); |
| 980 | if (!nfit_mem) |
| 981 | return -ENOMEM; |
| 982 | INIT_LIST_HEAD(&nfit_mem->list); |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 983 | nfit_mem->acpi_desc = acpi_desc; |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 984 | list_add(&nfit_mem->list, &acpi_desc->dimms); |
| 985 | } |
| 986 | |
| 987 | list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) { |
| 988 | if (nfit_dcr->dcr->region_index != dcr) |
| 989 | continue; |
| 990 | /* |
| 991 | * Record the control region for the dimm. For |
| 992 | * the ACPI 6.1 case, where there are separate |
| 993 | * control regions for the pmem vs blk |
| 994 | * interfaces, be sure to record the extended |
| 995 | * blk details. |
| 996 | */ |
| 997 | if (!nfit_mem->dcr) |
| 998 | nfit_mem->dcr = nfit_dcr->dcr; |
| 999 | else if (nfit_mem->dcr->windows == 0 |
| 1000 | && nfit_dcr->dcr->windows) |
| 1001 | nfit_mem->dcr = nfit_dcr->dcr; |
| 1002 | break; |
| 1003 | } |
| 1004 | |
Dan Williams | ad9ac5e | 2016-05-26 11:38:08 -0700 | [diff] [blame] | 1005 | list_for_each_entry(nfit_flush, &acpi_desc->flushes, list) { |
Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 1006 | struct acpi_nfit_flush_address *flush; |
| 1007 | u16 i; |
| 1008 | |
Dan Williams | ad9ac5e | 2016-05-26 11:38:08 -0700 | [diff] [blame] | 1009 | if (nfit_flush->flush->device_handle != device_handle) |
| 1010 | continue; |
| 1011 | nfit_mem->nfit_flush = nfit_flush; |
Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 1012 | flush = nfit_flush->flush; |
| 1013 | nfit_mem->flush_wpq = devm_kzalloc(acpi_desc->dev, |
| 1014 | flush->hint_count |
| 1015 | * sizeof(struct resource), GFP_KERNEL); |
| 1016 | if (!nfit_mem->flush_wpq) |
| 1017 | return -ENOMEM; |
| 1018 | for (i = 0; i < flush->hint_count; i++) { |
| 1019 | struct resource *res = &nfit_mem->flush_wpq[i]; |
| 1020 | |
| 1021 | res->start = flush->hint_address[i]; |
| 1022 | res->end = res->start + 8 - 1; |
| 1023 | } |
Dan Williams | ad9ac5e | 2016-05-26 11:38:08 -0700 | [diff] [blame] | 1024 | break; |
| 1025 | } |
| 1026 | |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 1027 | if (dcr && !nfit_mem->dcr) { |
| 1028 | dev_err(acpi_desc->dev, "SPA %d missing DCR %d\n", |
| 1029 | spa->range_index, dcr); |
| 1030 | return -ENODEV; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1031 | } |
| 1032 | |
| 1033 | if (type == NFIT_SPA_DCR) { |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1034 | struct nfit_idt *nfit_idt; |
| 1035 | u16 idt_idx; |
| 1036 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1037 | /* multiple dimms may share a SPA when interleaved */ |
| 1038 | nfit_mem->spa_dcr = spa; |
| 1039 | nfit_mem->memdev_dcr = nfit_memdev->memdev; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1040 | idt_idx = nfit_memdev->memdev->interleave_index; |
| 1041 | list_for_each_entry(nfit_idt, &acpi_desc->idts, list) { |
| 1042 | if (nfit_idt->idt->interleave_index != idt_idx) |
| 1043 | continue; |
| 1044 | nfit_mem->idt_dcr = nfit_idt->idt; |
| 1045 | break; |
| 1046 | } |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 1047 | nfit_mem_init_bdw(acpi_desc, nfit_mem, spa); |
Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1048 | } else if (type == NFIT_SPA_PM) { |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1049 | /* |
| 1050 | * A single dimm may belong to multiple SPA-PM |
| 1051 | * ranges, record at least one in addition to |
| 1052 | * any SPA-DCR range. |
| 1053 | */ |
| 1054 | nfit_mem->memdev_pmem = nfit_memdev->memdev; |
Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1055 | } else |
| 1056 | nfit_mem->memdev_dcr = nfit_memdev->memdev; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1057 | } |
| 1058 | |
| 1059 | return 0; |
| 1060 | } |
| 1061 | |
| 1062 | static int nfit_mem_cmp(void *priv, struct list_head *_a, struct list_head *_b) |
| 1063 | { |
| 1064 | struct nfit_mem *a = container_of(_a, typeof(*a), list); |
| 1065 | struct nfit_mem *b = container_of(_b, typeof(*b), list); |
| 1066 | u32 handleA, handleB; |
| 1067 | |
| 1068 | handleA = __to_nfit_memdev(a)->device_handle; |
| 1069 | handleB = __to_nfit_memdev(b)->device_handle; |
| 1070 | if (handleA < handleB) |
| 1071 | return -1; |
| 1072 | else if (handleA > handleB) |
| 1073 | return 1; |
| 1074 | return 0; |
| 1075 | } |
| 1076 | |
| 1077 | static int nfit_mem_init(struct acpi_nfit_desc *acpi_desc) |
| 1078 | { |
| 1079 | struct nfit_spa *nfit_spa; |
Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1080 | int rc; |
| 1081 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1082 | |
| 1083 | /* |
| 1084 | * For each SPA-DCR or SPA-PMEM address range find its |
| 1085 | * corresponding MEMDEV(s). From each MEMDEV find the |
| 1086 | * corresponding DCR. Then, if we're operating on a SPA-DCR, |
| 1087 | * try to find a SPA-BDW and a corresponding BDW that references |
| 1088 | * the DCR. Throw it all into an nfit_mem object. Note, that |
| 1089 | * BDWs are optional. |
| 1090 | */ |
| 1091 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1092 | rc = __nfit_mem_init(acpi_desc, nfit_spa->spa); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1093 | if (rc) |
| 1094 | return rc; |
| 1095 | } |
| 1096 | |
Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1097 | /* |
| 1098 | * If a DIMM has failed to be mapped into SPA there will be no |
| 1099 | * SPA entries above. Find and register all the unmapped DIMMs |
| 1100 | * for reporting and recovery purposes. |
| 1101 | */ |
| 1102 | rc = __nfit_mem_init(acpi_desc, NULL); |
| 1103 | if (rc) |
| 1104 | return rc; |
| 1105 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1106 | list_sort(NULL, &acpi_desc->dimms, nfit_mem_cmp); |
| 1107 | |
| 1108 | return 0; |
| 1109 | } |
| 1110 | |
Jerry Hoemann | 41f95db | 2017-06-30 20:41:28 -0700 | [diff] [blame] | 1111 | static ssize_t bus_dsm_mask_show(struct device *dev, |
| 1112 | struct device_attribute *attr, char *buf) |
| 1113 | { |
| 1114 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); |
| 1115 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); |
| 1116 | |
| 1117 | return sprintf(buf, "%#lx\n", nd_desc->bus_dsm_mask); |
| 1118 | } |
| 1119 | static struct device_attribute dev_attr_bus_dsm_mask = |
| 1120 | __ATTR(dsm_mask, 0444, bus_dsm_mask_show, NULL); |
| 1121 | |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 1122 | static ssize_t revision_show(struct device *dev, |
| 1123 | struct device_attribute *attr, char *buf) |
| 1124 | { |
| 1125 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); |
| 1126 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); |
| 1127 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| 1128 | |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 1129 | return sprintf(buf, "%d\n", acpi_desc->acpi_header.revision); |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 1130 | } |
| 1131 | static DEVICE_ATTR_RO(revision); |
| 1132 | |
Vishal Verma | 9ffd635 | 2016-09-30 17:19:29 -0600 | [diff] [blame] | 1133 | static ssize_t hw_error_scrub_show(struct device *dev, |
| 1134 | struct device_attribute *attr, char *buf) |
| 1135 | { |
| 1136 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); |
| 1137 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); |
| 1138 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| 1139 | |
| 1140 | return sprintf(buf, "%d\n", acpi_desc->scrub_mode); |
| 1141 | } |
| 1142 | |
| 1143 | /* |
| 1144 | * The 'hw_error_scrub' attribute can have the following values written to it: |
| 1145 | * '0': Switch to the default mode where an exception will only insert |
| 1146 | * the address of the memory error into the poison and badblocks lists. |
| 1147 | * '1': Enable a full scrub to happen if an exception for a memory error is |
| 1148 | * received. |
| 1149 | */ |
| 1150 | static ssize_t hw_error_scrub_store(struct device *dev, |
| 1151 | struct device_attribute *attr, const char *buf, size_t size) |
| 1152 | { |
| 1153 | struct nvdimm_bus_descriptor *nd_desc; |
| 1154 | ssize_t rc; |
| 1155 | long val; |
| 1156 | |
| 1157 | rc = kstrtol(buf, 0, &val); |
| 1158 | if (rc) |
| 1159 | return rc; |
| 1160 | |
| 1161 | device_lock(dev); |
| 1162 | nd_desc = dev_get_drvdata(dev); |
| 1163 | if (nd_desc) { |
| 1164 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| 1165 | |
| 1166 | switch (val) { |
| 1167 | case HW_ERROR_SCRUB_ON: |
| 1168 | acpi_desc->scrub_mode = HW_ERROR_SCRUB_ON; |
| 1169 | break; |
| 1170 | case HW_ERROR_SCRUB_OFF: |
| 1171 | acpi_desc->scrub_mode = HW_ERROR_SCRUB_OFF; |
| 1172 | break; |
| 1173 | default: |
| 1174 | rc = -EINVAL; |
| 1175 | break; |
| 1176 | } |
| 1177 | } |
| 1178 | device_unlock(dev); |
| 1179 | if (rc) |
| 1180 | return rc; |
| 1181 | return size; |
| 1182 | } |
| 1183 | static DEVICE_ATTR_RW(hw_error_scrub); |
| 1184 | |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 1185 | /* |
| 1186 | * This shows the number of full Address Range Scrubs that have been |
| 1187 | * completed since driver load time. Userspace can wait on this using |
| 1188 | * select/poll etc. A '+' at the end indicates an ARS is in progress |
| 1189 | */ |
| 1190 | static ssize_t scrub_show(struct device *dev, |
| 1191 | struct device_attribute *attr, char *buf) |
| 1192 | { |
| 1193 | struct nvdimm_bus_descriptor *nd_desc; |
| 1194 | ssize_t rc = -ENXIO; |
| 1195 | |
| 1196 | device_lock(dev); |
| 1197 | nd_desc = dev_get_drvdata(dev); |
| 1198 | if (nd_desc) { |
| 1199 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| 1200 | |
| 1201 | rc = sprintf(buf, "%d%s", acpi_desc->scrub_count, |
| 1202 | (work_busy(&acpi_desc->work)) ? "+\n" : "\n"); |
| 1203 | } |
| 1204 | device_unlock(dev); |
| 1205 | return rc; |
| 1206 | } |
| 1207 | |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 1208 | static ssize_t scrub_store(struct device *dev, |
| 1209 | struct device_attribute *attr, const char *buf, size_t size) |
| 1210 | { |
| 1211 | struct nvdimm_bus_descriptor *nd_desc; |
| 1212 | ssize_t rc; |
| 1213 | long val; |
| 1214 | |
| 1215 | rc = kstrtol(buf, 0, &val); |
| 1216 | if (rc) |
| 1217 | return rc; |
| 1218 | if (val != 1) |
| 1219 | return -EINVAL; |
| 1220 | |
| 1221 | device_lock(dev); |
| 1222 | nd_desc = dev_get_drvdata(dev); |
| 1223 | if (nd_desc) { |
| 1224 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| 1225 | |
Toshi Kani | 8079003 | 2017-06-29 20:41:30 -0600 | [diff] [blame] | 1226 | rc = acpi_nfit_ars_rescan(acpi_desc, 0); |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 1227 | } |
| 1228 | device_unlock(dev); |
| 1229 | if (rc) |
| 1230 | return rc; |
| 1231 | return size; |
| 1232 | } |
| 1233 | static DEVICE_ATTR_RW(scrub); |
| 1234 | |
| 1235 | static bool ars_supported(struct nvdimm_bus *nvdimm_bus) |
| 1236 | { |
| 1237 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); |
| 1238 | const unsigned long mask = 1 << ND_CMD_ARS_CAP | 1 << ND_CMD_ARS_START |
| 1239 | | 1 << ND_CMD_ARS_STATUS; |
| 1240 | |
| 1241 | return (nd_desc->cmd_mask & mask) == mask; |
| 1242 | } |
| 1243 | |
| 1244 | static umode_t nfit_visible(struct kobject *kobj, struct attribute *a, int n) |
| 1245 | { |
| 1246 | struct device *dev = container_of(kobj, struct device, kobj); |
| 1247 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); |
| 1248 | |
| 1249 | if (a == &dev_attr_scrub.attr && !ars_supported(nvdimm_bus)) |
| 1250 | return 0; |
| 1251 | return a->mode; |
| 1252 | } |
| 1253 | |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 1254 | static struct attribute *acpi_nfit_attributes[] = { |
| 1255 | &dev_attr_revision.attr, |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 1256 | &dev_attr_scrub.attr, |
Vishal Verma | 9ffd635 | 2016-09-30 17:19:29 -0600 | [diff] [blame] | 1257 | &dev_attr_hw_error_scrub.attr, |
Jerry Hoemann | 41f95db | 2017-06-30 20:41:28 -0700 | [diff] [blame] | 1258 | &dev_attr_bus_dsm_mask.attr, |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 1259 | NULL, |
| 1260 | }; |
| 1261 | |
Arvind Yadav | 5e93746 | 2017-06-22 15:44:41 +0530 | [diff] [blame] | 1262 | static const struct attribute_group acpi_nfit_attribute_group = { |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 1263 | .name = "nfit", |
| 1264 | .attrs = acpi_nfit_attributes, |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 1265 | .is_visible = nfit_visible, |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 1266 | }; |
| 1267 | |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 1268 | static const struct attribute_group *acpi_nfit_attribute_groups[] = { |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 1269 | &nvdimm_bus_attribute_group, |
| 1270 | &acpi_nfit_attribute_group, |
| 1271 | NULL, |
| 1272 | }; |
| 1273 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1274 | static struct acpi_nfit_memory_map *to_nfit_memdev(struct device *dev) |
| 1275 | { |
| 1276 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1277 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1278 | |
| 1279 | return __to_nfit_memdev(nfit_mem); |
| 1280 | } |
| 1281 | |
| 1282 | static struct acpi_nfit_control_region *to_nfit_dcr(struct device *dev) |
| 1283 | { |
| 1284 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1285 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1286 | |
| 1287 | return nfit_mem->dcr; |
| 1288 | } |
| 1289 | |
| 1290 | static ssize_t handle_show(struct device *dev, |
| 1291 | struct device_attribute *attr, char *buf) |
| 1292 | { |
| 1293 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); |
| 1294 | |
| 1295 | return sprintf(buf, "%#x\n", memdev->device_handle); |
| 1296 | } |
| 1297 | static DEVICE_ATTR_RO(handle); |
| 1298 | |
| 1299 | static ssize_t phys_id_show(struct device *dev, |
| 1300 | struct device_attribute *attr, char *buf) |
| 1301 | { |
| 1302 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); |
| 1303 | |
| 1304 | return sprintf(buf, "%#x\n", memdev->physical_id); |
| 1305 | } |
| 1306 | static DEVICE_ATTR_RO(phys_id); |
| 1307 | |
| 1308 | static ssize_t vendor_show(struct device *dev, |
| 1309 | struct device_attribute *attr, char *buf) |
| 1310 | { |
| 1311 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1312 | |
Toshi Kani | 5ad9a7f | 2016-04-25 15:34:58 -0600 | [diff] [blame] | 1313 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->vendor_id)); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1314 | } |
| 1315 | static DEVICE_ATTR_RO(vendor); |
| 1316 | |
| 1317 | static ssize_t rev_id_show(struct device *dev, |
| 1318 | struct device_attribute *attr, char *buf) |
| 1319 | { |
| 1320 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1321 | |
Toshi Kani | 5ad9a7f | 2016-04-25 15:34:58 -0600 | [diff] [blame] | 1322 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->revision_id)); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1323 | } |
| 1324 | static DEVICE_ATTR_RO(rev_id); |
| 1325 | |
| 1326 | static ssize_t device_show(struct device *dev, |
| 1327 | struct device_attribute *attr, char *buf) |
| 1328 | { |
| 1329 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1330 | |
Toshi Kani | 5ad9a7f | 2016-04-25 15:34:58 -0600 | [diff] [blame] | 1331 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->device_id)); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1332 | } |
| 1333 | static DEVICE_ATTR_RO(device); |
| 1334 | |
Dan Williams | 6ca7208 | 2016-04-29 10:33:23 -0700 | [diff] [blame] | 1335 | static ssize_t subsystem_vendor_show(struct device *dev, |
| 1336 | struct device_attribute *attr, char *buf) |
| 1337 | { |
| 1338 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1339 | |
| 1340 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_vendor_id)); |
| 1341 | } |
| 1342 | static DEVICE_ATTR_RO(subsystem_vendor); |
| 1343 | |
| 1344 | static ssize_t subsystem_rev_id_show(struct device *dev, |
| 1345 | struct device_attribute *attr, char *buf) |
| 1346 | { |
| 1347 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1348 | |
| 1349 | return sprintf(buf, "0x%04x\n", |
| 1350 | be16_to_cpu(dcr->subsystem_revision_id)); |
| 1351 | } |
| 1352 | static DEVICE_ATTR_RO(subsystem_rev_id); |
| 1353 | |
| 1354 | static ssize_t subsystem_device_show(struct device *dev, |
| 1355 | struct device_attribute *attr, char *buf) |
| 1356 | { |
| 1357 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1358 | |
| 1359 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_device_id)); |
| 1360 | } |
| 1361 | static DEVICE_ATTR_RO(subsystem_device); |
| 1362 | |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1363 | static int num_nvdimm_formats(struct nvdimm *nvdimm) |
| 1364 | { |
| 1365 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1366 | int formats = 0; |
| 1367 | |
| 1368 | if (nfit_mem->memdev_pmem) |
| 1369 | formats++; |
| 1370 | if (nfit_mem->memdev_bdw) |
| 1371 | formats++; |
| 1372 | return formats; |
| 1373 | } |
| 1374 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1375 | static ssize_t format_show(struct device *dev, |
| 1376 | struct device_attribute *attr, char *buf) |
| 1377 | { |
| 1378 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1379 | |
Dan Williams | 1bcbf42 | 2016-06-29 11:19:32 -0700 | [diff] [blame] | 1380 | return sprintf(buf, "0x%04x\n", le16_to_cpu(dcr->code)); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1381 | } |
| 1382 | static DEVICE_ATTR_RO(format); |
| 1383 | |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1384 | static ssize_t format1_show(struct device *dev, |
| 1385 | struct device_attribute *attr, char *buf) |
| 1386 | { |
| 1387 | u32 handle; |
| 1388 | ssize_t rc = -ENXIO; |
| 1389 | struct nfit_mem *nfit_mem; |
| 1390 | struct nfit_memdev *nfit_memdev; |
| 1391 | struct acpi_nfit_desc *acpi_desc; |
| 1392 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1393 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1394 | |
| 1395 | nfit_mem = nvdimm_provider_data(nvdimm); |
| 1396 | acpi_desc = nfit_mem->acpi_desc; |
| 1397 | handle = to_nfit_memdev(dev)->device_handle; |
| 1398 | |
| 1399 | /* assumes DIMMs have at most 2 published interface codes */ |
| 1400 | mutex_lock(&acpi_desc->init_mutex); |
| 1401 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 1402 | struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev; |
| 1403 | struct nfit_dcr *nfit_dcr; |
| 1404 | |
| 1405 | if (memdev->device_handle != handle) |
| 1406 | continue; |
| 1407 | |
| 1408 | list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) { |
| 1409 | if (nfit_dcr->dcr->region_index != memdev->region_index) |
| 1410 | continue; |
| 1411 | if (nfit_dcr->dcr->code == dcr->code) |
| 1412 | continue; |
Dan Williams | 1bcbf42 | 2016-06-29 11:19:32 -0700 | [diff] [blame] | 1413 | rc = sprintf(buf, "0x%04x\n", |
| 1414 | le16_to_cpu(nfit_dcr->dcr->code)); |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1415 | break; |
| 1416 | } |
| 1417 | if (rc != ENXIO) |
| 1418 | break; |
| 1419 | } |
| 1420 | mutex_unlock(&acpi_desc->init_mutex); |
| 1421 | return rc; |
| 1422 | } |
| 1423 | static DEVICE_ATTR_RO(format1); |
| 1424 | |
| 1425 | static ssize_t formats_show(struct device *dev, |
| 1426 | struct device_attribute *attr, char *buf) |
| 1427 | { |
| 1428 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1429 | |
| 1430 | return sprintf(buf, "%d\n", num_nvdimm_formats(nvdimm)); |
| 1431 | } |
| 1432 | static DEVICE_ATTR_RO(formats); |
| 1433 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1434 | static ssize_t serial_show(struct device *dev, |
| 1435 | struct device_attribute *attr, char *buf) |
| 1436 | { |
| 1437 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1438 | |
Toshi Kani | 5ad9a7f | 2016-04-25 15:34:58 -0600 | [diff] [blame] | 1439 | return sprintf(buf, "0x%08x\n", be32_to_cpu(dcr->serial_number)); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1440 | } |
| 1441 | static DEVICE_ATTR_RO(serial); |
| 1442 | |
Dan Williams | a94e3fb | 2016-04-28 18:18:05 -0700 | [diff] [blame] | 1443 | static ssize_t family_show(struct device *dev, |
| 1444 | struct device_attribute *attr, char *buf) |
| 1445 | { |
| 1446 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1447 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1448 | |
| 1449 | if (nfit_mem->family < 0) |
| 1450 | return -ENXIO; |
| 1451 | return sprintf(buf, "%d\n", nfit_mem->family); |
| 1452 | } |
| 1453 | static DEVICE_ATTR_RO(family); |
| 1454 | |
| 1455 | static ssize_t dsm_mask_show(struct device *dev, |
| 1456 | struct device_attribute *attr, char *buf) |
| 1457 | { |
| 1458 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1459 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1460 | |
| 1461 | if (nfit_mem->family < 0) |
| 1462 | return -ENXIO; |
| 1463 | return sprintf(buf, "%#lx\n", nfit_mem->dsm_mask); |
| 1464 | } |
| 1465 | static DEVICE_ATTR_RO(dsm_mask); |
| 1466 | |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1467 | static ssize_t flags_show(struct device *dev, |
| 1468 | struct device_attribute *attr, char *buf) |
| 1469 | { |
| 1470 | u16 flags = to_nfit_memdev(dev)->flags; |
| 1471 | |
Dan Williams | ffab938 | 2017-04-13 15:05:30 -0700 | [diff] [blame] | 1472 | return sprintf(buf, "%s%s%s%s%s%s%s\n", |
Toshi Kani | 402bae5 | 2015-08-26 10:20:23 -0600 | [diff] [blame] | 1473 | flags & ACPI_NFIT_MEM_SAVE_FAILED ? "save_fail " : "", |
| 1474 | flags & ACPI_NFIT_MEM_RESTORE_FAILED ? "restore_fail " : "", |
| 1475 | flags & ACPI_NFIT_MEM_FLUSH_FAILED ? "flush_fail " : "", |
Bob Moore | ca321d1 | 2015-10-19 10:24:52 +0800 | [diff] [blame] | 1476 | flags & ACPI_NFIT_MEM_NOT_ARMED ? "not_armed " : "", |
Dan Williams | ffab938 | 2017-04-13 15:05:30 -0700 | [diff] [blame] | 1477 | flags & ACPI_NFIT_MEM_HEALTH_OBSERVED ? "smart_event " : "", |
| 1478 | flags & ACPI_NFIT_MEM_MAP_FAILED ? "map_fail " : "", |
| 1479 | flags & ACPI_NFIT_MEM_HEALTH_ENABLED ? "smart_notify " : ""); |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1480 | } |
| 1481 | static DEVICE_ATTR_RO(flags); |
| 1482 | |
Toshi Kani | 38a879b | 2016-04-25 15:34:59 -0600 | [diff] [blame] | 1483 | static ssize_t id_show(struct device *dev, |
| 1484 | struct device_attribute *attr, char *buf) |
| 1485 | { |
| 1486 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1487 | |
| 1488 | if (dcr->valid_fields & ACPI_NFIT_CONTROL_MFG_INFO_VALID) |
| 1489 | return sprintf(buf, "%04x-%02x-%04x-%08x\n", |
| 1490 | be16_to_cpu(dcr->vendor_id), |
| 1491 | dcr->manufacturing_location, |
| 1492 | be16_to_cpu(dcr->manufacturing_date), |
| 1493 | be32_to_cpu(dcr->serial_number)); |
| 1494 | else |
| 1495 | return sprintf(buf, "%04x-%08x\n", |
| 1496 | be16_to_cpu(dcr->vendor_id), |
| 1497 | be32_to_cpu(dcr->serial_number)); |
| 1498 | } |
| 1499 | static DEVICE_ATTR_RO(id); |
| 1500 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1501 | static struct attribute *acpi_nfit_dimm_attributes[] = { |
| 1502 | &dev_attr_handle.attr, |
| 1503 | &dev_attr_phys_id.attr, |
| 1504 | &dev_attr_vendor.attr, |
| 1505 | &dev_attr_device.attr, |
Dan Williams | 6ca7208 | 2016-04-29 10:33:23 -0700 | [diff] [blame] | 1506 | &dev_attr_rev_id.attr, |
| 1507 | &dev_attr_subsystem_vendor.attr, |
| 1508 | &dev_attr_subsystem_device.attr, |
| 1509 | &dev_attr_subsystem_rev_id.attr, |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1510 | &dev_attr_format.attr, |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1511 | &dev_attr_formats.attr, |
| 1512 | &dev_attr_format1.attr, |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1513 | &dev_attr_serial.attr, |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1514 | &dev_attr_flags.attr, |
Toshi Kani | 38a879b | 2016-04-25 15:34:59 -0600 | [diff] [blame] | 1515 | &dev_attr_id.attr, |
Dan Williams | a94e3fb | 2016-04-28 18:18:05 -0700 | [diff] [blame] | 1516 | &dev_attr_family.attr, |
| 1517 | &dev_attr_dsm_mask.attr, |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1518 | NULL, |
| 1519 | }; |
| 1520 | |
| 1521 | static umode_t acpi_nfit_dimm_attr_visible(struct kobject *kobj, |
| 1522 | struct attribute *a, int n) |
| 1523 | { |
| 1524 | struct device *dev = container_of(kobj, struct device, kobj); |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1525 | struct nvdimm *nvdimm = to_nvdimm(dev); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1526 | |
Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1527 | if (!to_nfit_dcr(dev)) { |
| 1528 | /* Without a dcr only the memdev attributes can be surfaced */ |
| 1529 | if (a == &dev_attr_handle.attr || a == &dev_attr_phys_id.attr |
| 1530 | || a == &dev_attr_flags.attr |
| 1531 | || a == &dev_attr_family.attr |
| 1532 | || a == &dev_attr_dsm_mask.attr) |
| 1533 | return a->mode; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1534 | return 0; |
Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1535 | } |
| 1536 | |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1537 | if (a == &dev_attr_format1.attr && num_nvdimm_formats(nvdimm) <= 1) |
| 1538 | return 0; |
| 1539 | return a->mode; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1540 | } |
| 1541 | |
Arvind Yadav | 5e93746 | 2017-06-22 15:44:41 +0530 | [diff] [blame] | 1542 | static const struct attribute_group acpi_nfit_dimm_attribute_group = { |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1543 | .name = "nfit", |
| 1544 | .attrs = acpi_nfit_dimm_attributes, |
| 1545 | .is_visible = acpi_nfit_dimm_attr_visible, |
| 1546 | }; |
| 1547 | |
| 1548 | static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = { |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1549 | &nvdimm_attribute_group, |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 1550 | &nd_device_attribute_group, |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1551 | &acpi_nfit_dimm_attribute_group, |
| 1552 | NULL, |
| 1553 | }; |
| 1554 | |
| 1555 | static struct nvdimm *acpi_nfit_dimm_by_handle(struct acpi_nfit_desc *acpi_desc, |
| 1556 | u32 device_handle) |
| 1557 | { |
| 1558 | struct nfit_mem *nfit_mem; |
| 1559 | |
| 1560 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) |
| 1561 | if (__to_nfit_memdev(nfit_mem)->device_handle == device_handle) |
| 1562 | return nfit_mem->nvdimm; |
| 1563 | |
| 1564 | return NULL; |
| 1565 | } |
| 1566 | |
Dan Williams | 231bf11 | 2016-08-22 19:23:25 -0700 | [diff] [blame] | 1567 | void __acpi_nvdimm_notify(struct device *dev, u32 event) |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1568 | { |
| 1569 | struct nfit_mem *nfit_mem; |
| 1570 | struct acpi_nfit_desc *acpi_desc; |
| 1571 | |
| 1572 | dev_dbg(dev->parent, "%s: %s: event: %d\n", dev_name(dev), __func__, |
| 1573 | event); |
| 1574 | |
| 1575 | if (event != NFIT_NOTIFY_DIMM_HEALTH) { |
| 1576 | dev_dbg(dev->parent, "%s: unknown event: %d\n", dev_name(dev), |
| 1577 | event); |
| 1578 | return; |
| 1579 | } |
| 1580 | |
| 1581 | acpi_desc = dev_get_drvdata(dev->parent); |
| 1582 | if (!acpi_desc) |
| 1583 | return; |
| 1584 | |
| 1585 | /* |
| 1586 | * If we successfully retrieved acpi_desc, then we know nfit_mem data |
| 1587 | * is still valid. |
| 1588 | */ |
| 1589 | nfit_mem = dev_get_drvdata(dev); |
| 1590 | if (nfit_mem && nfit_mem->flags_attr) |
| 1591 | sysfs_notify_dirent(nfit_mem->flags_attr); |
| 1592 | } |
Dan Williams | 231bf11 | 2016-08-22 19:23:25 -0700 | [diff] [blame] | 1593 | EXPORT_SYMBOL_GPL(__acpi_nvdimm_notify); |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1594 | |
| 1595 | static void acpi_nvdimm_notify(acpi_handle handle, u32 event, void *data) |
| 1596 | { |
| 1597 | struct acpi_device *adev = data; |
| 1598 | struct device *dev = &adev->dev; |
| 1599 | |
| 1600 | device_lock(dev->parent); |
| 1601 | __acpi_nvdimm_notify(dev, event); |
| 1602 | device_unlock(dev->parent); |
| 1603 | } |
| 1604 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1605 | static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc, |
| 1606 | struct nfit_mem *nfit_mem, u32 device_handle) |
| 1607 | { |
| 1608 | struct acpi_device *adev, *adev_dimm; |
| 1609 | struct device *dev = acpi_desc->dev; |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 1610 | union acpi_object *obj; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1611 | unsigned long dsm_mask; |
Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 1612 | const guid_t *guid; |
Linda Knippers | 60e95f4 | 2015-07-22 16:17:22 -0400 | [diff] [blame] | 1613 | int i; |
Linda Knippers | ba650cf | 2017-03-07 16:35:13 -0500 | [diff] [blame] | 1614 | int family = -1; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1615 | |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 1616 | /* nfit test assumes 1:1 relationship between commands and dsms */ |
| 1617 | nfit_mem->dsm_mask = acpi_desc->dimm_cmd_force_en; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1618 | nfit_mem->family = NVDIMM_FAMILY_INTEL; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1619 | adev = to_acpi_dev(acpi_desc); |
| 1620 | if (!adev) |
| 1621 | return 0; |
| 1622 | |
| 1623 | adev_dimm = acpi_find_child_device(adev, device_handle, false); |
| 1624 | nfit_mem->adev = adev_dimm; |
| 1625 | if (!adev_dimm) { |
| 1626 | dev_err(dev, "no ACPI.NFIT device with _ADR %#x, disabling...\n", |
| 1627 | device_handle); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 1628 | return force_enable_dimms ? 0 : -ENODEV; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1629 | } |
| 1630 | |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1631 | if (ACPI_FAILURE(acpi_install_notify_handler(adev_dimm->handle, |
| 1632 | ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify, adev_dimm))) { |
| 1633 | dev_err(dev, "%s: notification registration failed\n", |
| 1634 | dev_name(&adev_dimm->dev)); |
| 1635 | return -ENXIO; |
| 1636 | } |
| 1637 | |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1638 | /* |
stuart hayes | e02fb72 | 2016-05-26 11:38:41 -0500 | [diff] [blame] | 1639 | * Until standardization materializes we need to consider 4 |
Dan Williams | a722559 | 2016-07-19 12:32:39 -0700 | [diff] [blame] | 1640 | * different command sets. Note, that checking for function0 (bit0) |
Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 1641 | * tells us if any commands are reachable through this GUID. |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1642 | */ |
stuart hayes | e02fb72 | 2016-05-26 11:38:41 -0500 | [diff] [blame] | 1643 | for (i = NVDIMM_FAMILY_INTEL; i <= NVDIMM_FAMILY_MSFT; i++) |
Dan Williams | a722559 | 2016-07-19 12:32:39 -0700 | [diff] [blame] | 1644 | if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 1)) |
Linda Knippers | ba650cf | 2017-03-07 16:35:13 -0500 | [diff] [blame] | 1645 | if (family < 0 || i == default_dsm_family) |
| 1646 | family = i; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1647 | |
| 1648 | /* limit the supported commands to those that are publicly documented */ |
Linda Knippers | ba650cf | 2017-03-07 16:35:13 -0500 | [diff] [blame] | 1649 | nfit_mem->family = family; |
Linda Knippers | 095ab4b | 2017-03-07 16:35:12 -0500 | [diff] [blame] | 1650 | if (override_dsm_mask && !disable_vendor_specific) |
| 1651 | dsm_mask = override_dsm_mask; |
| 1652 | else if (nfit_mem->family == NVDIMM_FAMILY_INTEL) { |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1653 | dsm_mask = 0x3fe; |
Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 1654 | if (disable_vendor_specific) |
| 1655 | dsm_mask &= ~(1 << ND_CMD_VENDOR); |
stuart hayes | e02fb72 | 2016-05-26 11:38:41 -0500 | [diff] [blame] | 1656 | } else if (nfit_mem->family == NVDIMM_FAMILY_HPE1) { |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1657 | dsm_mask = 0x1c3c76; |
stuart hayes | e02fb72 | 2016-05-26 11:38:41 -0500 | [diff] [blame] | 1658 | } else if (nfit_mem->family == NVDIMM_FAMILY_HPE2) { |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1659 | dsm_mask = 0x1fe; |
Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 1660 | if (disable_vendor_specific) |
| 1661 | dsm_mask &= ~(1 << 8); |
stuart hayes | e02fb72 | 2016-05-26 11:38:41 -0500 | [diff] [blame] | 1662 | } else if (nfit_mem->family == NVDIMM_FAMILY_MSFT) { |
| 1663 | dsm_mask = 0xffffffff; |
Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 1664 | } else { |
Dan Williams | a722559 | 2016-07-19 12:32:39 -0700 | [diff] [blame] | 1665 | dev_dbg(dev, "unknown dimm command family\n"); |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1666 | nfit_mem->family = -1; |
Dan Williams | a722559 | 2016-07-19 12:32:39 -0700 | [diff] [blame] | 1667 | /* DSMs are optional, continue loading the driver... */ |
| 1668 | return 0; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1669 | } |
| 1670 | |
Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 1671 | guid = to_nfit_uuid(nfit_mem->family); |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1672 | for_each_set_bit(i, &dsm_mask, BITS_PER_LONG) |
Andy Shevchenko | 94116f8 | 2017-06-05 19:40:46 +0300 | [diff] [blame] | 1673 | if (acpi_check_dsm(adev_dimm->handle, guid, 1, 1ULL << i)) |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1674 | set_bit(i, &nfit_mem->dsm_mask); |
| 1675 | |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 1676 | obj = acpi_label_info(adev_dimm->handle); |
| 1677 | if (obj) { |
| 1678 | ACPI_FREE(obj); |
| 1679 | nfit_mem->has_lsi = 1; |
| 1680 | dev_dbg(dev, "%s: has _LSI\n", dev_name(&adev_dimm->dev)); |
| 1681 | } |
| 1682 | |
| 1683 | obj = acpi_label_read(adev_dimm->handle, 0, 0); |
| 1684 | if (obj) { |
| 1685 | ACPI_FREE(obj); |
| 1686 | nfit_mem->has_lsr = 1; |
| 1687 | dev_dbg(dev, "%s: has _LSR\n", dev_name(&adev_dimm->dev)); |
| 1688 | } |
| 1689 | |
| 1690 | obj = acpi_label_write(adev_dimm->handle, 0, 0, NULL); |
| 1691 | if (obj) { |
| 1692 | ACPI_FREE(obj); |
| 1693 | nfit_mem->has_lsw = 1; |
| 1694 | dev_dbg(dev, "%s: has _LSW\n", dev_name(&adev_dimm->dev)); |
| 1695 | } |
| 1696 | |
Linda Knippers | 60e95f4 | 2015-07-22 16:17:22 -0400 | [diff] [blame] | 1697 | return 0; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1698 | } |
| 1699 | |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1700 | static void shutdown_dimm_notify(void *data) |
| 1701 | { |
| 1702 | struct acpi_nfit_desc *acpi_desc = data; |
| 1703 | struct nfit_mem *nfit_mem; |
| 1704 | |
| 1705 | mutex_lock(&acpi_desc->init_mutex); |
| 1706 | /* |
| 1707 | * Clear out the nfit_mem->flags_attr and shut down dimm event |
| 1708 | * notifications. |
| 1709 | */ |
| 1710 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { |
Dan Williams | 231bf11 | 2016-08-22 19:23:25 -0700 | [diff] [blame] | 1711 | struct acpi_device *adev_dimm = nfit_mem->adev; |
| 1712 | |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1713 | if (nfit_mem->flags_attr) { |
| 1714 | sysfs_put(nfit_mem->flags_attr); |
| 1715 | nfit_mem->flags_attr = NULL; |
| 1716 | } |
Dan Williams | 231bf11 | 2016-08-22 19:23:25 -0700 | [diff] [blame] | 1717 | if (adev_dimm) |
| 1718 | acpi_remove_notify_handler(adev_dimm->handle, |
| 1719 | ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify); |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1720 | } |
| 1721 | mutex_unlock(&acpi_desc->init_mutex); |
| 1722 | } |
| 1723 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1724 | static int acpi_nfit_register_dimms(struct acpi_nfit_desc *acpi_desc) |
| 1725 | { |
| 1726 | struct nfit_mem *nfit_mem; |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1727 | int dimm_count = 0, rc; |
| 1728 | struct nvdimm *nvdimm; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1729 | |
| 1730 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { |
Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 1731 | struct acpi_nfit_flush_address *flush; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1732 | unsigned long flags = 0, cmd_mask; |
Dan Williams | caa603a | 2017-04-14 10:27:11 -0700 | [diff] [blame] | 1733 | struct nfit_memdev *nfit_memdev; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1734 | u32 device_handle; |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1735 | u16 mem_flags; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1736 | |
| 1737 | device_handle = __to_nfit_memdev(nfit_mem)->device_handle; |
| 1738 | nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, device_handle); |
| 1739 | if (nvdimm) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 1740 | dimm_count++; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1741 | continue; |
| 1742 | } |
| 1743 | |
| 1744 | if (nfit_mem->bdw && nfit_mem->memdev_pmem) |
Dan Williams | 8f078b3 | 2017-05-04 14:01:24 -0700 | [diff] [blame] | 1745 | set_bit(NDD_ALIASING, &flags); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1746 | |
Dan Williams | caa603a | 2017-04-14 10:27:11 -0700 | [diff] [blame] | 1747 | /* collate flags across all memdevs for this dimm */ |
| 1748 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 1749 | struct acpi_nfit_memory_map *dimm_memdev; |
| 1750 | |
| 1751 | dimm_memdev = __to_nfit_memdev(nfit_mem); |
| 1752 | if (dimm_memdev->device_handle |
| 1753 | != nfit_memdev->memdev->device_handle) |
| 1754 | continue; |
| 1755 | dimm_memdev->flags |= nfit_memdev->memdev->flags; |
| 1756 | } |
| 1757 | |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1758 | mem_flags = __to_nfit_memdev(nfit_mem)->flags; |
Bob Moore | ca321d1 | 2015-10-19 10:24:52 +0800 | [diff] [blame] | 1759 | if (mem_flags & ACPI_NFIT_MEM_NOT_ARMED) |
Dan Williams | 8f078b3 | 2017-05-04 14:01:24 -0700 | [diff] [blame] | 1760 | set_bit(NDD_UNARMED, &flags); |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1761 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1762 | rc = acpi_nfit_add_dimm(acpi_desc, nfit_mem, device_handle); |
| 1763 | if (rc) |
| 1764 | continue; |
| 1765 | |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 1766 | /* |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1767 | * TODO: provide translation for non-NVDIMM_FAMILY_INTEL |
| 1768 | * devices (i.e. from nd_cmd to acpi_dsm) to standardize the |
| 1769 | * userspace interface. |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 1770 | */ |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1771 | cmd_mask = 1UL << ND_CMD_CALL; |
| 1772 | if (nfit_mem->family == NVDIMM_FAMILY_INTEL) |
| 1773 | cmd_mask |= nfit_mem->dsm_mask; |
| 1774 | |
Dan Williams | 4b27db7 | 2017-09-24 09:57:34 -0700 | [diff] [blame] | 1775 | if (nfit_mem->has_lsi) |
| 1776 | set_bit(ND_CMD_GET_CONFIG_SIZE, &cmd_mask); |
| 1777 | if (nfit_mem->has_lsr) |
| 1778 | set_bit(ND_CMD_GET_CONFIG_DATA, &cmd_mask); |
| 1779 | if (nfit_mem->has_lsw) |
| 1780 | set_bit(ND_CMD_SET_CONFIG_DATA, &cmd_mask); |
| 1781 | |
Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 1782 | flush = nfit_mem->nfit_flush ? nfit_mem->nfit_flush->flush |
| 1783 | : NULL; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1784 | nvdimm = nvdimm_create(acpi_desc->nvdimm_bus, nfit_mem, |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1785 | acpi_nfit_dimm_attribute_groups, |
Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 1786 | flags, cmd_mask, flush ? flush->hint_count : 0, |
| 1787 | nfit_mem->flush_wpq); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1788 | if (!nvdimm) |
| 1789 | return -ENOMEM; |
| 1790 | |
| 1791 | nfit_mem->nvdimm = nvdimm; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 1792 | dimm_count++; |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1793 | |
| 1794 | if ((mem_flags & ACPI_NFIT_MEM_FAILED_MASK) == 0) |
| 1795 | continue; |
| 1796 | |
Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1797 | dev_info(acpi_desc->dev, "%s flags:%s%s%s%s%s\n", |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1798 | nvdimm_name(nvdimm), |
Toshi Kani | 402bae5 | 2015-08-26 10:20:23 -0600 | [diff] [blame] | 1799 | mem_flags & ACPI_NFIT_MEM_SAVE_FAILED ? " save_fail" : "", |
| 1800 | mem_flags & ACPI_NFIT_MEM_RESTORE_FAILED ? " restore_fail":"", |
| 1801 | mem_flags & ACPI_NFIT_MEM_FLUSH_FAILED ? " flush_fail" : "", |
Dan Williams | 1499934 | 2017-04-13 19:46:36 -0700 | [diff] [blame] | 1802 | mem_flags & ACPI_NFIT_MEM_NOT_ARMED ? " not_armed" : "", |
| 1803 | mem_flags & ACPI_NFIT_MEM_MAP_FAILED ? " map_fail" : ""); |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1804 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1805 | } |
| 1806 | |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 1807 | rc = nvdimm_bus_check_dimm_count(acpi_desc->nvdimm_bus, dimm_count); |
| 1808 | if (rc) |
| 1809 | return rc; |
| 1810 | |
| 1811 | /* |
| 1812 | * Now that dimms are successfully registered, and async registration |
| 1813 | * is flushed, attempt to enable event notification. |
| 1814 | */ |
| 1815 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { |
| 1816 | struct kernfs_node *nfit_kernfs; |
| 1817 | |
| 1818 | nvdimm = nfit_mem->nvdimm; |
| 1819 | nfit_kernfs = sysfs_get_dirent(nvdimm_kobj(nvdimm)->sd, "nfit"); |
| 1820 | if (nfit_kernfs) |
| 1821 | nfit_mem->flags_attr = sysfs_get_dirent(nfit_kernfs, |
| 1822 | "flags"); |
| 1823 | sysfs_put(nfit_kernfs); |
| 1824 | if (!nfit_mem->flags_attr) |
| 1825 | dev_warn(acpi_desc->dev, "%s: notifications disabled\n", |
| 1826 | nvdimm_name(nvdimm)); |
| 1827 | } |
| 1828 | |
| 1829 | return devm_add_action_or_reset(acpi_desc->dev, shutdown_dimm_notify, |
| 1830 | acpi_desc); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1831 | } |
| 1832 | |
Jerry Hoemann | 7db5bb3 | 2017-06-30 20:53:24 -0700 | [diff] [blame] | 1833 | /* |
| 1834 | * These constants are private because there are no kernel consumers of |
| 1835 | * these commands. |
| 1836 | */ |
| 1837 | enum nfit_aux_cmds { |
| 1838 | NFIT_CMD_TRANSLATE_SPA = 5, |
| 1839 | NFIT_CMD_ARS_INJECT_SET = 7, |
| 1840 | NFIT_CMD_ARS_INJECT_CLEAR = 8, |
| 1841 | NFIT_CMD_ARS_INJECT_GET = 9, |
| 1842 | }; |
| 1843 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1844 | static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc) |
| 1845 | { |
| 1846 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 1847 | const guid_t *guid = to_nfit_uuid(NFIT_DEV_BUS); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1848 | struct acpi_device *adev; |
Jerry Hoemann | 7db5bb3 | 2017-06-30 20:53:24 -0700 | [diff] [blame] | 1849 | unsigned long dsm_mask; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1850 | int i; |
| 1851 | |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 1852 | nd_desc->cmd_mask = acpi_desc->bus_cmd_force_en; |
Yasunori Goto | b37b3fd | 2017-09-22 16:47:40 +0900 | [diff] [blame] | 1853 | nd_desc->bus_dsm_mask = acpi_desc->bus_nfit_cmd_force_en; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1854 | adev = to_acpi_dev(acpi_desc); |
| 1855 | if (!adev) |
| 1856 | return; |
| 1857 | |
Dan Williams | d4f3236 | 2016-03-03 16:08:54 -0800 | [diff] [blame] | 1858 | for (i = ND_CMD_ARS_CAP; i <= ND_CMD_CLEAR_ERROR; i++) |
Andy Shevchenko | 94116f8 | 2017-06-05 19:40:46 +0300 | [diff] [blame] | 1859 | if (acpi_check_dsm(adev->handle, guid, 1, 1ULL << i)) |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 1860 | set_bit(i, &nd_desc->cmd_mask); |
Jerry Hoemann | 37d7484 | 2017-06-30 20:41:24 -0700 | [diff] [blame] | 1861 | set_bit(ND_CMD_CALL, &nd_desc->cmd_mask); |
Jerry Hoemann | 7db5bb3 | 2017-06-30 20:53:24 -0700 | [diff] [blame] | 1862 | |
| 1863 | dsm_mask = |
| 1864 | (1 << ND_CMD_ARS_CAP) | |
| 1865 | (1 << ND_CMD_ARS_START) | |
| 1866 | (1 << ND_CMD_ARS_STATUS) | |
| 1867 | (1 << ND_CMD_CLEAR_ERROR) | |
| 1868 | (1 << NFIT_CMD_TRANSLATE_SPA) | |
| 1869 | (1 << NFIT_CMD_ARS_INJECT_SET) | |
| 1870 | (1 << NFIT_CMD_ARS_INJECT_CLEAR) | |
| 1871 | (1 << NFIT_CMD_ARS_INJECT_GET); |
| 1872 | for_each_set_bit(i, &dsm_mask, BITS_PER_LONG) |
| 1873 | if (acpi_check_dsm(adev->handle, guid, 1, 1ULL << i)) |
| 1874 | set_bit(i, &nd_desc->bus_dsm_mask); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1875 | } |
| 1876 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1877 | static ssize_t range_index_show(struct device *dev, |
| 1878 | struct device_attribute *attr, char *buf) |
| 1879 | { |
| 1880 | struct nd_region *nd_region = to_nd_region(dev); |
| 1881 | struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region); |
| 1882 | |
| 1883 | return sprintf(buf, "%d\n", nfit_spa->spa->range_index); |
| 1884 | } |
| 1885 | static DEVICE_ATTR_RO(range_index); |
| 1886 | |
Dan Williams | a15797f | 2017-08-31 12:53:36 -0700 | [diff] [blame] | 1887 | static ssize_t ecc_unit_size_show(struct device *dev, |
| 1888 | struct device_attribute *attr, char *buf) |
| 1889 | { |
| 1890 | struct nd_region *nd_region = to_nd_region(dev); |
| 1891 | struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region); |
| 1892 | |
| 1893 | return sprintf(buf, "%d\n", nfit_spa->clear_err_unit); |
| 1894 | } |
| 1895 | static DEVICE_ATTR_RO(ecc_unit_size); |
| 1896 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1897 | static struct attribute *acpi_nfit_region_attributes[] = { |
| 1898 | &dev_attr_range_index.attr, |
Dan Williams | a15797f | 2017-08-31 12:53:36 -0700 | [diff] [blame] | 1899 | &dev_attr_ecc_unit_size.attr, |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1900 | NULL, |
| 1901 | }; |
| 1902 | |
Arvind Yadav | 5e93746 | 2017-06-22 15:44:41 +0530 | [diff] [blame] | 1903 | static const struct attribute_group acpi_nfit_region_attribute_group = { |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1904 | .name = "nfit", |
| 1905 | .attrs = acpi_nfit_region_attributes, |
| 1906 | }; |
| 1907 | |
| 1908 | static const struct attribute_group *acpi_nfit_region_attribute_groups[] = { |
| 1909 | &nd_region_attribute_group, |
| 1910 | &nd_mapping_attribute_group, |
Dan Williams | 3d88002 | 2015-05-31 15:02:11 -0400 | [diff] [blame] | 1911 | &nd_device_attribute_group, |
Toshi Kani | 74ae66c | 2015-06-19 12:18:34 -0600 | [diff] [blame] | 1912 | &nd_numa_attribute_group, |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1913 | &acpi_nfit_region_attribute_group, |
| 1914 | NULL, |
| 1915 | }; |
| 1916 | |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 1917 | /* enough info to uniquely specify an interleave set */ |
| 1918 | struct nfit_set_info { |
| 1919 | struct nfit_set_info_map { |
| 1920 | u64 region_offset; |
| 1921 | u32 serial_number; |
| 1922 | u32 pad; |
| 1923 | } mapping[0]; |
| 1924 | }; |
| 1925 | |
Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 1926 | struct nfit_set_info2 { |
| 1927 | struct nfit_set_info_map2 { |
| 1928 | u64 region_offset; |
| 1929 | u32 serial_number; |
| 1930 | u16 vendor_id; |
| 1931 | u16 manufacturing_date; |
| 1932 | u8 manufacturing_location; |
| 1933 | u8 reserved[31]; |
| 1934 | } mapping[0]; |
| 1935 | }; |
| 1936 | |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 1937 | static size_t sizeof_nfit_set_info(int num_mappings) |
| 1938 | { |
| 1939 | return sizeof(struct nfit_set_info) |
| 1940 | + num_mappings * sizeof(struct nfit_set_info_map); |
| 1941 | } |
| 1942 | |
Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 1943 | static size_t sizeof_nfit_set_info2(int num_mappings) |
| 1944 | { |
| 1945 | return sizeof(struct nfit_set_info2) |
| 1946 | + num_mappings * sizeof(struct nfit_set_info_map2); |
| 1947 | } |
| 1948 | |
Dan Williams | 86ef58a | 2017-02-28 18:32:48 -0800 | [diff] [blame] | 1949 | static int cmp_map_compat(const void *m0, const void *m1) |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 1950 | { |
| 1951 | const struct nfit_set_info_map *map0 = m0; |
| 1952 | const struct nfit_set_info_map *map1 = m1; |
| 1953 | |
| 1954 | return memcmp(&map0->region_offset, &map1->region_offset, |
| 1955 | sizeof(u64)); |
| 1956 | } |
| 1957 | |
Dan Williams | 86ef58a | 2017-02-28 18:32:48 -0800 | [diff] [blame] | 1958 | static int cmp_map(const void *m0, const void *m1) |
| 1959 | { |
| 1960 | const struct nfit_set_info_map *map0 = m0; |
| 1961 | const struct nfit_set_info_map *map1 = m1; |
| 1962 | |
Dan Williams | b03b99a | 2017-03-27 21:53:38 -0700 | [diff] [blame] | 1963 | if (map0->region_offset < map1->region_offset) |
| 1964 | return -1; |
| 1965 | else if (map0->region_offset > map1->region_offset) |
| 1966 | return 1; |
| 1967 | return 0; |
Dan Williams | 86ef58a | 2017-02-28 18:32:48 -0800 | [diff] [blame] | 1968 | } |
| 1969 | |
Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 1970 | static int cmp_map2(const void *m0, const void *m1) |
| 1971 | { |
| 1972 | const struct nfit_set_info_map2 *map0 = m0; |
| 1973 | const struct nfit_set_info_map2 *map1 = m1; |
| 1974 | |
| 1975 | if (map0->region_offset < map1->region_offset) |
| 1976 | return -1; |
| 1977 | else if (map0->region_offset > map1->region_offset) |
| 1978 | return 1; |
| 1979 | return 0; |
| 1980 | } |
| 1981 | |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 1982 | /* Retrieve the nth entry referencing this spa */ |
| 1983 | static struct acpi_nfit_memory_map *memdev_from_spa( |
| 1984 | struct acpi_nfit_desc *acpi_desc, u16 range_index, int n) |
| 1985 | { |
| 1986 | struct nfit_memdev *nfit_memdev; |
| 1987 | |
| 1988 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) |
| 1989 | if (nfit_memdev->memdev->range_index == range_index) |
| 1990 | if (n-- == 0) |
| 1991 | return nfit_memdev->memdev; |
| 1992 | return NULL; |
| 1993 | } |
| 1994 | |
| 1995 | static int acpi_nfit_init_interleave_set(struct acpi_nfit_desc *acpi_desc, |
| 1996 | struct nd_region_desc *ndr_desc, |
| 1997 | struct acpi_nfit_system_address *spa) |
| 1998 | { |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 1999 | struct device *dev = acpi_desc->dev; |
| 2000 | struct nd_interleave_set *nd_set; |
| 2001 | u16 nr = ndr_desc->num_mappings; |
Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2002 | struct nfit_set_info2 *info2; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2003 | struct nfit_set_info *info; |
Dan Williams | 8f2bc24 | 2017-06-06 11:39:30 -0700 | [diff] [blame] | 2004 | int i; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2005 | |
Dan Williams | faec6f8 | 2017-06-06 11:10:51 -0700 | [diff] [blame] | 2006 | nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL); |
| 2007 | if (!nd_set) |
| 2008 | return -ENOMEM; |
| 2009 | ndr_desc->nd_set = nd_set; |
| 2010 | guid_copy(&nd_set->type_guid, (guid_t *) spa->range_guid); |
| 2011 | |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2012 | info = devm_kzalloc(dev, sizeof_nfit_set_info(nr), GFP_KERNEL); |
| 2013 | if (!info) |
| 2014 | return -ENOMEM; |
Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2015 | |
| 2016 | info2 = devm_kzalloc(dev, sizeof_nfit_set_info2(nr), GFP_KERNEL); |
| 2017 | if (!info2) |
| 2018 | return -ENOMEM; |
| 2019 | |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2020 | for (i = 0; i < nr; i++) { |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2021 | struct nd_mapping_desc *mapping = &ndr_desc->mapping[i]; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2022 | struct nfit_set_info_map *map = &info->mapping[i]; |
Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2023 | struct nfit_set_info_map2 *map2 = &info2->mapping[i]; |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2024 | struct nvdimm *nvdimm = mapping->nvdimm; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2025 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 2026 | struct acpi_nfit_memory_map *memdev = memdev_from_spa(acpi_desc, |
| 2027 | spa->range_index, i); |
Dan Williams | dcb79b1 | 2017-08-07 14:27:57 -0700 | [diff] [blame] | 2028 | struct acpi_nfit_control_region *dcr = nfit_mem->dcr; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2029 | |
| 2030 | if (!memdev || !nfit_mem->dcr) { |
| 2031 | dev_err(dev, "%s: failed to find DCR\n", __func__); |
| 2032 | return -ENODEV; |
| 2033 | } |
| 2034 | |
| 2035 | map->region_offset = memdev->region_offset; |
Dan Williams | dcb79b1 | 2017-08-07 14:27:57 -0700 | [diff] [blame] | 2036 | map->serial_number = dcr->serial_number; |
Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2037 | |
| 2038 | map2->region_offset = memdev->region_offset; |
Dan Williams | dcb79b1 | 2017-08-07 14:27:57 -0700 | [diff] [blame] | 2039 | map2->serial_number = dcr->serial_number; |
| 2040 | map2->vendor_id = dcr->vendor_id; |
| 2041 | map2->manufacturing_date = dcr->manufacturing_date; |
| 2042 | map2->manufacturing_location = dcr->manufacturing_location; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2043 | } |
| 2044 | |
Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2045 | /* v1.1 namespaces */ |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2046 | sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map), |
| 2047 | cmp_map, NULL); |
Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2048 | nd_set->cookie1 = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0); |
Dan Williams | 86ef58a | 2017-02-28 18:32:48 -0800 | [diff] [blame] | 2049 | |
Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2050 | /* v1.2 namespaces */ |
| 2051 | sort(&info2->mapping[0], nr, sizeof(struct nfit_set_info_map2), |
| 2052 | cmp_map2, NULL); |
| 2053 | nd_set->cookie2 = nd_fletcher64(info2, sizeof_nfit_set_info2(nr), 0); |
| 2054 | |
| 2055 | /* support v1.1 namespaces created with the wrong sort order */ |
Dan Williams | 86ef58a | 2017-02-28 18:32:48 -0800 | [diff] [blame] | 2056 | sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map), |
| 2057 | cmp_map_compat, NULL); |
| 2058 | nd_set->altcookie = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0); |
| 2059 | |
Dan Williams | 401c0a1 | 2017-08-04 17:20:16 -0700 | [diff] [blame] | 2060 | /* record the result of the sort for the mapping position */ |
| 2061 | for (i = 0; i < nr; i++) { |
| 2062 | struct nfit_set_info_map2 *map2 = &info2->mapping[i]; |
| 2063 | int j; |
| 2064 | |
| 2065 | for (j = 0; j < nr; j++) { |
| 2066 | struct nd_mapping_desc *mapping = &ndr_desc->mapping[j]; |
| 2067 | struct nvdimm *nvdimm = mapping->nvdimm; |
| 2068 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
Dan Williams | dcb79b1 | 2017-08-07 14:27:57 -0700 | [diff] [blame] | 2069 | struct acpi_nfit_control_region *dcr = nfit_mem->dcr; |
Dan Williams | 401c0a1 | 2017-08-04 17:20:16 -0700 | [diff] [blame] | 2070 | |
Dan Williams | dcb79b1 | 2017-08-07 14:27:57 -0700 | [diff] [blame] | 2071 | if (map2->serial_number == dcr->serial_number && |
| 2072 | map2->vendor_id == dcr->vendor_id && |
| 2073 | map2->manufacturing_date == dcr->manufacturing_date && |
Dan Williams | 401c0a1 | 2017-08-04 17:20:16 -0700 | [diff] [blame] | 2074 | map2->manufacturing_location |
Dan Williams | dcb79b1 | 2017-08-07 14:27:57 -0700 | [diff] [blame] | 2075 | == dcr->manufacturing_location) { |
Dan Williams | 401c0a1 | 2017-08-04 17:20:16 -0700 | [diff] [blame] | 2076 | mapping->position = i; |
| 2077 | break; |
| 2078 | } |
| 2079 | } |
| 2080 | } |
| 2081 | |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2082 | ndr_desc->nd_set = nd_set; |
| 2083 | devm_kfree(dev, info); |
Dan Williams | c12c48c | 2017-06-04 10:59:15 +0900 | [diff] [blame] | 2084 | devm_kfree(dev, info2); |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2085 | |
| 2086 | return 0; |
| 2087 | } |
| 2088 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2089 | static u64 to_interleave_offset(u64 offset, struct nfit_blk_mmio *mmio) |
| 2090 | { |
| 2091 | struct acpi_nfit_interleave *idt = mmio->idt; |
| 2092 | u32 sub_line_offset, line_index, line_offset; |
| 2093 | u64 line_no, table_skip_count, table_offset; |
| 2094 | |
| 2095 | line_no = div_u64_rem(offset, mmio->line_size, &sub_line_offset); |
| 2096 | table_skip_count = div_u64_rem(line_no, mmio->num_lines, &line_index); |
| 2097 | line_offset = idt->line_offset[line_index] |
| 2098 | * mmio->line_size; |
| 2099 | table_offset = table_skip_count * mmio->table_size; |
| 2100 | |
| 2101 | return mmio->base_offset + line_offset + table_offset + sub_line_offset; |
| 2102 | } |
| 2103 | |
Ross Zwisler | de4a196 | 2015-08-20 16:27:38 -0600 | [diff] [blame] | 2104 | static u32 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw) |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2105 | { |
| 2106 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; |
| 2107 | u64 offset = nfit_blk->stat_offset + mmio->size * bw; |
Ross Zwisler | 68202c9 | 2016-07-29 14:59:12 -0600 | [diff] [blame] | 2108 | const u32 STATUS_MASK = 0x80000037; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2109 | |
| 2110 | if (mmio->num_lines) |
| 2111 | offset = to_interleave_offset(offset, mmio); |
| 2112 | |
Ross Zwisler | 68202c9 | 2016-07-29 14:59:12 -0600 | [diff] [blame] | 2113 | return readl(mmio->addr.base + offset) & STATUS_MASK; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2114 | } |
| 2115 | |
| 2116 | static void write_blk_ctl(struct nfit_blk *nfit_blk, unsigned int bw, |
| 2117 | resource_size_t dpa, unsigned int len, unsigned int write) |
| 2118 | { |
| 2119 | u64 cmd, offset; |
| 2120 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; |
| 2121 | |
| 2122 | enum { |
| 2123 | BCW_OFFSET_MASK = (1ULL << 48)-1, |
| 2124 | BCW_LEN_SHIFT = 48, |
| 2125 | BCW_LEN_MASK = (1ULL << 8) - 1, |
| 2126 | BCW_CMD_SHIFT = 56, |
| 2127 | }; |
| 2128 | |
| 2129 | cmd = (dpa >> L1_CACHE_SHIFT) & BCW_OFFSET_MASK; |
| 2130 | len = len >> L1_CACHE_SHIFT; |
| 2131 | cmd |= ((u64) len & BCW_LEN_MASK) << BCW_LEN_SHIFT; |
| 2132 | cmd |= ((u64) write) << BCW_CMD_SHIFT; |
| 2133 | |
| 2134 | offset = nfit_blk->cmd_offset + mmio->size * bw; |
| 2135 | if (mmio->num_lines) |
| 2136 | offset = to_interleave_offset(offset, mmio); |
| 2137 | |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 2138 | writeq(cmd, mmio->addr.base + offset); |
Dan Williams | f284a4f | 2016-07-07 19:44:50 -0700 | [diff] [blame] | 2139 | nvdimm_flush(nfit_blk->nd_region); |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 2140 | |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2141 | if (nfit_blk->dimm_flags & NFIT_BLK_DCR_LATCH) |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 2142 | readq(mmio->addr.base + offset); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2143 | } |
| 2144 | |
| 2145 | static int acpi_nfit_blk_single_io(struct nfit_blk *nfit_blk, |
| 2146 | resource_size_t dpa, void *iobuf, size_t len, int rw, |
| 2147 | unsigned int lane) |
| 2148 | { |
| 2149 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW]; |
| 2150 | unsigned int copied = 0; |
| 2151 | u64 base_offset; |
| 2152 | int rc; |
| 2153 | |
| 2154 | base_offset = nfit_blk->bdw_offset + dpa % L1_CACHE_BYTES |
| 2155 | + lane * mmio->size; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2156 | write_blk_ctl(nfit_blk, lane, dpa, len, rw); |
| 2157 | while (len) { |
| 2158 | unsigned int c; |
| 2159 | u64 offset; |
| 2160 | |
| 2161 | if (mmio->num_lines) { |
| 2162 | u32 line_offset; |
| 2163 | |
| 2164 | offset = to_interleave_offset(base_offset + copied, |
| 2165 | mmio); |
| 2166 | div_u64_rem(offset, mmio->line_size, &line_offset); |
| 2167 | c = min_t(size_t, len, mmio->line_size - line_offset); |
| 2168 | } else { |
| 2169 | offset = base_offset + nfit_blk->bdw_offset; |
| 2170 | c = len; |
| 2171 | } |
| 2172 | |
| 2173 | if (rw) |
Dan Williams | 0aed55a | 2017-05-29 12:22:50 -0700 | [diff] [blame] | 2174 | memcpy_flushcache(mmio->addr.aperture + offset, iobuf + copied, c); |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 2175 | else { |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2176 | if (nfit_blk->dimm_flags & NFIT_BLK_READ_FLUSH) |
Robin Murphy | 5deb67f | 2017-08-31 12:27:09 +0100 | [diff] [blame] | 2177 | arch_invalidate_pmem((void __force *) |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 2178 | mmio->addr.aperture + offset, c); |
| 2179 | |
Dan Williams | 6abccd1 | 2017-01-13 14:14:23 -0800 | [diff] [blame] | 2180 | memcpy(iobuf + copied, mmio->addr.aperture + offset, c); |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 2181 | } |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2182 | |
| 2183 | copied += c; |
| 2184 | len -= c; |
| 2185 | } |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 2186 | |
| 2187 | if (rw) |
Dan Williams | f284a4f | 2016-07-07 19:44:50 -0700 | [diff] [blame] | 2188 | nvdimm_flush(nfit_blk->nd_region); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 2189 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2190 | rc = read_blk_stat(nfit_blk, lane) ? -EIO : 0; |
| 2191 | return rc; |
| 2192 | } |
| 2193 | |
| 2194 | static int acpi_nfit_blk_region_do_io(struct nd_blk_region *ndbr, |
| 2195 | resource_size_t dpa, void *iobuf, u64 len, int rw) |
| 2196 | { |
| 2197 | struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr); |
| 2198 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW]; |
| 2199 | struct nd_region *nd_region = nfit_blk->nd_region; |
| 2200 | unsigned int lane, copied = 0; |
| 2201 | int rc = 0; |
| 2202 | |
| 2203 | lane = nd_region_acquire_lane(nd_region); |
| 2204 | while (len) { |
| 2205 | u64 c = min(len, mmio->size); |
| 2206 | |
| 2207 | rc = acpi_nfit_blk_single_io(nfit_blk, dpa + copied, |
| 2208 | iobuf + copied, c, rw, lane); |
| 2209 | if (rc) |
| 2210 | break; |
| 2211 | |
| 2212 | copied += c; |
| 2213 | len -= c; |
| 2214 | } |
| 2215 | nd_region_release_lane(nd_region, lane); |
| 2216 | |
| 2217 | return rc; |
| 2218 | } |
| 2219 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2220 | static int nfit_blk_init_interleave(struct nfit_blk_mmio *mmio, |
| 2221 | struct acpi_nfit_interleave *idt, u16 interleave_ways) |
| 2222 | { |
| 2223 | if (idt) { |
| 2224 | mmio->num_lines = idt->line_count; |
| 2225 | mmio->line_size = idt->line_size; |
| 2226 | if (interleave_ways == 0) |
| 2227 | return -ENXIO; |
| 2228 | mmio->table_size = mmio->num_lines * interleave_ways |
| 2229 | * mmio->line_size; |
| 2230 | } |
| 2231 | |
| 2232 | return 0; |
| 2233 | } |
| 2234 | |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 2235 | static int acpi_nfit_blk_get_flags(struct nvdimm_bus_descriptor *nd_desc, |
| 2236 | struct nvdimm *nvdimm, struct nfit_blk *nfit_blk) |
| 2237 | { |
| 2238 | struct nd_cmd_dimm_flags flags; |
| 2239 | int rc; |
| 2240 | |
| 2241 | memset(&flags, 0, sizeof(flags)); |
| 2242 | rc = nd_desc->ndctl(nd_desc, nvdimm, ND_CMD_DIMM_FLAGS, &flags, |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2243 | sizeof(flags), NULL); |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 2244 | |
| 2245 | if (rc >= 0 && flags.status == 0) |
| 2246 | nfit_blk->dimm_flags = flags.flags; |
| 2247 | else if (rc == -ENOTTY) { |
| 2248 | /* fall back to a conservative default */ |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2249 | nfit_blk->dimm_flags = NFIT_BLK_DCR_LATCH | NFIT_BLK_READ_FLUSH; |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 2250 | rc = 0; |
| 2251 | } else |
| 2252 | rc = -ENXIO; |
| 2253 | |
| 2254 | return rc; |
| 2255 | } |
| 2256 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2257 | static int acpi_nfit_blk_region_enable(struct nvdimm_bus *nvdimm_bus, |
| 2258 | struct device *dev) |
| 2259 | { |
| 2260 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2261 | struct nd_blk_region *ndbr = to_nd_blk_region(dev); |
| 2262 | struct nfit_blk_mmio *mmio; |
| 2263 | struct nfit_blk *nfit_blk; |
| 2264 | struct nfit_mem *nfit_mem; |
| 2265 | struct nvdimm *nvdimm; |
| 2266 | int rc; |
| 2267 | |
| 2268 | nvdimm = nd_blk_region_to_dimm(ndbr); |
| 2269 | nfit_mem = nvdimm_provider_data(nvdimm); |
| 2270 | if (!nfit_mem || !nfit_mem->dcr || !nfit_mem->bdw) { |
| 2271 | dev_dbg(dev, "%s: missing%s%s%s\n", __func__, |
| 2272 | nfit_mem ? "" : " nfit_mem", |
Dan Williams | 193ccca | 2015-06-30 16:09:39 -0400 | [diff] [blame] | 2273 | (nfit_mem && nfit_mem->dcr) ? "" : " dcr", |
| 2274 | (nfit_mem && nfit_mem->bdw) ? "" : " bdw"); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2275 | return -ENXIO; |
| 2276 | } |
| 2277 | |
| 2278 | nfit_blk = devm_kzalloc(dev, sizeof(*nfit_blk), GFP_KERNEL); |
| 2279 | if (!nfit_blk) |
| 2280 | return -ENOMEM; |
| 2281 | nd_blk_region_set_provider_data(ndbr, nfit_blk); |
| 2282 | nfit_blk->nd_region = to_nd_region(dev); |
| 2283 | |
| 2284 | /* map block aperture memory */ |
| 2285 | nfit_blk->bdw_offset = nfit_mem->bdw->offset; |
| 2286 | mmio = &nfit_blk->mmio[BDW]; |
Dan Williams | 29b9aa0 | 2016-06-06 17:42:38 -0700 | [diff] [blame] | 2287 | mmio->addr.base = devm_nvdimm_memremap(dev, nfit_mem->spa_bdw->address, |
Dan Williams | ca6a465 | 2017-01-13 20:36:58 -0800 | [diff] [blame] | 2288 | nfit_mem->spa_bdw->length, nd_blk_memremap_flags(ndbr)); |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 2289 | if (!mmio->addr.base) { |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2290 | dev_dbg(dev, "%s: %s failed to map bdw\n", __func__, |
| 2291 | nvdimm_name(nvdimm)); |
| 2292 | return -ENOMEM; |
| 2293 | } |
| 2294 | mmio->size = nfit_mem->bdw->size; |
| 2295 | mmio->base_offset = nfit_mem->memdev_bdw->region_offset; |
| 2296 | mmio->idt = nfit_mem->idt_bdw; |
| 2297 | mmio->spa = nfit_mem->spa_bdw; |
| 2298 | rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_bdw, |
| 2299 | nfit_mem->memdev_bdw->interleave_ways); |
| 2300 | if (rc) { |
| 2301 | dev_dbg(dev, "%s: %s failed to init bdw interleave\n", |
| 2302 | __func__, nvdimm_name(nvdimm)); |
| 2303 | return rc; |
| 2304 | } |
| 2305 | |
| 2306 | /* map block control memory */ |
| 2307 | nfit_blk->cmd_offset = nfit_mem->dcr->command_offset; |
| 2308 | nfit_blk->stat_offset = nfit_mem->dcr->status_offset; |
| 2309 | mmio = &nfit_blk->mmio[DCR]; |
Dan Williams | 29b9aa0 | 2016-06-06 17:42:38 -0700 | [diff] [blame] | 2310 | mmio->addr.base = devm_nvdimm_ioremap(dev, nfit_mem->spa_dcr->address, |
| 2311 | nfit_mem->spa_dcr->length); |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 2312 | if (!mmio->addr.base) { |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2313 | dev_dbg(dev, "%s: %s failed to map dcr\n", __func__, |
| 2314 | nvdimm_name(nvdimm)); |
| 2315 | return -ENOMEM; |
| 2316 | } |
| 2317 | mmio->size = nfit_mem->dcr->window_size; |
| 2318 | mmio->base_offset = nfit_mem->memdev_dcr->region_offset; |
| 2319 | mmio->idt = nfit_mem->idt_dcr; |
| 2320 | mmio->spa = nfit_mem->spa_dcr; |
| 2321 | rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_dcr, |
| 2322 | nfit_mem->memdev_dcr->interleave_ways); |
| 2323 | if (rc) { |
| 2324 | dev_dbg(dev, "%s: %s failed to init dcr interleave\n", |
| 2325 | __func__, nvdimm_name(nvdimm)); |
| 2326 | return rc; |
| 2327 | } |
| 2328 | |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 2329 | rc = acpi_nfit_blk_get_flags(nd_desc, nvdimm, nfit_blk); |
| 2330 | if (rc < 0) { |
| 2331 | dev_dbg(dev, "%s: %s failed get DIMM flags\n", |
| 2332 | __func__, nvdimm_name(nvdimm)); |
| 2333 | return rc; |
| 2334 | } |
| 2335 | |
Dan Williams | f284a4f | 2016-07-07 19:44:50 -0700 | [diff] [blame] | 2336 | if (nvdimm_has_flush(nfit_blk->nd_region) < 0) |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 2337 | dev_warn(dev, "unable to guarantee persistence of writes\n"); |
| 2338 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2339 | if (mmio->line_size == 0) |
| 2340 | return 0; |
| 2341 | |
| 2342 | if ((u32) nfit_blk->cmd_offset % mmio->line_size |
| 2343 | + 8 > mmio->line_size) { |
| 2344 | dev_dbg(dev, "cmd_offset crosses interleave boundary\n"); |
| 2345 | return -ENXIO; |
| 2346 | } else if ((u32) nfit_blk->stat_offset % mmio->line_size |
| 2347 | + 8 > mmio->line_size) { |
| 2348 | dev_dbg(dev, "stat_offset crosses interleave boundary\n"); |
| 2349 | return -ENXIO; |
| 2350 | } |
| 2351 | |
| 2352 | return 0; |
| 2353 | } |
| 2354 | |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2355 | static int ars_get_cap(struct acpi_nfit_desc *acpi_desc, |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2356 | struct nd_cmd_ars_cap *cmd, struct nfit_spa *nfit_spa) |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2357 | { |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2358 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2359 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2360 | int cmd_rc, rc; |
| 2361 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2362 | cmd->address = spa->address; |
| 2363 | cmd->length = spa->length; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2364 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_CAP, cmd, |
| 2365 | sizeof(*cmd), &cmd_rc); |
| 2366 | if (rc < 0) |
| 2367 | return rc; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2368 | return cmd_rc; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2369 | } |
| 2370 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2371 | static int ars_start(struct acpi_nfit_desc *acpi_desc, struct nfit_spa *nfit_spa) |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2372 | { |
| 2373 | int rc; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2374 | int cmd_rc; |
| 2375 | struct nd_cmd_ars_start ars_start; |
| 2376 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
| 2377 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2378 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2379 | memset(&ars_start, 0, sizeof(ars_start)); |
| 2380 | ars_start.address = spa->address; |
| 2381 | ars_start.length = spa->length; |
Toshi Kani | 8079003 | 2017-06-29 20:41:30 -0600 | [diff] [blame] | 2382 | ars_start.flags = acpi_desc->ars_start_flags; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2383 | if (nfit_spa_type(spa) == NFIT_SPA_PM) |
| 2384 | ars_start.type = ND_ARS_PERSISTENT; |
| 2385 | else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) |
| 2386 | ars_start.type = ND_ARS_VOLATILE; |
| 2387 | else |
| 2388 | return -ENOTTY; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2389 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2390 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start, |
| 2391 | sizeof(ars_start), &cmd_rc); |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2392 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2393 | if (rc < 0) |
| 2394 | return rc; |
| 2395 | return cmd_rc; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2396 | } |
| 2397 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2398 | static int ars_continue(struct acpi_nfit_desc *acpi_desc) |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2399 | { |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2400 | int rc, cmd_rc; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2401 | struct nd_cmd_ars_start ars_start; |
| 2402 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| 2403 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2404 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2405 | memset(&ars_start, 0, sizeof(ars_start)); |
| 2406 | ars_start.address = ars_status->restart_address; |
| 2407 | ars_start.length = ars_status->restart_length; |
| 2408 | ars_start.type = ars_status->type; |
Toshi Kani | 8079003 | 2017-06-29 20:41:30 -0600 | [diff] [blame] | 2409 | ars_start.flags = acpi_desc->ars_start_flags; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2410 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start, |
| 2411 | sizeof(ars_start), &cmd_rc); |
| 2412 | if (rc < 0) |
| 2413 | return rc; |
| 2414 | return cmd_rc; |
| 2415 | } |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2416 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2417 | static int ars_get_status(struct acpi_nfit_desc *acpi_desc) |
| 2418 | { |
| 2419 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| 2420 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; |
| 2421 | int rc, cmd_rc; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 2422 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2423 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_STATUS, ars_status, |
| 2424 | acpi_desc->ars_status_size, &cmd_rc); |
| 2425 | if (rc < 0) |
| 2426 | return rc; |
| 2427 | return cmd_rc; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2428 | } |
| 2429 | |
Dan Williams | 82aa37c | 2016-12-06 12:45:24 -0800 | [diff] [blame] | 2430 | static int ars_status_process_records(struct acpi_nfit_desc *acpi_desc, |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2431 | struct nd_cmd_ars_status *ars_status) |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2432 | { |
Dan Williams | 82aa37c | 2016-12-06 12:45:24 -0800 | [diff] [blame] | 2433 | struct nvdimm_bus *nvdimm_bus = acpi_desc->nvdimm_bus; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2434 | int rc; |
| 2435 | u32 i; |
| 2436 | |
Dan Williams | 82aa37c | 2016-12-06 12:45:24 -0800 | [diff] [blame] | 2437 | /* |
| 2438 | * First record starts at 44 byte offset from the start of the |
| 2439 | * payload. |
| 2440 | */ |
| 2441 | if (ars_status->out_length < 44) |
| 2442 | return 0; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2443 | for (i = 0; i < ars_status->num_records; i++) { |
Dan Williams | 82aa37c | 2016-12-06 12:45:24 -0800 | [diff] [blame] | 2444 | /* only process full records */ |
| 2445 | if (ars_status->out_length |
| 2446 | < 44 + sizeof(struct nd_ars_record) * (i + 1)) |
| 2447 | break; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2448 | rc = nvdimm_bus_add_poison(nvdimm_bus, |
| 2449 | ars_status->records[i].err_address, |
| 2450 | ars_status->records[i].length); |
| 2451 | if (rc) |
| 2452 | return rc; |
| 2453 | } |
Dan Williams | 82aa37c | 2016-12-06 12:45:24 -0800 | [diff] [blame] | 2454 | if (i < ars_status->num_records) |
| 2455 | dev_warn(acpi_desc->dev, "detected truncated ars results\n"); |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2456 | |
| 2457 | return 0; |
| 2458 | } |
| 2459 | |
Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 2460 | static void acpi_nfit_remove_resource(void *data) |
| 2461 | { |
| 2462 | struct resource *res = data; |
| 2463 | |
| 2464 | remove_resource(res); |
| 2465 | } |
| 2466 | |
| 2467 | static int acpi_nfit_insert_resource(struct acpi_nfit_desc *acpi_desc, |
| 2468 | struct nd_region_desc *ndr_desc) |
| 2469 | { |
| 2470 | struct resource *res, *nd_res = ndr_desc->res; |
| 2471 | int is_pmem, ret; |
| 2472 | |
| 2473 | /* No operation if the region is already registered as PMEM */ |
| 2474 | is_pmem = region_intersects(nd_res->start, resource_size(nd_res), |
| 2475 | IORESOURCE_MEM, IORES_DESC_PERSISTENT_MEMORY); |
| 2476 | if (is_pmem == REGION_INTERSECTS) |
| 2477 | return 0; |
| 2478 | |
| 2479 | res = devm_kzalloc(acpi_desc->dev, sizeof(*res), GFP_KERNEL); |
| 2480 | if (!res) |
| 2481 | return -ENOMEM; |
| 2482 | |
| 2483 | res->name = "Persistent Memory"; |
| 2484 | res->start = nd_res->start; |
| 2485 | res->end = nd_res->end; |
| 2486 | res->flags = IORESOURCE_MEM; |
| 2487 | res->desc = IORES_DESC_PERSISTENT_MEMORY; |
| 2488 | |
| 2489 | ret = insert_resource(&iomem_resource, res); |
| 2490 | if (ret) |
| 2491 | return ret; |
| 2492 | |
Sajjan, Vikas C | d932dd2 | 2016-07-04 10:02:51 +0530 | [diff] [blame] | 2493 | ret = devm_add_action_or_reset(acpi_desc->dev, |
| 2494 | acpi_nfit_remove_resource, |
| 2495 | res); |
| 2496 | if (ret) |
Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 2497 | return ret; |
Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 2498 | |
| 2499 | return 0; |
| 2500 | } |
| 2501 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2502 | static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc, |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2503 | struct nd_mapping_desc *mapping, struct nd_region_desc *ndr_desc, |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2504 | struct acpi_nfit_memory_map *memdev, |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2505 | struct nfit_spa *nfit_spa) |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2506 | { |
| 2507 | struct nvdimm *nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, |
| 2508 | memdev->device_handle); |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2509 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2510 | struct nd_blk_region_desc *ndbr_desc; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2511 | struct nfit_mem *nfit_mem; |
Dan Williams | faec6f8 | 2017-06-06 11:10:51 -0700 | [diff] [blame] | 2512 | int blk_valid = 0, rc; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2513 | |
| 2514 | if (!nvdimm) { |
| 2515 | dev_err(acpi_desc->dev, "spa%d dimm: %#x not found\n", |
| 2516 | spa->range_index, memdev->device_handle); |
| 2517 | return -ENODEV; |
| 2518 | } |
| 2519 | |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2520 | mapping->nvdimm = nvdimm; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2521 | switch (nfit_spa_type(spa)) { |
| 2522 | case NFIT_SPA_PM: |
| 2523 | case NFIT_SPA_VOLATILE: |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2524 | mapping->start = memdev->address; |
| 2525 | mapping->size = memdev->region_size; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2526 | break; |
| 2527 | case NFIT_SPA_DCR: |
| 2528 | nfit_mem = nvdimm_provider_data(nvdimm); |
| 2529 | if (!nfit_mem || !nfit_mem->bdw) { |
| 2530 | dev_dbg(acpi_desc->dev, "spa%d %s missing bdw\n", |
| 2531 | spa->range_index, nvdimm_name(nvdimm)); |
| 2532 | } else { |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2533 | mapping->size = nfit_mem->bdw->capacity; |
| 2534 | mapping->start = nfit_mem->bdw->start_address; |
Vishal Verma | 5212e11 | 2015-06-25 04:20:32 -0400 | [diff] [blame] | 2535 | ndr_desc->num_lanes = nfit_mem->bdw->windows; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2536 | blk_valid = 1; |
| 2537 | } |
| 2538 | |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2539 | ndr_desc->mapping = mapping; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2540 | ndr_desc->num_mappings = blk_valid; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2541 | ndbr_desc = to_blk_region_desc(ndr_desc); |
| 2542 | ndbr_desc->enable = acpi_nfit_blk_region_enable; |
Dan Williams | 6bc7561 | 2015-06-17 17:23:32 -0400 | [diff] [blame] | 2543 | ndbr_desc->do_io = acpi_desc->blk_do_io; |
Dan Williams | faec6f8 | 2017-06-06 11:10:51 -0700 | [diff] [blame] | 2544 | rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa); |
| 2545 | if (rc) |
| 2546 | return rc; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2547 | nfit_spa->nd_region = nvdimm_blk_region_create(acpi_desc->nvdimm_bus, |
| 2548 | ndr_desc); |
| 2549 | if (!nfit_spa->nd_region) |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2550 | return -ENOMEM; |
| 2551 | break; |
| 2552 | } |
| 2553 | |
| 2554 | return 0; |
| 2555 | } |
| 2556 | |
Lee, Chun-Yi | c2f32ac | 2016-07-15 12:05:35 +0800 | [diff] [blame] | 2557 | static bool nfit_spa_is_virtual(struct acpi_nfit_system_address *spa) |
| 2558 | { |
| 2559 | return (nfit_spa_type(spa) == NFIT_SPA_VDISK || |
| 2560 | nfit_spa_type(spa) == NFIT_SPA_VCD || |
| 2561 | nfit_spa_type(spa) == NFIT_SPA_PDISK || |
| 2562 | nfit_spa_type(spa) == NFIT_SPA_PCD); |
| 2563 | } |
| 2564 | |
Dan Williams | c9e582a | 2017-05-29 23:12:19 -0700 | [diff] [blame] | 2565 | static bool nfit_spa_is_volatile(struct acpi_nfit_system_address *spa) |
| 2566 | { |
| 2567 | return (nfit_spa_type(spa) == NFIT_SPA_VDISK || |
| 2568 | nfit_spa_type(spa) == NFIT_SPA_VCD || |
| 2569 | nfit_spa_type(spa) == NFIT_SPA_VOLATILE); |
| 2570 | } |
| 2571 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2572 | static int acpi_nfit_register_region(struct acpi_nfit_desc *acpi_desc, |
| 2573 | struct nfit_spa *nfit_spa) |
| 2574 | { |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2575 | static struct nd_mapping_desc mappings[ND_MAX_MAPPINGS]; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2576 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2577 | struct nd_blk_region_desc ndbr_desc; |
| 2578 | struct nd_region_desc *ndr_desc; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2579 | struct nfit_memdev *nfit_memdev; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2580 | struct nvdimm_bus *nvdimm_bus; |
| 2581 | struct resource res; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2582 | int count = 0, rc; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2583 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2584 | if (nfit_spa->nd_region) |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2585 | return 0; |
| 2586 | |
Lee, Chun-Yi | c2f32ac | 2016-07-15 12:05:35 +0800 | [diff] [blame] | 2587 | if (spa->range_index == 0 && !nfit_spa_is_virtual(spa)) { |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2588 | dev_dbg(acpi_desc->dev, "%s: detected invalid spa index\n", |
| 2589 | __func__); |
| 2590 | return 0; |
| 2591 | } |
| 2592 | |
| 2593 | memset(&res, 0, sizeof(res)); |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2594 | memset(&mappings, 0, sizeof(mappings)); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2595 | memset(&ndbr_desc, 0, sizeof(ndbr_desc)); |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2596 | res.start = spa->address; |
| 2597 | res.end = res.start + spa->length - 1; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2598 | ndr_desc = &ndbr_desc.ndr_desc; |
| 2599 | ndr_desc->res = &res; |
| 2600 | ndr_desc->provider_data = nfit_spa; |
| 2601 | ndr_desc->attr_groups = acpi_nfit_region_attribute_groups; |
Toshi Kani | 41d7a6d | 2015-06-19 12:18:33 -0600 | [diff] [blame] | 2602 | if (spa->flags & ACPI_NFIT_PROXIMITY_VALID) |
| 2603 | ndr_desc->numa_node = acpi_map_pxm_to_online_node( |
| 2604 | spa->proximity_domain); |
| 2605 | else |
| 2606 | ndr_desc->numa_node = NUMA_NO_NODE; |
| 2607 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2608 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 2609 | struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev; |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2610 | struct nd_mapping_desc *mapping; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2611 | |
| 2612 | if (memdev->range_index != spa->range_index) |
| 2613 | continue; |
| 2614 | if (count >= ND_MAX_MAPPINGS) { |
| 2615 | dev_err(acpi_desc->dev, "spa%d exceeds max mappings %d\n", |
| 2616 | spa->range_index, ND_MAX_MAPPINGS); |
| 2617 | return -ENXIO; |
| 2618 | } |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2619 | mapping = &mappings[count++]; |
| 2620 | rc = acpi_nfit_init_mapping(acpi_desc, mapping, ndr_desc, |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2621 | memdev, nfit_spa); |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2622 | if (rc) |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2623 | goto out; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2624 | } |
| 2625 | |
Dan Williams | 44c462e | 2016-09-19 16:38:50 -0700 | [diff] [blame] | 2626 | ndr_desc->mapping = mappings; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2627 | ndr_desc->num_mappings = count; |
| 2628 | rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa); |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2629 | if (rc) |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2630 | goto out; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2631 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2632 | nvdimm_bus = acpi_desc->nvdimm_bus; |
| 2633 | if (nfit_spa_type(spa) == NFIT_SPA_PM) { |
Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 2634 | rc = acpi_nfit_insert_resource(acpi_desc, ndr_desc); |
Dan Williams | 4890116 | 2016-03-09 17:15:43 -0800 | [diff] [blame] | 2635 | if (rc) { |
Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 2636 | dev_warn(acpi_desc->dev, |
| 2637 | "failed to insert pmem resource to iomem: %d\n", |
| 2638 | rc); |
Dan Williams | 4890116 | 2016-03-09 17:15:43 -0800 | [diff] [blame] | 2639 | goto out; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2640 | } |
Dan Williams | 4890116 | 2016-03-09 17:15:43 -0800 | [diff] [blame] | 2641 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2642 | nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus, |
| 2643 | ndr_desc); |
| 2644 | if (!nfit_spa->nd_region) |
| 2645 | rc = -ENOMEM; |
Dan Williams | c9e582a | 2017-05-29 23:12:19 -0700 | [diff] [blame] | 2646 | } else if (nfit_spa_is_volatile(spa)) { |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2647 | nfit_spa->nd_region = nvdimm_volatile_region_create(nvdimm_bus, |
| 2648 | ndr_desc); |
| 2649 | if (!nfit_spa->nd_region) |
| 2650 | rc = -ENOMEM; |
Lee, Chun-Yi | c2f32ac | 2016-07-15 12:05:35 +0800 | [diff] [blame] | 2651 | } else if (nfit_spa_is_virtual(spa)) { |
| 2652 | nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus, |
| 2653 | ndr_desc); |
| 2654 | if (!nfit_spa->nd_region) |
| 2655 | rc = -ENOMEM; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2656 | } |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2657 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2658 | out: |
| 2659 | if (rc) |
| 2660 | dev_err(acpi_desc->dev, "failed to register spa range %d\n", |
| 2661 | nfit_spa->spa->range_index); |
| 2662 | return rc; |
| 2663 | } |
| 2664 | |
| 2665 | static int ars_status_alloc(struct acpi_nfit_desc *acpi_desc, |
| 2666 | u32 max_ars) |
| 2667 | { |
| 2668 | struct device *dev = acpi_desc->dev; |
| 2669 | struct nd_cmd_ars_status *ars_status; |
| 2670 | |
| 2671 | if (acpi_desc->ars_status && acpi_desc->ars_status_size >= max_ars) { |
| 2672 | memset(acpi_desc->ars_status, 0, acpi_desc->ars_status_size); |
| 2673 | return 0; |
| 2674 | } |
| 2675 | |
| 2676 | if (acpi_desc->ars_status) |
| 2677 | devm_kfree(dev, acpi_desc->ars_status); |
| 2678 | acpi_desc->ars_status = NULL; |
| 2679 | ars_status = devm_kzalloc(dev, max_ars, GFP_KERNEL); |
| 2680 | if (!ars_status) |
| 2681 | return -ENOMEM; |
| 2682 | acpi_desc->ars_status = ars_status; |
| 2683 | acpi_desc->ars_status_size = max_ars; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2684 | return 0; |
| 2685 | } |
| 2686 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2687 | static int acpi_nfit_query_poison(struct acpi_nfit_desc *acpi_desc, |
| 2688 | struct nfit_spa *nfit_spa) |
| 2689 | { |
| 2690 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
| 2691 | int rc; |
| 2692 | |
| 2693 | if (!nfit_spa->max_ars) { |
| 2694 | struct nd_cmd_ars_cap ars_cap; |
| 2695 | |
| 2696 | memset(&ars_cap, 0, sizeof(ars_cap)); |
| 2697 | rc = ars_get_cap(acpi_desc, &ars_cap, nfit_spa); |
| 2698 | if (rc < 0) |
| 2699 | return rc; |
| 2700 | nfit_spa->max_ars = ars_cap.max_ars_out; |
| 2701 | nfit_spa->clear_err_unit = ars_cap.clear_err_unit; |
| 2702 | /* check that the supported scrub types match the spa type */ |
| 2703 | if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE && |
| 2704 | ((ars_cap.status >> 16) & ND_ARS_VOLATILE) == 0) |
| 2705 | return -ENOTTY; |
| 2706 | else if (nfit_spa_type(spa) == NFIT_SPA_PM && |
| 2707 | ((ars_cap.status >> 16) & ND_ARS_PERSISTENT) == 0) |
| 2708 | return -ENOTTY; |
| 2709 | } |
| 2710 | |
| 2711 | if (ars_status_alloc(acpi_desc, nfit_spa->max_ars)) |
| 2712 | return -ENOMEM; |
| 2713 | |
| 2714 | rc = ars_get_status(acpi_desc); |
| 2715 | if (rc < 0 && rc != -ENOSPC) |
| 2716 | return rc; |
| 2717 | |
Dan Williams | 82aa37c | 2016-12-06 12:45:24 -0800 | [diff] [blame] | 2718 | if (ars_status_process_records(acpi_desc, acpi_desc->ars_status)) |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2719 | return -ENOMEM; |
| 2720 | |
| 2721 | return 0; |
| 2722 | } |
| 2723 | |
| 2724 | static void acpi_nfit_async_scrub(struct acpi_nfit_desc *acpi_desc, |
| 2725 | struct nfit_spa *nfit_spa) |
| 2726 | { |
| 2727 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
| 2728 | unsigned int overflow_retry = scrub_overflow_abort; |
| 2729 | u64 init_ars_start = 0, init_ars_len = 0; |
| 2730 | struct device *dev = acpi_desc->dev; |
| 2731 | unsigned int tmo = scrub_timeout; |
| 2732 | int rc; |
| 2733 | |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 2734 | if (!nfit_spa->ars_required || !nfit_spa->nd_region) |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2735 | return; |
| 2736 | |
| 2737 | rc = ars_start(acpi_desc, nfit_spa); |
| 2738 | /* |
| 2739 | * If we timed out the initial scan we'll still be busy here, |
| 2740 | * and will wait another timeout before giving up permanently. |
| 2741 | */ |
| 2742 | if (rc < 0 && rc != -EBUSY) |
| 2743 | return; |
| 2744 | |
| 2745 | do { |
| 2746 | u64 ars_start, ars_len; |
| 2747 | |
| 2748 | if (acpi_desc->cancel) |
| 2749 | break; |
| 2750 | rc = acpi_nfit_query_poison(acpi_desc, nfit_spa); |
| 2751 | if (rc == -ENOTTY) |
| 2752 | break; |
| 2753 | if (rc == -EBUSY && !tmo) { |
| 2754 | dev_warn(dev, "range %d ars timeout, aborting\n", |
| 2755 | spa->range_index); |
| 2756 | break; |
| 2757 | } |
| 2758 | |
| 2759 | if (rc == -EBUSY) { |
| 2760 | /* |
| 2761 | * Note, entries may be appended to the list |
| 2762 | * while the lock is dropped, but the workqueue |
| 2763 | * being active prevents entries being deleted / |
| 2764 | * freed. |
| 2765 | */ |
| 2766 | mutex_unlock(&acpi_desc->init_mutex); |
| 2767 | ssleep(1); |
| 2768 | tmo--; |
| 2769 | mutex_lock(&acpi_desc->init_mutex); |
| 2770 | continue; |
| 2771 | } |
| 2772 | |
| 2773 | /* we got some results, but there are more pending... */ |
| 2774 | if (rc == -ENOSPC && overflow_retry--) { |
| 2775 | if (!init_ars_len) { |
| 2776 | init_ars_len = acpi_desc->ars_status->length; |
| 2777 | init_ars_start = acpi_desc->ars_status->address; |
| 2778 | } |
| 2779 | rc = ars_continue(acpi_desc); |
| 2780 | } |
| 2781 | |
| 2782 | if (rc < 0) { |
| 2783 | dev_warn(dev, "range %d ars continuation failed\n", |
| 2784 | spa->range_index); |
| 2785 | break; |
| 2786 | } |
| 2787 | |
| 2788 | if (init_ars_len) { |
| 2789 | ars_start = init_ars_start; |
| 2790 | ars_len = init_ars_len; |
| 2791 | } else { |
| 2792 | ars_start = acpi_desc->ars_status->address; |
| 2793 | ars_len = acpi_desc->ars_status->length; |
| 2794 | } |
| 2795 | dev_dbg(dev, "spa range: %d ars from %#llx + %#llx complete\n", |
| 2796 | spa->range_index, ars_start, ars_len); |
| 2797 | /* notify the region about new poison entries */ |
| 2798 | nvdimm_region_notify(nfit_spa->nd_region, |
| 2799 | NVDIMM_REVALIDATE_POISON); |
| 2800 | break; |
| 2801 | } while (1); |
| 2802 | } |
| 2803 | |
| 2804 | static void acpi_nfit_scrub(struct work_struct *work) |
| 2805 | { |
| 2806 | struct device *dev; |
| 2807 | u64 init_scrub_length = 0; |
| 2808 | struct nfit_spa *nfit_spa; |
| 2809 | u64 init_scrub_address = 0; |
| 2810 | bool init_ars_done = false; |
| 2811 | struct acpi_nfit_desc *acpi_desc; |
| 2812 | unsigned int tmo = scrub_timeout; |
| 2813 | unsigned int overflow_retry = scrub_overflow_abort; |
| 2814 | |
| 2815 | acpi_desc = container_of(work, typeof(*acpi_desc), work); |
| 2816 | dev = acpi_desc->dev; |
| 2817 | |
| 2818 | /* |
| 2819 | * We scrub in 2 phases. The first phase waits for any platform |
| 2820 | * firmware initiated scrubs to complete and then we go search for the |
| 2821 | * affected spa regions to mark them scanned. In the second phase we |
| 2822 | * initiate a directed scrub for every range that was not scrubbed in |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 2823 | * phase 1. If we're called for a 'rescan', we harmlessly pass through |
| 2824 | * the first phase, but really only care about running phase 2, where |
| 2825 | * regions can be notified of new poison. |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2826 | */ |
| 2827 | |
| 2828 | /* process platform firmware initiated scrubs */ |
| 2829 | retry: |
| 2830 | mutex_lock(&acpi_desc->init_mutex); |
| 2831 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| 2832 | struct nd_cmd_ars_status *ars_status; |
| 2833 | struct acpi_nfit_system_address *spa; |
| 2834 | u64 ars_start, ars_len; |
| 2835 | int rc; |
| 2836 | |
| 2837 | if (acpi_desc->cancel) |
| 2838 | break; |
| 2839 | |
| 2840 | if (nfit_spa->nd_region) |
| 2841 | continue; |
| 2842 | |
| 2843 | if (init_ars_done) { |
| 2844 | /* |
| 2845 | * No need to re-query, we're now just |
| 2846 | * reconciling all the ranges covered by the |
| 2847 | * initial scrub |
| 2848 | */ |
| 2849 | rc = 0; |
| 2850 | } else |
| 2851 | rc = acpi_nfit_query_poison(acpi_desc, nfit_spa); |
| 2852 | |
| 2853 | if (rc == -ENOTTY) { |
| 2854 | /* no ars capability, just register spa and move on */ |
| 2855 | acpi_nfit_register_region(acpi_desc, nfit_spa); |
| 2856 | continue; |
| 2857 | } |
| 2858 | |
| 2859 | if (rc == -EBUSY && !tmo) { |
| 2860 | /* fallthrough to directed scrub in phase 2 */ |
| 2861 | dev_warn(dev, "timeout awaiting ars results, continuing...\n"); |
| 2862 | break; |
| 2863 | } else if (rc == -EBUSY) { |
| 2864 | mutex_unlock(&acpi_desc->init_mutex); |
| 2865 | ssleep(1); |
| 2866 | tmo--; |
| 2867 | goto retry; |
| 2868 | } |
| 2869 | |
| 2870 | /* we got some results, but there are more pending... */ |
| 2871 | if (rc == -ENOSPC && overflow_retry--) { |
| 2872 | ars_status = acpi_desc->ars_status; |
| 2873 | /* |
| 2874 | * Record the original scrub range, so that we |
| 2875 | * can recall all the ranges impacted by the |
| 2876 | * initial scrub. |
| 2877 | */ |
| 2878 | if (!init_scrub_length) { |
| 2879 | init_scrub_length = ars_status->length; |
| 2880 | init_scrub_address = ars_status->address; |
| 2881 | } |
| 2882 | rc = ars_continue(acpi_desc); |
| 2883 | if (rc == 0) { |
| 2884 | mutex_unlock(&acpi_desc->init_mutex); |
| 2885 | goto retry; |
| 2886 | } |
| 2887 | } |
| 2888 | |
| 2889 | if (rc < 0) { |
| 2890 | /* |
| 2891 | * Initial scrub failed, we'll give it one more |
| 2892 | * try below... |
| 2893 | */ |
| 2894 | break; |
| 2895 | } |
| 2896 | |
| 2897 | /* We got some final results, record completed ranges */ |
| 2898 | ars_status = acpi_desc->ars_status; |
| 2899 | if (init_scrub_length) { |
| 2900 | ars_start = init_scrub_address; |
| 2901 | ars_len = ars_start + init_scrub_length; |
| 2902 | } else { |
| 2903 | ars_start = ars_status->address; |
| 2904 | ars_len = ars_status->length; |
| 2905 | } |
| 2906 | spa = nfit_spa->spa; |
| 2907 | |
| 2908 | if (!init_ars_done) { |
| 2909 | init_ars_done = true; |
| 2910 | dev_dbg(dev, "init scrub %#llx + %#llx complete\n", |
| 2911 | ars_start, ars_len); |
| 2912 | } |
| 2913 | if (ars_start <= spa->address && ars_start + ars_len |
| 2914 | >= spa->address + spa->length) |
| 2915 | acpi_nfit_register_region(acpi_desc, nfit_spa); |
| 2916 | } |
| 2917 | |
| 2918 | /* |
| 2919 | * For all the ranges not covered by an initial scrub we still |
| 2920 | * want to see if there are errors, but it's ok to discover them |
| 2921 | * asynchronously. |
| 2922 | */ |
| 2923 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| 2924 | /* |
| 2925 | * Flag all the ranges that still need scrubbing, but |
| 2926 | * register them now to make data available. |
| 2927 | */ |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 2928 | if (!nfit_spa->nd_region) { |
| 2929 | nfit_spa->ars_required = 1; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2930 | acpi_nfit_register_region(acpi_desc, nfit_spa); |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 2931 | } |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2932 | } |
Dan Williams | 9ccaed4 | 2017-04-13 22:48:46 -0700 | [diff] [blame] | 2933 | acpi_desc->init_complete = 1; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2934 | |
| 2935 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) |
| 2936 | acpi_nfit_async_scrub(acpi_desc, nfit_spa); |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 2937 | acpi_desc->scrub_count++; |
Toshi Kani | 8079003 | 2017-06-29 20:41:30 -0600 | [diff] [blame] | 2938 | acpi_desc->ars_start_flags = 0; |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 2939 | if (acpi_desc->scrub_count_state) |
| 2940 | sysfs_notify_dirent(acpi_desc->scrub_count_state); |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2941 | mutex_unlock(&acpi_desc->init_mutex); |
| 2942 | } |
| 2943 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2944 | static int acpi_nfit_register_regions(struct acpi_nfit_desc *acpi_desc) |
| 2945 | { |
| 2946 | struct nfit_spa *nfit_spa; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2947 | int rc; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2948 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2949 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) |
| 2950 | if (nfit_spa_type(nfit_spa->spa) == NFIT_SPA_DCR) { |
| 2951 | /* BLK regions don't need to wait for ars results */ |
| 2952 | rc = acpi_nfit_register_region(acpi_desc, nfit_spa); |
| 2953 | if (rc) |
| 2954 | return rc; |
| 2955 | } |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2956 | |
Toshi Kani | 8079003 | 2017-06-29 20:41:30 -0600 | [diff] [blame] | 2957 | acpi_desc->ars_start_flags = 0; |
Dan Williams | fbabd82 | 2017-04-18 09:56:31 -0700 | [diff] [blame] | 2958 | if (!acpi_desc->cancel) |
| 2959 | queue_work(nfit_wq, &acpi_desc->work); |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2960 | return 0; |
| 2961 | } |
| 2962 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2963 | static int acpi_nfit_check_deletions(struct acpi_nfit_desc *acpi_desc, |
| 2964 | struct nfit_table_prev *prev) |
| 2965 | { |
| 2966 | struct device *dev = acpi_desc->dev; |
| 2967 | |
| 2968 | if (!list_empty(&prev->spas) || |
| 2969 | !list_empty(&prev->memdevs) || |
| 2970 | !list_empty(&prev->dcrs) || |
| 2971 | !list_empty(&prev->bdws) || |
| 2972 | !list_empty(&prev->idts) || |
| 2973 | !list_empty(&prev->flushes)) { |
| 2974 | dev_err(dev, "new nfit deletes entries (unsupported)\n"); |
| 2975 | return -ENXIO; |
| 2976 | } |
| 2977 | return 0; |
| 2978 | } |
| 2979 | |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 2980 | static int acpi_nfit_desc_init_scrub_attr(struct acpi_nfit_desc *acpi_desc) |
| 2981 | { |
| 2982 | struct device *dev = acpi_desc->dev; |
| 2983 | struct kernfs_node *nfit; |
| 2984 | struct device *bus_dev; |
| 2985 | |
| 2986 | if (!ars_supported(acpi_desc->nvdimm_bus)) |
| 2987 | return 0; |
| 2988 | |
| 2989 | bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus); |
| 2990 | nfit = sysfs_get_dirent(bus_dev->kobj.sd, "nfit"); |
| 2991 | if (!nfit) { |
| 2992 | dev_err(dev, "sysfs_get_dirent 'nfit' failed\n"); |
| 2993 | return -ENODEV; |
| 2994 | } |
| 2995 | acpi_desc->scrub_count_state = sysfs_get_dirent(nfit, "scrub"); |
| 2996 | sysfs_put(nfit); |
| 2997 | if (!acpi_desc->scrub_count_state) { |
| 2998 | dev_err(dev, "sysfs_get_dirent 'scrub' failed\n"); |
| 2999 | return -ENODEV; |
| 3000 | } |
| 3001 | |
| 3002 | return 0; |
| 3003 | } |
| 3004 | |
Dan Williams | fbabd82 | 2017-04-18 09:56:31 -0700 | [diff] [blame] | 3005 | static void acpi_nfit_unregister(void *data) |
Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 3006 | { |
| 3007 | struct acpi_nfit_desc *acpi_desc = data; |
| 3008 | |
Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 3009 | nvdimm_bus_unregister(acpi_desc->nvdimm_bus); |
Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 3010 | } |
| 3011 | |
Dan Williams | e7a11b4 | 2016-07-14 16:19:55 -0700 | [diff] [blame] | 3012 | int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, void *data, acpi_size sz) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3013 | { |
| 3014 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3015 | struct nfit_table_prev prev; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3016 | const void *end; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 3017 | int rc; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3018 | |
Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 3019 | if (!acpi_desc->nvdimm_bus) { |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3020 | acpi_nfit_init_dsms(acpi_desc); |
| 3021 | |
Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 3022 | acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, |
| 3023 | &acpi_desc->nd_desc); |
| 3024 | if (!acpi_desc->nvdimm_bus) |
| 3025 | return -ENOMEM; |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3026 | |
Dan Williams | fbabd82 | 2017-04-18 09:56:31 -0700 | [diff] [blame] | 3027 | rc = devm_add_action_or_reset(dev, acpi_nfit_unregister, |
Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 3028 | acpi_desc); |
| 3029 | if (rc) |
| 3030 | return rc; |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3031 | |
| 3032 | rc = acpi_nfit_desc_init_scrub_attr(acpi_desc); |
| 3033 | if (rc) |
| 3034 | return rc; |
Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 3035 | |
| 3036 | /* register this acpi_desc for mce notifications */ |
| 3037 | mutex_lock(&acpi_desc_lock); |
| 3038 | list_add_tail(&acpi_desc->list, &acpi_descs); |
| 3039 | mutex_unlock(&acpi_desc_lock); |
Dan Williams | 58cd71b | 2016-07-21 18:05:36 -0700 | [diff] [blame] | 3040 | } |
| 3041 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3042 | mutex_lock(&acpi_desc->init_mutex); |
| 3043 | |
| 3044 | INIT_LIST_HEAD(&prev.spas); |
| 3045 | INIT_LIST_HEAD(&prev.memdevs); |
| 3046 | INIT_LIST_HEAD(&prev.dcrs); |
| 3047 | INIT_LIST_HEAD(&prev.bdws); |
| 3048 | INIT_LIST_HEAD(&prev.idts); |
| 3049 | INIT_LIST_HEAD(&prev.flushes); |
| 3050 | |
| 3051 | list_cut_position(&prev.spas, &acpi_desc->spas, |
| 3052 | acpi_desc->spas.prev); |
| 3053 | list_cut_position(&prev.memdevs, &acpi_desc->memdevs, |
| 3054 | acpi_desc->memdevs.prev); |
| 3055 | list_cut_position(&prev.dcrs, &acpi_desc->dcrs, |
| 3056 | acpi_desc->dcrs.prev); |
| 3057 | list_cut_position(&prev.bdws, &acpi_desc->bdws, |
| 3058 | acpi_desc->bdws.prev); |
| 3059 | list_cut_position(&prev.idts, &acpi_desc->idts, |
| 3060 | acpi_desc->idts.prev); |
| 3061 | list_cut_position(&prev.flushes, &acpi_desc->flushes, |
| 3062 | acpi_desc->flushes.prev); |
| 3063 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3064 | end = data + sz; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3065 | while (!IS_ERR_OR_NULL(data)) |
| 3066 | data = add_table(acpi_desc, &prev, data, end); |
| 3067 | |
| 3068 | if (IS_ERR(data)) { |
| 3069 | dev_dbg(dev, "%s: nfit table parsing error: %ld\n", __func__, |
| 3070 | PTR_ERR(data)); |
| 3071 | rc = PTR_ERR(data); |
| 3072 | goto out_unlock; |
| 3073 | } |
| 3074 | |
| 3075 | rc = acpi_nfit_check_deletions(acpi_desc, &prev); |
| 3076 | if (rc) |
| 3077 | goto out_unlock; |
| 3078 | |
Dan Williams | 81ed4e3 | 2016-06-10 18:20:53 -0700 | [diff] [blame] | 3079 | rc = nfit_mem_init(acpi_desc); |
| 3080 | if (rc) |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3081 | goto out_unlock; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3082 | |
| 3083 | rc = acpi_nfit_register_dimms(acpi_desc); |
| 3084 | if (rc) |
| 3085 | goto out_unlock; |
| 3086 | |
| 3087 | rc = acpi_nfit_register_regions(acpi_desc); |
| 3088 | |
| 3089 | out_unlock: |
| 3090 | mutex_unlock(&acpi_desc->init_mutex); |
| 3091 | return rc; |
| 3092 | } |
| 3093 | EXPORT_SYMBOL_GPL(acpi_nfit_init); |
| 3094 | |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 3095 | struct acpi_nfit_flush_work { |
| 3096 | struct work_struct work; |
| 3097 | struct completion cmp; |
| 3098 | }; |
| 3099 | |
| 3100 | static void flush_probe(struct work_struct *work) |
| 3101 | { |
| 3102 | struct acpi_nfit_flush_work *flush; |
| 3103 | |
| 3104 | flush = container_of(work, typeof(*flush), work); |
| 3105 | complete(&flush->cmp); |
| 3106 | } |
| 3107 | |
| 3108 | static int acpi_nfit_flush_probe(struct nvdimm_bus_descriptor *nd_desc) |
| 3109 | { |
| 3110 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); |
| 3111 | struct device *dev = acpi_desc->dev; |
| 3112 | struct acpi_nfit_flush_work flush; |
Dan Williams | e471486 | 2017-02-02 10:31:00 -0800 | [diff] [blame] | 3113 | int rc; |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 3114 | |
| 3115 | /* bounce the device lock to flush acpi_nfit_add / acpi_nfit_notify */ |
| 3116 | device_lock(dev); |
| 3117 | device_unlock(dev); |
| 3118 | |
Dan Williams | 9ccaed4 | 2017-04-13 22:48:46 -0700 | [diff] [blame] | 3119 | /* bounce the init_mutex to make init_complete valid */ |
| 3120 | mutex_lock(&acpi_desc->init_mutex); |
Dan Williams | fbabd82 | 2017-04-18 09:56:31 -0700 | [diff] [blame] | 3121 | if (acpi_desc->cancel || acpi_desc->init_complete) { |
| 3122 | mutex_unlock(&acpi_desc->init_mutex); |
Dan Williams | 9ccaed4 | 2017-04-13 22:48:46 -0700 | [diff] [blame] | 3123 | return 0; |
Dan Williams | fbabd82 | 2017-04-18 09:56:31 -0700 | [diff] [blame] | 3124 | } |
Dan Williams | 9ccaed4 | 2017-04-13 22:48:46 -0700 | [diff] [blame] | 3125 | |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 3126 | /* |
| 3127 | * Scrub work could take 10s of seconds, userspace may give up so we |
| 3128 | * need to be interruptible while waiting. |
| 3129 | */ |
| 3130 | INIT_WORK_ONSTACK(&flush.work, flush_probe); |
Boqun Feng | 1c322ac | 2017-08-24 22:22:36 +0800 | [diff] [blame] | 3131 | init_completion(&flush.cmp); |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 3132 | queue_work(nfit_wq, &flush.work); |
Dan Williams | fbabd82 | 2017-04-18 09:56:31 -0700 | [diff] [blame] | 3133 | mutex_unlock(&acpi_desc->init_mutex); |
Dan Williams | e471486 | 2017-02-02 10:31:00 -0800 | [diff] [blame] | 3134 | |
| 3135 | rc = wait_for_completion_interruptible(&flush.cmp); |
| 3136 | cancel_work_sync(&flush.work); |
| 3137 | return rc; |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 3138 | } |
| 3139 | |
Dan Williams | 87bf572 | 2016-02-22 21:50:31 -0800 | [diff] [blame] | 3140 | static int acpi_nfit_clear_to_send(struct nvdimm_bus_descriptor *nd_desc, |
| 3141 | struct nvdimm *nvdimm, unsigned int cmd) |
| 3142 | { |
| 3143 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); |
| 3144 | |
| 3145 | if (nvdimm) |
| 3146 | return 0; |
| 3147 | if (cmd != ND_CMD_ARS_START) |
| 3148 | return 0; |
| 3149 | |
| 3150 | /* |
| 3151 | * The kernel and userspace may race to initiate a scrub, but |
| 3152 | * the scrub thread is prepared to lose that initial race. It |
| 3153 | * just needs guarantees that any ars it initiates are not |
| 3154 | * interrupted by any intervening start reqeusts from userspace. |
| 3155 | */ |
| 3156 | if (work_busy(&acpi_desc->work)) |
| 3157 | return -EBUSY; |
| 3158 | |
| 3159 | return 0; |
| 3160 | } |
| 3161 | |
Toshi Kani | 8079003 | 2017-06-29 20:41:30 -0600 | [diff] [blame] | 3162 | int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc, u8 flags) |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3163 | { |
| 3164 | struct device *dev = acpi_desc->dev; |
| 3165 | struct nfit_spa *nfit_spa; |
| 3166 | |
| 3167 | if (work_busy(&acpi_desc->work)) |
| 3168 | return -EBUSY; |
| 3169 | |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3170 | mutex_lock(&acpi_desc->init_mutex); |
Dan Williams | fbabd82 | 2017-04-18 09:56:31 -0700 | [diff] [blame] | 3171 | if (acpi_desc->cancel) { |
| 3172 | mutex_unlock(&acpi_desc->init_mutex); |
| 3173 | return 0; |
| 3174 | } |
| 3175 | |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3176 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| 3177 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
| 3178 | |
| 3179 | if (nfit_spa_type(spa) != NFIT_SPA_PM) |
| 3180 | continue; |
| 3181 | |
| 3182 | nfit_spa->ars_required = 1; |
| 3183 | } |
Toshi Kani | 8079003 | 2017-06-29 20:41:30 -0600 | [diff] [blame] | 3184 | acpi_desc->ars_start_flags = flags; |
Vishal Verma | 37b137f | 2016-07-23 21:51:42 -0700 | [diff] [blame] | 3185 | queue_work(nfit_wq, &acpi_desc->work); |
| 3186 | dev_dbg(dev, "%s: ars_scan triggered\n", __func__); |
| 3187 | mutex_unlock(&acpi_desc->init_mutex); |
| 3188 | |
| 3189 | return 0; |
| 3190 | } |
| 3191 | |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 3192 | void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev) |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3193 | { |
| 3194 | struct nvdimm_bus_descriptor *nd_desc; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3195 | |
| 3196 | dev_set_drvdata(dev, acpi_desc); |
| 3197 | acpi_desc->dev = dev; |
| 3198 | acpi_desc->blk_do_io = acpi_nfit_blk_region_do_io; |
| 3199 | nd_desc = &acpi_desc->nd_desc; |
| 3200 | nd_desc->provider_name = "ACPI.NFIT"; |
Dan Williams | bc9775d | 2016-07-21 20:03:19 -0700 | [diff] [blame] | 3201 | nd_desc->module = THIS_MODULE; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3202 | nd_desc->ndctl = acpi_nfit_ctl; |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 3203 | nd_desc->flush_probe = acpi_nfit_flush_probe; |
Dan Williams | 87bf572 | 2016-02-22 21:50:31 -0800 | [diff] [blame] | 3204 | nd_desc->clear_to_send = acpi_nfit_clear_to_send; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3205 | nd_desc->attr_groups = acpi_nfit_attribute_groups; |
| 3206 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3207 | INIT_LIST_HEAD(&acpi_desc->spas); |
| 3208 | INIT_LIST_HEAD(&acpi_desc->dcrs); |
| 3209 | INIT_LIST_HEAD(&acpi_desc->bdws); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 3210 | INIT_LIST_HEAD(&acpi_desc->idts); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 3211 | INIT_LIST_HEAD(&acpi_desc->flushes); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3212 | INIT_LIST_HEAD(&acpi_desc->memdevs); |
| 3213 | INIT_LIST_HEAD(&acpi_desc->dimms); |
Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 3214 | INIT_LIST_HEAD(&acpi_desc->list); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3215 | mutex_init(&acpi_desc->init_mutex); |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 3216 | INIT_WORK(&acpi_desc->work, acpi_nfit_scrub); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3217 | } |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 3218 | EXPORT_SYMBOL_GPL(acpi_nfit_desc_init); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3219 | |
Dan Williams | 3c87f37 | 2017-04-03 13:52:14 -0700 | [diff] [blame] | 3220 | static void acpi_nfit_put_table(void *table) |
| 3221 | { |
| 3222 | acpi_put_table(table); |
| 3223 | } |
| 3224 | |
Dan Williams | fbabd82 | 2017-04-18 09:56:31 -0700 | [diff] [blame] | 3225 | void acpi_nfit_shutdown(void *data) |
| 3226 | { |
| 3227 | struct acpi_nfit_desc *acpi_desc = data; |
| 3228 | struct device *bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus); |
| 3229 | |
| 3230 | /* |
| 3231 | * Destruct under acpi_desc_lock so that nfit_handle_mce does not |
| 3232 | * race teardown |
| 3233 | */ |
| 3234 | mutex_lock(&acpi_desc_lock); |
| 3235 | list_del(&acpi_desc->list); |
| 3236 | mutex_unlock(&acpi_desc_lock); |
| 3237 | |
| 3238 | mutex_lock(&acpi_desc->init_mutex); |
| 3239 | acpi_desc->cancel = 1; |
| 3240 | mutex_unlock(&acpi_desc->init_mutex); |
| 3241 | |
| 3242 | /* |
| 3243 | * Bounce the nvdimm bus lock to make sure any in-flight |
| 3244 | * acpi_nfit_ars_rescan() submissions have had a chance to |
| 3245 | * either submit or see ->cancel set. |
| 3246 | */ |
| 3247 | device_lock(bus_dev); |
| 3248 | device_unlock(bus_dev); |
| 3249 | |
| 3250 | flush_workqueue(nfit_wq); |
| 3251 | } |
| 3252 | EXPORT_SYMBOL_GPL(acpi_nfit_shutdown); |
| 3253 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3254 | static int acpi_nfit_add(struct acpi_device *adev) |
| 3255 | { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3256 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3257 | struct acpi_nfit_desc *acpi_desc; |
| 3258 | struct device *dev = &adev->dev; |
| 3259 | struct acpi_table_header *tbl; |
| 3260 | acpi_status status = AE_OK; |
| 3261 | acpi_size sz; |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 3262 | int rc = 0; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3263 | |
Lv Zheng | 6b11d1d | 2016-12-14 15:04:39 +0800 | [diff] [blame] | 3264 | status = acpi_get_table(ACPI_SIG_NFIT, 0, &tbl); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3265 | if (ACPI_FAILURE(status)) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3266 | /* This is ok, we could have an nvdimm hotplugged later */ |
| 3267 | dev_dbg(dev, "failed to find NFIT at startup\n"); |
| 3268 | return 0; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3269 | } |
Dan Williams | 3c87f37 | 2017-04-03 13:52:14 -0700 | [diff] [blame] | 3270 | |
| 3271 | rc = devm_add_action_or_reset(dev, acpi_nfit_put_table, tbl); |
| 3272 | if (rc) |
| 3273 | return rc; |
Lv Zheng | 6b11d1d | 2016-12-14 15:04:39 +0800 | [diff] [blame] | 3274 | sz = tbl->length; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3275 | |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 3276 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
| 3277 | if (!acpi_desc) |
| 3278 | return -ENOMEM; |
| 3279 | acpi_nfit_desc_init(acpi_desc, &adev->dev); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3280 | |
Dan Williams | e7a11b4 | 2016-07-14 16:19:55 -0700 | [diff] [blame] | 3281 | /* Save the acpi header for exporting the revision via sysfs */ |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 3282 | acpi_desc->acpi_header = *tbl; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3283 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3284 | /* Evaluate _FIT and override with that if present */ |
| 3285 | status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf); |
| 3286 | if (ACPI_SUCCESS(status) && buf.length > 0) { |
Dan Williams | e7a11b4 | 2016-07-14 16:19:55 -0700 | [diff] [blame] | 3287 | union acpi_object *obj = buf.pointer; |
| 3288 | |
| 3289 | if (obj->type == ACPI_TYPE_BUFFER) |
| 3290 | rc = acpi_nfit_init(acpi_desc, obj->buffer.pointer, |
| 3291 | obj->buffer.length); |
| 3292 | else |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 3293 | dev_dbg(dev, "%s invalid type %d, ignoring _FIT\n", |
| 3294 | __func__, (int) obj->type); |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 3295 | kfree(buf.pointer); |
| 3296 | } else |
Dan Williams | e7a11b4 | 2016-07-14 16:19:55 -0700 | [diff] [blame] | 3297 | /* skip over the lead-in header table */ |
| 3298 | rc = acpi_nfit_init(acpi_desc, (void *) tbl |
| 3299 | + sizeof(struct acpi_table_nfit), |
| 3300 | sz - sizeof(struct acpi_table_nfit)); |
Dan Williams | fbabd82 | 2017-04-18 09:56:31 -0700 | [diff] [blame] | 3301 | |
| 3302 | if (rc) |
| 3303 | return rc; |
| 3304 | return devm_add_action_or_reset(dev, acpi_nfit_shutdown, acpi_desc); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3305 | } |
| 3306 | |
| 3307 | static int acpi_nfit_remove(struct acpi_device *adev) |
| 3308 | { |
Dan Williams | fbabd82 | 2017-04-18 09:56:31 -0700 | [diff] [blame] | 3309 | /* see acpi_nfit_unregister */ |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3310 | return 0; |
| 3311 | } |
| 3312 | |
Toshi Kani | 56b47fe | 2017-06-08 12:36:57 -0600 | [diff] [blame] | 3313 | static void acpi_nfit_update_notify(struct device *dev, acpi_handle handle) |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3314 | { |
Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 3315 | struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(dev); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3316 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
Dan Williams | e7a11b4 | 2016-07-14 16:19:55 -0700 | [diff] [blame] | 3317 | union acpi_object *obj; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3318 | acpi_status status; |
| 3319 | int ret; |
| 3320 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3321 | if (!dev->driver) { |
| 3322 | /* dev->driver may be null if we're being removed */ |
| 3323 | dev_dbg(dev, "%s: no driver found for dev\n", __func__); |
Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 3324 | return; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3325 | } |
| 3326 | |
| 3327 | if (!acpi_desc) { |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 3328 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
| 3329 | if (!acpi_desc) |
Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 3330 | return; |
| 3331 | acpi_nfit_desc_init(acpi_desc, dev); |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 3332 | } else { |
| 3333 | /* |
| 3334 | * Finish previous registration before considering new |
| 3335 | * regions. |
| 3336 | */ |
| 3337 | flush_workqueue(nfit_wq); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3338 | } |
| 3339 | |
| 3340 | /* Evaluate _FIT */ |
Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 3341 | status = acpi_evaluate_object(handle, "_FIT", NULL, &buf); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3342 | if (ACPI_FAILURE(status)) { |
| 3343 | dev_err(dev, "failed to evaluate _FIT\n"); |
Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 3344 | return; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3345 | } |
| 3346 | |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 3347 | obj = buf.pointer; |
| 3348 | if (obj->type == ACPI_TYPE_BUFFER) { |
Dan Williams | e7a11b4 | 2016-07-14 16:19:55 -0700 | [diff] [blame] | 3349 | ret = acpi_nfit_init(acpi_desc, obj->buffer.pointer, |
| 3350 | obj->buffer.length); |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 3351 | if (ret) |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 3352 | dev_err(dev, "failed to merge updated NFIT\n"); |
Dan Williams | 3193204 | 2016-07-14 17:22:48 -0700 | [diff] [blame] | 3353 | } else |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 3354 | dev_err(dev, "Invalid _FIT\n"); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3355 | kfree(buf.pointer); |
Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 3356 | } |
Toshi Kani | 56b47fe | 2017-06-08 12:36:57 -0600 | [diff] [blame] | 3357 | |
| 3358 | static void acpi_nfit_uc_error_notify(struct device *dev, acpi_handle handle) |
| 3359 | { |
| 3360 | struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(dev); |
Toshi Kani | 8079003 | 2017-06-29 20:41:30 -0600 | [diff] [blame] | 3361 | u8 flags = (acpi_desc->scrub_mode == HW_ERROR_SCRUB_ON) ? |
| 3362 | 0 : ND_ARS_RETURN_PREV_DATA; |
Toshi Kani | 56b47fe | 2017-06-08 12:36:57 -0600 | [diff] [blame] | 3363 | |
Toshi Kani | 8079003 | 2017-06-29 20:41:30 -0600 | [diff] [blame] | 3364 | acpi_nfit_ars_rescan(acpi_desc, flags); |
Toshi Kani | 56b47fe | 2017-06-08 12:36:57 -0600 | [diff] [blame] | 3365 | } |
| 3366 | |
| 3367 | void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event) |
| 3368 | { |
| 3369 | dev_dbg(dev, "%s: event: 0x%x\n", __func__, event); |
| 3370 | |
| 3371 | switch (event) { |
| 3372 | case NFIT_NOTIFY_UPDATE: |
| 3373 | return acpi_nfit_update_notify(dev, handle); |
| 3374 | case NFIT_NOTIFY_UC_MEMORY_ERROR: |
| 3375 | return acpi_nfit_uc_error_notify(dev, handle); |
| 3376 | default: |
| 3377 | return; |
| 3378 | } |
| 3379 | } |
Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 3380 | EXPORT_SYMBOL_GPL(__acpi_nfit_notify); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3381 | |
Dan Williams | c14a868 | 2016-08-18 22:15:04 -0700 | [diff] [blame] | 3382 | static void acpi_nfit_notify(struct acpi_device *adev, u32 event) |
| 3383 | { |
| 3384 | device_lock(&adev->dev); |
| 3385 | __acpi_nfit_notify(&adev->dev, adev->handle, event); |
| 3386 | device_unlock(&adev->dev); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3387 | } |
| 3388 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3389 | static const struct acpi_device_id acpi_nfit_ids[] = { |
| 3390 | { "ACPI0012", 0 }, |
| 3391 | { "", 0 }, |
| 3392 | }; |
| 3393 | MODULE_DEVICE_TABLE(acpi, acpi_nfit_ids); |
| 3394 | |
| 3395 | static struct acpi_driver acpi_nfit_driver = { |
| 3396 | .name = KBUILD_MODNAME, |
| 3397 | .ids = acpi_nfit_ids, |
| 3398 | .ops = { |
| 3399 | .add = acpi_nfit_add, |
| 3400 | .remove = acpi_nfit_remove, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 3401 | .notify = acpi_nfit_notify, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3402 | }, |
| 3403 | }; |
| 3404 | |
| 3405 | static __init int nfit_init(void) |
| 3406 | { |
Prarit Bhargava | 7e700d2 | 2017-05-31 13:32:00 -0400 | [diff] [blame] | 3407 | int ret; |
| 3408 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3409 | BUILD_BUG_ON(sizeof(struct acpi_table_nfit) != 40); |
| 3410 | BUILD_BUG_ON(sizeof(struct acpi_nfit_system_address) != 56); |
| 3411 | BUILD_BUG_ON(sizeof(struct acpi_nfit_memory_map) != 48); |
| 3412 | BUILD_BUG_ON(sizeof(struct acpi_nfit_interleave) != 20); |
| 3413 | BUILD_BUG_ON(sizeof(struct acpi_nfit_smbios) != 9); |
| 3414 | BUILD_BUG_ON(sizeof(struct acpi_nfit_control_region) != 80); |
| 3415 | BUILD_BUG_ON(sizeof(struct acpi_nfit_data_region) != 40); |
| 3416 | |
Andy Shevchenko | 41c8bdb | 2017-06-05 19:40:42 +0300 | [diff] [blame] | 3417 | guid_parse(UUID_VOLATILE_MEMORY, &nfit_uuid[NFIT_SPA_VOLATILE]); |
| 3418 | guid_parse(UUID_PERSISTENT_MEMORY, &nfit_uuid[NFIT_SPA_PM]); |
| 3419 | guid_parse(UUID_CONTROL_REGION, &nfit_uuid[NFIT_SPA_DCR]); |
| 3420 | guid_parse(UUID_DATA_REGION, &nfit_uuid[NFIT_SPA_BDW]); |
| 3421 | guid_parse(UUID_VOLATILE_VIRTUAL_DISK, &nfit_uuid[NFIT_SPA_VDISK]); |
| 3422 | guid_parse(UUID_VOLATILE_VIRTUAL_CD, &nfit_uuid[NFIT_SPA_VCD]); |
| 3423 | guid_parse(UUID_PERSISTENT_VIRTUAL_DISK, &nfit_uuid[NFIT_SPA_PDISK]); |
| 3424 | guid_parse(UUID_PERSISTENT_VIRTUAL_CD, &nfit_uuid[NFIT_SPA_PCD]); |
| 3425 | guid_parse(UUID_NFIT_BUS, &nfit_uuid[NFIT_DEV_BUS]); |
| 3426 | guid_parse(UUID_NFIT_DIMM, &nfit_uuid[NFIT_DEV_DIMM]); |
| 3427 | guid_parse(UUID_NFIT_DIMM_N_HPE1, &nfit_uuid[NFIT_DEV_DIMM_N_HPE1]); |
| 3428 | guid_parse(UUID_NFIT_DIMM_N_HPE2, &nfit_uuid[NFIT_DEV_DIMM_N_HPE2]); |
| 3429 | guid_parse(UUID_NFIT_DIMM_N_MSFT, &nfit_uuid[NFIT_DEV_DIMM_N_MSFT]); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3430 | |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 3431 | nfit_wq = create_singlethread_workqueue("nfit"); |
| 3432 | if (!nfit_wq) |
| 3433 | return -ENOMEM; |
| 3434 | |
Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 3435 | nfit_mce_register(); |
Prarit Bhargava | 7e700d2 | 2017-05-31 13:32:00 -0400 | [diff] [blame] | 3436 | ret = acpi_bus_register_driver(&acpi_nfit_driver); |
| 3437 | if (ret) { |
| 3438 | nfit_mce_unregister(); |
| 3439 | destroy_workqueue(nfit_wq); |
| 3440 | } |
Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 3441 | |
Prarit Bhargava | 7e700d2 | 2017-05-31 13:32:00 -0400 | [diff] [blame] | 3442 | return ret; |
| 3443 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3444 | } |
| 3445 | |
| 3446 | static __exit void nfit_exit(void) |
| 3447 | { |
Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 3448 | nfit_mce_unregister(); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3449 | acpi_bus_unregister_driver(&acpi_nfit_driver); |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 3450 | destroy_workqueue(nfit_wq); |
Vishal Verma | 6839a6d | 2016-07-23 21:51:21 -0700 | [diff] [blame] | 3451 | WARN_ON(!list_empty(&acpi_descs)); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 3452 | } |
| 3453 | |
| 3454 | module_init(nfit_init); |
| 3455 | module_exit(nfit_exit); |
| 3456 | MODULE_LICENSE("GPL v2"); |
| 3457 | MODULE_AUTHOR("Intel Corporation"); |