Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of version 2 of the GNU General Public License as |
| 6 | * published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, but |
| 9 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 11 | * General Public License for more details. |
| 12 | */ |
| 13 | #include <linux/list_sort.h> |
| 14 | #include <linux/libnvdimm.h> |
| 15 | #include <linux/module.h> |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 16 | #include <linux/mutex.h> |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 17 | #include <linux/ndctl.h> |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 18 | #include <linux/delay.h> |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 19 | #include <linux/list.h> |
| 20 | #include <linux/acpi.h> |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 21 | #include <linux/sort.h> |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 22 | #include <linux/pmem.h> |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 23 | #include <linux/io.h> |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 24 | #include <linux/nd.h> |
Dan Williams | 96601ad | 2015-08-24 18:29:38 -0400 | [diff] [blame] | 25 | #include <asm/cacheflush.h> |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 26 | #include "nfit.h" |
| 27 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 28 | /* |
| 29 | * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is |
| 30 | * irrelevant. |
| 31 | */ |
Christoph Hellwig | 2f8e2c8 | 2015-08-28 09:27:14 +0200 | [diff] [blame] | 32 | #include <linux/io-64-nonatomic-hi-lo.h> |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 33 | |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 34 | static bool force_enable_dimms; |
| 35 | module_param(force_enable_dimms, bool, S_IRUGO|S_IWUSR); |
| 36 | MODULE_PARM_DESC(force_enable_dimms, "Ignore _STA (ACPI DIMM device) status"); |
| 37 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 38 | static unsigned int scrub_timeout = NFIT_ARS_TIMEOUT; |
| 39 | module_param(scrub_timeout, uint, S_IRUGO|S_IWUSR); |
| 40 | MODULE_PARM_DESC(scrub_timeout, "Initial scrub timeout in seconds"); |
| 41 | |
| 42 | /* after three payloads of overflow, it's dead jim */ |
| 43 | static unsigned int scrub_overflow_abort = 3; |
| 44 | module_param(scrub_overflow_abort, uint, S_IRUGO|S_IWUSR); |
| 45 | MODULE_PARM_DESC(scrub_overflow_abort, |
| 46 | "Number of times we overflow ARS results before abort"); |
| 47 | |
Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 48 | static bool disable_vendor_specific; |
| 49 | module_param(disable_vendor_specific, bool, S_IRUGO); |
| 50 | MODULE_PARM_DESC(disable_vendor_specific, |
| 51 | "Limit commands to the publicly specified set\n"); |
| 52 | |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 53 | static struct workqueue_struct *nfit_wq; |
| 54 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 55 | struct nfit_table_prev { |
| 56 | struct list_head spas; |
| 57 | struct list_head memdevs; |
| 58 | struct list_head dcrs; |
| 59 | struct list_head bdws; |
| 60 | struct list_head idts; |
| 61 | struct list_head flushes; |
| 62 | }; |
| 63 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 64 | static u8 nfit_uuid[NFIT_UUID_MAX][16]; |
| 65 | |
Dan Williams | 6bc7561 | 2015-06-17 17:23:32 -0400 | [diff] [blame] | 66 | const u8 *to_nfit_uuid(enum nfit_uuids id) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 67 | { |
| 68 | return nfit_uuid[id]; |
| 69 | } |
Dan Williams | 6bc7561 | 2015-06-17 17:23:32 -0400 | [diff] [blame] | 70 | EXPORT_SYMBOL(to_nfit_uuid); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 71 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 72 | static struct acpi_nfit_desc *to_acpi_nfit_desc( |
| 73 | struct nvdimm_bus_descriptor *nd_desc) |
| 74 | { |
| 75 | return container_of(nd_desc, struct acpi_nfit_desc, nd_desc); |
| 76 | } |
| 77 | |
| 78 | static struct acpi_device *to_acpi_dev(struct acpi_nfit_desc *acpi_desc) |
| 79 | { |
| 80 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| 81 | |
| 82 | /* |
| 83 | * If provider == 'ACPI.NFIT' we can assume 'dev' is a struct |
| 84 | * acpi_device. |
| 85 | */ |
| 86 | if (!nd_desc->provider_name |
| 87 | || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0) |
| 88 | return NULL; |
| 89 | |
| 90 | return to_acpi_device(acpi_desc->dev); |
| 91 | } |
| 92 | |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 93 | static int xlat_status(void *buf, unsigned int cmd) |
| 94 | { |
Dan Williams | d4f3236 | 2016-03-03 16:08:54 -0800 | [diff] [blame] | 95 | struct nd_cmd_clear_error *clear_err; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 96 | struct nd_cmd_ars_status *ars_status; |
| 97 | struct nd_cmd_ars_start *ars_start; |
| 98 | struct nd_cmd_ars_cap *ars_cap; |
| 99 | u16 flags; |
| 100 | |
| 101 | switch (cmd) { |
| 102 | case ND_CMD_ARS_CAP: |
| 103 | ars_cap = buf; |
| 104 | if ((ars_cap->status & 0xffff) == NFIT_ARS_CAP_NONE) |
| 105 | return -ENOTTY; |
| 106 | |
| 107 | /* Command failed */ |
| 108 | if (ars_cap->status & 0xffff) |
| 109 | return -EIO; |
| 110 | |
| 111 | /* No supported scan types for this range */ |
| 112 | flags = ND_ARS_PERSISTENT | ND_ARS_VOLATILE; |
| 113 | if ((ars_cap->status >> 16 & flags) == 0) |
| 114 | return -ENOTTY; |
| 115 | break; |
| 116 | case ND_CMD_ARS_START: |
| 117 | ars_start = buf; |
| 118 | /* ARS is in progress */ |
| 119 | if ((ars_start->status & 0xffff) == NFIT_ARS_START_BUSY) |
| 120 | return -EBUSY; |
| 121 | |
| 122 | /* Command failed */ |
| 123 | if (ars_start->status & 0xffff) |
| 124 | return -EIO; |
| 125 | break; |
| 126 | case ND_CMD_ARS_STATUS: |
| 127 | ars_status = buf; |
| 128 | /* Command failed */ |
| 129 | if (ars_status->status & 0xffff) |
| 130 | return -EIO; |
| 131 | /* Check extended status (Upper two bytes) */ |
| 132 | if (ars_status->status == NFIT_ARS_STATUS_DONE) |
| 133 | return 0; |
| 134 | |
| 135 | /* ARS is in progress */ |
| 136 | if (ars_status->status == NFIT_ARS_STATUS_BUSY) |
| 137 | return -EBUSY; |
| 138 | |
| 139 | /* No ARS performed for the current boot */ |
| 140 | if (ars_status->status == NFIT_ARS_STATUS_NONE) |
| 141 | return -EAGAIN; |
| 142 | |
| 143 | /* |
| 144 | * ARS interrupted, either we overflowed or some other |
| 145 | * agent wants the scan to stop. If we didn't overflow |
| 146 | * then just continue with the returned results. |
| 147 | */ |
| 148 | if (ars_status->status == NFIT_ARS_STATUS_INTR) { |
| 149 | if (ars_status->flags & NFIT_ARS_F_OVERFLOW) |
| 150 | return -ENOSPC; |
| 151 | return 0; |
| 152 | } |
| 153 | |
| 154 | /* Unknown status */ |
| 155 | if (ars_status->status >> 16) |
| 156 | return -EIO; |
| 157 | break; |
Dan Williams | d4f3236 | 2016-03-03 16:08:54 -0800 | [diff] [blame] | 158 | case ND_CMD_CLEAR_ERROR: |
| 159 | clear_err = buf; |
| 160 | if (clear_err->status & 0xffff) |
| 161 | return -EIO; |
| 162 | if (!clear_err->cleared) |
| 163 | return -EIO; |
| 164 | if (clear_err->length > clear_err->cleared) |
| 165 | return clear_err->cleared; |
| 166 | break; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 167 | default: |
| 168 | break; |
| 169 | } |
| 170 | |
| 171 | return 0; |
| 172 | } |
| 173 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 174 | static int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, |
| 175 | struct nvdimm *nvdimm, unsigned int cmd, void *buf, |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 176 | unsigned int buf_len, int *cmd_rc) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 177 | { |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 178 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 179 | union acpi_object in_obj, in_buf, *out_obj; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 180 | const struct nd_cmd_desc *desc = NULL; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 181 | struct device *dev = acpi_desc->dev; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 182 | struct nd_cmd_pkg *call_pkg = NULL; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 183 | const char *cmd_name, *dimm_name; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 184 | unsigned long cmd_mask, dsm_mask; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 185 | acpi_handle handle; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 186 | unsigned int func; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 187 | const u8 *uuid; |
| 188 | u32 offset; |
| 189 | int rc, i; |
| 190 | |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 191 | func = cmd; |
| 192 | if (cmd == ND_CMD_CALL) { |
| 193 | call_pkg = buf; |
| 194 | func = call_pkg->nd_command; |
| 195 | } |
| 196 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 197 | if (nvdimm) { |
| 198 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 199 | struct acpi_device *adev = nfit_mem->adev; |
| 200 | |
| 201 | if (!adev) |
| 202 | return -ENOTTY; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 203 | if (call_pkg && nfit_mem->family != call_pkg->nd_family) |
| 204 | return -ENOTTY; |
| 205 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 206 | dimm_name = nvdimm_name(nvdimm); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 207 | cmd_name = nvdimm_cmd_name(cmd); |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 208 | cmd_mask = nvdimm_cmd_mask(nvdimm); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 209 | dsm_mask = nfit_mem->dsm_mask; |
| 210 | desc = nd_cmd_dimm_desc(cmd); |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 211 | uuid = to_nfit_uuid(nfit_mem->family); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 212 | handle = adev->handle; |
| 213 | } else { |
| 214 | struct acpi_device *adev = to_acpi_dev(acpi_desc); |
| 215 | |
| 216 | cmd_name = nvdimm_bus_cmd_name(cmd); |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 217 | cmd_mask = nd_desc->cmd_mask; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 218 | dsm_mask = cmd_mask; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 219 | desc = nd_cmd_bus_desc(cmd); |
| 220 | uuid = to_nfit_uuid(NFIT_DEV_BUS); |
| 221 | handle = adev->handle; |
| 222 | dimm_name = "bus"; |
| 223 | } |
| 224 | |
| 225 | if (!desc || (cmd && (desc->out_num + desc->in_num == 0))) |
| 226 | return -ENOTTY; |
| 227 | |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 228 | if (!test_bit(cmd, &cmd_mask) || !test_bit(func, &dsm_mask)) |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 229 | return -ENOTTY; |
| 230 | |
| 231 | in_obj.type = ACPI_TYPE_PACKAGE; |
| 232 | in_obj.package.count = 1; |
| 233 | in_obj.package.elements = &in_buf; |
| 234 | in_buf.type = ACPI_TYPE_BUFFER; |
| 235 | in_buf.buffer.pointer = buf; |
| 236 | in_buf.buffer.length = 0; |
| 237 | |
| 238 | /* libnvdimm has already validated the input envelope */ |
| 239 | for (i = 0; i < desc->in_num; i++) |
| 240 | in_buf.buffer.length += nd_cmd_in_size(nvdimm, cmd, desc, |
| 241 | i, buf); |
| 242 | |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 243 | if (call_pkg) { |
| 244 | /* skip over package wrapper */ |
| 245 | in_buf.buffer.pointer = (void *) &call_pkg->nd_payload; |
| 246 | in_buf.buffer.length = call_pkg->nd_size_in; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 247 | } |
| 248 | |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 249 | if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) { |
| 250 | dev_dbg(dev, "%s:%s cmd: %d: func: %d input length: %d\n", |
| 251 | __func__, dimm_name, cmd, func, |
| 252 | in_buf.buffer.length); |
| 253 | print_hex_dump_debug("nvdimm in ", DUMP_PREFIX_OFFSET, 4, 4, |
| 254 | in_buf.buffer.pointer, |
| 255 | min_t(u32, 256, in_buf.buffer.length), true); |
| 256 | } |
| 257 | |
| 258 | out_obj = acpi_evaluate_dsm(handle, uuid, 1, func, &in_obj); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 259 | if (!out_obj) { |
| 260 | dev_dbg(dev, "%s:%s _DSM failed cmd: %s\n", __func__, dimm_name, |
| 261 | cmd_name); |
| 262 | return -EINVAL; |
| 263 | } |
| 264 | |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 265 | if (call_pkg) { |
| 266 | call_pkg->nd_fw_size = out_obj->buffer.length; |
| 267 | memcpy(call_pkg->nd_payload + call_pkg->nd_size_in, |
| 268 | out_obj->buffer.pointer, |
| 269 | min(call_pkg->nd_fw_size, call_pkg->nd_size_out)); |
| 270 | |
| 271 | ACPI_FREE(out_obj); |
| 272 | /* |
| 273 | * Need to support FW function w/o known size in advance. |
| 274 | * Caller can determine required size based upon nd_fw_size. |
| 275 | * If we return an error (like elsewhere) then caller wouldn't |
| 276 | * be able to rely upon data returned to make calculation. |
| 277 | */ |
| 278 | return 0; |
| 279 | } |
| 280 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 281 | if (out_obj->package.type != ACPI_TYPE_BUFFER) { |
| 282 | dev_dbg(dev, "%s:%s unexpected output object type cmd: %s type: %d\n", |
| 283 | __func__, dimm_name, cmd_name, out_obj->type); |
| 284 | rc = -EINVAL; |
| 285 | goto out; |
| 286 | } |
| 287 | |
| 288 | if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) { |
| 289 | dev_dbg(dev, "%s:%s cmd: %s output length: %d\n", __func__, |
| 290 | dimm_name, cmd_name, out_obj->buffer.length); |
| 291 | print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4, |
| 292 | 4, out_obj->buffer.pointer, min_t(u32, 128, |
| 293 | out_obj->buffer.length), true); |
| 294 | } |
| 295 | |
| 296 | for (i = 0, offset = 0; i < desc->out_num; i++) { |
| 297 | u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, buf, |
| 298 | (u32 *) out_obj->buffer.pointer); |
| 299 | |
| 300 | if (offset + out_size > out_obj->buffer.length) { |
| 301 | dev_dbg(dev, "%s:%s output object underflow cmd: %s field: %d\n", |
| 302 | __func__, dimm_name, cmd_name, i); |
| 303 | break; |
| 304 | } |
| 305 | |
| 306 | if (in_buf.buffer.length + offset + out_size > buf_len) { |
| 307 | dev_dbg(dev, "%s:%s output overrun cmd: %s field: %d\n", |
| 308 | __func__, dimm_name, cmd_name, i); |
| 309 | rc = -ENXIO; |
| 310 | goto out; |
| 311 | } |
| 312 | memcpy(buf + in_buf.buffer.length + offset, |
| 313 | out_obj->buffer.pointer + offset, out_size); |
| 314 | offset += out_size; |
| 315 | } |
| 316 | if (offset + in_buf.buffer.length < buf_len) { |
| 317 | if (i >= 1) { |
| 318 | /* |
| 319 | * status valid, return the number of bytes left |
| 320 | * unfilled in the output buffer |
| 321 | */ |
| 322 | rc = buf_len - offset - in_buf.buffer.length; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 323 | if (cmd_rc) |
| 324 | *cmd_rc = xlat_status(buf, cmd); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 325 | } else { |
| 326 | dev_err(dev, "%s:%s underrun cmd: %s buf_len: %d out_len: %d\n", |
| 327 | __func__, dimm_name, cmd_name, buf_len, |
| 328 | offset); |
| 329 | rc = -ENXIO; |
| 330 | } |
Dan Williams | 2eea658 | 2016-05-02 09:11:53 -0700 | [diff] [blame] | 331 | } else { |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 332 | rc = 0; |
Dan Williams | 2eea658 | 2016-05-02 09:11:53 -0700 | [diff] [blame] | 333 | if (cmd_rc) |
| 334 | *cmd_rc = xlat_status(buf, cmd); |
| 335 | } |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 336 | |
| 337 | out: |
| 338 | ACPI_FREE(out_obj); |
| 339 | |
| 340 | return rc; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 341 | } |
| 342 | |
| 343 | static const char *spa_type_name(u16 type) |
| 344 | { |
| 345 | static const char *to_name[] = { |
| 346 | [NFIT_SPA_VOLATILE] = "volatile", |
| 347 | [NFIT_SPA_PM] = "pmem", |
| 348 | [NFIT_SPA_DCR] = "dimm-control-region", |
| 349 | [NFIT_SPA_BDW] = "block-data-window", |
| 350 | [NFIT_SPA_VDISK] = "volatile-disk", |
| 351 | [NFIT_SPA_VCD] = "volatile-cd", |
| 352 | [NFIT_SPA_PDISK] = "persistent-disk", |
| 353 | [NFIT_SPA_PCD] = "persistent-cd", |
| 354 | |
| 355 | }; |
| 356 | |
| 357 | if (type > NFIT_SPA_PCD) |
| 358 | return "unknown"; |
| 359 | |
| 360 | return to_name[type]; |
| 361 | } |
| 362 | |
| 363 | static int nfit_spa_type(struct acpi_nfit_system_address *spa) |
| 364 | { |
| 365 | int i; |
| 366 | |
| 367 | for (i = 0; i < NFIT_UUID_MAX; i++) |
| 368 | if (memcmp(to_nfit_uuid(i), spa->range_guid, 16) == 0) |
| 369 | return i; |
| 370 | return -1; |
| 371 | } |
| 372 | |
| 373 | static bool add_spa(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 374 | struct nfit_table_prev *prev, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 375 | struct acpi_nfit_system_address *spa) |
| 376 | { |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 377 | size_t length = min_t(size_t, sizeof(*spa), spa->header.length); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 378 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 379 | struct nfit_spa *nfit_spa; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 380 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 381 | list_for_each_entry(nfit_spa, &prev->spas, list) { |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 382 | if (memcmp(nfit_spa->spa, spa, length) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 383 | list_move_tail(&nfit_spa->list, &acpi_desc->spas); |
| 384 | return true; |
| 385 | } |
| 386 | } |
| 387 | |
| 388 | nfit_spa = devm_kzalloc(dev, sizeof(*nfit_spa), GFP_KERNEL); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 389 | if (!nfit_spa) |
| 390 | return false; |
| 391 | INIT_LIST_HEAD(&nfit_spa->list); |
| 392 | nfit_spa->spa = spa; |
| 393 | list_add_tail(&nfit_spa->list, &acpi_desc->spas); |
| 394 | dev_dbg(dev, "%s: spa index: %d type: %s\n", __func__, |
| 395 | spa->range_index, |
| 396 | spa_type_name(nfit_spa_type(spa))); |
| 397 | return true; |
| 398 | } |
| 399 | |
| 400 | static bool add_memdev(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 401 | struct nfit_table_prev *prev, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 402 | struct acpi_nfit_memory_map *memdev) |
| 403 | { |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 404 | size_t length = min_t(size_t, sizeof(*memdev), memdev->header.length); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 405 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 406 | struct nfit_memdev *nfit_memdev; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 407 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 408 | list_for_each_entry(nfit_memdev, &prev->memdevs, list) |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 409 | if (memcmp(nfit_memdev->memdev, memdev, length) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 410 | list_move_tail(&nfit_memdev->list, &acpi_desc->memdevs); |
| 411 | return true; |
| 412 | } |
| 413 | |
| 414 | nfit_memdev = devm_kzalloc(dev, sizeof(*nfit_memdev), GFP_KERNEL); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 415 | if (!nfit_memdev) |
| 416 | return false; |
| 417 | INIT_LIST_HEAD(&nfit_memdev->list); |
| 418 | nfit_memdev->memdev = memdev; |
| 419 | list_add_tail(&nfit_memdev->list, &acpi_desc->memdevs); |
| 420 | dev_dbg(dev, "%s: memdev handle: %#x spa: %d dcr: %d\n", |
| 421 | __func__, memdev->device_handle, memdev->range_index, |
| 422 | memdev->region_index); |
| 423 | return true; |
| 424 | } |
| 425 | |
| 426 | static bool add_dcr(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 427 | struct nfit_table_prev *prev, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 428 | struct acpi_nfit_control_region *dcr) |
| 429 | { |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 430 | size_t length = min_t(size_t, sizeof(*dcr), dcr->header.length); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 431 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 432 | struct nfit_dcr *nfit_dcr; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 433 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 434 | list_for_each_entry(nfit_dcr, &prev->dcrs, list) |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 435 | if (memcmp(nfit_dcr->dcr, dcr, length) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 436 | list_move_tail(&nfit_dcr->list, &acpi_desc->dcrs); |
| 437 | return true; |
| 438 | } |
| 439 | |
| 440 | nfit_dcr = devm_kzalloc(dev, sizeof(*nfit_dcr), GFP_KERNEL); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 441 | if (!nfit_dcr) |
| 442 | return false; |
| 443 | INIT_LIST_HEAD(&nfit_dcr->list); |
| 444 | nfit_dcr->dcr = dcr; |
| 445 | list_add_tail(&nfit_dcr->list, &acpi_desc->dcrs); |
| 446 | dev_dbg(dev, "%s: dcr index: %d windows: %d\n", __func__, |
| 447 | dcr->region_index, dcr->windows); |
| 448 | return true; |
| 449 | } |
| 450 | |
| 451 | static bool add_bdw(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 452 | struct nfit_table_prev *prev, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 453 | struct acpi_nfit_data_region *bdw) |
| 454 | { |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 455 | size_t length = min_t(size_t, sizeof(*bdw), bdw->header.length); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 456 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 457 | struct nfit_bdw *nfit_bdw; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 458 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 459 | list_for_each_entry(nfit_bdw, &prev->bdws, list) |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 460 | if (memcmp(nfit_bdw->bdw, bdw, length) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 461 | list_move_tail(&nfit_bdw->list, &acpi_desc->bdws); |
| 462 | return true; |
| 463 | } |
| 464 | |
| 465 | nfit_bdw = devm_kzalloc(dev, sizeof(*nfit_bdw), GFP_KERNEL); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 466 | if (!nfit_bdw) |
| 467 | return false; |
| 468 | INIT_LIST_HEAD(&nfit_bdw->list); |
| 469 | nfit_bdw->bdw = bdw; |
| 470 | list_add_tail(&nfit_bdw->list, &acpi_desc->bdws); |
| 471 | dev_dbg(dev, "%s: bdw dcr: %d windows: %d\n", __func__, |
| 472 | bdw->region_index, bdw->windows); |
| 473 | return true; |
| 474 | } |
| 475 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 476 | static bool add_idt(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 477 | struct nfit_table_prev *prev, |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 478 | struct acpi_nfit_interleave *idt) |
| 479 | { |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 480 | size_t length = min_t(size_t, sizeof(*idt), idt->header.length); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 481 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 482 | struct nfit_idt *nfit_idt; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 483 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 484 | list_for_each_entry(nfit_idt, &prev->idts, list) |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 485 | if (memcmp(nfit_idt->idt, idt, length) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 486 | list_move_tail(&nfit_idt->list, &acpi_desc->idts); |
| 487 | return true; |
| 488 | } |
| 489 | |
| 490 | nfit_idt = devm_kzalloc(dev, sizeof(*nfit_idt), GFP_KERNEL); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 491 | if (!nfit_idt) |
| 492 | return false; |
| 493 | INIT_LIST_HEAD(&nfit_idt->list); |
| 494 | nfit_idt->idt = idt; |
| 495 | list_add_tail(&nfit_idt->list, &acpi_desc->idts); |
| 496 | dev_dbg(dev, "%s: idt index: %d num_lines: %d\n", __func__, |
| 497 | idt->interleave_index, idt->line_count); |
| 498 | return true; |
| 499 | } |
| 500 | |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 501 | static bool add_flush(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 502 | struct nfit_table_prev *prev, |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 503 | struct acpi_nfit_flush_address *flush) |
| 504 | { |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 505 | size_t length = min_t(size_t, sizeof(*flush), flush->header.length); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 506 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 507 | struct nfit_flush *nfit_flush; |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 508 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 509 | list_for_each_entry(nfit_flush, &prev->flushes, list) |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 510 | if (memcmp(nfit_flush->flush, flush, length) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 511 | list_move_tail(&nfit_flush->list, &acpi_desc->flushes); |
| 512 | return true; |
| 513 | } |
| 514 | |
| 515 | nfit_flush = devm_kzalloc(dev, sizeof(*nfit_flush), GFP_KERNEL); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 516 | if (!nfit_flush) |
| 517 | return false; |
| 518 | INIT_LIST_HEAD(&nfit_flush->list); |
| 519 | nfit_flush->flush = flush; |
| 520 | list_add_tail(&nfit_flush->list, &acpi_desc->flushes); |
| 521 | dev_dbg(dev, "%s: nfit_flush handle: %d hint_count: %d\n", __func__, |
| 522 | flush->device_handle, flush->hint_count); |
| 523 | return true; |
| 524 | } |
| 525 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 526 | static void *add_table(struct acpi_nfit_desc *acpi_desc, |
| 527 | struct nfit_table_prev *prev, void *table, const void *end) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 528 | { |
| 529 | struct device *dev = acpi_desc->dev; |
| 530 | struct acpi_nfit_header *hdr; |
| 531 | void *err = ERR_PTR(-ENOMEM); |
| 532 | |
| 533 | if (table >= end) |
| 534 | return NULL; |
| 535 | |
| 536 | hdr = table; |
Vishal Verma | 564d501 | 2015-10-27 16:58:26 -0600 | [diff] [blame] | 537 | if (!hdr->length) { |
| 538 | dev_warn(dev, "found a zero length table '%d' parsing nfit\n", |
| 539 | hdr->type); |
| 540 | return NULL; |
| 541 | } |
| 542 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 543 | switch (hdr->type) { |
| 544 | case ACPI_NFIT_TYPE_SYSTEM_ADDRESS: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 545 | if (!add_spa(acpi_desc, prev, table)) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 546 | return err; |
| 547 | break; |
| 548 | case ACPI_NFIT_TYPE_MEMORY_MAP: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 549 | if (!add_memdev(acpi_desc, prev, table)) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 550 | return err; |
| 551 | break; |
| 552 | case ACPI_NFIT_TYPE_CONTROL_REGION: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 553 | if (!add_dcr(acpi_desc, prev, table)) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 554 | return err; |
| 555 | break; |
| 556 | case ACPI_NFIT_TYPE_DATA_REGION: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 557 | if (!add_bdw(acpi_desc, prev, table)) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 558 | return err; |
| 559 | break; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 560 | case ACPI_NFIT_TYPE_INTERLEAVE: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 561 | if (!add_idt(acpi_desc, prev, table)) |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 562 | return err; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 563 | break; |
| 564 | case ACPI_NFIT_TYPE_FLUSH_ADDRESS: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 565 | if (!add_flush(acpi_desc, prev, table)) |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 566 | return err; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 567 | break; |
| 568 | case ACPI_NFIT_TYPE_SMBIOS: |
| 569 | dev_dbg(dev, "%s: smbios\n", __func__); |
| 570 | break; |
| 571 | default: |
| 572 | dev_err(dev, "unknown table '%d' parsing nfit\n", hdr->type); |
| 573 | break; |
| 574 | } |
| 575 | |
| 576 | return table + hdr->length; |
| 577 | } |
| 578 | |
| 579 | static void nfit_mem_find_spa_bdw(struct acpi_nfit_desc *acpi_desc, |
| 580 | struct nfit_mem *nfit_mem) |
| 581 | { |
| 582 | u32 device_handle = __to_nfit_memdev(nfit_mem)->device_handle; |
| 583 | u16 dcr = nfit_mem->dcr->region_index; |
| 584 | struct nfit_spa *nfit_spa; |
| 585 | |
| 586 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| 587 | u16 range_index = nfit_spa->spa->range_index; |
| 588 | int type = nfit_spa_type(nfit_spa->spa); |
| 589 | struct nfit_memdev *nfit_memdev; |
| 590 | |
| 591 | if (type != NFIT_SPA_BDW) |
| 592 | continue; |
| 593 | |
| 594 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 595 | if (nfit_memdev->memdev->range_index != range_index) |
| 596 | continue; |
| 597 | if (nfit_memdev->memdev->device_handle != device_handle) |
| 598 | continue; |
| 599 | if (nfit_memdev->memdev->region_index != dcr) |
| 600 | continue; |
| 601 | |
| 602 | nfit_mem->spa_bdw = nfit_spa->spa; |
| 603 | return; |
| 604 | } |
| 605 | } |
| 606 | |
| 607 | dev_dbg(acpi_desc->dev, "SPA-BDW not found for SPA-DCR %d\n", |
| 608 | nfit_mem->spa_dcr->range_index); |
| 609 | nfit_mem->bdw = NULL; |
| 610 | } |
| 611 | |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 612 | static void nfit_mem_init_bdw(struct acpi_nfit_desc *acpi_desc, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 613 | struct nfit_mem *nfit_mem, struct acpi_nfit_system_address *spa) |
| 614 | { |
| 615 | u16 dcr = __to_nfit_memdev(nfit_mem)->region_index; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 616 | struct nfit_memdev *nfit_memdev; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 617 | struct nfit_bdw *nfit_bdw; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 618 | struct nfit_idt *nfit_idt; |
| 619 | u16 idt_idx, range_index; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 620 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 621 | list_for_each_entry(nfit_bdw, &acpi_desc->bdws, list) { |
| 622 | if (nfit_bdw->bdw->region_index != dcr) |
| 623 | continue; |
| 624 | nfit_mem->bdw = nfit_bdw->bdw; |
| 625 | break; |
| 626 | } |
| 627 | |
| 628 | if (!nfit_mem->bdw) |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 629 | return; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 630 | |
| 631 | nfit_mem_find_spa_bdw(acpi_desc, nfit_mem); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 632 | |
| 633 | if (!nfit_mem->spa_bdw) |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 634 | return; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 635 | |
| 636 | range_index = nfit_mem->spa_bdw->range_index; |
| 637 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 638 | if (nfit_memdev->memdev->range_index != range_index || |
| 639 | nfit_memdev->memdev->region_index != dcr) |
| 640 | continue; |
| 641 | nfit_mem->memdev_bdw = nfit_memdev->memdev; |
| 642 | idt_idx = nfit_memdev->memdev->interleave_index; |
| 643 | list_for_each_entry(nfit_idt, &acpi_desc->idts, list) { |
| 644 | if (nfit_idt->idt->interleave_index != idt_idx) |
| 645 | continue; |
| 646 | nfit_mem->idt_bdw = nfit_idt->idt; |
| 647 | break; |
| 648 | } |
| 649 | break; |
| 650 | } |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 651 | } |
| 652 | |
| 653 | static int nfit_mem_dcr_init(struct acpi_nfit_desc *acpi_desc, |
| 654 | struct acpi_nfit_system_address *spa) |
| 655 | { |
| 656 | struct nfit_mem *nfit_mem, *found; |
| 657 | struct nfit_memdev *nfit_memdev; |
| 658 | int type = nfit_spa_type(spa); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 659 | |
| 660 | switch (type) { |
| 661 | case NFIT_SPA_DCR: |
| 662 | case NFIT_SPA_PM: |
| 663 | break; |
| 664 | default: |
| 665 | return 0; |
| 666 | } |
| 667 | |
| 668 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
Dan Williams | ad9ac5e | 2016-05-26 11:38:08 -0700 | [diff] [blame] | 669 | struct nfit_flush *nfit_flush; |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 670 | struct nfit_dcr *nfit_dcr; |
| 671 | u32 device_handle; |
| 672 | u16 dcr; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 673 | |
| 674 | if (nfit_memdev->memdev->range_index != spa->range_index) |
| 675 | continue; |
| 676 | found = NULL; |
| 677 | dcr = nfit_memdev->memdev->region_index; |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 678 | device_handle = nfit_memdev->memdev->device_handle; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 679 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 680 | if (__to_nfit_memdev(nfit_mem)->device_handle |
| 681 | == device_handle) { |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 682 | found = nfit_mem; |
| 683 | break; |
| 684 | } |
| 685 | |
| 686 | if (found) |
| 687 | nfit_mem = found; |
| 688 | else { |
| 689 | nfit_mem = devm_kzalloc(acpi_desc->dev, |
| 690 | sizeof(*nfit_mem), GFP_KERNEL); |
| 691 | if (!nfit_mem) |
| 692 | return -ENOMEM; |
| 693 | INIT_LIST_HEAD(&nfit_mem->list); |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 694 | nfit_mem->acpi_desc = acpi_desc; |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 695 | list_add(&nfit_mem->list, &acpi_desc->dimms); |
| 696 | } |
| 697 | |
| 698 | list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) { |
| 699 | if (nfit_dcr->dcr->region_index != dcr) |
| 700 | continue; |
| 701 | /* |
| 702 | * Record the control region for the dimm. For |
| 703 | * the ACPI 6.1 case, where there are separate |
| 704 | * control regions for the pmem vs blk |
| 705 | * interfaces, be sure to record the extended |
| 706 | * blk details. |
| 707 | */ |
| 708 | if (!nfit_mem->dcr) |
| 709 | nfit_mem->dcr = nfit_dcr->dcr; |
| 710 | else if (nfit_mem->dcr->windows == 0 |
| 711 | && nfit_dcr->dcr->windows) |
| 712 | nfit_mem->dcr = nfit_dcr->dcr; |
| 713 | break; |
| 714 | } |
| 715 | |
Dan Williams | ad9ac5e | 2016-05-26 11:38:08 -0700 | [diff] [blame] | 716 | list_for_each_entry(nfit_flush, &acpi_desc->flushes, list) { |
Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 717 | struct acpi_nfit_flush_address *flush; |
| 718 | u16 i; |
| 719 | |
Dan Williams | ad9ac5e | 2016-05-26 11:38:08 -0700 | [diff] [blame] | 720 | if (nfit_flush->flush->device_handle != device_handle) |
| 721 | continue; |
| 722 | nfit_mem->nfit_flush = nfit_flush; |
Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 723 | flush = nfit_flush->flush; |
| 724 | nfit_mem->flush_wpq = devm_kzalloc(acpi_desc->dev, |
| 725 | flush->hint_count |
| 726 | * sizeof(struct resource), GFP_KERNEL); |
| 727 | if (!nfit_mem->flush_wpq) |
| 728 | return -ENOMEM; |
| 729 | for (i = 0; i < flush->hint_count; i++) { |
| 730 | struct resource *res = &nfit_mem->flush_wpq[i]; |
| 731 | |
| 732 | res->start = flush->hint_address[i]; |
| 733 | res->end = res->start + 8 - 1; |
| 734 | } |
Dan Williams | ad9ac5e | 2016-05-26 11:38:08 -0700 | [diff] [blame] | 735 | break; |
| 736 | } |
| 737 | |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 738 | if (dcr && !nfit_mem->dcr) { |
| 739 | dev_err(acpi_desc->dev, "SPA %d missing DCR %d\n", |
| 740 | spa->range_index, dcr); |
| 741 | return -ENODEV; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 742 | } |
| 743 | |
| 744 | if (type == NFIT_SPA_DCR) { |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 745 | struct nfit_idt *nfit_idt; |
| 746 | u16 idt_idx; |
| 747 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 748 | /* multiple dimms may share a SPA when interleaved */ |
| 749 | nfit_mem->spa_dcr = spa; |
| 750 | nfit_mem->memdev_dcr = nfit_memdev->memdev; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 751 | idt_idx = nfit_memdev->memdev->interleave_index; |
| 752 | list_for_each_entry(nfit_idt, &acpi_desc->idts, list) { |
| 753 | if (nfit_idt->idt->interleave_index != idt_idx) |
| 754 | continue; |
| 755 | nfit_mem->idt_dcr = nfit_idt->idt; |
| 756 | break; |
| 757 | } |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 758 | nfit_mem_init_bdw(acpi_desc, nfit_mem, spa); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 759 | } else { |
| 760 | /* |
| 761 | * A single dimm may belong to multiple SPA-PM |
| 762 | * ranges, record at least one in addition to |
| 763 | * any SPA-DCR range. |
| 764 | */ |
| 765 | nfit_mem->memdev_pmem = nfit_memdev->memdev; |
| 766 | } |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 767 | } |
| 768 | |
| 769 | return 0; |
| 770 | } |
| 771 | |
| 772 | static int nfit_mem_cmp(void *priv, struct list_head *_a, struct list_head *_b) |
| 773 | { |
| 774 | struct nfit_mem *a = container_of(_a, typeof(*a), list); |
| 775 | struct nfit_mem *b = container_of(_b, typeof(*b), list); |
| 776 | u32 handleA, handleB; |
| 777 | |
| 778 | handleA = __to_nfit_memdev(a)->device_handle; |
| 779 | handleB = __to_nfit_memdev(b)->device_handle; |
| 780 | if (handleA < handleB) |
| 781 | return -1; |
| 782 | else if (handleA > handleB) |
| 783 | return 1; |
| 784 | return 0; |
| 785 | } |
| 786 | |
| 787 | static int nfit_mem_init(struct acpi_nfit_desc *acpi_desc) |
| 788 | { |
| 789 | struct nfit_spa *nfit_spa; |
| 790 | |
| 791 | /* |
| 792 | * For each SPA-DCR or SPA-PMEM address range find its |
| 793 | * corresponding MEMDEV(s). From each MEMDEV find the |
| 794 | * corresponding DCR. Then, if we're operating on a SPA-DCR, |
| 795 | * try to find a SPA-BDW and a corresponding BDW that references |
| 796 | * the DCR. Throw it all into an nfit_mem object. Note, that |
| 797 | * BDWs are optional. |
| 798 | */ |
| 799 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| 800 | int rc; |
| 801 | |
| 802 | rc = nfit_mem_dcr_init(acpi_desc, nfit_spa->spa); |
| 803 | if (rc) |
| 804 | return rc; |
| 805 | } |
| 806 | |
| 807 | list_sort(NULL, &acpi_desc->dimms, nfit_mem_cmp); |
| 808 | |
| 809 | return 0; |
| 810 | } |
| 811 | |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 812 | static ssize_t revision_show(struct device *dev, |
| 813 | struct device_attribute *attr, char *buf) |
| 814 | { |
| 815 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); |
| 816 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); |
| 817 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| 818 | |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 819 | return sprintf(buf, "%d\n", acpi_desc->acpi_header.revision); |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 820 | } |
| 821 | static DEVICE_ATTR_RO(revision); |
| 822 | |
| 823 | static struct attribute *acpi_nfit_attributes[] = { |
| 824 | &dev_attr_revision.attr, |
| 825 | NULL, |
| 826 | }; |
| 827 | |
| 828 | static struct attribute_group acpi_nfit_attribute_group = { |
| 829 | .name = "nfit", |
| 830 | .attrs = acpi_nfit_attributes, |
| 831 | }; |
| 832 | |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 833 | static const struct attribute_group *acpi_nfit_attribute_groups[] = { |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 834 | &nvdimm_bus_attribute_group, |
| 835 | &acpi_nfit_attribute_group, |
| 836 | NULL, |
| 837 | }; |
| 838 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 839 | static struct acpi_nfit_memory_map *to_nfit_memdev(struct device *dev) |
| 840 | { |
| 841 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 842 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 843 | |
| 844 | return __to_nfit_memdev(nfit_mem); |
| 845 | } |
| 846 | |
| 847 | static struct acpi_nfit_control_region *to_nfit_dcr(struct device *dev) |
| 848 | { |
| 849 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 850 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 851 | |
| 852 | return nfit_mem->dcr; |
| 853 | } |
| 854 | |
| 855 | static ssize_t handle_show(struct device *dev, |
| 856 | struct device_attribute *attr, char *buf) |
| 857 | { |
| 858 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); |
| 859 | |
| 860 | return sprintf(buf, "%#x\n", memdev->device_handle); |
| 861 | } |
| 862 | static DEVICE_ATTR_RO(handle); |
| 863 | |
| 864 | static ssize_t phys_id_show(struct device *dev, |
| 865 | struct device_attribute *attr, char *buf) |
| 866 | { |
| 867 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); |
| 868 | |
| 869 | return sprintf(buf, "%#x\n", memdev->physical_id); |
| 870 | } |
| 871 | static DEVICE_ATTR_RO(phys_id); |
| 872 | |
| 873 | static ssize_t vendor_show(struct device *dev, |
| 874 | struct device_attribute *attr, char *buf) |
| 875 | { |
| 876 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 877 | |
Toshi Kani | 5ad9a7f | 2016-04-25 15:34:58 -0600 | [diff] [blame] | 878 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->vendor_id)); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 879 | } |
| 880 | static DEVICE_ATTR_RO(vendor); |
| 881 | |
| 882 | static ssize_t rev_id_show(struct device *dev, |
| 883 | struct device_attribute *attr, char *buf) |
| 884 | { |
| 885 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 886 | |
Toshi Kani | 5ad9a7f | 2016-04-25 15:34:58 -0600 | [diff] [blame] | 887 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->revision_id)); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 888 | } |
| 889 | static DEVICE_ATTR_RO(rev_id); |
| 890 | |
| 891 | static ssize_t device_show(struct device *dev, |
| 892 | struct device_attribute *attr, char *buf) |
| 893 | { |
| 894 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 895 | |
Toshi Kani | 5ad9a7f | 2016-04-25 15:34:58 -0600 | [diff] [blame] | 896 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->device_id)); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 897 | } |
| 898 | static DEVICE_ATTR_RO(device); |
| 899 | |
Dan Williams | 6ca7208 | 2016-04-29 10:33:23 -0700 | [diff] [blame] | 900 | static ssize_t subsystem_vendor_show(struct device *dev, |
| 901 | struct device_attribute *attr, char *buf) |
| 902 | { |
| 903 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 904 | |
| 905 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_vendor_id)); |
| 906 | } |
| 907 | static DEVICE_ATTR_RO(subsystem_vendor); |
| 908 | |
| 909 | static ssize_t subsystem_rev_id_show(struct device *dev, |
| 910 | struct device_attribute *attr, char *buf) |
| 911 | { |
| 912 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 913 | |
| 914 | return sprintf(buf, "0x%04x\n", |
| 915 | be16_to_cpu(dcr->subsystem_revision_id)); |
| 916 | } |
| 917 | static DEVICE_ATTR_RO(subsystem_rev_id); |
| 918 | |
| 919 | static ssize_t subsystem_device_show(struct device *dev, |
| 920 | struct device_attribute *attr, char *buf) |
| 921 | { |
| 922 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 923 | |
| 924 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_device_id)); |
| 925 | } |
| 926 | static DEVICE_ATTR_RO(subsystem_device); |
| 927 | |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 928 | static int num_nvdimm_formats(struct nvdimm *nvdimm) |
| 929 | { |
| 930 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 931 | int formats = 0; |
| 932 | |
| 933 | if (nfit_mem->memdev_pmem) |
| 934 | formats++; |
| 935 | if (nfit_mem->memdev_bdw) |
| 936 | formats++; |
| 937 | return formats; |
| 938 | } |
| 939 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 940 | static ssize_t format_show(struct device *dev, |
| 941 | struct device_attribute *attr, char *buf) |
| 942 | { |
| 943 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 944 | |
Dan Williams | 1b982ba | 2016-05-18 10:07:19 -0700 | [diff] [blame] | 945 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->code)); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 946 | } |
| 947 | static DEVICE_ATTR_RO(format); |
| 948 | |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 949 | static ssize_t format1_show(struct device *dev, |
| 950 | struct device_attribute *attr, char *buf) |
| 951 | { |
| 952 | u32 handle; |
| 953 | ssize_t rc = -ENXIO; |
| 954 | struct nfit_mem *nfit_mem; |
| 955 | struct nfit_memdev *nfit_memdev; |
| 956 | struct acpi_nfit_desc *acpi_desc; |
| 957 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 958 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 959 | |
| 960 | nfit_mem = nvdimm_provider_data(nvdimm); |
| 961 | acpi_desc = nfit_mem->acpi_desc; |
| 962 | handle = to_nfit_memdev(dev)->device_handle; |
| 963 | |
| 964 | /* assumes DIMMs have at most 2 published interface codes */ |
| 965 | mutex_lock(&acpi_desc->init_mutex); |
| 966 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 967 | struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev; |
| 968 | struct nfit_dcr *nfit_dcr; |
| 969 | |
| 970 | if (memdev->device_handle != handle) |
| 971 | continue; |
| 972 | |
| 973 | list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) { |
| 974 | if (nfit_dcr->dcr->region_index != memdev->region_index) |
| 975 | continue; |
| 976 | if (nfit_dcr->dcr->code == dcr->code) |
| 977 | continue; |
Dan Williams | 1b982ba | 2016-05-18 10:07:19 -0700 | [diff] [blame] | 978 | rc = sprintf(buf, "%#x\n", |
| 979 | be16_to_cpu(nfit_dcr->dcr->code)); |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 980 | break; |
| 981 | } |
| 982 | if (rc != ENXIO) |
| 983 | break; |
| 984 | } |
| 985 | mutex_unlock(&acpi_desc->init_mutex); |
| 986 | return rc; |
| 987 | } |
| 988 | static DEVICE_ATTR_RO(format1); |
| 989 | |
| 990 | static ssize_t formats_show(struct device *dev, |
| 991 | struct device_attribute *attr, char *buf) |
| 992 | { |
| 993 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 994 | |
| 995 | return sprintf(buf, "%d\n", num_nvdimm_formats(nvdimm)); |
| 996 | } |
| 997 | static DEVICE_ATTR_RO(formats); |
| 998 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 999 | static ssize_t serial_show(struct device *dev, |
| 1000 | struct device_attribute *attr, char *buf) |
| 1001 | { |
| 1002 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1003 | |
Toshi Kani | 5ad9a7f | 2016-04-25 15:34:58 -0600 | [diff] [blame] | 1004 | return sprintf(buf, "0x%08x\n", be32_to_cpu(dcr->serial_number)); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1005 | } |
| 1006 | static DEVICE_ATTR_RO(serial); |
| 1007 | |
Dan Williams | a94e3fb | 2016-04-28 18:18:05 -0700 | [diff] [blame] | 1008 | static ssize_t family_show(struct device *dev, |
| 1009 | struct device_attribute *attr, char *buf) |
| 1010 | { |
| 1011 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1012 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1013 | |
| 1014 | if (nfit_mem->family < 0) |
| 1015 | return -ENXIO; |
| 1016 | return sprintf(buf, "%d\n", nfit_mem->family); |
| 1017 | } |
| 1018 | static DEVICE_ATTR_RO(family); |
| 1019 | |
| 1020 | static ssize_t dsm_mask_show(struct device *dev, |
| 1021 | struct device_attribute *attr, char *buf) |
| 1022 | { |
| 1023 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1024 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1025 | |
| 1026 | if (nfit_mem->family < 0) |
| 1027 | return -ENXIO; |
| 1028 | return sprintf(buf, "%#lx\n", nfit_mem->dsm_mask); |
| 1029 | } |
| 1030 | static DEVICE_ATTR_RO(dsm_mask); |
| 1031 | |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1032 | static ssize_t flags_show(struct device *dev, |
| 1033 | struct device_attribute *attr, char *buf) |
| 1034 | { |
| 1035 | u16 flags = to_nfit_memdev(dev)->flags; |
| 1036 | |
| 1037 | return sprintf(buf, "%s%s%s%s%s\n", |
Toshi Kani | 402bae5 | 2015-08-26 10:20:23 -0600 | [diff] [blame] | 1038 | flags & ACPI_NFIT_MEM_SAVE_FAILED ? "save_fail " : "", |
| 1039 | flags & ACPI_NFIT_MEM_RESTORE_FAILED ? "restore_fail " : "", |
| 1040 | flags & ACPI_NFIT_MEM_FLUSH_FAILED ? "flush_fail " : "", |
Bob Moore | ca321d1 | 2015-10-19 10:24:52 +0800 | [diff] [blame] | 1041 | flags & ACPI_NFIT_MEM_NOT_ARMED ? "not_armed " : "", |
Toshi Kani | 402bae5 | 2015-08-26 10:20:23 -0600 | [diff] [blame] | 1042 | flags & ACPI_NFIT_MEM_HEALTH_OBSERVED ? "smart_event " : ""); |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1043 | } |
| 1044 | static DEVICE_ATTR_RO(flags); |
| 1045 | |
Toshi Kani | 38a879b | 2016-04-25 15:34:59 -0600 | [diff] [blame] | 1046 | static ssize_t id_show(struct device *dev, |
| 1047 | struct device_attribute *attr, char *buf) |
| 1048 | { |
| 1049 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1050 | |
| 1051 | if (dcr->valid_fields & ACPI_NFIT_CONTROL_MFG_INFO_VALID) |
| 1052 | return sprintf(buf, "%04x-%02x-%04x-%08x\n", |
| 1053 | be16_to_cpu(dcr->vendor_id), |
| 1054 | dcr->manufacturing_location, |
| 1055 | be16_to_cpu(dcr->manufacturing_date), |
| 1056 | be32_to_cpu(dcr->serial_number)); |
| 1057 | else |
| 1058 | return sprintf(buf, "%04x-%08x\n", |
| 1059 | be16_to_cpu(dcr->vendor_id), |
| 1060 | be32_to_cpu(dcr->serial_number)); |
| 1061 | } |
| 1062 | static DEVICE_ATTR_RO(id); |
| 1063 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1064 | static struct attribute *acpi_nfit_dimm_attributes[] = { |
| 1065 | &dev_attr_handle.attr, |
| 1066 | &dev_attr_phys_id.attr, |
| 1067 | &dev_attr_vendor.attr, |
| 1068 | &dev_attr_device.attr, |
Dan Williams | 6ca7208 | 2016-04-29 10:33:23 -0700 | [diff] [blame] | 1069 | &dev_attr_rev_id.attr, |
| 1070 | &dev_attr_subsystem_vendor.attr, |
| 1071 | &dev_attr_subsystem_device.attr, |
| 1072 | &dev_attr_subsystem_rev_id.attr, |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1073 | &dev_attr_format.attr, |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1074 | &dev_attr_formats.attr, |
| 1075 | &dev_attr_format1.attr, |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1076 | &dev_attr_serial.attr, |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1077 | &dev_attr_flags.attr, |
Toshi Kani | 38a879b | 2016-04-25 15:34:59 -0600 | [diff] [blame] | 1078 | &dev_attr_id.attr, |
Dan Williams | a94e3fb | 2016-04-28 18:18:05 -0700 | [diff] [blame] | 1079 | &dev_attr_family.attr, |
| 1080 | &dev_attr_dsm_mask.attr, |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1081 | NULL, |
| 1082 | }; |
| 1083 | |
| 1084 | static umode_t acpi_nfit_dimm_attr_visible(struct kobject *kobj, |
| 1085 | struct attribute *a, int n) |
| 1086 | { |
| 1087 | struct device *dev = container_of(kobj, struct device, kobj); |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1088 | struct nvdimm *nvdimm = to_nvdimm(dev); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1089 | |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1090 | if (!to_nfit_dcr(dev)) |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1091 | return 0; |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1092 | if (a == &dev_attr_format1.attr && num_nvdimm_formats(nvdimm) <= 1) |
| 1093 | return 0; |
| 1094 | return a->mode; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1095 | } |
| 1096 | |
| 1097 | static struct attribute_group acpi_nfit_dimm_attribute_group = { |
| 1098 | .name = "nfit", |
| 1099 | .attrs = acpi_nfit_dimm_attributes, |
| 1100 | .is_visible = acpi_nfit_dimm_attr_visible, |
| 1101 | }; |
| 1102 | |
| 1103 | static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = { |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1104 | &nvdimm_attribute_group, |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 1105 | &nd_device_attribute_group, |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1106 | &acpi_nfit_dimm_attribute_group, |
| 1107 | NULL, |
| 1108 | }; |
| 1109 | |
| 1110 | static struct nvdimm *acpi_nfit_dimm_by_handle(struct acpi_nfit_desc *acpi_desc, |
| 1111 | u32 device_handle) |
| 1112 | { |
| 1113 | struct nfit_mem *nfit_mem; |
| 1114 | |
| 1115 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) |
| 1116 | if (__to_nfit_memdev(nfit_mem)->device_handle == device_handle) |
| 1117 | return nfit_mem->nvdimm; |
| 1118 | |
| 1119 | return NULL; |
| 1120 | } |
| 1121 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1122 | static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc, |
| 1123 | struct nfit_mem *nfit_mem, u32 device_handle) |
| 1124 | { |
| 1125 | struct acpi_device *adev, *adev_dimm; |
| 1126 | struct device *dev = acpi_desc->dev; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1127 | unsigned long dsm_mask; |
| 1128 | const u8 *uuid; |
Linda Knippers | 60e95f4 | 2015-07-22 16:17:22 -0400 | [diff] [blame] | 1129 | int i; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1130 | |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 1131 | /* nfit test assumes 1:1 relationship between commands and dsms */ |
| 1132 | nfit_mem->dsm_mask = acpi_desc->dimm_cmd_force_en; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1133 | nfit_mem->family = NVDIMM_FAMILY_INTEL; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1134 | adev = to_acpi_dev(acpi_desc); |
| 1135 | if (!adev) |
| 1136 | return 0; |
| 1137 | |
| 1138 | adev_dimm = acpi_find_child_device(adev, device_handle, false); |
| 1139 | nfit_mem->adev = adev_dimm; |
| 1140 | if (!adev_dimm) { |
| 1141 | dev_err(dev, "no ACPI.NFIT device with _ADR %#x, disabling...\n", |
| 1142 | device_handle); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 1143 | return force_enable_dimms ? 0 : -ENODEV; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1144 | } |
| 1145 | |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1146 | /* |
stuart hayes | e02fb72 | 2016-05-26 11:38:41 -0500 | [diff] [blame] | 1147 | * Until standardization materializes we need to consider 4 |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1148 | * different command sets. Note, that checking for function0 (bit0) |
| 1149 | * tells us if any commands are reachable through this uuid. |
| 1150 | */ |
stuart hayes | e02fb72 | 2016-05-26 11:38:41 -0500 | [diff] [blame] | 1151 | for (i = NVDIMM_FAMILY_INTEL; i <= NVDIMM_FAMILY_MSFT; i++) |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1152 | if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 1)) |
| 1153 | break; |
| 1154 | |
| 1155 | /* limit the supported commands to those that are publicly documented */ |
| 1156 | nfit_mem->family = i; |
Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 1157 | if (nfit_mem->family == NVDIMM_FAMILY_INTEL) { |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1158 | dsm_mask = 0x3fe; |
Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 1159 | if (disable_vendor_specific) |
| 1160 | dsm_mask &= ~(1 << ND_CMD_VENDOR); |
stuart hayes | e02fb72 | 2016-05-26 11:38:41 -0500 | [diff] [blame] | 1161 | } else if (nfit_mem->family == NVDIMM_FAMILY_HPE1) { |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1162 | dsm_mask = 0x1c3c76; |
stuart hayes | e02fb72 | 2016-05-26 11:38:41 -0500 | [diff] [blame] | 1163 | } else if (nfit_mem->family == NVDIMM_FAMILY_HPE2) { |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1164 | dsm_mask = 0x1fe; |
Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 1165 | if (disable_vendor_specific) |
| 1166 | dsm_mask &= ~(1 << 8); |
stuart hayes | e02fb72 | 2016-05-26 11:38:41 -0500 | [diff] [blame] | 1167 | } else if (nfit_mem->family == NVDIMM_FAMILY_MSFT) { |
| 1168 | dsm_mask = 0xffffffff; |
Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 1169 | } else { |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1170 | dev_err(dev, "unknown dimm command family\n"); |
| 1171 | nfit_mem->family = -1; |
| 1172 | return force_enable_dimms ? 0 : -ENODEV; |
| 1173 | } |
| 1174 | |
| 1175 | uuid = to_nfit_uuid(nfit_mem->family); |
| 1176 | for_each_set_bit(i, &dsm_mask, BITS_PER_LONG) |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1177 | if (acpi_check_dsm(adev_dimm->handle, uuid, 1, 1ULL << i)) |
| 1178 | set_bit(i, &nfit_mem->dsm_mask); |
| 1179 | |
Linda Knippers | 60e95f4 | 2015-07-22 16:17:22 -0400 | [diff] [blame] | 1180 | return 0; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1181 | } |
| 1182 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1183 | static int acpi_nfit_register_dimms(struct acpi_nfit_desc *acpi_desc) |
| 1184 | { |
| 1185 | struct nfit_mem *nfit_mem; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 1186 | int dimm_count = 0; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1187 | |
| 1188 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { |
Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 1189 | struct acpi_nfit_flush_address *flush; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1190 | unsigned long flags = 0, cmd_mask; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1191 | struct nvdimm *nvdimm; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1192 | u32 device_handle; |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1193 | u16 mem_flags; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1194 | int rc; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1195 | |
| 1196 | device_handle = __to_nfit_memdev(nfit_mem)->device_handle; |
| 1197 | nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, device_handle); |
| 1198 | if (nvdimm) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 1199 | dimm_count++; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1200 | continue; |
| 1201 | } |
| 1202 | |
| 1203 | if (nfit_mem->bdw && nfit_mem->memdev_pmem) |
| 1204 | flags |= NDD_ALIASING; |
| 1205 | |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1206 | mem_flags = __to_nfit_memdev(nfit_mem)->flags; |
Bob Moore | ca321d1 | 2015-10-19 10:24:52 +0800 | [diff] [blame] | 1207 | if (mem_flags & ACPI_NFIT_MEM_NOT_ARMED) |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1208 | flags |= NDD_UNARMED; |
| 1209 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1210 | rc = acpi_nfit_add_dimm(acpi_desc, nfit_mem, device_handle); |
| 1211 | if (rc) |
| 1212 | continue; |
| 1213 | |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 1214 | /* |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1215 | * TODO: provide translation for non-NVDIMM_FAMILY_INTEL |
| 1216 | * devices (i.e. from nd_cmd to acpi_dsm) to standardize the |
| 1217 | * userspace interface. |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 1218 | */ |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1219 | cmd_mask = 1UL << ND_CMD_CALL; |
| 1220 | if (nfit_mem->family == NVDIMM_FAMILY_INTEL) |
| 1221 | cmd_mask |= nfit_mem->dsm_mask; |
| 1222 | |
Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 1223 | flush = nfit_mem->nfit_flush ? nfit_mem->nfit_flush->flush |
| 1224 | : NULL; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1225 | nvdimm = nvdimm_create(acpi_desc->nvdimm_bus, nfit_mem, |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1226 | acpi_nfit_dimm_attribute_groups, |
Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 1227 | flags, cmd_mask, flush ? flush->hint_count : 0, |
| 1228 | nfit_mem->flush_wpq); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1229 | if (!nvdimm) |
| 1230 | return -ENOMEM; |
| 1231 | |
| 1232 | nfit_mem->nvdimm = nvdimm; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 1233 | dimm_count++; |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1234 | |
| 1235 | if ((mem_flags & ACPI_NFIT_MEM_FAILED_MASK) == 0) |
| 1236 | continue; |
| 1237 | |
Toshi Kani | 402bae5 | 2015-08-26 10:20:23 -0600 | [diff] [blame] | 1238 | dev_info(acpi_desc->dev, "%s flags:%s%s%s%s\n", |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1239 | nvdimm_name(nvdimm), |
Toshi Kani | 402bae5 | 2015-08-26 10:20:23 -0600 | [diff] [blame] | 1240 | mem_flags & ACPI_NFIT_MEM_SAVE_FAILED ? " save_fail" : "", |
| 1241 | mem_flags & ACPI_NFIT_MEM_RESTORE_FAILED ? " restore_fail":"", |
| 1242 | mem_flags & ACPI_NFIT_MEM_FLUSH_FAILED ? " flush_fail" : "", |
Bob Moore | ca321d1 | 2015-10-19 10:24:52 +0800 | [diff] [blame] | 1243 | mem_flags & ACPI_NFIT_MEM_NOT_ARMED ? " not_armed" : ""); |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1244 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1245 | } |
| 1246 | |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 1247 | return nvdimm_bus_check_dimm_count(acpi_desc->nvdimm_bus, dimm_count); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1248 | } |
| 1249 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1250 | static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc) |
| 1251 | { |
| 1252 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| 1253 | const u8 *uuid = to_nfit_uuid(NFIT_DEV_BUS); |
| 1254 | struct acpi_device *adev; |
| 1255 | int i; |
| 1256 | |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 1257 | nd_desc->cmd_mask = acpi_desc->bus_cmd_force_en; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1258 | adev = to_acpi_dev(acpi_desc); |
| 1259 | if (!adev) |
| 1260 | return; |
| 1261 | |
Dan Williams | d4f3236 | 2016-03-03 16:08:54 -0800 | [diff] [blame] | 1262 | for (i = ND_CMD_ARS_CAP; i <= ND_CMD_CLEAR_ERROR; i++) |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1263 | if (acpi_check_dsm(adev->handle, uuid, 1, 1ULL << i)) |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 1264 | set_bit(i, &nd_desc->cmd_mask); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1265 | } |
| 1266 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1267 | static ssize_t range_index_show(struct device *dev, |
| 1268 | struct device_attribute *attr, char *buf) |
| 1269 | { |
| 1270 | struct nd_region *nd_region = to_nd_region(dev); |
| 1271 | struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region); |
| 1272 | |
| 1273 | return sprintf(buf, "%d\n", nfit_spa->spa->range_index); |
| 1274 | } |
| 1275 | static DEVICE_ATTR_RO(range_index); |
| 1276 | |
| 1277 | static struct attribute *acpi_nfit_region_attributes[] = { |
| 1278 | &dev_attr_range_index.attr, |
| 1279 | NULL, |
| 1280 | }; |
| 1281 | |
| 1282 | static struct attribute_group acpi_nfit_region_attribute_group = { |
| 1283 | .name = "nfit", |
| 1284 | .attrs = acpi_nfit_region_attributes, |
| 1285 | }; |
| 1286 | |
| 1287 | static const struct attribute_group *acpi_nfit_region_attribute_groups[] = { |
| 1288 | &nd_region_attribute_group, |
| 1289 | &nd_mapping_attribute_group, |
Dan Williams | 3d88002 | 2015-05-31 15:02:11 -0400 | [diff] [blame] | 1290 | &nd_device_attribute_group, |
Toshi Kani | 74ae66c | 2015-06-19 12:18:34 -0600 | [diff] [blame] | 1291 | &nd_numa_attribute_group, |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1292 | &acpi_nfit_region_attribute_group, |
| 1293 | NULL, |
| 1294 | }; |
| 1295 | |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 1296 | /* enough info to uniquely specify an interleave set */ |
| 1297 | struct nfit_set_info { |
| 1298 | struct nfit_set_info_map { |
| 1299 | u64 region_offset; |
| 1300 | u32 serial_number; |
| 1301 | u32 pad; |
| 1302 | } mapping[0]; |
| 1303 | }; |
| 1304 | |
| 1305 | static size_t sizeof_nfit_set_info(int num_mappings) |
| 1306 | { |
| 1307 | return sizeof(struct nfit_set_info) |
| 1308 | + num_mappings * sizeof(struct nfit_set_info_map); |
| 1309 | } |
| 1310 | |
| 1311 | static int cmp_map(const void *m0, const void *m1) |
| 1312 | { |
| 1313 | const struct nfit_set_info_map *map0 = m0; |
| 1314 | const struct nfit_set_info_map *map1 = m1; |
| 1315 | |
| 1316 | return memcmp(&map0->region_offset, &map1->region_offset, |
| 1317 | sizeof(u64)); |
| 1318 | } |
| 1319 | |
| 1320 | /* Retrieve the nth entry referencing this spa */ |
| 1321 | static struct acpi_nfit_memory_map *memdev_from_spa( |
| 1322 | struct acpi_nfit_desc *acpi_desc, u16 range_index, int n) |
| 1323 | { |
| 1324 | struct nfit_memdev *nfit_memdev; |
| 1325 | |
| 1326 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) |
| 1327 | if (nfit_memdev->memdev->range_index == range_index) |
| 1328 | if (n-- == 0) |
| 1329 | return nfit_memdev->memdev; |
| 1330 | return NULL; |
| 1331 | } |
| 1332 | |
| 1333 | static int acpi_nfit_init_interleave_set(struct acpi_nfit_desc *acpi_desc, |
| 1334 | struct nd_region_desc *ndr_desc, |
| 1335 | struct acpi_nfit_system_address *spa) |
| 1336 | { |
| 1337 | int i, spa_type = nfit_spa_type(spa); |
| 1338 | struct device *dev = acpi_desc->dev; |
| 1339 | struct nd_interleave_set *nd_set; |
| 1340 | u16 nr = ndr_desc->num_mappings; |
| 1341 | struct nfit_set_info *info; |
| 1342 | |
| 1343 | if (spa_type == NFIT_SPA_PM || spa_type == NFIT_SPA_VOLATILE) |
| 1344 | /* pass */; |
| 1345 | else |
| 1346 | return 0; |
| 1347 | |
| 1348 | nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL); |
| 1349 | if (!nd_set) |
| 1350 | return -ENOMEM; |
| 1351 | |
| 1352 | info = devm_kzalloc(dev, sizeof_nfit_set_info(nr), GFP_KERNEL); |
| 1353 | if (!info) |
| 1354 | return -ENOMEM; |
| 1355 | for (i = 0; i < nr; i++) { |
| 1356 | struct nd_mapping *nd_mapping = &ndr_desc->nd_mapping[i]; |
| 1357 | struct nfit_set_info_map *map = &info->mapping[i]; |
| 1358 | struct nvdimm *nvdimm = nd_mapping->nvdimm; |
| 1359 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1360 | struct acpi_nfit_memory_map *memdev = memdev_from_spa(acpi_desc, |
| 1361 | spa->range_index, i); |
| 1362 | |
| 1363 | if (!memdev || !nfit_mem->dcr) { |
| 1364 | dev_err(dev, "%s: failed to find DCR\n", __func__); |
| 1365 | return -ENODEV; |
| 1366 | } |
| 1367 | |
| 1368 | map->region_offset = memdev->region_offset; |
| 1369 | map->serial_number = nfit_mem->dcr->serial_number; |
| 1370 | } |
| 1371 | |
| 1372 | sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map), |
| 1373 | cmp_map, NULL); |
| 1374 | nd_set->cookie = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0); |
| 1375 | ndr_desc->nd_set = nd_set; |
| 1376 | devm_kfree(dev, info); |
| 1377 | |
| 1378 | return 0; |
| 1379 | } |
| 1380 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1381 | static u64 to_interleave_offset(u64 offset, struct nfit_blk_mmio *mmio) |
| 1382 | { |
| 1383 | struct acpi_nfit_interleave *idt = mmio->idt; |
| 1384 | u32 sub_line_offset, line_index, line_offset; |
| 1385 | u64 line_no, table_skip_count, table_offset; |
| 1386 | |
| 1387 | line_no = div_u64_rem(offset, mmio->line_size, &sub_line_offset); |
| 1388 | table_skip_count = div_u64_rem(line_no, mmio->num_lines, &line_index); |
| 1389 | line_offset = idt->line_offset[line_index] |
| 1390 | * mmio->line_size; |
| 1391 | table_offset = table_skip_count * mmio->table_size; |
| 1392 | |
| 1393 | return mmio->base_offset + line_offset + table_offset + sub_line_offset; |
| 1394 | } |
| 1395 | |
Ross Zwisler | de4a196 | 2015-08-20 16:27:38 -0600 | [diff] [blame] | 1396 | static u32 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw) |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1397 | { |
| 1398 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; |
| 1399 | u64 offset = nfit_blk->stat_offset + mmio->size * bw; |
| 1400 | |
| 1401 | if (mmio->num_lines) |
| 1402 | offset = to_interleave_offset(offset, mmio); |
| 1403 | |
Linus Torvalds | 12f03ee | 2015-09-08 14:35:59 -0700 | [diff] [blame] | 1404 | return readl(mmio->addr.base + offset); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1405 | } |
| 1406 | |
| 1407 | static void write_blk_ctl(struct nfit_blk *nfit_blk, unsigned int bw, |
| 1408 | resource_size_t dpa, unsigned int len, unsigned int write) |
| 1409 | { |
| 1410 | u64 cmd, offset; |
| 1411 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; |
| 1412 | |
| 1413 | enum { |
| 1414 | BCW_OFFSET_MASK = (1ULL << 48)-1, |
| 1415 | BCW_LEN_SHIFT = 48, |
| 1416 | BCW_LEN_MASK = (1ULL << 8) - 1, |
| 1417 | BCW_CMD_SHIFT = 56, |
| 1418 | }; |
| 1419 | |
| 1420 | cmd = (dpa >> L1_CACHE_SHIFT) & BCW_OFFSET_MASK; |
| 1421 | len = len >> L1_CACHE_SHIFT; |
| 1422 | cmd |= ((u64) len & BCW_LEN_MASK) << BCW_LEN_SHIFT; |
| 1423 | cmd |= ((u64) write) << BCW_CMD_SHIFT; |
| 1424 | |
| 1425 | offset = nfit_blk->cmd_offset + mmio->size * bw; |
| 1426 | if (mmio->num_lines) |
| 1427 | offset = to_interleave_offset(offset, mmio); |
| 1428 | |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1429 | writeq(cmd, mmio->addr.base + offset); |
Dan Williams | f284a4f | 2016-07-07 19:44:50 -0700 | [diff] [blame^] | 1430 | nvdimm_flush(nfit_blk->nd_region); |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 1431 | |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1432 | if (nfit_blk->dimm_flags & NFIT_BLK_DCR_LATCH) |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1433 | readq(mmio->addr.base + offset); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1434 | } |
| 1435 | |
| 1436 | static int acpi_nfit_blk_single_io(struct nfit_blk *nfit_blk, |
| 1437 | resource_size_t dpa, void *iobuf, size_t len, int rw, |
| 1438 | unsigned int lane) |
| 1439 | { |
| 1440 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW]; |
| 1441 | unsigned int copied = 0; |
| 1442 | u64 base_offset; |
| 1443 | int rc; |
| 1444 | |
| 1445 | base_offset = nfit_blk->bdw_offset + dpa % L1_CACHE_BYTES |
| 1446 | + lane * mmio->size; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1447 | write_blk_ctl(nfit_blk, lane, dpa, len, rw); |
| 1448 | while (len) { |
| 1449 | unsigned int c; |
| 1450 | u64 offset; |
| 1451 | |
| 1452 | if (mmio->num_lines) { |
| 1453 | u32 line_offset; |
| 1454 | |
| 1455 | offset = to_interleave_offset(base_offset + copied, |
| 1456 | mmio); |
| 1457 | div_u64_rem(offset, mmio->line_size, &line_offset); |
| 1458 | c = min_t(size_t, len, mmio->line_size - line_offset); |
| 1459 | } else { |
| 1460 | offset = base_offset + nfit_blk->bdw_offset; |
| 1461 | c = len; |
| 1462 | } |
| 1463 | |
| 1464 | if (rw) |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1465 | memcpy_to_pmem(mmio->addr.aperture + offset, |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1466 | iobuf + copied, c); |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1467 | else { |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1468 | if (nfit_blk->dimm_flags & NFIT_BLK_READ_FLUSH) |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1469 | mmio_flush_range((void __force *) |
| 1470 | mmio->addr.aperture + offset, c); |
| 1471 | |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1472 | memcpy_from_pmem(iobuf + copied, |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1473 | mmio->addr.aperture + offset, c); |
| 1474 | } |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1475 | |
| 1476 | copied += c; |
| 1477 | len -= c; |
| 1478 | } |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1479 | |
| 1480 | if (rw) |
Dan Williams | f284a4f | 2016-07-07 19:44:50 -0700 | [diff] [blame^] | 1481 | nvdimm_flush(nfit_blk->nd_region); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1482 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1483 | rc = read_blk_stat(nfit_blk, lane) ? -EIO : 0; |
| 1484 | return rc; |
| 1485 | } |
| 1486 | |
| 1487 | static int acpi_nfit_blk_region_do_io(struct nd_blk_region *ndbr, |
| 1488 | resource_size_t dpa, void *iobuf, u64 len, int rw) |
| 1489 | { |
| 1490 | struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr); |
| 1491 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW]; |
| 1492 | struct nd_region *nd_region = nfit_blk->nd_region; |
| 1493 | unsigned int lane, copied = 0; |
| 1494 | int rc = 0; |
| 1495 | |
| 1496 | lane = nd_region_acquire_lane(nd_region); |
| 1497 | while (len) { |
| 1498 | u64 c = min(len, mmio->size); |
| 1499 | |
| 1500 | rc = acpi_nfit_blk_single_io(nfit_blk, dpa + copied, |
| 1501 | iobuf + copied, c, rw, lane); |
| 1502 | if (rc) |
| 1503 | break; |
| 1504 | |
| 1505 | copied += c; |
| 1506 | len -= c; |
| 1507 | } |
| 1508 | nd_region_release_lane(nd_region, lane); |
| 1509 | |
| 1510 | return rc; |
| 1511 | } |
| 1512 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1513 | static int nfit_blk_init_interleave(struct nfit_blk_mmio *mmio, |
| 1514 | struct acpi_nfit_interleave *idt, u16 interleave_ways) |
| 1515 | { |
| 1516 | if (idt) { |
| 1517 | mmio->num_lines = idt->line_count; |
| 1518 | mmio->line_size = idt->line_size; |
| 1519 | if (interleave_ways == 0) |
| 1520 | return -ENXIO; |
| 1521 | mmio->table_size = mmio->num_lines * interleave_ways |
| 1522 | * mmio->line_size; |
| 1523 | } |
| 1524 | |
| 1525 | return 0; |
| 1526 | } |
| 1527 | |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 1528 | static int acpi_nfit_blk_get_flags(struct nvdimm_bus_descriptor *nd_desc, |
| 1529 | struct nvdimm *nvdimm, struct nfit_blk *nfit_blk) |
| 1530 | { |
| 1531 | struct nd_cmd_dimm_flags flags; |
| 1532 | int rc; |
| 1533 | |
| 1534 | memset(&flags, 0, sizeof(flags)); |
| 1535 | rc = nd_desc->ndctl(nd_desc, nvdimm, ND_CMD_DIMM_FLAGS, &flags, |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1536 | sizeof(flags), NULL); |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 1537 | |
| 1538 | if (rc >= 0 && flags.status == 0) |
| 1539 | nfit_blk->dimm_flags = flags.flags; |
| 1540 | else if (rc == -ENOTTY) { |
| 1541 | /* fall back to a conservative default */ |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1542 | nfit_blk->dimm_flags = NFIT_BLK_DCR_LATCH | NFIT_BLK_READ_FLUSH; |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 1543 | rc = 0; |
| 1544 | } else |
| 1545 | rc = -ENXIO; |
| 1546 | |
| 1547 | return rc; |
| 1548 | } |
| 1549 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1550 | static int acpi_nfit_blk_region_enable(struct nvdimm_bus *nvdimm_bus, |
| 1551 | struct device *dev) |
| 1552 | { |
| 1553 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1554 | struct nd_blk_region *ndbr = to_nd_blk_region(dev); |
| 1555 | struct nfit_blk_mmio *mmio; |
| 1556 | struct nfit_blk *nfit_blk; |
| 1557 | struct nfit_mem *nfit_mem; |
| 1558 | struct nvdimm *nvdimm; |
| 1559 | int rc; |
| 1560 | |
| 1561 | nvdimm = nd_blk_region_to_dimm(ndbr); |
| 1562 | nfit_mem = nvdimm_provider_data(nvdimm); |
| 1563 | if (!nfit_mem || !nfit_mem->dcr || !nfit_mem->bdw) { |
| 1564 | dev_dbg(dev, "%s: missing%s%s%s\n", __func__, |
| 1565 | nfit_mem ? "" : " nfit_mem", |
Dan Williams | 193ccca | 2015-06-30 16:09:39 -0400 | [diff] [blame] | 1566 | (nfit_mem && nfit_mem->dcr) ? "" : " dcr", |
| 1567 | (nfit_mem && nfit_mem->bdw) ? "" : " bdw"); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1568 | return -ENXIO; |
| 1569 | } |
| 1570 | |
| 1571 | nfit_blk = devm_kzalloc(dev, sizeof(*nfit_blk), GFP_KERNEL); |
| 1572 | if (!nfit_blk) |
| 1573 | return -ENOMEM; |
| 1574 | nd_blk_region_set_provider_data(ndbr, nfit_blk); |
| 1575 | nfit_blk->nd_region = to_nd_region(dev); |
| 1576 | |
| 1577 | /* map block aperture memory */ |
| 1578 | nfit_blk->bdw_offset = nfit_mem->bdw->offset; |
| 1579 | mmio = &nfit_blk->mmio[BDW]; |
Dan Williams | 29b9aa0 | 2016-06-06 17:42:38 -0700 | [diff] [blame] | 1580 | mmio->addr.base = devm_nvdimm_memremap(dev, nfit_mem->spa_bdw->address, |
| 1581 | nfit_mem->spa_bdw->length, ARCH_MEMREMAP_PMEM); |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1582 | if (!mmio->addr.base) { |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1583 | dev_dbg(dev, "%s: %s failed to map bdw\n", __func__, |
| 1584 | nvdimm_name(nvdimm)); |
| 1585 | return -ENOMEM; |
| 1586 | } |
| 1587 | mmio->size = nfit_mem->bdw->size; |
| 1588 | mmio->base_offset = nfit_mem->memdev_bdw->region_offset; |
| 1589 | mmio->idt = nfit_mem->idt_bdw; |
| 1590 | mmio->spa = nfit_mem->spa_bdw; |
| 1591 | rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_bdw, |
| 1592 | nfit_mem->memdev_bdw->interleave_ways); |
| 1593 | if (rc) { |
| 1594 | dev_dbg(dev, "%s: %s failed to init bdw interleave\n", |
| 1595 | __func__, nvdimm_name(nvdimm)); |
| 1596 | return rc; |
| 1597 | } |
| 1598 | |
| 1599 | /* map block control memory */ |
| 1600 | nfit_blk->cmd_offset = nfit_mem->dcr->command_offset; |
| 1601 | nfit_blk->stat_offset = nfit_mem->dcr->status_offset; |
| 1602 | mmio = &nfit_blk->mmio[DCR]; |
Dan Williams | 29b9aa0 | 2016-06-06 17:42:38 -0700 | [diff] [blame] | 1603 | mmio->addr.base = devm_nvdimm_ioremap(dev, nfit_mem->spa_dcr->address, |
| 1604 | nfit_mem->spa_dcr->length); |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1605 | if (!mmio->addr.base) { |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1606 | dev_dbg(dev, "%s: %s failed to map dcr\n", __func__, |
| 1607 | nvdimm_name(nvdimm)); |
| 1608 | return -ENOMEM; |
| 1609 | } |
| 1610 | mmio->size = nfit_mem->dcr->window_size; |
| 1611 | mmio->base_offset = nfit_mem->memdev_dcr->region_offset; |
| 1612 | mmio->idt = nfit_mem->idt_dcr; |
| 1613 | mmio->spa = nfit_mem->spa_dcr; |
| 1614 | rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_dcr, |
| 1615 | nfit_mem->memdev_dcr->interleave_ways); |
| 1616 | if (rc) { |
| 1617 | dev_dbg(dev, "%s: %s failed to init dcr interleave\n", |
| 1618 | __func__, nvdimm_name(nvdimm)); |
| 1619 | return rc; |
| 1620 | } |
| 1621 | |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 1622 | rc = acpi_nfit_blk_get_flags(nd_desc, nvdimm, nfit_blk); |
| 1623 | if (rc < 0) { |
| 1624 | dev_dbg(dev, "%s: %s failed get DIMM flags\n", |
| 1625 | __func__, nvdimm_name(nvdimm)); |
| 1626 | return rc; |
| 1627 | } |
| 1628 | |
Dan Williams | f284a4f | 2016-07-07 19:44:50 -0700 | [diff] [blame^] | 1629 | if (nvdimm_has_flush(nfit_blk->nd_region) < 0) |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1630 | dev_warn(dev, "unable to guarantee persistence of writes\n"); |
| 1631 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1632 | if (mmio->line_size == 0) |
| 1633 | return 0; |
| 1634 | |
| 1635 | if ((u32) nfit_blk->cmd_offset % mmio->line_size |
| 1636 | + 8 > mmio->line_size) { |
| 1637 | dev_dbg(dev, "cmd_offset crosses interleave boundary\n"); |
| 1638 | return -ENXIO; |
| 1639 | } else if ((u32) nfit_blk->stat_offset % mmio->line_size |
| 1640 | + 8 > mmio->line_size) { |
| 1641 | dev_dbg(dev, "stat_offset crosses interleave boundary\n"); |
| 1642 | return -ENXIO; |
| 1643 | } |
| 1644 | |
| 1645 | return 0; |
| 1646 | } |
| 1647 | |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1648 | static int ars_get_cap(struct acpi_nfit_desc *acpi_desc, |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1649 | struct nd_cmd_ars_cap *cmd, struct nfit_spa *nfit_spa) |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1650 | { |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1651 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1652 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1653 | int cmd_rc, rc; |
| 1654 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1655 | cmd->address = spa->address; |
| 1656 | cmd->length = spa->length; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1657 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_CAP, cmd, |
| 1658 | sizeof(*cmd), &cmd_rc); |
| 1659 | if (rc < 0) |
| 1660 | return rc; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1661 | return cmd_rc; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1662 | } |
| 1663 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1664 | static int ars_start(struct acpi_nfit_desc *acpi_desc, struct nfit_spa *nfit_spa) |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1665 | { |
| 1666 | int rc; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1667 | int cmd_rc; |
| 1668 | struct nd_cmd_ars_start ars_start; |
| 1669 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
| 1670 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1671 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1672 | memset(&ars_start, 0, sizeof(ars_start)); |
| 1673 | ars_start.address = spa->address; |
| 1674 | ars_start.length = spa->length; |
| 1675 | if (nfit_spa_type(spa) == NFIT_SPA_PM) |
| 1676 | ars_start.type = ND_ARS_PERSISTENT; |
| 1677 | else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) |
| 1678 | ars_start.type = ND_ARS_VOLATILE; |
| 1679 | else |
| 1680 | return -ENOTTY; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1681 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1682 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start, |
| 1683 | sizeof(ars_start), &cmd_rc); |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1684 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1685 | if (rc < 0) |
| 1686 | return rc; |
| 1687 | return cmd_rc; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1688 | } |
| 1689 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1690 | static int ars_continue(struct acpi_nfit_desc *acpi_desc) |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1691 | { |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1692 | int rc, cmd_rc; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1693 | struct nd_cmd_ars_start ars_start; |
| 1694 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| 1695 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1696 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1697 | memset(&ars_start, 0, sizeof(ars_start)); |
| 1698 | ars_start.address = ars_status->restart_address; |
| 1699 | ars_start.length = ars_status->restart_length; |
| 1700 | ars_start.type = ars_status->type; |
| 1701 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start, |
| 1702 | sizeof(ars_start), &cmd_rc); |
| 1703 | if (rc < 0) |
| 1704 | return rc; |
| 1705 | return cmd_rc; |
| 1706 | } |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1707 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1708 | static int ars_get_status(struct acpi_nfit_desc *acpi_desc) |
| 1709 | { |
| 1710 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| 1711 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; |
| 1712 | int rc, cmd_rc; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1713 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1714 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_STATUS, ars_status, |
| 1715 | acpi_desc->ars_status_size, &cmd_rc); |
| 1716 | if (rc < 0) |
| 1717 | return rc; |
| 1718 | return cmd_rc; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1719 | } |
| 1720 | |
| 1721 | static int ars_status_process_records(struct nvdimm_bus *nvdimm_bus, |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1722 | struct nd_cmd_ars_status *ars_status) |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1723 | { |
| 1724 | int rc; |
| 1725 | u32 i; |
| 1726 | |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1727 | for (i = 0; i < ars_status->num_records; i++) { |
| 1728 | rc = nvdimm_bus_add_poison(nvdimm_bus, |
| 1729 | ars_status->records[i].err_address, |
| 1730 | ars_status->records[i].length); |
| 1731 | if (rc) |
| 1732 | return rc; |
| 1733 | } |
| 1734 | |
| 1735 | return 0; |
| 1736 | } |
| 1737 | |
Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 1738 | static void acpi_nfit_remove_resource(void *data) |
| 1739 | { |
| 1740 | struct resource *res = data; |
| 1741 | |
| 1742 | remove_resource(res); |
| 1743 | } |
| 1744 | |
| 1745 | static int acpi_nfit_insert_resource(struct acpi_nfit_desc *acpi_desc, |
| 1746 | struct nd_region_desc *ndr_desc) |
| 1747 | { |
| 1748 | struct resource *res, *nd_res = ndr_desc->res; |
| 1749 | int is_pmem, ret; |
| 1750 | |
| 1751 | /* No operation if the region is already registered as PMEM */ |
| 1752 | is_pmem = region_intersects(nd_res->start, resource_size(nd_res), |
| 1753 | IORESOURCE_MEM, IORES_DESC_PERSISTENT_MEMORY); |
| 1754 | if (is_pmem == REGION_INTERSECTS) |
| 1755 | return 0; |
| 1756 | |
| 1757 | res = devm_kzalloc(acpi_desc->dev, sizeof(*res), GFP_KERNEL); |
| 1758 | if (!res) |
| 1759 | return -ENOMEM; |
| 1760 | |
| 1761 | res->name = "Persistent Memory"; |
| 1762 | res->start = nd_res->start; |
| 1763 | res->end = nd_res->end; |
| 1764 | res->flags = IORESOURCE_MEM; |
| 1765 | res->desc = IORES_DESC_PERSISTENT_MEMORY; |
| 1766 | |
| 1767 | ret = insert_resource(&iomem_resource, res); |
| 1768 | if (ret) |
| 1769 | return ret; |
| 1770 | |
Sajjan, Vikas C | d932dd2 | 2016-07-04 10:02:51 +0530 | [diff] [blame] | 1771 | ret = devm_add_action_or_reset(acpi_desc->dev, |
| 1772 | acpi_nfit_remove_resource, |
| 1773 | res); |
| 1774 | if (ret) |
Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 1775 | return ret; |
Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 1776 | |
| 1777 | return 0; |
| 1778 | } |
| 1779 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1780 | static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc, |
| 1781 | struct nd_mapping *nd_mapping, struct nd_region_desc *ndr_desc, |
| 1782 | struct acpi_nfit_memory_map *memdev, |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1783 | struct nfit_spa *nfit_spa) |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1784 | { |
| 1785 | struct nvdimm *nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, |
| 1786 | memdev->device_handle); |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1787 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1788 | struct nd_blk_region_desc *ndbr_desc; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1789 | struct nfit_mem *nfit_mem; |
| 1790 | int blk_valid = 0; |
| 1791 | |
| 1792 | if (!nvdimm) { |
| 1793 | dev_err(acpi_desc->dev, "spa%d dimm: %#x not found\n", |
| 1794 | spa->range_index, memdev->device_handle); |
| 1795 | return -ENODEV; |
| 1796 | } |
| 1797 | |
| 1798 | nd_mapping->nvdimm = nvdimm; |
| 1799 | switch (nfit_spa_type(spa)) { |
| 1800 | case NFIT_SPA_PM: |
| 1801 | case NFIT_SPA_VOLATILE: |
| 1802 | nd_mapping->start = memdev->address; |
| 1803 | nd_mapping->size = memdev->region_size; |
| 1804 | break; |
| 1805 | case NFIT_SPA_DCR: |
| 1806 | nfit_mem = nvdimm_provider_data(nvdimm); |
| 1807 | if (!nfit_mem || !nfit_mem->bdw) { |
| 1808 | dev_dbg(acpi_desc->dev, "spa%d %s missing bdw\n", |
| 1809 | spa->range_index, nvdimm_name(nvdimm)); |
| 1810 | } else { |
| 1811 | nd_mapping->size = nfit_mem->bdw->capacity; |
| 1812 | nd_mapping->start = nfit_mem->bdw->start_address; |
Vishal Verma | 5212e11 | 2015-06-25 04:20:32 -0400 | [diff] [blame] | 1813 | ndr_desc->num_lanes = nfit_mem->bdw->windows; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1814 | blk_valid = 1; |
| 1815 | } |
| 1816 | |
| 1817 | ndr_desc->nd_mapping = nd_mapping; |
| 1818 | ndr_desc->num_mappings = blk_valid; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1819 | ndbr_desc = to_blk_region_desc(ndr_desc); |
| 1820 | ndbr_desc->enable = acpi_nfit_blk_region_enable; |
Dan Williams | 6bc7561 | 2015-06-17 17:23:32 -0400 | [diff] [blame] | 1821 | ndbr_desc->do_io = acpi_desc->blk_do_io; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1822 | nfit_spa->nd_region = nvdimm_blk_region_create(acpi_desc->nvdimm_bus, |
| 1823 | ndr_desc); |
| 1824 | if (!nfit_spa->nd_region) |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1825 | return -ENOMEM; |
| 1826 | break; |
| 1827 | } |
| 1828 | |
| 1829 | return 0; |
| 1830 | } |
| 1831 | |
| 1832 | static int acpi_nfit_register_region(struct acpi_nfit_desc *acpi_desc, |
| 1833 | struct nfit_spa *nfit_spa) |
| 1834 | { |
| 1835 | static struct nd_mapping nd_mappings[ND_MAX_MAPPINGS]; |
| 1836 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1837 | struct nd_blk_region_desc ndbr_desc; |
| 1838 | struct nd_region_desc *ndr_desc; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1839 | struct nfit_memdev *nfit_memdev; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1840 | struct nvdimm_bus *nvdimm_bus; |
| 1841 | struct resource res; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 1842 | int count = 0, rc; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1843 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1844 | if (nfit_spa->nd_region) |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 1845 | return 0; |
| 1846 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1847 | if (spa->range_index == 0) { |
| 1848 | dev_dbg(acpi_desc->dev, "%s: detected invalid spa index\n", |
| 1849 | __func__); |
| 1850 | return 0; |
| 1851 | } |
| 1852 | |
| 1853 | memset(&res, 0, sizeof(res)); |
| 1854 | memset(&nd_mappings, 0, sizeof(nd_mappings)); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1855 | memset(&ndbr_desc, 0, sizeof(ndbr_desc)); |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1856 | res.start = spa->address; |
| 1857 | res.end = res.start + spa->length - 1; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1858 | ndr_desc = &ndbr_desc.ndr_desc; |
| 1859 | ndr_desc->res = &res; |
| 1860 | ndr_desc->provider_data = nfit_spa; |
| 1861 | ndr_desc->attr_groups = acpi_nfit_region_attribute_groups; |
Toshi Kani | 41d7a6d | 2015-06-19 12:18:33 -0600 | [diff] [blame] | 1862 | if (spa->flags & ACPI_NFIT_PROXIMITY_VALID) |
| 1863 | ndr_desc->numa_node = acpi_map_pxm_to_online_node( |
| 1864 | spa->proximity_domain); |
| 1865 | else |
| 1866 | ndr_desc->numa_node = NUMA_NO_NODE; |
| 1867 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1868 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 1869 | struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev; |
| 1870 | struct nd_mapping *nd_mapping; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1871 | |
| 1872 | if (memdev->range_index != spa->range_index) |
| 1873 | continue; |
| 1874 | if (count >= ND_MAX_MAPPINGS) { |
| 1875 | dev_err(acpi_desc->dev, "spa%d exceeds max mappings %d\n", |
| 1876 | spa->range_index, ND_MAX_MAPPINGS); |
| 1877 | return -ENXIO; |
| 1878 | } |
| 1879 | nd_mapping = &nd_mappings[count++]; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1880 | rc = acpi_nfit_init_mapping(acpi_desc, nd_mapping, ndr_desc, |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1881 | memdev, nfit_spa); |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1882 | if (rc) |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1883 | goto out; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1884 | } |
| 1885 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1886 | ndr_desc->nd_mapping = nd_mappings; |
| 1887 | ndr_desc->num_mappings = count; |
| 1888 | rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa); |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 1889 | if (rc) |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1890 | goto out; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 1891 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1892 | nvdimm_bus = acpi_desc->nvdimm_bus; |
| 1893 | if (nfit_spa_type(spa) == NFIT_SPA_PM) { |
Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 1894 | rc = acpi_nfit_insert_resource(acpi_desc, ndr_desc); |
Dan Williams | 4890116 | 2016-03-09 17:15:43 -0800 | [diff] [blame] | 1895 | if (rc) { |
Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 1896 | dev_warn(acpi_desc->dev, |
| 1897 | "failed to insert pmem resource to iomem: %d\n", |
| 1898 | rc); |
Dan Williams | 4890116 | 2016-03-09 17:15:43 -0800 | [diff] [blame] | 1899 | goto out; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1900 | } |
Dan Williams | 4890116 | 2016-03-09 17:15:43 -0800 | [diff] [blame] | 1901 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1902 | nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus, |
| 1903 | ndr_desc); |
| 1904 | if (!nfit_spa->nd_region) |
| 1905 | rc = -ENOMEM; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1906 | } else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) { |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1907 | nfit_spa->nd_region = nvdimm_volatile_region_create(nvdimm_bus, |
| 1908 | ndr_desc); |
| 1909 | if (!nfit_spa->nd_region) |
| 1910 | rc = -ENOMEM; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1911 | } |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 1912 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1913 | out: |
| 1914 | if (rc) |
| 1915 | dev_err(acpi_desc->dev, "failed to register spa range %d\n", |
| 1916 | nfit_spa->spa->range_index); |
| 1917 | return rc; |
| 1918 | } |
| 1919 | |
| 1920 | static int ars_status_alloc(struct acpi_nfit_desc *acpi_desc, |
| 1921 | u32 max_ars) |
| 1922 | { |
| 1923 | struct device *dev = acpi_desc->dev; |
| 1924 | struct nd_cmd_ars_status *ars_status; |
| 1925 | |
| 1926 | if (acpi_desc->ars_status && acpi_desc->ars_status_size >= max_ars) { |
| 1927 | memset(acpi_desc->ars_status, 0, acpi_desc->ars_status_size); |
| 1928 | return 0; |
| 1929 | } |
| 1930 | |
| 1931 | if (acpi_desc->ars_status) |
| 1932 | devm_kfree(dev, acpi_desc->ars_status); |
| 1933 | acpi_desc->ars_status = NULL; |
| 1934 | ars_status = devm_kzalloc(dev, max_ars, GFP_KERNEL); |
| 1935 | if (!ars_status) |
| 1936 | return -ENOMEM; |
| 1937 | acpi_desc->ars_status = ars_status; |
| 1938 | acpi_desc->ars_status_size = max_ars; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1939 | return 0; |
| 1940 | } |
| 1941 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1942 | static int acpi_nfit_query_poison(struct acpi_nfit_desc *acpi_desc, |
| 1943 | struct nfit_spa *nfit_spa) |
| 1944 | { |
| 1945 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
| 1946 | int rc; |
| 1947 | |
| 1948 | if (!nfit_spa->max_ars) { |
| 1949 | struct nd_cmd_ars_cap ars_cap; |
| 1950 | |
| 1951 | memset(&ars_cap, 0, sizeof(ars_cap)); |
| 1952 | rc = ars_get_cap(acpi_desc, &ars_cap, nfit_spa); |
| 1953 | if (rc < 0) |
| 1954 | return rc; |
| 1955 | nfit_spa->max_ars = ars_cap.max_ars_out; |
| 1956 | nfit_spa->clear_err_unit = ars_cap.clear_err_unit; |
| 1957 | /* check that the supported scrub types match the spa type */ |
| 1958 | if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE && |
| 1959 | ((ars_cap.status >> 16) & ND_ARS_VOLATILE) == 0) |
| 1960 | return -ENOTTY; |
| 1961 | else if (nfit_spa_type(spa) == NFIT_SPA_PM && |
| 1962 | ((ars_cap.status >> 16) & ND_ARS_PERSISTENT) == 0) |
| 1963 | return -ENOTTY; |
| 1964 | } |
| 1965 | |
| 1966 | if (ars_status_alloc(acpi_desc, nfit_spa->max_ars)) |
| 1967 | return -ENOMEM; |
| 1968 | |
| 1969 | rc = ars_get_status(acpi_desc); |
| 1970 | if (rc < 0 && rc != -ENOSPC) |
| 1971 | return rc; |
| 1972 | |
| 1973 | if (ars_status_process_records(acpi_desc->nvdimm_bus, |
| 1974 | acpi_desc->ars_status)) |
| 1975 | return -ENOMEM; |
| 1976 | |
| 1977 | return 0; |
| 1978 | } |
| 1979 | |
| 1980 | static void acpi_nfit_async_scrub(struct acpi_nfit_desc *acpi_desc, |
| 1981 | struct nfit_spa *nfit_spa) |
| 1982 | { |
| 1983 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
| 1984 | unsigned int overflow_retry = scrub_overflow_abort; |
| 1985 | u64 init_ars_start = 0, init_ars_len = 0; |
| 1986 | struct device *dev = acpi_desc->dev; |
| 1987 | unsigned int tmo = scrub_timeout; |
| 1988 | int rc; |
| 1989 | |
| 1990 | if (nfit_spa->ars_done || !nfit_spa->nd_region) |
| 1991 | return; |
| 1992 | |
| 1993 | rc = ars_start(acpi_desc, nfit_spa); |
| 1994 | /* |
| 1995 | * If we timed out the initial scan we'll still be busy here, |
| 1996 | * and will wait another timeout before giving up permanently. |
| 1997 | */ |
| 1998 | if (rc < 0 && rc != -EBUSY) |
| 1999 | return; |
| 2000 | |
| 2001 | do { |
| 2002 | u64 ars_start, ars_len; |
| 2003 | |
| 2004 | if (acpi_desc->cancel) |
| 2005 | break; |
| 2006 | rc = acpi_nfit_query_poison(acpi_desc, nfit_spa); |
| 2007 | if (rc == -ENOTTY) |
| 2008 | break; |
| 2009 | if (rc == -EBUSY && !tmo) { |
| 2010 | dev_warn(dev, "range %d ars timeout, aborting\n", |
| 2011 | spa->range_index); |
| 2012 | break; |
| 2013 | } |
| 2014 | |
| 2015 | if (rc == -EBUSY) { |
| 2016 | /* |
| 2017 | * Note, entries may be appended to the list |
| 2018 | * while the lock is dropped, but the workqueue |
| 2019 | * being active prevents entries being deleted / |
| 2020 | * freed. |
| 2021 | */ |
| 2022 | mutex_unlock(&acpi_desc->init_mutex); |
| 2023 | ssleep(1); |
| 2024 | tmo--; |
| 2025 | mutex_lock(&acpi_desc->init_mutex); |
| 2026 | continue; |
| 2027 | } |
| 2028 | |
| 2029 | /* we got some results, but there are more pending... */ |
| 2030 | if (rc == -ENOSPC && overflow_retry--) { |
| 2031 | if (!init_ars_len) { |
| 2032 | init_ars_len = acpi_desc->ars_status->length; |
| 2033 | init_ars_start = acpi_desc->ars_status->address; |
| 2034 | } |
| 2035 | rc = ars_continue(acpi_desc); |
| 2036 | } |
| 2037 | |
| 2038 | if (rc < 0) { |
| 2039 | dev_warn(dev, "range %d ars continuation failed\n", |
| 2040 | spa->range_index); |
| 2041 | break; |
| 2042 | } |
| 2043 | |
| 2044 | if (init_ars_len) { |
| 2045 | ars_start = init_ars_start; |
| 2046 | ars_len = init_ars_len; |
| 2047 | } else { |
| 2048 | ars_start = acpi_desc->ars_status->address; |
| 2049 | ars_len = acpi_desc->ars_status->length; |
| 2050 | } |
| 2051 | dev_dbg(dev, "spa range: %d ars from %#llx + %#llx complete\n", |
| 2052 | spa->range_index, ars_start, ars_len); |
| 2053 | /* notify the region about new poison entries */ |
| 2054 | nvdimm_region_notify(nfit_spa->nd_region, |
| 2055 | NVDIMM_REVALIDATE_POISON); |
| 2056 | break; |
| 2057 | } while (1); |
| 2058 | } |
| 2059 | |
| 2060 | static void acpi_nfit_scrub(struct work_struct *work) |
| 2061 | { |
| 2062 | struct device *dev; |
| 2063 | u64 init_scrub_length = 0; |
| 2064 | struct nfit_spa *nfit_spa; |
| 2065 | u64 init_scrub_address = 0; |
| 2066 | bool init_ars_done = false; |
| 2067 | struct acpi_nfit_desc *acpi_desc; |
| 2068 | unsigned int tmo = scrub_timeout; |
| 2069 | unsigned int overflow_retry = scrub_overflow_abort; |
| 2070 | |
| 2071 | acpi_desc = container_of(work, typeof(*acpi_desc), work); |
| 2072 | dev = acpi_desc->dev; |
| 2073 | |
| 2074 | /* |
| 2075 | * We scrub in 2 phases. The first phase waits for any platform |
| 2076 | * firmware initiated scrubs to complete and then we go search for the |
| 2077 | * affected spa regions to mark them scanned. In the second phase we |
| 2078 | * initiate a directed scrub for every range that was not scrubbed in |
| 2079 | * phase 1. |
| 2080 | */ |
| 2081 | |
| 2082 | /* process platform firmware initiated scrubs */ |
| 2083 | retry: |
| 2084 | mutex_lock(&acpi_desc->init_mutex); |
| 2085 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| 2086 | struct nd_cmd_ars_status *ars_status; |
| 2087 | struct acpi_nfit_system_address *spa; |
| 2088 | u64 ars_start, ars_len; |
| 2089 | int rc; |
| 2090 | |
| 2091 | if (acpi_desc->cancel) |
| 2092 | break; |
| 2093 | |
| 2094 | if (nfit_spa->nd_region) |
| 2095 | continue; |
| 2096 | |
| 2097 | if (init_ars_done) { |
| 2098 | /* |
| 2099 | * No need to re-query, we're now just |
| 2100 | * reconciling all the ranges covered by the |
| 2101 | * initial scrub |
| 2102 | */ |
| 2103 | rc = 0; |
| 2104 | } else |
| 2105 | rc = acpi_nfit_query_poison(acpi_desc, nfit_spa); |
| 2106 | |
| 2107 | if (rc == -ENOTTY) { |
| 2108 | /* no ars capability, just register spa and move on */ |
| 2109 | acpi_nfit_register_region(acpi_desc, nfit_spa); |
| 2110 | continue; |
| 2111 | } |
| 2112 | |
| 2113 | if (rc == -EBUSY && !tmo) { |
| 2114 | /* fallthrough to directed scrub in phase 2 */ |
| 2115 | dev_warn(dev, "timeout awaiting ars results, continuing...\n"); |
| 2116 | break; |
| 2117 | } else if (rc == -EBUSY) { |
| 2118 | mutex_unlock(&acpi_desc->init_mutex); |
| 2119 | ssleep(1); |
| 2120 | tmo--; |
| 2121 | goto retry; |
| 2122 | } |
| 2123 | |
| 2124 | /* we got some results, but there are more pending... */ |
| 2125 | if (rc == -ENOSPC && overflow_retry--) { |
| 2126 | ars_status = acpi_desc->ars_status; |
| 2127 | /* |
| 2128 | * Record the original scrub range, so that we |
| 2129 | * can recall all the ranges impacted by the |
| 2130 | * initial scrub. |
| 2131 | */ |
| 2132 | if (!init_scrub_length) { |
| 2133 | init_scrub_length = ars_status->length; |
| 2134 | init_scrub_address = ars_status->address; |
| 2135 | } |
| 2136 | rc = ars_continue(acpi_desc); |
| 2137 | if (rc == 0) { |
| 2138 | mutex_unlock(&acpi_desc->init_mutex); |
| 2139 | goto retry; |
| 2140 | } |
| 2141 | } |
| 2142 | |
| 2143 | if (rc < 0) { |
| 2144 | /* |
| 2145 | * Initial scrub failed, we'll give it one more |
| 2146 | * try below... |
| 2147 | */ |
| 2148 | break; |
| 2149 | } |
| 2150 | |
| 2151 | /* We got some final results, record completed ranges */ |
| 2152 | ars_status = acpi_desc->ars_status; |
| 2153 | if (init_scrub_length) { |
| 2154 | ars_start = init_scrub_address; |
| 2155 | ars_len = ars_start + init_scrub_length; |
| 2156 | } else { |
| 2157 | ars_start = ars_status->address; |
| 2158 | ars_len = ars_status->length; |
| 2159 | } |
| 2160 | spa = nfit_spa->spa; |
| 2161 | |
| 2162 | if (!init_ars_done) { |
| 2163 | init_ars_done = true; |
| 2164 | dev_dbg(dev, "init scrub %#llx + %#llx complete\n", |
| 2165 | ars_start, ars_len); |
| 2166 | } |
| 2167 | if (ars_start <= spa->address && ars_start + ars_len |
| 2168 | >= spa->address + spa->length) |
| 2169 | acpi_nfit_register_region(acpi_desc, nfit_spa); |
| 2170 | } |
| 2171 | |
| 2172 | /* |
| 2173 | * For all the ranges not covered by an initial scrub we still |
| 2174 | * want to see if there are errors, but it's ok to discover them |
| 2175 | * asynchronously. |
| 2176 | */ |
| 2177 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| 2178 | /* |
| 2179 | * Flag all the ranges that still need scrubbing, but |
| 2180 | * register them now to make data available. |
| 2181 | */ |
| 2182 | if (nfit_spa->nd_region) |
| 2183 | nfit_spa->ars_done = 1; |
| 2184 | else |
| 2185 | acpi_nfit_register_region(acpi_desc, nfit_spa); |
| 2186 | } |
| 2187 | |
| 2188 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) |
| 2189 | acpi_nfit_async_scrub(acpi_desc, nfit_spa); |
| 2190 | mutex_unlock(&acpi_desc->init_mutex); |
| 2191 | } |
| 2192 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2193 | static int acpi_nfit_register_regions(struct acpi_nfit_desc *acpi_desc) |
| 2194 | { |
| 2195 | struct nfit_spa *nfit_spa; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2196 | int rc; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2197 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2198 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) |
| 2199 | if (nfit_spa_type(nfit_spa->spa) == NFIT_SPA_DCR) { |
| 2200 | /* BLK regions don't need to wait for ars results */ |
| 2201 | rc = acpi_nfit_register_region(acpi_desc, nfit_spa); |
| 2202 | if (rc) |
| 2203 | return rc; |
| 2204 | } |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2205 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2206 | queue_work(nfit_wq, &acpi_desc->work); |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2207 | return 0; |
| 2208 | } |
| 2209 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2210 | static int acpi_nfit_check_deletions(struct acpi_nfit_desc *acpi_desc, |
| 2211 | struct nfit_table_prev *prev) |
| 2212 | { |
| 2213 | struct device *dev = acpi_desc->dev; |
| 2214 | |
| 2215 | if (!list_empty(&prev->spas) || |
| 2216 | !list_empty(&prev->memdevs) || |
| 2217 | !list_empty(&prev->dcrs) || |
| 2218 | !list_empty(&prev->bdws) || |
| 2219 | !list_empty(&prev->idts) || |
| 2220 | !list_empty(&prev->flushes)) { |
| 2221 | dev_err(dev, "new nfit deletes entries (unsupported)\n"); |
| 2222 | return -ENXIO; |
| 2223 | } |
| 2224 | return 0; |
| 2225 | } |
| 2226 | |
Dan Williams | 6bc7561 | 2015-06-17 17:23:32 -0400 | [diff] [blame] | 2227 | int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, acpi_size sz) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2228 | { |
| 2229 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2230 | struct nfit_table_prev prev; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2231 | const void *end; |
| 2232 | u8 *data; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2233 | int rc; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2234 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2235 | mutex_lock(&acpi_desc->init_mutex); |
| 2236 | |
| 2237 | INIT_LIST_HEAD(&prev.spas); |
| 2238 | INIT_LIST_HEAD(&prev.memdevs); |
| 2239 | INIT_LIST_HEAD(&prev.dcrs); |
| 2240 | INIT_LIST_HEAD(&prev.bdws); |
| 2241 | INIT_LIST_HEAD(&prev.idts); |
| 2242 | INIT_LIST_HEAD(&prev.flushes); |
| 2243 | |
| 2244 | list_cut_position(&prev.spas, &acpi_desc->spas, |
| 2245 | acpi_desc->spas.prev); |
| 2246 | list_cut_position(&prev.memdevs, &acpi_desc->memdevs, |
| 2247 | acpi_desc->memdevs.prev); |
| 2248 | list_cut_position(&prev.dcrs, &acpi_desc->dcrs, |
| 2249 | acpi_desc->dcrs.prev); |
| 2250 | list_cut_position(&prev.bdws, &acpi_desc->bdws, |
| 2251 | acpi_desc->bdws.prev); |
| 2252 | list_cut_position(&prev.idts, &acpi_desc->idts, |
| 2253 | acpi_desc->idts.prev); |
| 2254 | list_cut_position(&prev.flushes, &acpi_desc->flushes, |
| 2255 | acpi_desc->flushes.prev); |
| 2256 | |
| 2257 | data = (u8 *) acpi_desc->nfit; |
| 2258 | end = data + sz; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2259 | while (!IS_ERR_OR_NULL(data)) |
| 2260 | data = add_table(acpi_desc, &prev, data, end); |
| 2261 | |
| 2262 | if (IS_ERR(data)) { |
| 2263 | dev_dbg(dev, "%s: nfit table parsing error: %ld\n", __func__, |
| 2264 | PTR_ERR(data)); |
| 2265 | rc = PTR_ERR(data); |
| 2266 | goto out_unlock; |
| 2267 | } |
| 2268 | |
| 2269 | rc = acpi_nfit_check_deletions(acpi_desc, &prev); |
| 2270 | if (rc) |
| 2271 | goto out_unlock; |
| 2272 | |
Dan Williams | 81ed4e3 | 2016-06-10 18:20:53 -0700 | [diff] [blame] | 2273 | rc = nfit_mem_init(acpi_desc); |
| 2274 | if (rc) |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2275 | goto out_unlock; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2276 | |
| 2277 | acpi_nfit_init_dsms(acpi_desc); |
| 2278 | |
| 2279 | rc = acpi_nfit_register_dimms(acpi_desc); |
| 2280 | if (rc) |
| 2281 | goto out_unlock; |
| 2282 | |
| 2283 | rc = acpi_nfit_register_regions(acpi_desc); |
| 2284 | |
| 2285 | out_unlock: |
| 2286 | mutex_unlock(&acpi_desc->init_mutex); |
| 2287 | return rc; |
| 2288 | } |
| 2289 | EXPORT_SYMBOL_GPL(acpi_nfit_init); |
| 2290 | |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 2291 | struct acpi_nfit_flush_work { |
| 2292 | struct work_struct work; |
| 2293 | struct completion cmp; |
| 2294 | }; |
| 2295 | |
| 2296 | static void flush_probe(struct work_struct *work) |
| 2297 | { |
| 2298 | struct acpi_nfit_flush_work *flush; |
| 2299 | |
| 2300 | flush = container_of(work, typeof(*flush), work); |
| 2301 | complete(&flush->cmp); |
| 2302 | } |
| 2303 | |
| 2304 | static int acpi_nfit_flush_probe(struct nvdimm_bus_descriptor *nd_desc) |
| 2305 | { |
| 2306 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); |
| 2307 | struct device *dev = acpi_desc->dev; |
| 2308 | struct acpi_nfit_flush_work flush; |
| 2309 | |
| 2310 | /* bounce the device lock to flush acpi_nfit_add / acpi_nfit_notify */ |
| 2311 | device_lock(dev); |
| 2312 | device_unlock(dev); |
| 2313 | |
| 2314 | /* |
| 2315 | * Scrub work could take 10s of seconds, userspace may give up so we |
| 2316 | * need to be interruptible while waiting. |
| 2317 | */ |
| 2318 | INIT_WORK_ONSTACK(&flush.work, flush_probe); |
| 2319 | COMPLETION_INITIALIZER_ONSTACK(flush.cmp); |
| 2320 | queue_work(nfit_wq, &flush.work); |
| 2321 | return wait_for_completion_interruptible(&flush.cmp); |
| 2322 | } |
| 2323 | |
Dan Williams | 87bf572 | 2016-02-22 21:50:31 -0800 | [diff] [blame] | 2324 | static int acpi_nfit_clear_to_send(struct nvdimm_bus_descriptor *nd_desc, |
| 2325 | struct nvdimm *nvdimm, unsigned int cmd) |
| 2326 | { |
| 2327 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); |
| 2328 | |
| 2329 | if (nvdimm) |
| 2330 | return 0; |
| 2331 | if (cmd != ND_CMD_ARS_START) |
| 2332 | return 0; |
| 2333 | |
| 2334 | /* |
| 2335 | * The kernel and userspace may race to initiate a scrub, but |
| 2336 | * the scrub thread is prepared to lose that initial race. It |
| 2337 | * just needs guarantees that any ars it initiates are not |
| 2338 | * interrupted by any intervening start reqeusts from userspace. |
| 2339 | */ |
| 2340 | if (work_busy(&acpi_desc->work)) |
| 2341 | return -EBUSY; |
| 2342 | |
| 2343 | return 0; |
| 2344 | } |
| 2345 | |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 2346 | void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev) |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2347 | { |
| 2348 | struct nvdimm_bus_descriptor *nd_desc; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2349 | |
| 2350 | dev_set_drvdata(dev, acpi_desc); |
| 2351 | acpi_desc->dev = dev; |
| 2352 | acpi_desc->blk_do_io = acpi_nfit_blk_region_do_io; |
| 2353 | nd_desc = &acpi_desc->nd_desc; |
| 2354 | nd_desc->provider_name = "ACPI.NFIT"; |
| 2355 | nd_desc->ndctl = acpi_nfit_ctl; |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 2356 | nd_desc->flush_probe = acpi_nfit_flush_probe; |
Dan Williams | 87bf572 | 2016-02-22 21:50:31 -0800 | [diff] [blame] | 2357 | nd_desc->clear_to_send = acpi_nfit_clear_to_send; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2358 | nd_desc->attr_groups = acpi_nfit_attribute_groups; |
| 2359 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2360 | INIT_LIST_HEAD(&acpi_desc->spas); |
| 2361 | INIT_LIST_HEAD(&acpi_desc->dcrs); |
| 2362 | INIT_LIST_HEAD(&acpi_desc->bdws); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2363 | INIT_LIST_HEAD(&acpi_desc->idts); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 2364 | INIT_LIST_HEAD(&acpi_desc->flushes); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2365 | INIT_LIST_HEAD(&acpi_desc->memdevs); |
| 2366 | INIT_LIST_HEAD(&acpi_desc->dimms); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2367 | mutex_init(&acpi_desc->init_mutex); |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2368 | INIT_WORK(&acpi_desc->work, acpi_nfit_scrub); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2369 | } |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 2370 | EXPORT_SYMBOL_GPL(acpi_nfit_desc_init); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2371 | |
| 2372 | static int acpi_nfit_add(struct acpi_device *adev) |
| 2373 | { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2374 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2375 | struct acpi_nfit_desc *acpi_desc; |
| 2376 | struct device *dev = &adev->dev; |
| 2377 | struct acpi_table_header *tbl; |
| 2378 | acpi_status status = AE_OK; |
| 2379 | acpi_size sz; |
| 2380 | int rc; |
| 2381 | |
Lee, Chun-Yi | 8259542 | 2016-01-21 20:32:10 +0800 | [diff] [blame] | 2382 | status = acpi_get_table_with_size(ACPI_SIG_NFIT, 0, &tbl, &sz); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2383 | if (ACPI_FAILURE(status)) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2384 | /* This is ok, we could have an nvdimm hotplugged later */ |
| 2385 | dev_dbg(dev, "failed to find NFIT at startup\n"); |
| 2386 | return 0; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2387 | } |
| 2388 | |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 2389 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
| 2390 | if (!acpi_desc) |
| 2391 | return -ENOMEM; |
| 2392 | acpi_nfit_desc_init(acpi_desc, &adev->dev); |
| 2393 | acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, &acpi_desc->nd_desc); |
| 2394 | if (!acpi_desc->nvdimm_bus) |
| 2395 | return -ENOMEM; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2396 | |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 2397 | /* |
| 2398 | * Save the acpi header for later and then skip it, |
| 2399 | * making nfit point to the first nfit table header. |
| 2400 | */ |
| 2401 | acpi_desc->acpi_header = *tbl; |
| 2402 | acpi_desc->nfit = (void *) tbl + sizeof(struct acpi_table_nfit); |
| 2403 | sz -= sizeof(struct acpi_table_nfit); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2404 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2405 | /* Evaluate _FIT and override with that if present */ |
| 2406 | status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf); |
| 2407 | if (ACPI_SUCCESS(status) && buf.length > 0) { |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 2408 | union acpi_object *obj; |
| 2409 | /* |
| 2410 | * Adjust for the acpi_object header of the _FIT |
| 2411 | */ |
| 2412 | obj = buf.pointer; |
| 2413 | if (obj->type == ACPI_TYPE_BUFFER) { |
| 2414 | acpi_desc->nfit = |
| 2415 | (struct acpi_nfit_header *)obj->buffer.pointer; |
| 2416 | sz = obj->buffer.length; |
| 2417 | } else |
| 2418 | dev_dbg(dev, "%s invalid type %d, ignoring _FIT\n", |
| 2419 | __func__, (int) obj->type); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2420 | } |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2421 | |
| 2422 | rc = acpi_nfit_init(acpi_desc, sz); |
| 2423 | if (rc) { |
| 2424 | nvdimm_bus_unregister(acpi_desc->nvdimm_bus); |
| 2425 | return rc; |
| 2426 | } |
| 2427 | return 0; |
| 2428 | } |
| 2429 | |
| 2430 | static int acpi_nfit_remove(struct acpi_device *adev) |
| 2431 | { |
| 2432 | struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(&adev->dev); |
| 2433 | |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 2434 | acpi_desc->cancel = 1; |
| 2435 | flush_workqueue(nfit_wq); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2436 | nvdimm_bus_unregister(acpi_desc->nvdimm_bus); |
| 2437 | return 0; |
| 2438 | } |
| 2439 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2440 | static void acpi_nfit_notify(struct acpi_device *adev, u32 event) |
| 2441 | { |
| 2442 | struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(&adev->dev); |
| 2443 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 2444 | struct acpi_nfit_header *nfit_saved; |
| 2445 | union acpi_object *obj; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2446 | struct device *dev = &adev->dev; |
| 2447 | acpi_status status; |
| 2448 | int ret; |
| 2449 | |
| 2450 | dev_dbg(dev, "%s: event: %d\n", __func__, event); |
| 2451 | |
| 2452 | device_lock(dev); |
| 2453 | if (!dev->driver) { |
| 2454 | /* dev->driver may be null if we're being removed */ |
| 2455 | dev_dbg(dev, "%s: no driver found for dev\n", __func__); |
Alexey Khoroshilov | d91e892 | 2015-12-11 23:24:10 +0300 | [diff] [blame] | 2456 | goto out_unlock; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2457 | } |
| 2458 | |
| 2459 | if (!acpi_desc) { |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 2460 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
| 2461 | if (!acpi_desc) |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2462 | goto out_unlock; |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 2463 | acpi_nfit_desc_init(acpi_desc, &adev->dev); |
| 2464 | acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, &acpi_desc->nd_desc); |
| 2465 | if (!acpi_desc->nvdimm_bus) |
| 2466 | goto out_unlock; |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 2467 | } else { |
| 2468 | /* |
| 2469 | * Finish previous registration before considering new |
| 2470 | * regions. |
| 2471 | */ |
| 2472 | flush_workqueue(nfit_wq); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2473 | } |
| 2474 | |
| 2475 | /* Evaluate _FIT */ |
| 2476 | status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf); |
| 2477 | if (ACPI_FAILURE(status)) { |
| 2478 | dev_err(dev, "failed to evaluate _FIT\n"); |
| 2479 | goto out_unlock; |
| 2480 | } |
| 2481 | |
| 2482 | nfit_saved = acpi_desc->nfit; |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 2483 | obj = buf.pointer; |
| 2484 | if (obj->type == ACPI_TYPE_BUFFER) { |
| 2485 | acpi_desc->nfit = |
| 2486 | (struct acpi_nfit_header *)obj->buffer.pointer; |
| 2487 | ret = acpi_nfit_init(acpi_desc, obj->buffer.length); |
| 2488 | if (ret) { |
| 2489 | /* Merge failed, restore old nfit, and exit */ |
| 2490 | acpi_desc->nfit = nfit_saved; |
| 2491 | dev_err(dev, "failed to merge updated NFIT\n"); |
| 2492 | } |
| 2493 | } else { |
| 2494 | /* Bad _FIT, restore old nfit */ |
| 2495 | dev_err(dev, "Invalid _FIT\n"); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2496 | } |
| 2497 | kfree(buf.pointer); |
| 2498 | |
| 2499 | out_unlock: |
| 2500 | device_unlock(dev); |
| 2501 | } |
| 2502 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2503 | static const struct acpi_device_id acpi_nfit_ids[] = { |
| 2504 | { "ACPI0012", 0 }, |
| 2505 | { "", 0 }, |
| 2506 | }; |
| 2507 | MODULE_DEVICE_TABLE(acpi, acpi_nfit_ids); |
| 2508 | |
| 2509 | static struct acpi_driver acpi_nfit_driver = { |
| 2510 | .name = KBUILD_MODNAME, |
| 2511 | .ids = acpi_nfit_ids, |
| 2512 | .ops = { |
| 2513 | .add = acpi_nfit_add, |
| 2514 | .remove = acpi_nfit_remove, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2515 | .notify = acpi_nfit_notify, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2516 | }, |
| 2517 | }; |
| 2518 | |
| 2519 | static __init int nfit_init(void) |
| 2520 | { |
| 2521 | BUILD_BUG_ON(sizeof(struct acpi_table_nfit) != 40); |
| 2522 | BUILD_BUG_ON(sizeof(struct acpi_nfit_system_address) != 56); |
| 2523 | BUILD_BUG_ON(sizeof(struct acpi_nfit_memory_map) != 48); |
| 2524 | BUILD_BUG_ON(sizeof(struct acpi_nfit_interleave) != 20); |
| 2525 | BUILD_BUG_ON(sizeof(struct acpi_nfit_smbios) != 9); |
| 2526 | BUILD_BUG_ON(sizeof(struct acpi_nfit_control_region) != 80); |
| 2527 | BUILD_BUG_ON(sizeof(struct acpi_nfit_data_region) != 40); |
| 2528 | |
| 2529 | acpi_str_to_uuid(UUID_VOLATILE_MEMORY, nfit_uuid[NFIT_SPA_VOLATILE]); |
| 2530 | acpi_str_to_uuid(UUID_PERSISTENT_MEMORY, nfit_uuid[NFIT_SPA_PM]); |
| 2531 | acpi_str_to_uuid(UUID_CONTROL_REGION, nfit_uuid[NFIT_SPA_DCR]); |
| 2532 | acpi_str_to_uuid(UUID_DATA_REGION, nfit_uuid[NFIT_SPA_BDW]); |
| 2533 | acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_VDISK]); |
| 2534 | acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_CD, nfit_uuid[NFIT_SPA_VCD]); |
| 2535 | acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_PDISK]); |
| 2536 | acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_CD, nfit_uuid[NFIT_SPA_PCD]); |
| 2537 | acpi_str_to_uuid(UUID_NFIT_BUS, nfit_uuid[NFIT_DEV_BUS]); |
| 2538 | acpi_str_to_uuid(UUID_NFIT_DIMM, nfit_uuid[NFIT_DEV_DIMM]); |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 2539 | acpi_str_to_uuid(UUID_NFIT_DIMM_N_HPE1, nfit_uuid[NFIT_DEV_DIMM_N_HPE1]); |
| 2540 | acpi_str_to_uuid(UUID_NFIT_DIMM_N_HPE2, nfit_uuid[NFIT_DEV_DIMM_N_HPE2]); |
stuart hayes | e02fb72 | 2016-05-26 11:38:41 -0500 | [diff] [blame] | 2541 | acpi_str_to_uuid(UUID_NFIT_DIMM_N_MSFT, nfit_uuid[NFIT_DEV_DIMM_N_MSFT]); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2542 | |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 2543 | nfit_wq = create_singlethread_workqueue("nfit"); |
| 2544 | if (!nfit_wq) |
| 2545 | return -ENOMEM; |
| 2546 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2547 | return acpi_bus_register_driver(&acpi_nfit_driver); |
| 2548 | } |
| 2549 | |
| 2550 | static __exit void nfit_exit(void) |
| 2551 | { |
| 2552 | acpi_bus_unregister_driver(&acpi_nfit_driver); |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 2553 | destroy_workqueue(nfit_wq); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2554 | } |
| 2555 | |
| 2556 | module_init(nfit_init); |
| 2557 | module_exit(nfit_exit); |
| 2558 | MODULE_LICENSE("GPL v2"); |
| 2559 | MODULE_AUTHOR("Intel Corporation"); |