blob: c73df370373bd2af13cb767a0bbd4baf55475892 [file] [log] [blame]
Linus Walleijf8635ab2013-01-05 00:29:31 +01001/*
2 * Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC
3 */
4/include/ "skeleton.dtsi"
5
6/ {
7 #address-cells = <1>;
8 #size-cells = <1>;
9
10 memory {
11 reg = <0x00000000 0x04000000>,
12 <0x08000000 0x04000000>;
13 };
14
15 L2: l2-cache {
16 compatible = "arm,l210-cache";
17 reg = <0x10210000 0x1000>;
18 interrupt-parent = <&vica>;
19 interrupts = <30>;
20 cache-unified;
21 cache-level = <2>;
22 };
23
24 mtu0 {
25 /* Nomadik system timer */
26 reg = <0x101e2000 0x1000>;
27 interrupt-parent = <&vica>;
28 interrupts = <4>;
29 };
30
31 mtu1 {
32 /* Secondary timer */
33 reg = <0x101e3000 0x1000>;
34 interrupt-parent = <&vica>;
35 interrupts = <5>;
36 };
37
Linus Walleijba785202013-01-05 22:28:32 +010038 /* A NAND flash of 128 MiB */
39 fsmc: flash@40000000 {
40 compatible = "stericsson,fsmc-nand";
41 #address-cells = <1>;
42 #size-cells = <1>;
43 reg = <0x10100000 0x1000>, /* FSMC Register*/
44 <0x40000000 0x2000>, /* NAND Base DATA */
45 <0x41000000 0x2000>, /* NAND Base ADDR */
46 <0x40800000 0x2000>; /* NAND Base CMD */
47 reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
48 status = "okay";
49
50 partition@0 {
51 label = "X-Loader(NAND)";
52 reg = <0x0 0x40000>;
53 };
54 partition@40000 {
55 label = "MemInit(NAND)";
56 reg = <0x40000 0x40000>;
57 };
58 partition@80000 {
59 label = "BootLoader(NAND)";
60 reg = <0x80000 0x200000>;
61 };
62 partition@280000 {
63 label = "Kernel zImage(NAND)";
64 reg = <0x280000 0x300000>;
65 };
66 partition@580000 {
67 label = "Root Filesystem(NAND)";
68 reg = <0x580000 0x1600000>;
69 };
70 partition@1b80000 {
71 label = "User Filesystem(NAND)";
72 reg = <0x1b80000 0x6480000>;
73 };
74 };
75
Linus Walleijf8635ab2013-01-05 00:29:31 +010076 amba {
77 compatible = "arm,amba-bus";
78 #address-cells = <1>;
79 #size-cells = <1>;
80 ranges;
81
82 vica: intc@0x10140000 {
83 compatible = "arm,versatile-vic";
84 interrupt-controller;
85 #interrupt-cells = <1>;
86 reg = <0x10140000 0x20>;
87 };
88
89 vicb: intc@0x10140020 {
90 compatible = "arm,versatile-vic";
91 interrupt-controller;
92 #interrupt-cells = <1>;
93 reg = <0x10140020 0x20>;
94 };
95
96 uart0: uart@101fd000 {
97 compatible = "arm,pl011", "arm,primecell";
98 reg = <0x101fd000 0x1000>;
99 interrupt-parent = <&vica>;
100 interrupts = <12>;
101 };
102
103 uart1: uart@101fb000 {
104 compatible = "arm,pl011", "arm,primecell";
105 reg = <0x101fb000 0x1000>;
106 interrupt-parent = <&vica>;
107 interrupts = <17>;
108 };
109
110 uart2: uart@101f2000 {
111 compatible = "arm,pl011", "arm,primecell";
112 reg = <0x101f2000 0x1000>;
113 interrupt-parent = <&vica>;
114 interrupts = <28>;
115 status = "disabled";
116 };
Linus Walleij27bda032013-01-05 10:38:57 +0100117
118 rng: rng@101b0000 {
119 compatible = "arm,primecell";
120 reg = <0x101b0000 0x1000>;
121 };
122
123 rtc: rtc@101e8000 {
124 compatible = "arm,pl031", "arm,primecell";
125 reg = <0x101e8000 0x1000>;
126 interrupt-parent = <&vica>;
127 interrupts = <10>;
128 };
Linus Walleijf8635ab2013-01-05 00:29:31 +0100129 };
130};