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Jan Engelhardtb5114312007-07-15 23:39:36 -07001
2menuconfig CRYPTO_HW
3 bool "Hardware crypto devices"
4 default y
Jan Engelhardt06bfb7e2007-08-18 12:56:21 +02005 ---help---
6 Say Y here to get to see options for hardware crypto devices and
7 processors. This option alone does not add any kernel code.
8
9 If you say N, all options in this submenu will be skipped and disabled.
Jan Engelhardtb5114312007-07-15 23:39:36 -070010
11if CRYPTO_HW
Linus Torvalds1da177e2005-04-16 15:20:36 -070012
13config CRYPTO_DEV_PADLOCK
Herbert Xud1583252007-05-18 13:17:22 +100014 tristate "Support for VIA PadLock ACE"
Herbert Xu2f817412009-04-22 13:00:15 +080015 depends on X86 && !UML
Linus Torvalds1da177e2005-04-16 15:20:36 -070016 help
17 Some VIA processors come with an integrated crypto engine
18 (so called VIA PadLock ACE, Advanced Cryptography Engine)
Michal Ludvig1191f0a2006-08-06 22:46:20 +100019 that provides instructions for very fast cryptographic
20 operations with supported algorithms.
Linus Torvalds1da177e2005-04-16 15:20:36 -070021
22 The instructions are used only when the CPU supports them.
Michal Ludvig5644bda2006-08-06 22:50:30 +100023 Otherwise software encryption is used.
24
Linus Torvalds1da177e2005-04-16 15:20:36 -070025config CRYPTO_DEV_PADLOCK_AES
Michal Ludvig1191f0a2006-08-06 22:46:20 +100026 tristate "PadLock driver for AES algorithm"
Linus Torvalds1da177e2005-04-16 15:20:36 -070027 depends on CRYPTO_DEV_PADLOCK
Herbert Xu28ce7282006-08-21 21:38:42 +100028 select CRYPTO_BLKCIPHER
Sebastian Siewior7dc748e2008-04-01 21:24:50 +080029 select CRYPTO_AES
Linus Torvalds1da177e2005-04-16 15:20:36 -070030 help
31 Use VIA PadLock for AES algorithm.
32
Michal Ludvig1191f0a2006-08-06 22:46:20 +100033 Available in VIA C3 and newer CPUs.
34
35 If unsure say M. The compiled module will be
Pavel Machek4737f092009-06-05 00:44:53 +020036 called padlock-aes.
Michal Ludvig1191f0a2006-08-06 22:46:20 +100037
Michal Ludvig6c833272006-07-12 12:29:38 +100038config CRYPTO_DEV_PADLOCK_SHA
39 tristate "PadLock driver for SHA1 and SHA256 algorithms"
40 depends on CRYPTO_DEV_PADLOCK
Herbert Xubbbee462009-07-11 18:16:16 +080041 select CRYPTO_HASH
Michal Ludvig6c833272006-07-12 12:29:38 +100042 select CRYPTO_SHA1
43 select CRYPTO_SHA256
Michal Ludvig6c833272006-07-12 12:29:38 +100044 help
45 Use VIA PadLock for SHA1/SHA256 algorithms.
46
47 Available in VIA C7 and newer processors.
48
49 If unsure say M. The compiled module will be
Pavel Machek4737f092009-06-05 00:44:53 +020050 called padlock-sha.
Michal Ludvig6c833272006-07-12 12:29:38 +100051
Jordan Crouse9fe757b2006-10-04 18:48:57 +100052config CRYPTO_DEV_GEODE
53 tristate "Support for the Geode LX AES engine"
Simon Arlottf6259de2007-05-02 22:08:26 +100054 depends on X86_32 && PCI
Jordan Crouse9fe757b2006-10-04 18:48:57 +100055 select CRYPTO_ALGAPI
56 select CRYPTO_BLKCIPHER
Jordan Crouse9fe757b2006-10-04 18:48:57 +100057 help
58 Say 'Y' here to use the AMD Geode LX processor on-board AES
David Sterba3dde6ad2007-05-09 07:12:20 +020059 engine for the CryptoAPI AES algorithm.
Jordan Crouse9fe757b2006-10-04 18:48:57 +100060
61 To compile this driver as a module, choose M here: the module
62 will be called geode-aes.
63
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020064config ZCRYPT
65 tristate "Support for PCI-attached cryptographic adapters"
66 depends on S390
Ralph Wuerthner2f7c8bd2008-04-17 07:46:15 +020067 select HW_RANDOM
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020068 help
69 Select this option if you want to use a PCI-attached cryptographic
70 adapter like:
71 + PCI Cryptographic Accelerator (PCICA)
72 + PCI Cryptographic Coprocessor (PCICC)
73 + PCI-X Cryptographic Coprocessor (PCIXCC)
74 + Crypto Express2 Coprocessor (CEX2C)
75 + Crypto Express2 Accelerator (CEX2A)
Holger Denglercf2d0072011-05-23 10:24:30 +020076 + Crypto Express3 Coprocessor (CEX3C)
77 + Crypto Express3 Accelerator (CEX3A)
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020078
Jan Glauber3f5615e2008-01-26 14:11:07 +010079config CRYPTO_SHA1_S390
80 tristate "SHA1 digest algorithm"
81 depends on S390
Herbert Xu563f3462009-01-18 20:33:33 +110082 select CRYPTO_HASH
Jan Glauber3f5615e2008-01-26 14:11:07 +010083 help
84 This is the s390 hardware accelerated implementation of the
85 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
86
Jan Glauberd393d9b2011-04-19 21:29:19 +020087 It is available as of z990.
88
Jan Glauber3f5615e2008-01-26 14:11:07 +010089config CRYPTO_SHA256_S390
90 tristate "SHA256 digest algorithm"
91 depends on S390
Herbert Xu563f3462009-01-18 20:33:33 +110092 select CRYPTO_HASH
Jan Glauber3f5615e2008-01-26 14:11:07 +010093 help
94 This is the s390 hardware accelerated implementation of the
95 SHA256 secure hash standard (DFIPS 180-2).
96
Jan Glauberd393d9b2011-04-19 21:29:19 +020097 It is available as of z9.
Jan Glauber3f5615e2008-01-26 14:11:07 +010098
Jan Glauber291dc7c2008-03-06 19:52:00 +080099config CRYPTO_SHA512_S390
Jan Glauber4e2c6d72008-03-06 19:53:50 +0800100 tristate "SHA384 and SHA512 digest algorithm"
Jan Glauber291dc7c2008-03-06 19:52:00 +0800101 depends on S390
Herbert Xu563f3462009-01-18 20:33:33 +1100102 select CRYPTO_HASH
Jan Glauber291dc7c2008-03-06 19:52:00 +0800103 help
104 This is the s390 hardware accelerated implementation of the
105 SHA512 secure hash standard.
106
Jan Glauberd393d9b2011-04-19 21:29:19 +0200107 It is available as of z10.
Jan Glauber291dc7c2008-03-06 19:52:00 +0800108
Jan Glauber3f5615e2008-01-26 14:11:07 +0100109config CRYPTO_DES_S390
110 tristate "DES and Triple DES cipher algorithms"
111 depends on S390
112 select CRYPTO_ALGAPI
113 select CRYPTO_BLKCIPHER
Heiko Carstens63291d42012-05-09 16:27:35 +0200114 select CRYPTO_DES
Jan Glauber3f5615e2008-01-26 14:11:07 +0100115 help
Gerald Schaefer0200f3e2011-05-04 15:09:44 +1000116 This is the s390 hardware accelerated implementation of the
Jan Glauber3f5615e2008-01-26 14:11:07 +0100117 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
118
Gerald Schaefer0200f3e2011-05-04 15:09:44 +1000119 As of z990 the ECB and CBC mode are hardware accelerated.
120 As of z196 the CTR mode is hardware accelerated.
121
Jan Glauber3f5615e2008-01-26 14:11:07 +0100122config CRYPTO_AES_S390
123 tristate "AES cipher algorithms"
124 depends on S390
125 select CRYPTO_ALGAPI
126 select CRYPTO_BLKCIPHER
127 help
128 This is the s390 hardware accelerated implementation of the
Gerald Schaefer99d97222011-04-26 16:12:42 +1000129 AES cipher algorithms (FIPS-197).
Jan Glauber3f5615e2008-01-26 14:11:07 +0100130
Gerald Schaefer99d97222011-04-26 16:12:42 +1000131 As of z9 the ECB and CBC modes are hardware accelerated
132 for 128 bit keys.
133 As of z10 the ECB and CBC modes are hardware accelerated
134 for all AES key sizes.
Gerald Schaefer0200f3e2011-05-04 15:09:44 +1000135 As of z196 the CTR mode is hardware accelerated for all AES
136 key sizes and XTS mode is hardware accelerated for 256 and
Gerald Schaefer99d97222011-04-26 16:12:42 +1000137 512 bit keys.
Jan Glauber3f5615e2008-01-26 14:11:07 +0100138
139config S390_PRNG
140 tristate "Pseudo random number generator device driver"
141 depends on S390
142 default "m"
143 help
144 Select this option if you want to use the s390 pseudo random number
145 generator. The PRNG is part of the cryptographic processor functions
146 and uses triple-DES to generate secure random numbers like the
Jan Glauberd393d9b2011-04-19 21:29:19 +0200147 ANSI X9.17 standard. User-space programs access the
148 pseudo-random-number device through the char device /dev/prandom.
149
150 It is available as of z9.
Jan Glauber3f5615e2008-01-26 14:11:07 +0100151
Gerald Schaeferdf1309c2011-04-19 21:29:18 +0200152config CRYPTO_GHASH_S390
153 tristate "GHASH digest algorithm"
154 depends on S390
155 select CRYPTO_HASH
156 help
157 This is the s390 hardware accelerated implementation of the
158 GHASH message digest algorithm for GCM (Galois/Counter Mode).
159
160 It is available as of z196.
161
Sebastian Andrzej Siewior85a7f0a2009-08-10 12:50:03 +1000162config CRYPTO_DEV_MV_CESA
163 tristate "Marvell's Cryptographic Engine"
164 depends on PLAT_ORION
165 select CRYPTO_ALGAPI
166 select CRYPTO_AES
167 select CRYPTO_BLKCIPHER2
Alexander Clouter1ebfefc2012-05-12 09:45:08 +0100168 select CRYPTO_HASH
Sebastian Andrzej Siewior85a7f0a2009-08-10 12:50:03 +1000169 help
170 This driver allows you to utilize the Cryptographic Engines and
171 Security Accelerator (CESA) which can be found on the Marvell Orion
172 and Kirkwood SoCs, such as QNAP's TS-209.
173
174 Currently the driver supports AES in ECB and CBC mode without DMA.
175
David S. Miller0a625fd22010-05-19 14:14:04 +1000176config CRYPTO_DEV_NIAGARA2
177 tristate "Niagara2 Stream Processing Unit driver"
David S. Miller50e78162010-09-12 10:44:21 +0800178 select CRYPTO_DES
David S. Miller0a625fd22010-05-19 14:14:04 +1000179 select CRYPTO_ALGAPI
180 depends on SPARC64
181 help
182 Each core of a Niagara2 processor contains a Stream
183 Processing Unit, which itself contains several cryptographic
184 sub-units. One set provides the Modular Arithmetic Unit,
185 used for SSL offload. The other set provides the Cipher
186 Group, which can perform encryption, decryption, hashing,
187 checksumming, and raw copies.
188
Evgeniy Polyakovf7d05612007-10-26 21:31:14 +0800189config CRYPTO_DEV_HIFN_795X
190 tristate "Driver HIFN 795x crypto accelerator chips"
Evgeniy Polyakovc3041f92007-10-11 19:58:16 +0800191 select CRYPTO_DES
Evgeniy Polyakovf7d05612007-10-26 21:31:14 +0800192 select CRYPTO_ALGAPI
Herbert Xu653ebd92007-11-27 19:48:27 +0800193 select CRYPTO_BLKCIPHER
Herbert Xu946fef42008-01-26 09:48:44 +1100194 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
Jan Glauber2707b932007-11-12 21:56:38 +0800195 depends on PCI
Richard Weinberger75b76622011-10-10 12:55:41 +0200196 depends on !ARCH_DMA_ADDR_T_64BIT
Evgeniy Polyakovf7d05612007-10-26 21:31:14 +0800197 help
198 This option allows you to have support for HIFN 795x crypto adapters.
199
Herbert Xu946fef42008-01-26 09:48:44 +1100200config CRYPTO_DEV_HIFN_795X_RNG
201 bool "HIFN 795x random number generator"
202 depends on CRYPTO_DEV_HIFN_795X
203 help
204 Select this option if you want to enable the random number generator
205 on the HIFN 795x crypto adapters.
Evgeniy Polyakovf7d05612007-10-26 21:31:14 +0800206
Kim Phillips8e8ec592011-03-13 16:54:26 +0800207source drivers/crypto/caam/Kconfig
208
Kim Phillips9c4a7962008-06-23 19:50:15 +0800209config CRYPTO_DEV_TALITOS
210 tristate "Talitos Freescale Security Engine (SEC)"
211 select CRYPTO_ALGAPI
212 select CRYPTO_AUTHENC
213 select HW_RANDOM
214 depends on FSL_SOC
215 help
216 Say 'Y' here to use the Freescale Security Engine (SEC)
217 to offload cryptographic algorithm computation.
218
219 The Freescale SEC is present on PowerQUICC 'E' processors, such
220 as the MPC8349E and MPC8548E.
221
222 To compile this driver as a module, choose M here: the module
223 will be called talitos.
224
Christian Hohnstaedt81bef012008-06-25 14:38:47 +0800225config CRYPTO_DEV_IXP4XX
226 tristate "Driver for IXP4xx crypto hardware acceleration"
227 depends on ARCH_IXP4XX
228 select CRYPTO_DES
229 select CRYPTO_ALGAPI
Imre Kaloz090657e2008-07-13 20:12:11 +0800230 select CRYPTO_AUTHENC
Christian Hohnstaedt81bef012008-06-25 14:38:47 +0800231 select CRYPTO_BLKCIPHER
232 help
233 Driver for the IXP4xx NPE crypto engine.
234
James Hsiao049359d2009-02-05 16:18:13 +1100235config CRYPTO_DEV_PPC4XX
236 tristate "Driver AMCC PPC4xx crypto accelerator"
237 depends on PPC && 4xx
238 select CRYPTO_HASH
239 select CRYPTO_ALGAPI
240 select CRYPTO_BLKCIPHER
241 help
242 This option allows you to have support for AMCC crypto acceleration.
243
Dmitry Kasatkin8628e7c2010-05-03 11:10:59 +0800244config CRYPTO_DEV_OMAP_SHAM
245 tristate "Support for OMAP SHA1/MD5 hw accelerator"
246 depends on ARCH_OMAP2 || ARCH_OMAP3
247 select CRYPTO_SHA1
248 select CRYPTO_MD5
249 help
250 OMAP processors have SHA1/MD5 hw accelerator. Select this if you
251 want to use the OMAP module for SHA1/MD5 algorithms.
252
Dmitry Kasatkin537559a2010-09-03 19:16:02 +0800253config CRYPTO_DEV_OMAP_AES
254 tristate "Support for OMAP AES hw engine"
255 depends on ARCH_OMAP2 || ARCH_OMAP3
256 select CRYPTO_AES
257 help
258 OMAP processors have AES module accelerator. Select this if you
259 want to use the OMAP module for AES algorithms.
260
Jamie Ilesce921362011-02-21 16:43:21 +1100261config CRYPTO_DEV_PICOXCELL
262 tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
Jamie Ilesfad8fa42011-10-20 14:10:26 +0200263 depends on ARCH_PICOXCELL && HAVE_CLK
Jamie Ilesce921362011-02-21 16:43:21 +1100264 select CRYPTO_AES
265 select CRYPTO_AUTHENC
266 select CRYPTO_ALGAPI
267 select CRYPTO_DES
268 select CRYPTO_CBC
269 select CRYPTO_ECB
270 select CRYPTO_SEQIV
271 help
272 This option enables support for the hardware offload engines in the
273 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
274 and for 3gpp Layer 2 ciphering support.
275
276 Saying m here will build a module named pipcoxcell_crypto.
277
Vladimir Zapolskiya49e4902011-04-08 20:40:51 +0800278config CRYPTO_DEV_S5P
279 tristate "Support for Samsung S5PV210 crypto accelerator"
280 depends on ARCH_S5PV210
281 select CRYPTO_AES
282 select CRYPTO_ALGAPI
283 select CRYPTO_BLKCIPHER
284 help
285 This option allows you to have support for S5P crypto acceleration.
286 Select this to offload Samsung S5PV210 or S5PC110 from AES
287 algorithms execution.
288
Varun Wadekarf1df57d2012-01-13 16:38:37 +1100289config CRYPTO_DEV_TEGRA_AES
290 tristate "Support for TEGRA AES hw engine"
291 depends on ARCH_TEGRA
292 select CRYPTO_AES
293 help
294 TEGRA processors have AES module accelerator. Select this if you
295 want to use the TEGRA module for AES algorithms.
296
297 To compile this driver as a module, choose M here: the module
298 will be called tegra-aes.
299
Kent Yoderaef7b312012-04-12 05:39:26 +0000300config CRYPTO_DEV_NX
Seth Jennings7c76bdd2012-06-13 13:22:43 -0500301 tristate "Support for Power7+ in-Nest cryptographic acceleration"
Kent Yoderaef7b312012-04-12 05:39:26 +0000302 depends on PPC64 && IBMVIO
303 select CRYPTO_AES
304 select CRYPTO_CBC
305 select CRYPTO_ECB
306 select CRYPTO_CCM
307 select CRYPTO_GCM
308 select CRYPTO_AUTHENC
309 select CRYPTO_XCBC
310 select CRYPTO_SHA256
311 select CRYPTO_SHA512
312 help
313 Support for Power7+ in-Nest cryptographic acceleration. This
314 module supports acceleration for AES and SHA2 algorithms. If you
315 choose 'M' here, this module will be called nx_crypto.
316
Andreas Westin2789c082012-04-30 10:11:17 +0200317config CRYPTO_DEV_UX500
318 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
319 depends on ARCH_U8500
320 select CRYPTO_ALGAPI
321 help
322 Driver for ST-Ericsson UX500 crypto engine.
323
324if CRYPTO_DEV_UX500
325 source "drivers/crypto/ux500/Kconfig"
326endif # if CRYPTO_DEV_UX500
327
Sonic Zhangb8840092012-06-04 12:24:47 +0800328config CRYPTO_DEV_BFIN_CRC
329 tristate "Support for Blackfin CRC hardware"
330 depends on BF60x
331 help
332 Newer Blackfin processors have CRC hardware. Select this if you
333 want to use the Blackfin CRC module.
334
Nicolas Royerbd3c7b52012-07-01 19:19:44 +0200335config CRYPTO_DEV_ATMEL_AES
336 tristate "Support for Atmel AES hw accelerator"
337 depends on ARCH_AT91
338 select CRYPTO_CBC
339 select CRYPTO_ECB
340 select CRYPTO_AES
341 select CRYPTO_ALGAPI
342 select CRYPTO_BLKCIPHER
343 select CONFIG_AT_HDMAC
344 help
345 Some Atmel processors have AES hw accelerator.
346 Select this if you want to use the Atmel module for
347 AES algorithms.
348
349 To compile this driver as a module, choose M here: the module
350 will be called atmel-aes.
351
Jan Engelhardtb5114312007-07-15 23:39:36 -0700352endif # CRYPTO_HW