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Adam Lee522624f2013-12-18 22:23:38 +08001#ifndef __SDHCI_PCI_H
2#define __SDHCI_PCI_H
3
4/*
5 * PCI device IDs
6 */
7
8#define PCI_DEVICE_ID_INTEL_PCH_SDIO0 0x8809
9#define PCI_DEVICE_ID_INTEL_PCH_SDIO1 0x880a
10#define PCI_DEVICE_ID_INTEL_BYT_EMMC 0x0f14
11#define PCI_DEVICE_ID_INTEL_BYT_SDIO 0x0f15
12#define PCI_DEVICE_ID_INTEL_BYT_SD 0x0f16
13#define PCI_DEVICE_ID_INTEL_BYT_EMMC2 0x0f50
Alan Cox066173b2014-08-20 13:27:44 +030014#define PCI_DEVICE_ID_INTEL_BSW_EMMC 0x2294
15#define PCI_DEVICE_ID_INTEL_BSW_SDIO 0x2295
16#define PCI_DEVICE_ID_INTEL_BSW_SD 0x2296
Adam Lee522624f2013-12-18 22:23:38 +080017#define PCI_DEVICE_ID_INTEL_MRFL_MMC 0x1190
18#define PCI_DEVICE_ID_INTEL_CLV_SDIO0 0x08f9
19#define PCI_DEVICE_ID_INTEL_CLV_SDIO1 0x08fa
20#define PCI_DEVICE_ID_INTEL_CLV_SDIO2 0x08fb
21#define PCI_DEVICE_ID_INTEL_CLV_EMMC0 0x08e5
22#define PCI_DEVICE_ID_INTEL_CLV_EMMC1 0x08e6
Derek Browne43e968c2014-06-24 06:56:36 -070023#define PCI_DEVICE_ID_INTEL_QRK_SD 0x08A7
Adrian Hunter1f7f2652015-01-05 14:47:58 +020024#define PCI_DEVICE_ID_INTEL_SPT_EMMC 0x9d2b
25#define PCI_DEVICE_ID_INTEL_SPT_SDIO 0x9d2c
26#define PCI_DEVICE_ID_INTEL_SPT_SD 0x9d2d
Adam Lee522624f2013-12-18 22:23:38 +080027
28/*
29 * PCI registers
30 */
31
32#define PCI_SDHCI_IFPIO 0x00
33#define PCI_SDHCI_IFDMA 0x01
34#define PCI_SDHCI_IFVENDOR 0x02
35
36#define PCI_SLOT_INFO 0x40 /* 8 bits */
37#define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
38#define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
39
40#define MAX_SLOTS 8
41
42struct sdhci_pci_chip;
43struct sdhci_pci_slot;
44
45struct sdhci_pci_fixes {
46 unsigned int quirks;
47 unsigned int quirks2;
48 bool allow_runtime_pm;
Adrian Hunter77a01222014-01-13 09:49:16 +020049 bool own_cd_for_runtime_pm;
Adam Lee522624f2013-12-18 22:23:38 +080050
51 int (*probe) (struct sdhci_pci_chip *);
52
53 int (*probe_slot) (struct sdhci_pci_slot *);
54 void (*remove_slot) (struct sdhci_pci_slot *, int);
55
56 int (*suspend) (struct sdhci_pci_chip *);
57 int (*resume) (struct sdhci_pci_chip *);
58};
59
60struct sdhci_pci_slot {
61 struct sdhci_pci_chip *chip;
62 struct sdhci_host *host;
63 struct sdhci_pci_data *data;
64
65 int pci_bar;
66 int rst_n_gpio;
67 int cd_gpio;
68 int cd_irq;
69
Adrian Hunterff59c522014-09-24 10:27:31 +030070 char *cd_con_id;
71 int cd_idx;
72 bool cd_override_level;
73
Adam Lee522624f2013-12-18 22:23:38 +080074 void (*hw_reset)(struct sdhci_host *host);
Adrian Huntere1bfad62015-02-06 14:13:00 +020075 int (*select_drive_strength)(struct sdhci_host *host,
76 struct mmc_card *card,
77 unsigned int max_dtr, int host_drv,
78 int card_drv, int *drv_type);
Adam Lee522624f2013-12-18 22:23:38 +080079};
80
81struct sdhci_pci_chip {
82 struct pci_dev *pdev;
83
84 unsigned int quirks;
85 unsigned int quirks2;
86 bool allow_runtime_pm;
87 const struct sdhci_pci_fixes *fixes;
88
89 int num_slots; /* Slots on controller */
90 struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */
91};
92
93#endif /* __SDHCI_PCI_H */