Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1 | /* |
| 2 | * omap_hwmod implementation for OMAP2/3/4 |
| 3 | * |
Paul Walmsley | 550c809 | 2011-02-28 11:58:14 -0700 | [diff] [blame] | 4 | * Copyright (C) 2009-2011 Nokia Corporation |
Paul Walmsley | 30e105c | 2012-04-19 00:49:09 -0600 | [diff] [blame] | 5 | * Copyright (C) 2011-2012 Texas Instruments, Inc. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 6 | * |
Paul Walmsley | 4788da2 | 2010-05-18 20:24:05 -0600 | [diff] [blame] | 7 | * Paul Walmsley, BenoƮt Cousson, Kevin Hilman |
| 8 | * |
| 9 | * Created in collaboration with (alphabetical order): Thara Gopinath, |
| 10 | * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand |
| 11 | * Sawant, Santosh Shilimkar, Richard Woodruff |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 12 | * |
| 13 | * This program is free software; you can redistribute it and/or modify |
| 14 | * it under the terms of the GNU General Public License version 2 as |
| 15 | * published by the Free Software Foundation. |
| 16 | * |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 17 | * Introduction |
| 18 | * ------------ |
| 19 | * One way to view an OMAP SoC is as a collection of largely unrelated |
| 20 | * IP blocks connected by interconnects. The IP blocks include |
| 21 | * devices such as ARM processors, audio serial interfaces, UARTs, |
| 22 | * etc. Some of these devices, like the DSP, are created by TI; |
| 23 | * others, like the SGX, largely originate from external vendors. In |
| 24 | * TI's documentation, on-chip devices are referred to as "OMAP |
| 25 | * modules." Some of these IP blocks are identical across several |
| 26 | * OMAP versions. Others are revised frequently. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 27 | * |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 28 | * These OMAP modules are tied together by various interconnects. |
| 29 | * Most of the address and data flow between modules is via OCP-based |
| 30 | * interconnects such as the L3 and L4 buses; but there are other |
| 31 | * interconnects that distribute the hardware clock tree, handle idle |
| 32 | * and reset signaling, supply power, and connect the modules to |
| 33 | * various pads or balls on the OMAP package. |
| 34 | * |
| 35 | * OMAP hwmod provides a consistent way to describe the on-chip |
| 36 | * hardware blocks and their integration into the rest of the chip. |
| 37 | * This description can be automatically generated from the TI |
| 38 | * hardware database. OMAP hwmod provides a standard, consistent API |
| 39 | * to reset, enable, idle, and disable these hardware blocks. And |
| 40 | * hwmod provides a way for other core code, such as the Linux device |
| 41 | * code or the OMAP power management and address space mapping code, |
| 42 | * to query the hardware database. |
| 43 | * |
| 44 | * Using hwmod |
| 45 | * ----------- |
| 46 | * Drivers won't call hwmod functions directly. That is done by the |
| 47 | * omap_device code, and in rare occasions, by custom integration code |
| 48 | * in arch/arm/ *omap*. The omap_device code includes functions to |
| 49 | * build a struct platform_device using omap_hwmod data, and that is |
| 50 | * currently how hwmod data is communicated to drivers and to the |
| 51 | * Linux driver model. Most drivers will call omap_hwmod functions only |
| 52 | * indirectly, via pm_runtime*() functions. |
| 53 | * |
| 54 | * From a layering perspective, here is where the OMAP hwmod code |
| 55 | * fits into the kernel software stack: |
| 56 | * |
| 57 | * +-------------------------------+ |
| 58 | * | Device driver code | |
| 59 | * | (e.g., drivers/) | |
| 60 | * +-------------------------------+ |
| 61 | * | Linux driver model | |
| 62 | * | (platform_device / | |
| 63 | * | platform_driver data/code) | |
| 64 | * +-------------------------------+ |
| 65 | * | OMAP core-driver integration | |
| 66 | * |(arch/arm/mach-omap2/devices.c)| |
| 67 | * +-------------------------------+ |
| 68 | * | omap_device code | |
| 69 | * | (../plat-omap/omap_device.c) | |
| 70 | * +-------------------------------+ |
| 71 | * ----> | omap_hwmod code/data | <----- |
| 72 | * | (../mach-omap2/omap_hwmod*) | |
| 73 | * +-------------------------------+ |
| 74 | * | OMAP clock/PRCM/register fns | |
| 75 | * | (__raw_{read,write}l, clk*) | |
| 76 | * +-------------------------------+ |
| 77 | * |
| 78 | * Device drivers should not contain any OMAP-specific code or data in |
| 79 | * them. They should only contain code to operate the IP block that |
| 80 | * the driver is responsible for. This is because these IP blocks can |
| 81 | * also appear in other SoCs, either from TI (such as DaVinci) or from |
| 82 | * other manufacturers; and drivers should be reusable across other |
| 83 | * platforms. |
| 84 | * |
| 85 | * The OMAP hwmod code also will attempt to reset and idle all on-chip |
| 86 | * devices upon boot. The goal here is for the kernel to be |
| 87 | * completely self-reliant and independent from bootloaders. This is |
| 88 | * to ensure a repeatable configuration, both to ensure consistent |
| 89 | * runtime behavior, and to make it easier for others to reproduce |
| 90 | * bugs. |
| 91 | * |
| 92 | * OMAP module activity states |
| 93 | * --------------------------- |
| 94 | * The hwmod code considers modules to be in one of several activity |
| 95 | * states. IP blocks start out in an UNKNOWN state, then once they |
| 96 | * are registered via the hwmod code, proceed to the REGISTERED state. |
| 97 | * Once their clock names are resolved to clock pointers, the module |
| 98 | * enters the CLKS_INITED state; and finally, once the module has been |
| 99 | * reset and the integration registers programmed, the INITIALIZED state |
| 100 | * is entered. The hwmod code will then place the module into either |
| 101 | * the IDLE state to save power, or in the case of a critical system |
| 102 | * module, the ENABLED state. |
| 103 | * |
| 104 | * OMAP core integration code can then call omap_hwmod*() functions |
| 105 | * directly to move the module between the IDLE, ENABLED, and DISABLED |
| 106 | * states, as needed. This is done during both the PM idle loop, and |
| 107 | * in the OMAP core integration code's implementation of the PM runtime |
| 108 | * functions. |
| 109 | * |
| 110 | * References |
| 111 | * ---------- |
| 112 | * This is a partial list. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 113 | * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064) |
| 114 | * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090) |
| 115 | * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108) |
| 116 | * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140) |
| 117 | * - Open Core Protocol Specification 2.2 |
| 118 | * |
| 119 | * To do: |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 120 | * - handle IO mapping |
| 121 | * - bus throughput & module latency measurement code |
| 122 | * |
| 123 | * XXX add tests at the beginning of each function to ensure the hwmod is |
| 124 | * in the appropriate state |
| 125 | * XXX error return values should be checked to ensure that they are |
| 126 | * appropriate |
| 127 | */ |
| 128 | #undef DEBUG |
| 129 | |
| 130 | #include <linux/kernel.h> |
| 131 | #include <linux/errno.h> |
| 132 | #include <linux/io.h> |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 133 | #include <linux/clk-provider.h> |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 134 | #include <linux/delay.h> |
| 135 | #include <linux/err.h> |
| 136 | #include <linux/list.h> |
| 137 | #include <linux/mutex.h> |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 138 | #include <linux/spinlock.h> |
Tero Kristo | abc2d54 | 2011-12-16 14:36:59 -0700 | [diff] [blame] | 139 | #include <linux/slab.h> |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 140 | #include <linux/bootmem.h> |
Thomas Gleixner | f7b861b | 2013-03-21 22:49:38 +0100 | [diff] [blame] | 141 | #include <linux/cpu.h> |
Santosh Shilimkar | 079abad | 2013-01-21 18:40:57 +0530 | [diff] [blame] | 142 | #include <linux/of.h> |
| 143 | #include <linux/of_address.h> |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 144 | |
Paul Walmsley | fa20022 | 2013-01-26 00:48:56 -0700 | [diff] [blame] | 145 | #include <asm/system_misc.h> |
| 146 | |
Paul Walmsley | a135eaa | 2012-09-27 10:33:34 -0600 | [diff] [blame] | 147 | #include "clock.h" |
Tony Lindgren | 2a296c8 | 2012-10-02 17:41:35 -0700 | [diff] [blame] | 148 | #include "omap_hwmod.h" |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 149 | |
Tony Lindgren | dbc0416 | 2012-08-31 10:59:07 -0700 | [diff] [blame] | 150 | #include "soc.h" |
| 151 | #include "common.h" |
| 152 | #include "clockdomain.h" |
| 153 | #include "powerdomain.h" |
Paul Walmsley | ff4ae5d | 2012-10-21 01:01:11 -0600 | [diff] [blame] | 154 | #include "cm2xxx.h" |
| 155 | #include "cm3xxx.h" |
Benoit Cousson | d0f0631 | 2011-07-10 05:56:30 -0600 | [diff] [blame] | 156 | #include "cminst44xx.h" |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 157 | #include "cm33xx.h" |
Paul Walmsley | b13159a | 2012-10-29 20:57:44 -0600 | [diff] [blame] | 158 | #include "prm.h" |
Paul Walmsley | 139563a | 2012-10-21 01:01:10 -0600 | [diff] [blame] | 159 | #include "prm3xxx.h" |
Paul Walmsley | d198b51 | 2010-12-21 15:30:54 -0700 | [diff] [blame] | 160 | #include "prm44xx.h" |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 161 | #include "prm33xx.h" |
Benoit Cousson | eaac329 | 2011-07-10 05:56:31 -0600 | [diff] [blame] | 162 | #include "prminst44xx.h" |
Tony Lindgren | 8d9af88 | 2010-12-22 18:42:35 -0800 | [diff] [blame] | 163 | #include "mux.h" |
Vishwanath BS | 5165882 | 2012-06-22 08:40:04 -0600 | [diff] [blame] | 164 | #include "pm.h" |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 165 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 166 | /* Name of the OMAP hwmod for the MPU */ |
Benoit Cousson | 5c2c029 | 2010-05-20 12:31:10 -0600 | [diff] [blame] | 167 | #define MPU_INITIATOR_NAME "mpu" |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 168 | |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 169 | /* |
| 170 | * Number of struct omap_hwmod_link records per struct |
| 171 | * omap_hwmod_ocp_if record (master->slave and slave->master) |
| 172 | */ |
| 173 | #define LINKS_PER_OCP_IF 2 |
| 174 | |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 175 | /** |
| 176 | * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations |
| 177 | * @enable_module: function to enable a module (via MODULEMODE) |
| 178 | * @disable_module: function to disable a module (via MODULEMODE) |
| 179 | * |
| 180 | * XXX Eventually this functionality will be hidden inside the PRM/CM |
| 181 | * device drivers. Until then, this should avoid huge blocks of cpu_is_*() |
| 182 | * conditionals in this code. |
| 183 | */ |
| 184 | struct omap_hwmod_soc_ops { |
| 185 | void (*enable_module)(struct omap_hwmod *oh); |
| 186 | int (*disable_module)(struct omap_hwmod *oh); |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 187 | int (*wait_target_ready)(struct omap_hwmod *oh); |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 188 | int (*assert_hardreset)(struct omap_hwmod *oh, |
| 189 | struct omap_hwmod_rst_info *ohri); |
| 190 | int (*deassert_hardreset)(struct omap_hwmod *oh, |
| 191 | struct omap_hwmod_rst_info *ohri); |
| 192 | int (*is_hardreset_asserted)(struct omap_hwmod *oh, |
| 193 | struct omap_hwmod_rst_info *ohri); |
Kevin Hilman | 0a179ea | 2012-06-18 12:12:25 -0600 | [diff] [blame] | 194 | int (*init_clkdm)(struct omap_hwmod *oh); |
Rajendra Nayak | e6d3a8b | 2012-11-21 16:15:17 -0700 | [diff] [blame] | 195 | void (*update_context_lost)(struct omap_hwmod *oh); |
| 196 | int (*get_context_lost)(struct omap_hwmod *oh); |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 197 | }; |
| 198 | |
| 199 | /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */ |
| 200 | static struct omap_hwmod_soc_ops soc_ops; |
| 201 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 202 | /* omap_hwmod_list contains all registered struct omap_hwmods */ |
| 203 | static LIST_HEAD(omap_hwmod_list); |
| 204 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 205 | /* mpu_oh: used to add/remove MPU initiator from sleepdep list */ |
| 206 | static struct omap_hwmod *mpu_oh; |
| 207 | |
Vishwanath BS | 5165882 | 2012-06-22 08:40:04 -0600 | [diff] [blame] | 208 | /* io_chain_lock: used to serialize reconfigurations of the I/O chain */ |
| 209 | static DEFINE_SPINLOCK(io_chain_lock); |
| 210 | |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 211 | /* |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 212 | * linkspace: ptr to a buffer that struct omap_hwmod_link records are |
| 213 | * allocated from - used to reduce the number of small memory |
| 214 | * allocations, which has a significant impact on performance |
| 215 | */ |
| 216 | static struct omap_hwmod_link *linkspace; |
| 217 | |
| 218 | /* |
| 219 | * free_ls, max_ls: array indexes into linkspace; representing the |
| 220 | * next free struct omap_hwmod_link index, and the maximum number of |
| 221 | * struct omap_hwmod_link records allocated (respectively) |
| 222 | */ |
| 223 | static unsigned short free_ls, max_ls, ls_supp; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 224 | |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 225 | /* inited: set to true once the hwmod code is initialized */ |
| 226 | static bool inited; |
| 227 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 228 | /* Private functions */ |
| 229 | |
| 230 | /** |
Paul Walmsley | 11cd4b9 | 2012-04-19 04:04:32 -0600 | [diff] [blame] | 231 | * _fetch_next_ocp_if - return the next OCP interface in a list |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 232 | * @p: ptr to a ptr to the list_head inside the ocp_if to return |
Paul Walmsley | 11cd4b9 | 2012-04-19 04:04:32 -0600 | [diff] [blame] | 233 | * @i: pointer to the index of the element pointed to by @p in the list |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 234 | * |
Paul Walmsley | 11cd4b9 | 2012-04-19 04:04:32 -0600 | [diff] [blame] | 235 | * Return a pointer to the struct omap_hwmod_ocp_if record |
| 236 | * containing the struct list_head pointed to by @p, and increment |
| 237 | * @p such that a future call to this routine will return the next |
| 238 | * record. |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 239 | */ |
| 240 | static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p, |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 241 | int *i) |
| 242 | { |
| 243 | struct omap_hwmod_ocp_if *oi; |
| 244 | |
Paul Walmsley | 11cd4b9 | 2012-04-19 04:04:32 -0600 | [diff] [blame] | 245 | oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if; |
| 246 | *p = (*p)->next; |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 247 | |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 248 | *i = *i + 1; |
| 249 | |
| 250 | return oi; |
| 251 | } |
| 252 | |
| 253 | /** |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 254 | * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy |
| 255 | * @oh: struct omap_hwmod * |
| 256 | * |
| 257 | * Load the current value of the hwmod OCP_SYSCONFIG register into the |
| 258 | * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no |
| 259 | * OCP_SYSCONFIG register or 0 upon success. |
| 260 | */ |
| 261 | static int _update_sysc_cache(struct omap_hwmod *oh) |
| 262 | { |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 263 | if (!oh->class->sysc) { |
| 264 | WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 265 | return -EINVAL; |
| 266 | } |
| 267 | |
| 268 | /* XXX ensure module interface clock is up */ |
| 269 | |
Rajendra Nayak | cc7a1d2 | 2010-10-08 10:23:22 -0700 | [diff] [blame] | 270 | oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 271 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 272 | if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE)) |
Thara Gopinath | 883edfd | 2010-01-19 17:30:51 -0700 | [diff] [blame] | 273 | oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 274 | |
| 275 | return 0; |
| 276 | } |
| 277 | |
| 278 | /** |
| 279 | * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register |
| 280 | * @v: OCP_SYSCONFIG value to write |
| 281 | * @oh: struct omap_hwmod * |
| 282 | * |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 283 | * Write @v into the module class' OCP_SYSCONFIG register, if it has |
| 284 | * one. No return value. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 285 | */ |
| 286 | static void _write_sysconfig(u32 v, struct omap_hwmod *oh) |
| 287 | { |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 288 | if (!oh->class->sysc) { |
| 289 | WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 290 | return; |
| 291 | } |
| 292 | |
| 293 | /* XXX ensure module interface clock is up */ |
| 294 | |
Rajendra Nayak | 233cbe5 | 2010-12-14 12:42:36 -0700 | [diff] [blame] | 295 | /* Module might have lost context, always update cache and register */ |
| 296 | oh->_sysc_cache = v; |
| 297 | omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 298 | } |
| 299 | |
| 300 | /** |
| 301 | * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v |
| 302 | * @oh: struct omap_hwmod * |
| 303 | * @standbymode: MIDLEMODE field bits |
| 304 | * @v: pointer to register contents to modify |
| 305 | * |
| 306 | * Update the master standby mode bits in @v to be @standbymode for |
| 307 | * the @oh hwmod. Does not write to the hardware. Returns -EINVAL |
| 308 | * upon error or 0 upon success. |
| 309 | */ |
| 310 | static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode, |
| 311 | u32 *v) |
| 312 | { |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 313 | u32 mstandby_mask; |
| 314 | u8 mstandby_shift; |
| 315 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 316 | if (!oh->class->sysc || |
| 317 | !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE)) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 318 | return -EINVAL; |
| 319 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 320 | if (!oh->class->sysc->sysc_fields) { |
| 321 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 322 | return -EINVAL; |
| 323 | } |
| 324 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 325 | mstandby_shift = oh->class->sysc->sysc_fields->midle_shift; |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 326 | mstandby_mask = (0x3 << mstandby_shift); |
| 327 | |
| 328 | *v &= ~mstandby_mask; |
| 329 | *v |= __ffs(standbymode) << mstandby_shift; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 330 | |
| 331 | return 0; |
| 332 | } |
| 333 | |
| 334 | /** |
| 335 | * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v |
| 336 | * @oh: struct omap_hwmod * |
| 337 | * @idlemode: SIDLEMODE field bits |
| 338 | * @v: pointer to register contents to modify |
| 339 | * |
| 340 | * Update the slave idle mode bits in @v to be @idlemode for the @oh |
| 341 | * hwmod. Does not write to the hardware. Returns -EINVAL upon error |
| 342 | * or 0 upon success. |
| 343 | */ |
| 344 | static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v) |
| 345 | { |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 346 | u32 sidle_mask; |
| 347 | u8 sidle_shift; |
| 348 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 349 | if (!oh->class->sysc || |
| 350 | !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE)) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 351 | return -EINVAL; |
| 352 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 353 | if (!oh->class->sysc->sysc_fields) { |
| 354 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 355 | return -EINVAL; |
| 356 | } |
| 357 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 358 | sidle_shift = oh->class->sysc->sysc_fields->sidle_shift; |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 359 | sidle_mask = (0x3 << sidle_shift); |
| 360 | |
| 361 | *v &= ~sidle_mask; |
| 362 | *v |= __ffs(idlemode) << sidle_shift; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 363 | |
| 364 | return 0; |
| 365 | } |
| 366 | |
| 367 | /** |
| 368 | * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v |
| 369 | * @oh: struct omap_hwmod * |
| 370 | * @clockact: CLOCKACTIVITY field bits |
| 371 | * @v: pointer to register contents to modify |
| 372 | * |
| 373 | * Update the clockactivity mode bits in @v to be @clockact for the |
| 374 | * @oh hwmod. Used for additional powersaving on some modules. Does |
| 375 | * not write to the hardware. Returns -EINVAL upon error or 0 upon |
| 376 | * success. |
| 377 | */ |
| 378 | static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v) |
| 379 | { |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 380 | u32 clkact_mask; |
| 381 | u8 clkact_shift; |
| 382 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 383 | if (!oh->class->sysc || |
| 384 | !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY)) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 385 | return -EINVAL; |
| 386 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 387 | if (!oh->class->sysc->sysc_fields) { |
| 388 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 389 | return -EINVAL; |
| 390 | } |
| 391 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 392 | clkact_shift = oh->class->sysc->sysc_fields->clkact_shift; |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 393 | clkact_mask = (0x3 << clkact_shift); |
| 394 | |
| 395 | *v &= ~clkact_mask; |
| 396 | *v |= clockact << clkact_shift; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 397 | |
| 398 | return 0; |
| 399 | } |
| 400 | |
| 401 | /** |
| 402 | * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v |
| 403 | * @oh: struct omap_hwmod * |
| 404 | * @v: pointer to register contents to modify |
| 405 | * |
| 406 | * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon |
| 407 | * error or 0 upon success. |
| 408 | */ |
| 409 | static int _set_softreset(struct omap_hwmod *oh, u32 *v) |
| 410 | { |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 411 | u32 softrst_mask; |
| 412 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 413 | if (!oh->class->sysc || |
| 414 | !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET)) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 415 | return -EINVAL; |
| 416 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 417 | if (!oh->class->sysc->sysc_fields) { |
| 418 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 419 | return -EINVAL; |
| 420 | } |
| 421 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 422 | softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift); |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 423 | |
| 424 | *v |= softrst_mask; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 425 | |
| 426 | return 0; |
| 427 | } |
| 428 | |
| 429 | /** |
Tero Kristo | 613ad0e | 2012-10-29 22:02:13 -0600 | [diff] [blame] | 430 | * _wait_softreset_complete - wait for an OCP softreset to complete |
| 431 | * @oh: struct omap_hwmod * to wait on |
| 432 | * |
| 433 | * Wait until the IP block represented by @oh reports that its OCP |
| 434 | * softreset is complete. This can be triggered by software (see |
| 435 | * _ocp_softreset()) or by hardware upon returning from off-mode (one |
| 436 | * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT |
| 437 | * microseconds. Returns the number of microseconds waited. |
| 438 | */ |
| 439 | static int _wait_softreset_complete(struct omap_hwmod *oh) |
| 440 | { |
| 441 | struct omap_hwmod_class_sysconfig *sysc; |
| 442 | u32 softrst_mask; |
| 443 | int c = 0; |
| 444 | |
| 445 | sysc = oh->class->sysc; |
| 446 | |
| 447 | if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS) |
| 448 | omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs) |
| 449 | & SYSS_RESETDONE_MASK), |
| 450 | MAX_MODULE_SOFTRESET_WAIT, c); |
| 451 | else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) { |
| 452 | softrst_mask = (0x1 << sysc->sysc_fields->srst_shift); |
| 453 | omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs) |
| 454 | & softrst_mask), |
| 455 | MAX_MODULE_SOFTRESET_WAIT, c); |
| 456 | } |
| 457 | |
| 458 | return c; |
| 459 | } |
| 460 | |
| 461 | /** |
Kishon Vijay Abraham I | 6668546 | 2012-07-04 05:09:21 -0600 | [diff] [blame] | 462 | * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v |
| 463 | * @oh: struct omap_hwmod * |
| 464 | * |
| 465 | * The DMADISABLE bit is a semi-automatic bit present in sysconfig register |
| 466 | * of some modules. When the DMA must perform read/write accesses, the |
| 467 | * DMADISABLE bit is cleared by the hardware. But when the DMA must stop |
| 468 | * for power management, software must set the DMADISABLE bit back to 1. |
| 469 | * |
| 470 | * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon |
| 471 | * error or 0 upon success. |
| 472 | */ |
| 473 | static int _set_dmadisable(struct omap_hwmod *oh) |
| 474 | { |
| 475 | u32 v; |
| 476 | u32 dmadisable_mask; |
| 477 | |
| 478 | if (!oh->class->sysc || |
| 479 | !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE)) |
| 480 | return -EINVAL; |
| 481 | |
| 482 | if (!oh->class->sysc->sysc_fields) { |
| 483 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); |
| 484 | return -EINVAL; |
| 485 | } |
| 486 | |
| 487 | /* clocks must be on for this operation */ |
| 488 | if (oh->_state != _HWMOD_STATE_ENABLED) { |
| 489 | pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name); |
| 490 | return -EINVAL; |
| 491 | } |
| 492 | |
| 493 | pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name); |
| 494 | |
| 495 | v = oh->_sysc_cache; |
| 496 | dmadisable_mask = |
| 497 | (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift); |
| 498 | v |= dmadisable_mask; |
| 499 | _write_sysconfig(v, oh); |
| 500 | |
| 501 | return 0; |
| 502 | } |
| 503 | |
| 504 | /** |
Paul Walmsley | 726072e | 2009-12-08 16:34:15 -0700 | [diff] [blame] | 505 | * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v |
| 506 | * @oh: struct omap_hwmod * |
| 507 | * @autoidle: desired AUTOIDLE bitfield value (0 or 1) |
| 508 | * @v: pointer to register contents to modify |
| 509 | * |
| 510 | * Update the module autoidle bit in @v to be @autoidle for the @oh |
| 511 | * hwmod. The autoidle bit controls whether the module can gate |
| 512 | * internal clocks automatically when it isn't doing anything; the |
| 513 | * exact function of this bit varies on a per-module basis. This |
| 514 | * function does not write to the hardware. Returns -EINVAL upon |
| 515 | * error or 0 upon success. |
| 516 | */ |
| 517 | static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle, |
| 518 | u32 *v) |
| 519 | { |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 520 | u32 autoidle_mask; |
| 521 | u8 autoidle_shift; |
| 522 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 523 | if (!oh->class->sysc || |
| 524 | !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE)) |
Paul Walmsley | 726072e | 2009-12-08 16:34:15 -0700 | [diff] [blame] | 525 | return -EINVAL; |
| 526 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 527 | if (!oh->class->sysc->sysc_fields) { |
| 528 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 529 | return -EINVAL; |
| 530 | } |
| 531 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 532 | autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift; |
Tarun Kanti DebBarma | 8985b63 | 2011-03-03 14:22:46 -0700 | [diff] [blame] | 533 | autoidle_mask = (0x1 << autoidle_shift); |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 534 | |
| 535 | *v &= ~autoidle_mask; |
| 536 | *v |= autoidle << autoidle_shift; |
Paul Walmsley | 726072e | 2009-12-08 16:34:15 -0700 | [diff] [blame] | 537 | |
| 538 | return 0; |
| 539 | } |
| 540 | |
| 541 | /** |
Govindraj R | eceec00 | 2011-12-16 14:36:58 -0700 | [diff] [blame] | 542 | * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux |
| 543 | * @oh: struct omap_hwmod * |
| 544 | * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable |
| 545 | * |
| 546 | * Set or clear the I/O pad wakeup flag in the mux entries for the |
| 547 | * hwmod @oh. This function changes the @oh->mux->pads_dynamic array |
| 548 | * in memory. If the hwmod is currently idled, and the new idle |
| 549 | * values don't match the previous ones, this function will also |
| 550 | * update the SCM PADCTRL registers. Otherwise, if the hwmod is not |
| 551 | * currently idled, this function won't touch the hardware: the new |
| 552 | * mux settings are written to the SCM PADCTRL registers when the |
| 553 | * hwmod is idled. No return value. |
| 554 | */ |
| 555 | static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake) |
| 556 | { |
| 557 | struct omap_device_pad *pad; |
| 558 | bool change = false; |
| 559 | u16 prev_idle; |
| 560 | int j; |
| 561 | |
| 562 | if (!oh->mux || !oh->mux->enabled) |
| 563 | return; |
| 564 | |
| 565 | for (j = 0; j < oh->mux->nr_pads_dynamic; j++) { |
| 566 | pad = oh->mux->pads_dynamic[j]; |
| 567 | |
| 568 | if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP)) |
| 569 | continue; |
| 570 | |
| 571 | prev_idle = pad->idle; |
| 572 | |
| 573 | if (set_wake) |
| 574 | pad->idle |= OMAP_WAKEUP_EN; |
| 575 | else |
| 576 | pad->idle &= ~OMAP_WAKEUP_EN; |
| 577 | |
| 578 | if (prev_idle != pad->idle) |
| 579 | change = true; |
| 580 | } |
| 581 | |
| 582 | if (change && oh->_state == _HWMOD_STATE_IDLE) |
| 583 | omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE); |
| 584 | } |
| 585 | |
| 586 | /** |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 587 | * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware |
| 588 | * @oh: struct omap_hwmod * |
| 589 | * |
| 590 | * Allow the hardware module @oh to send wakeups. Returns -EINVAL |
| 591 | * upon error or 0 upon success. |
| 592 | */ |
Kevin Hilman | 5a7ddcb | 2010-12-21 21:08:34 -0700 | [diff] [blame] | 593 | static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 594 | { |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 595 | if (!oh->class->sysc || |
Benoit Cousson | 86009eb | 2010-12-21 21:31:28 -0700 | [diff] [blame] | 596 | !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || |
Benoit Cousson | 724019b | 2011-07-01 22:54:00 +0200 | [diff] [blame] | 597 | (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || |
| 598 | (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 599 | return -EINVAL; |
| 600 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 601 | if (!oh->class->sysc->sysc_fields) { |
| 602 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 603 | return -EINVAL; |
| 604 | } |
| 605 | |
Benoit Cousson | 1fe7411 | 2011-07-01 22:54:03 +0200 | [diff] [blame] | 606 | if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) |
| 607 | *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 608 | |
Benoit Cousson | 86009eb | 2010-12-21 21:31:28 -0700 | [diff] [blame] | 609 | if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) |
| 610 | _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); |
Benoit Cousson | 724019b | 2011-07-01 22:54:00 +0200 | [diff] [blame] | 611 | if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) |
| 612 | _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); |
Benoit Cousson | 86009eb | 2010-12-21 21:31:28 -0700 | [diff] [blame] | 613 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 614 | /* XXX test pwrdm_get_wken for this hwmod's subsystem */ |
| 615 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 616 | return 0; |
| 617 | } |
| 618 | |
| 619 | /** |
| 620 | * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware |
| 621 | * @oh: struct omap_hwmod * |
| 622 | * |
| 623 | * Prevent the hardware module @oh to send wakeups. Returns -EINVAL |
| 624 | * upon error or 0 upon success. |
| 625 | */ |
Kevin Hilman | 5a7ddcb | 2010-12-21 21:08:34 -0700 | [diff] [blame] | 626 | static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 627 | { |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 628 | if (!oh->class->sysc || |
Benoit Cousson | 86009eb | 2010-12-21 21:31:28 -0700 | [diff] [blame] | 629 | !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || |
Benoit Cousson | 724019b | 2011-07-01 22:54:00 +0200 | [diff] [blame] | 630 | (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || |
| 631 | (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 632 | return -EINVAL; |
| 633 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 634 | if (!oh->class->sysc->sysc_fields) { |
| 635 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); |
Thara Gopinath | 358f0e6 | 2010-02-24 12:05:58 -0700 | [diff] [blame] | 636 | return -EINVAL; |
| 637 | } |
| 638 | |
Benoit Cousson | 1fe7411 | 2011-07-01 22:54:03 +0200 | [diff] [blame] | 639 | if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) |
| 640 | *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 641 | |
Benoit Cousson | 86009eb | 2010-12-21 21:31:28 -0700 | [diff] [blame] | 642 | if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) |
| 643 | _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v); |
Benoit Cousson | 724019b | 2011-07-01 22:54:00 +0200 | [diff] [blame] | 644 | if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) |
Djamil Elaidi | 561038f | 2012-06-17 11:57:51 -0600 | [diff] [blame] | 645 | _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v); |
Benoit Cousson | 86009eb | 2010-12-21 21:31:28 -0700 | [diff] [blame] | 646 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 647 | /* XXX test pwrdm_get_wken for this hwmod's subsystem */ |
| 648 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 649 | return 0; |
| 650 | } |
| 651 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 652 | static struct clockdomain *_get_clkdm(struct omap_hwmod *oh) |
| 653 | { |
Rajendra Nayak | c4a1ea2 | 2012-04-27 16:32:53 +0530 | [diff] [blame] | 654 | struct clk_hw_omap *clk; |
| 655 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 656 | if (oh->clkdm) { |
| 657 | return oh->clkdm; |
| 658 | } else if (oh->_clk) { |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 659 | clk = to_clk_hw_omap(__clk_get_hw(oh->_clk)); |
| 660 | return clk->clkdm; |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 661 | } |
| 662 | return NULL; |
| 663 | } |
| 664 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 665 | /** |
| 666 | * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active |
| 667 | * @oh: struct omap_hwmod * |
| 668 | * |
| 669 | * Prevent the hardware module @oh from entering idle while the |
| 670 | * hardare module initiator @init_oh is active. Useful when a module |
| 671 | * will be accessed by a particular initiator (e.g., if a module will |
| 672 | * be accessed by the IVA, there should be a sleepdep between the IVA |
| 673 | * initiator and the module). Only applies to modules in smart-idle |
Paul Walmsley | 570b54c | 2011-03-10 03:50:09 -0700 | [diff] [blame] | 674 | * mode. If the clockdomain is marked as not needing autodeps, return |
| 675 | * 0 without doing anything. Otherwise, returns -EINVAL upon error or |
| 676 | * passes along clkdm_add_sleepdep() value upon success. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 677 | */ |
| 678 | static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh) |
| 679 | { |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 680 | struct clockdomain *clkdm, *init_clkdm; |
| 681 | |
| 682 | clkdm = _get_clkdm(oh); |
| 683 | init_clkdm = _get_clkdm(init_oh); |
| 684 | |
| 685 | if (!clkdm || !init_clkdm) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 686 | return -EINVAL; |
| 687 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 688 | if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS) |
Paul Walmsley | 570b54c | 2011-03-10 03:50:09 -0700 | [diff] [blame] | 689 | return 0; |
| 690 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 691 | return clkdm_add_sleepdep(clkdm, init_clkdm); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 692 | } |
| 693 | |
| 694 | /** |
| 695 | * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active |
| 696 | * @oh: struct omap_hwmod * |
| 697 | * |
| 698 | * Allow the hardware module @oh to enter idle while the hardare |
| 699 | * module initiator @init_oh is active. Useful when a module will not |
| 700 | * be accessed by a particular initiator (e.g., if a module will not |
| 701 | * be accessed by the IVA, there should be no sleepdep between the IVA |
| 702 | * initiator and the module). Only applies to modules in smart-idle |
Paul Walmsley | 570b54c | 2011-03-10 03:50:09 -0700 | [diff] [blame] | 703 | * mode. If the clockdomain is marked as not needing autodeps, return |
| 704 | * 0 without doing anything. Returns -EINVAL upon error or passes |
| 705 | * along clkdm_del_sleepdep() value upon success. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 706 | */ |
| 707 | static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh) |
| 708 | { |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 709 | struct clockdomain *clkdm, *init_clkdm; |
| 710 | |
| 711 | clkdm = _get_clkdm(oh); |
| 712 | init_clkdm = _get_clkdm(init_oh); |
| 713 | |
| 714 | if (!clkdm || !init_clkdm) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 715 | return -EINVAL; |
| 716 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 717 | if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS) |
Paul Walmsley | 570b54c | 2011-03-10 03:50:09 -0700 | [diff] [blame] | 718 | return 0; |
| 719 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 720 | return clkdm_del_sleepdep(clkdm, init_clkdm); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 721 | } |
| 722 | |
| 723 | /** |
| 724 | * _init_main_clk - get a struct clk * for the the hwmod's main functional clk |
| 725 | * @oh: struct omap_hwmod * |
| 726 | * |
| 727 | * Called from _init_clocks(). Populates the @oh _clk (main |
| 728 | * functional clock pointer) if a main_clk is present. Returns 0 on |
| 729 | * success or -EINVAL on error. |
| 730 | */ |
| 731 | static int _init_main_clk(struct omap_hwmod *oh) |
| 732 | { |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 733 | int ret = 0; |
| 734 | |
Paul Walmsley | 50ebdac | 2010-02-22 22:09:31 -0700 | [diff] [blame] | 735 | if (!oh->main_clk) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 736 | return 0; |
| 737 | |
Rajendra Nayak | 6ea74cb | 2012-09-22 02:24:16 -0600 | [diff] [blame] | 738 | oh->_clk = clk_get(NULL, oh->main_clk); |
| 739 | if (IS_ERR(oh->_clk)) { |
Benoit Cousson | 20383d8 | 2010-05-20 12:31:09 -0600 | [diff] [blame] | 740 | pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n", |
| 741 | oh->name, oh->main_clk); |
Benoit Cousson | 6340338 | 2010-05-20 12:31:10 -0600 | [diff] [blame] | 742 | return -EINVAL; |
Benoit Cousson | dc75925 | 2010-06-23 18:15:12 -0600 | [diff] [blame] | 743 | } |
Rajendra Nayak | 4d7cb45 | 2012-09-22 02:24:16 -0600 | [diff] [blame] | 744 | /* |
| 745 | * HACK: This needs a re-visit once clk_prepare() is implemented |
| 746 | * to do something meaningful. Today its just a no-op. |
| 747 | * If clk_prepare() is used at some point to do things like |
| 748 | * voltage scaling etc, then this would have to be moved to |
| 749 | * some point where subsystems like i2c and pmic become |
| 750 | * available. |
| 751 | */ |
| 752 | clk_prepare(oh->_clk); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 753 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 754 | if (!_get_clkdm(oh)) |
Paul Walmsley | 3bb05db | 2012-09-23 17:28:18 -0600 | [diff] [blame] | 755 | pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n", |
Rajendra Nayak | 5dcc3b9 | 2012-09-22 02:24:17 -0600 | [diff] [blame] | 756 | oh->name, oh->main_clk); |
Kevin Hilman | 81d7c6f | 2009-12-08 16:34:24 -0700 | [diff] [blame] | 757 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 758 | return ret; |
| 759 | } |
| 760 | |
| 761 | /** |
Paul Walmsley | 887adea | 2010-07-26 16:34:33 -0600 | [diff] [blame] | 762 | * _init_interface_clks - get a struct clk * for the the hwmod's interface clks |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 763 | * @oh: struct omap_hwmod * |
| 764 | * |
| 765 | * Called from _init_clocks(). Populates the @oh OCP slave interface |
| 766 | * clock pointers. Returns 0 on success or -EINVAL on error. |
| 767 | */ |
| 768 | static int _init_interface_clks(struct omap_hwmod *oh) |
| 769 | { |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 770 | struct omap_hwmod_ocp_if *os; |
Paul Walmsley | 11cd4b9 | 2012-04-19 04:04:32 -0600 | [diff] [blame] | 771 | struct list_head *p; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 772 | struct clk *c; |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 773 | int i = 0; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 774 | int ret = 0; |
| 775 | |
Paul Walmsley | 11cd4b9 | 2012-04-19 04:04:32 -0600 | [diff] [blame] | 776 | p = oh->slave_ports.next; |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 777 | |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 778 | while (i < oh->slaves_cnt) { |
Paul Walmsley | 11cd4b9 | 2012-04-19 04:04:32 -0600 | [diff] [blame] | 779 | os = _fetch_next_ocp_if(&p, &i); |
Paul Walmsley | 50ebdac | 2010-02-22 22:09:31 -0700 | [diff] [blame] | 780 | if (!os->clk) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 781 | continue; |
| 782 | |
Rajendra Nayak | 6ea74cb | 2012-09-22 02:24:16 -0600 | [diff] [blame] | 783 | c = clk_get(NULL, os->clk); |
| 784 | if (IS_ERR(c)) { |
Benoit Cousson | 20383d8 | 2010-05-20 12:31:09 -0600 | [diff] [blame] | 785 | pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n", |
| 786 | oh->name, os->clk); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 787 | ret = -EINVAL; |
Benoit Cousson | dc75925 | 2010-06-23 18:15:12 -0600 | [diff] [blame] | 788 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 789 | os->_clk = c; |
Rajendra Nayak | 4d7cb45 | 2012-09-22 02:24:16 -0600 | [diff] [blame] | 790 | /* |
| 791 | * HACK: This needs a re-visit once clk_prepare() is implemented |
| 792 | * to do something meaningful. Today its just a no-op. |
| 793 | * If clk_prepare() is used at some point to do things like |
| 794 | * voltage scaling etc, then this would have to be moved to |
| 795 | * some point where subsystems like i2c and pmic become |
| 796 | * available. |
| 797 | */ |
| 798 | clk_prepare(os->_clk); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 799 | } |
| 800 | |
| 801 | return ret; |
| 802 | } |
| 803 | |
| 804 | /** |
| 805 | * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks |
| 806 | * @oh: struct omap_hwmod * |
| 807 | * |
| 808 | * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk |
| 809 | * clock pointers. Returns 0 on success or -EINVAL on error. |
| 810 | */ |
| 811 | static int _init_opt_clks(struct omap_hwmod *oh) |
| 812 | { |
| 813 | struct omap_hwmod_opt_clk *oc; |
| 814 | struct clk *c; |
| 815 | int i; |
| 816 | int ret = 0; |
| 817 | |
| 818 | for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) { |
Rajendra Nayak | 6ea74cb | 2012-09-22 02:24:16 -0600 | [diff] [blame] | 819 | c = clk_get(NULL, oc->clk); |
| 820 | if (IS_ERR(c)) { |
Benoit Cousson | 20383d8 | 2010-05-20 12:31:09 -0600 | [diff] [blame] | 821 | pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n", |
| 822 | oh->name, oc->clk); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 823 | ret = -EINVAL; |
Benoit Cousson | dc75925 | 2010-06-23 18:15:12 -0600 | [diff] [blame] | 824 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 825 | oc->_clk = c; |
Rajendra Nayak | 4d7cb45 | 2012-09-22 02:24:16 -0600 | [diff] [blame] | 826 | /* |
| 827 | * HACK: This needs a re-visit once clk_prepare() is implemented |
| 828 | * to do something meaningful. Today its just a no-op. |
| 829 | * If clk_prepare() is used at some point to do things like |
| 830 | * voltage scaling etc, then this would have to be moved to |
| 831 | * some point where subsystems like i2c and pmic become |
| 832 | * available. |
| 833 | */ |
| 834 | clk_prepare(oc->_clk); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 835 | } |
| 836 | |
| 837 | return ret; |
| 838 | } |
| 839 | |
| 840 | /** |
| 841 | * _enable_clocks - enable hwmod main clock and interface clocks |
| 842 | * @oh: struct omap_hwmod * |
| 843 | * |
| 844 | * Enables all clocks necessary for register reads and writes to succeed |
| 845 | * on the hwmod @oh. Returns 0. |
| 846 | */ |
| 847 | static int _enable_clocks(struct omap_hwmod *oh) |
| 848 | { |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 849 | struct omap_hwmod_ocp_if *os; |
Paul Walmsley | 11cd4b9 | 2012-04-19 04:04:32 -0600 | [diff] [blame] | 850 | struct list_head *p; |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 851 | int i = 0; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 852 | |
| 853 | pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name); |
| 854 | |
Benoit Cousson | 4d3ae5a | 2010-05-20 12:31:09 -0600 | [diff] [blame] | 855 | if (oh->_clk) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 856 | clk_enable(oh->_clk); |
| 857 | |
Paul Walmsley | 11cd4b9 | 2012-04-19 04:04:32 -0600 | [diff] [blame] | 858 | p = oh->slave_ports.next; |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 859 | |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 860 | while (i < oh->slaves_cnt) { |
Paul Walmsley | 11cd4b9 | 2012-04-19 04:04:32 -0600 | [diff] [blame] | 861 | os = _fetch_next_ocp_if(&p, &i); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 862 | |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 863 | if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) |
| 864 | clk_enable(os->_clk); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 865 | } |
| 866 | |
| 867 | /* The opt clocks are controlled by the device driver. */ |
| 868 | |
| 869 | return 0; |
| 870 | } |
| 871 | |
| 872 | /** |
| 873 | * _disable_clocks - disable hwmod main clock and interface clocks |
| 874 | * @oh: struct omap_hwmod * |
| 875 | * |
| 876 | * Disables the hwmod @oh main functional and interface clocks. Returns 0. |
| 877 | */ |
| 878 | static int _disable_clocks(struct omap_hwmod *oh) |
| 879 | { |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 880 | struct omap_hwmod_ocp_if *os; |
Paul Walmsley | 11cd4b9 | 2012-04-19 04:04:32 -0600 | [diff] [blame] | 881 | struct list_head *p; |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 882 | int i = 0; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 883 | |
| 884 | pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name); |
| 885 | |
Benoit Cousson | 4d3ae5a | 2010-05-20 12:31:09 -0600 | [diff] [blame] | 886 | if (oh->_clk) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 887 | clk_disable(oh->_clk); |
| 888 | |
Paul Walmsley | 11cd4b9 | 2012-04-19 04:04:32 -0600 | [diff] [blame] | 889 | p = oh->slave_ports.next; |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 890 | |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 891 | while (i < oh->slaves_cnt) { |
Paul Walmsley | 11cd4b9 | 2012-04-19 04:04:32 -0600 | [diff] [blame] | 892 | os = _fetch_next_ocp_if(&p, &i); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 893 | |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 894 | if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) |
| 895 | clk_disable(os->_clk); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 896 | } |
| 897 | |
| 898 | /* The opt clocks are controlled by the device driver. */ |
| 899 | |
| 900 | return 0; |
| 901 | } |
| 902 | |
Benoit Cousson | 96835af | 2010-09-21 18:57:58 +0200 | [diff] [blame] | 903 | static void _enable_optional_clocks(struct omap_hwmod *oh) |
| 904 | { |
| 905 | struct omap_hwmod_opt_clk *oc; |
| 906 | int i; |
| 907 | |
| 908 | pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name); |
| 909 | |
| 910 | for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) |
| 911 | if (oc->_clk) { |
| 912 | pr_debug("omap_hwmod: enable %s:%s\n", oc->role, |
Rajendra Nayak | 5dcc3b9 | 2012-09-22 02:24:17 -0600 | [diff] [blame] | 913 | __clk_get_name(oc->_clk)); |
Benoit Cousson | 96835af | 2010-09-21 18:57:58 +0200 | [diff] [blame] | 914 | clk_enable(oc->_clk); |
| 915 | } |
| 916 | } |
| 917 | |
| 918 | static void _disable_optional_clocks(struct omap_hwmod *oh) |
| 919 | { |
| 920 | struct omap_hwmod_opt_clk *oc; |
| 921 | int i; |
| 922 | |
| 923 | pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name); |
| 924 | |
| 925 | for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) |
| 926 | if (oc->_clk) { |
| 927 | pr_debug("omap_hwmod: disable %s:%s\n", oc->role, |
Rajendra Nayak | 5dcc3b9 | 2012-09-22 02:24:17 -0600 | [diff] [blame] | 928 | __clk_get_name(oc->_clk)); |
Benoit Cousson | 96835af | 2010-09-21 18:57:58 +0200 | [diff] [blame] | 929 | clk_disable(oc->_clk); |
| 930 | } |
| 931 | } |
| 932 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 933 | /** |
Kevin Hilman | 3d9f032 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 934 | * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4 |
Benoit Cousson | 45c3825 | 2011-07-10 05:56:33 -0600 | [diff] [blame] | 935 | * @oh: struct omap_hwmod * |
| 936 | * |
| 937 | * Enables the PRCM module mode related to the hwmod @oh. |
| 938 | * No return value. |
| 939 | */ |
Kevin Hilman | 3d9f032 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 940 | static void _omap4_enable_module(struct omap_hwmod *oh) |
Benoit Cousson | 45c3825 | 2011-07-10 05:56:33 -0600 | [diff] [blame] | 941 | { |
Benoit Cousson | 45c3825 | 2011-07-10 05:56:33 -0600 | [diff] [blame] | 942 | if (!oh->clkdm || !oh->prcm.omap4.modulemode) |
| 943 | return; |
| 944 | |
Kevin Hilman | 3d9f032 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 945 | pr_debug("omap_hwmod: %s: %s: %d\n", |
| 946 | oh->name, __func__, oh->prcm.omap4.modulemode); |
Benoit Cousson | 45c3825 | 2011-07-10 05:56:33 -0600 | [diff] [blame] | 947 | |
| 948 | omap4_cminst_module_enable(oh->prcm.omap4.modulemode, |
| 949 | oh->clkdm->prcm_partition, |
| 950 | oh->clkdm->cm_inst, |
| 951 | oh->clkdm->clkdm_offs, |
| 952 | oh->prcm.omap4.clkctrl_offs); |
| 953 | } |
| 954 | |
| 955 | /** |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 956 | * _am33xx_enable_module - enable CLKCTRL modulemode on AM33XX |
| 957 | * @oh: struct omap_hwmod * |
| 958 | * |
| 959 | * Enables the PRCM module mode related to the hwmod @oh. |
| 960 | * No return value. |
| 961 | */ |
| 962 | static void _am33xx_enable_module(struct omap_hwmod *oh) |
| 963 | { |
| 964 | if (!oh->clkdm || !oh->prcm.omap4.modulemode) |
| 965 | return; |
| 966 | |
| 967 | pr_debug("omap_hwmod: %s: %s: %d\n", |
| 968 | oh->name, __func__, oh->prcm.omap4.modulemode); |
| 969 | |
| 970 | am33xx_cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->cm_inst, |
| 971 | oh->clkdm->clkdm_offs, |
| 972 | oh->prcm.omap4.clkctrl_offs); |
| 973 | } |
| 974 | |
| 975 | /** |
Benoit Cousson | bfc141e | 2011-12-16 16:09:11 -0800 | [diff] [blame] | 976 | * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4 |
| 977 | * @oh: struct omap_hwmod * |
| 978 | * |
| 979 | * Wait for a module @oh to enter slave idle. Returns 0 if the module |
| 980 | * does not have an IDLEST bit or if the module successfully enters |
| 981 | * slave idle; otherwise, pass along the return value of the |
| 982 | * appropriate *_cm*_wait_module_idle() function. |
| 983 | */ |
| 984 | static int _omap4_wait_target_disable(struct omap_hwmod *oh) |
| 985 | { |
Paul Walmsley | 2b026d1 | 2012-09-23 17:28:18 -0600 | [diff] [blame] | 986 | if (!oh) |
Benoit Cousson | bfc141e | 2011-12-16 16:09:11 -0800 | [diff] [blame] | 987 | return -EINVAL; |
| 988 | |
Paul Walmsley | 2b026d1 | 2012-09-23 17:28:18 -0600 | [diff] [blame] | 989 | if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm) |
Benoit Cousson | bfc141e | 2011-12-16 16:09:11 -0800 | [diff] [blame] | 990 | return 0; |
| 991 | |
| 992 | if (oh->flags & HWMOD_NO_IDLEST) |
| 993 | return 0; |
| 994 | |
| 995 | return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition, |
| 996 | oh->clkdm->cm_inst, |
| 997 | oh->clkdm->clkdm_offs, |
| 998 | oh->prcm.omap4.clkctrl_offs); |
| 999 | } |
| 1000 | |
| 1001 | /** |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 1002 | * _am33xx_wait_target_disable - wait for a module to be disabled on AM33XX |
| 1003 | * @oh: struct omap_hwmod * |
| 1004 | * |
| 1005 | * Wait for a module @oh to enter slave idle. Returns 0 if the module |
| 1006 | * does not have an IDLEST bit or if the module successfully enters |
| 1007 | * slave idle; otherwise, pass along the return value of the |
| 1008 | * appropriate *_cm*_wait_module_idle() function. |
| 1009 | */ |
| 1010 | static int _am33xx_wait_target_disable(struct omap_hwmod *oh) |
| 1011 | { |
| 1012 | if (!oh) |
| 1013 | return -EINVAL; |
| 1014 | |
| 1015 | if (oh->_int_flags & _HWMOD_NO_MPU_PORT) |
| 1016 | return 0; |
| 1017 | |
| 1018 | if (oh->flags & HWMOD_NO_IDLEST) |
| 1019 | return 0; |
| 1020 | |
| 1021 | return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst, |
| 1022 | oh->clkdm->clkdm_offs, |
| 1023 | oh->prcm.omap4.clkctrl_offs); |
| 1024 | } |
| 1025 | |
| 1026 | /** |
Paul Walmsley | 212738a | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 1027 | * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh |
| 1028 | * @oh: struct omap_hwmod *oh |
| 1029 | * |
| 1030 | * Count and return the number of MPU IRQs associated with the hwmod |
| 1031 | * @oh. Used to allocate struct resource data. Returns 0 if @oh is |
| 1032 | * NULL. |
| 1033 | */ |
| 1034 | static int _count_mpu_irqs(struct omap_hwmod *oh) |
| 1035 | { |
| 1036 | struct omap_hwmod_irq_info *ohii; |
| 1037 | int i = 0; |
| 1038 | |
| 1039 | if (!oh || !oh->mpu_irqs) |
| 1040 | return 0; |
| 1041 | |
| 1042 | do { |
| 1043 | ohii = &oh->mpu_irqs[i++]; |
| 1044 | } while (ohii->irq != -1); |
| 1045 | |
sricharan | cc1b076 | 2011-11-23 14:35:07 -0800 | [diff] [blame] | 1046 | return i-1; |
Paul Walmsley | 212738a | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 1047 | } |
| 1048 | |
| 1049 | /** |
Paul Walmsley | bc61495 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 1050 | * _count_sdma_reqs - count the number of SDMA request lines associated with @oh |
| 1051 | * @oh: struct omap_hwmod *oh |
| 1052 | * |
| 1053 | * Count and return the number of SDMA request lines associated with |
| 1054 | * the hwmod @oh. Used to allocate struct resource data. Returns 0 |
| 1055 | * if @oh is NULL. |
| 1056 | */ |
| 1057 | static int _count_sdma_reqs(struct omap_hwmod *oh) |
| 1058 | { |
| 1059 | struct omap_hwmod_dma_info *ohdi; |
| 1060 | int i = 0; |
| 1061 | |
| 1062 | if (!oh || !oh->sdma_reqs) |
| 1063 | return 0; |
| 1064 | |
| 1065 | do { |
| 1066 | ohdi = &oh->sdma_reqs[i++]; |
| 1067 | } while (ohdi->dma_req != -1); |
| 1068 | |
sricharan | cc1b076 | 2011-11-23 14:35:07 -0800 | [diff] [blame] | 1069 | return i-1; |
Paul Walmsley | bc61495 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 1070 | } |
| 1071 | |
| 1072 | /** |
Paul Walmsley | 78183f3 | 2011-07-09 19:14:05 -0600 | [diff] [blame] | 1073 | * _count_ocp_if_addr_spaces - count the number of address space entries for @oh |
| 1074 | * @oh: struct omap_hwmod *oh |
| 1075 | * |
| 1076 | * Count and return the number of address space ranges associated with |
| 1077 | * the hwmod @oh. Used to allocate struct resource data. Returns 0 |
| 1078 | * if @oh is NULL. |
| 1079 | */ |
| 1080 | static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os) |
| 1081 | { |
| 1082 | struct omap_hwmod_addr_space *mem; |
| 1083 | int i = 0; |
| 1084 | |
| 1085 | if (!os || !os->addr) |
| 1086 | return 0; |
| 1087 | |
| 1088 | do { |
| 1089 | mem = &os->addr[i++]; |
| 1090 | } while (mem->pa_start != mem->pa_end); |
| 1091 | |
sricharan | cc1b076 | 2011-11-23 14:35:07 -0800 | [diff] [blame] | 1092 | return i-1; |
Paul Walmsley | 78183f3 | 2011-07-09 19:14:05 -0600 | [diff] [blame] | 1093 | } |
| 1094 | |
| 1095 | /** |
Paul Walmsley | 5e8370f | 2012-04-18 19:10:06 -0600 | [diff] [blame] | 1096 | * _get_mpu_irq_by_name - fetch MPU interrupt line number by name |
| 1097 | * @oh: struct omap_hwmod * to operate on |
| 1098 | * @name: pointer to the name of the MPU interrupt number to fetch (optional) |
| 1099 | * @irq: pointer to an unsigned int to store the MPU IRQ number to |
| 1100 | * |
| 1101 | * Retrieve a MPU hardware IRQ line number named by @name associated |
| 1102 | * with the IP block pointed to by @oh. The IRQ number will be filled |
| 1103 | * into the address pointed to by @dma. When @name is non-null, the |
| 1104 | * IRQ line number associated with the named entry will be returned. |
| 1105 | * If @name is null, the first matching entry will be returned. Data |
| 1106 | * order is not meaningful in hwmod data, so callers are strongly |
| 1107 | * encouraged to use a non-null @name whenever possible to avoid |
| 1108 | * unpredictable effects if hwmod data is later added that causes data |
| 1109 | * ordering to change. Returns 0 upon success or a negative error |
| 1110 | * code upon error. |
| 1111 | */ |
| 1112 | static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name, |
| 1113 | unsigned int *irq) |
| 1114 | { |
| 1115 | int i; |
| 1116 | bool found = false; |
| 1117 | |
| 1118 | if (!oh->mpu_irqs) |
| 1119 | return -ENOENT; |
| 1120 | |
| 1121 | i = 0; |
| 1122 | while (oh->mpu_irqs[i].irq != -1) { |
| 1123 | if (name == oh->mpu_irqs[i].name || |
| 1124 | !strcmp(name, oh->mpu_irqs[i].name)) { |
| 1125 | found = true; |
| 1126 | break; |
| 1127 | } |
| 1128 | i++; |
| 1129 | } |
| 1130 | |
| 1131 | if (!found) |
| 1132 | return -ENOENT; |
| 1133 | |
| 1134 | *irq = oh->mpu_irqs[i].irq; |
| 1135 | |
| 1136 | return 0; |
| 1137 | } |
| 1138 | |
| 1139 | /** |
| 1140 | * _get_sdma_req_by_name - fetch SDMA request line ID by name |
| 1141 | * @oh: struct omap_hwmod * to operate on |
| 1142 | * @name: pointer to the name of the SDMA request line to fetch (optional) |
| 1143 | * @dma: pointer to an unsigned int to store the request line ID to |
| 1144 | * |
| 1145 | * Retrieve an SDMA request line ID named by @name on the IP block |
| 1146 | * pointed to by @oh. The ID will be filled into the address pointed |
| 1147 | * to by @dma. When @name is non-null, the request line ID associated |
| 1148 | * with the named entry will be returned. If @name is null, the first |
| 1149 | * matching entry will be returned. Data order is not meaningful in |
| 1150 | * hwmod data, so callers are strongly encouraged to use a non-null |
| 1151 | * @name whenever possible to avoid unpredictable effects if hwmod |
| 1152 | * data is later added that causes data ordering to change. Returns 0 |
| 1153 | * upon success or a negative error code upon error. |
| 1154 | */ |
| 1155 | static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name, |
| 1156 | unsigned int *dma) |
| 1157 | { |
| 1158 | int i; |
| 1159 | bool found = false; |
| 1160 | |
| 1161 | if (!oh->sdma_reqs) |
| 1162 | return -ENOENT; |
| 1163 | |
| 1164 | i = 0; |
| 1165 | while (oh->sdma_reqs[i].dma_req != -1) { |
| 1166 | if (name == oh->sdma_reqs[i].name || |
| 1167 | !strcmp(name, oh->sdma_reqs[i].name)) { |
| 1168 | found = true; |
| 1169 | break; |
| 1170 | } |
| 1171 | i++; |
| 1172 | } |
| 1173 | |
| 1174 | if (!found) |
| 1175 | return -ENOENT; |
| 1176 | |
| 1177 | *dma = oh->sdma_reqs[i].dma_req; |
| 1178 | |
| 1179 | return 0; |
| 1180 | } |
| 1181 | |
| 1182 | /** |
| 1183 | * _get_addr_space_by_name - fetch address space start & end by name |
| 1184 | * @oh: struct omap_hwmod * to operate on |
| 1185 | * @name: pointer to the name of the address space to fetch (optional) |
| 1186 | * @pa_start: pointer to a u32 to store the starting address to |
| 1187 | * @pa_end: pointer to a u32 to store the ending address to |
| 1188 | * |
| 1189 | * Retrieve address space start and end addresses for the IP block |
| 1190 | * pointed to by @oh. The data will be filled into the addresses |
| 1191 | * pointed to by @pa_start and @pa_end. When @name is non-null, the |
| 1192 | * address space data associated with the named entry will be |
| 1193 | * returned. If @name is null, the first matching entry will be |
| 1194 | * returned. Data order is not meaningful in hwmod data, so callers |
| 1195 | * are strongly encouraged to use a non-null @name whenever possible |
| 1196 | * to avoid unpredictable effects if hwmod data is later added that |
| 1197 | * causes data ordering to change. Returns 0 upon success or a |
| 1198 | * negative error code upon error. |
| 1199 | */ |
| 1200 | static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name, |
| 1201 | u32 *pa_start, u32 *pa_end) |
| 1202 | { |
| 1203 | int i, j; |
| 1204 | struct omap_hwmod_ocp_if *os; |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 1205 | struct list_head *p = NULL; |
Paul Walmsley | 5e8370f | 2012-04-18 19:10:06 -0600 | [diff] [blame] | 1206 | bool found = false; |
| 1207 | |
Paul Walmsley | 11cd4b9 | 2012-04-19 04:04:32 -0600 | [diff] [blame] | 1208 | p = oh->slave_ports.next; |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 1209 | |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 1210 | i = 0; |
| 1211 | while (i < oh->slaves_cnt) { |
Paul Walmsley | 11cd4b9 | 2012-04-19 04:04:32 -0600 | [diff] [blame] | 1212 | os = _fetch_next_ocp_if(&p, &i); |
Paul Walmsley | 5e8370f | 2012-04-18 19:10:06 -0600 | [diff] [blame] | 1213 | |
| 1214 | if (!os->addr) |
| 1215 | return -ENOENT; |
| 1216 | |
| 1217 | j = 0; |
| 1218 | while (os->addr[j].pa_start != os->addr[j].pa_end) { |
| 1219 | if (name == os->addr[j].name || |
| 1220 | !strcmp(name, os->addr[j].name)) { |
| 1221 | found = true; |
| 1222 | break; |
| 1223 | } |
| 1224 | j++; |
| 1225 | } |
| 1226 | |
| 1227 | if (found) |
| 1228 | break; |
| 1229 | } |
| 1230 | |
| 1231 | if (!found) |
| 1232 | return -ENOENT; |
| 1233 | |
| 1234 | *pa_start = os->addr[j].pa_start; |
| 1235 | *pa_end = os->addr[j].pa_end; |
| 1236 | |
| 1237 | return 0; |
| 1238 | } |
| 1239 | |
| 1240 | /** |
Paul Walmsley | 24dbc21 | 2012-04-19 04:04:29 -0600 | [diff] [blame] | 1241 | * _save_mpu_port_index - find and save the index to @oh's MPU port |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1242 | * @oh: struct omap_hwmod * |
| 1243 | * |
Paul Walmsley | 24dbc21 | 2012-04-19 04:04:29 -0600 | [diff] [blame] | 1244 | * Determines the array index of the OCP slave port that the MPU uses |
| 1245 | * to address the device, and saves it into the struct omap_hwmod. |
| 1246 | * Intended to be called during hwmod registration only. No return |
| 1247 | * value. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1248 | */ |
Paul Walmsley | 24dbc21 | 2012-04-19 04:04:29 -0600 | [diff] [blame] | 1249 | static void __init _save_mpu_port_index(struct omap_hwmod *oh) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1250 | { |
Paul Walmsley | 24dbc21 | 2012-04-19 04:04:29 -0600 | [diff] [blame] | 1251 | struct omap_hwmod_ocp_if *os = NULL; |
Paul Walmsley | 11cd4b9 | 2012-04-19 04:04:32 -0600 | [diff] [blame] | 1252 | struct list_head *p; |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 1253 | int i = 0; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1254 | |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 1255 | if (!oh) |
Paul Walmsley | 24dbc21 | 2012-04-19 04:04:29 -0600 | [diff] [blame] | 1256 | return; |
| 1257 | |
| 1258 | oh->_int_flags |= _HWMOD_NO_MPU_PORT; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1259 | |
Paul Walmsley | 11cd4b9 | 2012-04-19 04:04:32 -0600 | [diff] [blame] | 1260 | p = oh->slave_ports.next; |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 1261 | |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 1262 | while (i < oh->slaves_cnt) { |
Paul Walmsley | 11cd4b9 | 2012-04-19 04:04:32 -0600 | [diff] [blame] | 1263 | os = _fetch_next_ocp_if(&p, &i); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1264 | if (os->user & OCP_USER_MPU) { |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 1265 | oh->_mpu_port = os; |
Paul Walmsley | 24dbc21 | 2012-04-19 04:04:29 -0600 | [diff] [blame] | 1266 | oh->_int_flags &= ~_HWMOD_NO_MPU_PORT; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1267 | break; |
| 1268 | } |
| 1269 | } |
| 1270 | |
Paul Walmsley | 24dbc21 | 2012-04-19 04:04:29 -0600 | [diff] [blame] | 1271 | return; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1272 | } |
| 1273 | |
| 1274 | /** |
Paul Walmsley | 2d6141b | 2012-04-19 04:04:27 -0600 | [diff] [blame] | 1275 | * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU |
| 1276 | * @oh: struct omap_hwmod * |
| 1277 | * |
| 1278 | * Given a pointer to a struct omap_hwmod record @oh, return a pointer |
| 1279 | * to the struct omap_hwmod_ocp_if record that is used by the MPU to |
| 1280 | * communicate with the IP block. This interface need not be directly |
| 1281 | * connected to the MPU (and almost certainly is not), but is directly |
| 1282 | * connected to the IP block represented by @oh. Returns a pointer |
| 1283 | * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon |
| 1284 | * error or if there does not appear to be a path from the MPU to this |
| 1285 | * IP block. |
| 1286 | */ |
| 1287 | static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh) |
| 1288 | { |
| 1289 | if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0) |
| 1290 | return NULL; |
| 1291 | |
Paul Walmsley | 11cd4b9 | 2012-04-19 04:04:32 -0600 | [diff] [blame] | 1292 | return oh->_mpu_port; |
Paul Walmsley | 2d6141b | 2012-04-19 04:04:27 -0600 | [diff] [blame] | 1293 | }; |
| 1294 | |
| 1295 | /** |
Paul Walmsley | c9aafd2 | 2012-04-18 19:10:05 -0600 | [diff] [blame] | 1296 | * _find_mpu_rt_addr_space - return MPU register target address space for @oh |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1297 | * @oh: struct omap_hwmod * |
| 1298 | * |
Paul Walmsley | c9aafd2 | 2012-04-18 19:10:05 -0600 | [diff] [blame] | 1299 | * Returns a pointer to the struct omap_hwmod_addr_space record representing |
| 1300 | * the register target MPU address space; or returns NULL upon error. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1301 | */ |
Paul Walmsley | c9aafd2 | 2012-04-18 19:10:05 -0600 | [diff] [blame] | 1302 | static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1303 | { |
| 1304 | struct omap_hwmod_ocp_if *os; |
| 1305 | struct omap_hwmod_addr_space *mem; |
Paul Walmsley | c9aafd2 | 2012-04-18 19:10:05 -0600 | [diff] [blame] | 1306 | int found = 0, i = 0; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1307 | |
Paul Walmsley | 2d6141b | 2012-04-19 04:04:27 -0600 | [diff] [blame] | 1308 | os = _find_mpu_rt_port(oh); |
Paul Walmsley | 24dbc21 | 2012-04-19 04:04:29 -0600 | [diff] [blame] | 1309 | if (!os || !os->addr) |
Paul Walmsley | 78183f3 | 2011-07-09 19:14:05 -0600 | [diff] [blame] | 1310 | return NULL; |
| 1311 | |
| 1312 | do { |
| 1313 | mem = &os->addr[i++]; |
| 1314 | if (mem->flags & ADDR_TYPE_RT) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1315 | found = 1; |
Paul Walmsley | 78183f3 | 2011-07-09 19:14:05 -0600 | [diff] [blame] | 1316 | } while (!found && mem->pa_start != mem->pa_end); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1317 | |
Paul Walmsley | c9aafd2 | 2012-04-18 19:10:05 -0600 | [diff] [blame] | 1318 | return (found) ? mem : NULL; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1319 | } |
| 1320 | |
| 1321 | /** |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 1322 | * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1323 | * @oh: struct omap_hwmod * |
| 1324 | * |
Paul Walmsley | 006c7f1 | 2012-07-04 05:22:53 -0600 | [diff] [blame] | 1325 | * Ensure that the OCP_SYSCONFIG register for the IP block represented |
| 1326 | * by @oh is set to indicate to the PRCM that the IP block is active. |
| 1327 | * Usually this means placing the module into smart-idle mode and |
| 1328 | * smart-standby, but if there is a bug in the automatic idle handling |
| 1329 | * for the IP block, it may need to be placed into the force-idle or |
| 1330 | * no-idle variants of these modes. No return value. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1331 | */ |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 1332 | static void _enable_sysc(struct omap_hwmod *oh) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1333 | { |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1334 | u8 idlemode, sf; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1335 | u32 v; |
Paul Walmsley | 006c7f1 | 2012-07-04 05:22:53 -0600 | [diff] [blame] | 1336 | bool clkdm_act; |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 1337 | struct clockdomain *clkdm; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1338 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1339 | if (!oh->class->sysc) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1340 | return; |
| 1341 | |
Tero Kristo | 613ad0e | 2012-10-29 22:02:13 -0600 | [diff] [blame] | 1342 | /* |
| 1343 | * Wait until reset has completed, this is needed as the IP |
| 1344 | * block is reset automatically by hardware in some cases |
| 1345 | * (off-mode for example), and the drivers require the |
| 1346 | * IP to be ready when they access it |
| 1347 | */ |
| 1348 | if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) |
| 1349 | _enable_optional_clocks(oh); |
| 1350 | _wait_softreset_complete(oh); |
| 1351 | if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) |
| 1352 | _disable_optional_clocks(oh); |
| 1353 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1354 | v = oh->_sysc_cache; |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1355 | sf = oh->class->sysc->sysc_flags; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1356 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 1357 | clkdm = _get_clkdm(oh); |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1358 | if (sf & SYSC_HAS_SIDLEMODE) { |
Rajendra Nayak | ca43ea3 | 2013-05-15 20:18:38 +0530 | [diff] [blame] | 1359 | if (oh->flags & HWMOD_SWSUP_SIDLE || |
| 1360 | oh->flags & HWMOD_SWSUP_SIDLE_ACT) { |
Rajendra Nayak | 3551317 | 2013-05-15 20:18:37 +0530 | [diff] [blame] | 1361 | idlemode = HWMOD_IDLEMODE_NO; |
| 1362 | } else { |
| 1363 | if (sf & SYSC_HAS_ENAWAKEUP) |
| 1364 | _enable_wakeup(oh, &v); |
| 1365 | if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) |
| 1366 | idlemode = HWMOD_IDLEMODE_SMART_WKUP; |
| 1367 | else |
| 1368 | idlemode = HWMOD_IDLEMODE_SMART; |
| 1369 | } |
| 1370 | |
| 1371 | /* |
| 1372 | * This is special handling for some IPs like |
| 1373 | * 32k sync timer. Force them to idle! |
| 1374 | */ |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 1375 | clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU); |
Paul Walmsley | 006c7f1 | 2012-07-04 05:22:53 -0600 | [diff] [blame] | 1376 | if (clkdm_act && !(oh->class->sysc->idlemodes & |
| 1377 | (SIDLE_SMART | SIDLE_SMART_WKUP))) |
| 1378 | idlemode = HWMOD_IDLEMODE_FORCE; |
Rajendra Nayak | 3551317 | 2013-05-15 20:18:37 +0530 | [diff] [blame] | 1379 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1380 | _set_slave_idlemode(oh, idlemode, &v); |
| 1381 | } |
| 1382 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1383 | if (sf & SYSC_HAS_MIDLEMODE) { |
Grazvydas Ignotas | 092bc08 | 2013-03-11 21:49:00 +0200 | [diff] [blame] | 1384 | if (oh->flags & HWMOD_FORCE_MSTANDBY) { |
| 1385 | idlemode = HWMOD_IDLEMODE_FORCE; |
| 1386 | } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) { |
Benoit Cousson | 724019b | 2011-07-01 22:54:00 +0200 | [diff] [blame] | 1387 | idlemode = HWMOD_IDLEMODE_NO; |
| 1388 | } else { |
| 1389 | if (sf & SYSC_HAS_ENAWAKEUP) |
| 1390 | _enable_wakeup(oh, &v); |
| 1391 | if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) |
| 1392 | idlemode = HWMOD_IDLEMODE_SMART_WKUP; |
| 1393 | else |
| 1394 | idlemode = HWMOD_IDLEMODE_SMART; |
| 1395 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1396 | _set_master_standbymode(oh, idlemode, &v); |
| 1397 | } |
| 1398 | |
Paul Walmsley | a16b1f7 | 2009-12-08 16:34:17 -0700 | [diff] [blame] | 1399 | /* |
| 1400 | * XXX The clock framework should handle this, by |
| 1401 | * calling into this code. But this must wait until the |
| 1402 | * clock structures are tagged with omap_hwmod entries |
| 1403 | */ |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1404 | if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) && |
| 1405 | (sf & SYSC_HAS_CLOCKACTIVITY)) |
| 1406 | _set_clockactivity(oh, oh->class->sysc->clockact, &v); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1407 | |
Kevin Hilman | 5a7ddcb | 2010-12-21 21:08:34 -0700 | [diff] [blame] | 1408 | _write_sysconfig(v, oh); |
Hema HK | 78f26e8 | 2010-09-24 10:23:19 -0600 | [diff] [blame] | 1409 | |
| 1410 | /* |
| 1411 | * Set the autoidle bit only after setting the smartidle bit |
| 1412 | * Setting this will not have any impact on the other modules. |
| 1413 | */ |
| 1414 | if (sf & SYSC_HAS_AUTOIDLE) { |
| 1415 | idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ? |
| 1416 | 0 : 1; |
| 1417 | _set_module_autoidle(oh, idlemode, &v); |
| 1418 | _write_sysconfig(v, oh); |
| 1419 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1420 | } |
| 1421 | |
| 1422 | /** |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 1423 | * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1424 | * @oh: struct omap_hwmod * |
| 1425 | * |
| 1426 | * If module is marked as SWSUP_SIDLE, force the module into slave |
| 1427 | * idle; otherwise, configure it for smart-idle. If module is marked |
| 1428 | * as SWSUP_MSUSPEND, force the module into master standby; otherwise, |
| 1429 | * configure it for smart-standby. No return value. |
| 1430 | */ |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 1431 | static void _idle_sysc(struct omap_hwmod *oh) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1432 | { |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1433 | u8 idlemode, sf; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1434 | u32 v; |
| 1435 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1436 | if (!oh->class->sysc) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1437 | return; |
| 1438 | |
| 1439 | v = oh->_sysc_cache; |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1440 | sf = oh->class->sysc->sysc_flags; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1441 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1442 | if (sf & SYSC_HAS_SIDLEMODE) { |
Rajendra Nayak | 3551317 | 2013-05-15 20:18:37 +0530 | [diff] [blame] | 1443 | if (oh->flags & HWMOD_SWSUP_SIDLE) { |
Paul Walmsley | 006c7f1 | 2012-07-04 05:22:53 -0600 | [diff] [blame] | 1444 | idlemode = HWMOD_IDLEMODE_FORCE; |
Rajendra Nayak | 3551317 | 2013-05-15 20:18:37 +0530 | [diff] [blame] | 1445 | } else { |
| 1446 | if (sf & SYSC_HAS_ENAWAKEUP) |
| 1447 | _enable_wakeup(oh, &v); |
| 1448 | if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) |
| 1449 | idlemode = HWMOD_IDLEMODE_SMART_WKUP; |
| 1450 | else |
| 1451 | idlemode = HWMOD_IDLEMODE_SMART; |
| 1452 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1453 | _set_slave_idlemode(oh, idlemode, &v); |
| 1454 | } |
| 1455 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1456 | if (sf & SYSC_HAS_MIDLEMODE) { |
Grazvydas Ignotas | 092bc08 | 2013-03-11 21:49:00 +0200 | [diff] [blame] | 1457 | if ((oh->flags & HWMOD_SWSUP_MSTANDBY) || |
| 1458 | (oh->flags & HWMOD_FORCE_MSTANDBY)) { |
Benoit Cousson | 724019b | 2011-07-01 22:54:00 +0200 | [diff] [blame] | 1459 | idlemode = HWMOD_IDLEMODE_FORCE; |
| 1460 | } else { |
| 1461 | if (sf & SYSC_HAS_ENAWAKEUP) |
| 1462 | _enable_wakeup(oh, &v); |
| 1463 | if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) |
| 1464 | idlemode = HWMOD_IDLEMODE_SMART_WKUP; |
| 1465 | else |
| 1466 | idlemode = HWMOD_IDLEMODE_SMART; |
| 1467 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1468 | _set_master_standbymode(oh, idlemode, &v); |
| 1469 | } |
| 1470 | |
| 1471 | _write_sysconfig(v, oh); |
| 1472 | } |
| 1473 | |
| 1474 | /** |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 1475 | * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1476 | * @oh: struct omap_hwmod * |
| 1477 | * |
| 1478 | * Force the module into slave idle and master suspend. No return |
| 1479 | * value. |
| 1480 | */ |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 1481 | static void _shutdown_sysc(struct omap_hwmod *oh) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1482 | { |
| 1483 | u32 v; |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1484 | u8 sf; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1485 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1486 | if (!oh->class->sysc) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1487 | return; |
| 1488 | |
| 1489 | v = oh->_sysc_cache; |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1490 | sf = oh->class->sysc->sysc_flags; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1491 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1492 | if (sf & SYSC_HAS_SIDLEMODE) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1493 | _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v); |
| 1494 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1495 | if (sf & SYSC_HAS_MIDLEMODE) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1496 | _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v); |
| 1497 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1498 | if (sf & SYSC_HAS_AUTOIDLE) |
Paul Walmsley | 726072e | 2009-12-08 16:34:15 -0700 | [diff] [blame] | 1499 | _set_module_autoidle(oh, 1, &v); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1500 | |
| 1501 | _write_sysconfig(v, oh); |
| 1502 | } |
| 1503 | |
| 1504 | /** |
| 1505 | * _lookup - find an omap_hwmod by name |
| 1506 | * @name: find an omap_hwmod by name |
| 1507 | * |
| 1508 | * Return a pointer to an omap_hwmod by name, or NULL if not found. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1509 | */ |
| 1510 | static struct omap_hwmod *_lookup(const char *name) |
| 1511 | { |
| 1512 | struct omap_hwmod *oh, *temp_oh; |
| 1513 | |
| 1514 | oh = NULL; |
| 1515 | |
| 1516 | list_for_each_entry(temp_oh, &omap_hwmod_list, node) { |
| 1517 | if (!strcmp(name, temp_oh->name)) { |
| 1518 | oh = temp_oh; |
| 1519 | break; |
| 1520 | } |
| 1521 | } |
| 1522 | |
| 1523 | return oh; |
| 1524 | } |
Paul Walmsley | 868c157 | 2012-06-19 15:01:02 -0600 | [diff] [blame] | 1525 | |
Benoit Cousson | 6ae7699 | 2011-07-10 05:56:30 -0600 | [diff] [blame] | 1526 | /** |
| 1527 | * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod |
| 1528 | * @oh: struct omap_hwmod * |
| 1529 | * |
| 1530 | * Convert a clockdomain name stored in a struct omap_hwmod into a |
| 1531 | * clockdomain pointer, and save it into the struct omap_hwmod. |
Paul Walmsley | 868c157 | 2012-06-19 15:01:02 -0600 | [diff] [blame] | 1532 | * Return -EINVAL if the clkdm_name lookup failed. |
Benoit Cousson | 6ae7699 | 2011-07-10 05:56:30 -0600 | [diff] [blame] | 1533 | */ |
| 1534 | static int _init_clkdm(struct omap_hwmod *oh) |
| 1535 | { |
Paul Walmsley | 3bb05db | 2012-09-23 17:28:18 -0600 | [diff] [blame] | 1536 | if (!oh->clkdm_name) { |
| 1537 | pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name); |
Benoit Cousson | 6ae7699 | 2011-07-10 05:56:30 -0600 | [diff] [blame] | 1538 | return 0; |
Paul Walmsley | 3bb05db | 2012-09-23 17:28:18 -0600 | [diff] [blame] | 1539 | } |
Benoit Cousson | 6ae7699 | 2011-07-10 05:56:30 -0600 | [diff] [blame] | 1540 | |
Benoit Cousson | 6ae7699 | 2011-07-10 05:56:30 -0600 | [diff] [blame] | 1541 | oh->clkdm = clkdm_lookup(oh->clkdm_name); |
| 1542 | if (!oh->clkdm) { |
| 1543 | pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n", |
| 1544 | oh->name, oh->clkdm_name); |
| 1545 | return -EINVAL; |
| 1546 | } |
| 1547 | |
| 1548 | pr_debug("omap_hwmod: %s: associated to clkdm %s\n", |
| 1549 | oh->name, oh->clkdm_name); |
| 1550 | |
| 1551 | return 0; |
| 1552 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1553 | |
| 1554 | /** |
Benoit Cousson | 6ae7699 | 2011-07-10 05:56:30 -0600 | [diff] [blame] | 1555 | * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as |
| 1556 | * well the clockdomain. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1557 | * @oh: struct omap_hwmod * |
Paul Walmsley | 97d6016 | 2010-07-26 16:34:30 -0600 | [diff] [blame] | 1558 | * @data: not used; pass NULL |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1559 | * |
Paul Walmsley | a2debdb | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 1560 | * Called by omap_hwmod_setup_*() (after omap2_clk_init()). |
Paul Walmsley | 48d54f3 | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 1561 | * Resolves all clock names embedded in the hwmod. Returns 0 on |
| 1562 | * success, or a negative error code on failure. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1563 | */ |
Paul Walmsley | 97d6016 | 2010-07-26 16:34:30 -0600 | [diff] [blame] | 1564 | static int _init_clocks(struct omap_hwmod *oh, void *data) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1565 | { |
| 1566 | int ret = 0; |
| 1567 | |
Paul Walmsley | 48d54f3 | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 1568 | if (oh->_state != _HWMOD_STATE_REGISTERED) |
| 1569 | return 0; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1570 | |
| 1571 | pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name); |
| 1572 | |
Vaibhav Hiremath | b797be1 | 2012-07-09 18:24:30 +0530 | [diff] [blame] | 1573 | if (soc_ops.init_clkdm) |
| 1574 | ret |= soc_ops.init_clkdm(oh); |
| 1575 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1576 | ret |= _init_main_clk(oh); |
| 1577 | ret |= _init_interface_clks(oh); |
| 1578 | ret |= _init_opt_clks(oh); |
| 1579 | |
Benoit Cousson | f5c1f84 | 2010-05-20 12:31:10 -0600 | [diff] [blame] | 1580 | if (!ret) |
| 1581 | oh->_state = _HWMOD_STATE_CLKS_INITED; |
Benoit Cousson | 6652271 | 2011-07-01 22:54:06 +0200 | [diff] [blame] | 1582 | else |
| 1583 | pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1584 | |
Rajendra Nayak | 09c35f2 | 2011-02-16 12:11:24 +0000 | [diff] [blame] | 1585 | return ret; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1586 | } |
| 1587 | |
| 1588 | /** |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1589 | * _lookup_hardreset - fill register bit info for this hwmod/reset line |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1590 | * @oh: struct omap_hwmod * |
| 1591 | * @name: name of the reset line in the context of this hwmod |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1592 | * @ohri: struct omap_hwmod_rst_info * that this function will fill in |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1593 | * |
| 1594 | * Return the bit position of the reset line that match the |
| 1595 | * input name. Return -ENOENT if not found. |
| 1596 | */ |
Paul Walmsley | a032d33 | 2012-08-03 09:21:10 -0600 | [diff] [blame] | 1597 | static int _lookup_hardreset(struct omap_hwmod *oh, const char *name, |
| 1598 | struct omap_hwmod_rst_info *ohri) |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1599 | { |
| 1600 | int i; |
| 1601 | |
| 1602 | for (i = 0; i < oh->rst_lines_cnt; i++) { |
| 1603 | const char *rst_line = oh->rst_lines[i].name; |
| 1604 | if (!strcmp(rst_line, name)) { |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1605 | ohri->rst_shift = oh->rst_lines[i].rst_shift; |
| 1606 | ohri->st_shift = oh->rst_lines[i].st_shift; |
| 1607 | pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n", |
| 1608 | oh->name, __func__, rst_line, ohri->rst_shift, |
| 1609 | ohri->st_shift); |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1610 | |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1611 | return 0; |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1612 | } |
| 1613 | } |
| 1614 | |
| 1615 | return -ENOENT; |
| 1616 | } |
| 1617 | |
| 1618 | /** |
| 1619 | * _assert_hardreset - assert the HW reset line of submodules |
| 1620 | * contained in the hwmod module. |
| 1621 | * @oh: struct omap_hwmod * |
| 1622 | * @name: name of the reset line to lookup and assert |
| 1623 | * |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1624 | * Some IP like dsp, ipu or iva contain processor that require an HW |
| 1625 | * reset line to be assert / deassert in order to enable fully the IP. |
| 1626 | * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of |
| 1627 | * asserting the hardreset line on the currently-booted SoC, or passes |
| 1628 | * along the return value from _lookup_hardreset() or the SoC's |
| 1629 | * assert_hardreset code. |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1630 | */ |
| 1631 | static int _assert_hardreset(struct omap_hwmod *oh, const char *name) |
| 1632 | { |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1633 | struct omap_hwmod_rst_info ohri; |
Paul Walmsley | a032d33 | 2012-08-03 09:21:10 -0600 | [diff] [blame] | 1634 | int ret = -EINVAL; |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1635 | |
| 1636 | if (!oh) |
| 1637 | return -EINVAL; |
| 1638 | |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1639 | if (!soc_ops.assert_hardreset) |
| 1640 | return -ENOSYS; |
| 1641 | |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1642 | ret = _lookup_hardreset(oh, name, &ohri); |
Paul Walmsley | a032d33 | 2012-08-03 09:21:10 -0600 | [diff] [blame] | 1643 | if (ret < 0) |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1644 | return ret; |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1645 | |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1646 | ret = soc_ops.assert_hardreset(oh, &ohri); |
| 1647 | |
| 1648 | return ret; |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1649 | } |
| 1650 | |
| 1651 | /** |
| 1652 | * _deassert_hardreset - deassert the HW reset line of submodules contained |
| 1653 | * in the hwmod module. |
| 1654 | * @oh: struct omap_hwmod * |
| 1655 | * @name: name of the reset line to look up and deassert |
| 1656 | * |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1657 | * Some IP like dsp, ipu or iva contain processor that require an HW |
| 1658 | * reset line to be assert / deassert in order to enable fully the IP. |
| 1659 | * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of |
| 1660 | * deasserting the hardreset line on the currently-booted SoC, or passes |
| 1661 | * along the return value from _lookup_hardreset() or the SoC's |
| 1662 | * deassert_hardreset code. |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1663 | */ |
| 1664 | static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) |
| 1665 | { |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1666 | struct omap_hwmod_rst_info ohri; |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1667 | int ret = -EINVAL; |
Omar Ramirez Luna | e8e96df | 2012-09-23 17:28:21 -0600 | [diff] [blame] | 1668 | int hwsup = 0; |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1669 | |
| 1670 | if (!oh) |
| 1671 | return -EINVAL; |
| 1672 | |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1673 | if (!soc_ops.deassert_hardreset) |
| 1674 | return -ENOSYS; |
| 1675 | |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1676 | ret = _lookup_hardreset(oh, name, &ohri); |
Russell King | c48cd65 | 2013-03-13 20:44:21 +0000 | [diff] [blame] | 1677 | if (ret < 0) |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1678 | return ret; |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1679 | |
Omar Ramirez Luna | e8e96df | 2012-09-23 17:28:21 -0600 | [diff] [blame] | 1680 | if (oh->clkdm) { |
| 1681 | /* |
| 1682 | * A clockdomain must be in SW_SUP otherwise reset |
| 1683 | * might not be completed. The clockdomain can be set |
| 1684 | * in HW_AUTO only when the module become ready. |
| 1685 | */ |
| 1686 | hwsup = clkdm_in_hwsup(oh->clkdm); |
| 1687 | ret = clkdm_hwmod_enable(oh->clkdm, oh); |
| 1688 | if (ret) { |
| 1689 | WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n", |
| 1690 | oh->name, oh->clkdm->name, ret); |
| 1691 | return ret; |
| 1692 | } |
| 1693 | } |
| 1694 | |
| 1695 | _enable_clocks(oh); |
| 1696 | if (soc_ops.enable_module) |
| 1697 | soc_ops.enable_module(oh); |
| 1698 | |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1699 | ret = soc_ops.deassert_hardreset(oh, &ohri); |
Omar Ramirez Luna | e8e96df | 2012-09-23 17:28:21 -0600 | [diff] [blame] | 1700 | |
| 1701 | if (soc_ops.disable_module) |
| 1702 | soc_ops.disable_module(oh); |
| 1703 | _disable_clocks(oh); |
| 1704 | |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1705 | if (ret == -EBUSY) |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1706 | pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name); |
| 1707 | |
Omar Ramirez Luna | e8e96df | 2012-09-23 17:28:21 -0600 | [diff] [blame] | 1708 | if (!ret) { |
| 1709 | /* |
| 1710 | * Set the clockdomain to HW_AUTO, assuming that the |
| 1711 | * previous state was HW_AUTO. |
| 1712 | */ |
| 1713 | if (oh->clkdm && hwsup) |
| 1714 | clkdm_allow_idle(oh->clkdm); |
| 1715 | } else { |
| 1716 | if (oh->clkdm) |
| 1717 | clkdm_hwmod_disable(oh->clkdm, oh); |
| 1718 | } |
| 1719 | |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1720 | return ret; |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1721 | } |
| 1722 | |
| 1723 | /** |
| 1724 | * _read_hardreset - read the HW reset line state of submodules |
| 1725 | * contained in the hwmod module |
| 1726 | * @oh: struct omap_hwmod * |
| 1727 | * @name: name of the reset line to look up and read |
| 1728 | * |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1729 | * Return the state of the reset line. Returns -EINVAL if @oh is |
| 1730 | * null, -ENOSYS if we have no way of reading the hardreset line |
| 1731 | * status on the currently-booted SoC, or passes along the return |
| 1732 | * value from _lookup_hardreset() or the SoC's is_hardreset_asserted |
| 1733 | * code. |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1734 | */ |
| 1735 | static int _read_hardreset(struct omap_hwmod *oh, const char *name) |
| 1736 | { |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1737 | struct omap_hwmod_rst_info ohri; |
Paul Walmsley | a032d33 | 2012-08-03 09:21:10 -0600 | [diff] [blame] | 1738 | int ret = -EINVAL; |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1739 | |
| 1740 | if (!oh) |
| 1741 | return -EINVAL; |
| 1742 | |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1743 | if (!soc_ops.is_hardreset_asserted) |
| 1744 | return -ENOSYS; |
| 1745 | |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1746 | ret = _lookup_hardreset(oh, name, &ohri); |
Paul Walmsley | a032d33 | 2012-08-03 09:21:10 -0600 | [diff] [blame] | 1747 | if (ret < 0) |
omar ramirez | cc1226e | 2011-03-04 13:32:44 -0700 | [diff] [blame] | 1748 | return ret; |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1749 | |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 1750 | return soc_ops.is_hardreset_asserted(oh, &ohri); |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1751 | } |
| 1752 | |
| 1753 | /** |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1754 | * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1755 | * @oh: struct omap_hwmod * |
| 1756 | * |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1757 | * If all hardreset lines associated with @oh are asserted, then return true. |
| 1758 | * Otherwise, if part of @oh is out hardreset or if no hardreset lines |
| 1759 | * associated with @oh are asserted, then return false. |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1760 | * This function is used to avoid executing some parts of the IP block |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1761 | * enable/disable sequence if its hardreset line is set. |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1762 | */ |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1763 | static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh) |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1764 | { |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1765 | int i, rst_cnt = 0; |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1766 | |
| 1767 | if (oh->rst_lines_cnt == 0) |
| 1768 | return false; |
| 1769 | |
| 1770 | for (i = 0; i < oh->rst_lines_cnt; i++) |
| 1771 | if (_read_hardreset(oh, oh->rst_lines[i].name) > 0) |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1772 | rst_cnt++; |
| 1773 | |
| 1774 | if (oh->rst_lines_cnt == rst_cnt) |
| 1775 | return true; |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1776 | |
| 1777 | return false; |
| 1778 | } |
| 1779 | |
| 1780 | /** |
Paul Walmsley | e9332b6 | 2012-10-08 23:08:15 -0600 | [diff] [blame] | 1781 | * _are_any_hardreset_lines_asserted - return true if any part of @oh is |
| 1782 | * hard-reset |
| 1783 | * @oh: struct omap_hwmod * |
| 1784 | * |
| 1785 | * If any hardreset lines associated with @oh are asserted, then |
| 1786 | * return true. Otherwise, if no hardreset lines associated with @oh |
| 1787 | * are asserted, or if @oh has no hardreset lines, then return false. |
| 1788 | * This function is used to avoid executing some parts of the IP block |
| 1789 | * enable/disable sequence if any hardreset line is set. |
| 1790 | */ |
| 1791 | static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh) |
| 1792 | { |
| 1793 | int rst_cnt = 0; |
| 1794 | int i; |
| 1795 | |
| 1796 | for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++) |
| 1797 | if (_read_hardreset(oh, oh->rst_lines[i].name) > 0) |
| 1798 | rst_cnt++; |
| 1799 | |
| 1800 | return (rst_cnt) ? true : false; |
| 1801 | } |
| 1802 | |
| 1803 | /** |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1804 | * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4 |
| 1805 | * @oh: struct omap_hwmod * |
| 1806 | * |
| 1807 | * Disable the PRCM module mode related to the hwmod @oh. |
| 1808 | * Return EINVAL if the modulemode is not supported and 0 in case of success. |
| 1809 | */ |
| 1810 | static int _omap4_disable_module(struct omap_hwmod *oh) |
| 1811 | { |
| 1812 | int v; |
| 1813 | |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1814 | if (!oh->clkdm || !oh->prcm.omap4.modulemode) |
| 1815 | return -EINVAL; |
| 1816 | |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1817 | /* |
| 1818 | * Since integration code might still be doing something, only |
| 1819 | * disable if all lines are under hardreset. |
| 1820 | */ |
Paul Walmsley | e9332b6 | 2012-10-08 23:08:15 -0600 | [diff] [blame] | 1821 | if (_are_any_hardreset_lines_asserted(oh)) |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 1822 | return 0; |
| 1823 | |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1824 | pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__); |
| 1825 | |
| 1826 | omap4_cminst_module_disable(oh->clkdm->prcm_partition, |
| 1827 | oh->clkdm->cm_inst, |
| 1828 | oh->clkdm->clkdm_offs, |
| 1829 | oh->prcm.omap4.clkctrl_offs); |
| 1830 | |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 1831 | v = _omap4_wait_target_disable(oh); |
| 1832 | if (v) |
| 1833 | pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", |
| 1834 | oh->name); |
| 1835 | |
| 1836 | return 0; |
| 1837 | } |
| 1838 | |
| 1839 | /** |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 1840 | * _am33xx_disable_module - enable CLKCTRL modulemode on AM33XX |
| 1841 | * @oh: struct omap_hwmod * |
| 1842 | * |
| 1843 | * Disable the PRCM module mode related to the hwmod @oh. |
| 1844 | * Return EINVAL if the modulemode is not supported and 0 in case of success. |
| 1845 | */ |
| 1846 | static int _am33xx_disable_module(struct omap_hwmod *oh) |
| 1847 | { |
| 1848 | int v; |
| 1849 | |
| 1850 | if (!oh->clkdm || !oh->prcm.omap4.modulemode) |
| 1851 | return -EINVAL; |
| 1852 | |
| 1853 | pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__); |
| 1854 | |
Paul Walmsley | e9332b6 | 2012-10-08 23:08:15 -0600 | [diff] [blame] | 1855 | if (_are_any_hardreset_lines_asserted(oh)) |
| 1856 | return 0; |
| 1857 | |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 1858 | am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs, |
| 1859 | oh->prcm.omap4.clkctrl_offs); |
| 1860 | |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 1861 | v = _am33xx_wait_target_disable(oh); |
| 1862 | if (v) |
| 1863 | pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", |
| 1864 | oh->name); |
| 1865 | |
| 1866 | return 0; |
| 1867 | } |
| 1868 | |
| 1869 | /** |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1870 | * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1871 | * @oh: struct omap_hwmod * |
| 1872 | * |
| 1873 | * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be |
Paul Walmsley | 30e105c | 2012-04-19 00:49:09 -0600 | [diff] [blame] | 1874 | * enabled for this to work. Returns -ENOENT if the hwmod cannot be |
| 1875 | * reset this way, -EINVAL if the hwmod is in the wrong state, |
| 1876 | * -ETIMEDOUT if the module did not reset in time, or 0 upon success. |
Benoit Cousson | 2cb0681 | 2010-09-21 18:57:59 +0200 | [diff] [blame] | 1877 | * |
| 1878 | * In OMAP3 a specific SYSSTATUS register is used to get the reset status. |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1879 | * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead |
Benoit Cousson | 2cb0681 | 2010-09-21 18:57:59 +0200 | [diff] [blame] | 1880 | * use the SYSCONFIG softreset bit to provide the status. |
| 1881 | * |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1882 | * Note that some IP like McBSP do have reset control but don't have |
| 1883 | * reset status. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1884 | */ |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1885 | static int _ocp_softreset(struct omap_hwmod *oh) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1886 | { |
Tero Kristo | 613ad0e | 2012-10-29 22:02:13 -0600 | [diff] [blame] | 1887 | u32 v; |
Paul Walmsley | 6f8b7ff | 2009-12-08 16:33:16 -0700 | [diff] [blame] | 1888 | int c = 0; |
Benoit Cousson | 96835af | 2010-09-21 18:57:58 +0200 | [diff] [blame] | 1889 | int ret = 0; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1890 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 1891 | if (!oh->class->sysc || |
Benoit Cousson | 2cb0681 | 2010-09-21 18:57:59 +0200 | [diff] [blame] | 1892 | !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET)) |
Paul Walmsley | 30e105c | 2012-04-19 00:49:09 -0600 | [diff] [blame] | 1893 | return -ENOENT; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1894 | |
| 1895 | /* clocks must be on for this operation */ |
| 1896 | if (oh->_state != _HWMOD_STATE_ENABLED) { |
Paul Walmsley | 7852ec0 | 2012-07-26 00:54:26 -0600 | [diff] [blame] | 1897 | pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n", |
| 1898 | oh->name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1899 | return -EINVAL; |
| 1900 | } |
| 1901 | |
Benoit Cousson | 96835af | 2010-09-21 18:57:58 +0200 | [diff] [blame] | 1902 | /* For some modules, all optionnal clocks need to be enabled as well */ |
| 1903 | if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) |
| 1904 | _enable_optional_clocks(oh); |
| 1905 | |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1906 | pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1907 | |
| 1908 | v = oh->_sysc_cache; |
Benoit Cousson | 96835af | 2010-09-21 18:57:58 +0200 | [diff] [blame] | 1909 | ret = _set_softreset(oh, &v); |
| 1910 | if (ret) |
| 1911 | goto dis_opt_clks; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1912 | _write_sysconfig(v, oh); |
| 1913 | |
Fernando Guzman Lugo | d99de7f | 2012-04-13 05:08:03 -0600 | [diff] [blame] | 1914 | if (oh->class->sysc->srst_udelay) |
| 1915 | udelay(oh->class->sysc->srst_udelay); |
| 1916 | |
Tero Kristo | 613ad0e | 2012-10-29 22:02:13 -0600 | [diff] [blame] | 1917 | c = _wait_softreset_complete(oh); |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1918 | if (c == MAX_MODULE_SOFTRESET_WAIT) |
Benoit Cousson | 76e5589 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1919 | pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n", |
| 1920 | oh->name, MAX_MODULE_SOFTRESET_WAIT); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1921 | else |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 1922 | pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1923 | |
| 1924 | /* |
| 1925 | * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from |
| 1926 | * _wait_target_ready() or _reset() |
| 1927 | */ |
| 1928 | |
Benoit Cousson | 96835af | 2010-09-21 18:57:58 +0200 | [diff] [blame] | 1929 | ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0; |
| 1930 | |
| 1931 | dis_opt_clks: |
| 1932 | if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) |
| 1933 | _disable_optional_clocks(oh); |
| 1934 | |
| 1935 | return ret; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 1936 | } |
| 1937 | |
| 1938 | /** |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1939 | * _reset - reset an omap_hwmod |
| 1940 | * @oh: struct omap_hwmod * |
| 1941 | * |
Paul Walmsley | 30e105c | 2012-04-19 00:49:09 -0600 | [diff] [blame] | 1942 | * Resets an omap_hwmod @oh. If the module has a custom reset |
| 1943 | * function pointer defined, then call it to reset the IP block, and |
| 1944 | * pass along its return value to the caller. Otherwise, if the IP |
| 1945 | * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield |
| 1946 | * associated with it, call a function to reset the IP block via that |
| 1947 | * method, and pass along the return value to the caller. Finally, if |
| 1948 | * the IP block has some hardreset lines associated with it, assert |
| 1949 | * all of those, but do _not_ deassert them. (This is because driver |
| 1950 | * authors have expressed an apparent requirement to control the |
| 1951 | * deassertion of the hardreset lines themselves.) |
| 1952 | * |
| 1953 | * The default software reset mechanism for most OMAP IP blocks is |
| 1954 | * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some |
| 1955 | * hwmods cannot be reset via this method. Some are not targets and |
| 1956 | * therefore have no OCP header registers to access. Others (like the |
| 1957 | * IVA) have idiosyncratic reset sequences. So for these relatively |
| 1958 | * rare cases, custom reset code can be supplied in the struct |
Kishon Vijay Abraham I | 6668546 | 2012-07-04 05:09:21 -0600 | [diff] [blame] | 1959 | * omap_hwmod_class .reset function pointer. |
| 1960 | * |
| 1961 | * _set_dmadisable() is called to set the DMADISABLE bit so that it |
| 1962 | * does not prevent idling of the system. This is necessary for cases |
| 1963 | * where ROMCODE/BOOTLOADER uses dma and transfers control to the |
| 1964 | * kernel without disabling dma. |
| 1965 | * |
| 1966 | * Passes along the return value from either _ocp_softreset() or the |
| 1967 | * custom reset function - these must return -EINVAL if the hwmod |
| 1968 | * cannot be reset this way or if the hwmod is in the wrong state, |
| 1969 | * -ETIMEDOUT if the module did not reset in time, or 0 upon success. |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1970 | */ |
| 1971 | static int _reset(struct omap_hwmod *oh) |
| 1972 | { |
Paul Walmsley | 30e105c | 2012-04-19 00:49:09 -0600 | [diff] [blame] | 1973 | int i, r; |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1974 | |
| 1975 | pr_debug("omap_hwmod: %s: resetting\n", oh->name); |
| 1976 | |
Paul Walmsley | 30e105c | 2012-04-19 00:49:09 -0600 | [diff] [blame] | 1977 | if (oh->class->reset) { |
| 1978 | r = oh->class->reset(oh); |
| 1979 | } else { |
| 1980 | if (oh->rst_lines_cnt > 0) { |
| 1981 | for (i = 0; i < oh->rst_lines_cnt; i++) |
| 1982 | _assert_hardreset(oh, oh->rst_lines[i].name); |
| 1983 | return 0; |
| 1984 | } else { |
| 1985 | r = _ocp_softreset(oh); |
| 1986 | if (r == -ENOENT) |
| 1987 | r = 0; |
| 1988 | } |
| 1989 | } |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 1990 | |
Kishon Vijay Abraham I | 6668546 | 2012-07-04 05:09:21 -0600 | [diff] [blame] | 1991 | _set_dmadisable(oh); |
| 1992 | |
Paul Walmsley | 30e105c | 2012-04-19 00:49:09 -0600 | [diff] [blame] | 1993 | /* |
| 1994 | * OCP_SYSCONFIG bits need to be reprogrammed after a |
| 1995 | * softreset. The _enable() function should be split to avoid |
| 1996 | * the rewrite of the OCP_SYSCONFIG register. |
| 1997 | */ |
Rajendra Nayak | 2800852 | 2012-03-13 22:55:23 +0530 | [diff] [blame] | 1998 | if (oh->class->sysc) { |
| 1999 | _update_sysc_cache(oh); |
| 2000 | _enable_sysc(oh); |
| 2001 | } |
| 2002 | |
Paul Walmsley | 30e105c | 2012-04-19 00:49:09 -0600 | [diff] [blame] | 2003 | return r; |
Paul Walmsley | bd36179 | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2004 | } |
| 2005 | |
| 2006 | /** |
Vishwanath BS | 5165882 | 2012-06-22 08:40:04 -0600 | [diff] [blame] | 2007 | * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain |
| 2008 | * |
| 2009 | * Call the appropriate PRM function to clear any logged I/O chain |
| 2010 | * wakeups and to reconfigure the chain. This apparently needs to be |
| 2011 | * done upon every mux change. Since hwmods can be concurrently |
| 2012 | * enabled and idled, hold a spinlock around the I/O chain |
| 2013 | * reconfiguration sequence. No return value. |
| 2014 | * |
| 2015 | * XXX When the PRM code is moved to drivers, this function can be removed, |
| 2016 | * as the PRM infrastructure should abstract this. |
| 2017 | */ |
| 2018 | static void _reconfigure_io_chain(void) |
| 2019 | { |
| 2020 | unsigned long flags; |
| 2021 | |
| 2022 | spin_lock_irqsave(&io_chain_lock, flags); |
| 2023 | |
| 2024 | if (cpu_is_omap34xx() && omap3_has_io_chain_ctrl()) |
| 2025 | omap3xxx_prm_reconfigure_io_chain(); |
| 2026 | else if (cpu_is_omap44xx()) |
| 2027 | omap44xx_prm_reconfigure_io_chain(); |
| 2028 | |
| 2029 | spin_unlock_irqrestore(&io_chain_lock, flags); |
| 2030 | } |
| 2031 | |
| 2032 | /** |
Rajendra Nayak | e6d3a8b | 2012-11-21 16:15:17 -0700 | [diff] [blame] | 2033 | * _omap4_update_context_lost - increment hwmod context loss counter if |
| 2034 | * hwmod context was lost, and clear hardware context loss reg |
| 2035 | * @oh: hwmod to check for context loss |
| 2036 | * |
| 2037 | * If the PRCM indicates that the hwmod @oh lost context, increment |
| 2038 | * our in-memory context loss counter, and clear the RM_*_CONTEXT |
| 2039 | * bits. No return value. |
| 2040 | */ |
| 2041 | static void _omap4_update_context_lost(struct omap_hwmod *oh) |
| 2042 | { |
| 2043 | if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT) |
| 2044 | return; |
| 2045 | |
| 2046 | if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition, |
| 2047 | oh->clkdm->pwrdm.ptr->prcm_offs, |
| 2048 | oh->prcm.omap4.context_offs)) |
| 2049 | return; |
| 2050 | |
| 2051 | oh->prcm.omap4.context_lost_counter++; |
| 2052 | prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition, |
| 2053 | oh->clkdm->pwrdm.ptr->prcm_offs, |
| 2054 | oh->prcm.omap4.context_offs); |
| 2055 | } |
| 2056 | |
| 2057 | /** |
| 2058 | * _omap4_get_context_lost - get context loss counter for a hwmod |
| 2059 | * @oh: hwmod to get context loss counter for |
| 2060 | * |
| 2061 | * Returns the in-memory context loss counter for a hwmod. |
| 2062 | */ |
| 2063 | static int _omap4_get_context_lost(struct omap_hwmod *oh) |
| 2064 | { |
| 2065 | return oh->prcm.omap4.context_lost_counter; |
| 2066 | } |
| 2067 | |
| 2068 | /** |
Paul Walmsley | 6d266f6 | 2013-02-10 11:22:22 -0700 | [diff] [blame] | 2069 | * _enable_preprogram - Pre-program an IP block during the _enable() process |
| 2070 | * @oh: struct omap_hwmod * |
| 2071 | * |
| 2072 | * Some IP blocks (such as AESS) require some additional programming |
| 2073 | * after enable before they can enter idle. If a function pointer to |
| 2074 | * do so is present in the hwmod data, then call it and pass along the |
| 2075 | * return value; otherwise, return 0. |
| 2076 | */ |
jean-philippe francois | 0f49703 | 2013-05-16 11:25:07 -0700 | [diff] [blame] | 2077 | static int _enable_preprogram(struct omap_hwmod *oh) |
Paul Walmsley | 6d266f6 | 2013-02-10 11:22:22 -0700 | [diff] [blame] | 2078 | { |
| 2079 | if (!oh->class->enable_preprogram) |
| 2080 | return 0; |
| 2081 | |
| 2082 | return oh->class->enable_preprogram(oh); |
| 2083 | } |
| 2084 | |
| 2085 | /** |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2086 | * _enable - enable an omap_hwmod |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2087 | * @oh: struct omap_hwmod * |
| 2088 | * |
| 2089 | * Enables an omap_hwmod @oh such that the MPU can access the hwmod's |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2090 | * register target. Returns -EINVAL if the hwmod is in the wrong |
| 2091 | * state or passes along the return value of _wait_target_ready(). |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2092 | */ |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2093 | static int _enable(struct omap_hwmod *oh) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2094 | { |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 2095 | int r; |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 2096 | int hwsup = 0; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2097 | |
Benoit Cousson | 34617e2 | 2011-07-01 22:54:07 +0200 | [diff] [blame] | 2098 | pr_debug("omap_hwmod: %s: enabling\n", oh->name); |
| 2099 | |
Rajendra Nayak | aacf094 | 2011-12-16 05:50:12 -0700 | [diff] [blame] | 2100 | /* |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2101 | * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled |
| 2102 | * state at init. Now that someone is really trying to enable |
| 2103 | * them, just ensure that the hwmod mux is set. |
Rajendra Nayak | aacf094 | 2011-12-16 05:50:12 -0700 | [diff] [blame] | 2104 | */ |
| 2105 | if (oh->_int_flags & _HWMOD_SKIP_ENABLE) { |
| 2106 | /* |
| 2107 | * If the caller has mux data populated, do the mux'ing |
| 2108 | * which wouldn't have been done as part of the _enable() |
| 2109 | * done during setup. |
| 2110 | */ |
| 2111 | if (oh->mux) |
| 2112 | omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); |
| 2113 | |
| 2114 | oh->_int_flags &= ~_HWMOD_SKIP_ENABLE; |
| 2115 | return 0; |
| 2116 | } |
| 2117 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2118 | if (oh->_state != _HWMOD_STATE_INITIALIZED && |
| 2119 | oh->_state != _HWMOD_STATE_IDLE && |
| 2120 | oh->_state != _HWMOD_STATE_DISABLED) { |
Russell King | 4f8a428 | 2012-02-07 10:59:37 +0000 | [diff] [blame] | 2121 | WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n", |
| 2122 | oh->name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2123 | return -EINVAL; |
| 2124 | } |
| 2125 | |
Benoit Cousson | 31f6286 | 2011-07-01 22:54:05 +0200 | [diff] [blame] | 2126 | /* |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 2127 | * If an IP block contains HW reset lines and all of them are |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 2128 | * asserted, we let integration code associated with that |
| 2129 | * block handle the enable. We've received very little |
| 2130 | * information on what those driver authors need, and until |
| 2131 | * detailed information is provided and the driver code is |
| 2132 | * posted to the public lists, this is probably the best we |
| 2133 | * can do. |
Benoit Cousson | 31f6286 | 2011-07-01 22:54:05 +0200 | [diff] [blame] | 2134 | */ |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 2135 | if (_are_all_hardreset_lines_asserted(oh)) |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 2136 | return 0; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2137 | |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 2138 | /* Mux pins for device runtime if populated */ |
| 2139 | if (oh->mux && (!oh->mux->enabled || |
| 2140 | ((oh->_state == _HWMOD_STATE_IDLE) && |
Vishwanath BS | 5165882 | 2012-06-22 08:40:04 -0600 | [diff] [blame] | 2141 | oh->mux->pads_dynamic))) { |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 2142 | omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); |
Vishwanath BS | 5165882 | 2012-06-22 08:40:04 -0600 | [diff] [blame] | 2143 | _reconfigure_io_chain(); |
| 2144 | } |
Benoit Cousson | 34617e2 | 2011-07-01 22:54:07 +0200 | [diff] [blame] | 2145 | |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 2146 | _add_initiator_dep(oh, mpu_oh); |
| 2147 | |
| 2148 | if (oh->clkdm) { |
| 2149 | /* |
| 2150 | * A clockdomain must be in SW_SUP before enabling |
| 2151 | * completely the module. The clockdomain can be set |
| 2152 | * in HW_AUTO only when the module become ready. |
| 2153 | */ |
Paul Walmsley | b71c721 | 2012-09-23 17:28:28 -0600 | [diff] [blame] | 2154 | hwsup = clkdm_in_hwsup(oh->clkdm) && |
| 2155 | !clkdm_missing_idle_reporting(oh->clkdm); |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 2156 | r = clkdm_hwmod_enable(oh->clkdm, oh); |
| 2157 | if (r) { |
| 2158 | WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n", |
| 2159 | oh->name, oh->clkdm->name, r); |
| 2160 | return r; |
| 2161 | } |
Benoit Cousson | 34617e2 | 2011-07-01 22:54:07 +0200 | [diff] [blame] | 2162 | } |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 2163 | |
| 2164 | _enable_clocks(oh); |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 2165 | if (soc_ops.enable_module) |
| 2166 | soc_ops.enable_module(oh); |
Paul Walmsley | fa20022 | 2013-01-26 00:48:56 -0700 | [diff] [blame] | 2167 | if (oh->flags & HWMOD_BLOCK_WFI) |
Thomas Gleixner | f7b861b | 2013-03-21 22:49:38 +0100 | [diff] [blame] | 2168 | cpu_idle_poll_ctrl(true); |
Benoit Cousson | 34617e2 | 2011-07-01 22:54:07 +0200 | [diff] [blame] | 2169 | |
Rajendra Nayak | e6d3a8b | 2012-11-21 16:15:17 -0700 | [diff] [blame] | 2170 | if (soc_ops.update_context_lost) |
| 2171 | soc_ops.update_context_lost(oh); |
| 2172 | |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2173 | r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) : |
| 2174 | -EINVAL; |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 2175 | if (!r) { |
| 2176 | /* |
| 2177 | * Set the clockdomain to HW_AUTO only if the target is ready, |
| 2178 | * assuming that the previous state was HW_AUTO |
| 2179 | */ |
| 2180 | if (oh->clkdm && hwsup) |
| 2181 | clkdm_allow_idle(oh->clkdm); |
Benoit Cousson | 34617e2 | 2011-07-01 22:54:07 +0200 | [diff] [blame] | 2182 | |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 2183 | oh->_state = _HWMOD_STATE_ENABLED; |
| 2184 | |
| 2185 | /* Access the sysconfig only if the target is ready */ |
| 2186 | if (oh->class->sysc) { |
| 2187 | if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) |
| 2188 | _update_sysc_cache(oh); |
| 2189 | _enable_sysc(oh); |
| 2190 | } |
Paul Walmsley | 6d266f6 | 2013-02-10 11:22:22 -0700 | [diff] [blame] | 2191 | r = _enable_preprogram(oh); |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 2192 | } else { |
Paul Walmsley | 2577a4a | 2012-10-29 20:57:55 -0600 | [diff] [blame] | 2193 | if (soc_ops.disable_module) |
| 2194 | soc_ops.disable_module(oh); |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 2195 | _disable_clocks(oh); |
| 2196 | pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n", |
| 2197 | oh->name, r); |
| 2198 | |
| 2199 | if (oh->clkdm) |
| 2200 | clkdm_hwmod_disable(oh->clkdm, oh); |
Benoit Cousson | 9a23dfe | 2010-05-20 12:31:08 -0600 | [diff] [blame] | 2201 | } |
| 2202 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2203 | return r; |
| 2204 | } |
| 2205 | |
| 2206 | /** |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2207 | * _idle - idle an omap_hwmod |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2208 | * @oh: struct omap_hwmod * |
| 2209 | * |
| 2210 | * Idles an omap_hwmod @oh. This should be called once the hwmod has |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2211 | * no further work. Returns -EINVAL if the hwmod is in the wrong |
| 2212 | * state or returns 0. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2213 | */ |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2214 | static int _idle(struct omap_hwmod *oh) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2215 | { |
Benoit Cousson | 34617e2 | 2011-07-01 22:54:07 +0200 | [diff] [blame] | 2216 | pr_debug("omap_hwmod: %s: idling\n", oh->name); |
| 2217 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2218 | if (oh->_state != _HWMOD_STATE_ENABLED) { |
Russell King | 4f8a428 | 2012-02-07 10:59:37 +0000 | [diff] [blame] | 2219 | WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n", |
| 2220 | oh->name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2221 | return -EINVAL; |
| 2222 | } |
| 2223 | |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 2224 | if (_are_all_hardreset_lines_asserted(oh)) |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 2225 | return 0; |
| 2226 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 2227 | if (oh->class->sysc) |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 2228 | _idle_sysc(oh); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2229 | _del_initiator_dep(oh, mpu_oh); |
Benoit Cousson | bfc141e | 2011-12-16 16:09:11 -0800 | [diff] [blame] | 2230 | |
Paul Walmsley | fa20022 | 2013-01-26 00:48:56 -0700 | [diff] [blame] | 2231 | if (oh->flags & HWMOD_BLOCK_WFI) |
Thomas Gleixner | f7b861b | 2013-03-21 22:49:38 +0100 | [diff] [blame] | 2232 | cpu_idle_poll_ctrl(false); |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 2233 | if (soc_ops.disable_module) |
| 2234 | soc_ops.disable_module(oh); |
Benoit Cousson | bfc141e | 2011-12-16 16:09:11 -0800 | [diff] [blame] | 2235 | |
Benoit Cousson | 45c3825 | 2011-07-10 05:56:33 -0600 | [diff] [blame] | 2236 | /* |
| 2237 | * The module must be in idle mode before disabling any parents |
| 2238 | * clocks. Otherwise, the parent clock might be disabled before |
| 2239 | * the module transition is done, and thus will prevent the |
| 2240 | * transition to complete properly. |
| 2241 | */ |
| 2242 | _disable_clocks(oh); |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 2243 | if (oh->clkdm) |
| 2244 | clkdm_hwmod_disable(oh->clkdm, oh); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2245 | |
Tony Lindgren | 8d9af88 | 2010-12-22 18:42:35 -0800 | [diff] [blame] | 2246 | /* Mux pins for device idle if populated */ |
Vishwanath BS | 5165882 | 2012-06-22 08:40:04 -0600 | [diff] [blame] | 2247 | if (oh->mux && oh->mux->pads_dynamic) { |
Tony Lindgren | 8d9af88 | 2010-12-22 18:42:35 -0800 | [diff] [blame] | 2248 | omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE); |
Vishwanath BS | 5165882 | 2012-06-22 08:40:04 -0600 | [diff] [blame] | 2249 | _reconfigure_io_chain(); |
| 2250 | } |
Tony Lindgren | 8d9af88 | 2010-12-22 18:42:35 -0800 | [diff] [blame] | 2251 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2252 | oh->_state = _HWMOD_STATE_IDLE; |
| 2253 | |
| 2254 | return 0; |
| 2255 | } |
| 2256 | |
| 2257 | /** |
| 2258 | * _shutdown - shutdown an omap_hwmod |
| 2259 | * @oh: struct omap_hwmod * |
| 2260 | * |
| 2261 | * Shut down an omap_hwmod @oh. This should be called when the driver |
| 2262 | * used for the hwmod is removed or unloaded or if the driver is not |
| 2263 | * used by the system. Returns -EINVAL if the hwmod is in the wrong |
| 2264 | * state or returns 0. |
| 2265 | */ |
| 2266 | static int _shutdown(struct omap_hwmod *oh) |
| 2267 | { |
Paul Walmsley | 9c8b0ec | 2012-04-18 19:10:02 -0600 | [diff] [blame] | 2268 | int ret, i; |
Paul Walmsley | e4dc8f5 | 2010-12-14 12:42:34 -0700 | [diff] [blame] | 2269 | u8 prev_state; |
| 2270 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2271 | if (oh->_state != _HWMOD_STATE_IDLE && |
| 2272 | oh->_state != _HWMOD_STATE_ENABLED) { |
Russell King | 4f8a428 | 2012-02-07 10:59:37 +0000 | [diff] [blame] | 2273 | WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n", |
| 2274 | oh->name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2275 | return -EINVAL; |
| 2276 | } |
| 2277 | |
Omar Ramirez Luna | eb05f69 | 2012-09-23 17:28:20 -0600 | [diff] [blame] | 2278 | if (_are_all_hardreset_lines_asserted(oh)) |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 2279 | return 0; |
| 2280 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2281 | pr_debug("omap_hwmod: %s: disabling\n", oh->name); |
| 2282 | |
Paul Walmsley | e4dc8f5 | 2010-12-14 12:42:34 -0700 | [diff] [blame] | 2283 | if (oh->class->pre_shutdown) { |
| 2284 | prev_state = oh->_state; |
| 2285 | if (oh->_state == _HWMOD_STATE_IDLE) |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2286 | _enable(oh); |
Paul Walmsley | e4dc8f5 | 2010-12-14 12:42:34 -0700 | [diff] [blame] | 2287 | ret = oh->class->pre_shutdown(oh); |
| 2288 | if (ret) { |
| 2289 | if (prev_state == _HWMOD_STATE_IDLE) |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2290 | _idle(oh); |
Paul Walmsley | e4dc8f5 | 2010-12-14 12:42:34 -0700 | [diff] [blame] | 2291 | return ret; |
| 2292 | } |
| 2293 | } |
| 2294 | |
Miguel Vadillo | 6481c73 | 2011-07-01 22:54:02 +0200 | [diff] [blame] | 2295 | if (oh->class->sysc) { |
| 2296 | if (oh->_state == _HWMOD_STATE_IDLE) |
| 2297 | _enable(oh); |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 2298 | _shutdown_sysc(oh); |
Miguel Vadillo | 6481c73 | 2011-07-01 22:54:02 +0200 | [diff] [blame] | 2299 | } |
BenoƮt Cousson | 5365efb | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 2300 | |
Benoit Cousson | 3827f94 | 2010-09-21 10:34:08 -0600 | [diff] [blame] | 2301 | /* clocks and deps are already disabled in idle */ |
| 2302 | if (oh->_state == _HWMOD_STATE_ENABLED) { |
| 2303 | _del_initiator_dep(oh, mpu_oh); |
| 2304 | /* XXX what about the other system initiators here? dma, dsp */ |
Paul Walmsley | fa20022 | 2013-01-26 00:48:56 -0700 | [diff] [blame] | 2305 | if (oh->flags & HWMOD_BLOCK_WFI) |
Thomas Gleixner | f7b861b | 2013-03-21 22:49:38 +0100 | [diff] [blame] | 2306 | cpu_idle_poll_ctrl(false); |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 2307 | if (soc_ops.disable_module) |
| 2308 | soc_ops.disable_module(oh); |
Benoit Cousson | 45c3825 | 2011-07-10 05:56:33 -0600 | [diff] [blame] | 2309 | _disable_clocks(oh); |
Rajendra Nayak | 665d001 | 2011-07-10 05:57:07 -0600 | [diff] [blame] | 2310 | if (oh->clkdm) |
| 2311 | clkdm_hwmod_disable(oh->clkdm, oh); |
Benoit Cousson | 3827f94 | 2010-09-21 10:34:08 -0600 | [diff] [blame] | 2312 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2313 | /* XXX Should this code also force-disable the optional clocks? */ |
| 2314 | |
Paul Walmsley | 9c8b0ec | 2012-04-18 19:10:02 -0600 | [diff] [blame] | 2315 | for (i = 0; i < oh->rst_lines_cnt; i++) |
| 2316 | _assert_hardreset(oh, oh->rst_lines[i].name); |
Benoit Cousson | 31f6286 | 2011-07-01 22:54:05 +0200 | [diff] [blame] | 2317 | |
Tony Lindgren | 8d9af88 | 2010-12-22 18:42:35 -0800 | [diff] [blame] | 2318 | /* Mux pins to safe mode or use populated off mode values */ |
| 2319 | if (oh->mux) |
| 2320 | omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2321 | |
| 2322 | oh->_state = _HWMOD_STATE_DISABLED; |
| 2323 | |
| 2324 | return 0; |
| 2325 | } |
| 2326 | |
| 2327 | /** |
Santosh Shilimkar | 079abad | 2013-01-21 18:40:57 +0530 | [diff] [blame] | 2328 | * of_dev_hwmod_lookup - look up needed hwmod from dt blob |
| 2329 | * @np: struct device_node * |
| 2330 | * @oh: struct omap_hwmod * |
| 2331 | * |
| 2332 | * Parse the dt blob and find out needed hwmod. Recursive function is |
| 2333 | * implemented to take care hierarchical dt blob parsing. |
| 2334 | * Return: The device node on success or NULL on failure. |
| 2335 | */ |
| 2336 | static struct device_node *of_dev_hwmod_lookup(struct device_node *np, |
| 2337 | struct omap_hwmod *oh) |
| 2338 | { |
| 2339 | struct device_node *np0 = NULL, *np1 = NULL; |
| 2340 | const char *p; |
| 2341 | |
| 2342 | for_each_child_of_node(np, np0) { |
| 2343 | if (of_find_property(np0, "ti,hwmods", NULL)) { |
| 2344 | p = of_get_property(np0, "ti,hwmods", NULL); |
| 2345 | if (!strcmp(p, oh->name)) |
| 2346 | return np0; |
| 2347 | np1 = of_dev_hwmod_lookup(np0, oh); |
| 2348 | if (np1) |
| 2349 | return np1; |
| 2350 | } |
| 2351 | } |
| 2352 | return NULL; |
| 2353 | } |
| 2354 | |
| 2355 | /** |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2356 | * _init_mpu_rt_base - populate the virtual address for a hwmod |
| 2357 | * @oh: struct omap_hwmod * to locate the virtual address |
| 2358 | * |
| 2359 | * Cache the virtual address used by the MPU to access this IP block's |
| 2360 | * registers. This address is needed early so the OCP registers that |
| 2361 | * are part of the device's address space can be ioremapped properly. |
| 2362 | * No return value. |
| 2363 | */ |
| 2364 | static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data) |
| 2365 | { |
Paul Walmsley | c9aafd2 | 2012-04-18 19:10:05 -0600 | [diff] [blame] | 2366 | struct omap_hwmod_addr_space *mem; |
Santosh Shilimkar | 079abad | 2013-01-21 18:40:57 +0530 | [diff] [blame] | 2367 | void __iomem *va_start = NULL; |
| 2368 | struct device_node *np; |
Paul Walmsley | c9aafd2 | 2012-04-18 19:10:05 -0600 | [diff] [blame] | 2369 | |
| 2370 | if (!oh) |
| 2371 | return; |
| 2372 | |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 2373 | _save_mpu_port_index(oh); |
| 2374 | |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2375 | if (oh->_int_flags & _HWMOD_NO_MPU_PORT) |
| 2376 | return; |
| 2377 | |
Paul Walmsley | c9aafd2 | 2012-04-18 19:10:05 -0600 | [diff] [blame] | 2378 | mem = _find_mpu_rt_addr_space(oh); |
| 2379 | if (!mem) { |
| 2380 | pr_debug("omap_hwmod: %s: no MPU register target found\n", |
| 2381 | oh->name); |
Santosh Shilimkar | 079abad | 2013-01-21 18:40:57 +0530 | [diff] [blame] | 2382 | |
| 2383 | /* Extract the IO space from device tree blob */ |
| 2384 | if (!of_have_populated_dt()) |
| 2385 | return; |
| 2386 | |
| 2387 | np = of_dev_hwmod_lookup(of_find_node_by_name(NULL, "ocp"), oh); |
| 2388 | if (np) |
| 2389 | va_start = of_iomap(np, 0); |
| 2390 | } else { |
| 2391 | va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start); |
Paul Walmsley | c9aafd2 | 2012-04-18 19:10:05 -0600 | [diff] [blame] | 2392 | } |
| 2393 | |
Paul Walmsley | c9aafd2 | 2012-04-18 19:10:05 -0600 | [diff] [blame] | 2394 | if (!va_start) { |
| 2395 | pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name); |
| 2396 | return; |
| 2397 | } |
| 2398 | |
| 2399 | pr_debug("omap_hwmod: %s: MPU register target at va %p\n", |
| 2400 | oh->name, va_start); |
| 2401 | |
| 2402 | oh->_mpu_rt_va = va_start; |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2403 | } |
| 2404 | |
| 2405 | /** |
| 2406 | * _init - initialize internal data for the hwmod @oh |
| 2407 | * @oh: struct omap_hwmod * |
| 2408 | * @n: (unused) |
| 2409 | * |
| 2410 | * Look up the clocks and the address space used by the MPU to access |
| 2411 | * registers belonging to the hwmod @oh. @oh must already be |
| 2412 | * registered at this point. This is the first of two phases for |
| 2413 | * hwmod initialization. Code called here does not touch any hardware |
| 2414 | * registers, it simply prepares internal data structures. Returns 0 |
| 2415 | * upon success or if the hwmod isn't registered, or -EINVAL upon |
| 2416 | * failure. |
| 2417 | */ |
| 2418 | static int __init _init(struct omap_hwmod *oh, void *data) |
| 2419 | { |
| 2420 | int r; |
| 2421 | |
| 2422 | if (oh->_state != _HWMOD_STATE_REGISTERED) |
| 2423 | return 0; |
| 2424 | |
Santosh Shilimkar | 97597b9 | 2013-03-19 17:00:31 +0530 | [diff] [blame] | 2425 | if (oh->class->sysc) |
| 2426 | _init_mpu_rt_base(oh, NULL); |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2427 | |
| 2428 | r = _init_clocks(oh, NULL); |
Russell King | c48cd65 | 2013-03-13 20:44:21 +0000 | [diff] [blame] | 2429 | if (r < 0) { |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2430 | WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name); |
| 2431 | return -EINVAL; |
| 2432 | } |
| 2433 | |
| 2434 | oh->_state = _HWMOD_STATE_INITIALIZED; |
| 2435 | |
| 2436 | return 0; |
| 2437 | } |
| 2438 | |
| 2439 | /** |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2440 | * _setup_iclk_autoidle - configure an IP block's interface clocks |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2441 | * @oh: struct omap_hwmod * |
| 2442 | * |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2443 | * Set up the module's interface clocks. XXX This function is still mostly |
| 2444 | * a stub; implementing this properly requires iclk autoidle usecounting in |
| 2445 | * the clock code. No return value. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2446 | */ |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2447 | static void __init _setup_iclk_autoidle(struct omap_hwmod *oh) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2448 | { |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 2449 | struct omap_hwmod_ocp_if *os; |
Paul Walmsley | 11cd4b9 | 2012-04-19 04:04:32 -0600 | [diff] [blame] | 2450 | struct list_head *p; |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 2451 | int i = 0; |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 2452 | if (oh->_state != _HWMOD_STATE_INITIALIZED) |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2453 | return; |
Paul Walmsley | 48d54f3 | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 2454 | |
Paul Walmsley | 11cd4b9 | 2012-04-19 04:04:32 -0600 | [diff] [blame] | 2455 | p = oh->slave_ports.next; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2456 | |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 2457 | while (i < oh->slaves_cnt) { |
Paul Walmsley | 11cd4b9 | 2012-04-19 04:04:32 -0600 | [diff] [blame] | 2458 | os = _fetch_next_ocp_if(&p, &i); |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 2459 | if (!os->_clk) |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2460 | continue; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2461 | |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2462 | if (os->flags & OCPIF_SWSUP_IDLE) { |
| 2463 | /* XXX omap_iclk_deny_idle(c); */ |
| 2464 | } else { |
| 2465 | /* XXX omap_iclk_allow_idle(c); */ |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 2466 | clk_enable(os->_clk); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2467 | } |
| 2468 | } |
| 2469 | |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2470 | return; |
| 2471 | } |
| 2472 | |
| 2473 | /** |
| 2474 | * _setup_reset - reset an IP block during the setup process |
| 2475 | * @oh: struct omap_hwmod * |
| 2476 | * |
| 2477 | * Reset the IP block corresponding to the hwmod @oh during the setup |
| 2478 | * process. The IP block is first enabled so it can be successfully |
| 2479 | * reset. Returns 0 upon success or a negative error code upon |
| 2480 | * failure. |
| 2481 | */ |
| 2482 | static int __init _setup_reset(struct omap_hwmod *oh) |
| 2483 | { |
| 2484 | int r; |
| 2485 | |
| 2486 | if (oh->_state != _HWMOD_STATE_INITIALIZED) |
| 2487 | return -EINVAL; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2488 | |
Paul Walmsley | 5fb3d52 | 2012-10-29 22:11:50 -0600 | [diff] [blame] | 2489 | if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK) |
| 2490 | return -EPERM; |
| 2491 | |
Paul Walmsley | 747834a | 2012-04-18 19:10:04 -0600 | [diff] [blame] | 2492 | if (oh->rst_lines_cnt == 0) { |
| 2493 | r = _enable(oh); |
| 2494 | if (r) { |
| 2495 | pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n", |
| 2496 | oh->name, oh->_state); |
| 2497 | return -EINVAL; |
| 2498 | } |
Benoit Cousson | 9a23dfe | 2010-05-20 12:31:08 -0600 | [diff] [blame] | 2499 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2500 | |
Rajendra Nayak | 2800852 | 2012-03-13 22:55:23 +0530 | [diff] [blame] | 2501 | if (!(oh->flags & HWMOD_INIT_NO_RESET)) |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2502 | r = _reset(oh); |
| 2503 | |
| 2504 | return r; |
| 2505 | } |
| 2506 | |
| 2507 | /** |
| 2508 | * _setup_postsetup - transition to the appropriate state after _setup |
| 2509 | * @oh: struct omap_hwmod * |
| 2510 | * |
| 2511 | * Place an IP block represented by @oh into a "post-setup" state -- |
| 2512 | * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that |
| 2513 | * this function is called at the end of _setup().) The postsetup |
| 2514 | * state for an IP block can be changed by calling |
| 2515 | * omap_hwmod_enter_postsetup_state() early in the boot process, |
| 2516 | * before one of the omap_hwmod_setup*() functions are called for the |
| 2517 | * IP block. |
| 2518 | * |
| 2519 | * The IP block stays in this state until a PM runtime-based driver is |
| 2520 | * loaded for that IP block. A post-setup state of IDLE is |
| 2521 | * appropriate for almost all IP blocks with runtime PM-enabled |
| 2522 | * drivers, since those drivers are able to enable the IP block. A |
| 2523 | * post-setup state of ENABLED is appropriate for kernels with PM |
| 2524 | * runtime disabled. The DISABLED state is appropriate for unusual IP |
| 2525 | * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers |
| 2526 | * included, since the WDTIMER starts running on reset and will reset |
| 2527 | * the MPU if left active. |
| 2528 | * |
| 2529 | * This post-setup mechanism is deprecated. Once all of the OMAP |
| 2530 | * drivers have been converted to use PM runtime, and all of the IP |
| 2531 | * block data and interconnect data is available to the hwmod code, it |
| 2532 | * should be possible to replace this mechanism with a "lazy reset" |
| 2533 | * arrangement. In a "lazy reset" setup, each IP block is enabled |
| 2534 | * when the driver first probes, then all remaining IP blocks without |
| 2535 | * drivers are either shut down or enabled after the drivers have |
| 2536 | * loaded. However, this cannot take place until the above |
| 2537 | * preconditions have been met, since otherwise the late reset code |
| 2538 | * has no way of knowing which IP blocks are in use by drivers, and |
| 2539 | * which ones are unused. |
| 2540 | * |
| 2541 | * No return value. |
| 2542 | */ |
| 2543 | static void __init _setup_postsetup(struct omap_hwmod *oh) |
| 2544 | { |
| 2545 | u8 postsetup_state; |
| 2546 | |
| 2547 | if (oh->rst_lines_cnt > 0) |
| 2548 | return; |
Benoit Cousson | 76e5589 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 2549 | |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2550 | postsetup_state = oh->_postsetup_state; |
| 2551 | if (postsetup_state == _HWMOD_STATE_UNKNOWN) |
| 2552 | postsetup_state = _HWMOD_STATE_ENABLED; |
| 2553 | |
| 2554 | /* |
| 2555 | * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data - |
| 2556 | * it should be set by the core code as a runtime flag during startup |
| 2557 | */ |
| 2558 | if ((oh->flags & HWMOD_INIT_NO_IDLE) && |
Rajendra Nayak | aacf094 | 2011-12-16 05:50:12 -0700 | [diff] [blame] | 2559 | (postsetup_state == _HWMOD_STATE_IDLE)) { |
| 2560 | oh->_int_flags |= _HWMOD_SKIP_ENABLE; |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2561 | postsetup_state = _HWMOD_STATE_ENABLED; |
Rajendra Nayak | aacf094 | 2011-12-16 05:50:12 -0700 | [diff] [blame] | 2562 | } |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2563 | |
| 2564 | if (postsetup_state == _HWMOD_STATE_IDLE) |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2565 | _idle(oh); |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 2566 | else if (postsetup_state == _HWMOD_STATE_DISABLED) |
| 2567 | _shutdown(oh); |
| 2568 | else if (postsetup_state != _HWMOD_STATE_ENABLED) |
| 2569 | WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n", |
| 2570 | oh->name, postsetup_state); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2571 | |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 2572 | return; |
| 2573 | } |
| 2574 | |
| 2575 | /** |
| 2576 | * _setup - prepare IP block hardware for use |
| 2577 | * @oh: struct omap_hwmod * |
| 2578 | * @n: (unused, pass NULL) |
| 2579 | * |
| 2580 | * Configure the IP block represented by @oh. This may include |
| 2581 | * enabling the IP block, resetting it, and placing it into a |
| 2582 | * post-setup state, depending on the type of IP block and applicable |
| 2583 | * flags. IP blocks are reset to prevent any previous configuration |
| 2584 | * by the bootloader or previous operating system from interfering |
| 2585 | * with power management or other parts of the system. The reset can |
| 2586 | * be avoided; see omap_hwmod_no_setup_reset(). This is the second of |
| 2587 | * two phases for hwmod initialization. Code called here generally |
| 2588 | * affects the IP block hardware, or system integration hardware |
| 2589 | * associated with the IP block. Returns 0. |
| 2590 | */ |
| 2591 | static int __init _setup(struct omap_hwmod *oh, void *data) |
| 2592 | { |
| 2593 | if (oh->_state != _HWMOD_STATE_INITIALIZED) |
| 2594 | return 0; |
| 2595 | |
| 2596 | _setup_iclk_autoidle(oh); |
| 2597 | |
| 2598 | if (!_setup_reset(oh)) |
| 2599 | _setup_postsetup(oh); |
| 2600 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2601 | return 0; |
| 2602 | } |
| 2603 | |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2604 | /** |
| 2605 | * _register - register a struct omap_hwmod |
| 2606 | * @oh: struct omap_hwmod * |
| 2607 | * |
| 2608 | * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod |
| 2609 | * already has been registered by the same name; -EINVAL if the |
| 2610 | * omap_hwmod is in the wrong state, if @oh is NULL, if the |
| 2611 | * omap_hwmod's class field is NULL; if the omap_hwmod is missing a |
| 2612 | * name, or if the omap_hwmod's class is missing a name; or 0 upon |
| 2613 | * success. |
| 2614 | * |
| 2615 | * XXX The data should be copied into bootmem, so the original data |
| 2616 | * should be marked __initdata and freed after init. This would allow |
| 2617 | * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note |
| 2618 | * that the copy process would be relatively complex due to the large number |
| 2619 | * of substructures. |
| 2620 | */ |
Benoit Cousson | 01592df | 2010-12-21 21:31:28 -0700 | [diff] [blame] | 2621 | static int __init _register(struct omap_hwmod *oh) |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2622 | { |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2623 | if (!oh || !oh->name || !oh->class || !oh->class->name || |
| 2624 | (oh->_state != _HWMOD_STATE_UNKNOWN)) |
| 2625 | return -EINVAL; |
| 2626 | |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2627 | pr_debug("omap_hwmod: %s: registering\n", oh->name); |
| 2628 | |
Benoit Cousson | ce35b24 | 2010-12-21 21:31:28 -0700 | [diff] [blame] | 2629 | if (_lookup(oh->name)) |
| 2630 | return -EEXIST; |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2631 | |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2632 | list_add_tail(&oh->node, &omap_hwmod_list); |
| 2633 | |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 2634 | INIT_LIST_HEAD(&oh->master_ports); |
| 2635 | INIT_LIST_HEAD(&oh->slave_ports); |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2636 | spin_lock_init(&oh->_lock); |
| 2637 | |
| 2638 | oh->_state = _HWMOD_STATE_REGISTERED; |
| 2639 | |
Paul Walmsley | 569edd70 | 2011-02-23 00:14:06 -0700 | [diff] [blame] | 2640 | /* |
| 2641 | * XXX Rather than doing a strcmp(), this should test a flag |
| 2642 | * set in the hwmod data, inserted by the autogenerator code. |
| 2643 | */ |
| 2644 | if (!strcmp(oh->name, MPU_INITIATOR_NAME)) |
| 2645 | mpu_oh = oh; |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2646 | |
Paul Walmsley | 569edd70 | 2011-02-23 00:14:06 -0700 | [diff] [blame] | 2647 | return 0; |
Benoit Cousson | 0102b62 | 2010-12-21 21:31:27 -0700 | [diff] [blame] | 2648 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2649 | |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 2650 | /** |
| 2651 | * _alloc_links - return allocated memory for hwmod links |
| 2652 | * @ml: pointer to a struct omap_hwmod_link * for the master link |
| 2653 | * @sl: pointer to a struct omap_hwmod_link * for the slave link |
| 2654 | * |
| 2655 | * Return pointers to two struct omap_hwmod_link records, via the |
| 2656 | * addresses pointed to by @ml and @sl. Will first attempt to return |
| 2657 | * memory allocated as part of a large initial block, but if that has |
| 2658 | * been exhausted, will allocate memory itself. Since ideally this |
| 2659 | * second allocation path will never occur, the number of these |
| 2660 | * 'supplemental' allocations will be logged when debugging is |
| 2661 | * enabled. Returns 0. |
| 2662 | */ |
| 2663 | static int __init _alloc_links(struct omap_hwmod_link **ml, |
| 2664 | struct omap_hwmod_link **sl) |
| 2665 | { |
| 2666 | unsigned int sz; |
| 2667 | |
| 2668 | if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) { |
| 2669 | *ml = &linkspace[free_ls++]; |
| 2670 | *sl = &linkspace[free_ls++]; |
| 2671 | return 0; |
| 2672 | } |
| 2673 | |
| 2674 | sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF; |
| 2675 | |
| 2676 | *sl = NULL; |
| 2677 | *ml = alloc_bootmem(sz); |
| 2678 | |
| 2679 | memset(*ml, 0, sz); |
| 2680 | |
| 2681 | *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link); |
| 2682 | |
| 2683 | ls_supp++; |
| 2684 | pr_debug("omap_hwmod: supplemental link allocations needed: %d\n", |
| 2685 | ls_supp * LINKS_PER_OCP_IF); |
| 2686 | |
| 2687 | return 0; |
| 2688 | }; |
| 2689 | |
| 2690 | /** |
| 2691 | * _add_link - add an interconnect between two IP blocks |
| 2692 | * @oi: pointer to a struct omap_hwmod_ocp_if record |
| 2693 | * |
| 2694 | * Add struct omap_hwmod_link records connecting the master IP block |
| 2695 | * specified in @oi->master to @oi, and connecting the slave IP block |
| 2696 | * specified in @oi->slave to @oi. This code is assumed to run before |
| 2697 | * preemption or SMP has been enabled, thus avoiding the need for |
| 2698 | * locking in this code. Changes to this assumption will require |
| 2699 | * additional locking. Returns 0. |
| 2700 | */ |
| 2701 | static int __init _add_link(struct omap_hwmod_ocp_if *oi) |
| 2702 | { |
| 2703 | struct omap_hwmod_link *ml, *sl; |
| 2704 | |
| 2705 | pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name, |
| 2706 | oi->slave->name); |
| 2707 | |
| 2708 | _alloc_links(&ml, &sl); |
| 2709 | |
| 2710 | ml->ocp_if = oi; |
| 2711 | INIT_LIST_HEAD(&ml->node); |
| 2712 | list_add(&ml->node, &oi->master->master_ports); |
| 2713 | oi->master->masters_cnt++; |
| 2714 | |
| 2715 | sl->ocp_if = oi; |
| 2716 | INIT_LIST_HEAD(&sl->node); |
| 2717 | list_add(&sl->node, &oi->slave->slave_ports); |
| 2718 | oi->slave->slaves_cnt++; |
| 2719 | |
| 2720 | return 0; |
| 2721 | } |
| 2722 | |
| 2723 | /** |
| 2724 | * _register_link - register a struct omap_hwmod_ocp_if |
| 2725 | * @oi: struct omap_hwmod_ocp_if * |
| 2726 | * |
| 2727 | * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it |
| 2728 | * has already been registered; -EINVAL if @oi is NULL or if the |
| 2729 | * record pointed to by @oi is missing required fields; or 0 upon |
| 2730 | * success. |
| 2731 | * |
| 2732 | * XXX The data should be copied into bootmem, so the original data |
| 2733 | * should be marked __initdata and freed after init. This would allow |
| 2734 | * unneeded omap_hwmods to be freed on multi-OMAP configurations. |
| 2735 | */ |
| 2736 | static int __init _register_link(struct omap_hwmod_ocp_if *oi) |
| 2737 | { |
| 2738 | if (!oi || !oi->master || !oi->slave || !oi->user) |
| 2739 | return -EINVAL; |
| 2740 | |
| 2741 | if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED) |
| 2742 | return -EEXIST; |
| 2743 | |
| 2744 | pr_debug("omap_hwmod: registering link from %s to %s\n", |
| 2745 | oi->master->name, oi->slave->name); |
| 2746 | |
| 2747 | /* |
| 2748 | * Register the connected hwmods, if they haven't been |
| 2749 | * registered already |
| 2750 | */ |
| 2751 | if (oi->master->_state != _HWMOD_STATE_REGISTERED) |
| 2752 | _register(oi->master); |
| 2753 | |
| 2754 | if (oi->slave->_state != _HWMOD_STATE_REGISTERED) |
| 2755 | _register(oi->slave); |
| 2756 | |
| 2757 | _add_link(oi); |
| 2758 | |
| 2759 | oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED; |
| 2760 | |
| 2761 | return 0; |
| 2762 | } |
| 2763 | |
| 2764 | /** |
| 2765 | * _alloc_linkspace - allocate large block of hwmod links |
| 2766 | * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count |
| 2767 | * |
| 2768 | * Allocate a large block of struct omap_hwmod_link records. This |
| 2769 | * improves boot time significantly by avoiding the need to allocate |
| 2770 | * individual records one by one. If the number of records to |
| 2771 | * allocate in the block hasn't been manually specified, this function |
| 2772 | * will count the number of struct omap_hwmod_ocp_if records in @ois |
| 2773 | * and use that to determine the allocation size. For SoC families |
| 2774 | * that require multiple list registrations, such as OMAP3xxx, this |
| 2775 | * estimation process isn't optimal, so manual estimation is advised |
| 2776 | * in those cases. Returns -EEXIST if the allocation has already occurred |
| 2777 | * or 0 upon success. |
| 2778 | */ |
| 2779 | static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois) |
| 2780 | { |
| 2781 | unsigned int i = 0; |
| 2782 | unsigned int sz; |
| 2783 | |
| 2784 | if (linkspace) { |
| 2785 | WARN(1, "linkspace already allocated\n"); |
| 2786 | return -EEXIST; |
| 2787 | } |
| 2788 | |
| 2789 | if (max_ls == 0) |
| 2790 | while (ois[i++]) |
| 2791 | max_ls += LINKS_PER_OCP_IF; |
| 2792 | |
| 2793 | sz = sizeof(struct omap_hwmod_link) * max_ls; |
| 2794 | |
| 2795 | pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n", |
| 2796 | __func__, sz, max_ls); |
| 2797 | |
| 2798 | linkspace = alloc_bootmem(sz); |
| 2799 | |
| 2800 | memset(linkspace, 0, sz); |
| 2801 | |
| 2802 | return 0; |
| 2803 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 2804 | |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2805 | /* Static functions intended only for use in soc_ops field function pointers */ |
| 2806 | |
| 2807 | /** |
Paul Walmsley | ff4ae5d | 2012-10-21 01:01:11 -0600 | [diff] [blame] | 2808 | * _omap2xxx_wait_target_ready - wait for a module to leave slave idle |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2809 | * @oh: struct omap_hwmod * |
| 2810 | * |
| 2811 | * Wait for a module @oh to leave slave idle. Returns 0 if the module |
| 2812 | * does not have an IDLEST bit or if the module successfully leaves |
| 2813 | * slave idle; otherwise, pass along the return value of the |
| 2814 | * appropriate *_cm*_wait_module_ready() function. |
| 2815 | */ |
Paul Walmsley | ff4ae5d | 2012-10-21 01:01:11 -0600 | [diff] [blame] | 2816 | static int _omap2xxx_wait_target_ready(struct omap_hwmod *oh) |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2817 | { |
| 2818 | if (!oh) |
| 2819 | return -EINVAL; |
| 2820 | |
| 2821 | if (oh->flags & HWMOD_NO_IDLEST) |
| 2822 | return 0; |
| 2823 | |
| 2824 | if (!_find_mpu_rt_port(oh)) |
| 2825 | return 0; |
| 2826 | |
| 2827 | /* XXX check module SIDLEMODE, hardreset status, enabled clocks */ |
| 2828 | |
Paul Walmsley | ff4ae5d | 2012-10-21 01:01:11 -0600 | [diff] [blame] | 2829 | return omap2xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs, |
| 2830 | oh->prcm.omap2.idlest_reg_id, |
| 2831 | oh->prcm.omap2.idlest_idle_bit); |
| 2832 | } |
| 2833 | |
| 2834 | /** |
| 2835 | * _omap3xxx_wait_target_ready - wait for a module to leave slave idle |
| 2836 | * @oh: struct omap_hwmod * |
| 2837 | * |
| 2838 | * Wait for a module @oh to leave slave idle. Returns 0 if the module |
| 2839 | * does not have an IDLEST bit or if the module successfully leaves |
| 2840 | * slave idle; otherwise, pass along the return value of the |
| 2841 | * appropriate *_cm*_wait_module_ready() function. |
| 2842 | */ |
| 2843 | static int _omap3xxx_wait_target_ready(struct omap_hwmod *oh) |
| 2844 | { |
| 2845 | if (!oh) |
| 2846 | return -EINVAL; |
| 2847 | |
| 2848 | if (oh->flags & HWMOD_NO_IDLEST) |
| 2849 | return 0; |
| 2850 | |
| 2851 | if (!_find_mpu_rt_port(oh)) |
| 2852 | return 0; |
| 2853 | |
| 2854 | /* XXX check module SIDLEMODE, hardreset status, enabled clocks */ |
| 2855 | |
| 2856 | return omap3xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs, |
| 2857 | oh->prcm.omap2.idlest_reg_id, |
| 2858 | oh->prcm.omap2.idlest_idle_bit); |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2859 | } |
| 2860 | |
| 2861 | /** |
| 2862 | * _omap4_wait_target_ready - wait for a module to leave slave idle |
| 2863 | * @oh: struct omap_hwmod * |
| 2864 | * |
| 2865 | * Wait for a module @oh to leave slave idle. Returns 0 if the module |
| 2866 | * does not have an IDLEST bit or if the module successfully leaves |
| 2867 | * slave idle; otherwise, pass along the return value of the |
| 2868 | * appropriate *_cm*_wait_module_ready() function. |
| 2869 | */ |
| 2870 | static int _omap4_wait_target_ready(struct omap_hwmod *oh) |
| 2871 | { |
Paul Walmsley | 2b026d1 | 2012-09-23 17:28:18 -0600 | [diff] [blame] | 2872 | if (!oh) |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2873 | return -EINVAL; |
| 2874 | |
Paul Walmsley | 2b026d1 | 2012-09-23 17:28:18 -0600 | [diff] [blame] | 2875 | if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm) |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2876 | return 0; |
| 2877 | |
| 2878 | if (!_find_mpu_rt_port(oh)) |
| 2879 | return 0; |
| 2880 | |
| 2881 | /* XXX check module SIDLEMODE, hardreset status */ |
| 2882 | |
| 2883 | return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition, |
| 2884 | oh->clkdm->cm_inst, |
| 2885 | oh->clkdm->clkdm_offs, |
| 2886 | oh->prcm.omap4.clkctrl_offs); |
| 2887 | } |
| 2888 | |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2889 | /** |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 2890 | * _am33xx_wait_target_ready - wait for a module to leave slave idle |
| 2891 | * @oh: struct omap_hwmod * |
| 2892 | * |
| 2893 | * Wait for a module @oh to leave slave idle. Returns 0 if the module |
| 2894 | * does not have an IDLEST bit or if the module successfully leaves |
| 2895 | * slave idle; otherwise, pass along the return value of the |
| 2896 | * appropriate *_cm*_wait_module_ready() function. |
| 2897 | */ |
| 2898 | static int _am33xx_wait_target_ready(struct omap_hwmod *oh) |
| 2899 | { |
| 2900 | if (!oh || !oh->clkdm) |
| 2901 | return -EINVAL; |
| 2902 | |
| 2903 | if (oh->flags & HWMOD_NO_IDLEST) |
| 2904 | return 0; |
| 2905 | |
| 2906 | if (!_find_mpu_rt_port(oh)) |
| 2907 | return 0; |
| 2908 | |
| 2909 | /* XXX check module SIDLEMODE, hardreset status */ |
| 2910 | |
| 2911 | return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst, |
| 2912 | oh->clkdm->clkdm_offs, |
| 2913 | oh->prcm.omap4.clkctrl_offs); |
| 2914 | } |
| 2915 | |
| 2916 | /** |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2917 | * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args |
| 2918 | * @oh: struct omap_hwmod * to assert hardreset |
| 2919 | * @ohri: hardreset line data |
| 2920 | * |
| 2921 | * Call omap2_prm_assert_hardreset() with parameters extracted from |
| 2922 | * the hwmod @oh and the hardreset line data @ohri. Only intended for |
| 2923 | * use as an soc_ops function pointer. Passes along the return value |
| 2924 | * from omap2_prm_assert_hardreset(). XXX This function is scheduled |
| 2925 | * for removal when the PRM code is moved into drivers/. |
| 2926 | */ |
| 2927 | static int _omap2_assert_hardreset(struct omap_hwmod *oh, |
| 2928 | struct omap_hwmod_rst_info *ohri) |
| 2929 | { |
| 2930 | return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs, |
| 2931 | ohri->rst_shift); |
| 2932 | } |
| 2933 | |
| 2934 | /** |
| 2935 | * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args |
| 2936 | * @oh: struct omap_hwmod * to deassert hardreset |
| 2937 | * @ohri: hardreset line data |
| 2938 | * |
| 2939 | * Call omap2_prm_deassert_hardreset() with parameters extracted from |
| 2940 | * the hwmod @oh and the hardreset line data @ohri. Only intended for |
| 2941 | * use as an soc_ops function pointer. Passes along the return value |
| 2942 | * from omap2_prm_deassert_hardreset(). XXX This function is |
| 2943 | * scheduled for removal when the PRM code is moved into drivers/. |
| 2944 | */ |
| 2945 | static int _omap2_deassert_hardreset(struct omap_hwmod *oh, |
| 2946 | struct omap_hwmod_rst_info *ohri) |
| 2947 | { |
| 2948 | return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs, |
| 2949 | ohri->rst_shift, |
| 2950 | ohri->st_shift); |
| 2951 | } |
| 2952 | |
| 2953 | /** |
| 2954 | * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args |
| 2955 | * @oh: struct omap_hwmod * to test hardreset |
| 2956 | * @ohri: hardreset line data |
| 2957 | * |
| 2958 | * Call omap2_prm_is_hardreset_asserted() with parameters extracted |
| 2959 | * from the hwmod @oh and the hardreset line data @ohri. Only |
| 2960 | * intended for use as an soc_ops function pointer. Passes along the |
| 2961 | * return value from omap2_prm_is_hardreset_asserted(). XXX This |
| 2962 | * function is scheduled for removal when the PRM code is moved into |
| 2963 | * drivers/. |
| 2964 | */ |
| 2965 | static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh, |
| 2966 | struct omap_hwmod_rst_info *ohri) |
| 2967 | { |
| 2968 | return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs, |
| 2969 | ohri->st_shift); |
| 2970 | } |
| 2971 | |
| 2972 | /** |
| 2973 | * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args |
| 2974 | * @oh: struct omap_hwmod * to assert hardreset |
| 2975 | * @ohri: hardreset line data |
| 2976 | * |
| 2977 | * Call omap4_prminst_assert_hardreset() with parameters extracted |
| 2978 | * from the hwmod @oh and the hardreset line data @ohri. Only |
| 2979 | * intended for use as an soc_ops function pointer. Passes along the |
| 2980 | * return value from omap4_prminst_assert_hardreset(). XXX This |
| 2981 | * function is scheduled for removal when the PRM code is moved into |
| 2982 | * drivers/. |
| 2983 | */ |
| 2984 | static int _omap4_assert_hardreset(struct omap_hwmod *oh, |
| 2985 | struct omap_hwmod_rst_info *ohri) |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2986 | { |
Paul Walmsley | 07b3a13 | 2012-06-20 20:11:36 -0600 | [diff] [blame] | 2987 | if (!oh->clkdm) |
| 2988 | return -EINVAL; |
| 2989 | |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 2990 | return omap4_prminst_assert_hardreset(ohri->rst_shift, |
| 2991 | oh->clkdm->pwrdm.ptr->prcm_partition, |
| 2992 | oh->clkdm->pwrdm.ptr->prcm_offs, |
| 2993 | oh->prcm.omap4.rstctrl_offs); |
| 2994 | } |
| 2995 | |
| 2996 | /** |
| 2997 | * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args |
| 2998 | * @oh: struct omap_hwmod * to deassert hardreset |
| 2999 | * @ohri: hardreset line data |
| 3000 | * |
| 3001 | * Call omap4_prminst_deassert_hardreset() with parameters extracted |
| 3002 | * from the hwmod @oh and the hardreset line data @ohri. Only |
| 3003 | * intended for use as an soc_ops function pointer. Passes along the |
| 3004 | * return value from omap4_prminst_deassert_hardreset(). XXX This |
| 3005 | * function is scheduled for removal when the PRM code is moved into |
| 3006 | * drivers/. |
| 3007 | */ |
| 3008 | static int _omap4_deassert_hardreset(struct omap_hwmod *oh, |
| 3009 | struct omap_hwmod_rst_info *ohri) |
| 3010 | { |
Paul Walmsley | 07b3a13 | 2012-06-20 20:11:36 -0600 | [diff] [blame] | 3011 | if (!oh->clkdm) |
| 3012 | return -EINVAL; |
| 3013 | |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 3014 | if (ohri->st_shift) |
| 3015 | pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n", |
| 3016 | oh->name, ohri->name); |
| 3017 | return omap4_prminst_deassert_hardreset(ohri->rst_shift, |
| 3018 | oh->clkdm->pwrdm.ptr->prcm_partition, |
| 3019 | oh->clkdm->pwrdm.ptr->prcm_offs, |
| 3020 | oh->prcm.omap4.rstctrl_offs); |
| 3021 | } |
| 3022 | |
| 3023 | /** |
| 3024 | * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args |
| 3025 | * @oh: struct omap_hwmod * to test hardreset |
| 3026 | * @ohri: hardreset line data |
| 3027 | * |
| 3028 | * Call omap4_prminst_is_hardreset_asserted() with parameters |
| 3029 | * extracted from the hwmod @oh and the hardreset line data @ohri. |
| 3030 | * Only intended for use as an soc_ops function pointer. Passes along |
| 3031 | * the return value from omap4_prminst_is_hardreset_asserted(). XXX |
| 3032 | * This function is scheduled for removal when the PRM code is moved |
| 3033 | * into drivers/. |
| 3034 | */ |
| 3035 | static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh, |
| 3036 | struct omap_hwmod_rst_info *ohri) |
| 3037 | { |
Paul Walmsley | 07b3a13 | 2012-06-20 20:11:36 -0600 | [diff] [blame] | 3038 | if (!oh->clkdm) |
| 3039 | return -EINVAL; |
| 3040 | |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 3041 | return omap4_prminst_is_hardreset_asserted(ohri->rst_shift, |
| 3042 | oh->clkdm->pwrdm.ptr->prcm_partition, |
| 3043 | oh->clkdm->pwrdm.ptr->prcm_offs, |
| 3044 | oh->prcm.omap4.rstctrl_offs); |
| 3045 | } |
| 3046 | |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 3047 | /** |
| 3048 | * _am33xx_assert_hardreset - call AM33XX PRM hardreset fn with hwmod args |
| 3049 | * @oh: struct omap_hwmod * to assert hardreset |
| 3050 | * @ohri: hardreset line data |
| 3051 | * |
| 3052 | * Call am33xx_prminst_assert_hardreset() with parameters extracted |
| 3053 | * from the hwmod @oh and the hardreset line data @ohri. Only |
| 3054 | * intended for use as an soc_ops function pointer. Passes along the |
| 3055 | * return value from am33xx_prminst_assert_hardreset(). XXX This |
| 3056 | * function is scheduled for removal when the PRM code is moved into |
| 3057 | * drivers/. |
| 3058 | */ |
| 3059 | static int _am33xx_assert_hardreset(struct omap_hwmod *oh, |
| 3060 | struct omap_hwmod_rst_info *ohri) |
| 3061 | |
| 3062 | { |
| 3063 | return am33xx_prm_assert_hardreset(ohri->rst_shift, |
| 3064 | oh->clkdm->pwrdm.ptr->prcm_offs, |
| 3065 | oh->prcm.omap4.rstctrl_offs); |
| 3066 | } |
| 3067 | |
| 3068 | /** |
| 3069 | * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args |
| 3070 | * @oh: struct omap_hwmod * to deassert hardreset |
| 3071 | * @ohri: hardreset line data |
| 3072 | * |
| 3073 | * Call am33xx_prminst_deassert_hardreset() with parameters extracted |
| 3074 | * from the hwmod @oh and the hardreset line data @ohri. Only |
| 3075 | * intended for use as an soc_ops function pointer. Passes along the |
| 3076 | * return value from am33xx_prminst_deassert_hardreset(). XXX This |
| 3077 | * function is scheduled for removal when the PRM code is moved into |
| 3078 | * drivers/. |
| 3079 | */ |
| 3080 | static int _am33xx_deassert_hardreset(struct omap_hwmod *oh, |
| 3081 | struct omap_hwmod_rst_info *ohri) |
| 3082 | { |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 3083 | return am33xx_prm_deassert_hardreset(ohri->rst_shift, |
Vaibhav Bedia | 3c06f1b | 2013-01-29 16:45:06 +0530 | [diff] [blame] | 3084 | ohri->st_shift, |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 3085 | oh->clkdm->pwrdm.ptr->prcm_offs, |
| 3086 | oh->prcm.omap4.rstctrl_offs, |
| 3087 | oh->prcm.omap4.rstst_offs); |
| 3088 | } |
| 3089 | |
| 3090 | /** |
| 3091 | * _am33xx_is_hardreset_asserted - call AM33XX PRM hardreset fn with hwmod args |
| 3092 | * @oh: struct omap_hwmod * to test hardreset |
| 3093 | * @ohri: hardreset line data |
| 3094 | * |
| 3095 | * Call am33xx_prminst_is_hardreset_asserted() with parameters |
| 3096 | * extracted from the hwmod @oh and the hardreset line data @ohri. |
| 3097 | * Only intended for use as an soc_ops function pointer. Passes along |
| 3098 | * the return value from am33xx_prminst_is_hardreset_asserted(). XXX |
| 3099 | * This function is scheduled for removal when the PRM code is moved |
| 3100 | * into drivers/. |
| 3101 | */ |
| 3102 | static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh, |
| 3103 | struct omap_hwmod_rst_info *ohri) |
| 3104 | { |
| 3105 | return am33xx_prm_is_hardreset_asserted(ohri->rst_shift, |
| 3106 | oh->clkdm->pwrdm.ptr->prcm_offs, |
| 3107 | oh->prcm.omap4.rstctrl_offs); |
| 3108 | } |
| 3109 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3110 | /* Public functions */ |
| 3111 | |
Rajendra Nayak | cc7a1d2 | 2010-10-08 10:23:22 -0700 | [diff] [blame] | 3112 | u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3113 | { |
Rajendra Nayak | cc7a1d2 | 2010-10-08 10:23:22 -0700 | [diff] [blame] | 3114 | if (oh->flags & HWMOD_16BIT_REG) |
| 3115 | return __raw_readw(oh->_mpu_rt_va + reg_offs); |
| 3116 | else |
| 3117 | return __raw_readl(oh->_mpu_rt_va + reg_offs); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3118 | } |
| 3119 | |
Rajendra Nayak | cc7a1d2 | 2010-10-08 10:23:22 -0700 | [diff] [blame] | 3120 | void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3121 | { |
Rajendra Nayak | cc7a1d2 | 2010-10-08 10:23:22 -0700 | [diff] [blame] | 3122 | if (oh->flags & HWMOD_16BIT_REG) |
| 3123 | __raw_writew(v, oh->_mpu_rt_va + reg_offs); |
| 3124 | else |
| 3125 | __raw_writel(v, oh->_mpu_rt_va + reg_offs); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3126 | } |
| 3127 | |
Paul Walmsley | 887adea | 2010-07-26 16:34:33 -0600 | [diff] [blame] | 3128 | /** |
Avinash.H.M | 6d3c55f | 2011-07-10 05:27:16 -0600 | [diff] [blame] | 3129 | * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit |
| 3130 | * @oh: struct omap_hwmod * |
| 3131 | * |
| 3132 | * This is a public function exposed to drivers. Some drivers may need to do |
| 3133 | * some settings before and after resetting the device. Those drivers after |
| 3134 | * doing the necessary settings could use this function to start a reset by |
| 3135 | * setting the SYSCONFIG.SOFTRESET bit. |
| 3136 | */ |
| 3137 | int omap_hwmod_softreset(struct omap_hwmod *oh) |
| 3138 | { |
Paul Walmsley | 3c55c1b | 2012-04-13 05:08:43 -0600 | [diff] [blame] | 3139 | u32 v; |
| 3140 | int ret; |
| 3141 | |
| 3142 | if (!oh || !(oh->_sysc_cache)) |
Avinash.H.M | 6d3c55f | 2011-07-10 05:27:16 -0600 | [diff] [blame] | 3143 | return -EINVAL; |
| 3144 | |
Paul Walmsley | 3c55c1b | 2012-04-13 05:08:43 -0600 | [diff] [blame] | 3145 | v = oh->_sysc_cache; |
| 3146 | ret = _set_softreset(oh, &v); |
| 3147 | if (ret) |
| 3148 | goto error; |
| 3149 | _write_sysconfig(v, oh); |
| 3150 | |
| 3151 | error: |
| 3152 | return ret; |
Avinash.H.M | 6d3c55f | 2011-07-10 05:27:16 -0600 | [diff] [blame] | 3153 | } |
| 3154 | |
| 3155 | /** |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3156 | * omap_hwmod_lookup - look up a registered omap_hwmod by name |
| 3157 | * @name: name of the omap_hwmod to look up |
| 3158 | * |
| 3159 | * Given a @name of an omap_hwmod, return a pointer to the registered |
| 3160 | * struct omap_hwmod *, or NULL upon error. |
| 3161 | */ |
| 3162 | struct omap_hwmod *omap_hwmod_lookup(const char *name) |
| 3163 | { |
| 3164 | struct omap_hwmod *oh; |
| 3165 | |
| 3166 | if (!name) |
| 3167 | return NULL; |
| 3168 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3169 | oh = _lookup(name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3170 | |
| 3171 | return oh; |
| 3172 | } |
| 3173 | |
| 3174 | /** |
| 3175 | * omap_hwmod_for_each - call function for each registered omap_hwmod |
| 3176 | * @fn: pointer to a callback function |
Paul Walmsley | 97d6016 | 2010-07-26 16:34:30 -0600 | [diff] [blame] | 3177 | * @data: void * data to pass to callback function |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3178 | * |
| 3179 | * Call @fn for each registered omap_hwmod, passing @data to each |
| 3180 | * function. @fn must return 0 for success or any other value for |
| 3181 | * failure. If @fn returns non-zero, the iteration across omap_hwmods |
| 3182 | * will stop and the non-zero return value will be passed to the |
| 3183 | * caller of omap_hwmod_for_each(). @fn is called with |
| 3184 | * omap_hwmod_for_each() held. |
| 3185 | */ |
Paul Walmsley | 97d6016 | 2010-07-26 16:34:30 -0600 | [diff] [blame] | 3186 | int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data), |
| 3187 | void *data) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3188 | { |
| 3189 | struct omap_hwmod *temp_oh; |
Govindraj.R | 30ebad9 | 2011-06-01 11:28:56 +0530 | [diff] [blame] | 3190 | int ret = 0; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3191 | |
| 3192 | if (!fn) |
| 3193 | return -EINVAL; |
| 3194 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3195 | list_for_each_entry(temp_oh, &omap_hwmod_list, node) { |
Paul Walmsley | 97d6016 | 2010-07-26 16:34:30 -0600 | [diff] [blame] | 3196 | ret = (*fn)(temp_oh, data); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3197 | if (ret) |
| 3198 | break; |
| 3199 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3200 | |
| 3201 | return ret; |
| 3202 | } |
| 3203 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3204 | /** |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 3205 | * omap_hwmod_register_links - register an array of hwmod links |
| 3206 | * @ois: pointer to an array of omap_hwmod_ocp_if to register |
| 3207 | * |
| 3208 | * Intended to be called early in boot before the clock framework is |
| 3209 | * initialized. If @ois is not null, will register all omap_hwmods |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 3210 | * listed in @ois that are valid for this chip. Returns -EINVAL if |
| 3211 | * omap_hwmod_init() hasn't been called before calling this function, |
| 3212 | * -ENOMEM if the link memory area can't be allocated, or 0 upon |
| 3213 | * success. |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 3214 | */ |
| 3215 | int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois) |
| 3216 | { |
| 3217 | int r, i; |
| 3218 | |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 3219 | if (!inited) |
| 3220 | return -EINVAL; |
| 3221 | |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 3222 | if (!ois) |
| 3223 | return 0; |
| 3224 | |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 3225 | if (!linkspace) { |
| 3226 | if (_alloc_linkspace(ois)) { |
| 3227 | pr_err("omap_hwmod: could not allocate link space\n"); |
| 3228 | return -ENOMEM; |
| 3229 | } |
| 3230 | } |
| 3231 | |
| 3232 | i = 0; |
| 3233 | do { |
| 3234 | r = _register_link(ois[i]); |
| 3235 | WARN(r && r != -EEXIST, |
| 3236 | "omap_hwmod: _register_link(%s -> %s) returned %d\n", |
| 3237 | ois[i]->master->name, ois[i]->slave->name, r); |
| 3238 | } while (ois[++i]); |
| 3239 | |
| 3240 | return 0; |
| 3241 | } |
| 3242 | |
| 3243 | /** |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3244 | * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up |
| 3245 | * @oh: pointer to the hwmod currently being set up (usually not the MPU) |
Tony Lindgren | e7c7d76 | 2011-02-14 15:40:21 -0800 | [diff] [blame] | 3246 | * |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3247 | * If the hwmod data corresponding to the MPU subsystem IP block |
| 3248 | * hasn't been initialized and set up yet, do so now. This must be |
| 3249 | * done first since sleep dependencies may be added from other hwmods |
| 3250 | * to the MPU. Intended to be called only by omap_hwmod_setup*(). No |
| 3251 | * return value. |
Tony Lindgren | e7c7d76 | 2011-02-14 15:40:21 -0800 | [diff] [blame] | 3252 | */ |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3253 | static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh) |
Tony Lindgren | e7c7d76 | 2011-02-14 15:40:21 -0800 | [diff] [blame] | 3254 | { |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3255 | if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN) |
| 3256 | pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n", |
| 3257 | __func__, MPU_INITIATOR_NAME); |
| 3258 | else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh) |
| 3259 | omap_hwmod_setup_one(MPU_INITIATOR_NAME); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3260 | } |
| 3261 | |
| 3262 | /** |
Paul Walmsley | a2debdb | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 3263 | * omap_hwmod_setup_one - set up a single hwmod |
| 3264 | * @oh_name: const char * name of the already-registered hwmod to set up |
| 3265 | * |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3266 | * Initialize and set up a single hwmod. Intended to be used for a |
| 3267 | * small number of early devices, such as the timer IP blocks used for |
| 3268 | * the scheduler clock. Must be called after omap2_clk_init(). |
| 3269 | * Resolves the struct clk names to struct clk pointers for each |
| 3270 | * registered omap_hwmod. Also calls _setup() on each hwmod. Returns |
| 3271 | * -EINVAL upon error or 0 upon success. |
Paul Walmsley | a2debdb | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 3272 | */ |
| 3273 | int __init omap_hwmod_setup_one(const char *oh_name) |
| 3274 | { |
| 3275 | struct omap_hwmod *oh; |
Paul Walmsley | a2debdb | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 3276 | |
| 3277 | pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__); |
| 3278 | |
Paul Walmsley | a2debdb | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 3279 | oh = _lookup(oh_name); |
| 3280 | if (!oh) { |
| 3281 | WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name); |
| 3282 | return -EINVAL; |
| 3283 | } |
| 3284 | |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3285 | _ensure_mpu_hwmod_is_setup(oh); |
Paul Walmsley | a2debdb | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 3286 | |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3287 | _init(oh, NULL); |
Paul Walmsley | a2debdb | 2011-02-23 00:14:07 -0700 | [diff] [blame] | 3288 | _setup(oh, NULL); |
| 3289 | |
| 3290 | return 0; |
| 3291 | } |
| 3292 | |
| 3293 | /** |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3294 | * omap_hwmod_setup_all - set up all registered IP blocks |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3295 | * |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3296 | * Initialize and set up all IP blocks registered with the hwmod code. |
| 3297 | * Must be called after omap2_clk_init(). Resolves the struct clk |
| 3298 | * names to struct clk pointers for each registered omap_hwmod. Also |
| 3299 | * calls _setup() on each hwmod. Returns 0 upon success. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3300 | */ |
Paul Walmsley | 550c809 | 2011-02-28 11:58:14 -0700 | [diff] [blame] | 3301 | static int __init omap_hwmod_setup_all(void) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3302 | { |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3303 | _ensure_mpu_hwmod_is_setup(NULL); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3304 | |
Paul Walmsley | 381d033 | 2012-04-19 00:58:22 -0600 | [diff] [blame] | 3305 | omap_hwmod_for_each(_init, NULL); |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3306 | omap_hwmod_for_each(_setup, NULL); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3307 | |
| 3308 | return 0; |
| 3309 | } |
Tony Lindgren | b76c8b1 | 2013-01-11 11:24:18 -0800 | [diff] [blame] | 3310 | omap_core_initcall(omap_hwmod_setup_all); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3311 | |
| 3312 | /** |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3313 | * omap_hwmod_enable - enable an omap_hwmod |
| 3314 | * @oh: struct omap_hwmod * |
| 3315 | * |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 3316 | * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable(). |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3317 | * Returns -EINVAL on error or passes along the return value from _enable(). |
| 3318 | */ |
| 3319 | int omap_hwmod_enable(struct omap_hwmod *oh) |
| 3320 | { |
| 3321 | int r; |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3322 | unsigned long flags; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3323 | |
| 3324 | if (!oh) |
| 3325 | return -EINVAL; |
| 3326 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3327 | spin_lock_irqsave(&oh->_lock, flags); |
| 3328 | r = _enable(oh); |
| 3329 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3330 | |
| 3331 | return r; |
| 3332 | } |
| 3333 | |
| 3334 | /** |
| 3335 | * omap_hwmod_idle - idle an omap_hwmod |
| 3336 | * @oh: struct omap_hwmod * |
| 3337 | * |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 3338 | * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle(). |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3339 | * Returns -EINVAL on error or passes along the return value from _idle(). |
| 3340 | */ |
| 3341 | int omap_hwmod_idle(struct omap_hwmod *oh) |
| 3342 | { |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3343 | unsigned long flags; |
| 3344 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3345 | if (!oh) |
| 3346 | return -EINVAL; |
| 3347 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3348 | spin_lock_irqsave(&oh->_lock, flags); |
| 3349 | _idle(oh); |
| 3350 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3351 | |
| 3352 | return 0; |
| 3353 | } |
| 3354 | |
| 3355 | /** |
| 3356 | * omap_hwmod_shutdown - shutdown an omap_hwmod |
| 3357 | * @oh: struct omap_hwmod * |
| 3358 | * |
Paul Walmsley | 74ff3a6 | 2010-09-21 15:02:23 -0600 | [diff] [blame] | 3359 | * Shutdown an omap_hwmod @oh. Intended to be called by |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3360 | * omap_device_shutdown(). Returns -EINVAL on error or passes along |
| 3361 | * the return value from _shutdown(). |
| 3362 | */ |
| 3363 | int omap_hwmod_shutdown(struct omap_hwmod *oh) |
| 3364 | { |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3365 | unsigned long flags; |
| 3366 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3367 | if (!oh) |
| 3368 | return -EINVAL; |
| 3369 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3370 | spin_lock_irqsave(&oh->_lock, flags); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3371 | _shutdown(oh); |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3372 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3373 | |
| 3374 | return 0; |
| 3375 | } |
| 3376 | |
| 3377 | /** |
| 3378 | * omap_hwmod_enable_clocks - enable main_clk, all interface clocks |
| 3379 | * @oh: struct omap_hwmod *oh |
| 3380 | * |
| 3381 | * Intended to be called by the omap_device code. |
| 3382 | */ |
| 3383 | int omap_hwmod_enable_clocks(struct omap_hwmod *oh) |
| 3384 | { |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3385 | unsigned long flags; |
| 3386 | |
| 3387 | spin_lock_irqsave(&oh->_lock, flags); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3388 | _enable_clocks(oh); |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3389 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3390 | |
| 3391 | return 0; |
| 3392 | } |
| 3393 | |
| 3394 | /** |
| 3395 | * omap_hwmod_disable_clocks - disable main_clk, all interface clocks |
| 3396 | * @oh: struct omap_hwmod *oh |
| 3397 | * |
| 3398 | * Intended to be called by the omap_device code. |
| 3399 | */ |
| 3400 | int omap_hwmod_disable_clocks(struct omap_hwmod *oh) |
| 3401 | { |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3402 | unsigned long flags; |
| 3403 | |
| 3404 | spin_lock_irqsave(&oh->_lock, flags); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3405 | _disable_clocks(oh); |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3406 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3407 | |
| 3408 | return 0; |
| 3409 | } |
| 3410 | |
| 3411 | /** |
| 3412 | * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete |
| 3413 | * @oh: struct omap_hwmod *oh |
| 3414 | * |
| 3415 | * Intended to be called by drivers and core code when all posted |
| 3416 | * writes to a device must complete before continuing further |
| 3417 | * execution (for example, after clearing some device IRQSTATUS |
| 3418 | * register bits) |
| 3419 | * |
| 3420 | * XXX what about targets with multiple OCP threads? |
| 3421 | */ |
| 3422 | void omap_hwmod_ocp_barrier(struct omap_hwmod *oh) |
| 3423 | { |
| 3424 | BUG_ON(!oh); |
| 3425 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 3426 | if (!oh->class->sysc || !oh->class->sysc->sysc_flags) { |
Russell King | 4f8a428 | 2012-02-07 10:59:37 +0000 | [diff] [blame] | 3427 | WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n", |
| 3428 | oh->name); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3429 | return; |
| 3430 | } |
| 3431 | |
| 3432 | /* |
| 3433 | * Forces posted writes to complete on the OCP thread handling |
| 3434 | * register writes |
| 3435 | */ |
Rajendra Nayak | cc7a1d2 | 2010-10-08 10:23:22 -0700 | [diff] [blame] | 3436 | omap_hwmod_read(oh, oh->class->sysc->sysc_offs); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3437 | } |
| 3438 | |
| 3439 | /** |
| 3440 | * omap_hwmod_reset - reset the hwmod |
| 3441 | * @oh: struct omap_hwmod * |
| 3442 | * |
| 3443 | * Under some conditions, a driver may wish to reset the entire device. |
| 3444 | * Called from omap_device code. Returns -EINVAL on error or passes along |
Liam Girdwood | 9b57911 | 2010-09-21 10:34:09 -0600 | [diff] [blame] | 3445 | * the return value from _reset(). |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3446 | */ |
| 3447 | int omap_hwmod_reset(struct omap_hwmod *oh) |
| 3448 | { |
| 3449 | int r; |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3450 | unsigned long flags; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3451 | |
Liam Girdwood | 9b57911 | 2010-09-21 10:34:09 -0600 | [diff] [blame] | 3452 | if (!oh) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3453 | return -EINVAL; |
| 3454 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3455 | spin_lock_irqsave(&oh->_lock, flags); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3456 | r = _reset(oh); |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3457 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3458 | |
| 3459 | return r; |
| 3460 | } |
| 3461 | |
Paul Walmsley | 5e8370f | 2012-04-18 19:10:06 -0600 | [diff] [blame] | 3462 | /* |
| 3463 | * IP block data retrieval functions |
| 3464 | */ |
| 3465 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3466 | /** |
| 3467 | * omap_hwmod_count_resources - count number of struct resources needed by hwmod |
| 3468 | * @oh: struct omap_hwmod * |
Peter Ujfalusi | dad4191 | 2012-11-21 16:15:17 -0700 | [diff] [blame] | 3469 | * @flags: Type of resources to include when counting (IRQ/DMA/MEM) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3470 | * |
| 3471 | * Count the number of struct resource array elements necessary to |
| 3472 | * contain omap_hwmod @oh resources. Intended to be called by code |
| 3473 | * that registers omap_devices. Intended to be used to determine the |
| 3474 | * size of a dynamically-allocated struct resource array, before |
| 3475 | * calling omap_hwmod_fill_resources(). Returns the number of struct |
| 3476 | * resource array elements needed. |
| 3477 | * |
| 3478 | * XXX This code is not optimized. It could attempt to merge adjacent |
| 3479 | * resource IDs. |
| 3480 | * |
| 3481 | */ |
Peter Ujfalusi | dad4191 | 2012-11-21 16:15:17 -0700 | [diff] [blame] | 3482 | int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3483 | { |
Peter Ujfalusi | dad4191 | 2012-11-21 16:15:17 -0700 | [diff] [blame] | 3484 | int ret = 0; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3485 | |
Peter Ujfalusi | dad4191 | 2012-11-21 16:15:17 -0700 | [diff] [blame] | 3486 | if (flags & IORESOURCE_IRQ) |
| 3487 | ret += _count_mpu_irqs(oh); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3488 | |
Peter Ujfalusi | dad4191 | 2012-11-21 16:15:17 -0700 | [diff] [blame] | 3489 | if (flags & IORESOURCE_DMA) |
| 3490 | ret += _count_sdma_reqs(oh); |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 3491 | |
Peter Ujfalusi | dad4191 | 2012-11-21 16:15:17 -0700 | [diff] [blame] | 3492 | if (flags & IORESOURCE_MEM) { |
| 3493 | int i = 0; |
| 3494 | struct omap_hwmod_ocp_if *os; |
| 3495 | struct list_head *p = oh->slave_ports.next; |
| 3496 | |
| 3497 | while (i < oh->slaves_cnt) { |
| 3498 | os = _fetch_next_ocp_if(&p, &i); |
| 3499 | ret += _count_ocp_if_addr_spaces(os); |
| 3500 | } |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 3501 | } |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3502 | |
| 3503 | return ret; |
| 3504 | } |
| 3505 | |
| 3506 | /** |
| 3507 | * omap_hwmod_fill_resources - fill struct resource array with hwmod data |
| 3508 | * @oh: struct omap_hwmod * |
| 3509 | * @res: pointer to the first element of an array of struct resource to fill |
| 3510 | * |
| 3511 | * Fill the struct resource array @res with resource data from the |
| 3512 | * omap_hwmod @oh. Intended to be called by code that registers |
| 3513 | * omap_devices. See also omap_hwmod_count_resources(). Returns the |
| 3514 | * number of array elements filled. |
| 3515 | */ |
| 3516 | int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) |
| 3517 | { |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 3518 | struct omap_hwmod_ocp_if *os; |
Paul Walmsley | 11cd4b9 | 2012-04-19 04:04:32 -0600 | [diff] [blame] | 3519 | struct list_head *p; |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 3520 | int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3521 | int r = 0; |
| 3522 | |
| 3523 | /* For each IRQ, DMA, memory area, fill in array.*/ |
| 3524 | |
Paul Walmsley | 212738a | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 3525 | mpu_irqs_cnt = _count_mpu_irqs(oh); |
| 3526 | for (i = 0; i < mpu_irqs_cnt; i++) { |
Paul Walmsley | 718bfd7 | 2009-12-08 16:34:16 -0700 | [diff] [blame] | 3527 | (res + r)->name = (oh->mpu_irqs + i)->name; |
| 3528 | (res + r)->start = (oh->mpu_irqs + i)->irq; |
| 3529 | (res + r)->end = (oh->mpu_irqs + i)->irq; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3530 | (res + r)->flags = IORESOURCE_IRQ; |
| 3531 | r++; |
| 3532 | } |
| 3533 | |
Paul Walmsley | bc61495 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 3534 | sdma_reqs_cnt = _count_sdma_reqs(oh); |
| 3535 | for (i = 0; i < sdma_reqs_cnt; i++) { |
Benoit Cousson | 9ee9fff | 2010-09-21 10:34:08 -0600 | [diff] [blame] | 3536 | (res + r)->name = (oh->sdma_reqs + i)->name; |
| 3537 | (res + r)->start = (oh->sdma_reqs + i)->dma_req; |
| 3538 | (res + r)->end = (oh->sdma_reqs + i)->dma_req; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3539 | (res + r)->flags = IORESOURCE_DMA; |
| 3540 | r++; |
| 3541 | } |
| 3542 | |
Paul Walmsley | 11cd4b9 | 2012-04-19 04:04:32 -0600 | [diff] [blame] | 3543 | p = oh->slave_ports.next; |
Paul Walmsley | 2221b5c | 2012-04-19 04:04:30 -0600 | [diff] [blame] | 3544 | |
Paul Walmsley | 5d95dde | 2012-04-19 04:04:28 -0600 | [diff] [blame] | 3545 | i = 0; |
| 3546 | while (i < oh->slaves_cnt) { |
Paul Walmsley | 11cd4b9 | 2012-04-19 04:04:32 -0600 | [diff] [blame] | 3547 | os = _fetch_next_ocp_if(&p, &i); |
Paul Walmsley | 78183f3 | 2011-07-09 19:14:05 -0600 | [diff] [blame] | 3548 | addr_cnt = _count_ocp_if_addr_spaces(os); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3549 | |
Paul Walmsley | 78183f3 | 2011-07-09 19:14:05 -0600 | [diff] [blame] | 3550 | for (j = 0; j < addr_cnt; j++) { |
Kishon Vijay Abraham I | cd50380 | 2011-02-24 12:51:45 -0800 | [diff] [blame] | 3551 | (res + r)->name = (os->addr + j)->name; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3552 | (res + r)->start = (os->addr + j)->pa_start; |
| 3553 | (res + r)->end = (os->addr + j)->pa_end; |
| 3554 | (res + r)->flags = IORESOURCE_MEM; |
| 3555 | r++; |
| 3556 | } |
| 3557 | } |
| 3558 | |
| 3559 | return r; |
| 3560 | } |
| 3561 | |
| 3562 | /** |
Vaibhav Hiremath | b82b04e | 2012-08-29 15:18:11 +0530 | [diff] [blame] | 3563 | * omap_hwmod_fill_dma_resources - fill struct resource array with dma data |
| 3564 | * @oh: struct omap_hwmod * |
| 3565 | * @res: pointer to the array of struct resource to fill |
| 3566 | * |
| 3567 | * Fill the struct resource array @res with dma resource data from the |
| 3568 | * omap_hwmod @oh. Intended to be called by code that registers |
| 3569 | * omap_devices. See also omap_hwmod_count_resources(). Returns the |
| 3570 | * number of array elements filled. |
| 3571 | */ |
| 3572 | int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res) |
| 3573 | { |
| 3574 | int i, sdma_reqs_cnt; |
| 3575 | int r = 0; |
| 3576 | |
| 3577 | sdma_reqs_cnt = _count_sdma_reqs(oh); |
| 3578 | for (i = 0; i < sdma_reqs_cnt; i++) { |
| 3579 | (res + r)->name = (oh->sdma_reqs + i)->name; |
| 3580 | (res + r)->start = (oh->sdma_reqs + i)->dma_req; |
| 3581 | (res + r)->end = (oh->sdma_reqs + i)->dma_req; |
| 3582 | (res + r)->flags = IORESOURCE_DMA; |
| 3583 | r++; |
| 3584 | } |
| 3585 | |
| 3586 | return r; |
| 3587 | } |
| 3588 | |
| 3589 | /** |
Paul Walmsley | 5e8370f | 2012-04-18 19:10:06 -0600 | [diff] [blame] | 3590 | * omap_hwmod_get_resource_byname - fetch IP block integration data by name |
| 3591 | * @oh: struct omap_hwmod * to operate on |
| 3592 | * @type: one of the IORESOURCE_* constants from include/linux/ioport.h |
| 3593 | * @name: pointer to the name of the data to fetch (optional) |
| 3594 | * @rsrc: pointer to a struct resource, allocated by the caller |
| 3595 | * |
| 3596 | * Retrieve MPU IRQ, SDMA request line, or address space start/end |
| 3597 | * data for the IP block pointed to by @oh. The data will be filled |
| 3598 | * into a struct resource record pointed to by @rsrc. The struct |
| 3599 | * resource must be allocated by the caller. When @name is non-null, |
| 3600 | * the data associated with the matching entry in the IRQ/SDMA/address |
| 3601 | * space hwmod data arrays will be returned. If @name is null, the |
| 3602 | * first array entry will be returned. Data order is not meaningful |
| 3603 | * in hwmod data, so callers are strongly encouraged to use a non-null |
| 3604 | * @name whenever possible to avoid unpredictable effects if hwmod |
| 3605 | * data is later added that causes data ordering to change. This |
| 3606 | * function is only intended for use by OMAP core code. Device |
| 3607 | * drivers should not call this function - the appropriate bus-related |
| 3608 | * data accessor functions should be used instead. Returns 0 upon |
| 3609 | * success or a negative error code upon error. |
| 3610 | */ |
| 3611 | int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type, |
| 3612 | const char *name, struct resource *rsrc) |
| 3613 | { |
| 3614 | int r; |
| 3615 | unsigned int irq, dma; |
| 3616 | u32 pa_start, pa_end; |
| 3617 | |
| 3618 | if (!oh || !rsrc) |
| 3619 | return -EINVAL; |
| 3620 | |
| 3621 | if (type == IORESOURCE_IRQ) { |
| 3622 | r = _get_mpu_irq_by_name(oh, name, &irq); |
| 3623 | if (r) |
| 3624 | return r; |
| 3625 | |
| 3626 | rsrc->start = irq; |
| 3627 | rsrc->end = irq; |
| 3628 | } else if (type == IORESOURCE_DMA) { |
| 3629 | r = _get_sdma_req_by_name(oh, name, &dma); |
| 3630 | if (r) |
| 3631 | return r; |
| 3632 | |
| 3633 | rsrc->start = dma; |
| 3634 | rsrc->end = dma; |
| 3635 | } else if (type == IORESOURCE_MEM) { |
| 3636 | r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end); |
| 3637 | if (r) |
| 3638 | return r; |
| 3639 | |
| 3640 | rsrc->start = pa_start; |
| 3641 | rsrc->end = pa_end; |
| 3642 | } else { |
| 3643 | return -EINVAL; |
| 3644 | } |
| 3645 | |
| 3646 | rsrc->flags = type; |
| 3647 | rsrc->name = name; |
| 3648 | |
| 3649 | return 0; |
| 3650 | } |
| 3651 | |
| 3652 | /** |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3653 | * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain |
| 3654 | * @oh: struct omap_hwmod * |
| 3655 | * |
| 3656 | * Return the powerdomain pointer associated with the OMAP module |
| 3657 | * @oh's main clock. If @oh does not have a main clk, return the |
| 3658 | * powerdomain associated with the interface clock associated with the |
| 3659 | * module's MPU port. (XXX Perhaps this should use the SDMA port |
| 3660 | * instead?) Returns NULL on error, or a struct powerdomain * on |
| 3661 | * success. |
| 3662 | */ |
| 3663 | struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh) |
| 3664 | { |
| 3665 | struct clk *c; |
Paul Walmsley | 2d6141b | 2012-04-19 04:04:27 -0600 | [diff] [blame] | 3666 | struct omap_hwmod_ocp_if *oi; |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 3667 | struct clockdomain *clkdm; |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 3668 | struct clk_hw_omap *clk; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3669 | |
| 3670 | if (!oh) |
| 3671 | return NULL; |
| 3672 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 3673 | if (oh->clkdm) |
| 3674 | return oh->clkdm->pwrdm.ptr; |
| 3675 | |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3676 | if (oh->_clk) { |
| 3677 | c = oh->_clk; |
| 3678 | } else { |
Paul Walmsley | 2d6141b | 2012-04-19 04:04:27 -0600 | [diff] [blame] | 3679 | oi = _find_mpu_rt_port(oh); |
| 3680 | if (!oi) |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3681 | return NULL; |
Paul Walmsley | 2d6141b | 2012-04-19 04:04:27 -0600 | [diff] [blame] | 3682 | c = oi->_clk; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3683 | } |
| 3684 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 3685 | clk = to_clk_hw_omap(__clk_get_hw(c)); |
| 3686 | clkdm = clk->clkdm; |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 3687 | if (!clkdm) |
Thara Gopinath | d5647c1 | 2010-03-31 04:16:29 -0600 | [diff] [blame] | 3688 | return NULL; |
| 3689 | |
Rajendra Nayak | f5dd3bb | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 3690 | return clkdm->pwrdm.ptr; |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3691 | } |
| 3692 | |
| 3693 | /** |
Paul Walmsley | db2a60b | 2010-07-26 16:34:33 -0600 | [diff] [blame] | 3694 | * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU) |
| 3695 | * @oh: struct omap_hwmod * |
| 3696 | * |
| 3697 | * Returns the virtual address corresponding to the beginning of the |
| 3698 | * module's register target, in the address range that is intended to |
| 3699 | * be used by the MPU. Returns the virtual address upon success or NULL |
| 3700 | * upon error. |
| 3701 | */ |
| 3702 | void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh) |
| 3703 | { |
| 3704 | if (!oh) |
| 3705 | return NULL; |
| 3706 | |
| 3707 | if (oh->_int_flags & _HWMOD_NO_MPU_PORT) |
| 3708 | return NULL; |
| 3709 | |
| 3710 | if (oh->_state == _HWMOD_STATE_UNKNOWN) |
| 3711 | return NULL; |
| 3712 | |
| 3713 | return oh->_mpu_rt_va; |
| 3714 | } |
| 3715 | |
| 3716 | /** |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3717 | * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh |
| 3718 | * @oh: struct omap_hwmod * |
| 3719 | * @init_oh: struct omap_hwmod * (initiator) |
| 3720 | * |
| 3721 | * Add a sleep dependency between the initiator @init_oh and @oh. |
| 3722 | * Intended to be called by DSP/Bridge code via platform_data for the |
| 3723 | * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge |
| 3724 | * code needs to add/del initiator dependencies dynamically |
| 3725 | * before/after accessing a device. Returns the return value from |
| 3726 | * _add_initiator_dep(). |
| 3727 | * |
| 3728 | * XXX Keep a usecount in the clockdomain code |
| 3729 | */ |
| 3730 | int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh, |
| 3731 | struct omap_hwmod *init_oh) |
| 3732 | { |
| 3733 | return _add_initiator_dep(oh, init_oh); |
| 3734 | } |
| 3735 | |
| 3736 | /* |
| 3737 | * XXX what about functions for drivers to save/restore ocp_sysconfig |
| 3738 | * for context save/restore operations? |
| 3739 | */ |
| 3740 | |
| 3741 | /** |
| 3742 | * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh |
| 3743 | * @oh: struct omap_hwmod * |
| 3744 | * @init_oh: struct omap_hwmod * (initiator) |
| 3745 | * |
| 3746 | * Remove a sleep dependency between the initiator @init_oh and @oh. |
| 3747 | * Intended to be called by DSP/Bridge code via platform_data for the |
| 3748 | * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge |
| 3749 | * code needs to add/del initiator dependencies dynamically |
| 3750 | * before/after accessing a device. Returns the return value from |
| 3751 | * _del_initiator_dep(). |
| 3752 | * |
| 3753 | * XXX Keep a usecount in the clockdomain code |
| 3754 | */ |
| 3755 | int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh, |
| 3756 | struct omap_hwmod *init_oh) |
| 3757 | { |
| 3758 | return _del_initiator_dep(oh, init_oh); |
| 3759 | } |
| 3760 | |
| 3761 | /** |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3762 | * omap_hwmod_enable_wakeup - allow device to wake up the system |
| 3763 | * @oh: struct omap_hwmod * |
| 3764 | * |
| 3765 | * Sets the module OCP socket ENAWAKEUP bit to allow the module to |
Govindraj.R | 2a1cc14 | 2012-04-05 02:59:32 -0600 | [diff] [blame] | 3766 | * send wakeups to the PRCM, and enable I/O ring wakeup events for |
| 3767 | * this IP block if it has dynamic mux entries. Eventually this |
| 3768 | * should set PRCM wakeup registers to cause the PRCM to receive |
| 3769 | * wakeup events from the module. Does not set any wakeup routing |
| 3770 | * registers beyond this point - if the module is to wake up any other |
| 3771 | * module or subsystem, that must be set separately. Called by |
| 3772 | * omap_device code. Returns -EINVAL on error or 0 upon success. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3773 | */ |
| 3774 | int omap_hwmod_enable_wakeup(struct omap_hwmod *oh) |
| 3775 | { |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3776 | unsigned long flags; |
Kevin Hilman | 5a7ddcb | 2010-12-21 21:08:34 -0700 | [diff] [blame] | 3777 | u32 v; |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3778 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3779 | spin_lock_irqsave(&oh->_lock, flags); |
Govindraj.R | 2a1cc14 | 2012-04-05 02:59:32 -0600 | [diff] [blame] | 3780 | |
| 3781 | if (oh->class->sysc && |
| 3782 | (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) { |
| 3783 | v = oh->_sysc_cache; |
| 3784 | _enable_wakeup(oh, &v); |
| 3785 | _write_sysconfig(v, oh); |
| 3786 | } |
| 3787 | |
Govindraj R | eceec00 | 2011-12-16 14:36:58 -0700 | [diff] [blame] | 3788 | _set_idle_ioring_wakeup(oh, true); |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3789 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3790 | |
| 3791 | return 0; |
| 3792 | } |
| 3793 | |
| 3794 | /** |
| 3795 | * omap_hwmod_disable_wakeup - prevent device from waking the system |
| 3796 | * @oh: struct omap_hwmod * |
| 3797 | * |
| 3798 | * Clears the module OCP socket ENAWAKEUP bit to prevent the module |
Govindraj.R | 2a1cc14 | 2012-04-05 02:59:32 -0600 | [diff] [blame] | 3799 | * from sending wakeups to the PRCM, and disable I/O ring wakeup |
| 3800 | * events for this IP block if it has dynamic mux entries. Eventually |
| 3801 | * this should clear PRCM wakeup registers to cause the PRCM to ignore |
| 3802 | * wakeup events from the module. Does not set any wakeup routing |
| 3803 | * registers beyond this point - if the module is to wake up any other |
| 3804 | * module or subsystem, that must be set separately. Called by |
| 3805 | * omap_device code. Returns -EINVAL on error or 0 upon success. |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3806 | */ |
| 3807 | int omap_hwmod_disable_wakeup(struct omap_hwmod *oh) |
| 3808 | { |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3809 | unsigned long flags; |
Kevin Hilman | 5a7ddcb | 2010-12-21 21:08:34 -0700 | [diff] [blame] | 3810 | u32 v; |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3811 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3812 | spin_lock_irqsave(&oh->_lock, flags); |
Govindraj.R | 2a1cc14 | 2012-04-05 02:59:32 -0600 | [diff] [blame] | 3813 | |
| 3814 | if (oh->class->sysc && |
| 3815 | (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) { |
| 3816 | v = oh->_sysc_cache; |
| 3817 | _disable_wakeup(oh, &v); |
| 3818 | _write_sysconfig(v, oh); |
| 3819 | } |
| 3820 | |
Govindraj R | eceec00 | 2011-12-16 14:36:58 -0700 | [diff] [blame] | 3821 | _set_idle_ioring_wakeup(oh, false); |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3822 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | 63c8523 | 2009-09-03 20:14:03 +0300 | [diff] [blame] | 3823 | |
| 3824 | return 0; |
| 3825 | } |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 3826 | |
| 3827 | /** |
Paul Walmsley | aee48e3 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 3828 | * omap_hwmod_assert_hardreset - assert the HW reset line of submodules |
| 3829 | * contained in the hwmod module. |
| 3830 | * @oh: struct omap_hwmod * |
| 3831 | * @name: name of the reset line to lookup and assert |
| 3832 | * |
| 3833 | * Some IP like dsp, ipu or iva contain processor that require |
| 3834 | * an HW reset line to be assert / deassert in order to enable fully |
| 3835 | * the IP. Returns -EINVAL if @oh is null or if the operation is not |
| 3836 | * yet supported on this OMAP; otherwise, passes along the return value |
| 3837 | * from _assert_hardreset(). |
| 3838 | */ |
| 3839 | int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name) |
| 3840 | { |
| 3841 | int ret; |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3842 | unsigned long flags; |
Paul Walmsley | aee48e3 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 3843 | |
| 3844 | if (!oh) |
| 3845 | return -EINVAL; |
| 3846 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3847 | spin_lock_irqsave(&oh->_lock, flags); |
Paul Walmsley | aee48e3 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 3848 | ret = _assert_hardreset(oh, name); |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3849 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | aee48e3 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 3850 | |
| 3851 | return ret; |
| 3852 | } |
| 3853 | |
| 3854 | /** |
| 3855 | * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules |
| 3856 | * contained in the hwmod module. |
| 3857 | * @oh: struct omap_hwmod * |
| 3858 | * @name: name of the reset line to look up and deassert |
| 3859 | * |
| 3860 | * Some IP like dsp, ipu or iva contain processor that require |
| 3861 | * an HW reset line to be assert / deassert in order to enable fully |
| 3862 | * the IP. Returns -EINVAL if @oh is null or if the operation is not |
| 3863 | * yet supported on this OMAP; otherwise, passes along the return value |
| 3864 | * from _deassert_hardreset(). |
| 3865 | */ |
| 3866 | int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name) |
| 3867 | { |
| 3868 | int ret; |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3869 | unsigned long flags; |
Paul Walmsley | aee48e3 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 3870 | |
| 3871 | if (!oh) |
| 3872 | return -EINVAL; |
| 3873 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3874 | spin_lock_irqsave(&oh->_lock, flags); |
Paul Walmsley | aee48e3 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 3875 | ret = _deassert_hardreset(oh, name); |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3876 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | aee48e3 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 3877 | |
| 3878 | return ret; |
| 3879 | } |
| 3880 | |
| 3881 | /** |
| 3882 | * omap_hwmod_read_hardreset - read the HW reset line state of submodules |
| 3883 | * contained in the hwmod module |
| 3884 | * @oh: struct omap_hwmod * |
| 3885 | * @name: name of the reset line to look up and read |
| 3886 | * |
| 3887 | * Return the current state of the hwmod @oh's reset line named @name: |
| 3888 | * returns -EINVAL upon parameter error or if this operation |
| 3889 | * is unsupported on the current OMAP; otherwise, passes along the return |
| 3890 | * value from _read_hardreset(). |
| 3891 | */ |
| 3892 | int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name) |
| 3893 | { |
| 3894 | int ret; |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3895 | unsigned long flags; |
Paul Walmsley | aee48e3 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 3896 | |
| 3897 | if (!oh) |
| 3898 | return -EINVAL; |
| 3899 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3900 | spin_lock_irqsave(&oh->_lock, flags); |
Paul Walmsley | aee48e3 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 3901 | ret = _read_hardreset(oh, name); |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3902 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | aee48e3 | 2010-09-21 10:34:11 -0600 | [diff] [blame] | 3903 | |
| 3904 | return ret; |
| 3905 | } |
| 3906 | |
| 3907 | |
| 3908 | /** |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 3909 | * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname |
| 3910 | * @classname: struct omap_hwmod_class name to search for |
| 3911 | * @fn: callback function pointer to call for each hwmod in class @classname |
| 3912 | * @user: arbitrary context data to pass to the callback function |
| 3913 | * |
Benoit Cousson | ce35b24 | 2010-12-21 21:31:28 -0700 | [diff] [blame] | 3914 | * For each omap_hwmod of class @classname, call @fn. |
| 3915 | * If the callback function returns something other than |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 3916 | * zero, the iterator is terminated, and the callback function's return |
| 3917 | * value is passed back to the caller. Returns 0 upon success, -EINVAL |
| 3918 | * if @classname or @fn are NULL, or passes back the error code from @fn. |
| 3919 | */ |
| 3920 | int omap_hwmod_for_each_by_class(const char *classname, |
| 3921 | int (*fn)(struct omap_hwmod *oh, |
| 3922 | void *user), |
| 3923 | void *user) |
| 3924 | { |
| 3925 | struct omap_hwmod *temp_oh; |
| 3926 | int ret = 0; |
| 3927 | |
| 3928 | if (!classname || !fn) |
| 3929 | return -EINVAL; |
| 3930 | |
| 3931 | pr_debug("omap_hwmod: %s: looking for modules of class %s\n", |
| 3932 | __func__, classname); |
| 3933 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 3934 | list_for_each_entry(temp_oh, &omap_hwmod_list, node) { |
| 3935 | if (!strcmp(temp_oh->class->name, classname)) { |
| 3936 | pr_debug("omap_hwmod: %s: %s: calling callback fn\n", |
| 3937 | __func__, temp_oh->name); |
| 3938 | ret = (*fn)(temp_oh, user); |
| 3939 | if (ret) |
| 3940 | break; |
| 3941 | } |
| 3942 | } |
| 3943 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 3944 | if (ret) |
| 3945 | pr_debug("omap_hwmod: %s: iterator terminated early: %d\n", |
| 3946 | __func__, ret); |
| 3947 | |
| 3948 | return ret; |
| 3949 | } |
| 3950 | |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3951 | /** |
| 3952 | * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod |
| 3953 | * @oh: struct omap_hwmod * |
| 3954 | * @state: state that _setup() should leave the hwmod in |
| 3955 | * |
Paul Walmsley | 550c809 | 2011-02-28 11:58:14 -0700 | [diff] [blame] | 3956 | * Sets the hwmod state that @oh will enter at the end of _setup() |
Paul Walmsley | 64813c3 | 2012-04-18 19:10:03 -0600 | [diff] [blame] | 3957 | * (called by omap_hwmod_setup_*()). See also the documentation |
| 3958 | * for _setup_postsetup(), above. Returns 0 upon success or |
| 3959 | * -EINVAL if there is a problem with the arguments or if the hwmod is |
| 3960 | * in the wrong state. |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3961 | */ |
| 3962 | int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state) |
| 3963 | { |
| 3964 | int ret; |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3965 | unsigned long flags; |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3966 | |
| 3967 | if (!oh) |
| 3968 | return -EINVAL; |
| 3969 | |
| 3970 | if (state != _HWMOD_STATE_DISABLED && |
| 3971 | state != _HWMOD_STATE_ENABLED && |
| 3972 | state != _HWMOD_STATE_IDLE) |
| 3973 | return -EINVAL; |
| 3974 | |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3975 | spin_lock_irqsave(&oh->_lock, flags); |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3976 | |
| 3977 | if (oh->_state != _HWMOD_STATE_REGISTERED) { |
| 3978 | ret = -EINVAL; |
| 3979 | goto ohsps_unlock; |
| 3980 | } |
| 3981 | |
| 3982 | oh->_postsetup_state = state; |
| 3983 | ret = 0; |
| 3984 | |
| 3985 | ohsps_unlock: |
Paul Walmsley | dc6d1cd | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3986 | spin_unlock_irqrestore(&oh->_lock, flags); |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 3987 | |
| 3988 | return ret; |
| 3989 | } |
Kevin Hilman | c80705a | 2010-12-21 21:31:55 -0700 | [diff] [blame] | 3990 | |
| 3991 | /** |
| 3992 | * omap_hwmod_get_context_loss_count - get lost context count |
| 3993 | * @oh: struct omap_hwmod * |
| 3994 | * |
Rajendra Nayak | e6d3a8b | 2012-11-21 16:15:17 -0700 | [diff] [blame] | 3995 | * Returns the context loss count of associated @oh |
| 3996 | * upon success, or zero if no context loss data is available. |
Kevin Hilman | c80705a | 2010-12-21 21:31:55 -0700 | [diff] [blame] | 3997 | * |
Rajendra Nayak | e6d3a8b | 2012-11-21 16:15:17 -0700 | [diff] [blame] | 3998 | * On OMAP4, this queries the per-hwmod context loss register, |
| 3999 | * assuming one exists. If not, or on OMAP2/3, this queries the |
| 4000 | * enclosing powerdomain context loss count. |
Kevin Hilman | c80705a | 2010-12-21 21:31:55 -0700 | [diff] [blame] | 4001 | */ |
Tomi Valkeinen | fc01387 | 2011-06-09 16:56:23 +0300 | [diff] [blame] | 4002 | int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh) |
Kevin Hilman | c80705a | 2010-12-21 21:31:55 -0700 | [diff] [blame] | 4003 | { |
| 4004 | struct powerdomain *pwrdm; |
| 4005 | int ret = 0; |
| 4006 | |
Rajendra Nayak | e6d3a8b | 2012-11-21 16:15:17 -0700 | [diff] [blame] | 4007 | if (soc_ops.get_context_lost) |
| 4008 | return soc_ops.get_context_lost(oh); |
| 4009 | |
Kevin Hilman | c80705a | 2010-12-21 21:31:55 -0700 | [diff] [blame] | 4010 | pwrdm = omap_hwmod_get_pwrdm(oh); |
| 4011 | if (pwrdm) |
| 4012 | ret = pwrdm_get_context_loss_count(pwrdm); |
| 4013 | |
| 4014 | return ret; |
| 4015 | } |
Paul Walmsley | 43b0164 | 2011-03-10 03:50:07 -0700 | [diff] [blame] | 4016 | |
| 4017 | /** |
| 4018 | * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup |
| 4019 | * @oh: struct omap_hwmod * |
| 4020 | * |
| 4021 | * Prevent the hwmod @oh from being reset during the setup process. |
| 4022 | * Intended for use by board-*.c files on boards with devices that |
| 4023 | * cannot tolerate being reset. Must be called before the hwmod has |
| 4024 | * been set up. Returns 0 upon success or negative error code upon |
| 4025 | * failure. |
| 4026 | */ |
| 4027 | int omap_hwmod_no_setup_reset(struct omap_hwmod *oh) |
| 4028 | { |
| 4029 | if (!oh) |
| 4030 | return -EINVAL; |
| 4031 | |
| 4032 | if (oh->_state != _HWMOD_STATE_REGISTERED) { |
| 4033 | pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n", |
| 4034 | oh->name); |
| 4035 | return -EINVAL; |
| 4036 | } |
| 4037 | |
| 4038 | oh->flags |= HWMOD_INIT_NO_RESET; |
| 4039 | |
| 4040 | return 0; |
| 4041 | } |
Tero Kristo | abc2d54 | 2011-12-16 14:36:59 -0700 | [diff] [blame] | 4042 | |
| 4043 | /** |
| 4044 | * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ |
| 4045 | * @oh: struct omap_hwmod * containing hwmod mux entries |
| 4046 | * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup |
| 4047 | * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup |
| 4048 | * |
| 4049 | * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux |
| 4050 | * entry number @pad_idx for the hwmod @oh, trigger the interrupt |
| 4051 | * service routine for the hwmod's mpu_irqs array index @irq_idx. If |
| 4052 | * this function is not called for a given pad_idx, then the ISR |
| 4053 | * associated with @oh's first MPU IRQ will be triggered when an I/O |
| 4054 | * pad wakeup occurs on that pad. Note that @pad_idx is the index of |
| 4055 | * the _dynamic or wakeup_ entry: if there are other entries not |
| 4056 | * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these |
| 4057 | * entries are NOT COUNTED in the dynamic pad index. This function |
| 4058 | * must be called separately for each pad that requires its interrupt |
| 4059 | * to be re-routed this way. Returns -EINVAL if there is an argument |
| 4060 | * problem or if @oh does not have hwmod mux entries or MPU IRQs; |
| 4061 | * returns -ENOMEM if memory cannot be allocated; or 0 upon success. |
| 4062 | * |
| 4063 | * XXX This function interface is fragile. Rather than using array |
| 4064 | * indexes, which are subject to unpredictable change, it should be |
| 4065 | * using hwmod IRQ names, and some other stable key for the hwmod mux |
| 4066 | * pad records. |
| 4067 | */ |
| 4068 | int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx) |
| 4069 | { |
| 4070 | int nr_irqs; |
| 4071 | |
| 4072 | might_sleep(); |
| 4073 | |
| 4074 | if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 || |
| 4075 | pad_idx >= oh->mux->nr_pads_dynamic) |
| 4076 | return -EINVAL; |
| 4077 | |
| 4078 | /* Check the number of available mpu_irqs */ |
| 4079 | for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++) |
| 4080 | ; |
| 4081 | |
| 4082 | if (irq_idx >= nr_irqs) |
| 4083 | return -EINVAL; |
| 4084 | |
| 4085 | if (!oh->mux->irqs) { |
| 4086 | /* XXX What frees this? */ |
| 4087 | oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic, |
| 4088 | GFP_KERNEL); |
| 4089 | if (!oh->mux->irqs) |
| 4090 | return -ENOMEM; |
| 4091 | } |
| 4092 | oh->mux->irqs[pad_idx] = irq_idx; |
| 4093 | |
| 4094 | return 0; |
| 4095 | } |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 4096 | |
| 4097 | /** |
| 4098 | * omap_hwmod_init - initialize the hwmod code |
| 4099 | * |
| 4100 | * Sets up some function pointers needed by the hwmod code to operate on the |
| 4101 | * currently-booted SoC. Intended to be called once during kernel init |
| 4102 | * before any hwmods are registered. No return value. |
| 4103 | */ |
| 4104 | void __init omap_hwmod_init(void) |
| 4105 | { |
Paul Walmsley | ff4ae5d | 2012-10-21 01:01:11 -0600 | [diff] [blame] | 4106 | if (cpu_is_omap24xx()) { |
| 4107 | soc_ops.wait_target_ready = _omap2xxx_wait_target_ready; |
| 4108 | soc_ops.assert_hardreset = _omap2_assert_hardreset; |
| 4109 | soc_ops.deassert_hardreset = _omap2_deassert_hardreset; |
| 4110 | soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted; |
| 4111 | } else if (cpu_is_omap34xx()) { |
| 4112 | soc_ops.wait_target_ready = _omap3xxx_wait_target_ready; |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 4113 | soc_ops.assert_hardreset = _omap2_assert_hardreset; |
| 4114 | soc_ops.deassert_hardreset = _omap2_deassert_hardreset; |
| 4115 | soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted; |
R Sricharan | 05e152c | 2012-06-05 16:21:32 +0530 | [diff] [blame] | 4116 | } else if (cpu_is_omap44xx() || soc_is_omap54xx()) { |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 4117 | soc_ops.enable_module = _omap4_enable_module; |
| 4118 | soc_ops.disable_module = _omap4_disable_module; |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 4119 | soc_ops.wait_target_ready = _omap4_wait_target_ready; |
Kevin Hilman | b8249cf | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 4120 | soc_ops.assert_hardreset = _omap4_assert_hardreset; |
| 4121 | soc_ops.deassert_hardreset = _omap4_deassert_hardreset; |
| 4122 | soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted; |
Kevin Hilman | 0a179ea | 2012-06-18 12:12:25 -0600 | [diff] [blame] | 4123 | soc_ops.init_clkdm = _init_clkdm; |
Rajendra Nayak | e6d3a8b | 2012-11-21 16:15:17 -0700 | [diff] [blame] | 4124 | soc_ops.update_context_lost = _omap4_update_context_lost; |
| 4125 | soc_ops.get_context_lost = _omap4_get_context_lost; |
Vaibhav Hiremath | 1688bf1 | 2012-09-11 17:18:53 -0600 | [diff] [blame] | 4126 | } else if (soc_is_am33xx()) { |
| 4127 | soc_ops.enable_module = _am33xx_enable_module; |
| 4128 | soc_ops.disable_module = _am33xx_disable_module; |
| 4129 | soc_ops.wait_target_ready = _am33xx_wait_target_ready; |
| 4130 | soc_ops.assert_hardreset = _am33xx_assert_hardreset; |
| 4131 | soc_ops.deassert_hardreset = _am33xx_deassert_hardreset; |
| 4132 | soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted; |
| 4133 | soc_ops.init_clkdm = _init_clkdm; |
Kevin Hilman | 8f6aa8e | 2012-06-18 12:12:24 -0600 | [diff] [blame] | 4134 | } else { |
| 4135 | WARN(1, "omap_hwmod: unknown SoC type\n"); |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 4136 | } |
| 4137 | |
| 4138 | inited = true; |
| 4139 | } |
Tony Lindgren | 68c9a95 | 2012-07-06 00:58:43 -0700 | [diff] [blame] | 4140 | |
| 4141 | /** |
| 4142 | * omap_hwmod_get_main_clk - get pointer to main clock name |
| 4143 | * @oh: struct omap_hwmod * |
| 4144 | * |
| 4145 | * Returns the main clock name assocated with @oh upon success, |
| 4146 | * or NULL if @oh is NULL. |
| 4147 | */ |
| 4148 | const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh) |
| 4149 | { |
| 4150 | if (!oh) |
| 4151 | return NULL; |
| 4152 | |
| 4153 | return oh->main_clk; |
| 4154 | } |