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Archit Tanejae1ef4d22010-09-15 18:47:29 +05301/*
2 * linux/drivers/video/omap2/dss/dss_features.h
3 *
4 * Copyright (C) 2010 Texas Instruments
5 * Author: Archit Taneja <archit@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#ifndef __OMAP2_DSS_FEATURES_H
21#define __OMAP2_DSS_FEATURES_H
22
Archit Tanejad50cd032010-12-02 11:27:08 +000023#define MAX_DSS_MANAGERS 3
Archit Tanejae1ef4d22010-09-15 18:47:29 +053024#define MAX_DSS_OVERLAYS 3
Taneja, Architea751592011-03-08 05:50:35 -060025#define MAX_DSS_LCD_MANAGERS 2
Archit Tanejae1ef4d22010-09-15 18:47:29 +053026
27/* DSS has feature id */
28enum dss_feat_id {
29 FEAT_GLOBAL_ALPHA = 1 << 0,
30 FEAT_GLOBAL_ALPHA_VID1 = 1 << 1,
Samreen8fbde102010-11-04 12:28:41 +010031 FEAT_PRE_MULT_ALPHA = 1 << 2,
Archit Tanejad50cd032010-12-02 11:27:08 +000032 FEAT_LCDENABLEPOL = 1 << 3,
33 FEAT_LCDENABLESIGNAL = 1 << 4,
34 FEAT_PCKFREEENABLE = 1 << 5,
35 FEAT_FUNCGATED = 1 << 6,
36 FEAT_MGR_LCD2 = 1 << 7,
Archit Taneja87a74842011-03-02 11:19:50 +053037 FEAT_LINEBUFFERSPLIT = 1 << 8,
38 FEAT_ROWREPEATENABLE = 1 << 9,
39 FEAT_RESIZECONF = 1 << 10,
Murthy, Raghuveer5c6366e2011-03-03 09:27:58 -060040 /* Independent core clk divider */
41 FEAT_CORE_CLK_DIV = 1 << 11,
Taneja, Architea751592011-03-08 05:50:35 -060042 FEAT_LCD_CLK_SRC = 1 << 12,
Tomi Valkeinenc94dfe052011-04-15 10:42:59 +030043 /* DSI-PLL power command 0x3 is not working */
44 FEAT_DSI_PLL_PWR_BUG = 1 << 13,
Archit Tanejae1ef4d22010-09-15 18:47:29 +053045};
46
47/* DSS register field id */
48enum dss_feat_reg_field {
49 FEAT_REG_FIRHINC,
50 FEAT_REG_FIRVINC,
51 FEAT_REG_FIFOHIGHTHRESHOLD,
52 FEAT_REG_FIFOLOWTHRESHOLD,
53 FEAT_REG_FIFOSIZE,
Archit Taneja87a74842011-03-02 11:19:50 +053054 FEAT_REG_HORIZONTALACCU,
55 FEAT_REG_VERTICALACCU,
Taneja, Architea751592011-03-08 05:50:35 -060056 FEAT_REG_DISPC_CLK_SWITCH,
Taneja, Archit49641112011-03-14 23:28:23 -050057 FEAT_REG_DSIPLL_REGN,
58 FEAT_REG_DSIPLL_REGM,
59 FEAT_REG_DSIPLL_REGM_DISPC,
60 FEAT_REG_DSIPLL_REGM_DSI,
Archit Tanejae1ef4d22010-09-15 18:47:29 +053061};
62
Taneja, Archit31ef8232011-03-14 23:28:22 -050063enum dss_range_param {
64 FEAT_PARAM_DSS_FCK,
Taneja, Archit49641112011-03-14 23:28:23 -050065 FEAT_PARAM_DSIPLL_REGN,
66 FEAT_PARAM_DSIPLL_REGM,
67 FEAT_PARAM_DSIPLL_REGM_DISPC,
68 FEAT_PARAM_DSIPLL_REGM_DSI,
69 FEAT_PARAM_DSIPLL_FINT,
70 FEAT_PARAM_DSIPLL_LPDIV,
Taneja, Archit31ef8232011-03-14 23:28:22 -050071};
72
Archit Tanejae1ef4d22010-09-15 18:47:29 +053073/* DSS Feature Functions */
74int dss_feat_get_num_mgrs(void);
75int dss_feat_get_num_ovls(void);
Taneja, Archit31ef8232011-03-14 23:28:22 -050076unsigned long dss_feat_get_param_min(enum dss_range_param param);
77unsigned long dss_feat_get_param_max(enum dss_range_param param);
Archit Tanejae1ef4d22010-09-15 18:47:29 +053078enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel);
79enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane);
Archit Taneja8dad2ab2010-11-25 17:58:10 +053080bool dss_feat_color_mode_supported(enum omap_plane plane,
81 enum omap_color_mode color_mode);
Archit Taneja067a57e2011-03-02 11:57:25 +053082const char *dss_feat_get_clk_source_name(enum dss_clk_source id);
Archit Tanejae1ef4d22010-09-15 18:47:29 +053083
84bool dss_has_feature(enum dss_feat_id id);
85void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end);
86void dss_features_init(void);
87#endif