Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of version 2 of the GNU General Public License as |
| 6 | * published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, but |
| 9 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 11 | * General Public License for more details. |
| 12 | */ |
| 13 | #include <linux/list_sort.h> |
| 14 | #include <linux/libnvdimm.h> |
| 15 | #include <linux/module.h> |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 16 | #include <linux/mutex.h> |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 17 | #include <linux/ndctl.h> |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 18 | #include <linux/delay.h> |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 19 | #include <linux/list.h> |
| 20 | #include <linux/acpi.h> |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 21 | #include <linux/sort.h> |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 22 | #include <linux/pmem.h> |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 23 | #include <linux/io.h> |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 24 | #include <linux/nd.h> |
Dan Williams | 96601ad | 2015-08-24 18:29:38 -0400 | [diff] [blame] | 25 | #include <asm/cacheflush.h> |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 26 | #include "nfit.h" |
| 27 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 28 | /* |
| 29 | * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is |
| 30 | * irrelevant. |
| 31 | */ |
Christoph Hellwig | 2f8e2c8 | 2015-08-28 09:27:14 +0200 | [diff] [blame] | 32 | #include <linux/io-64-nonatomic-hi-lo.h> |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 33 | |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 34 | static bool force_enable_dimms; |
| 35 | module_param(force_enable_dimms, bool, S_IRUGO|S_IWUSR); |
| 36 | MODULE_PARM_DESC(force_enable_dimms, "Ignore _STA (ACPI DIMM device) status"); |
| 37 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 38 | static unsigned int scrub_timeout = NFIT_ARS_TIMEOUT; |
| 39 | module_param(scrub_timeout, uint, S_IRUGO|S_IWUSR); |
| 40 | MODULE_PARM_DESC(scrub_timeout, "Initial scrub timeout in seconds"); |
| 41 | |
| 42 | /* after three payloads of overflow, it's dead jim */ |
| 43 | static unsigned int scrub_overflow_abort = 3; |
| 44 | module_param(scrub_overflow_abort, uint, S_IRUGO|S_IWUSR); |
| 45 | MODULE_PARM_DESC(scrub_overflow_abort, |
| 46 | "Number of times we overflow ARS results before abort"); |
| 47 | |
Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 48 | static bool disable_vendor_specific; |
| 49 | module_param(disable_vendor_specific, bool, S_IRUGO); |
| 50 | MODULE_PARM_DESC(disable_vendor_specific, |
| 51 | "Limit commands to the publicly specified set\n"); |
| 52 | |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 53 | static struct workqueue_struct *nfit_wq; |
| 54 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 55 | struct nfit_table_prev { |
| 56 | struct list_head spas; |
| 57 | struct list_head memdevs; |
| 58 | struct list_head dcrs; |
| 59 | struct list_head bdws; |
| 60 | struct list_head idts; |
| 61 | struct list_head flushes; |
| 62 | }; |
| 63 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 64 | static u8 nfit_uuid[NFIT_UUID_MAX][16]; |
| 65 | |
Dan Williams | 6bc7561 | 2015-06-17 17:23:32 -0400 | [diff] [blame] | 66 | const u8 *to_nfit_uuid(enum nfit_uuids id) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 67 | { |
| 68 | return nfit_uuid[id]; |
| 69 | } |
Dan Williams | 6bc7561 | 2015-06-17 17:23:32 -0400 | [diff] [blame] | 70 | EXPORT_SYMBOL(to_nfit_uuid); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 71 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 72 | static struct acpi_nfit_desc *to_acpi_nfit_desc( |
| 73 | struct nvdimm_bus_descriptor *nd_desc) |
| 74 | { |
| 75 | return container_of(nd_desc, struct acpi_nfit_desc, nd_desc); |
| 76 | } |
| 77 | |
| 78 | static struct acpi_device *to_acpi_dev(struct acpi_nfit_desc *acpi_desc) |
| 79 | { |
| 80 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| 81 | |
| 82 | /* |
| 83 | * If provider == 'ACPI.NFIT' we can assume 'dev' is a struct |
| 84 | * acpi_device. |
| 85 | */ |
| 86 | if (!nd_desc->provider_name |
| 87 | || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0) |
| 88 | return NULL; |
| 89 | |
| 90 | return to_acpi_device(acpi_desc->dev); |
| 91 | } |
| 92 | |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 93 | static int xlat_status(void *buf, unsigned int cmd) |
| 94 | { |
Dan Williams | d4f3236 | 2016-03-03 16:08:54 -0800 | [diff] [blame] | 95 | struct nd_cmd_clear_error *clear_err; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 96 | struct nd_cmd_ars_status *ars_status; |
| 97 | struct nd_cmd_ars_start *ars_start; |
| 98 | struct nd_cmd_ars_cap *ars_cap; |
| 99 | u16 flags; |
| 100 | |
| 101 | switch (cmd) { |
| 102 | case ND_CMD_ARS_CAP: |
| 103 | ars_cap = buf; |
| 104 | if ((ars_cap->status & 0xffff) == NFIT_ARS_CAP_NONE) |
| 105 | return -ENOTTY; |
| 106 | |
| 107 | /* Command failed */ |
| 108 | if (ars_cap->status & 0xffff) |
| 109 | return -EIO; |
| 110 | |
| 111 | /* No supported scan types for this range */ |
| 112 | flags = ND_ARS_PERSISTENT | ND_ARS_VOLATILE; |
| 113 | if ((ars_cap->status >> 16 & flags) == 0) |
| 114 | return -ENOTTY; |
| 115 | break; |
| 116 | case ND_CMD_ARS_START: |
| 117 | ars_start = buf; |
| 118 | /* ARS is in progress */ |
| 119 | if ((ars_start->status & 0xffff) == NFIT_ARS_START_BUSY) |
| 120 | return -EBUSY; |
| 121 | |
| 122 | /* Command failed */ |
| 123 | if (ars_start->status & 0xffff) |
| 124 | return -EIO; |
| 125 | break; |
| 126 | case ND_CMD_ARS_STATUS: |
| 127 | ars_status = buf; |
| 128 | /* Command failed */ |
| 129 | if (ars_status->status & 0xffff) |
| 130 | return -EIO; |
| 131 | /* Check extended status (Upper two bytes) */ |
| 132 | if (ars_status->status == NFIT_ARS_STATUS_DONE) |
| 133 | return 0; |
| 134 | |
| 135 | /* ARS is in progress */ |
| 136 | if (ars_status->status == NFIT_ARS_STATUS_BUSY) |
| 137 | return -EBUSY; |
| 138 | |
| 139 | /* No ARS performed for the current boot */ |
| 140 | if (ars_status->status == NFIT_ARS_STATUS_NONE) |
| 141 | return -EAGAIN; |
| 142 | |
| 143 | /* |
| 144 | * ARS interrupted, either we overflowed or some other |
| 145 | * agent wants the scan to stop. If we didn't overflow |
| 146 | * then just continue with the returned results. |
| 147 | */ |
| 148 | if (ars_status->status == NFIT_ARS_STATUS_INTR) { |
| 149 | if (ars_status->flags & NFIT_ARS_F_OVERFLOW) |
| 150 | return -ENOSPC; |
| 151 | return 0; |
| 152 | } |
| 153 | |
| 154 | /* Unknown status */ |
| 155 | if (ars_status->status >> 16) |
| 156 | return -EIO; |
| 157 | break; |
Dan Williams | d4f3236 | 2016-03-03 16:08:54 -0800 | [diff] [blame] | 158 | case ND_CMD_CLEAR_ERROR: |
| 159 | clear_err = buf; |
| 160 | if (clear_err->status & 0xffff) |
| 161 | return -EIO; |
| 162 | if (!clear_err->cleared) |
| 163 | return -EIO; |
| 164 | if (clear_err->length > clear_err->cleared) |
| 165 | return clear_err->cleared; |
| 166 | break; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 167 | default: |
| 168 | break; |
| 169 | } |
| 170 | |
| 171 | return 0; |
| 172 | } |
| 173 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 174 | static int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, |
| 175 | struct nvdimm *nvdimm, unsigned int cmd, void *buf, |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 176 | unsigned int buf_len, int *cmd_rc) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 177 | { |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 178 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 179 | union acpi_object in_obj, in_buf, *out_obj; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 180 | const struct nd_cmd_desc *desc = NULL; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 181 | struct device *dev = acpi_desc->dev; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 182 | struct nd_cmd_pkg *call_pkg = NULL; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 183 | const char *cmd_name, *dimm_name; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 184 | unsigned long cmd_mask, dsm_mask; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 185 | acpi_handle handle; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 186 | unsigned int func; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 187 | const u8 *uuid; |
| 188 | u32 offset; |
| 189 | int rc, i; |
| 190 | |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 191 | func = cmd; |
| 192 | if (cmd == ND_CMD_CALL) { |
| 193 | call_pkg = buf; |
| 194 | func = call_pkg->nd_command; |
| 195 | } |
| 196 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 197 | if (nvdimm) { |
| 198 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 199 | struct acpi_device *adev = nfit_mem->adev; |
| 200 | |
| 201 | if (!adev) |
| 202 | return -ENOTTY; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 203 | if (call_pkg && nfit_mem->family != call_pkg->nd_family) |
| 204 | return -ENOTTY; |
| 205 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 206 | dimm_name = nvdimm_name(nvdimm); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 207 | cmd_name = nvdimm_cmd_name(cmd); |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 208 | cmd_mask = nvdimm_cmd_mask(nvdimm); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 209 | dsm_mask = nfit_mem->dsm_mask; |
| 210 | desc = nd_cmd_dimm_desc(cmd); |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 211 | uuid = to_nfit_uuid(nfit_mem->family); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 212 | handle = adev->handle; |
| 213 | } else { |
| 214 | struct acpi_device *adev = to_acpi_dev(acpi_desc); |
| 215 | |
| 216 | cmd_name = nvdimm_bus_cmd_name(cmd); |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 217 | cmd_mask = nd_desc->cmd_mask; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 218 | dsm_mask = cmd_mask; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 219 | desc = nd_cmd_bus_desc(cmd); |
| 220 | uuid = to_nfit_uuid(NFIT_DEV_BUS); |
| 221 | handle = adev->handle; |
| 222 | dimm_name = "bus"; |
| 223 | } |
| 224 | |
| 225 | if (!desc || (cmd && (desc->out_num + desc->in_num == 0))) |
| 226 | return -ENOTTY; |
| 227 | |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 228 | if (!test_bit(cmd, &cmd_mask) || !test_bit(func, &dsm_mask)) |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 229 | return -ENOTTY; |
| 230 | |
| 231 | in_obj.type = ACPI_TYPE_PACKAGE; |
| 232 | in_obj.package.count = 1; |
| 233 | in_obj.package.elements = &in_buf; |
| 234 | in_buf.type = ACPI_TYPE_BUFFER; |
| 235 | in_buf.buffer.pointer = buf; |
| 236 | in_buf.buffer.length = 0; |
| 237 | |
| 238 | /* libnvdimm has already validated the input envelope */ |
| 239 | for (i = 0; i < desc->in_num; i++) |
| 240 | in_buf.buffer.length += nd_cmd_in_size(nvdimm, cmd, desc, |
| 241 | i, buf); |
| 242 | |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 243 | if (call_pkg) { |
| 244 | /* skip over package wrapper */ |
| 245 | in_buf.buffer.pointer = (void *) &call_pkg->nd_payload; |
| 246 | in_buf.buffer.length = call_pkg->nd_size_in; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 247 | } |
| 248 | |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 249 | if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) { |
| 250 | dev_dbg(dev, "%s:%s cmd: %d: func: %d input length: %d\n", |
| 251 | __func__, dimm_name, cmd, func, |
| 252 | in_buf.buffer.length); |
| 253 | print_hex_dump_debug("nvdimm in ", DUMP_PREFIX_OFFSET, 4, 4, |
| 254 | in_buf.buffer.pointer, |
| 255 | min_t(u32, 256, in_buf.buffer.length), true); |
| 256 | } |
| 257 | |
| 258 | out_obj = acpi_evaluate_dsm(handle, uuid, 1, func, &in_obj); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 259 | if (!out_obj) { |
| 260 | dev_dbg(dev, "%s:%s _DSM failed cmd: %s\n", __func__, dimm_name, |
| 261 | cmd_name); |
| 262 | return -EINVAL; |
| 263 | } |
| 264 | |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 265 | if (call_pkg) { |
| 266 | call_pkg->nd_fw_size = out_obj->buffer.length; |
| 267 | memcpy(call_pkg->nd_payload + call_pkg->nd_size_in, |
| 268 | out_obj->buffer.pointer, |
| 269 | min(call_pkg->nd_fw_size, call_pkg->nd_size_out)); |
| 270 | |
| 271 | ACPI_FREE(out_obj); |
| 272 | /* |
| 273 | * Need to support FW function w/o known size in advance. |
| 274 | * Caller can determine required size based upon nd_fw_size. |
| 275 | * If we return an error (like elsewhere) then caller wouldn't |
| 276 | * be able to rely upon data returned to make calculation. |
| 277 | */ |
| 278 | return 0; |
| 279 | } |
| 280 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 281 | if (out_obj->package.type != ACPI_TYPE_BUFFER) { |
| 282 | dev_dbg(dev, "%s:%s unexpected output object type cmd: %s type: %d\n", |
| 283 | __func__, dimm_name, cmd_name, out_obj->type); |
| 284 | rc = -EINVAL; |
| 285 | goto out; |
| 286 | } |
| 287 | |
| 288 | if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) { |
| 289 | dev_dbg(dev, "%s:%s cmd: %s output length: %d\n", __func__, |
| 290 | dimm_name, cmd_name, out_obj->buffer.length); |
| 291 | print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4, |
| 292 | 4, out_obj->buffer.pointer, min_t(u32, 128, |
| 293 | out_obj->buffer.length), true); |
| 294 | } |
| 295 | |
| 296 | for (i = 0, offset = 0; i < desc->out_num; i++) { |
| 297 | u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, buf, |
| 298 | (u32 *) out_obj->buffer.pointer); |
| 299 | |
| 300 | if (offset + out_size > out_obj->buffer.length) { |
| 301 | dev_dbg(dev, "%s:%s output object underflow cmd: %s field: %d\n", |
| 302 | __func__, dimm_name, cmd_name, i); |
| 303 | break; |
| 304 | } |
| 305 | |
| 306 | if (in_buf.buffer.length + offset + out_size > buf_len) { |
| 307 | dev_dbg(dev, "%s:%s output overrun cmd: %s field: %d\n", |
| 308 | __func__, dimm_name, cmd_name, i); |
| 309 | rc = -ENXIO; |
| 310 | goto out; |
| 311 | } |
| 312 | memcpy(buf + in_buf.buffer.length + offset, |
| 313 | out_obj->buffer.pointer + offset, out_size); |
| 314 | offset += out_size; |
| 315 | } |
| 316 | if (offset + in_buf.buffer.length < buf_len) { |
| 317 | if (i >= 1) { |
| 318 | /* |
| 319 | * status valid, return the number of bytes left |
| 320 | * unfilled in the output buffer |
| 321 | */ |
| 322 | rc = buf_len - offset - in_buf.buffer.length; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 323 | if (cmd_rc) |
| 324 | *cmd_rc = xlat_status(buf, cmd); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 325 | } else { |
| 326 | dev_err(dev, "%s:%s underrun cmd: %s buf_len: %d out_len: %d\n", |
| 327 | __func__, dimm_name, cmd_name, buf_len, |
| 328 | offset); |
| 329 | rc = -ENXIO; |
| 330 | } |
Dan Williams | 2eea658 | 2016-05-02 09:11:53 -0700 | [diff] [blame] | 331 | } else { |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 332 | rc = 0; |
Dan Williams | 2eea658 | 2016-05-02 09:11:53 -0700 | [diff] [blame] | 333 | if (cmd_rc) |
| 334 | *cmd_rc = xlat_status(buf, cmd); |
| 335 | } |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 336 | |
| 337 | out: |
| 338 | ACPI_FREE(out_obj); |
| 339 | |
| 340 | return rc; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 341 | } |
| 342 | |
| 343 | static const char *spa_type_name(u16 type) |
| 344 | { |
| 345 | static const char *to_name[] = { |
| 346 | [NFIT_SPA_VOLATILE] = "volatile", |
| 347 | [NFIT_SPA_PM] = "pmem", |
| 348 | [NFIT_SPA_DCR] = "dimm-control-region", |
| 349 | [NFIT_SPA_BDW] = "block-data-window", |
| 350 | [NFIT_SPA_VDISK] = "volatile-disk", |
| 351 | [NFIT_SPA_VCD] = "volatile-cd", |
| 352 | [NFIT_SPA_PDISK] = "persistent-disk", |
| 353 | [NFIT_SPA_PCD] = "persistent-cd", |
| 354 | |
| 355 | }; |
| 356 | |
| 357 | if (type > NFIT_SPA_PCD) |
| 358 | return "unknown"; |
| 359 | |
| 360 | return to_name[type]; |
| 361 | } |
| 362 | |
| 363 | static int nfit_spa_type(struct acpi_nfit_system_address *spa) |
| 364 | { |
| 365 | int i; |
| 366 | |
| 367 | for (i = 0; i < NFIT_UUID_MAX; i++) |
| 368 | if (memcmp(to_nfit_uuid(i), spa->range_guid, 16) == 0) |
| 369 | return i; |
| 370 | return -1; |
| 371 | } |
| 372 | |
| 373 | static bool add_spa(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 374 | struct nfit_table_prev *prev, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 375 | struct acpi_nfit_system_address *spa) |
| 376 | { |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 377 | size_t length = min_t(size_t, sizeof(*spa), spa->header.length); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 378 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 379 | struct nfit_spa *nfit_spa; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 380 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 381 | list_for_each_entry(nfit_spa, &prev->spas, list) { |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 382 | if (memcmp(nfit_spa->spa, spa, length) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 383 | list_move_tail(&nfit_spa->list, &acpi_desc->spas); |
| 384 | return true; |
| 385 | } |
| 386 | } |
| 387 | |
| 388 | nfit_spa = devm_kzalloc(dev, sizeof(*nfit_spa), GFP_KERNEL); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 389 | if (!nfit_spa) |
| 390 | return false; |
| 391 | INIT_LIST_HEAD(&nfit_spa->list); |
| 392 | nfit_spa->spa = spa; |
| 393 | list_add_tail(&nfit_spa->list, &acpi_desc->spas); |
| 394 | dev_dbg(dev, "%s: spa index: %d type: %s\n", __func__, |
| 395 | spa->range_index, |
| 396 | spa_type_name(nfit_spa_type(spa))); |
| 397 | return true; |
| 398 | } |
| 399 | |
| 400 | static bool add_memdev(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 401 | struct nfit_table_prev *prev, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 402 | struct acpi_nfit_memory_map *memdev) |
| 403 | { |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 404 | size_t length = min_t(size_t, sizeof(*memdev), memdev->header.length); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 405 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 406 | struct nfit_memdev *nfit_memdev; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 407 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 408 | list_for_each_entry(nfit_memdev, &prev->memdevs, list) |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 409 | if (memcmp(nfit_memdev->memdev, memdev, length) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 410 | list_move_tail(&nfit_memdev->list, &acpi_desc->memdevs); |
| 411 | return true; |
| 412 | } |
| 413 | |
| 414 | nfit_memdev = devm_kzalloc(dev, sizeof(*nfit_memdev), GFP_KERNEL); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 415 | if (!nfit_memdev) |
| 416 | return false; |
| 417 | INIT_LIST_HEAD(&nfit_memdev->list); |
| 418 | nfit_memdev->memdev = memdev; |
| 419 | list_add_tail(&nfit_memdev->list, &acpi_desc->memdevs); |
| 420 | dev_dbg(dev, "%s: memdev handle: %#x spa: %d dcr: %d\n", |
| 421 | __func__, memdev->device_handle, memdev->range_index, |
| 422 | memdev->region_index); |
| 423 | return true; |
| 424 | } |
| 425 | |
| 426 | static bool add_dcr(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 427 | struct nfit_table_prev *prev, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 428 | struct acpi_nfit_control_region *dcr) |
| 429 | { |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 430 | size_t length = min_t(size_t, sizeof(*dcr), dcr->header.length); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 431 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 432 | struct nfit_dcr *nfit_dcr; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 433 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 434 | list_for_each_entry(nfit_dcr, &prev->dcrs, list) |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 435 | if (memcmp(nfit_dcr->dcr, dcr, length) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 436 | list_move_tail(&nfit_dcr->list, &acpi_desc->dcrs); |
| 437 | return true; |
| 438 | } |
| 439 | |
| 440 | nfit_dcr = devm_kzalloc(dev, sizeof(*nfit_dcr), GFP_KERNEL); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 441 | if (!nfit_dcr) |
| 442 | return false; |
| 443 | INIT_LIST_HEAD(&nfit_dcr->list); |
| 444 | nfit_dcr->dcr = dcr; |
| 445 | list_add_tail(&nfit_dcr->list, &acpi_desc->dcrs); |
| 446 | dev_dbg(dev, "%s: dcr index: %d windows: %d\n", __func__, |
| 447 | dcr->region_index, dcr->windows); |
| 448 | return true; |
| 449 | } |
| 450 | |
| 451 | static bool add_bdw(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 452 | struct nfit_table_prev *prev, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 453 | struct acpi_nfit_data_region *bdw) |
| 454 | { |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 455 | size_t length = min_t(size_t, sizeof(*bdw), bdw->header.length); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 456 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 457 | struct nfit_bdw *nfit_bdw; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 458 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 459 | list_for_each_entry(nfit_bdw, &prev->bdws, list) |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 460 | if (memcmp(nfit_bdw->bdw, bdw, length) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 461 | list_move_tail(&nfit_bdw->list, &acpi_desc->bdws); |
| 462 | return true; |
| 463 | } |
| 464 | |
| 465 | nfit_bdw = devm_kzalloc(dev, sizeof(*nfit_bdw), GFP_KERNEL); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 466 | if (!nfit_bdw) |
| 467 | return false; |
| 468 | INIT_LIST_HEAD(&nfit_bdw->list); |
| 469 | nfit_bdw->bdw = bdw; |
| 470 | list_add_tail(&nfit_bdw->list, &acpi_desc->bdws); |
| 471 | dev_dbg(dev, "%s: bdw dcr: %d windows: %d\n", __func__, |
| 472 | bdw->region_index, bdw->windows); |
| 473 | return true; |
| 474 | } |
| 475 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 476 | static bool add_idt(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 477 | struct nfit_table_prev *prev, |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 478 | struct acpi_nfit_interleave *idt) |
| 479 | { |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 480 | size_t length = min_t(size_t, sizeof(*idt), idt->header.length); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 481 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 482 | struct nfit_idt *nfit_idt; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 483 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 484 | list_for_each_entry(nfit_idt, &prev->idts, list) |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 485 | if (memcmp(nfit_idt->idt, idt, length) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 486 | list_move_tail(&nfit_idt->list, &acpi_desc->idts); |
| 487 | return true; |
| 488 | } |
| 489 | |
| 490 | nfit_idt = devm_kzalloc(dev, sizeof(*nfit_idt), GFP_KERNEL); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 491 | if (!nfit_idt) |
| 492 | return false; |
| 493 | INIT_LIST_HEAD(&nfit_idt->list); |
| 494 | nfit_idt->idt = idt; |
| 495 | list_add_tail(&nfit_idt->list, &acpi_desc->idts); |
| 496 | dev_dbg(dev, "%s: idt index: %d num_lines: %d\n", __func__, |
| 497 | idt->interleave_index, idt->line_count); |
| 498 | return true; |
| 499 | } |
| 500 | |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 501 | static bool add_flush(struct acpi_nfit_desc *acpi_desc, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 502 | struct nfit_table_prev *prev, |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 503 | struct acpi_nfit_flush_address *flush) |
| 504 | { |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 505 | size_t length = min_t(size_t, sizeof(*flush), flush->header.length); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 506 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 507 | struct nfit_flush *nfit_flush; |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 508 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 509 | list_for_each_entry(nfit_flush, &prev->flushes, list) |
Linda Knippers | 826c416 | 2015-11-20 19:05:47 -0500 | [diff] [blame] | 510 | if (memcmp(nfit_flush->flush, flush, length) == 0) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 511 | list_move_tail(&nfit_flush->list, &acpi_desc->flushes); |
| 512 | return true; |
| 513 | } |
| 514 | |
| 515 | nfit_flush = devm_kzalloc(dev, sizeof(*nfit_flush), GFP_KERNEL); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 516 | if (!nfit_flush) |
| 517 | return false; |
| 518 | INIT_LIST_HEAD(&nfit_flush->list); |
| 519 | nfit_flush->flush = flush; |
| 520 | list_add_tail(&nfit_flush->list, &acpi_desc->flushes); |
| 521 | dev_dbg(dev, "%s: nfit_flush handle: %d hint_count: %d\n", __func__, |
| 522 | flush->device_handle, flush->hint_count); |
| 523 | return true; |
| 524 | } |
| 525 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 526 | static void *add_table(struct acpi_nfit_desc *acpi_desc, |
| 527 | struct nfit_table_prev *prev, void *table, const void *end) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 528 | { |
| 529 | struct device *dev = acpi_desc->dev; |
| 530 | struct acpi_nfit_header *hdr; |
| 531 | void *err = ERR_PTR(-ENOMEM); |
| 532 | |
| 533 | if (table >= end) |
| 534 | return NULL; |
| 535 | |
| 536 | hdr = table; |
Vishal Verma | 564d501 | 2015-10-27 16:58:26 -0600 | [diff] [blame] | 537 | if (!hdr->length) { |
| 538 | dev_warn(dev, "found a zero length table '%d' parsing nfit\n", |
| 539 | hdr->type); |
| 540 | return NULL; |
| 541 | } |
| 542 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 543 | switch (hdr->type) { |
| 544 | case ACPI_NFIT_TYPE_SYSTEM_ADDRESS: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 545 | if (!add_spa(acpi_desc, prev, table)) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 546 | return err; |
| 547 | break; |
| 548 | case ACPI_NFIT_TYPE_MEMORY_MAP: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 549 | if (!add_memdev(acpi_desc, prev, table)) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 550 | return err; |
| 551 | break; |
| 552 | case ACPI_NFIT_TYPE_CONTROL_REGION: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 553 | if (!add_dcr(acpi_desc, prev, table)) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 554 | return err; |
| 555 | break; |
| 556 | case ACPI_NFIT_TYPE_DATA_REGION: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 557 | if (!add_bdw(acpi_desc, prev, table)) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 558 | return err; |
| 559 | break; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 560 | case ACPI_NFIT_TYPE_INTERLEAVE: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 561 | if (!add_idt(acpi_desc, prev, table)) |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 562 | return err; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 563 | break; |
| 564 | case ACPI_NFIT_TYPE_FLUSH_ADDRESS: |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 565 | if (!add_flush(acpi_desc, prev, table)) |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 566 | return err; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 567 | break; |
| 568 | case ACPI_NFIT_TYPE_SMBIOS: |
| 569 | dev_dbg(dev, "%s: smbios\n", __func__); |
| 570 | break; |
| 571 | default: |
| 572 | dev_err(dev, "unknown table '%d' parsing nfit\n", hdr->type); |
| 573 | break; |
| 574 | } |
| 575 | |
| 576 | return table + hdr->length; |
| 577 | } |
| 578 | |
| 579 | static void nfit_mem_find_spa_bdw(struct acpi_nfit_desc *acpi_desc, |
| 580 | struct nfit_mem *nfit_mem) |
| 581 | { |
| 582 | u32 device_handle = __to_nfit_memdev(nfit_mem)->device_handle; |
| 583 | u16 dcr = nfit_mem->dcr->region_index; |
| 584 | struct nfit_spa *nfit_spa; |
| 585 | |
| 586 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| 587 | u16 range_index = nfit_spa->spa->range_index; |
| 588 | int type = nfit_spa_type(nfit_spa->spa); |
| 589 | struct nfit_memdev *nfit_memdev; |
| 590 | |
| 591 | if (type != NFIT_SPA_BDW) |
| 592 | continue; |
| 593 | |
| 594 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 595 | if (nfit_memdev->memdev->range_index != range_index) |
| 596 | continue; |
| 597 | if (nfit_memdev->memdev->device_handle != device_handle) |
| 598 | continue; |
| 599 | if (nfit_memdev->memdev->region_index != dcr) |
| 600 | continue; |
| 601 | |
| 602 | nfit_mem->spa_bdw = nfit_spa->spa; |
| 603 | return; |
| 604 | } |
| 605 | } |
| 606 | |
| 607 | dev_dbg(acpi_desc->dev, "SPA-BDW not found for SPA-DCR %d\n", |
| 608 | nfit_mem->spa_dcr->range_index); |
| 609 | nfit_mem->bdw = NULL; |
| 610 | } |
| 611 | |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 612 | static void nfit_mem_init_bdw(struct acpi_nfit_desc *acpi_desc, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 613 | struct nfit_mem *nfit_mem, struct acpi_nfit_system_address *spa) |
| 614 | { |
| 615 | u16 dcr = __to_nfit_memdev(nfit_mem)->region_index; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 616 | struct nfit_memdev *nfit_memdev; |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 617 | struct nfit_flush *nfit_flush; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 618 | struct nfit_bdw *nfit_bdw; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 619 | struct nfit_idt *nfit_idt; |
| 620 | u16 idt_idx, range_index; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 621 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 622 | list_for_each_entry(nfit_bdw, &acpi_desc->bdws, list) { |
| 623 | if (nfit_bdw->bdw->region_index != dcr) |
| 624 | continue; |
| 625 | nfit_mem->bdw = nfit_bdw->bdw; |
| 626 | break; |
| 627 | } |
| 628 | |
| 629 | if (!nfit_mem->bdw) |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 630 | return; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 631 | |
| 632 | nfit_mem_find_spa_bdw(acpi_desc, nfit_mem); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 633 | |
| 634 | if (!nfit_mem->spa_bdw) |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 635 | return; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 636 | |
| 637 | range_index = nfit_mem->spa_bdw->range_index; |
| 638 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 639 | if (nfit_memdev->memdev->range_index != range_index || |
| 640 | nfit_memdev->memdev->region_index != dcr) |
| 641 | continue; |
| 642 | nfit_mem->memdev_bdw = nfit_memdev->memdev; |
| 643 | idt_idx = nfit_memdev->memdev->interleave_index; |
| 644 | list_for_each_entry(nfit_idt, &acpi_desc->idts, list) { |
| 645 | if (nfit_idt->idt->interleave_index != idt_idx) |
| 646 | continue; |
| 647 | nfit_mem->idt_bdw = nfit_idt->idt; |
| 648 | break; |
| 649 | } |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 650 | |
| 651 | list_for_each_entry(nfit_flush, &acpi_desc->flushes, list) { |
| 652 | if (nfit_flush->flush->device_handle != |
| 653 | nfit_memdev->memdev->device_handle) |
| 654 | continue; |
| 655 | nfit_mem->nfit_flush = nfit_flush; |
| 656 | break; |
| 657 | } |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 658 | break; |
| 659 | } |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 660 | } |
| 661 | |
| 662 | static int nfit_mem_dcr_init(struct acpi_nfit_desc *acpi_desc, |
| 663 | struct acpi_nfit_system_address *spa) |
| 664 | { |
| 665 | struct nfit_mem *nfit_mem, *found; |
| 666 | struct nfit_memdev *nfit_memdev; |
| 667 | int type = nfit_spa_type(spa); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 668 | |
| 669 | switch (type) { |
| 670 | case NFIT_SPA_DCR: |
| 671 | case NFIT_SPA_PM: |
| 672 | break; |
| 673 | default: |
| 674 | return 0; |
| 675 | } |
| 676 | |
| 677 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 678 | struct nfit_dcr *nfit_dcr; |
| 679 | u32 device_handle; |
| 680 | u16 dcr; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 681 | |
| 682 | if (nfit_memdev->memdev->range_index != spa->range_index) |
| 683 | continue; |
| 684 | found = NULL; |
| 685 | dcr = nfit_memdev->memdev->region_index; |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 686 | device_handle = nfit_memdev->memdev->device_handle; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 687 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 688 | if (__to_nfit_memdev(nfit_mem)->device_handle |
| 689 | == device_handle) { |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 690 | found = nfit_mem; |
| 691 | break; |
| 692 | } |
| 693 | |
| 694 | if (found) |
| 695 | nfit_mem = found; |
| 696 | else { |
| 697 | nfit_mem = devm_kzalloc(acpi_desc->dev, |
| 698 | sizeof(*nfit_mem), GFP_KERNEL); |
| 699 | if (!nfit_mem) |
| 700 | return -ENOMEM; |
| 701 | INIT_LIST_HEAD(&nfit_mem->list); |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 702 | nfit_mem->acpi_desc = acpi_desc; |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 703 | list_add(&nfit_mem->list, &acpi_desc->dimms); |
| 704 | } |
| 705 | |
| 706 | list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) { |
| 707 | if (nfit_dcr->dcr->region_index != dcr) |
| 708 | continue; |
| 709 | /* |
| 710 | * Record the control region for the dimm. For |
| 711 | * the ACPI 6.1 case, where there are separate |
| 712 | * control regions for the pmem vs blk |
| 713 | * interfaces, be sure to record the extended |
| 714 | * blk details. |
| 715 | */ |
| 716 | if (!nfit_mem->dcr) |
| 717 | nfit_mem->dcr = nfit_dcr->dcr; |
| 718 | else if (nfit_mem->dcr->windows == 0 |
| 719 | && nfit_dcr->dcr->windows) |
| 720 | nfit_mem->dcr = nfit_dcr->dcr; |
| 721 | break; |
| 722 | } |
| 723 | |
| 724 | if (dcr && !nfit_mem->dcr) { |
| 725 | dev_err(acpi_desc->dev, "SPA %d missing DCR %d\n", |
| 726 | spa->range_index, dcr); |
| 727 | return -ENODEV; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 728 | } |
| 729 | |
| 730 | if (type == NFIT_SPA_DCR) { |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 731 | struct nfit_idt *nfit_idt; |
| 732 | u16 idt_idx; |
| 733 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 734 | /* multiple dimms may share a SPA when interleaved */ |
| 735 | nfit_mem->spa_dcr = spa; |
| 736 | nfit_mem->memdev_dcr = nfit_memdev->memdev; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 737 | idt_idx = nfit_memdev->memdev->interleave_index; |
| 738 | list_for_each_entry(nfit_idt, &acpi_desc->idts, list) { |
| 739 | if (nfit_idt->idt->interleave_index != idt_idx) |
| 740 | continue; |
| 741 | nfit_mem->idt_dcr = nfit_idt->idt; |
| 742 | break; |
| 743 | } |
Dan Williams | 6697b2c | 2016-02-04 16:51:00 -0800 | [diff] [blame] | 744 | nfit_mem_init_bdw(acpi_desc, nfit_mem, spa); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 745 | } else { |
| 746 | /* |
| 747 | * A single dimm may belong to multiple SPA-PM |
| 748 | * ranges, record at least one in addition to |
| 749 | * any SPA-DCR range. |
| 750 | */ |
| 751 | nfit_mem->memdev_pmem = nfit_memdev->memdev; |
| 752 | } |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 753 | } |
| 754 | |
| 755 | return 0; |
| 756 | } |
| 757 | |
| 758 | static int nfit_mem_cmp(void *priv, struct list_head *_a, struct list_head *_b) |
| 759 | { |
| 760 | struct nfit_mem *a = container_of(_a, typeof(*a), list); |
| 761 | struct nfit_mem *b = container_of(_b, typeof(*b), list); |
| 762 | u32 handleA, handleB; |
| 763 | |
| 764 | handleA = __to_nfit_memdev(a)->device_handle; |
| 765 | handleB = __to_nfit_memdev(b)->device_handle; |
| 766 | if (handleA < handleB) |
| 767 | return -1; |
| 768 | else if (handleA > handleB) |
| 769 | return 1; |
| 770 | return 0; |
| 771 | } |
| 772 | |
| 773 | static int nfit_mem_init(struct acpi_nfit_desc *acpi_desc) |
| 774 | { |
| 775 | struct nfit_spa *nfit_spa; |
| 776 | |
| 777 | /* |
| 778 | * For each SPA-DCR or SPA-PMEM address range find its |
| 779 | * corresponding MEMDEV(s). From each MEMDEV find the |
| 780 | * corresponding DCR. Then, if we're operating on a SPA-DCR, |
| 781 | * try to find a SPA-BDW and a corresponding BDW that references |
| 782 | * the DCR. Throw it all into an nfit_mem object. Note, that |
| 783 | * BDWs are optional. |
| 784 | */ |
| 785 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| 786 | int rc; |
| 787 | |
| 788 | rc = nfit_mem_dcr_init(acpi_desc, nfit_spa->spa); |
| 789 | if (rc) |
| 790 | return rc; |
| 791 | } |
| 792 | |
| 793 | list_sort(NULL, &acpi_desc->dimms, nfit_mem_cmp); |
| 794 | |
| 795 | return 0; |
| 796 | } |
| 797 | |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 798 | static ssize_t revision_show(struct device *dev, |
| 799 | struct device_attribute *attr, char *buf) |
| 800 | { |
| 801 | struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev); |
| 802 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); |
| 803 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| 804 | |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 805 | return sprintf(buf, "%d\n", acpi_desc->acpi_header.revision); |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 806 | } |
| 807 | static DEVICE_ATTR_RO(revision); |
| 808 | |
| 809 | static struct attribute *acpi_nfit_attributes[] = { |
| 810 | &dev_attr_revision.attr, |
| 811 | NULL, |
| 812 | }; |
| 813 | |
| 814 | static struct attribute_group acpi_nfit_attribute_group = { |
| 815 | .name = "nfit", |
| 816 | .attrs = acpi_nfit_attributes, |
| 817 | }; |
| 818 | |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 819 | static const struct attribute_group *acpi_nfit_attribute_groups[] = { |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 820 | &nvdimm_bus_attribute_group, |
| 821 | &acpi_nfit_attribute_group, |
| 822 | NULL, |
| 823 | }; |
| 824 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 825 | static struct acpi_nfit_memory_map *to_nfit_memdev(struct device *dev) |
| 826 | { |
| 827 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 828 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 829 | |
| 830 | return __to_nfit_memdev(nfit_mem); |
| 831 | } |
| 832 | |
| 833 | static struct acpi_nfit_control_region *to_nfit_dcr(struct device *dev) |
| 834 | { |
| 835 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 836 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 837 | |
| 838 | return nfit_mem->dcr; |
| 839 | } |
| 840 | |
| 841 | static ssize_t handle_show(struct device *dev, |
| 842 | struct device_attribute *attr, char *buf) |
| 843 | { |
| 844 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); |
| 845 | |
| 846 | return sprintf(buf, "%#x\n", memdev->device_handle); |
| 847 | } |
| 848 | static DEVICE_ATTR_RO(handle); |
| 849 | |
| 850 | static ssize_t phys_id_show(struct device *dev, |
| 851 | struct device_attribute *attr, char *buf) |
| 852 | { |
| 853 | struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev); |
| 854 | |
| 855 | return sprintf(buf, "%#x\n", memdev->physical_id); |
| 856 | } |
| 857 | static DEVICE_ATTR_RO(phys_id); |
| 858 | |
| 859 | static ssize_t vendor_show(struct device *dev, |
| 860 | struct device_attribute *attr, char *buf) |
| 861 | { |
| 862 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 863 | |
Toshi Kani | 5ad9a7f | 2016-04-25 15:34:58 -0600 | [diff] [blame] | 864 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->vendor_id)); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 865 | } |
| 866 | static DEVICE_ATTR_RO(vendor); |
| 867 | |
| 868 | static ssize_t rev_id_show(struct device *dev, |
| 869 | struct device_attribute *attr, char *buf) |
| 870 | { |
| 871 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 872 | |
Toshi Kani | 5ad9a7f | 2016-04-25 15:34:58 -0600 | [diff] [blame] | 873 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->revision_id)); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 874 | } |
| 875 | static DEVICE_ATTR_RO(rev_id); |
| 876 | |
| 877 | static ssize_t device_show(struct device *dev, |
| 878 | struct device_attribute *attr, char *buf) |
| 879 | { |
| 880 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 881 | |
Toshi Kani | 5ad9a7f | 2016-04-25 15:34:58 -0600 | [diff] [blame] | 882 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->device_id)); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 883 | } |
| 884 | static DEVICE_ATTR_RO(device); |
| 885 | |
Dan Williams | 6ca7208 | 2016-04-29 10:33:23 -0700 | [diff] [blame] | 886 | static ssize_t subsystem_vendor_show(struct device *dev, |
| 887 | struct device_attribute *attr, char *buf) |
| 888 | { |
| 889 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 890 | |
| 891 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_vendor_id)); |
| 892 | } |
| 893 | static DEVICE_ATTR_RO(subsystem_vendor); |
| 894 | |
| 895 | static ssize_t subsystem_rev_id_show(struct device *dev, |
| 896 | struct device_attribute *attr, char *buf) |
| 897 | { |
| 898 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 899 | |
| 900 | return sprintf(buf, "0x%04x\n", |
| 901 | be16_to_cpu(dcr->subsystem_revision_id)); |
| 902 | } |
| 903 | static DEVICE_ATTR_RO(subsystem_rev_id); |
| 904 | |
| 905 | static ssize_t subsystem_device_show(struct device *dev, |
| 906 | struct device_attribute *attr, char *buf) |
| 907 | { |
| 908 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 909 | |
| 910 | return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_device_id)); |
| 911 | } |
| 912 | static DEVICE_ATTR_RO(subsystem_device); |
| 913 | |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 914 | static int num_nvdimm_formats(struct nvdimm *nvdimm) |
| 915 | { |
| 916 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 917 | int formats = 0; |
| 918 | |
| 919 | if (nfit_mem->memdev_pmem) |
| 920 | formats++; |
| 921 | if (nfit_mem->memdev_bdw) |
| 922 | formats++; |
| 923 | return formats; |
| 924 | } |
| 925 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 926 | static ssize_t format_show(struct device *dev, |
| 927 | struct device_attribute *attr, char *buf) |
| 928 | { |
| 929 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 930 | |
Dan Williams | 1bcbf42 | 2016-06-29 11:19:32 -0700 | [diff] [blame] | 931 | return sprintf(buf, "0x%04x\n", le16_to_cpu(dcr->code)); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 932 | } |
| 933 | static DEVICE_ATTR_RO(format); |
| 934 | |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 935 | static ssize_t format1_show(struct device *dev, |
| 936 | struct device_attribute *attr, char *buf) |
| 937 | { |
| 938 | u32 handle; |
| 939 | ssize_t rc = -ENXIO; |
| 940 | struct nfit_mem *nfit_mem; |
| 941 | struct nfit_memdev *nfit_memdev; |
| 942 | struct acpi_nfit_desc *acpi_desc; |
| 943 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 944 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 945 | |
| 946 | nfit_mem = nvdimm_provider_data(nvdimm); |
| 947 | acpi_desc = nfit_mem->acpi_desc; |
| 948 | handle = to_nfit_memdev(dev)->device_handle; |
| 949 | |
| 950 | /* assumes DIMMs have at most 2 published interface codes */ |
| 951 | mutex_lock(&acpi_desc->init_mutex); |
| 952 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 953 | struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev; |
| 954 | struct nfit_dcr *nfit_dcr; |
| 955 | |
| 956 | if (memdev->device_handle != handle) |
| 957 | continue; |
| 958 | |
| 959 | list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) { |
| 960 | if (nfit_dcr->dcr->region_index != memdev->region_index) |
| 961 | continue; |
| 962 | if (nfit_dcr->dcr->code == dcr->code) |
| 963 | continue; |
Dan Williams | 1bcbf42 | 2016-06-29 11:19:32 -0700 | [diff] [blame] | 964 | rc = sprintf(buf, "0x%04x\n", |
| 965 | le16_to_cpu(nfit_dcr->dcr->code)); |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 966 | break; |
| 967 | } |
| 968 | if (rc != ENXIO) |
| 969 | break; |
| 970 | } |
| 971 | mutex_unlock(&acpi_desc->init_mutex); |
| 972 | return rc; |
| 973 | } |
| 974 | static DEVICE_ATTR_RO(format1); |
| 975 | |
| 976 | static ssize_t formats_show(struct device *dev, |
| 977 | struct device_attribute *attr, char *buf) |
| 978 | { |
| 979 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 980 | |
| 981 | return sprintf(buf, "%d\n", num_nvdimm_formats(nvdimm)); |
| 982 | } |
| 983 | static DEVICE_ATTR_RO(formats); |
| 984 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 985 | static ssize_t serial_show(struct device *dev, |
| 986 | struct device_attribute *attr, char *buf) |
| 987 | { |
| 988 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 989 | |
Toshi Kani | 5ad9a7f | 2016-04-25 15:34:58 -0600 | [diff] [blame] | 990 | return sprintf(buf, "0x%08x\n", be32_to_cpu(dcr->serial_number)); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 991 | } |
| 992 | static DEVICE_ATTR_RO(serial); |
| 993 | |
Dan Williams | a94e3fb | 2016-04-28 18:18:05 -0700 | [diff] [blame] | 994 | static ssize_t family_show(struct device *dev, |
| 995 | struct device_attribute *attr, char *buf) |
| 996 | { |
| 997 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 998 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 999 | |
| 1000 | if (nfit_mem->family < 0) |
| 1001 | return -ENXIO; |
| 1002 | return sprintf(buf, "%d\n", nfit_mem->family); |
| 1003 | } |
| 1004 | static DEVICE_ATTR_RO(family); |
| 1005 | |
| 1006 | static ssize_t dsm_mask_show(struct device *dev, |
| 1007 | struct device_attribute *attr, char *buf) |
| 1008 | { |
| 1009 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 1010 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1011 | |
| 1012 | if (nfit_mem->family < 0) |
| 1013 | return -ENXIO; |
| 1014 | return sprintf(buf, "%#lx\n", nfit_mem->dsm_mask); |
| 1015 | } |
| 1016 | static DEVICE_ATTR_RO(dsm_mask); |
| 1017 | |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1018 | static ssize_t flags_show(struct device *dev, |
| 1019 | struct device_attribute *attr, char *buf) |
| 1020 | { |
| 1021 | u16 flags = to_nfit_memdev(dev)->flags; |
| 1022 | |
| 1023 | return sprintf(buf, "%s%s%s%s%s\n", |
Toshi Kani | 402bae5 | 2015-08-26 10:20:23 -0600 | [diff] [blame] | 1024 | flags & ACPI_NFIT_MEM_SAVE_FAILED ? "save_fail " : "", |
| 1025 | flags & ACPI_NFIT_MEM_RESTORE_FAILED ? "restore_fail " : "", |
| 1026 | flags & ACPI_NFIT_MEM_FLUSH_FAILED ? "flush_fail " : "", |
Bob Moore | ca321d1 | 2015-10-19 10:24:52 +0800 | [diff] [blame] | 1027 | flags & ACPI_NFIT_MEM_NOT_ARMED ? "not_armed " : "", |
Toshi Kani | 402bae5 | 2015-08-26 10:20:23 -0600 | [diff] [blame] | 1028 | flags & ACPI_NFIT_MEM_HEALTH_OBSERVED ? "smart_event " : ""); |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1029 | } |
| 1030 | static DEVICE_ATTR_RO(flags); |
| 1031 | |
Toshi Kani | 38a879b | 2016-04-25 15:34:59 -0600 | [diff] [blame] | 1032 | static ssize_t id_show(struct device *dev, |
| 1033 | struct device_attribute *attr, char *buf) |
| 1034 | { |
| 1035 | struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev); |
| 1036 | |
| 1037 | if (dcr->valid_fields & ACPI_NFIT_CONTROL_MFG_INFO_VALID) |
| 1038 | return sprintf(buf, "%04x-%02x-%04x-%08x\n", |
| 1039 | be16_to_cpu(dcr->vendor_id), |
| 1040 | dcr->manufacturing_location, |
| 1041 | be16_to_cpu(dcr->manufacturing_date), |
| 1042 | be32_to_cpu(dcr->serial_number)); |
| 1043 | else |
| 1044 | return sprintf(buf, "%04x-%08x\n", |
| 1045 | be16_to_cpu(dcr->vendor_id), |
| 1046 | be32_to_cpu(dcr->serial_number)); |
| 1047 | } |
| 1048 | static DEVICE_ATTR_RO(id); |
| 1049 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1050 | static struct attribute *acpi_nfit_dimm_attributes[] = { |
| 1051 | &dev_attr_handle.attr, |
| 1052 | &dev_attr_phys_id.attr, |
| 1053 | &dev_attr_vendor.attr, |
| 1054 | &dev_attr_device.attr, |
Dan Williams | 6ca7208 | 2016-04-29 10:33:23 -0700 | [diff] [blame] | 1055 | &dev_attr_rev_id.attr, |
| 1056 | &dev_attr_subsystem_vendor.attr, |
| 1057 | &dev_attr_subsystem_device.attr, |
| 1058 | &dev_attr_subsystem_rev_id.attr, |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1059 | &dev_attr_format.attr, |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1060 | &dev_attr_formats.attr, |
| 1061 | &dev_attr_format1.attr, |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1062 | &dev_attr_serial.attr, |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1063 | &dev_attr_flags.attr, |
Toshi Kani | 38a879b | 2016-04-25 15:34:59 -0600 | [diff] [blame] | 1064 | &dev_attr_id.attr, |
Dan Williams | a94e3fb | 2016-04-28 18:18:05 -0700 | [diff] [blame] | 1065 | &dev_attr_family.attr, |
| 1066 | &dev_attr_dsm_mask.attr, |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1067 | NULL, |
| 1068 | }; |
| 1069 | |
| 1070 | static umode_t acpi_nfit_dimm_attr_visible(struct kobject *kobj, |
| 1071 | struct attribute *a, int n) |
| 1072 | { |
| 1073 | struct device *dev = container_of(kobj, struct device, kobj); |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1074 | struct nvdimm *nvdimm = to_nvdimm(dev); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1075 | |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1076 | if (!to_nfit_dcr(dev)) |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1077 | return 0; |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 1078 | if (a == &dev_attr_format1.attr && num_nvdimm_formats(nvdimm) <= 1) |
| 1079 | return 0; |
| 1080 | return a->mode; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1081 | } |
| 1082 | |
| 1083 | static struct attribute_group acpi_nfit_dimm_attribute_group = { |
| 1084 | .name = "nfit", |
| 1085 | .attrs = acpi_nfit_dimm_attributes, |
| 1086 | .is_visible = acpi_nfit_dimm_attr_visible, |
| 1087 | }; |
| 1088 | |
| 1089 | static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = { |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1090 | &nvdimm_attribute_group, |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 1091 | &nd_device_attribute_group, |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1092 | &acpi_nfit_dimm_attribute_group, |
| 1093 | NULL, |
| 1094 | }; |
| 1095 | |
| 1096 | static struct nvdimm *acpi_nfit_dimm_by_handle(struct acpi_nfit_desc *acpi_desc, |
| 1097 | u32 device_handle) |
| 1098 | { |
| 1099 | struct nfit_mem *nfit_mem; |
| 1100 | |
| 1101 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) |
| 1102 | if (__to_nfit_memdev(nfit_mem)->device_handle == device_handle) |
| 1103 | return nfit_mem->nvdimm; |
| 1104 | |
| 1105 | return NULL; |
| 1106 | } |
| 1107 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1108 | static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc, |
| 1109 | struct nfit_mem *nfit_mem, u32 device_handle) |
| 1110 | { |
| 1111 | struct acpi_device *adev, *adev_dimm; |
| 1112 | struct device *dev = acpi_desc->dev; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1113 | unsigned long dsm_mask; |
| 1114 | const u8 *uuid; |
Linda Knippers | 60e95f4 | 2015-07-22 16:17:22 -0400 | [diff] [blame] | 1115 | int i; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1116 | |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 1117 | /* nfit test assumes 1:1 relationship between commands and dsms */ |
| 1118 | nfit_mem->dsm_mask = acpi_desc->dimm_cmd_force_en; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1119 | nfit_mem->family = NVDIMM_FAMILY_INTEL; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1120 | adev = to_acpi_dev(acpi_desc); |
| 1121 | if (!adev) |
| 1122 | return 0; |
| 1123 | |
| 1124 | adev_dimm = acpi_find_child_device(adev, device_handle, false); |
| 1125 | nfit_mem->adev = adev_dimm; |
| 1126 | if (!adev_dimm) { |
| 1127 | dev_err(dev, "no ACPI.NFIT device with _ADR %#x, disabling...\n", |
| 1128 | device_handle); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 1129 | return force_enable_dimms ? 0 : -ENODEV; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1130 | } |
| 1131 | |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1132 | /* |
| 1133 | * Until standardization materializes we need to consider up to 3 |
Dan Williams | a722559 | 2016-07-19 12:32:39 -0700 | [diff] [blame] | 1134 | * different command sets. Note, that checking for function0 (bit0) |
| 1135 | * tells us if any commands are reachable through this uuid. |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1136 | */ |
| 1137 | for (i = NVDIMM_FAMILY_INTEL; i <= NVDIMM_FAMILY_HPE2; i++) |
Dan Williams | a722559 | 2016-07-19 12:32:39 -0700 | [diff] [blame] | 1138 | if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 1)) |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1139 | break; |
| 1140 | |
| 1141 | /* limit the supported commands to those that are publicly documented */ |
| 1142 | nfit_mem->family = i; |
Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 1143 | if (nfit_mem->family == NVDIMM_FAMILY_INTEL) { |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1144 | dsm_mask = 0x3fe; |
Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 1145 | if (disable_vendor_specific) |
| 1146 | dsm_mask &= ~(1 << ND_CMD_VENDOR); |
| 1147 | } else if (nfit_mem->family == NVDIMM_FAMILY_HPE1) |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1148 | dsm_mask = 0x1c3c76; |
Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 1149 | else if (nfit_mem->family == NVDIMM_FAMILY_HPE2) { |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1150 | dsm_mask = 0x1fe; |
Dan Williams | 8755409 | 2016-04-28 18:01:20 -0700 | [diff] [blame] | 1151 | if (disable_vendor_specific) |
| 1152 | dsm_mask &= ~(1 << 8); |
| 1153 | } else { |
Dan Williams | a722559 | 2016-07-19 12:32:39 -0700 | [diff] [blame] | 1154 | dev_dbg(dev, "unknown dimm command family\n"); |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1155 | nfit_mem->family = -1; |
Dan Williams | a722559 | 2016-07-19 12:32:39 -0700 | [diff] [blame] | 1156 | /* DSMs are optional, continue loading the driver... */ |
| 1157 | return 0; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1158 | } |
| 1159 | |
| 1160 | uuid = to_nfit_uuid(nfit_mem->family); |
| 1161 | for_each_set_bit(i, &dsm_mask, BITS_PER_LONG) |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1162 | if (acpi_check_dsm(adev_dimm->handle, uuid, 1, 1ULL << i)) |
| 1163 | set_bit(i, &nfit_mem->dsm_mask); |
| 1164 | |
Linda Knippers | 60e95f4 | 2015-07-22 16:17:22 -0400 | [diff] [blame] | 1165 | return 0; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1166 | } |
| 1167 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1168 | static int acpi_nfit_register_dimms(struct acpi_nfit_desc *acpi_desc) |
| 1169 | { |
| 1170 | struct nfit_mem *nfit_mem; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 1171 | int dimm_count = 0; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1172 | |
| 1173 | list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1174 | unsigned long flags = 0, cmd_mask; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1175 | struct nvdimm *nvdimm; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1176 | u32 device_handle; |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1177 | u16 mem_flags; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1178 | int rc; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1179 | |
| 1180 | device_handle = __to_nfit_memdev(nfit_mem)->device_handle; |
| 1181 | nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, device_handle); |
| 1182 | if (nvdimm) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 1183 | dimm_count++; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1184 | continue; |
| 1185 | } |
| 1186 | |
| 1187 | if (nfit_mem->bdw && nfit_mem->memdev_pmem) |
| 1188 | flags |= NDD_ALIASING; |
| 1189 | |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1190 | mem_flags = __to_nfit_memdev(nfit_mem)->flags; |
Bob Moore | ca321d1 | 2015-10-19 10:24:52 +0800 | [diff] [blame] | 1191 | if (mem_flags & ACPI_NFIT_MEM_NOT_ARMED) |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1192 | flags |= NDD_UNARMED; |
| 1193 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1194 | rc = acpi_nfit_add_dimm(acpi_desc, nfit_mem, device_handle); |
| 1195 | if (rc) |
| 1196 | continue; |
| 1197 | |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 1198 | /* |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1199 | * TODO: provide translation for non-NVDIMM_FAMILY_INTEL |
| 1200 | * devices (i.e. from nd_cmd to acpi_dsm) to standardize the |
| 1201 | * userspace interface. |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 1202 | */ |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1203 | cmd_mask = 1UL << ND_CMD_CALL; |
| 1204 | if (nfit_mem->family == NVDIMM_FAMILY_INTEL) |
| 1205 | cmd_mask |= nfit_mem->dsm_mask; |
| 1206 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1207 | nvdimm = nvdimm_create(acpi_desc->nvdimm_bus, nfit_mem, |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1208 | acpi_nfit_dimm_attribute_groups, |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 1209 | flags, cmd_mask); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1210 | if (!nvdimm) |
| 1211 | return -ENOMEM; |
| 1212 | |
| 1213 | nfit_mem->nvdimm = nvdimm; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 1214 | dimm_count++; |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1215 | |
| 1216 | if ((mem_flags & ACPI_NFIT_MEM_FAILED_MASK) == 0) |
| 1217 | continue; |
| 1218 | |
Toshi Kani | 402bae5 | 2015-08-26 10:20:23 -0600 | [diff] [blame] | 1219 | dev_info(acpi_desc->dev, "%s flags:%s%s%s%s\n", |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1220 | nvdimm_name(nvdimm), |
Toshi Kani | 402bae5 | 2015-08-26 10:20:23 -0600 | [diff] [blame] | 1221 | mem_flags & ACPI_NFIT_MEM_SAVE_FAILED ? " save_fail" : "", |
| 1222 | mem_flags & ACPI_NFIT_MEM_RESTORE_FAILED ? " restore_fail":"", |
| 1223 | mem_flags & ACPI_NFIT_MEM_FLUSH_FAILED ? " flush_fail" : "", |
Bob Moore | ca321d1 | 2015-10-19 10:24:52 +0800 | [diff] [blame] | 1224 | mem_flags & ACPI_NFIT_MEM_NOT_ARMED ? " not_armed" : ""); |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 1225 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1226 | } |
| 1227 | |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 1228 | return nvdimm_bus_check_dimm_count(acpi_desc->nvdimm_bus, dimm_count); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 1229 | } |
| 1230 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1231 | static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc) |
| 1232 | { |
| 1233 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| 1234 | const u8 *uuid = to_nfit_uuid(NFIT_DEV_BUS); |
| 1235 | struct acpi_device *adev; |
| 1236 | int i; |
| 1237 | |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 1238 | nd_desc->cmd_mask = acpi_desc->bus_cmd_force_en; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1239 | adev = to_acpi_dev(acpi_desc); |
| 1240 | if (!adev) |
| 1241 | return; |
| 1242 | |
Dan Williams | d4f3236 | 2016-03-03 16:08:54 -0800 | [diff] [blame] | 1243 | for (i = ND_CMD_ARS_CAP; i <= ND_CMD_CLEAR_ERROR; i++) |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1244 | if (acpi_check_dsm(adev->handle, uuid, 1, 1ULL << i)) |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 1245 | set_bit(i, &nd_desc->cmd_mask); |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 1246 | } |
| 1247 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1248 | static ssize_t range_index_show(struct device *dev, |
| 1249 | struct device_attribute *attr, char *buf) |
| 1250 | { |
| 1251 | struct nd_region *nd_region = to_nd_region(dev); |
| 1252 | struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region); |
| 1253 | |
| 1254 | return sprintf(buf, "%d\n", nfit_spa->spa->range_index); |
| 1255 | } |
| 1256 | static DEVICE_ATTR_RO(range_index); |
| 1257 | |
| 1258 | static struct attribute *acpi_nfit_region_attributes[] = { |
| 1259 | &dev_attr_range_index.attr, |
| 1260 | NULL, |
| 1261 | }; |
| 1262 | |
| 1263 | static struct attribute_group acpi_nfit_region_attribute_group = { |
| 1264 | .name = "nfit", |
| 1265 | .attrs = acpi_nfit_region_attributes, |
| 1266 | }; |
| 1267 | |
| 1268 | static const struct attribute_group *acpi_nfit_region_attribute_groups[] = { |
| 1269 | &nd_region_attribute_group, |
| 1270 | &nd_mapping_attribute_group, |
Dan Williams | 3d88002 | 2015-05-31 15:02:11 -0400 | [diff] [blame] | 1271 | &nd_device_attribute_group, |
Toshi Kani | 74ae66c | 2015-06-19 12:18:34 -0600 | [diff] [blame] | 1272 | &nd_numa_attribute_group, |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1273 | &acpi_nfit_region_attribute_group, |
| 1274 | NULL, |
| 1275 | }; |
| 1276 | |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 1277 | /* enough info to uniquely specify an interleave set */ |
| 1278 | struct nfit_set_info { |
| 1279 | struct nfit_set_info_map { |
| 1280 | u64 region_offset; |
| 1281 | u32 serial_number; |
| 1282 | u32 pad; |
| 1283 | } mapping[0]; |
| 1284 | }; |
| 1285 | |
| 1286 | static size_t sizeof_nfit_set_info(int num_mappings) |
| 1287 | { |
| 1288 | return sizeof(struct nfit_set_info) |
| 1289 | + num_mappings * sizeof(struct nfit_set_info_map); |
| 1290 | } |
| 1291 | |
| 1292 | static int cmp_map(const void *m0, const void *m1) |
| 1293 | { |
| 1294 | const struct nfit_set_info_map *map0 = m0; |
| 1295 | const struct nfit_set_info_map *map1 = m1; |
| 1296 | |
| 1297 | return memcmp(&map0->region_offset, &map1->region_offset, |
| 1298 | sizeof(u64)); |
| 1299 | } |
| 1300 | |
| 1301 | /* Retrieve the nth entry referencing this spa */ |
| 1302 | static struct acpi_nfit_memory_map *memdev_from_spa( |
| 1303 | struct acpi_nfit_desc *acpi_desc, u16 range_index, int n) |
| 1304 | { |
| 1305 | struct nfit_memdev *nfit_memdev; |
| 1306 | |
| 1307 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) |
| 1308 | if (nfit_memdev->memdev->range_index == range_index) |
| 1309 | if (n-- == 0) |
| 1310 | return nfit_memdev->memdev; |
| 1311 | return NULL; |
| 1312 | } |
| 1313 | |
| 1314 | static int acpi_nfit_init_interleave_set(struct acpi_nfit_desc *acpi_desc, |
| 1315 | struct nd_region_desc *ndr_desc, |
| 1316 | struct acpi_nfit_system_address *spa) |
| 1317 | { |
| 1318 | int i, spa_type = nfit_spa_type(spa); |
| 1319 | struct device *dev = acpi_desc->dev; |
| 1320 | struct nd_interleave_set *nd_set; |
| 1321 | u16 nr = ndr_desc->num_mappings; |
| 1322 | struct nfit_set_info *info; |
| 1323 | |
| 1324 | if (spa_type == NFIT_SPA_PM || spa_type == NFIT_SPA_VOLATILE) |
| 1325 | /* pass */; |
| 1326 | else |
| 1327 | return 0; |
| 1328 | |
| 1329 | nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL); |
| 1330 | if (!nd_set) |
| 1331 | return -ENOMEM; |
| 1332 | |
| 1333 | info = devm_kzalloc(dev, sizeof_nfit_set_info(nr), GFP_KERNEL); |
| 1334 | if (!info) |
| 1335 | return -ENOMEM; |
| 1336 | for (i = 0; i < nr; i++) { |
| 1337 | struct nd_mapping *nd_mapping = &ndr_desc->nd_mapping[i]; |
| 1338 | struct nfit_set_info_map *map = &info->mapping[i]; |
| 1339 | struct nvdimm *nvdimm = nd_mapping->nvdimm; |
| 1340 | struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm); |
| 1341 | struct acpi_nfit_memory_map *memdev = memdev_from_spa(acpi_desc, |
| 1342 | spa->range_index, i); |
| 1343 | |
| 1344 | if (!memdev || !nfit_mem->dcr) { |
| 1345 | dev_err(dev, "%s: failed to find DCR\n", __func__); |
| 1346 | return -ENODEV; |
| 1347 | } |
| 1348 | |
| 1349 | map->region_offset = memdev->region_offset; |
| 1350 | map->serial_number = nfit_mem->dcr->serial_number; |
| 1351 | } |
| 1352 | |
| 1353 | sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map), |
| 1354 | cmp_map, NULL); |
| 1355 | nd_set->cookie = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0); |
| 1356 | ndr_desc->nd_set = nd_set; |
| 1357 | devm_kfree(dev, info); |
| 1358 | |
| 1359 | return 0; |
| 1360 | } |
| 1361 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1362 | static u64 to_interleave_offset(u64 offset, struct nfit_blk_mmio *mmio) |
| 1363 | { |
| 1364 | struct acpi_nfit_interleave *idt = mmio->idt; |
| 1365 | u32 sub_line_offset, line_index, line_offset; |
| 1366 | u64 line_no, table_skip_count, table_offset; |
| 1367 | |
| 1368 | line_no = div_u64_rem(offset, mmio->line_size, &sub_line_offset); |
| 1369 | table_skip_count = div_u64_rem(line_no, mmio->num_lines, &line_index); |
| 1370 | line_offset = idt->line_offset[line_index] |
| 1371 | * mmio->line_size; |
| 1372 | table_offset = table_skip_count * mmio->table_size; |
| 1373 | |
| 1374 | return mmio->base_offset + line_offset + table_offset + sub_line_offset; |
| 1375 | } |
| 1376 | |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1377 | static void wmb_blk(struct nfit_blk *nfit_blk) |
| 1378 | { |
| 1379 | |
| 1380 | if (nfit_blk->nvdimm_flush) { |
| 1381 | /* |
| 1382 | * The first wmb() is needed to 'sfence' all previous writes |
| 1383 | * such that they are architecturally visible for the platform |
| 1384 | * buffer flush. Note that we've already arranged for pmem |
| 1385 | * writes to avoid the cache via arch_memcpy_to_pmem(). The |
| 1386 | * final wmb() ensures ordering for the NVDIMM flush write. |
| 1387 | */ |
| 1388 | wmb(); |
| 1389 | writeq(1, nfit_blk->nvdimm_flush); |
| 1390 | wmb(); |
| 1391 | } else |
| 1392 | wmb_pmem(); |
| 1393 | } |
| 1394 | |
Ross Zwisler | de4a196 | 2015-08-20 16:27:38 -0600 | [diff] [blame] | 1395 | static u32 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw) |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1396 | { |
| 1397 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; |
| 1398 | u64 offset = nfit_blk->stat_offset + mmio->size * bw; |
| 1399 | |
| 1400 | if (mmio->num_lines) |
| 1401 | offset = to_interleave_offset(offset, mmio); |
| 1402 | |
Linus Torvalds | 12f03ee | 2015-09-08 14:35:59 -0700 | [diff] [blame] | 1403 | return readl(mmio->addr.base + offset); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1404 | } |
| 1405 | |
| 1406 | static void write_blk_ctl(struct nfit_blk *nfit_blk, unsigned int bw, |
| 1407 | resource_size_t dpa, unsigned int len, unsigned int write) |
| 1408 | { |
| 1409 | u64 cmd, offset; |
| 1410 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR]; |
| 1411 | |
| 1412 | enum { |
| 1413 | BCW_OFFSET_MASK = (1ULL << 48)-1, |
| 1414 | BCW_LEN_SHIFT = 48, |
| 1415 | BCW_LEN_MASK = (1ULL << 8) - 1, |
| 1416 | BCW_CMD_SHIFT = 56, |
| 1417 | }; |
| 1418 | |
| 1419 | cmd = (dpa >> L1_CACHE_SHIFT) & BCW_OFFSET_MASK; |
| 1420 | len = len >> L1_CACHE_SHIFT; |
| 1421 | cmd |= ((u64) len & BCW_LEN_MASK) << BCW_LEN_SHIFT; |
| 1422 | cmd |= ((u64) write) << BCW_CMD_SHIFT; |
| 1423 | |
| 1424 | offset = nfit_blk->cmd_offset + mmio->size * bw; |
| 1425 | if (mmio->num_lines) |
| 1426 | offset = to_interleave_offset(offset, mmio); |
| 1427 | |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1428 | writeq(cmd, mmio->addr.base + offset); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1429 | wmb_blk(nfit_blk); |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 1430 | |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1431 | if (nfit_blk->dimm_flags & NFIT_BLK_DCR_LATCH) |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1432 | readq(mmio->addr.base + offset); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1433 | } |
| 1434 | |
| 1435 | static int acpi_nfit_blk_single_io(struct nfit_blk *nfit_blk, |
| 1436 | resource_size_t dpa, void *iobuf, size_t len, int rw, |
| 1437 | unsigned int lane) |
| 1438 | { |
| 1439 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW]; |
| 1440 | unsigned int copied = 0; |
| 1441 | u64 base_offset; |
| 1442 | int rc; |
| 1443 | |
| 1444 | base_offset = nfit_blk->bdw_offset + dpa % L1_CACHE_BYTES |
| 1445 | + lane * mmio->size; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1446 | write_blk_ctl(nfit_blk, lane, dpa, len, rw); |
| 1447 | while (len) { |
| 1448 | unsigned int c; |
| 1449 | u64 offset; |
| 1450 | |
| 1451 | if (mmio->num_lines) { |
| 1452 | u32 line_offset; |
| 1453 | |
| 1454 | offset = to_interleave_offset(base_offset + copied, |
| 1455 | mmio); |
| 1456 | div_u64_rem(offset, mmio->line_size, &line_offset); |
| 1457 | c = min_t(size_t, len, mmio->line_size - line_offset); |
| 1458 | } else { |
| 1459 | offset = base_offset + nfit_blk->bdw_offset; |
| 1460 | c = len; |
| 1461 | } |
| 1462 | |
| 1463 | if (rw) |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1464 | memcpy_to_pmem(mmio->addr.aperture + offset, |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1465 | iobuf + copied, c); |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1466 | else { |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1467 | if (nfit_blk->dimm_flags & NFIT_BLK_READ_FLUSH) |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1468 | mmio_flush_range((void __force *) |
| 1469 | mmio->addr.aperture + offset, c); |
| 1470 | |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1471 | memcpy_from_pmem(iobuf + copied, |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1472 | mmio->addr.aperture + offset, c); |
| 1473 | } |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1474 | |
| 1475 | copied += c; |
| 1476 | len -= c; |
| 1477 | } |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1478 | |
| 1479 | if (rw) |
| 1480 | wmb_blk(nfit_blk); |
| 1481 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1482 | rc = read_blk_stat(nfit_blk, lane) ? -EIO : 0; |
| 1483 | return rc; |
| 1484 | } |
| 1485 | |
| 1486 | static int acpi_nfit_blk_region_do_io(struct nd_blk_region *ndbr, |
| 1487 | resource_size_t dpa, void *iobuf, u64 len, int rw) |
| 1488 | { |
| 1489 | struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr); |
| 1490 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW]; |
| 1491 | struct nd_region *nd_region = nfit_blk->nd_region; |
| 1492 | unsigned int lane, copied = 0; |
| 1493 | int rc = 0; |
| 1494 | |
| 1495 | lane = nd_region_acquire_lane(nd_region); |
| 1496 | while (len) { |
| 1497 | u64 c = min(len, mmio->size); |
| 1498 | |
| 1499 | rc = acpi_nfit_blk_single_io(nfit_blk, dpa + copied, |
| 1500 | iobuf + copied, c, rw, lane); |
| 1501 | if (rc) |
| 1502 | break; |
| 1503 | |
| 1504 | copied += c; |
| 1505 | len -= c; |
| 1506 | } |
| 1507 | nd_region_release_lane(nd_region, lane); |
| 1508 | |
| 1509 | return rc; |
| 1510 | } |
| 1511 | |
| 1512 | static void nfit_spa_mapping_release(struct kref *kref) |
| 1513 | { |
| 1514 | struct nfit_spa_mapping *spa_map = to_spa_map(kref); |
| 1515 | struct acpi_nfit_system_address *spa = spa_map->spa; |
| 1516 | struct acpi_nfit_desc *acpi_desc = spa_map->acpi_desc; |
| 1517 | |
| 1518 | WARN_ON(!mutex_is_locked(&acpi_desc->spa_map_mutex)); |
| 1519 | dev_dbg(acpi_desc->dev, "%s: SPA%d\n", __func__, spa->range_index); |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1520 | if (spa_map->type == SPA_MAP_APERTURE) |
| 1521 | memunmap((void __force *)spa_map->addr.aperture); |
| 1522 | else |
| 1523 | iounmap(spa_map->addr.base); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1524 | release_mem_region(spa->address, spa->length); |
| 1525 | list_del(&spa_map->list); |
| 1526 | kfree(spa_map); |
| 1527 | } |
| 1528 | |
| 1529 | static struct nfit_spa_mapping *find_spa_mapping( |
| 1530 | struct acpi_nfit_desc *acpi_desc, |
| 1531 | struct acpi_nfit_system_address *spa) |
| 1532 | { |
| 1533 | struct nfit_spa_mapping *spa_map; |
| 1534 | |
| 1535 | WARN_ON(!mutex_is_locked(&acpi_desc->spa_map_mutex)); |
| 1536 | list_for_each_entry(spa_map, &acpi_desc->spa_maps, list) |
| 1537 | if (spa_map->spa == spa) |
| 1538 | return spa_map; |
| 1539 | |
| 1540 | return NULL; |
| 1541 | } |
| 1542 | |
| 1543 | static void nfit_spa_unmap(struct acpi_nfit_desc *acpi_desc, |
| 1544 | struct acpi_nfit_system_address *spa) |
| 1545 | { |
| 1546 | struct nfit_spa_mapping *spa_map; |
| 1547 | |
| 1548 | mutex_lock(&acpi_desc->spa_map_mutex); |
| 1549 | spa_map = find_spa_mapping(acpi_desc, spa); |
| 1550 | |
| 1551 | if (spa_map) |
| 1552 | kref_put(&spa_map->kref, nfit_spa_mapping_release); |
| 1553 | mutex_unlock(&acpi_desc->spa_map_mutex); |
| 1554 | } |
| 1555 | |
| 1556 | static void __iomem *__nfit_spa_map(struct acpi_nfit_desc *acpi_desc, |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1557 | struct acpi_nfit_system_address *spa, enum spa_map_type type) |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1558 | { |
| 1559 | resource_size_t start = spa->address; |
| 1560 | resource_size_t n = spa->length; |
| 1561 | struct nfit_spa_mapping *spa_map; |
| 1562 | struct resource *res; |
| 1563 | |
| 1564 | WARN_ON(!mutex_is_locked(&acpi_desc->spa_map_mutex)); |
| 1565 | |
| 1566 | spa_map = find_spa_mapping(acpi_desc, spa); |
| 1567 | if (spa_map) { |
| 1568 | kref_get(&spa_map->kref); |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1569 | return spa_map->addr.base; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1570 | } |
| 1571 | |
| 1572 | spa_map = kzalloc(sizeof(*spa_map), GFP_KERNEL); |
| 1573 | if (!spa_map) |
| 1574 | return NULL; |
| 1575 | |
| 1576 | INIT_LIST_HEAD(&spa_map->list); |
| 1577 | spa_map->spa = spa; |
| 1578 | kref_init(&spa_map->kref); |
| 1579 | spa_map->acpi_desc = acpi_desc; |
| 1580 | |
| 1581 | res = request_mem_region(start, n, dev_name(acpi_desc->dev)); |
| 1582 | if (!res) |
| 1583 | goto err_mem; |
| 1584 | |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1585 | spa_map->type = type; |
| 1586 | if (type == SPA_MAP_APERTURE) |
| 1587 | spa_map->addr.aperture = (void __pmem *)memremap(start, n, |
| 1588 | ARCH_MEMREMAP_PMEM); |
| 1589 | else |
| 1590 | spa_map->addr.base = ioremap_nocache(start, n); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1591 | |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1592 | |
| 1593 | if (!spa_map->addr.base) |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1594 | goto err_map; |
| 1595 | |
| 1596 | list_add_tail(&spa_map->list, &acpi_desc->spa_maps); |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1597 | return spa_map->addr.base; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1598 | |
| 1599 | err_map: |
| 1600 | release_mem_region(start, n); |
| 1601 | err_mem: |
| 1602 | kfree(spa_map); |
| 1603 | return NULL; |
| 1604 | } |
| 1605 | |
| 1606 | /** |
| 1607 | * nfit_spa_map - interleave-aware managed-mappings of acpi_nfit_system_address ranges |
| 1608 | * @nvdimm_bus: NFIT-bus that provided the spa table entry |
| 1609 | * @nfit_spa: spa table to map |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1610 | * @type: aperture or control region |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1611 | * |
| 1612 | * In the case where block-data-window apertures and |
| 1613 | * dimm-control-regions are interleaved they will end up sharing a |
| 1614 | * single request_mem_region() + ioremap() for the address range. In |
| 1615 | * the style of devm nfit_spa_map() mappings are automatically dropped |
| 1616 | * when all region devices referencing the same mapping are disabled / |
| 1617 | * unbound. |
| 1618 | */ |
| 1619 | static void __iomem *nfit_spa_map(struct acpi_nfit_desc *acpi_desc, |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1620 | struct acpi_nfit_system_address *spa, enum spa_map_type type) |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1621 | { |
| 1622 | void __iomem *iomem; |
| 1623 | |
| 1624 | mutex_lock(&acpi_desc->spa_map_mutex); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1625 | iomem = __nfit_spa_map(acpi_desc, spa, type); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1626 | mutex_unlock(&acpi_desc->spa_map_mutex); |
| 1627 | |
| 1628 | return iomem; |
| 1629 | } |
| 1630 | |
| 1631 | static int nfit_blk_init_interleave(struct nfit_blk_mmio *mmio, |
| 1632 | struct acpi_nfit_interleave *idt, u16 interleave_ways) |
| 1633 | { |
| 1634 | if (idt) { |
| 1635 | mmio->num_lines = idt->line_count; |
| 1636 | mmio->line_size = idt->line_size; |
| 1637 | if (interleave_ways == 0) |
| 1638 | return -ENXIO; |
| 1639 | mmio->table_size = mmio->num_lines * interleave_ways |
| 1640 | * mmio->line_size; |
| 1641 | } |
| 1642 | |
| 1643 | return 0; |
| 1644 | } |
| 1645 | |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 1646 | static int acpi_nfit_blk_get_flags(struct nvdimm_bus_descriptor *nd_desc, |
| 1647 | struct nvdimm *nvdimm, struct nfit_blk *nfit_blk) |
| 1648 | { |
| 1649 | struct nd_cmd_dimm_flags flags; |
| 1650 | int rc; |
| 1651 | |
| 1652 | memset(&flags, 0, sizeof(flags)); |
| 1653 | rc = nd_desc->ndctl(nd_desc, nvdimm, ND_CMD_DIMM_FLAGS, &flags, |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1654 | sizeof(flags), NULL); |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 1655 | |
| 1656 | if (rc >= 0 && flags.status == 0) |
| 1657 | nfit_blk->dimm_flags = flags.flags; |
| 1658 | else if (rc == -ENOTTY) { |
| 1659 | /* fall back to a conservative default */ |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1660 | nfit_blk->dimm_flags = NFIT_BLK_DCR_LATCH | NFIT_BLK_READ_FLUSH; |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 1661 | rc = 0; |
| 1662 | } else |
| 1663 | rc = -ENXIO; |
| 1664 | |
| 1665 | return rc; |
| 1666 | } |
| 1667 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1668 | static int acpi_nfit_blk_region_enable(struct nvdimm_bus *nvdimm_bus, |
| 1669 | struct device *dev) |
| 1670 | { |
| 1671 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); |
| 1672 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| 1673 | struct nd_blk_region *ndbr = to_nd_blk_region(dev); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1674 | struct nfit_flush *nfit_flush; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1675 | struct nfit_blk_mmio *mmio; |
| 1676 | struct nfit_blk *nfit_blk; |
| 1677 | struct nfit_mem *nfit_mem; |
| 1678 | struct nvdimm *nvdimm; |
| 1679 | int rc; |
| 1680 | |
| 1681 | nvdimm = nd_blk_region_to_dimm(ndbr); |
| 1682 | nfit_mem = nvdimm_provider_data(nvdimm); |
| 1683 | if (!nfit_mem || !nfit_mem->dcr || !nfit_mem->bdw) { |
| 1684 | dev_dbg(dev, "%s: missing%s%s%s\n", __func__, |
| 1685 | nfit_mem ? "" : " nfit_mem", |
Dan Williams | 193ccca | 2015-06-30 16:09:39 -0400 | [diff] [blame] | 1686 | (nfit_mem && nfit_mem->dcr) ? "" : " dcr", |
| 1687 | (nfit_mem && nfit_mem->bdw) ? "" : " bdw"); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1688 | return -ENXIO; |
| 1689 | } |
| 1690 | |
| 1691 | nfit_blk = devm_kzalloc(dev, sizeof(*nfit_blk), GFP_KERNEL); |
| 1692 | if (!nfit_blk) |
| 1693 | return -ENOMEM; |
| 1694 | nd_blk_region_set_provider_data(ndbr, nfit_blk); |
| 1695 | nfit_blk->nd_region = to_nd_region(dev); |
| 1696 | |
| 1697 | /* map block aperture memory */ |
| 1698 | nfit_blk->bdw_offset = nfit_mem->bdw->offset; |
| 1699 | mmio = &nfit_blk->mmio[BDW]; |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1700 | mmio->addr.base = nfit_spa_map(acpi_desc, nfit_mem->spa_bdw, |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1701 | SPA_MAP_APERTURE); |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1702 | if (!mmio->addr.base) { |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1703 | dev_dbg(dev, "%s: %s failed to map bdw\n", __func__, |
| 1704 | nvdimm_name(nvdimm)); |
| 1705 | return -ENOMEM; |
| 1706 | } |
| 1707 | mmio->size = nfit_mem->bdw->size; |
| 1708 | mmio->base_offset = nfit_mem->memdev_bdw->region_offset; |
| 1709 | mmio->idt = nfit_mem->idt_bdw; |
| 1710 | mmio->spa = nfit_mem->spa_bdw; |
| 1711 | rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_bdw, |
| 1712 | nfit_mem->memdev_bdw->interleave_ways); |
| 1713 | if (rc) { |
| 1714 | dev_dbg(dev, "%s: %s failed to init bdw interleave\n", |
| 1715 | __func__, nvdimm_name(nvdimm)); |
| 1716 | return rc; |
| 1717 | } |
| 1718 | |
| 1719 | /* map block control memory */ |
| 1720 | nfit_blk->cmd_offset = nfit_mem->dcr->command_offset; |
| 1721 | nfit_blk->stat_offset = nfit_mem->dcr->status_offset; |
| 1722 | mmio = &nfit_blk->mmio[DCR]; |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1723 | mmio->addr.base = nfit_spa_map(acpi_desc, nfit_mem->spa_dcr, |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1724 | SPA_MAP_CONTROL); |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1725 | if (!mmio->addr.base) { |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1726 | dev_dbg(dev, "%s: %s failed to map dcr\n", __func__, |
| 1727 | nvdimm_name(nvdimm)); |
| 1728 | return -ENOMEM; |
| 1729 | } |
| 1730 | mmio->size = nfit_mem->dcr->window_size; |
| 1731 | mmio->base_offset = nfit_mem->memdev_dcr->region_offset; |
| 1732 | mmio->idt = nfit_mem->idt_dcr; |
| 1733 | mmio->spa = nfit_mem->spa_dcr; |
| 1734 | rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_dcr, |
| 1735 | nfit_mem->memdev_dcr->interleave_ways); |
| 1736 | if (rc) { |
| 1737 | dev_dbg(dev, "%s: %s failed to init dcr interleave\n", |
| 1738 | __func__, nvdimm_name(nvdimm)); |
| 1739 | return rc; |
| 1740 | } |
| 1741 | |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 1742 | rc = acpi_nfit_blk_get_flags(nd_desc, nvdimm, nfit_blk); |
| 1743 | if (rc < 0) { |
| 1744 | dev_dbg(dev, "%s: %s failed get DIMM flags\n", |
| 1745 | __func__, nvdimm_name(nvdimm)); |
| 1746 | return rc; |
| 1747 | } |
| 1748 | |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1749 | nfit_flush = nfit_mem->nfit_flush; |
| 1750 | if (nfit_flush && nfit_flush->flush->hint_count != 0) { |
| 1751 | nfit_blk->nvdimm_flush = devm_ioremap_nocache(dev, |
| 1752 | nfit_flush->flush->hint_address[0], 8); |
| 1753 | if (!nfit_blk->nvdimm_flush) |
| 1754 | return -ENOMEM; |
| 1755 | } |
| 1756 | |
Dan Williams | 96601ad | 2015-08-24 18:29:38 -0400 | [diff] [blame] | 1757 | if (!arch_has_wmb_pmem() && !nfit_blk->nvdimm_flush) |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 1758 | dev_warn(dev, "unable to guarantee persistence of writes\n"); |
| 1759 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1760 | if (mmio->line_size == 0) |
| 1761 | return 0; |
| 1762 | |
| 1763 | if ((u32) nfit_blk->cmd_offset % mmio->line_size |
| 1764 | + 8 > mmio->line_size) { |
| 1765 | dev_dbg(dev, "cmd_offset crosses interleave boundary\n"); |
| 1766 | return -ENXIO; |
| 1767 | } else if ((u32) nfit_blk->stat_offset % mmio->line_size |
| 1768 | + 8 > mmio->line_size) { |
| 1769 | dev_dbg(dev, "stat_offset crosses interleave boundary\n"); |
| 1770 | return -ENXIO; |
| 1771 | } |
| 1772 | |
| 1773 | return 0; |
| 1774 | } |
| 1775 | |
| 1776 | static void acpi_nfit_blk_region_disable(struct nvdimm_bus *nvdimm_bus, |
| 1777 | struct device *dev) |
| 1778 | { |
| 1779 | struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); |
| 1780 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| 1781 | struct nd_blk_region *ndbr = to_nd_blk_region(dev); |
| 1782 | struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr); |
| 1783 | int i; |
| 1784 | |
| 1785 | if (!nfit_blk) |
| 1786 | return; /* never enabled */ |
| 1787 | |
| 1788 | /* auto-free BLK spa mappings */ |
| 1789 | for (i = 0; i < 2; i++) { |
| 1790 | struct nfit_blk_mmio *mmio = &nfit_blk->mmio[i]; |
| 1791 | |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 1792 | if (mmio->addr.base) |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1793 | nfit_spa_unmap(acpi_desc, mmio->spa); |
| 1794 | } |
| 1795 | nd_blk_region_set_provider_data(ndbr, NULL); |
| 1796 | /* devm will free nfit_blk */ |
| 1797 | } |
| 1798 | |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1799 | static int ars_get_cap(struct acpi_nfit_desc *acpi_desc, |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1800 | struct nd_cmd_ars_cap *cmd, struct nfit_spa *nfit_spa) |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1801 | { |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1802 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1803 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1804 | int cmd_rc, rc; |
| 1805 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1806 | cmd->address = spa->address; |
| 1807 | cmd->length = spa->length; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1808 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_CAP, cmd, |
| 1809 | sizeof(*cmd), &cmd_rc); |
| 1810 | if (rc < 0) |
| 1811 | return rc; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1812 | return cmd_rc; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1813 | } |
| 1814 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1815 | static int ars_start(struct acpi_nfit_desc *acpi_desc, struct nfit_spa *nfit_spa) |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1816 | { |
| 1817 | int rc; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1818 | int cmd_rc; |
| 1819 | struct nd_cmd_ars_start ars_start; |
| 1820 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
| 1821 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1822 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1823 | memset(&ars_start, 0, sizeof(ars_start)); |
| 1824 | ars_start.address = spa->address; |
| 1825 | ars_start.length = spa->length; |
| 1826 | if (nfit_spa_type(spa) == NFIT_SPA_PM) |
| 1827 | ars_start.type = ND_ARS_PERSISTENT; |
| 1828 | else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) |
| 1829 | ars_start.type = ND_ARS_VOLATILE; |
| 1830 | else |
| 1831 | return -ENOTTY; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1832 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1833 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start, |
| 1834 | sizeof(ars_start), &cmd_rc); |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1835 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1836 | if (rc < 0) |
| 1837 | return rc; |
| 1838 | return cmd_rc; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1839 | } |
| 1840 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1841 | static int ars_continue(struct acpi_nfit_desc *acpi_desc) |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1842 | { |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1843 | int rc, cmd_rc; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1844 | struct nd_cmd_ars_start ars_start; |
| 1845 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| 1846 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1847 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1848 | memset(&ars_start, 0, sizeof(ars_start)); |
| 1849 | ars_start.address = ars_status->restart_address; |
| 1850 | ars_start.length = ars_status->restart_length; |
| 1851 | ars_start.type = ars_status->type; |
| 1852 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start, |
| 1853 | sizeof(ars_start), &cmd_rc); |
| 1854 | if (rc < 0) |
| 1855 | return rc; |
| 1856 | return cmd_rc; |
| 1857 | } |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1858 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1859 | static int ars_get_status(struct acpi_nfit_desc *acpi_desc) |
| 1860 | { |
| 1861 | struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc; |
| 1862 | struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status; |
| 1863 | int rc, cmd_rc; |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 1864 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1865 | rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_STATUS, ars_status, |
| 1866 | acpi_desc->ars_status_size, &cmd_rc); |
| 1867 | if (rc < 0) |
| 1868 | return rc; |
| 1869 | return cmd_rc; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1870 | } |
| 1871 | |
| 1872 | static int ars_status_process_records(struct nvdimm_bus *nvdimm_bus, |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1873 | struct nd_cmd_ars_status *ars_status) |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1874 | { |
| 1875 | int rc; |
| 1876 | u32 i; |
| 1877 | |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 1878 | for (i = 0; i < ars_status->num_records; i++) { |
| 1879 | rc = nvdimm_bus_add_poison(nvdimm_bus, |
| 1880 | ars_status->records[i].err_address, |
| 1881 | ars_status->records[i].length); |
| 1882 | if (rc) |
| 1883 | return rc; |
| 1884 | } |
| 1885 | |
| 1886 | return 0; |
| 1887 | } |
| 1888 | |
Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 1889 | static void acpi_nfit_remove_resource(void *data) |
| 1890 | { |
| 1891 | struct resource *res = data; |
| 1892 | |
| 1893 | remove_resource(res); |
| 1894 | } |
| 1895 | |
| 1896 | static int acpi_nfit_insert_resource(struct acpi_nfit_desc *acpi_desc, |
| 1897 | struct nd_region_desc *ndr_desc) |
| 1898 | { |
| 1899 | struct resource *res, *nd_res = ndr_desc->res; |
| 1900 | int is_pmem, ret; |
| 1901 | |
| 1902 | /* No operation if the region is already registered as PMEM */ |
| 1903 | is_pmem = region_intersects(nd_res->start, resource_size(nd_res), |
| 1904 | IORESOURCE_MEM, IORES_DESC_PERSISTENT_MEMORY); |
| 1905 | if (is_pmem == REGION_INTERSECTS) |
| 1906 | return 0; |
| 1907 | |
| 1908 | res = devm_kzalloc(acpi_desc->dev, sizeof(*res), GFP_KERNEL); |
| 1909 | if (!res) |
| 1910 | return -ENOMEM; |
| 1911 | |
| 1912 | res->name = "Persistent Memory"; |
| 1913 | res->start = nd_res->start; |
| 1914 | res->end = nd_res->end; |
| 1915 | res->flags = IORESOURCE_MEM; |
| 1916 | res->desc = IORES_DESC_PERSISTENT_MEMORY; |
| 1917 | |
| 1918 | ret = insert_resource(&iomem_resource, res); |
| 1919 | if (ret) |
| 1920 | return ret; |
| 1921 | |
| 1922 | ret = devm_add_action(acpi_desc->dev, acpi_nfit_remove_resource, res); |
| 1923 | if (ret) { |
| 1924 | remove_resource(res); |
| 1925 | return ret; |
| 1926 | } |
| 1927 | |
| 1928 | return 0; |
| 1929 | } |
| 1930 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1931 | static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc, |
| 1932 | struct nd_mapping *nd_mapping, struct nd_region_desc *ndr_desc, |
| 1933 | struct acpi_nfit_memory_map *memdev, |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1934 | struct nfit_spa *nfit_spa) |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1935 | { |
| 1936 | struct nvdimm *nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, |
| 1937 | memdev->device_handle); |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1938 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1939 | struct nd_blk_region_desc *ndbr_desc; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1940 | struct nfit_mem *nfit_mem; |
| 1941 | int blk_valid = 0; |
| 1942 | |
| 1943 | if (!nvdimm) { |
| 1944 | dev_err(acpi_desc->dev, "spa%d dimm: %#x not found\n", |
| 1945 | spa->range_index, memdev->device_handle); |
| 1946 | return -ENODEV; |
| 1947 | } |
| 1948 | |
| 1949 | nd_mapping->nvdimm = nvdimm; |
| 1950 | switch (nfit_spa_type(spa)) { |
| 1951 | case NFIT_SPA_PM: |
| 1952 | case NFIT_SPA_VOLATILE: |
| 1953 | nd_mapping->start = memdev->address; |
| 1954 | nd_mapping->size = memdev->region_size; |
| 1955 | break; |
| 1956 | case NFIT_SPA_DCR: |
| 1957 | nfit_mem = nvdimm_provider_data(nvdimm); |
| 1958 | if (!nfit_mem || !nfit_mem->bdw) { |
| 1959 | dev_dbg(acpi_desc->dev, "spa%d %s missing bdw\n", |
| 1960 | spa->range_index, nvdimm_name(nvdimm)); |
| 1961 | } else { |
| 1962 | nd_mapping->size = nfit_mem->bdw->capacity; |
| 1963 | nd_mapping->start = nfit_mem->bdw->start_address; |
Vishal Verma | 5212e11 | 2015-06-25 04:20:32 -0400 | [diff] [blame] | 1964 | ndr_desc->num_lanes = nfit_mem->bdw->windows; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1965 | blk_valid = 1; |
| 1966 | } |
| 1967 | |
| 1968 | ndr_desc->nd_mapping = nd_mapping; |
| 1969 | ndr_desc->num_mappings = blk_valid; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1970 | ndbr_desc = to_blk_region_desc(ndr_desc); |
| 1971 | ndbr_desc->enable = acpi_nfit_blk_region_enable; |
| 1972 | ndbr_desc->disable = acpi_nfit_blk_region_disable; |
Dan Williams | 6bc7561 | 2015-06-17 17:23:32 -0400 | [diff] [blame] | 1973 | ndbr_desc->do_io = acpi_desc->blk_do_io; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1974 | nfit_spa->nd_region = nvdimm_blk_region_create(acpi_desc->nvdimm_bus, |
| 1975 | ndr_desc); |
| 1976 | if (!nfit_spa->nd_region) |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1977 | return -ENOMEM; |
| 1978 | break; |
| 1979 | } |
| 1980 | |
| 1981 | return 0; |
| 1982 | } |
| 1983 | |
| 1984 | static int acpi_nfit_register_region(struct acpi_nfit_desc *acpi_desc, |
| 1985 | struct nfit_spa *nfit_spa) |
| 1986 | { |
| 1987 | static struct nd_mapping nd_mappings[ND_MAX_MAPPINGS]; |
| 1988 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 1989 | struct nd_blk_region_desc ndbr_desc; |
| 1990 | struct nd_region_desc *ndr_desc; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1991 | struct nfit_memdev *nfit_memdev; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1992 | struct nvdimm_bus *nvdimm_bus; |
| 1993 | struct resource res; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 1994 | int count = 0, rc; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1995 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 1996 | if (nfit_spa->nd_region) |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 1997 | return 0; |
| 1998 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 1999 | if (spa->range_index == 0) { |
| 2000 | dev_dbg(acpi_desc->dev, "%s: detected invalid spa index\n", |
| 2001 | __func__); |
| 2002 | return 0; |
| 2003 | } |
| 2004 | |
| 2005 | memset(&res, 0, sizeof(res)); |
| 2006 | memset(&nd_mappings, 0, sizeof(nd_mappings)); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2007 | memset(&ndbr_desc, 0, sizeof(ndbr_desc)); |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2008 | res.start = spa->address; |
| 2009 | res.end = res.start + spa->length - 1; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2010 | ndr_desc = &ndbr_desc.ndr_desc; |
| 2011 | ndr_desc->res = &res; |
| 2012 | ndr_desc->provider_data = nfit_spa; |
| 2013 | ndr_desc->attr_groups = acpi_nfit_region_attribute_groups; |
Toshi Kani | 41d7a6d | 2015-06-19 12:18:33 -0600 | [diff] [blame] | 2014 | if (spa->flags & ACPI_NFIT_PROXIMITY_VALID) |
| 2015 | ndr_desc->numa_node = acpi_map_pxm_to_online_node( |
| 2016 | spa->proximity_domain); |
| 2017 | else |
| 2018 | ndr_desc->numa_node = NUMA_NO_NODE; |
| 2019 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2020 | list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) { |
| 2021 | struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev; |
| 2022 | struct nd_mapping *nd_mapping; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2023 | |
| 2024 | if (memdev->range_index != spa->range_index) |
| 2025 | continue; |
| 2026 | if (count >= ND_MAX_MAPPINGS) { |
| 2027 | dev_err(acpi_desc->dev, "spa%d exceeds max mappings %d\n", |
| 2028 | spa->range_index, ND_MAX_MAPPINGS); |
| 2029 | return -ENXIO; |
| 2030 | } |
| 2031 | nd_mapping = &nd_mappings[count++]; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2032 | rc = acpi_nfit_init_mapping(acpi_desc, nd_mapping, ndr_desc, |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2033 | memdev, nfit_spa); |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2034 | if (rc) |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2035 | goto out; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2036 | } |
| 2037 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2038 | ndr_desc->nd_mapping = nd_mappings; |
| 2039 | ndr_desc->num_mappings = count; |
| 2040 | rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa); |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2041 | if (rc) |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2042 | goto out; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 2043 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2044 | nvdimm_bus = acpi_desc->nvdimm_bus; |
| 2045 | if (nfit_spa_type(spa) == NFIT_SPA_PM) { |
Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 2046 | rc = acpi_nfit_insert_resource(acpi_desc, ndr_desc); |
Dan Williams | 4890116 | 2016-03-09 17:15:43 -0800 | [diff] [blame] | 2047 | if (rc) { |
Toshi Kani | af1996e | 2016-03-09 12:47:06 -0700 | [diff] [blame] | 2048 | dev_warn(acpi_desc->dev, |
| 2049 | "failed to insert pmem resource to iomem: %d\n", |
| 2050 | rc); |
Dan Williams | 4890116 | 2016-03-09 17:15:43 -0800 | [diff] [blame] | 2051 | goto out; |
Vishal Verma | 0caeef6 | 2015-12-24 19:21:43 -0700 | [diff] [blame] | 2052 | } |
Dan Williams | 4890116 | 2016-03-09 17:15:43 -0800 | [diff] [blame] | 2053 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2054 | nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus, |
| 2055 | ndr_desc); |
| 2056 | if (!nfit_spa->nd_region) |
| 2057 | rc = -ENOMEM; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2058 | } else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) { |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2059 | nfit_spa->nd_region = nvdimm_volatile_region_create(nvdimm_bus, |
| 2060 | ndr_desc); |
| 2061 | if (!nfit_spa->nd_region) |
| 2062 | rc = -ENOMEM; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2063 | } |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2064 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2065 | out: |
| 2066 | if (rc) |
| 2067 | dev_err(acpi_desc->dev, "failed to register spa range %d\n", |
| 2068 | nfit_spa->spa->range_index); |
| 2069 | return rc; |
| 2070 | } |
| 2071 | |
| 2072 | static int ars_status_alloc(struct acpi_nfit_desc *acpi_desc, |
| 2073 | u32 max_ars) |
| 2074 | { |
| 2075 | struct device *dev = acpi_desc->dev; |
| 2076 | struct nd_cmd_ars_status *ars_status; |
| 2077 | |
| 2078 | if (acpi_desc->ars_status && acpi_desc->ars_status_size >= max_ars) { |
| 2079 | memset(acpi_desc->ars_status, 0, acpi_desc->ars_status_size); |
| 2080 | return 0; |
| 2081 | } |
| 2082 | |
| 2083 | if (acpi_desc->ars_status) |
| 2084 | devm_kfree(dev, acpi_desc->ars_status); |
| 2085 | acpi_desc->ars_status = NULL; |
| 2086 | ars_status = devm_kzalloc(dev, max_ars, GFP_KERNEL); |
| 2087 | if (!ars_status) |
| 2088 | return -ENOMEM; |
| 2089 | acpi_desc->ars_status = ars_status; |
| 2090 | acpi_desc->ars_status_size = max_ars; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2091 | return 0; |
| 2092 | } |
| 2093 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2094 | static int acpi_nfit_query_poison(struct acpi_nfit_desc *acpi_desc, |
| 2095 | struct nfit_spa *nfit_spa) |
| 2096 | { |
| 2097 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
| 2098 | int rc; |
| 2099 | |
| 2100 | if (!nfit_spa->max_ars) { |
| 2101 | struct nd_cmd_ars_cap ars_cap; |
| 2102 | |
| 2103 | memset(&ars_cap, 0, sizeof(ars_cap)); |
| 2104 | rc = ars_get_cap(acpi_desc, &ars_cap, nfit_spa); |
| 2105 | if (rc < 0) |
| 2106 | return rc; |
| 2107 | nfit_spa->max_ars = ars_cap.max_ars_out; |
| 2108 | nfit_spa->clear_err_unit = ars_cap.clear_err_unit; |
| 2109 | /* check that the supported scrub types match the spa type */ |
| 2110 | if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE && |
| 2111 | ((ars_cap.status >> 16) & ND_ARS_VOLATILE) == 0) |
| 2112 | return -ENOTTY; |
| 2113 | else if (nfit_spa_type(spa) == NFIT_SPA_PM && |
| 2114 | ((ars_cap.status >> 16) & ND_ARS_PERSISTENT) == 0) |
| 2115 | return -ENOTTY; |
| 2116 | } |
| 2117 | |
| 2118 | if (ars_status_alloc(acpi_desc, nfit_spa->max_ars)) |
| 2119 | return -ENOMEM; |
| 2120 | |
| 2121 | rc = ars_get_status(acpi_desc); |
| 2122 | if (rc < 0 && rc != -ENOSPC) |
| 2123 | return rc; |
| 2124 | |
| 2125 | if (ars_status_process_records(acpi_desc->nvdimm_bus, |
| 2126 | acpi_desc->ars_status)) |
| 2127 | return -ENOMEM; |
| 2128 | |
| 2129 | return 0; |
| 2130 | } |
| 2131 | |
| 2132 | static void acpi_nfit_async_scrub(struct acpi_nfit_desc *acpi_desc, |
| 2133 | struct nfit_spa *nfit_spa) |
| 2134 | { |
| 2135 | struct acpi_nfit_system_address *spa = nfit_spa->spa; |
| 2136 | unsigned int overflow_retry = scrub_overflow_abort; |
| 2137 | u64 init_ars_start = 0, init_ars_len = 0; |
| 2138 | struct device *dev = acpi_desc->dev; |
| 2139 | unsigned int tmo = scrub_timeout; |
| 2140 | int rc; |
| 2141 | |
| 2142 | if (nfit_spa->ars_done || !nfit_spa->nd_region) |
| 2143 | return; |
| 2144 | |
| 2145 | rc = ars_start(acpi_desc, nfit_spa); |
| 2146 | /* |
| 2147 | * If we timed out the initial scan we'll still be busy here, |
| 2148 | * and will wait another timeout before giving up permanently. |
| 2149 | */ |
| 2150 | if (rc < 0 && rc != -EBUSY) |
| 2151 | return; |
| 2152 | |
| 2153 | do { |
| 2154 | u64 ars_start, ars_len; |
| 2155 | |
| 2156 | if (acpi_desc->cancel) |
| 2157 | break; |
| 2158 | rc = acpi_nfit_query_poison(acpi_desc, nfit_spa); |
| 2159 | if (rc == -ENOTTY) |
| 2160 | break; |
| 2161 | if (rc == -EBUSY && !tmo) { |
| 2162 | dev_warn(dev, "range %d ars timeout, aborting\n", |
| 2163 | spa->range_index); |
| 2164 | break; |
| 2165 | } |
| 2166 | |
| 2167 | if (rc == -EBUSY) { |
| 2168 | /* |
| 2169 | * Note, entries may be appended to the list |
| 2170 | * while the lock is dropped, but the workqueue |
| 2171 | * being active prevents entries being deleted / |
| 2172 | * freed. |
| 2173 | */ |
| 2174 | mutex_unlock(&acpi_desc->init_mutex); |
| 2175 | ssleep(1); |
| 2176 | tmo--; |
| 2177 | mutex_lock(&acpi_desc->init_mutex); |
| 2178 | continue; |
| 2179 | } |
| 2180 | |
| 2181 | /* we got some results, but there are more pending... */ |
| 2182 | if (rc == -ENOSPC && overflow_retry--) { |
| 2183 | if (!init_ars_len) { |
| 2184 | init_ars_len = acpi_desc->ars_status->length; |
| 2185 | init_ars_start = acpi_desc->ars_status->address; |
| 2186 | } |
| 2187 | rc = ars_continue(acpi_desc); |
| 2188 | } |
| 2189 | |
| 2190 | if (rc < 0) { |
| 2191 | dev_warn(dev, "range %d ars continuation failed\n", |
| 2192 | spa->range_index); |
| 2193 | break; |
| 2194 | } |
| 2195 | |
| 2196 | if (init_ars_len) { |
| 2197 | ars_start = init_ars_start; |
| 2198 | ars_len = init_ars_len; |
| 2199 | } else { |
| 2200 | ars_start = acpi_desc->ars_status->address; |
| 2201 | ars_len = acpi_desc->ars_status->length; |
| 2202 | } |
| 2203 | dev_dbg(dev, "spa range: %d ars from %#llx + %#llx complete\n", |
| 2204 | spa->range_index, ars_start, ars_len); |
| 2205 | /* notify the region about new poison entries */ |
| 2206 | nvdimm_region_notify(nfit_spa->nd_region, |
| 2207 | NVDIMM_REVALIDATE_POISON); |
| 2208 | break; |
| 2209 | } while (1); |
| 2210 | } |
| 2211 | |
| 2212 | static void acpi_nfit_scrub(struct work_struct *work) |
| 2213 | { |
| 2214 | struct device *dev; |
| 2215 | u64 init_scrub_length = 0; |
| 2216 | struct nfit_spa *nfit_spa; |
| 2217 | u64 init_scrub_address = 0; |
| 2218 | bool init_ars_done = false; |
| 2219 | struct acpi_nfit_desc *acpi_desc; |
| 2220 | unsigned int tmo = scrub_timeout; |
| 2221 | unsigned int overflow_retry = scrub_overflow_abort; |
| 2222 | |
| 2223 | acpi_desc = container_of(work, typeof(*acpi_desc), work); |
| 2224 | dev = acpi_desc->dev; |
| 2225 | |
| 2226 | /* |
| 2227 | * We scrub in 2 phases. The first phase waits for any platform |
| 2228 | * firmware initiated scrubs to complete and then we go search for the |
| 2229 | * affected spa regions to mark them scanned. In the second phase we |
| 2230 | * initiate a directed scrub for every range that was not scrubbed in |
| 2231 | * phase 1. |
| 2232 | */ |
| 2233 | |
| 2234 | /* process platform firmware initiated scrubs */ |
| 2235 | retry: |
| 2236 | mutex_lock(&acpi_desc->init_mutex); |
| 2237 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| 2238 | struct nd_cmd_ars_status *ars_status; |
| 2239 | struct acpi_nfit_system_address *spa; |
| 2240 | u64 ars_start, ars_len; |
| 2241 | int rc; |
| 2242 | |
| 2243 | if (acpi_desc->cancel) |
| 2244 | break; |
| 2245 | |
| 2246 | if (nfit_spa->nd_region) |
| 2247 | continue; |
| 2248 | |
| 2249 | if (init_ars_done) { |
| 2250 | /* |
| 2251 | * No need to re-query, we're now just |
| 2252 | * reconciling all the ranges covered by the |
| 2253 | * initial scrub |
| 2254 | */ |
| 2255 | rc = 0; |
| 2256 | } else |
| 2257 | rc = acpi_nfit_query_poison(acpi_desc, nfit_spa); |
| 2258 | |
| 2259 | if (rc == -ENOTTY) { |
| 2260 | /* no ars capability, just register spa and move on */ |
| 2261 | acpi_nfit_register_region(acpi_desc, nfit_spa); |
| 2262 | continue; |
| 2263 | } |
| 2264 | |
| 2265 | if (rc == -EBUSY && !tmo) { |
| 2266 | /* fallthrough to directed scrub in phase 2 */ |
| 2267 | dev_warn(dev, "timeout awaiting ars results, continuing...\n"); |
| 2268 | break; |
| 2269 | } else if (rc == -EBUSY) { |
| 2270 | mutex_unlock(&acpi_desc->init_mutex); |
| 2271 | ssleep(1); |
| 2272 | tmo--; |
| 2273 | goto retry; |
| 2274 | } |
| 2275 | |
| 2276 | /* we got some results, but there are more pending... */ |
| 2277 | if (rc == -ENOSPC && overflow_retry--) { |
| 2278 | ars_status = acpi_desc->ars_status; |
| 2279 | /* |
| 2280 | * Record the original scrub range, so that we |
| 2281 | * can recall all the ranges impacted by the |
| 2282 | * initial scrub. |
| 2283 | */ |
| 2284 | if (!init_scrub_length) { |
| 2285 | init_scrub_length = ars_status->length; |
| 2286 | init_scrub_address = ars_status->address; |
| 2287 | } |
| 2288 | rc = ars_continue(acpi_desc); |
| 2289 | if (rc == 0) { |
| 2290 | mutex_unlock(&acpi_desc->init_mutex); |
| 2291 | goto retry; |
| 2292 | } |
| 2293 | } |
| 2294 | |
| 2295 | if (rc < 0) { |
| 2296 | /* |
| 2297 | * Initial scrub failed, we'll give it one more |
| 2298 | * try below... |
| 2299 | */ |
| 2300 | break; |
| 2301 | } |
| 2302 | |
| 2303 | /* We got some final results, record completed ranges */ |
| 2304 | ars_status = acpi_desc->ars_status; |
| 2305 | if (init_scrub_length) { |
| 2306 | ars_start = init_scrub_address; |
| 2307 | ars_len = ars_start + init_scrub_length; |
| 2308 | } else { |
| 2309 | ars_start = ars_status->address; |
| 2310 | ars_len = ars_status->length; |
| 2311 | } |
| 2312 | spa = nfit_spa->spa; |
| 2313 | |
| 2314 | if (!init_ars_done) { |
| 2315 | init_ars_done = true; |
| 2316 | dev_dbg(dev, "init scrub %#llx + %#llx complete\n", |
| 2317 | ars_start, ars_len); |
| 2318 | } |
| 2319 | if (ars_start <= spa->address && ars_start + ars_len |
| 2320 | >= spa->address + spa->length) |
| 2321 | acpi_nfit_register_region(acpi_desc, nfit_spa); |
| 2322 | } |
| 2323 | |
| 2324 | /* |
| 2325 | * For all the ranges not covered by an initial scrub we still |
| 2326 | * want to see if there are errors, but it's ok to discover them |
| 2327 | * asynchronously. |
| 2328 | */ |
| 2329 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) { |
| 2330 | /* |
| 2331 | * Flag all the ranges that still need scrubbing, but |
| 2332 | * register them now to make data available. |
| 2333 | */ |
| 2334 | if (nfit_spa->nd_region) |
| 2335 | nfit_spa->ars_done = 1; |
| 2336 | else |
| 2337 | acpi_nfit_register_region(acpi_desc, nfit_spa); |
| 2338 | } |
| 2339 | |
| 2340 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) |
| 2341 | acpi_nfit_async_scrub(acpi_desc, nfit_spa); |
| 2342 | mutex_unlock(&acpi_desc->init_mutex); |
| 2343 | } |
| 2344 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2345 | static int acpi_nfit_register_regions(struct acpi_nfit_desc *acpi_desc) |
| 2346 | { |
| 2347 | struct nfit_spa *nfit_spa; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2348 | int rc; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2349 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2350 | list_for_each_entry(nfit_spa, &acpi_desc->spas, list) |
| 2351 | if (nfit_spa_type(nfit_spa->spa) == NFIT_SPA_DCR) { |
| 2352 | /* BLK regions don't need to wait for ars results */ |
| 2353 | rc = acpi_nfit_register_region(acpi_desc, nfit_spa); |
| 2354 | if (rc) |
| 2355 | return rc; |
| 2356 | } |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2357 | |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2358 | queue_work(nfit_wq, &acpi_desc->work); |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2359 | return 0; |
| 2360 | } |
| 2361 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2362 | static int acpi_nfit_check_deletions(struct acpi_nfit_desc *acpi_desc, |
| 2363 | struct nfit_table_prev *prev) |
| 2364 | { |
| 2365 | struct device *dev = acpi_desc->dev; |
| 2366 | |
| 2367 | if (!list_empty(&prev->spas) || |
| 2368 | !list_empty(&prev->memdevs) || |
| 2369 | !list_empty(&prev->dcrs) || |
| 2370 | !list_empty(&prev->bdws) || |
| 2371 | !list_empty(&prev->idts) || |
| 2372 | !list_empty(&prev->flushes)) { |
| 2373 | dev_err(dev, "new nfit deletes entries (unsupported)\n"); |
| 2374 | return -ENXIO; |
| 2375 | } |
| 2376 | return 0; |
| 2377 | } |
| 2378 | |
Dan Williams | 6bc7561 | 2015-06-17 17:23:32 -0400 | [diff] [blame] | 2379 | int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, acpi_size sz) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2380 | { |
| 2381 | struct device *dev = acpi_desc->dev; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2382 | struct nfit_table_prev prev; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2383 | const void *end; |
| 2384 | u8 *data; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 2385 | int rc; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2386 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2387 | mutex_lock(&acpi_desc->init_mutex); |
| 2388 | |
| 2389 | INIT_LIST_HEAD(&prev.spas); |
| 2390 | INIT_LIST_HEAD(&prev.memdevs); |
| 2391 | INIT_LIST_HEAD(&prev.dcrs); |
| 2392 | INIT_LIST_HEAD(&prev.bdws); |
| 2393 | INIT_LIST_HEAD(&prev.idts); |
| 2394 | INIT_LIST_HEAD(&prev.flushes); |
| 2395 | |
| 2396 | list_cut_position(&prev.spas, &acpi_desc->spas, |
| 2397 | acpi_desc->spas.prev); |
| 2398 | list_cut_position(&prev.memdevs, &acpi_desc->memdevs, |
| 2399 | acpi_desc->memdevs.prev); |
| 2400 | list_cut_position(&prev.dcrs, &acpi_desc->dcrs, |
| 2401 | acpi_desc->dcrs.prev); |
| 2402 | list_cut_position(&prev.bdws, &acpi_desc->bdws, |
| 2403 | acpi_desc->bdws.prev); |
| 2404 | list_cut_position(&prev.idts, &acpi_desc->idts, |
| 2405 | acpi_desc->idts.prev); |
| 2406 | list_cut_position(&prev.flushes, &acpi_desc->flushes, |
| 2407 | acpi_desc->flushes.prev); |
| 2408 | |
| 2409 | data = (u8 *) acpi_desc->nfit; |
| 2410 | end = data + sz; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2411 | while (!IS_ERR_OR_NULL(data)) |
| 2412 | data = add_table(acpi_desc, &prev, data, end); |
| 2413 | |
| 2414 | if (IS_ERR(data)) { |
| 2415 | dev_dbg(dev, "%s: nfit table parsing error: %ld\n", __func__, |
| 2416 | PTR_ERR(data)); |
| 2417 | rc = PTR_ERR(data); |
| 2418 | goto out_unlock; |
| 2419 | } |
| 2420 | |
| 2421 | rc = acpi_nfit_check_deletions(acpi_desc, &prev); |
| 2422 | if (rc) |
| 2423 | goto out_unlock; |
| 2424 | |
| 2425 | if (nfit_mem_init(acpi_desc) != 0) { |
| 2426 | rc = -ENOMEM; |
| 2427 | goto out_unlock; |
| 2428 | } |
| 2429 | |
| 2430 | acpi_nfit_init_dsms(acpi_desc); |
| 2431 | |
| 2432 | rc = acpi_nfit_register_dimms(acpi_desc); |
| 2433 | if (rc) |
| 2434 | goto out_unlock; |
| 2435 | |
| 2436 | rc = acpi_nfit_register_regions(acpi_desc); |
| 2437 | |
| 2438 | out_unlock: |
| 2439 | mutex_unlock(&acpi_desc->init_mutex); |
| 2440 | return rc; |
| 2441 | } |
| 2442 | EXPORT_SYMBOL_GPL(acpi_nfit_init); |
| 2443 | |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 2444 | struct acpi_nfit_flush_work { |
| 2445 | struct work_struct work; |
| 2446 | struct completion cmp; |
| 2447 | }; |
| 2448 | |
| 2449 | static void flush_probe(struct work_struct *work) |
| 2450 | { |
| 2451 | struct acpi_nfit_flush_work *flush; |
| 2452 | |
| 2453 | flush = container_of(work, typeof(*flush), work); |
| 2454 | complete(&flush->cmp); |
| 2455 | } |
| 2456 | |
| 2457 | static int acpi_nfit_flush_probe(struct nvdimm_bus_descriptor *nd_desc) |
| 2458 | { |
| 2459 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); |
| 2460 | struct device *dev = acpi_desc->dev; |
| 2461 | struct acpi_nfit_flush_work flush; |
| 2462 | |
| 2463 | /* bounce the device lock to flush acpi_nfit_add / acpi_nfit_notify */ |
| 2464 | device_lock(dev); |
| 2465 | device_unlock(dev); |
| 2466 | |
| 2467 | /* |
| 2468 | * Scrub work could take 10s of seconds, userspace may give up so we |
| 2469 | * need to be interruptible while waiting. |
| 2470 | */ |
| 2471 | INIT_WORK_ONSTACK(&flush.work, flush_probe); |
| 2472 | COMPLETION_INITIALIZER_ONSTACK(flush.cmp); |
| 2473 | queue_work(nfit_wq, &flush.work); |
| 2474 | return wait_for_completion_interruptible(&flush.cmp); |
| 2475 | } |
| 2476 | |
Dan Williams | 87bf572 | 2016-02-22 21:50:31 -0800 | [diff] [blame] | 2477 | static int acpi_nfit_clear_to_send(struct nvdimm_bus_descriptor *nd_desc, |
| 2478 | struct nvdimm *nvdimm, unsigned int cmd) |
| 2479 | { |
| 2480 | struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc); |
| 2481 | |
| 2482 | if (nvdimm) |
| 2483 | return 0; |
| 2484 | if (cmd != ND_CMD_ARS_START) |
| 2485 | return 0; |
| 2486 | |
| 2487 | /* |
| 2488 | * The kernel and userspace may race to initiate a scrub, but |
| 2489 | * the scrub thread is prepared to lose that initial race. It |
| 2490 | * just needs guarantees that any ars it initiates are not |
| 2491 | * interrupted by any intervening start reqeusts from userspace. |
| 2492 | */ |
| 2493 | if (work_busy(&acpi_desc->work)) |
| 2494 | return -EBUSY; |
| 2495 | |
| 2496 | return 0; |
| 2497 | } |
| 2498 | |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 2499 | void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev) |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2500 | { |
| 2501 | struct nvdimm_bus_descriptor *nd_desc; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2502 | |
| 2503 | dev_set_drvdata(dev, acpi_desc); |
| 2504 | acpi_desc->dev = dev; |
| 2505 | acpi_desc->blk_do_io = acpi_nfit_blk_region_do_io; |
| 2506 | nd_desc = &acpi_desc->nd_desc; |
| 2507 | nd_desc->provider_name = "ACPI.NFIT"; |
| 2508 | nd_desc->ndctl = acpi_nfit_ctl; |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 2509 | nd_desc->flush_probe = acpi_nfit_flush_probe; |
Dan Williams | 87bf572 | 2016-02-22 21:50:31 -0800 | [diff] [blame] | 2510 | nd_desc->clear_to_send = acpi_nfit_clear_to_send; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2511 | nd_desc->attr_groups = acpi_nfit_attribute_groups; |
| 2512 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2513 | INIT_LIST_HEAD(&acpi_desc->spa_maps); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2514 | INIT_LIST_HEAD(&acpi_desc->spas); |
| 2515 | INIT_LIST_HEAD(&acpi_desc->dcrs); |
| 2516 | INIT_LIST_HEAD(&acpi_desc->bdws); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2517 | INIT_LIST_HEAD(&acpi_desc->idts); |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 2518 | INIT_LIST_HEAD(&acpi_desc->flushes); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2519 | INIT_LIST_HEAD(&acpi_desc->memdevs); |
| 2520 | INIT_LIST_HEAD(&acpi_desc->dimms); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 2521 | mutex_init(&acpi_desc->spa_map_mutex); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2522 | mutex_init(&acpi_desc->init_mutex); |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 2523 | INIT_WORK(&acpi_desc->work, acpi_nfit_scrub); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2524 | } |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 2525 | EXPORT_SYMBOL_GPL(acpi_nfit_desc_init); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2526 | |
| 2527 | static int acpi_nfit_add(struct acpi_device *adev) |
| 2528 | { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2529 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2530 | struct acpi_nfit_desc *acpi_desc; |
| 2531 | struct device *dev = &adev->dev; |
| 2532 | struct acpi_table_header *tbl; |
| 2533 | acpi_status status = AE_OK; |
| 2534 | acpi_size sz; |
| 2535 | int rc; |
| 2536 | |
Lee, Chun-Yi | 8259542 | 2016-01-21 20:32:10 +0800 | [diff] [blame] | 2537 | status = acpi_get_table_with_size(ACPI_SIG_NFIT, 0, &tbl, &sz); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2538 | if (ACPI_FAILURE(status)) { |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2539 | /* This is ok, we could have an nvdimm hotplugged later */ |
| 2540 | dev_dbg(dev, "failed to find NFIT at startup\n"); |
| 2541 | return 0; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2542 | } |
| 2543 | |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 2544 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
| 2545 | if (!acpi_desc) |
| 2546 | return -ENOMEM; |
| 2547 | acpi_nfit_desc_init(acpi_desc, &adev->dev); |
| 2548 | acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, &acpi_desc->nd_desc); |
| 2549 | if (!acpi_desc->nvdimm_bus) |
| 2550 | return -ENOMEM; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2551 | |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 2552 | /* |
| 2553 | * Save the acpi header for later and then skip it, |
| 2554 | * making nfit point to the first nfit table header. |
| 2555 | */ |
| 2556 | acpi_desc->acpi_header = *tbl; |
| 2557 | acpi_desc->nfit = (void *) tbl + sizeof(struct acpi_table_nfit); |
| 2558 | sz -= sizeof(struct acpi_table_nfit); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2559 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2560 | /* Evaluate _FIT and override with that if present */ |
| 2561 | status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf); |
| 2562 | if (ACPI_SUCCESS(status) && buf.length > 0) { |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 2563 | union acpi_object *obj; |
| 2564 | /* |
| 2565 | * Adjust for the acpi_object header of the _FIT |
| 2566 | */ |
| 2567 | obj = buf.pointer; |
| 2568 | if (obj->type == ACPI_TYPE_BUFFER) { |
| 2569 | acpi_desc->nfit = |
| 2570 | (struct acpi_nfit_header *)obj->buffer.pointer; |
| 2571 | sz = obj->buffer.length; |
| 2572 | } else |
| 2573 | dev_dbg(dev, "%s invalid type %d, ignoring _FIT\n", |
| 2574 | __func__, (int) obj->type); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2575 | } |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2576 | |
| 2577 | rc = acpi_nfit_init(acpi_desc, sz); |
| 2578 | if (rc) { |
| 2579 | nvdimm_bus_unregister(acpi_desc->nvdimm_bus); |
| 2580 | return rc; |
| 2581 | } |
| 2582 | return 0; |
| 2583 | } |
| 2584 | |
| 2585 | static int acpi_nfit_remove(struct acpi_device *adev) |
| 2586 | { |
| 2587 | struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(&adev->dev); |
| 2588 | |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 2589 | acpi_desc->cancel = 1; |
| 2590 | flush_workqueue(nfit_wq); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2591 | nvdimm_bus_unregister(acpi_desc->nvdimm_bus); |
| 2592 | return 0; |
| 2593 | } |
| 2594 | |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2595 | static void acpi_nfit_notify(struct acpi_device *adev, u32 event) |
| 2596 | { |
| 2597 | struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(&adev->dev); |
| 2598 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 2599 | struct acpi_nfit_header *nfit_saved; |
| 2600 | union acpi_object *obj; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2601 | struct device *dev = &adev->dev; |
| 2602 | acpi_status status; |
| 2603 | int ret; |
| 2604 | |
| 2605 | dev_dbg(dev, "%s: event: %d\n", __func__, event); |
| 2606 | |
| 2607 | device_lock(dev); |
| 2608 | if (!dev->driver) { |
| 2609 | /* dev->driver may be null if we're being removed */ |
| 2610 | dev_dbg(dev, "%s: no driver found for dev\n", __func__); |
Alexey Khoroshilov | d91e892 | 2015-12-11 23:24:10 +0300 | [diff] [blame] | 2611 | goto out_unlock; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2612 | } |
| 2613 | |
| 2614 | if (!acpi_desc) { |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 2615 | acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL); |
| 2616 | if (!acpi_desc) |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2617 | goto out_unlock; |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 2618 | acpi_nfit_desc_init(acpi_desc, &adev->dev); |
| 2619 | acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, &acpi_desc->nd_desc); |
| 2620 | if (!acpi_desc->nvdimm_bus) |
| 2621 | goto out_unlock; |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 2622 | } else { |
| 2623 | /* |
| 2624 | * Finish previous registration before considering new |
| 2625 | * regions. |
| 2626 | */ |
| 2627 | flush_workqueue(nfit_wq); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2628 | } |
| 2629 | |
| 2630 | /* Evaluate _FIT */ |
| 2631 | status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf); |
| 2632 | if (ACPI_FAILURE(status)) { |
| 2633 | dev_err(dev, "failed to evaluate _FIT\n"); |
| 2634 | goto out_unlock; |
| 2635 | } |
| 2636 | |
| 2637 | nfit_saved = acpi_desc->nfit; |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 2638 | obj = buf.pointer; |
| 2639 | if (obj->type == ACPI_TYPE_BUFFER) { |
| 2640 | acpi_desc->nfit = |
| 2641 | (struct acpi_nfit_header *)obj->buffer.pointer; |
| 2642 | ret = acpi_nfit_init(acpi_desc, obj->buffer.length); |
| 2643 | if (ret) { |
| 2644 | /* Merge failed, restore old nfit, and exit */ |
| 2645 | acpi_desc->nfit = nfit_saved; |
| 2646 | dev_err(dev, "failed to merge updated NFIT\n"); |
| 2647 | } |
| 2648 | } else { |
| 2649 | /* Bad _FIT, restore old nfit */ |
| 2650 | dev_err(dev, "Invalid _FIT\n"); |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2651 | } |
| 2652 | kfree(buf.pointer); |
| 2653 | |
| 2654 | out_unlock: |
| 2655 | device_unlock(dev); |
| 2656 | } |
| 2657 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2658 | static const struct acpi_device_id acpi_nfit_ids[] = { |
| 2659 | { "ACPI0012", 0 }, |
| 2660 | { "", 0 }, |
| 2661 | }; |
| 2662 | MODULE_DEVICE_TABLE(acpi, acpi_nfit_ids); |
| 2663 | |
| 2664 | static struct acpi_driver acpi_nfit_driver = { |
| 2665 | .name = KBUILD_MODNAME, |
| 2666 | .ids = acpi_nfit_ids, |
| 2667 | .ops = { |
| 2668 | .add = acpi_nfit_add, |
| 2669 | .remove = acpi_nfit_remove, |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 2670 | .notify = acpi_nfit_notify, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2671 | }, |
| 2672 | }; |
| 2673 | |
| 2674 | static __init int nfit_init(void) |
| 2675 | { |
| 2676 | BUILD_BUG_ON(sizeof(struct acpi_table_nfit) != 40); |
| 2677 | BUILD_BUG_ON(sizeof(struct acpi_nfit_system_address) != 56); |
| 2678 | BUILD_BUG_ON(sizeof(struct acpi_nfit_memory_map) != 48); |
| 2679 | BUILD_BUG_ON(sizeof(struct acpi_nfit_interleave) != 20); |
| 2680 | BUILD_BUG_ON(sizeof(struct acpi_nfit_smbios) != 9); |
| 2681 | BUILD_BUG_ON(sizeof(struct acpi_nfit_control_region) != 80); |
| 2682 | BUILD_BUG_ON(sizeof(struct acpi_nfit_data_region) != 40); |
| 2683 | |
| 2684 | acpi_str_to_uuid(UUID_VOLATILE_MEMORY, nfit_uuid[NFIT_SPA_VOLATILE]); |
| 2685 | acpi_str_to_uuid(UUID_PERSISTENT_MEMORY, nfit_uuid[NFIT_SPA_PM]); |
| 2686 | acpi_str_to_uuid(UUID_CONTROL_REGION, nfit_uuid[NFIT_SPA_DCR]); |
| 2687 | acpi_str_to_uuid(UUID_DATA_REGION, nfit_uuid[NFIT_SPA_BDW]); |
| 2688 | acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_VDISK]); |
| 2689 | acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_CD, nfit_uuid[NFIT_SPA_VCD]); |
| 2690 | acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_PDISK]); |
| 2691 | acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_CD, nfit_uuid[NFIT_SPA_PCD]); |
| 2692 | acpi_str_to_uuid(UUID_NFIT_BUS, nfit_uuid[NFIT_DEV_BUS]); |
| 2693 | acpi_str_to_uuid(UUID_NFIT_DIMM, nfit_uuid[NFIT_DEV_DIMM]); |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 2694 | acpi_str_to_uuid(UUID_NFIT_DIMM_N_HPE1, nfit_uuid[NFIT_DEV_DIMM_N_HPE1]); |
| 2695 | acpi_str_to_uuid(UUID_NFIT_DIMM_N_HPE2, nfit_uuid[NFIT_DEV_DIMM_N_HPE2]); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2696 | |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 2697 | nfit_wq = create_singlethread_workqueue("nfit"); |
| 2698 | if (!nfit_wq) |
| 2699 | return -ENOMEM; |
| 2700 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2701 | return acpi_bus_register_driver(&acpi_nfit_driver); |
| 2702 | } |
| 2703 | |
| 2704 | static __exit void nfit_exit(void) |
| 2705 | { |
| 2706 | acpi_bus_unregister_driver(&acpi_nfit_driver); |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 2707 | destroy_workqueue(nfit_wq); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 2708 | } |
| 2709 | |
| 2710 | module_init(nfit_init); |
| 2711 | module_exit(nfit_exit); |
| 2712 | MODULE_LICENSE("GPL v2"); |
| 2713 | MODULE_AUTHOR("Intel Corporation"); |