Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 1 | # |
| 2 | # PINCTRL infrastructure and drivers |
| 3 | # |
| 4 | |
Linus Walleij | 45f034e | 2011-11-05 21:28:46 +0100 | [diff] [blame] | 5 | config PINCTRL |
| 6 | bool |
Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 7 | |
| 8 | if PINCTRL |
| 9 | |
Linus Walleij | 45f034e | 2011-11-05 21:28:46 +0100 | [diff] [blame] | 10 | menu "Pin controllers" |
| 11 | depends on PINCTRL |
| 12 | |
Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 13 | config PINMUX |
Linus Walleij | ae6b4d8 | 2011-10-19 18:14:33 +0200 | [diff] [blame] | 14 | bool "Support pin multiplexing controllers" |
| 15 | |
| 16 | config PINCONF |
| 17 | bool "Support pin configuration controllers" |
Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 18 | |
Linus Walleij | 394349f | 2011-11-24 18:27:15 +0100 | [diff] [blame] | 19 | config GENERIC_PINCONF |
| 20 | bool |
| 21 | select PINCONF |
| 22 | |
Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 23 | config DEBUG_PINCTRL |
| 24 | bool "Debug PINCTRL calls" |
| 25 | depends on DEBUG_KERNEL |
| 26 | help |
| 27 | Say Y here to add some extra checks and diagnostics to PINCTRL calls. |
| 28 | |
Dong Aisheng | ae75ff8 | 2012-04-27 20:26:16 +0800 | [diff] [blame] | 29 | config PINCTRL_IMX |
| 30 | bool |
| 31 | select PINMUX |
| 32 | select PINCONF |
| 33 | |
Dong Aisheng | d8fe357 | 2012-04-27 20:26:17 +0800 | [diff] [blame^] | 34 | config PINCTRL_IMX6Q |
| 35 | bool "IMX6Q pinctrl driver" |
| 36 | depends on OF |
| 37 | depends on SOC_IMX6Q |
| 38 | select PINCTRL_IMX |
| 39 | help |
| 40 | Say Y here to enable the imx6q pinctrl driver |
| 41 | |
Haojian Zhuang | f4e6698 | 2012-01-04 10:26:33 +0800 | [diff] [blame] | 42 | config PINCTRL_PXA3xx |
| 43 | bool |
| 44 | select PINMUX |
| 45 | |
| 46 | config PINCTRL_MMP2 |
| 47 | bool "MMP2 pin controller driver" |
| 48 | depends on ARCH_MMP |
| 49 | select PINCTRL_PXA3xx |
| 50 | select PINCONF |
| 51 | |
| 52 | config PINCTRL_PXA168 |
| 53 | bool "PXA168 pin controller driver" |
| 54 | depends on ARCH_MMP |
| 55 | select PINCTRL_PXA3xx |
| 56 | select PINCONF |
| 57 | |
| 58 | config PINCTRL_PXA910 |
| 59 | bool "PXA910 pin controller driver" |
| 60 | depends on ARCH_MMP |
| 61 | select PINCTRL_PXA3xx |
| 62 | select PINCONF |
| 63 | |
Linus Walleij | 3bece55 | 2011-12-18 23:44:26 +0100 | [diff] [blame] | 64 | config PINCTRL_SIRF |
| 65 | bool "CSR SiRFprimaII pin controller driver" |
Rongjun Ying | 393daa8 | 2011-10-09 03:11:13 -0700 | [diff] [blame] | 66 | depends on ARCH_PRIMA2 |
| 67 | select PINMUX |
Rongjun Ying | 393daa8 | 2011-10-09 03:11:13 -0700 | [diff] [blame] | 68 | |
Stephen Warren | 971dac7 | 2012-02-01 14:04:47 -0700 | [diff] [blame] | 69 | config PINCTRL_TEGRA |
| 70 | bool |
| 71 | |
| 72 | config PINCTRL_TEGRA20 |
| 73 | bool |
| 74 | select PINMUX |
| 75 | select PINCONF |
| 76 | select PINCTRL_TEGRA |
| 77 | |
| 78 | config PINCTRL_TEGRA30 |
| 79 | bool |
| 80 | select PINMUX |
| 81 | select PINCONF |
| 82 | select PINCTRL_TEGRA |
| 83 | |
Linus Walleij | 3bece55 | 2011-12-18 23:44:26 +0100 | [diff] [blame] | 84 | config PINCTRL_U300 |
| 85 | bool "U300 pin controller driver" |
Linus Walleij | 98da352 | 2011-05-02 20:54:38 +0200 | [diff] [blame] | 86 | depends on ARCH_U300 |
| 87 | select PINMUX |
Linus Walleij | dc0b1aa | 2011-11-16 21:58:10 +0100 | [diff] [blame] | 88 | select GENERIC_PINCONF |
Linus Walleij | 45f034e | 2011-11-05 21:28:46 +0100 | [diff] [blame] | 89 | |
Linus Walleij | ca402d3 | 2011-11-16 09:22:59 +0100 | [diff] [blame] | 90 | config PINCTRL_COH901 |
| 91 | bool "ST-Ericsson U300 COH 901 335/571 GPIO" |
Linus Walleij | b4e3ac7 | 2011-11-16 10:24:39 +0100 | [diff] [blame] | 92 | depends on GPIOLIB && ARCH_U300 && PINMUX_U300 |
Linus Walleij | ca402d3 | 2011-11-16 09:22:59 +0100 | [diff] [blame] | 93 | help |
| 94 | Say yes here to support GPIO interface on ST-Ericsson U300. |
| 95 | The names of the two IP block variants supported are |
| 96 | COH 901 335 and COH 901 571/3. They contain 3, 5 or 7 |
| 97 | ports of 8 GPIO pins each. |
| 98 | |
Linus Walleij | 45f034e | 2011-11-05 21:28:46 +0100 | [diff] [blame] | 99 | endmenu |
Linus Walleij | 98da352 | 2011-05-02 20:54:38 +0200 | [diff] [blame] | 100 | |
Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 101 | endif |