blob: a4c67abc0f989b224ef7edaa508d4223c69f1550 [file] [log] [blame]
Benjamin Gaignard96006a72014-12-11 13:34:42 +01001/*
2 * Copyright (C) STMicroelectronics SA 2014
3 * Authors: Vincent Abriou <vincent.abriou@st.com>
4 * Fabien Dessenne <fabien.dessenne@st.com>
5 * for STMicroelectronics.
6 * License terms: GNU General Public License (GPL), version 2
7 */
Benjamin Gaignard96006a72014-12-11 13:34:42 +01008
Vincent Abrioudd86dc22016-02-10 10:48:20 +01009#include <drm/drm_atomic.h>
Vincent Abriou29d1dc62015-08-03 14:22:16 +020010#include <drm/drm_fb_cma_helper.h>
11#include <drm/drm_gem_cma_helper.h>
Vincent Abriou29d1dc62015-08-03 14:22:16 +020012
13#include "sti_compositor.h"
Benjamin Gaignard96006a72014-12-11 13:34:42 +010014#include "sti_cursor.h"
Vincent Abriou9e1f05b2015-07-31 11:32:34 +020015#include "sti_plane.h"
Benjamin Gaignard96006a72014-12-11 13:34:42 +010016#include "sti_vtg.h"
17
18/* Registers */
19#define CUR_CTL 0x00
20#define CUR_VPO 0x0C
21#define CUR_PML 0x14
22#define CUR_PMP 0x18
23#define CUR_SIZE 0x1C
24#define CUR_CML 0x20
25#define CUR_AWS 0x28
26#define CUR_AWE 0x2C
27
28#define CUR_CTL_CLUT_UPDATE BIT(1)
29
30#define STI_CURS_MIN_SIZE 1
31#define STI_CURS_MAX_SIZE 128
32
33/*
34 * pixmap dma buffer stucture
35 *
36 * @paddr: physical address
37 * @size: buffer size
38 * @base: virtual address
39 */
40struct dma_pixmap {
41 dma_addr_t paddr;
42 size_t size;
43 void *base;
44};
45
46/**
47 * STI Cursor structure
48 *
Vincent Abriou29d1dc62015-08-03 14:22:16 +020049 * @sti_plane: sti_plane structure
50 * @dev: driver device
51 * @regs: cursor registers
52 * @width: cursor width
53 * @height: cursor height
54 * @clut: color look up table
55 * @clut_paddr: color look up table physical address
56 * @pixmap: pixmap dma buffer (clut8-format cursor)
Benjamin Gaignard96006a72014-12-11 13:34:42 +010057 */
58struct sti_cursor {
Vincent Abriou871bcdf2015-07-31 11:32:13 +020059 struct sti_plane plane;
60 struct device *dev;
61 void __iomem *regs;
Benjamin Gaignard96006a72014-12-11 13:34:42 +010062 unsigned int width;
63 unsigned int height;
64 unsigned short *clut;
65 dma_addr_t clut_paddr;
66 struct dma_pixmap pixmap;
67};
68
69static const uint32_t cursor_supported_formats[] = {
70 DRM_FORMAT_ARGB8888,
71};
72
Vincent Abriou871bcdf2015-07-31 11:32:13 +020073#define to_sti_cursor(x) container_of(x, struct sti_cursor, plane)
Benjamin Gaignard96006a72014-12-11 13:34:42 +010074
Vincent Abriou29d1dc62015-08-03 14:22:16 +020075static void sti_cursor_argb8888_to_clut8(struct sti_cursor *cursor, u32 *src)
Benjamin Gaignard96006a72014-12-11 13:34:42 +010076{
Benjamin Gaignard96006a72014-12-11 13:34:42 +010077 u8 *dst = cursor->pixmap.base;
78 unsigned int i, j;
79 u32 a, r, g, b;
80
81 for (i = 0; i < cursor->height; i++) {
82 for (j = 0; j < cursor->width; j++) {
83 /* Pick the 2 higher bits of each component */
84 a = (*src >> 30) & 3;
85 r = (*src >> 22) & 3;
86 g = (*src >> 14) & 3;
87 b = (*src >> 6) & 3;
88 *dst = a << 6 | r << 4 | g << 2 | b;
89 src++;
90 dst++;
91 }
92 }
93}
94
Vincent Abriou29d1dc62015-08-03 14:22:16 +020095static void sti_cursor_init(struct sti_cursor *cursor)
Benjamin Gaignard96006a72014-12-11 13:34:42 +010096{
Vincent Abriou29d1dc62015-08-03 14:22:16 +020097 unsigned short *base = cursor->clut;
98 unsigned int a, r, g, b;
99
100 /* Assign CLUT values, ARGB444 format */
101 for (a = 0; a < 4; a++)
102 for (r = 0; r < 4; r++)
103 for (g = 0; g < 4; g++)
104 for (b = 0; b < 4; b++)
105 *base++ = (a * 5) << 12 |
106 (r * 5) << 8 |
107 (g * 5) << 4 |
108 (b * 5);
109}
110
Vincent Abrioudd86dc22016-02-10 10:48:20 +0100111static int sti_cursor_atomic_check(struct drm_plane *drm_plane,
112 struct drm_plane_state *state)
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200113{
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200114 struct sti_plane *plane = to_sti_plane(drm_plane);
Vincent Abriou871bcdf2015-07-31 11:32:13 +0200115 struct sti_cursor *cursor = to_sti_cursor(plane);
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200116 struct drm_crtc *crtc = state->crtc;
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200117 struct drm_framebuffer *fb = state->fb;
Vincent Abrioudd86dc22016-02-10 10:48:20 +0100118 struct drm_crtc_state *crtc_state;
119 struct drm_display_mode *mode;
120 int dst_x, dst_y, dst_w, dst_h;
121 int src_w, src_h;
122
123 /* no need for further checks if the plane is being disabled */
124 if (!crtc || !fb)
125 return 0;
126
127 crtc_state = drm_atomic_get_crtc_state(state->state, crtc);
128 mode = &crtc_state->mode;
129 dst_x = state->crtc_x;
130 dst_y = state->crtc_y;
131 dst_w = clamp_val(state->crtc_w, 0, mode->crtc_hdisplay - dst_x);
132 dst_h = clamp_val(state->crtc_h, 0, mode->crtc_vdisplay - dst_y);
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200133 /* src_x are in 16.16 format */
Vincent Abrioudd86dc22016-02-10 10:48:20 +0100134 src_w = state->src_w >> 16;
135 src_h = state->src_h >> 16;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100136
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200137 if (src_w < STI_CURS_MIN_SIZE ||
138 src_h < STI_CURS_MIN_SIZE ||
139 src_w > STI_CURS_MAX_SIZE ||
140 src_h > STI_CURS_MAX_SIZE) {
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100141 DRM_ERROR("Invalid cursor size (%dx%d)\n",
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200142 src_w, src_h);
Vincent Abrioudd86dc22016-02-10 10:48:20 +0100143 return -EINVAL;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100144 }
145
146 /* If the cursor size has changed, re-allocated the pixmap */
147 if (!cursor->pixmap.base ||
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200148 (cursor->width != src_w) ||
149 (cursor->height != src_h)) {
150 cursor->width = src_w;
151 cursor->height = src_h;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100152
153 if (cursor->pixmap.base)
Vincent Abriou871bcdf2015-07-31 11:32:13 +0200154 dma_free_writecombine(cursor->dev,
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100155 cursor->pixmap.size,
156 cursor->pixmap.base,
157 cursor->pixmap.paddr);
158
159 cursor->pixmap.size = cursor->width * cursor->height;
160
Vincent Abriou871bcdf2015-07-31 11:32:13 +0200161 cursor->pixmap.base = dma_alloc_writecombine(cursor->dev,
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100162 cursor->pixmap.size,
163 &cursor->pixmap.paddr,
164 GFP_KERNEL | GFP_DMA);
165 if (!cursor->pixmap.base) {
166 DRM_ERROR("Failed to allocate memory for pixmap\n");
Vincent Abrioudd86dc22016-02-10 10:48:20 +0100167 return -EINVAL;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100168 }
169 }
170
Vincent Abrioudd86dc22016-02-10 10:48:20 +0100171 if (!drm_fb_cma_get_gem_obj(fb, 0)) {
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200172 DRM_ERROR("Can't get CMA GEM object for fb\n");
Vincent Abrioudd86dc22016-02-10 10:48:20 +0100173 return -EINVAL;
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200174 }
175
Vincent Abrioudd86dc22016-02-10 10:48:20 +0100176 DRM_DEBUG_KMS("CRTC:%d (%s) drm plane:%d (%s)\n",
177 crtc->base.id, sti_mixer_to_str(to_sti_mixer(crtc)),
178 drm_plane->base.id, sti_plane_to_str(plane));
179 DRM_DEBUG_KMS("(%dx%d)@(%d,%d)\n", dst_w, dst_h, dst_x, dst_y);
180
181 return 0;
182}
183
184static void sti_cursor_atomic_update(struct drm_plane *drm_plane,
185 struct drm_plane_state *oldstate)
186{
187 struct drm_plane_state *state = drm_plane->state;
188 struct sti_plane *plane = to_sti_plane(drm_plane);
189 struct sti_cursor *cursor = to_sti_cursor(plane);
190 struct drm_crtc *crtc = state->crtc;
191 struct drm_framebuffer *fb = state->fb;
192 struct drm_display_mode *mode;
193 int dst_x, dst_y;
194 struct drm_gem_cma_object *cma_obj;
195 u32 y, x;
196 u32 val;
197
198 if (!crtc || !fb)
199 return;
200
201 mode = &crtc->mode;
202 dst_x = state->crtc_x;
203 dst_y = state->crtc_y;
204
205 cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
206
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100207 /* Convert ARGB8888 to CLUT8 */
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200208 sti_cursor_argb8888_to_clut8(cursor, (u32 *)cma_obj->vaddr);
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100209
210 /* AWS and AWE depend on the mode */
211 y = sti_vtg_get_line_number(*mode, 0);
212 x = sti_vtg_get_pixel_number(*mode, 0);
213 val = y << 16 | x;
Vincent Abriou871bcdf2015-07-31 11:32:13 +0200214 writel(val, cursor->regs + CUR_AWS);
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100215 y = sti_vtg_get_line_number(*mode, mode->vdisplay - 1);
216 x = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1);
217 val = y << 16 | x;
Vincent Abriou871bcdf2015-07-31 11:32:13 +0200218 writel(val, cursor->regs + CUR_AWE);
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100219
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100220 /* Set memory location, size, and position */
Vincent Abriou871bcdf2015-07-31 11:32:13 +0200221 writel(cursor->pixmap.paddr, cursor->regs + CUR_PML);
222 writel(cursor->width, cursor->regs + CUR_PMP);
223 writel(cursor->height << 16 | cursor->width, cursor->regs + CUR_SIZE);
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100224
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200225 y = sti_vtg_get_line_number(*mode, dst_y);
benjamin.gaignard@linaro.orgb83a8b52016-01-07 14:51:06 +0100226 x = sti_vtg_get_pixel_number(*mode, dst_x);
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200227 writel((y << 16) | x, cursor->regs + CUR_VPO);
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100228
Fabien Dessenne0b9d0412016-01-25 17:58:48 +0100229 /* Set and fetch CLUT */
230 writel(cursor->clut_paddr, cursor->regs + CUR_CML);
231 writel(CUR_CTL_CLUT_UPDATE, cursor->regs + CUR_CTL);
232
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200233 plane->status = STI_PLANE_UPDATED;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100234}
235
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200236static void sti_cursor_atomic_disable(struct drm_plane *drm_plane,
237 struct drm_plane_state *oldstate)
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100238{
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200239 struct sti_plane *plane = to_sti_plane(drm_plane);
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200240
241 if (!drm_plane->crtc) {
242 DRM_DEBUG_DRIVER("drm plane:%d not enabled\n",
243 drm_plane->base.id);
244 return;
245 }
246
247 DRM_DEBUG_DRIVER("CRTC:%d (%s) drm plane:%d (%s)\n",
Vincent Abrioudd86dc22016-02-10 10:48:20 +0100248 drm_plane->crtc->base.id,
249 sti_mixer_to_str(to_sti_mixer(drm_plane->crtc)),
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200250 drm_plane->base.id, sti_plane_to_str(plane));
251
252 plane->status = STI_PLANE_DISABLING;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100253}
254
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200255static const struct drm_plane_helper_funcs sti_cursor_helpers_funcs = {
Vincent Abrioudd86dc22016-02-10 10:48:20 +0100256 .atomic_check = sti_cursor_atomic_check,
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200257 .atomic_update = sti_cursor_atomic_update,
258 .atomic_disable = sti_cursor_atomic_disable,
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100259};
260
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200261struct drm_plane *sti_cursor_create(struct drm_device *drm_dev,
262 struct device *dev, int desc,
263 void __iomem *baseaddr,
264 unsigned int possible_crtcs)
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100265{
266 struct sti_cursor *cursor;
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200267 size_t size;
268 int res;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100269
270 cursor = devm_kzalloc(dev, sizeof(*cursor), GFP_KERNEL);
271 if (!cursor) {
272 DRM_ERROR("Failed to allocate memory for cursor\n");
273 return NULL;
274 }
275
276 /* Allocate clut buffer */
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200277 size = 0x100 * sizeof(unsigned short);
278 cursor->clut = dma_alloc_writecombine(dev, size, &cursor->clut_paddr,
279 GFP_KERNEL | GFP_DMA);
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100280
281 if (!cursor->clut) {
282 DRM_ERROR("Failed to allocate memory for cursor clut\n");
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200283 goto err_clut;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100284 }
285
Vincent Abriou871bcdf2015-07-31 11:32:13 +0200286 cursor->dev = dev;
287 cursor->regs = baseaddr;
288 cursor->plane.desc = desc;
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200289 cursor->plane.status = STI_PLANE_DISABLED;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100290
Vincent Abriou871bcdf2015-07-31 11:32:13 +0200291 sti_cursor_init(cursor);
292
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200293 res = drm_universal_plane_init(drm_dev, &cursor->plane.drm_plane,
294 possible_crtcs,
295 &sti_plane_helpers_funcs,
296 cursor_supported_formats,
297 ARRAY_SIZE(cursor_supported_formats),
Ville Syrjäläb0b3b792015-12-09 16:19:55 +0200298 DRM_PLANE_TYPE_CURSOR, NULL);
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200299 if (res) {
300 DRM_ERROR("Failed to initialize universal plane\n");
301 goto err_plane;
302 }
303
304 drm_plane_helper_add(&cursor->plane.drm_plane,
305 &sti_cursor_helpers_funcs);
306
307 sti_plane_init_property(&cursor->plane, DRM_PLANE_TYPE_CURSOR);
308
309 return &cursor->plane.drm_plane;
310
311err_plane:
312 dma_free_writecombine(dev, size, cursor->clut, cursor->clut_paddr);
313err_clut:
314 devm_kfree(dev, cursor);
315 return NULL;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100316}