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Jean-Christophe PLAGNIOL-VILLARDec6754a2012-07-05 16:56:09 +08001/*
2 * at91sam9x5ek.dtsi - Device Tree file for AT91SAM9x5CM Base board
3 *
4 * Copyright (C) 2012 Atmel,
5 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
6 *
7 * Licensed under GPLv2 or later.
8 */
Jean-Christophe PLAGNIOL-VILLARD6db64d22013-05-15 01:21:50 +08009#include "at91sam9x5cm.dtsi"
Jean-Christophe PLAGNIOL-VILLARDec6754a2012-07-05 16:56:09 +080010
11/ {
12 model = "Atmel AT91SAM9X5-EK";
13 compatible = "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
14
15 chosen {
Alexandre Belloni5bb27f02015-06-03 14:24:13 +020016 bootargs = "root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
17 stdout-path = "serial0:115200n8";
Jean-Christophe PLAGNIOL-VILLARDec6754a2012-07-05 16:56:09 +080018 };
19
20 ahb {
21 apb {
Ludovic Desroches4134a452012-11-19 12:24:02 +010022 mmc0: mmc@f0008000 {
Jean-Christophe PLAGNIOL-VILLARD199e2ed2012-11-20 00:38:18 +080023 pinctrl-0 = <
24 &pinctrl_board_mmc0
25 &pinctrl_mmc0_slot0_clk_cmd_dat0
26 &pinctrl_mmc0_slot0_dat1_3>;
Ludovic Desroches4134a452012-11-19 12:24:02 +010027 status = "okay";
28 slot@0 {
29 reg = <0>;
30 bus-width = <4>;
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +080031 cd-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
Ludovic Desroches4134a452012-11-19 12:24:02 +010032 };
33 };
34
35 mmc1: mmc@f000c000 {
Jean-Christophe PLAGNIOL-VILLARD199e2ed2012-11-20 00:38:18 +080036 pinctrl-0 = <
37 &pinctrl_board_mmc1
38 &pinctrl_mmc1_slot0_clk_cmd_dat0
39 &pinctrl_mmc1_slot0_dat1_3>;
Ludovic Desroches4134a452012-11-19 12:24:02 +010040 status = "okay";
41 slot@0 {
42 reg = <0>;
43 bus-width = <4>;
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +080044 cd-gpios = <&pioD 14 GPIO_ACTIVE_HIGH>;
Ludovic Desroches4134a452012-11-19 12:24:02 +010045 };
46 };
47
Jean-Christophe PLAGNIOL-VILLARDec6754a2012-07-05 16:56:09 +080048 dbgu: serial@fffff200 {
49 status = "okay";
50 };
51
52 usart0: serial@f801c000 {
53 status = "okay";
54 };
55
Jean-Christophe PLAGNIOL-VILLARD17bcaaa2013-05-03 20:49:51 +080056 usb2: gadget@f803c000 {
Sylvain Rochet73734552015-01-16 10:50:39 +010057 pinctrl-names = "default";
58 pinctrl-0 = <&pinctrl_board_usb2>;
Jean-Christophe PLAGNIOL-VILLARD17bcaaa2013-05-03 20:49:51 +080059 atmel,vbus-gpio = <&pioB 16 GPIO_ACTIVE_HIGH>;
60 status = "okay";
61 };
62
Josh Wu436ea602015-02-12 16:06:24 +080063 isi: isi@f8048000 {
64 status = "disabled";
65 port {
66 isi_0: endpoint@0 {
67 remote-endpoint = <&ov2640_0>;
68 bus-width = <8>;
69 };
70 };
71 };
72
Jean-Christophe PLAGNIOL-VILLARDec6754a2012-07-05 16:56:09 +080073 i2c0: i2c@f8010000 {
74 status = "okay";
Richard Genoud4dc6e272013-08-12 14:31:00 +020075
76 wm8731: wm8731@1a {
77 compatible = "wm8731";
78 reg = <0x1a>;
79 };
Josh Wu436ea602015-02-12 16:06:24 +080080
81 ov2640: camera@0x30 {
82 compatible = "ovti,ov2640";
83 reg = <0x30>;
84 pinctrl-names = "default";
85 pinctrl-0 = <&pinctrl_pck0_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>;
86 resetb-gpios = <&pioA 7 GPIO_ACTIVE_LOW>;
87 pwdn-gpios = <&pioA 13 GPIO_ACTIVE_HIGH>;
88 clocks = <&pck0>;
89 clock-names = "xvclk";
90 assigned-clocks = <&pck0>;
91 assigned-clock-rates = <25000000>;
92 status = "disabled";
93
94 port {
95 ov2640_0: endpoint {
96 remote-endpoint = <&isi_0>;
97 bus-width = <8>;
98 };
99 };
100 };
Jean-Christophe PLAGNIOL-VILLARDec6754a2012-07-05 16:56:09 +0800101 };
102
Jean-Christophe PLAGNIOL-VILLARD199e2ed2012-11-20 00:38:18 +0800103 pinctrl@fffff400 {
Josh Wu436ea602015-02-12 16:06:24 +0800104 camera_sensor {
105 pinctrl_pck0_as_isi_mck: pck0_as_isi_mck-0 {
106 atmel,pins =
107 <AT91_PIOC 15 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_MCK */
108 };
109
110 pinctrl_sensor_power: sensor_power-0 {
111 atmel,pins =
112 <AT91_PIOA 13 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
113 };
114
115 pinctrl_sensor_reset: sensor_reset-0 {
116 atmel,pins =
117 <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
118 };
119 };
120
Jean-Christophe PLAGNIOL-VILLARD199e2ed2012-11-20 00:38:18 +0800121 mmc0 {
122 pinctrl_board_mmc0: mmc0-board {
123 atmel,pins =
Jean-Christophe PLAGNIOL-VILLARDc9d0f312013-04-24 08:34:25 +0800124 <AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD15 gpio CD pin pull up and deglitch */
Jean-Christophe PLAGNIOL-VILLARD199e2ed2012-11-20 00:38:18 +0800125 };
126 };
127
128 mmc1 {
129 pinctrl_board_mmc1: mmc1-board {
130 atmel,pins =
Jean-Christophe PLAGNIOL-VILLARDc9d0f312013-04-24 08:34:25 +0800131 <AT91_PIOD 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD14 gpio CD pin pull up and deglitch */
Jean-Christophe PLAGNIOL-VILLARD199e2ed2012-11-20 00:38:18 +0800132 };
133 };
Sylvain Rochet73734552015-01-16 10:50:39 +0100134
135 usb2 {
136 pinctrl_board_usb2: usb2-board {
137 atmel,pins =
138 <AT91_PIOB 16 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PB16 gpio vbus sense, deglitch */
139 };
140 };
Jean-Christophe PLAGNIOL-VILLARD199e2ed2012-11-20 00:38:18 +0800141 };
Richard Genoudb6811e92013-04-03 14:03:05 +0800142
143 spi0: spi@f0000000 {
144 status = "okay";
145 cs-gpios = <&pioA 14 0>, <0>, <0>, <0>;
146 m25p80@0 {
147 compatible = "atmel,at25df321a";
148 spi-max-frequency = <50000000>;
149 reg = <0>;
150 };
151 };
Wenyou Yangc77bcef2013-05-31 11:11:33 +0800152
153 watchdog@fffffe40 {
154 status = "okay";
155 };
Richard Genoud45b76352013-08-12 14:31:01 +0200156
157 ssc0: ssc@f0010000 {
158 status = "okay";
159 };
Jean-Christophe PLAGNIOL-VILLARDec6754a2012-07-05 16:56:09 +0800160 };
161
162 usb0: ohci@00600000 {
163 status = "okay";
Nicolas Ferre69b90f12013-07-03 12:51:36 +0200164 num-ports = <3>;
165 atmel,vbus-gpio = <0 /* &pioD 18 GPIO_ACTIVE_LOW *//* Activate to have access to port A */
166 &pioD 19 GPIO_ACTIVE_LOW
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800167 &pioD 20 GPIO_ACTIVE_LOW
Jean-Christophe PLAGNIOL-VILLARDec6754a2012-07-05 16:56:09 +0800168 >;
169 };
170
171 usb1: ehci@00700000 {
172 status = "okay";
173 };
174 };
Richard Genoud90d01922013-08-12 14:31:02 +0200175
176 sound {
177 compatible = "atmel,sam9x5-wm8731-audio";
178
179 atmel,model = "wm8731 @ AT91SAM9X5EK";
180
181 atmel,audio-routing =
182 "Headphone Jack", "RHPOUT",
183 "Headphone Jack", "LHPOUT",
184 "LLINEIN", "Line In Jack",
185 "RLINEIN", "Line In Jack";
186
187 atmel,ssc-controller = <&ssc0>;
188 atmel,audio-codec = <&wm8731>;
189 };
Jean-Christophe PLAGNIOL-VILLARDec6754a2012-07-05 16:56:09 +0800190};