| Joseph Lo | a1425d4 | 2013-10-08 12:50:06 +0800 | [diff] [blame] | 1 | /dts-v1/; |
| 2 | |
| 3 | #include "tegra124.dtsi" |
| 4 | |
| 5 | / { |
| 6 | model = "NVIDIA Tegra124 Venice2"; |
| 7 | compatible = "nvidia,venice2", "nvidia,tegra124"; |
| 8 | |
| 9 | memory { |
| 10 | reg = <0x80000000 0x80000000>; |
| 11 | }; |
| 12 | |
| 13 | serial@70006000 { |
| 14 | status = "okay"; |
| 15 | }; |
| 16 | |
| Thierry Reding | e013485 | 2013-11-18 17:00:35 +0100 | [diff] [blame^] | 17 | pwm: pwm@7000a000 { |
| 18 | status = "okay"; |
| 19 | }; |
| 20 | |
| Stephen Warren | 9d5b250 | 2013-12-03 16:44:35 -0700 | [diff] [blame] | 21 | i2c@7000c000 { |
| 22 | status = "okay"; |
| 23 | clock-frequency = <100000>; |
| Stephen Warren | b0e1cae | 2013-12-03 17:26:12 -0700 | [diff] [blame] | 24 | |
| 25 | acodec: audio-codec@10 { |
| 26 | compatible = "maxim,max98090"; |
| 27 | reg = <0x10>; |
| 28 | interrupt-parent = <&gpio>; |
| 29 | interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>; |
| 30 | }; |
| Stephen Warren | 9d5b250 | 2013-12-03 16:44:35 -0700 | [diff] [blame] | 31 | }; |
| 32 | |
| 33 | i2c@7000c400 { |
| 34 | status = "okay"; |
| 35 | clock-frequency = <100000>; |
| 36 | }; |
| 37 | |
| 38 | i2c@7000c500 { |
| 39 | status = "okay"; |
| 40 | clock-frequency = <100000>; |
| 41 | }; |
| 42 | |
| 43 | i2c@7000c700 { |
| 44 | status = "okay"; |
| 45 | clock-frequency = <100000>; |
| 46 | }; |
| 47 | |
| 48 | i2c@7000d000 { |
| 49 | status = "okay"; |
| 50 | clock-frequency = <100000>; |
| 51 | }; |
| 52 | |
| Joseph Lo | a1425d4 | 2013-10-08 12:50:06 +0800 | [diff] [blame] | 53 | pmc@7000e400 { |
| 54 | nvidia,invert-interrupt; |
| Joseph Lo | 6ec1d12 | 2013-10-11 17:58:39 +0800 | [diff] [blame] | 55 | nvidia,suspend-mode = <1>; |
| 56 | nvidia,cpu-pwr-good-time = <500>; |
| 57 | nvidia,cpu-pwr-off-time = <300>; |
| 58 | nvidia,core-pwr-good-time = <641 3845>; |
| 59 | nvidia,core-pwr-off-time = <61036>; |
| 60 | nvidia,core-power-req-active-high; |
| 61 | nvidia,sys-clock-req-active-high; |
| Joseph Lo | a1425d4 | 2013-10-08 12:50:06 +0800 | [diff] [blame] | 62 | }; |
| Joseph Lo | 3b86baf | 2013-10-08 15:47:40 +0800 | [diff] [blame] | 63 | |
| Stephen Warren | 784c744 | 2013-10-31 17:23:05 -0600 | [diff] [blame] | 64 | sdhci@700b0400 { |
| 65 | cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>; |
| 66 | power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>; |
| 67 | status = "okay"; |
| 68 | bus-width = <4>; |
| 69 | }; |
| 70 | |
| 71 | sdhci@700b0600 { |
| 72 | status = "okay"; |
| 73 | bus-width = <8>; |
| 74 | }; |
| 75 | |
| Stephen Warren | b0e1cae | 2013-12-03 17:26:12 -0700 | [diff] [blame] | 76 | ahub@70300000 { |
| 77 | i2s@70301100 { |
| 78 | status = "okay"; |
| 79 | }; |
| 80 | }; |
| 81 | |
| Joseph Lo | 3b86baf | 2013-10-08 15:47:40 +0800 | [diff] [blame] | 82 | clocks { |
| 83 | compatible = "simple-bus"; |
| 84 | #address-cells = <1>; |
| 85 | #size-cells = <0>; |
| 86 | |
| 87 | clk32k_in: clock@0 { |
| 88 | compatible = "fixed-clock"; |
| 89 | reg=<0>; |
| 90 | #clock-cells = <0>; |
| 91 | clock-frequency = <32768>; |
| 92 | }; |
| 93 | }; |
| Stephen Warren | b0e1cae | 2013-12-03 17:26:12 -0700 | [diff] [blame] | 94 | |
| 95 | sound { |
| 96 | compatible = "nvidia,tegra-audio-max98090-venice2", |
| 97 | "nvidia,tegra-audio-max98090"; |
| 98 | nvidia,model = "NVIDIA Tegra Venice2"; |
| 99 | |
| 100 | nvidia,audio-routing = |
| 101 | "Headphones", "HPR", |
| 102 | "Headphones", "HPL", |
| 103 | "Speakers", "SPKR", |
| 104 | "Speakers", "SPKL", |
| 105 | "Mic Jack", "MICBIAS", |
| 106 | "IN34", "Mic Jack"; |
| 107 | |
| 108 | nvidia,i2s-controller = <&tegra_i2s1>; |
| 109 | nvidia,audio-codec = <&acodec>; |
| 110 | |
| 111 | clocks = <&tegra_car TEGRA124_CLK_PLL_A>, |
| 112 | <&tegra_car TEGRA124_CLK_PLL_A_OUT0>, |
| 113 | <&tegra_car TEGRA124_CLK_EXTERN1>; |
| 114 | clock-names = "pll_a", "pll_a_out0", "mclk"; |
| 115 | }; |
| Joseph Lo | a1425d4 | 2013-10-08 12:50:06 +0800 | [diff] [blame] | 116 | }; |