blob: a7655f6caf7dbd641dfea7c3e60581e01df594cb [file] [log] [blame]
Glauber Costac048fdf2008-03-03 14:12:54 -03001#include <linux/init.h>
2
3#include <linux/mm.h>
Glauber Costac048fdf2008-03-03 14:12:54 -03004#include <linux/spinlock.h>
5#include <linux/smp.h>
Glauber Costac048fdf2008-03-03 14:12:54 -03006#include <linux/interrupt.h>
Paul Gortmaker4b599fe2016-07-13 20:18:55 -04007#include <linux/export.h>
Shaohua Li93296722010-10-20 11:07:03 +08008#include <linux/cpu.h>
Glauber Costac048fdf2008-03-03 14:12:54 -03009
Glauber Costac048fdf2008-03-03 14:12:54 -030010#include <asm/tlbflush.h>
Glauber Costac048fdf2008-03-03 14:12:54 -030011#include <asm/mmu_context.h>
Jan Beulich350f8f52009-11-13 11:54:40 +000012#include <asm/cache.h>
Tejun Heo6dd01be2009-01-21 17:26:06 +090013#include <asm/apic.h>
Tejun Heobdbcdd42009-01-21 17:26:06 +090014#include <asm/uv/uv.h>
Alex Shi3df32122012-06-28 09:02:20 +080015#include <linux/debugfs.h>
Glauber Costa5af55732008-03-25 13:28:56 -030016
Glauber Costac048fdf2008-03-03 14:12:54 -030017/*
18 * Smarter SMP flushing macros.
19 * c/o Linus Torvalds.
20 *
21 * These mean you can really definitely utterly forget about
22 * writing to user space from interrupts. (Its not allowed anyway).
23 *
24 * Optimizations Manfred Spraul <manfred@colorfullife.com>
25 *
26 * More scalable flush, from Andi Kleen
27 *
Alex Shi52aec332012-06-28 09:02:23 +080028 * Implement flush IPI by CALL_FUNCTION_VECTOR, Alex Shi
Glauber Costac048fdf2008-03-03 14:12:54 -030029 */
30
Andy Lutomirskie1074882016-04-26 09:39:07 -070031#ifdef CONFIG_SMP
32
Alex Shi52aec332012-06-28 09:02:23 +080033struct flush_tlb_info {
34 struct mm_struct *flush_mm;
35 unsigned long flush_start;
36 unsigned long flush_end;
37};
Shaohua Li93296722010-10-20 11:07:03 +080038
Glauber Costac048fdf2008-03-03 14:12:54 -030039/*
40 * We cannot call mmdrop() because we are in interrupt context,
41 * instead update mm->cpu_vm_mask.
42 */
43void leave_mm(int cpu)
44{
Linus Torvalds02171b42012-05-23 11:06:59 -070045 struct mm_struct *active_mm = this_cpu_read(cpu_tlbstate.active_mm);
Alex Shic6ae41e2012-05-11 15:35:27 +080046 if (this_cpu_read(cpu_tlbstate.state) == TLBSTATE_OK)
Glauber Costac048fdf2008-03-03 14:12:54 -030047 BUG();
Suresh Siddhaa6fca402012-03-22 17:01:25 -070048 if (cpumask_test_cpu(cpu, mm_cpumask(active_mm))) {
49 cpumask_clear_cpu(cpu, mm_cpumask(active_mm));
50 load_cr3(swapper_pg_dir);
Dave Hansen7c7f1542014-08-07 10:58:41 -070051 /*
52 * This gets called in the idle path where RCU
53 * functions differently. Tracing normally
54 * uses RCU, so we have to call the tracepoint
55 * specially here.
56 */
57 trace_tlb_flush_rcuidle(TLB_FLUSH_ON_TASK_SWITCH, TLB_FLUSH_ALL);
Suresh Siddhaa6fca402012-03-22 17:01:25 -070058 }
Glauber Costac048fdf2008-03-03 14:12:54 -030059}
60EXPORT_SYMBOL_GPL(leave_mm);
61
Andy Lutomirski69c03192016-04-26 09:39:08 -070062#endif /* CONFIG_SMP */
63
64void switch_mm(struct mm_struct *prev, struct mm_struct *next,
65 struct task_struct *tsk)
66{
Andy Lutomirski078194f2016-04-26 09:39:09 -070067 unsigned long flags;
68
69 local_irq_save(flags);
70 switch_mm_irqs_off(prev, next, tsk);
71 local_irq_restore(flags);
72}
73
74void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
75 struct task_struct *tsk)
76{
Andy Lutomirski69c03192016-04-26 09:39:08 -070077 unsigned cpu = smp_processor_id();
78
79 if (likely(prev != next)) {
Andy Lutomirskie37e43a2016-08-11 02:35:23 -070080 if (IS_ENABLED(CONFIG_VMAP_STACK)) {
81 /*
82 * If our current stack is in vmalloc space and isn't
83 * mapped in the new pgd, we'll double-fault. Forcibly
84 * map it.
85 */
86 unsigned int stack_pgd_index = pgd_index(current_stack_pointer());
87
88 pgd_t *pgd = next->pgd + stack_pgd_index;
89
90 if (unlikely(pgd_none(*pgd)))
91 set_pgd(pgd, init_mm.pgd[stack_pgd_index]);
92 }
93
Andy Lutomirski69c03192016-04-26 09:39:08 -070094#ifdef CONFIG_SMP
95 this_cpu_write(cpu_tlbstate.state, TLBSTATE_OK);
96 this_cpu_write(cpu_tlbstate.active_mm, next);
97#endif
Andy Lutomirskie37e43a2016-08-11 02:35:23 -070098
Andy Lutomirski69c03192016-04-26 09:39:08 -070099 cpumask_set_cpu(cpu, mm_cpumask(next));
100
101 /*
102 * Re-load page tables.
103 *
104 * This logic has an ordering constraint:
105 *
106 * CPU 0: Write to a PTE for 'next'
107 * CPU 0: load bit 1 in mm_cpumask. if nonzero, send IPI.
108 * CPU 1: set bit 1 in next's mm_cpumask
109 * CPU 1: load from the PTE that CPU 0 writes (implicit)
110 *
111 * We need to prevent an outcome in which CPU 1 observes
112 * the new PTE value and CPU 0 observes bit 1 clear in
113 * mm_cpumask. (If that occurs, then the IPI will never
114 * be sent, and CPU 0's TLB will contain a stale entry.)
115 *
116 * The bad outcome can occur if either CPU's load is
117 * reordered before that CPU's store, so both CPUs must
118 * execute full barriers to prevent this from happening.
119 *
120 * Thus, switch_mm needs a full barrier between the
121 * store to mm_cpumask and any operation that could load
122 * from next->pgd. TLB fills are special and can happen
123 * due to instruction fetches or for no reason at all,
124 * and neither LOCK nor MFENCE orders them.
125 * Fortunately, load_cr3() is serializing and gives the
126 * ordering guarantee we need.
127 *
128 */
129 load_cr3(next->pgd);
130
131 trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH, TLB_FLUSH_ALL);
132
133 /* Stop flush ipis for the previous mm */
134 cpumask_clear_cpu(cpu, mm_cpumask(prev));
135
136 /* Load per-mm CR4 state */
137 load_mm_cr4(next);
138
139#ifdef CONFIG_MODIFY_LDT_SYSCALL
140 /*
141 * Load the LDT, if the LDT is different.
142 *
143 * It's possible that prev->context.ldt doesn't match
144 * the LDT register. This can happen if leave_mm(prev)
145 * was called and then modify_ldt changed
146 * prev->context.ldt but suppressed an IPI to this CPU.
147 * In this case, prev->context.ldt != NULL, because we
148 * never set context.ldt to NULL while the mm still
149 * exists. That means that next->context.ldt !=
150 * prev->context.ldt, because mms never share an LDT.
151 */
152 if (unlikely(prev->context.ldt != next->context.ldt))
153 load_mm_ldt(next);
154#endif
155 }
156#ifdef CONFIG_SMP
157 else {
158 this_cpu_write(cpu_tlbstate.state, TLBSTATE_OK);
159 BUG_ON(this_cpu_read(cpu_tlbstate.active_mm) != next);
160
161 if (!cpumask_test_cpu(cpu, mm_cpumask(next))) {
162 /*
163 * On established mms, the mm_cpumask is only changed
164 * from irq context, from ptep_clear_flush() while in
165 * lazy tlb mode, and here. Irqs are blocked during
166 * schedule, protecting us from simultaneous changes.
167 */
168 cpumask_set_cpu(cpu, mm_cpumask(next));
169
170 /*
171 * We were in lazy tlb mode and leave_mm disabled
172 * tlb flush IPI delivery. We must reload CR3
173 * to make sure to use no freed page tables.
174 *
175 * As above, load_cr3() is serializing and orders TLB
176 * fills with respect to the mm_cpumask write.
177 */
178 load_cr3(next->pgd);
179 trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH, TLB_FLUSH_ALL);
180 load_mm_cr4(next);
181 load_mm_ldt(next);
182 }
183 }
184#endif
185}
186
187#ifdef CONFIG_SMP
188
Glauber Costac048fdf2008-03-03 14:12:54 -0300189/*
Glauber Costac048fdf2008-03-03 14:12:54 -0300190 * The flush IPI assumes that a thread switch happens in this order:
191 * [cpu0: the cpu that switches]
192 * 1) switch_mm() either 1a) or 1b)
193 * 1a) thread switch to a different mm
Alex Shi52aec332012-06-28 09:02:23 +0800194 * 1a1) set cpu_tlbstate to TLBSTATE_OK
195 * Now the tlb flush NMI handler flush_tlb_func won't call leave_mm
196 * if cpu0 was in lazy tlb mode.
197 * 1a2) update cpu active_mm
Glauber Costac048fdf2008-03-03 14:12:54 -0300198 * Now cpu0 accepts tlb flushes for the new mm.
Alex Shi52aec332012-06-28 09:02:23 +0800199 * 1a3) cpu_set(cpu, new_mm->cpu_vm_mask);
Glauber Costac048fdf2008-03-03 14:12:54 -0300200 * Now the other cpus will send tlb flush ipis.
201 * 1a4) change cr3.
Alex Shi52aec332012-06-28 09:02:23 +0800202 * 1a5) cpu_clear(cpu, old_mm->cpu_vm_mask);
203 * Stop ipi delivery for the old mm. This is not synchronized with
204 * the other cpus, but flush_tlb_func ignore flush ipis for the wrong
205 * mm, and in the worst case we perform a superfluous tlb flush.
Glauber Costac048fdf2008-03-03 14:12:54 -0300206 * 1b) thread switch without mm change
Alex Shi52aec332012-06-28 09:02:23 +0800207 * cpu active_mm is correct, cpu0 already handles flush ipis.
208 * 1b1) set cpu_tlbstate to TLBSTATE_OK
Glauber Costac048fdf2008-03-03 14:12:54 -0300209 * 1b2) test_and_set the cpu bit in cpu_vm_mask.
210 * Atomically set the bit [other cpus will start sending flush ipis],
211 * and test the bit.
212 * 1b3) if the bit was 0: leave_mm was called, flush the tlb.
213 * 2) switch %%esp, ie current
214 *
215 * The interrupt must handle 2 special cases:
216 * - cr3 is changed before %%esp, ie. it cannot use current->{active_,}mm.
217 * - the cpu performs speculative tlb reads, i.e. even if the cpu only
218 * runs in kernel space, the cpu could load tlb entries for user space
219 * pages.
220 *
Alex Shi52aec332012-06-28 09:02:23 +0800221 * The good news is that cpu_tlbstate is local to each cpu, no
Glauber Costac048fdf2008-03-03 14:12:54 -0300222 * write/read ordering problems.
223 */
224
225/*
Alex Shi52aec332012-06-28 09:02:23 +0800226 * TLB flush funcation:
Glauber Costac048fdf2008-03-03 14:12:54 -0300227 * 1) Flush the tlb entries if the cpu uses the mm that's being flushed.
228 * 2) Leave the mm if we are in the lazy tlb mode.
Glauber Costac048fdf2008-03-03 14:12:54 -0300229 */
Alex Shi52aec332012-06-28 09:02:23 +0800230static void flush_tlb_func(void *info)
Glauber Costac048fdf2008-03-03 14:12:54 -0300231{
Alex Shi52aec332012-06-28 09:02:23 +0800232 struct flush_tlb_info *f = info;
Glauber Costac048fdf2008-03-03 14:12:54 -0300233
Tomoki Sekiyamafd0f5862012-09-26 11:11:28 +0900234 inc_irq_stat(irq_tlb_count);
235
Nadav Amit858eaaa72016-04-01 14:31:26 -0700236 if (f->flush_mm && f->flush_mm != this_cpu_read(cpu_tlbstate.active_mm))
Alex Shi52aec332012-06-28 09:02:23 +0800237 return;
Glauber Costac048fdf2008-03-03 14:12:54 -0300238
Mel Gormanec659932014-01-21 14:33:16 -0800239 count_vm_tlb_event(NR_TLB_REMOTE_FLUSH_RECEIVED);
Alex Shi52aec332012-06-28 09:02:23 +0800240 if (this_cpu_read(cpu_tlbstate.state) == TLBSTATE_OK) {
Dave Hansend17d8f92014-07-31 08:40:59 -0700241 if (f->flush_end == TLB_FLUSH_ALL) {
Alex Shi52aec332012-06-28 09:02:23 +0800242 local_flush_tlb();
Dave Hansend17d8f92014-07-31 08:40:59 -0700243 trace_tlb_flush(TLB_REMOTE_SHOOTDOWN, TLB_FLUSH_ALL);
244 } else {
Alex Shi52aec332012-06-28 09:02:23 +0800245 unsigned long addr;
Dave Hansend17d8f92014-07-31 08:40:59 -0700246 unsigned long nr_pages =
Dave Hansenbbc03772015-07-20 16:01:53 -0700247 (f->flush_end - f->flush_start) / PAGE_SIZE;
Alex Shi52aec332012-06-28 09:02:23 +0800248 addr = f->flush_start;
249 while (addr < f->flush_end) {
250 __flush_tlb_single(addr);
251 addr += PAGE_SIZE;
Alex Shie7b52ff2012-06-28 09:02:17 +0800252 }
Dave Hansend17d8f92014-07-31 08:40:59 -0700253 trace_tlb_flush(TLB_REMOTE_SHOOTDOWN, nr_pages);
Alex Shi52aec332012-06-28 09:02:23 +0800254 }
255 } else
256 leave_mm(smp_processor_id());
Glauber Costac048fdf2008-03-03 14:12:54 -0300257
Glauber Costac048fdf2008-03-03 14:12:54 -0300258}
259
Rusty Russell4595f962009-01-10 21:58:09 -0800260void native_flush_tlb_others(const struct cpumask *cpumask,
Alex Shie7b52ff2012-06-28 09:02:17 +0800261 struct mm_struct *mm, unsigned long start,
262 unsigned long end)
Rusty Russell4595f962009-01-10 21:58:09 -0800263{
Alex Shi52aec332012-06-28 09:02:23 +0800264 struct flush_tlb_info info;
Nadav Amit18c98242016-04-01 14:31:23 -0700265
266 if (end == 0)
267 end = start + PAGE_SIZE;
Alex Shi52aec332012-06-28 09:02:23 +0800268 info.flush_mm = mm;
269 info.flush_start = start;
270 info.flush_end = end;
271
Mel Gormanec659932014-01-21 14:33:16 -0800272 count_vm_tlb_event(NR_TLB_REMOTE_FLUSH);
Nadav Amit18c98242016-04-01 14:31:23 -0700273 if (end == TLB_FLUSH_ALL)
274 trace_tlb_flush(TLB_REMOTE_SEND_IPI, TLB_FLUSH_ALL);
275 else
276 trace_tlb_flush(TLB_REMOTE_SEND_IPI,
277 (end - start) >> PAGE_SHIFT);
278
Rusty Russell4595f962009-01-10 21:58:09 -0800279 if (is_uv_system()) {
Tejun Heobdbcdd42009-01-21 17:26:06 +0900280 unsigned int cpu;
Rusty Russell4595f962009-01-10 21:58:09 -0800281
Xiao Guangrong25542c62011-03-15 09:57:37 +0800282 cpu = smp_processor_id();
Alex Shie7b52ff2012-06-28 09:02:17 +0800283 cpumask = uv_flush_tlb_others(cpumask, mm, start, end, cpu);
Tejun Heobdbcdd42009-01-21 17:26:06 +0900284 if (cpumask)
Alex Shi52aec332012-06-28 09:02:23 +0800285 smp_call_function_many(cpumask, flush_tlb_func,
286 &info, 1);
Mike Travis0e219902009-01-10 21:58:10 -0800287 return;
Rusty Russell4595f962009-01-10 21:58:09 -0800288 }
Alex Shi52aec332012-06-28 09:02:23 +0800289 smp_call_function_many(cpumask, flush_tlb_func, &info, 1);
Rusty Russell4595f962009-01-10 21:58:09 -0800290}
291
Glauber Costac048fdf2008-03-03 14:12:54 -0300292void flush_tlb_current_task(void)
293{
294 struct mm_struct *mm = current->mm;
Glauber Costac048fdf2008-03-03 14:12:54 -0300295
296 preempt_disable();
Glauber Costac048fdf2008-03-03 14:12:54 -0300297
Mel Gormanec659932014-01-21 14:33:16 -0800298 count_vm_tlb_event(NR_TLB_LOCAL_FLUSH_ALL);
Andy Lutomirski71b3c122016-01-06 12:21:01 -0800299
300 /* This is an implicit full barrier that synchronizes with switch_mm. */
Glauber Costac048fdf2008-03-03 14:12:54 -0300301 local_flush_tlb();
Andy Lutomirski71b3c122016-01-06 12:21:01 -0800302
Dave Hansend17d8f92014-07-31 08:40:59 -0700303 trace_tlb_flush(TLB_LOCAL_SHOOTDOWN, TLB_FLUSH_ALL);
Rusty Russell78f1c4d2009-09-24 09:34:51 -0600304 if (cpumask_any_but(mm_cpumask(mm), smp_processor_id()) < nr_cpu_ids)
Alex Shie7b52ff2012-06-28 09:02:17 +0800305 flush_tlb_others(mm_cpumask(mm), mm, 0UL, TLB_FLUSH_ALL);
Glauber Costac048fdf2008-03-03 14:12:54 -0300306 preempt_enable();
307}
308
Dave Hansena5102472014-07-31 08:41:03 -0700309/*
310 * See Documentation/x86/tlb.txt for details. We choose 33
311 * because it is large enough to cover the vast majority (at
312 * least 95%) of allocations, and is small enough that we are
313 * confident it will not cause too much overhead. Each single
314 * flush is about 100 ns, so this caps the maximum overhead at
315 * _about_ 3,000 ns.
316 *
317 * This is in units of pages.
318 */
Jeremiah Mahler86426852014-08-09 00:38:33 -0700319static unsigned long tlb_single_page_flush_ceiling __read_mostly = 33;
Dave Hansene9f4e0a2014-07-31 08:40:55 -0700320
Alex Shi611ae8e2012-06-28 09:02:22 +0800321void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start,
322 unsigned long end, unsigned long vmflag)
323{
324 unsigned long addr;
Dave Hansen9dfa6de2014-07-31 08:40:56 -0700325 /* do a global flush by default */
326 unsigned long base_pages_to_flush = TLB_FLUSH_ALL;
Alex Shi611ae8e2012-06-28 09:02:22 +0800327
328 preempt_disable();
Andy Lutomirski71b3c122016-01-06 12:21:01 -0800329 if (current->active_mm != mm) {
330 /* Synchronize with switch_mm. */
331 smp_mb();
332
Dave Hansen4995ab92014-07-31 08:40:54 -0700333 goto out;
Andy Lutomirski71b3c122016-01-06 12:21:01 -0800334 }
Alex Shi611ae8e2012-06-28 09:02:22 +0800335
336 if (!current->mm) {
337 leave_mm(smp_processor_id());
Andy Lutomirski71b3c122016-01-06 12:21:01 -0800338
339 /* Synchronize with switch_mm. */
340 smp_mb();
341
Dave Hansen4995ab92014-07-31 08:40:54 -0700342 goto out;
Alex Shi611ae8e2012-06-28 09:02:22 +0800343 }
344
Dave Hansen9dfa6de2014-07-31 08:40:56 -0700345 if ((end != TLB_FLUSH_ALL) && !(vmflag & VM_HUGETLB))
346 base_pages_to_flush = (end - start) >> PAGE_SHIFT;
Alex Shi611ae8e2012-06-28 09:02:22 +0800347
Andy Lutomirski71b3c122016-01-06 12:21:01 -0800348 /*
349 * Both branches below are implicit full barriers (MOV to CR or
350 * INVLPG) that synchronize with switch_mm.
351 */
Dave Hansen9dfa6de2014-07-31 08:40:56 -0700352 if (base_pages_to_flush > tlb_single_page_flush_ceiling) {
353 base_pages_to_flush = TLB_FLUSH_ALL;
Mel Gormanec659932014-01-21 14:33:16 -0800354 count_vm_tlb_event(NR_TLB_LOCAL_FLUSH_ALL);
Alex Shi611ae8e2012-06-28 09:02:22 +0800355 local_flush_tlb();
Dave Hansen9824cf92013-09-11 14:20:23 -0700356 } else {
Alex Shi611ae8e2012-06-28 09:02:22 +0800357 /* flush range by one by one 'invlpg' */
Dave Hansen9824cf92013-09-11 14:20:23 -0700358 for (addr = start; addr < end; addr += PAGE_SIZE) {
Mel Gormanec659932014-01-21 14:33:16 -0800359 count_vm_tlb_event(NR_TLB_LOCAL_FLUSH_ONE);
Alex Shi611ae8e2012-06-28 09:02:22 +0800360 __flush_tlb_single(addr);
Dave Hansen9824cf92013-09-11 14:20:23 -0700361 }
Alex Shie7b52ff2012-06-28 09:02:17 +0800362 }
Dave Hansend17d8f92014-07-31 08:40:59 -0700363 trace_tlb_flush(TLB_LOCAL_MM_SHOOTDOWN, base_pages_to_flush);
Dave Hansen4995ab92014-07-31 08:40:54 -0700364out:
Dave Hansen9dfa6de2014-07-31 08:40:56 -0700365 if (base_pages_to_flush == TLB_FLUSH_ALL) {
Dave Hansen4995ab92014-07-31 08:40:54 -0700366 start = 0UL;
367 end = TLB_FLUSH_ALL;
368 }
Alex Shie7b52ff2012-06-28 09:02:17 +0800369 if (cpumask_any_but(mm_cpumask(mm), smp_processor_id()) < nr_cpu_ids)
Dave Hansen4995ab92014-07-31 08:40:54 -0700370 flush_tlb_others(mm_cpumask(mm), mm, start, end);
Alex Shie7b52ff2012-06-28 09:02:17 +0800371 preempt_enable();
372}
373
Alex Shie7b52ff2012-06-28 09:02:17 +0800374void flush_tlb_page(struct vm_area_struct *vma, unsigned long start)
Glauber Costac048fdf2008-03-03 14:12:54 -0300375{
376 struct mm_struct *mm = vma->vm_mm;
Glauber Costac048fdf2008-03-03 14:12:54 -0300377
378 preempt_disable();
Glauber Costac048fdf2008-03-03 14:12:54 -0300379
380 if (current->active_mm == mm) {
Andy Lutomirski71b3c122016-01-06 12:21:01 -0800381 if (current->mm) {
382 /*
383 * Implicit full barrier (INVLPG) that synchronizes
384 * with switch_mm.
385 */
Alex Shie7b52ff2012-06-28 09:02:17 +0800386 __flush_tlb_one(start);
Andy Lutomirski71b3c122016-01-06 12:21:01 -0800387 } else {
Glauber Costac048fdf2008-03-03 14:12:54 -0300388 leave_mm(smp_processor_id());
Andy Lutomirski71b3c122016-01-06 12:21:01 -0800389
390 /* Synchronize with switch_mm. */
391 smp_mb();
392 }
Glauber Costac048fdf2008-03-03 14:12:54 -0300393 }
394
Rusty Russell78f1c4d2009-09-24 09:34:51 -0600395 if (cpumask_any_but(mm_cpumask(mm), smp_processor_id()) < nr_cpu_ids)
Alex Shie7b52ff2012-06-28 09:02:17 +0800396 flush_tlb_others(mm_cpumask(mm), mm, start, 0UL);
Glauber Costac048fdf2008-03-03 14:12:54 -0300397
398 preempt_enable();
399}
400
401static void do_flush_tlb_all(void *info)
402{
Mel Gormanec659932014-01-21 14:33:16 -0800403 count_vm_tlb_event(NR_TLB_REMOTE_FLUSH_RECEIVED);
Glauber Costac048fdf2008-03-03 14:12:54 -0300404 __flush_tlb_all();
Alex Shic6ae41e2012-05-11 15:35:27 +0800405 if (this_cpu_read(cpu_tlbstate.state) == TLBSTATE_LAZY)
Borislav Petkov3f8afb72010-07-21 14:47:05 +0200406 leave_mm(smp_processor_id());
Glauber Costac048fdf2008-03-03 14:12:54 -0300407}
408
409void flush_tlb_all(void)
410{
Mel Gormanec659932014-01-21 14:33:16 -0800411 count_vm_tlb_event(NR_TLB_REMOTE_FLUSH);
Jens Axboe15c8b6c2008-05-09 09:39:44 +0200412 on_each_cpu(do_flush_tlb_all, NULL, 1);
Glauber Costac048fdf2008-03-03 14:12:54 -0300413}
Alex Shi3df32122012-06-28 09:02:20 +0800414
Alex Shieffee4b2012-06-28 09:02:24 +0800415static void do_kernel_range_flush(void *info)
416{
417 struct flush_tlb_info *f = info;
418 unsigned long addr;
419
420 /* flush range by one by one 'invlpg' */
Dave Hansen6df46862013-09-11 14:20:24 -0700421 for (addr = f->flush_start; addr < f->flush_end; addr += PAGE_SIZE)
Alex Shieffee4b2012-06-28 09:02:24 +0800422 __flush_tlb_single(addr);
423}
424
425void flush_tlb_kernel_range(unsigned long start, unsigned long end)
426{
Alex Shieffee4b2012-06-28 09:02:24 +0800427
428 /* Balance as user space task's flush, a bit conservative */
Dave Hansene9f4e0a2014-07-31 08:40:55 -0700429 if (end == TLB_FLUSH_ALL ||
430 (end - start) > tlb_single_page_flush_ceiling * PAGE_SIZE) {
Alex Shieffee4b2012-06-28 09:02:24 +0800431 on_each_cpu(do_flush_tlb_all, NULL, 1);
Dave Hansene9f4e0a2014-07-31 08:40:55 -0700432 } else {
433 struct flush_tlb_info info;
Alex Shieffee4b2012-06-28 09:02:24 +0800434 info.flush_start = start;
435 info.flush_end = end;
436 on_each_cpu(do_kernel_range_flush, &info, 1);
437 }
438}
Dave Hansen2d040a12014-07-31 08:41:01 -0700439
440static ssize_t tlbflush_read_file(struct file *file, char __user *user_buf,
441 size_t count, loff_t *ppos)
442{
443 char buf[32];
444 unsigned int len;
445
446 len = sprintf(buf, "%ld\n", tlb_single_page_flush_ceiling);
447 return simple_read_from_buffer(user_buf, count, ppos, buf, len);
448}
449
450static ssize_t tlbflush_write_file(struct file *file,
451 const char __user *user_buf, size_t count, loff_t *ppos)
452{
453 char buf[32];
454 ssize_t len;
455 int ceiling;
456
457 len = min(count, sizeof(buf) - 1);
458 if (copy_from_user(buf, user_buf, len))
459 return -EFAULT;
460
461 buf[len] = '\0';
462 if (kstrtoint(buf, 0, &ceiling))
463 return -EINVAL;
464
465 if (ceiling < 0)
466 return -EINVAL;
467
468 tlb_single_page_flush_ceiling = ceiling;
469 return count;
470}
471
472static const struct file_operations fops_tlbflush = {
473 .read = tlbflush_read_file,
474 .write = tlbflush_write_file,
475 .llseek = default_llseek,
476};
477
478static int __init create_tlb_single_page_flush_ceiling(void)
479{
480 debugfs_create_file("tlb_single_page_flush_ceiling", S_IRUSR | S_IWUSR,
481 arch_debugfs_dir, NULL, &fops_tlbflush);
482 return 0;
483}
484late_initcall(create_tlb_single_page_flush_ceiling);
Andy Lutomirskie1074882016-04-26 09:39:07 -0700485
486#endif /* CONFIG_SMP */