display driver porting
Root cause:
How to fix:
Feature:
Issue:
Depends-On:
Change-Id: Idd7fdf53a98f1917649f48da10de99f3d09145a7
RiskArea:
diff --git a/arch/arm64/boot/dts/qcom/dsi-hx83112b-djn-1080p-cmd.dtsi b/arch/arm64/boot/dts/qcom/dsi-hx83112b-djn-1080p-cmd.dtsi
new file mode 100644
index 0000000..222d47f
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/dsi-hx83112b-djn-1080p-cmd.dtsi
@@ -0,0 +1,164 @@
+/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&mdss_mdp {
+ dsi_djn_hx83112b_1080p_cmd: qcom,mdss_dsi_djn_hx83112b_1080p_cmd {
+ qcom,mdss-dsi-panel-name =
+ "djn hx83112b 1080p cmd mode dsi panel";
+ //[Arima][8901][JialongJhan] enable LCM Command mode 20190403 Start
+ qcom,mdss-dsi-panel-type = "dsi_cmd_mode";
+ //[Arima][8901][JialongJhan] enable LCM Command mode 20190403 End
+ qcom,mdss-dsi-panel-framerate = <60>;
+ qcom,mdss-dsi-virtual-channel-id = <0>;
+ qcom,mdss-dsi-stream = <0>;
+ qcom,mdss-dsi-panel-width = <1080>;
+ qcom,mdss-dsi-panel-height = <2160>;
+ qcom,mdss-dsi-h-front-porch = <40>;
+ qcom,mdss-dsi-h-back-porch = <12>;
+ qcom,mdss-dsi-h-pulse-width = <4>;
+ qcom,mdss-dsi-h-sync-skew = <0>;
+ qcom,mdss-dsi-v-back-porch = <2>;
+ qcom,mdss-dsi-v-front-porch = <32>;
+ qcom,mdss-dsi-v-pulse-width = <2>;
+ qcom,mdss-dsi-h-left-border = <0>;
+ qcom,mdss-dsi-h-right-border = <0>;
+ qcom,mdss-dsi-v-top-border = <0>;
+ qcom,mdss-dsi-v-bottom-border = <0>;
+ qcom,mdss-dsi-bpp = <24>;
+ qcom,mdss-dsi-underflow-color = <0xff>;
+ qcom,mdss-dsi-border-color = <0>;
+ //[Arima][8901][JialongJhan] enable LCM Command mode 20190403 Start
+ qcom,mdss-dsi-te-pin-select = <1>;
+ qcom,mdss-dsi-te-dcs-command = <1>;
+ qcom,mdss-dsi-te-check-enable;
+ qcom,mdss-dsi-te-using-te-pin;
+ //[Arima][8901][JialongJhan] enable LCM Command mode 20190403 End
+ //Qcom
+ qcom,mdss-tear-check-sync-init-val = <2160>;
+ qcom,mdss-tear-check-sync-threshold-start = <4>;
+ qcom,mdss-tear-check-sync-threshold-continue = <4>;
+ qcom,mdss-tear-check-start-pos = <2160>;
+ //Qcom
+ qcom,mdss-dsi-h-sync-pulse = <0>;
+ qcom,mdss-dsi-traffic-mode = "burst_mode";
+ qcom,mdss-dsi-bllp-eof-power-mode;
+ qcom,mdss-dsi-bllp-power-mode;
+ qcom,mdss-dsi-lane-0-state;
+ qcom,mdss-dsi-lane-1-state;
+ qcom,mdss-dsi-lane-2-state;
+ qcom,mdss-dsi-lane-3-state;
+ //qcom,mdss-dsi-hfp-power-mode;
+ //qcom,mdss-dsi-hbp-power-mode;
+ qcom,mdss-dsi-hsa-power-mode;
+ qcom,mdss-pan-physical-width-dimension=<65>;
+ qcom,mdss-pan-physical-height-dimension=<128>;
+ qcom,mdss-dsi-panel-timings = [e6 38 26 00 68 6e 2a
+ 3c 44 03 04 00];
+ qcom,mdss-dsi-t-clk-post = <0x0d>;
+ qcom,mdss-dsi-t-clk-pre = <0x2f>;
+ qcom,mdss-dsi-bl-min-level = <1>;
+ qcom,mdss-dsi-bl-max-level = <4095>;
+ qcom,mdss-dsi-dma-trigger = "trigger_sw";
+ qcom,mdss-dsi-mdp-trigger = "none";
+ //[Arima][8901][Jialong]LCM initial code from IC firmware Start
+ qcom,mdss-dsi-on-command = [39 01 00 00 00 00 04 B9 83 11 2B
+ 39 01 00 00 00 00 02 BD 01
+ 39 01 00 00 00 00 03 C2 08 70
+ 39 01 00 00 00 00 02 BD 03
+ 39 01 00 00 00 00 05 B2 04 38 08 70
+ 39 01 00 00 00 00 02 BD 00
+ 39 01 00 00 00 00 0B B1 F8 27 27 00 00 0B 0E 0B 0E 33
+ 39 01 00 00 00 00 03 D2 2D 2D
+ 39 01 00 00 00 00 0C B2 80 02 18 80 70 00 08 1C 08 11 05
+ 39 01 00 00 00 00 02 E9 D1
+ 39 01 00 00 00 00 03 B2 00 08
+ 39 01 00 00 00 00 02 E9 00
+ 39 01 00 00 00 00 02 BD 02
+ 39 01 00 00 00 00 03 B2 B5 0A
+ 39 01 00 00 00 00 02 BD 00
+ 39 01 00 00 00 00 09 DD 00 00 08 1C 08 34 34 88
+ 39 01 00 00 00 00 19 B4 65 6B 00 00 D0 D4 36 CF 06 CE 00 CE 00 00 00 07 00 2A 07 01 07 00 00 2A
+ 39 01 00 00 00 00 02 BD 03
+ 39 01 00 00 00 00 02 E9 C3
+ 39 01 00 00 00 00 04 B4 01 67 2A
+ 39 01 00 00 00 00 02 E9 00
+ 39 01 00 00 00 00 02 BD 00
+ 39 01 00 00 00 00 02 C1 01
+ 39 01 00 00 00 00 02 BD 01
+ 39 01 00 00 00 00 3A C1 FF FB F9 F6 F4 F1 EF EA E7 E5 E2 DF DD DA D8 D5 D2 CF CC C5 BE B7 B0 A8 A0 98 8E 85 7B 72 69 5E 53 48 3E 35 2B 22 17 0D 09 07 05 01 00 26 F0 86 25 6E B6 DD F3 D8 CC 9B 00
+ 39 01 00 00 00 00 02 BD 02
+ 39 01 00 00 00 00 3A C1 FF FB F9 F6 F4 F1 EF EA E7 E5 E2 DF DD DA D8 D5 D2 CF CC C5 BE B7 B0 A8 A0 98 8E 85 7B 72 69 5E 53 48 3E 35 2B 22 17 0D 09 07 05 01 00 26 F0 86 25 6E B6 DD F3 D8 CC 9B 00
+ 39 01 00 00 00 00 02 BD 03
+ 39 01 00 00 00 00 3A C1 FF FB F9 F6 F4 F1 EF EA E7 E5 E2 DF DD DA D8 D5 D2 CF CC C5 BE B7 B0 A8 A0 98 8E 85 7B 72 69 5E 53 48 3E 35 2B 22 17 0D 09 07 05 01 00 26 F0 86 25 6E B6 DD F3 D8 CC 9B 00
+ 39 01 00 00 00 00 02 BD 00
+ 39 01 00 00 00 00 02 C2 C8
+ 39 01 00 00 00 00 02 CC 08
+ 39 01 00 00 00 00 26 D3 81 00 00 00 00 01 00 04 00 01 13 40 04 09 09 0B 0B 32 10 08 00 08 32 10 08 00 08 32 10 08 00 08 00 00 0A 08 7B
+ 39 01 00 00 00 00 02 E9 C5
+ 39 01 00 00 00 00 02 C6 F7
+ 39 01 00 00 00 00 02 E9 00
+ 39 01 00 00 00 00 02 E9 D4
+ 39 01 00 00 00 00 02 C6 6E
+ 39 01 00 00 00 00 02 E9 00
+ 39 01 00 00 00 00 02 E9 EF
+ 39 01 00 00 00 00 02 D3 0C
+ 39 01 00 00 00 00 02 E9 00
+ 39 01 00 00 00 00 02 BD 01
+ 39 01 00 00 00 00 02 E9 C8
+ 39 01 00 00 00 00 02 D3 A1
+ 39 01 00 00 00 00 02 E9 00
+ 39 01 00 00 00 00 02 BD 00
+ 39 01 00 00 00 00 39 D5 18 18 19 18 18 20 18 18 18 10 10 18 18 00 00 18 18 01 01 18 18 28 28 18 18 18 18 18 2F 2F 30 30 31 31 35 35 36 36 37 37 18 18 18 18 18 18 18 18 FC FC 00 00 FC FC 00 00
+ 39 01 00 00 00 00 31 D6 18 18 19 18 18 20 19 18 18 10 10 18 18 00 00 18 18 01 01 18 18 28 28 18 18 18 18 18 2F 2F 30 30 31 31 35 35 36 36 37 37 18 18 18 18 18 18 18 18
+ 39 01 00 00 00 00 19 D8 AA AA AA AF EA AA AA AA AA AF EA AA AA AA AB AF EF AA AA AA AA AF EA AA
+ 39 01 00 00 00 00 02 BD 01
+ 39 01 00 00 00 00 0D D8 AA AA AB AF EA AA AA AA AE AF EA AA
+ 39 01 00 00 00 00 02 BD 02
+ 39 01 00 00 00 00 0D D8 AA AA AA AF EA AA AA AA AA AF EA AA
+ 39 01 00 00 00 00 02 BD 03
+ 39 01 00 00 00 00 19 D8 BA AA AA AF EA AA AA AA AA AF EA AA BA AA AA AF EA AA AA AA AA AF EA AA
+ 39 01 00 00 00 00 02 BD 00
+ 39 01 00 00 00 00 02 E9 E4
+ 39 01 00 00 00 00 03 E7 17 69
+ 39 01 00 00 00 00 02 E9 00
+ 39 01 00 00 00 00 1A E7 09 09 00 07 E8 00 26 00 07 00 00 E8 32 00 E9 0A 0A 00 00 00 01 01 00 12 04
+ 39 01 00 00 00 00 02 BD 01
+ 39 01 00 00 00 00 0A E7 02 00 01 20 01 18 08 A8 09
+ 39 01 00 00 00 00 02 BD 02
+ 39 01 00 00 00 00 04 E7 20 20 00
+ 39 01 00 00 00 00 02 BD 03
+ 39 01 00 00 00 00 07 E7 00 DC 11 70 00 20
+ 39 01 00 00 00 00 02 E9 C9
+ 39 01 00 00 00 00 07 E7 2A CE 02 70 01 04
+ 39 01 00 00 00 00 02 E9 00
+ 39 01 00 00 00 00 02 BD 00
+ 39 01 00 00 00 00 02 D1 27
+ 05 01 00 00 78 00 02 11 00
+ 05 01 00 00 14 00 02 29 00
+ 39 01 00 00 00 00 03 51 00 00
+ 39 01 00 00 00 00 02 53 24];
+ //[Arima][8901][Jialong]LCM initial code from IC firmware End
+ qcom,mdss-dsi-off-command = [05 01 00 00 14 00 02 28 00
+ 05 01 00 00 78 00 02 10 00];
+ qcom,mdss-dsi-off-dstb-command = [
+ 39 01 00 00 00 00 04 B9 83 11 2A
+ 39 01 00 00 00 00 02 BD 00
+ 39 01 00 00 50 00 02 B1 09];
+ qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
+ qcom,mdss-dsi-off-command-state = "dsi_lp_mode";
+ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
+ qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;
+ qcom,mdss-dsi-tx-eot-append;
+ qcom,mdss-dsi-lp11-init;
+ qcom,mdss-dsi-post-init-delay = <1>;
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/dsi-hx83112b-truly-1080p-video.dtsi b/arch/arm64/boot/dts/qcom/dsi-hx83112b-truly-1080p-video.dtsi
new file mode 100644
index 0000000..10f4b6d
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/dsi-hx83112b-truly-1080p-video.dtsi
@@ -0,0 +1,158 @@
+/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&mdss_mdp {
+ dsi_hx83112b_truly_1080p_video: qcom,mdss_dsi_hx83112b_truly_1080p_video {
+ qcom,mdss-dsi-panel-name =
+ "hx83112b truly 1080p video mode dsi panel";
+ //[Arima][8901][JialongJhan] enable LCM Command mode 20190403 Start
+ qcom,mdss-dsi-panel-type = "dsi_cmd_mode";
+ //[Arima][8901][JialongJhan] enable LCM Command mode 20190403 End
+ qcom,mdss-dsi-panel-framerate = <60>;
+ qcom,mdss-dsi-virtual-channel-id = <0>;
+ qcom,mdss-dsi-stream = <0>;
+ qcom,mdss-dsi-panel-width = <1080>;
+ qcom,mdss-dsi-panel-height = <2160>;
+ qcom,mdss-dsi-h-front-porch = <40>;
+ qcom,mdss-dsi-h-back-porch = <12>;
+ qcom,mdss-dsi-h-pulse-width = <4>;
+ qcom,mdss-dsi-h-sync-skew = <0>;
+ qcom,mdss-dsi-v-back-porch = <2>;
+ qcom,mdss-dsi-v-front-porch = <32>;
+ qcom,mdss-dsi-v-pulse-width = <2>;
+ qcom,mdss-dsi-h-left-border = <0>;
+ qcom,mdss-dsi-h-right-border = <0>;
+ qcom,mdss-dsi-v-top-border = <0>;
+ qcom,mdss-dsi-v-bottom-border = <0>;
+ qcom,mdss-dsi-bpp = <24>;
+ qcom,mdss-dsi-underflow-color = <0xff>;
+ qcom,mdss-dsi-border-color = <0>;
+ //[Arima][8901][JialongJhan] enable LCM Command mode 20190403 Start
+ qcom,mdss-dsi-te-pin-select = <1>;
+ qcom,mdss-dsi-te-dcs-command = <1>;
+ qcom,mdss-dsi-te-check-enable;
+ qcom,mdss-dsi-te-using-te-pin;
+ //[Arima][8901][JialongJhan] enable LCM Command mode 20190403 End
+ qcom,mdss-dsi-h-sync-pulse = <0>;
+ qcom,mdss-dsi-traffic-mode = "burst_mode";
+ qcom,mdss-dsi-bllp-eof-power-mode;
+ qcom,mdss-dsi-bllp-power-mode;
+ qcom,mdss-dsi-lane-0-state;
+ qcom,mdss-dsi-lane-1-state;
+ qcom,mdss-dsi-lane-2-state;
+ qcom,mdss-dsi-lane-3-state;
+ //qcom,mdss-dsi-hfp-power-mode;
+ //qcom,mdss-dsi-hbp-power-mode;
+ qcom,mdss-dsi-hsa-power-mode;
+ qcom,mdss-pan-physical-width-dimension=<65>;
+ qcom,mdss-pan-physical-height-dimension=<128>;
+ qcom,mdss-dsi-panel-timings = [e6 38 26 00 68 6e 2a
+ 3c 44 03 04 00];
+ qcom,mdss-dsi-t-clk-post = <0x0d>;
+ qcom,mdss-dsi-t-clk-pre = <0x2f>;
+ qcom,mdss-dsi-bl-min-level = <1>;
+ qcom,mdss-dsi-bl-max-level = <4095>;
+ qcom,mdss-dsi-dma-trigger = "trigger_sw";
+ qcom,mdss-dsi-mdp-trigger = "none";
+ //[Arima][8901][Jialong]LCM initial code from IC firmware Start
+ qcom,mdss-dsi-on-command = [39 01 00 00 00 00 04 B9 83 11 2B
+ 39 01 00 00 00 00 02 BD 01
+ 39 01 00 00 00 00 03 C2 08 70
+ 39 01 00 00 00 00 02 BD 03
+ 39 01 00 00 00 00 05 B2 04 38 08 70
+ 39 01 00 00 00 00 02 BD 00
+ 39 01 00 00 00 00 0B B1 F8 27 27 00 00 0B 0E 0B 0E 33
+ 39 01 00 00 00 00 03 D2 2D 2D
+ 39 01 00 00 00 00 0C B2 80 02 18 80 70 00 08 1C 08 11 05
+ 39 01 00 00 00 00 02 E9 D1
+ 39 01 00 00 00 00 03 B2 00 08
+ 39 01 00 00 00 00 02 E9 00
+ 39 01 00 00 00 00 02 BD 02
+ 39 01 00 00 00 00 03 B2 B5 0A
+ 39 01 00 00 00 00 02 BD 00
+ 39 01 00 00 00 00 09 DD 00 00 08 1C 08 34 34 88
+ 39 01 00 00 00 00 19 B4 65 6B 00 00 D0 D4 36 CF 06 CE 00 CE 00 00 00 07 00 2A 07 01 07 00 00 2A
+ 39 01 00 00 00 00 02 BD 03
+ 39 01 00 00 00 00 02 E9 C3
+ 39 01 00 00 00 00 04 B4 01 67 2A
+ 39 01 00 00 00 00 02 E9 00
+ 39 01 00 00 00 00 02 BD 00
+ 39 01 00 00 00 00 02 C1 01
+ 39 01 00 00 00 00 02 BD 01
+ 39 01 00 00 00 00 3A C1 FF FB F9 F6 F4 F1 EF EA E7 E5 E2 DF DD DA D8 D5 D2 CF CC C5 BE B7 B0 A8 A0 98 8E 85 7B 72 69 5E 53 48 3E 35 2B 22 17 0D 09 07 05 01 00 26 F0 86 25 6E B6 DD F3 D8 CC 9B 00
+ 39 01 00 00 00 00 02 BD 02
+ 39 01 00 00 00 00 3A C1 FF FB F9 F6 F4 F1 EF EA E7 E5 E2 DF DD DA D8 D5 D2 CF CC C5 BE B7 B0 A8 A0 98 8E 85 7B 72 69 5E 53 48 3E 35 2B 22 17 0D 09 07 05 01 00 26 F0 86 25 6E B6 DD F3 D8 CC 9B 00
+ 39 01 00 00 00 00 02 BD 03
+ 39 01 00 00 00 00 3A C1 FF FB F9 F6 F4 F1 EF EA E7 E5 E2 DF DD DA D8 D5 D2 CF CC C5 BE B7 B0 A8 A0 98 8E 85 7B 72 69 5E 53 48 3E 35 2B 22 17 0D 09 07 05 01 00 26 F0 86 25 6E B6 DD F3 D8 CC 9B 00
+ 39 01 00 00 00 00 02 BD 00
+ 39 01 00 00 00 00 02 C2 C8
+ 39 01 00 00 00 00 02 CC 08
+ 39 01 00 00 00 00 26 D3 81 00 00 00 00 01 00 04 00 01 13 40 04 09 09 0B 0B 32 10 08 00 08 32 10 08 00 08 32 10 08 00 08 00 00 0A 08 7B
+ 39 01 00 00 00 00 02 E9 C5
+ 39 01 00 00 00 00 02 C6 F7
+ 39 01 00 00 00 00 02 E9 00
+ 39 01 00 00 00 00 02 E9 D4
+ 39 01 00 00 00 00 02 C6 6E
+ 39 01 00 00 00 00 02 E9 00
+ 39 01 00 00 00 00 02 E9 EF
+ 39 01 00 00 00 00 02 D3 0C
+ 39 01 00 00 00 00 02 E9 00
+ 39 01 00 00 00 00 02 BD 01
+ 39 01 00 00 00 00 02 E9 C8
+ 39 01 00 00 00 00 02 D3 A1
+ 39 01 00 00 00 00 02 E9 00
+ 39 01 00 00 00 00 02 BD 00
+ 39 01 00 00 00 00 39 D5 18 18 19 18 18 20 18 18 18 10 10 18 18 00 00 18 18 01 01 18 18 28 28 18 18 18 18 18 2F 2F 30 30 31 31 35 35 36 36 37 37 18 18 18 18 18 18 18 18 FC FC 00 00 FC FC 00 00
+ 39 01 00 00 00 00 31 D6 18 18 19 18 18 20 19 18 18 10 10 18 18 00 00 18 18 01 01 18 18 28 28 18 18 18 18 18 2F 2F 30 30 31 31 35 35 36 36 37 37 18 18 18 18 18 18 18 18
+ 39 01 00 00 00 00 19 D8 AA AA AA AF EA AA AA AA AA AF EA AA AA AA AB AF EF AA AA AA AA AF EA AA
+ 39 01 00 00 00 00 02 BD 01
+ 39 01 00 00 00 00 0D D8 AA AA AB AF EA AA AA AA AE AF EA AA
+ 39 01 00 00 00 00 02 BD 02
+ 39 01 00 00 00 00 0D D8 AA AA AA AF EA AA AA AA AA AF EA AA
+ 39 01 00 00 00 00 02 BD 03
+ 39 01 00 00 00 00 19 D8 BA AA AA AF EA AA AA AA AA AF EA AA BA AA AA AF EA AA AA AA AA AF EA AA
+ 39 01 00 00 00 00 02 BD 00
+ 39 01 00 00 00 00 02 E9 E4
+ 39 01 00 00 00 00 03 E7 17 69
+ 39 01 00 00 00 00 02 E9 00
+ 39 01 00 00 00 00 1A E7 09 09 00 07 E8 00 26 00 07 00 00 E8 32 00 E9 0A 0A 00 00 00 01 01 00 12 04
+ 39 01 00 00 00 00 02 BD 01
+ 39 01 00 00 00 00 0A E7 02 00 01 20 01 18 08 A8 09
+ 39 01 00 00 00 00 02 BD 02
+ 39 01 00 00 00 00 04 E7 20 20 00
+ 39 01 00 00 00 00 02 BD 03
+ 39 01 00 00 00 00 07 E7 00 DC 11 70 00 20
+ 39 01 00 00 00 00 02 E9 C9
+ 39 01 00 00 00 00 07 E7 2A CE 02 70 01 04
+ 39 01 00 00 00 00 02 E9 00
+ 39 01 00 00 00 00 02 BD 00
+ 39 01 00 00 00 00 02 D1 27
+ 05 01 00 00 78 00 02 11 00
+ 05 01 00 00 14 00 02 29 00
+ 39 01 00 00 00 00 03 51 00 00
+ 39 01 00 00 00 00 02 53 24];
+ //[Arima][8901][Jialong]LCM initial code from IC firmware End
+ qcom,mdss-dsi-off-command = [05 01 00 00 14 00 02 28 00
+ 05 01 00 00 78 00 02 10 00];
+ qcom,mdss-dsi-off-dstb-command = [
+ 39 01 00 00 00 00 04 B9 83 11 2A
+ 39 01 00 00 00 00 02 BD 00
+ 39 01 00 00 50 00 02 B1 09];
+ qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
+ qcom,mdss-dsi-off-command-state = "dsi_lp_mode";
+ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
+ qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;
+ qcom,mdss-dsi-tx-eot-append;
+ qcom,mdss-dsi-lp11-init;
+ qcom,mdss-dsi-post-init-delay = <1>;
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/msm8953-mdss-panels.dtsi b/arch/arm64/boot/dts/qcom/msm8953-mdss-panels.dtsi
index fa218ca..fe24071 100644
--- a/arch/arm64/boot/dts/qcom/msm8953-mdss-panels.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953-mdss-panels.dtsi
@@ -28,6 +28,10 @@
#include "dsi-panel-boent51021-1200p-video.dtsi"
#include "dsi-panel-hx8394d-wxga-video.dtsi"
#include "dsi-panel-inxnt51021-1200p-video.dtsi"
+/*[Arima_8901][Jialong] lcm driver porting begin*/
+#include "dsi-hx83112b-truly-1080p-video.dtsi"
+#include "dsi-hx83112b-djn-1080p-cmd.dtsi"
+/*[Arima_8901][Jialong] lcm driver porting end*/
&soc {
dsi_panel_pwr_supply: dsi_panel_pwr_supply {
@@ -71,6 +75,50 @@
};
};
+/*[Arima_8901][Jialong] lcm driver porting begin*/
+&dsi_hx83112b_truly_1080p_video {
+ qcom,mdss-dsi-panel-timings-phy-v2 = [24 1e 08 09 05 03 04 a0
+ 24 1e 08 09 05 03 04 a0
+ 24 1e 08 09 05 03 04 a0
+ 24 1e 08 09 05 03 04 a0
+ 24 1a 08 09 05 03 04 a0];
+ qcom,mdss-dsi-min-refresh-rate = <48>;
+ qcom,mdss-dsi-max-refresh-rate = <60>;
+ qcom,mdss-dsi-pan-enable-dynamic-fps;
+ qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp";
+ //qcom,esd-check-enabled;
+ //qcom,mdss-dsi-panel-status-check-mode = "reg_read";
+ //qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
+ qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
+ //qcom,mdss-dsi-panel-status-value = <0x9c>;
+ //qcom,mdss-dsi-panel-on-check-value = <0x9c>;
+ //qcom,mdss-dsi-panel-status-read-length = <1>;
+ //qcom,mdss-dsi-panel-max-error-count = <3>;
+};
+/*[Arima_8901][Jialong] lcm driver porting end*/
+
+//[Arima][8901][JialongJhan] Command mode 20190516 Start
+&dsi_djn_hx83112b_1080p_cmd {
+ qcom,mdss-dsi-panel-timings-phy-v2 = [24 1e 08 09 05 03 04 a0
+ 24 1e 08 09 05 03 04 a0
+ 24 1e 08 09 05 03 04 a0
+ 24 1e 08 09 05 03 04 a0
+ 24 1a 08 09 05 03 04 a0];
+ qcom,mdss-dsi-min-refresh-rate = <48>;
+ qcom,mdss-dsi-max-refresh-rate = <60>;
+ qcom,mdss-dsi-pan-enable-dynamic-fps;
+ qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp";
+ //qcom,esd-check-enabled;
+ //qcom,mdss-dsi-panel-status-check-mode = "reg_read";
+ //qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
+ qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
+ //qcom,mdss-dsi-panel-status-value = <0x9c>;
+ //qcom,mdss-dsi-panel-on-check-value = <0x9c>;
+ //qcom,mdss-dsi-panel-status-read-length = <1>;
+ //qcom,mdss-dsi-panel-max-error-count = <3>;
+};
+//[Arima][8901][JialongJhan] Command mode 20190516 End
+
&dsi_truly_1080_vid {
qcom,mdss-dsi-panel-timings-phy-v2 = [23 1e 08 09 05 03 04 a0
23 1e 08 09 05 03 04 a0
diff --git a/arch/arm64/boot/dts/qcom/msm8953-mtp.dtsi b/arch/arm64/boot/dts/qcom/msm8953-mtp.dtsi
index a9f87e1b..c053cac 100644
--- a/arch/arm64/boot/dts/qcom/msm8953-mtp.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953-mtp.dtsi
@@ -128,16 +128,27 @@
hw-config = "single_dsi";
};
+/*[Arima_8901][Jialong] lcm driver porting begin*/
&mdss_dsi0 {
+ #if 1
+ //[Arima][8901][JialongJhan] Command mode 20190516 Start
+ qcom,dsi-pref-prim-pan = <&dsi_djn_hx83112b_1080p_cmd>;
+ //qcom,dsi-pref-prim-pan = <&dsi_hx83112b_truly_1080p_video>;
+ //[Arima][8901][JialongJhan] Command mode 20190516 End
+ #else
qcom,dsi-pref-prim-pan = <&dsi_truly_1080_vid>;
+ #endif
pinctrl-names = "mdss_default", "mdss_sleep";
pinctrl-0 = <&mdss_dsi_active &mdss_te_active>;
pinctrl-1 = <&mdss_dsi_suspend &mdss_te_suspend>;
qcom,platform-te-gpio = <&tlmm 24 0>;
- qcom,platform-reset-gpio = <&tlmm 61 0>;
- qcom,platform-bklight-en-gpio = <&tlmm 59 0>;
+ qcom,platform-reset-gpio = <&tlmm 61 0>;
+ qcom,platform-bklight-en-gpio = <&tlmm 96 0>;
+ //not config yet...
+ //qcom,platform-id-gpio = <&tlmm 59 0>;
};
+/*[Arima_8901][Jialong] lcm driver porting end*/
&mdss_dsi1 {
status = "disabled";
@@ -152,6 +163,22 @@
qcom,platform-bklight-en-gpio = <&tlmm 59 0>;
};
+/*[Arima_8901][Jialong] lcm driver porting begin*/
+&dsi_hx83112b_truly_1080p_video {
+ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
+ qcom,mdss-dsi-bl-min-level = <1>;
+ qcom,mdss-dsi-bl-max-level = <4095>;
+ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+};
+
+&dsi_djn_hx83112b_1080p_cmd {
+ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
+ qcom,mdss-dsi-bl-min-level = <1>;
+ qcom,mdss-dsi-bl-max-level = <4095>;
+ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+};
+/*[Arima_8901][Jialong] lcm driver porting end*/
+
&dsi_truly_1080_vid {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-pan-enable-dynamic-fps;
diff --git a/arch/arm64/boot/dts/qcom/msm8953-pinctrl.dtsi b/arch/arm64/boot/dts/qcom/msm8953-pinctrl.dtsi
index 5b27d03..3dad2f2 100644
--- a/arch/arm64/boot/dts/qcom/msm8953-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953-pinctrl.dtsi
@@ -400,14 +400,16 @@
};
pmx_mdss: pmx_mdss {
+
+ /*[Arima_8901][Jialong] lcm driver porting begin*/
mdss_dsi_active: mdss_dsi_active {
mux {
- pins = "gpio61", "gpio59";
+ pins = "gpio61", "gpio96";
function = "gpio";
};
config {
- pins = "gpio61", "gpio59";
+ pins = "gpio61", "gpio96";
drive-strength = <8>; /* 8 mA */
bias-disable = <0>; /* no pull */
output-high;
@@ -416,16 +418,19 @@
mdss_dsi_suspend: mdss_dsi_suspend {
mux {
- pins = "gpio61", "gpio59";
+ pins = "gpio61", "gpio96";
function = "gpio";
};
config {
- pins = "gpio61", "gpio59";
+ pins = "gpio61", "gpio96";
drive-strength = <2>; /* 2 mA */
bias-pull-down; /* pull down */
+ //output-high;
};
};
+ /*[Arima_8901][Jialong] lcm driver porting end*/
+
mdss_dsi_gpio: mdss_dsi_gpio {
mux {
pins = "gpio141";
@@ -1262,12 +1267,12 @@
wsa_reset {
wsa_reset_on: wsa_reset_on {
mux {
- pins = "gpio96";
+ //pins = "gpio96";
function = "gpio";
};
config {
- pins = "gpio96";
+ //pins = "gpio96";
drive-strength = <2>; /* 2 MA */
output-high;
};
@@ -1275,14 +1280,14 @@
wsa_reset_off: wsa_reset_off {
mux {
- pins = "gpio96";
+ //pins = "gpio96";
function = "gpio";
};
config {
- pins = "gpio96";
+ //pins = "gpio96";
drive-strength = <2>; /* 2 MA */
- output-low;
+ output-high;
};
};
};
diff --git a/arch/arm64/boot/dts/qcom/msm8953-wsa881x.dtsi b/arch/arm64/boot/dts/qcom/msm8953-wsa881x.dtsi
index 86f5323..61a4187 100644
--- a/arch/arm64/boot/dts/qcom/msm8953-wsa881x.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953-wsa881x.dtsi
@@ -20,27 +20,31 @@
#size-cells = <0>;
wsa881x_211: wsa881x@20170211 {
+ status = "disabled";
compatible = "qcom,wsa881x";
reg = <0x00 0x20170211>;
- qcom,spkr-sd-n-gpio = <&tlmm 96 0>;
+ //qcom,spkr-sd-n-gpio = <&tlmm 96 0>;
};
wsa881x_212: wsa881x@20170212 {
+ status = "disabled";
compatible = "qcom,wsa881x";
reg = <0x00 0x20170212>;
- qcom,spkr-sd-n-gpio = <&tlmm 96 0>;
+ //qcom,spkr-sd-n-gpio = <&tlmm 96 0>;
};
wsa881x_213: wsa881x@21170213 {
+ status = "disabled";
compatible = "qcom,wsa881x";
reg = <0x00 0x21170213>;
- qcom,spkr-sd-n-gpio = <&tlmm 96 0>;
+ //qcom,spkr-sd-n-gpio = <&tlmm 96 0>;
};
wsa881x_214: wsa881x@21170214 {
+ status = "disabled";
compatible = "qcom,wsa881x";
reg = <0x00 0x21170214>;
- qcom,spkr-sd-n-gpio = <&tlmm 96 0>;
+ //qcom,spkr-sd-n-gpio = <&tlmm 96 0>;
};
};
};
diff --git a/arch/arm64/boot/dts/qcom/sdm450-pmi632-mtp-s3.dtsi b/arch/arm64/boot/dts/qcom/sdm450-pmi632-mtp-s3.dtsi
index 1afea68..58240be 100644
--- a/arch/arm64/boot/dts/qcom/sdm450-pmi632-mtp-s3.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm450-pmi632-mtp-s3.dtsi
@@ -24,10 +24,10 @@
&mdss_dsi0 {
qcom,dsi-pref-prim-pan = <&dsi_hx8399c_truly_vid>;
pinctrl-names = "mdss_default", "mdss_sleep";
- pinctrl-0 = <&mdss_dsi_active &mdss_te_active &bklt_en_default>;
- pinctrl-1 = <&mdss_dsi_suspend &mdss_te_suspend>;
+ //pinctrl-0 = <&mdss_dsi_active &mdss_te_active &bklt_en_default>;
+ //pinctrl-1 = <&mdss_dsi_suspend &mdss_te_suspend>;
- qcom,platform-bklight-en-gpio = <&pm8953_gpios 4 0>;
+ //qcom,platform-bklight-en-gpio = <&pm8953_gpios 4 0>;
lab-supply = <&lcdb_ldo_vreg>;
ibb-supply = <&lcdb_ncp_vreg>;
diff --git a/arch/arm64/boot/dts/qcom/sdm450-pmi632.dtsi b/arch/arm64/boot/dts/qcom/sdm450-pmi632.dtsi
index 6e39327..fbe4e7f 100644
--- a/arch/arm64/boot/dts/qcom/sdm450-pmi632.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm450-pmi632.dtsi
@@ -373,6 +373,7 @@
};
};
+/*
&tlmm {
pmx_mdss {
mdss_dsi_active: mdss_dsi_active {
@@ -393,3 +394,4 @@
};
};
};
+*/
\ No newline at end of file
diff --git a/drivers/regulator/qpnp-lcdb-regulator.c b/drivers/regulator/qpnp-lcdb-regulator.c
index 0ea743e..12fdd06 100644
--- a/drivers/regulator/qpnp-lcdb-regulator.c
+++ b/drivers/regulator/qpnp-lcdb-regulator.c
@@ -12,6 +12,9 @@
*/
#define pr_fmt(fmt) "LCDB: %s: " fmt, __func__
+//[Arima][8901][Jialongjhan]Add delay time between VSN and VSP 20191104 Start
+#define LCDB_PWRUP_PWRDN_CTL_REG 0x66
+//[Arima][8901][Jialongjhan]Add delay time between VSN and VSP 20191104 End
#include <linux/delay.h>
#include <linux/device.h>
@@ -2306,6 +2309,9 @@
int rc;
struct device_node *node;
struct qpnp_lcdb *lcdb;
+ //[Arima][8901][Jialongjhan]Add delay time between VSN and VSP 20191104 Start
+ u8 val = 0xF; // 0xF==1111==VSN delay 8ms; VSP delay 8ms
+ //[Arima][8901][Jialongjhan]Add delay time between VSN and VSP 20191104 End
node = pdev->dev.of_node;
if (!node) {
@@ -2358,6 +2364,10 @@
lcdb->lcdb_enabled, lcdb->ldo.voltage_mv,
lcdb->ncp.voltage_mv, lcdb->bst.voltage_mv);
+ //[Arima][8901][Jialongjhan]Add delay time between VSN and VSP 20191104 Start
+ rc = qpnp_lcdb_write(lcdb, lcdb->base + LCDB_PWRUP_PWRDN_CTL_REG , &val, 1);
+ //[Arima][8901][Jialongjhan]Add delay time between VSN and VSP 20191104 End
+
return rc;
}
diff --git a/drivers/video/fbdev/msm/mdss_dsi.c b/drivers/video/fbdev/msm/mdss_dsi.c
index 1164e6f..6876894 100644
--- a/drivers/video/fbdev/msm/mdss_dsi.c
+++ b/drivers/video/fbdev/msm/mdss_dsi.c
@@ -36,6 +36,11 @@
#include "mdss_dsi_phy.h"
#include "mdss_dba_utils.h"
+//[Arima_8901][LCM][Jialongjhan] Add LCM_vendor file node for PCBA function test begin
+#include <linux/proc_fs.h>
+//[Arima_8901][LCM][Jialongjhan] Add LCM_vendor file node for PCBA function test end
+
+
#define XO_CLK_RATE 19200000
#define CMDLINE_DSI_CTL_NUM_STRING_LEN 2
@@ -410,6 +415,11 @@
int ret = 0;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
+ /*[Fairphone_8901][Jialong]To avoid fuzzy screen,pull high Touch reset pin when panel on start*/
+ gpio_direction_output(64, 1);
+ /*[Fairphone_8901][Jialong]To avoid fuzzy screen,pull high Touch reset pin when panel on end*/
+
+
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
return -EINVAL;
@@ -3268,6 +3278,81 @@
return rc;
}
+/*[Arima_8901][Jialongjhan] Add LCM_vendor file node for PCBA function test 20181114 begin*/
+extern void seq_printf(struct seq_file *m, const char *f, ...);
+extern int single_open(struct file *, int (*)(struct seq_file *, void *), void *);
+extern ssize_t seq_read(struct file *, char __user *, size_t, loff_t *);
+extern loff_t seq_lseek(struct file *, loff_t, int);
+extern int single_release(struct inode *, struct file *);
+
+static int proc_lcm_vendor_show(struct seq_file *m, void *v)
+{
+ int lcm_id;
+
+ lcm_id = gpio_request(59, "lcm_id");
+
+ if(lcm_id == 1)
+ {
+ //For another's LCM module
+ seq_printf(m, "2nd LCM\n");
+ }
+ else
+ { //DJN's LCM module id is 0.
+ seq_printf(m, "DJN , HX83112B\n");
+ }
+
+ return 0;
+}
+
+static int proc_lcm_vendor_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, proc_lcm_vendor_show, NULL);
+}
+
+static const struct file_operations proc_lcm_vendor_fops = {
+ .open = proc_lcm_vendor_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = single_release,
+};
+/*[Arima_8901][Jialongjhan] Add LCM_vendor file node for PCBA function test 20181114 End*/
+
+/*[Arima_8901][Jialongjhan] Expose display revision 20190326 begin*/
+
+static int proc_lcm_revision_show(struct seq_file *m, void *v)
+{
+ int lcm_id;
+ extern int RDDID_HWINFO[3];
+
+ lcm_id = gpio_request(59, "lcm_id");
+
+ if(lcm_id == 1)
+ {
+ //For another's LCM module
+ seq_printf(m, "2nd Source not ready.\n");
+ }
+ else
+ { //DJN's LCM module id is 0.
+ seq_printf(m, "DJN , HX%x%x%x\n", RDDID_HWINFO[0],RDDID_HWINFO[1],RDDID_HWINFO[2]);
+ }
+
+ return 0;
+}
+
+static int proc_lcm_revision_fops_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, proc_lcm_revision_show, NULL);
+}
+
+static const struct file_operations proc_lcm_revision_fops = {
+ .open = proc_lcm_revision_fops_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = single_release,
+};
+
+/*[Arima_8901][Jialongjhan] Expose display revision 20190326 end*/
+
static int mdss_dsi_ctrl_probe(struct platform_device *pdev)
{
int rc = 0;
@@ -3459,6 +3544,14 @@
mdss_dsi_debug_bus_init(mdss_dsi_res);
+ //[Arima_8901][LCM][Jialongjhan] Add LCM_vendor file node for PCBA function test begin
+ proc_create("lcm_vendor", 0, NULL, &proc_lcm_vendor_fops);
+ //[Arima_8901][LCM][Jialongjhan] Add LCM_vendor file node for PCBA function test end
+
+ //[Arima_8901][Jialongjhan] Expose display revision 20190326 begin
+ proc_create("lcm_revision", 0666, NULL, &proc_lcm_revision_fops);
+ //[Arima_8901][Jialongjhan] Expose display revision 20190326 end
+
return 0;
error_shadow_clk_deinit:
diff --git a/drivers/video/fbdev/msm/mdss_dsi_panel.c b/drivers/video/fbdev/msm/mdss_dsi_panel.c
index 7d3009b..c453452 100644
--- a/drivers/video/fbdev/msm/mdss_dsi_panel.c
+++ b/drivers/video/fbdev/msm/mdss_dsi_panel.c
@@ -212,18 +212,21 @@
mdss_dsi_cmdlist_put(ctrl, &cmdreq);
}
-
-static char led_pwm1[2] = {0x51, 0x0}; /* DTYPE_DCS_WRITE1 */
+//[Arima][8901][20181105]Jialong modify backlight range is 1~4095 for control cmd range(2 bytes) Start
+static char led_pwm1[3] = {0x51, 0x00,0x00}; /* DTYPE_DCS_WRITE1 */
static struct dsi_cmd_desc backlight_cmd = {
- {DTYPE_DCS_WRITE1, 1, 0, 0, 1, sizeof(led_pwm1)},
- led_pwm1
+ {DTYPE_DCS_LWRITE, 1, 0, 0, 1, sizeof(led_pwm1)}, led_pwm1
};
+//[Arima][8901][20181105]Jialong modify backlight range is 1~4095 for control cmd range(2 bytes) END
static void mdss_dsi_panel_bklt_dcs(struct mdss_dsi_ctrl_pdata *ctrl, int level)
{
struct dcs_cmd_req cmdreq;
struct mdss_panel_info *pinfo;
+//[Arima][8901][20181105]Jialong modify backlight range is 1~4095 for control cmd range(2 bytes) Start
+int para_1,para_2;
+
pinfo = &(ctrl->panel_data.panel_info);
if (pinfo->dcs_cmd_by_left) {
if (ctrl->ndx != DSI_CTRL_LEFT)
@@ -232,7 +235,14 @@
pr_debug("%s: level=%d\n", __func__, level);
- led_pwm1[1] = (unsigned char)level;
+ //led_pwm1[1] = (unsigned char)level;
+ para_1 = (level>>8)&0x0F;
+ para_2 = level&0xFF;
+
+ led_pwm1[1] = (unsigned char)para_1;
+ led_pwm1[2] = (unsigned char)para_2;
+//[Arima][8901][20181105]Jialong modify backlight range is 1~4095 for control cmd range(2 bytes) End
+
memset(&cmdreq, 0, sizeof(cmdreq));
cmdreq.cmds = &backlight_cmd;
@@ -523,6 +533,19 @@
gpio_free(ctrl_pdata->disp_en_gpio);
}
gpio_set_value((ctrl_pdata->rst_gpio), 0);
+
+ //[Arima][8901][Jialongjhan]Modify pull TP reset Pin position 20191104 Start
+ //Move "pull low TP reset pin" from mdss_dsi.c,
+ //it have to same with LCM reset pin pull low
+
+ /*[Fairphone_8901][Jialong]To reduce power,pull down Touch reset pin when panel off start*/
+ //TP reset pin pull low with LCD reset pin at same time.
+ gpio_direction_output(64, 0);
+ /*[Fairphone_8901][Jialong]To reduce power,pull down Touch reset pin when panel off end*/
+
+ msleep(1);
+ //[Arima][8901][Jialongjhan]Modify pull TP reset Pin position 20191104 End
+
gpio_free(ctrl_pdata->rst_gpio);
if (gpio_is_valid(ctrl_pdata->mode_gpio))
gpio_free(ctrl_pdata->mode_gpio);
@@ -824,11 +847,22 @@
mdss_dsi_panel_dsc_pps_send(ctrl_pdata, &pdata->panel_info);
}
+/*[Arima_8901][Jialongjhan] Expose display revision 20190326 begin*/
+static char RDDID[4] = {0x04, 0x00, 0x00, 0x00};
+static struct dsi_cmd_desc cmd_RDDID = {
+ {DTYPE_DCS_READ, 1, 0, 1, 5, sizeof(RDDID)}, RDDID};
+int RDDID_HWINFO[3];
+int RDDID_read_count =0;
+/*[Arima_8901][Jialongjhan] Expose display revision 20190326 end*/
+
static void mdss_dsi_panel_bl_ctrl(struct mdss_panel_data *pdata,
u32 bl_level)
{
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
struct mdss_dsi_ctrl_pdata *sctrl = NULL;
+ /*[Arima_8901][Jialongjhan] Expose display revision 20190326 begin*/
+ struct dcs_cmd_req cmdreq2;
+ /*[Arima_8901][Jialongjhan] Expose display revision 20190326 end*/
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
@@ -838,6 +872,32 @@
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
+ /*[Arima_8901][Jialongjhan] Expose display revision 20190326 begin*/
+ if(RDDID_read_count==0){
+ memset(&cmdreq2, 0, sizeof(cmdreq2));
+ cmdreq2.cmds = &cmd_RDDID;
+ cmdreq2.cmds_cnt = 1;
+ cmdreq2.flags = CMD_REQ_COMMIT | CMD_REQ_RX;;
+ cmdreq2.rlen = 3;//return 3 values
+ cmdreq2.cb = NULL; /* call back */
+ cmdreq2.rbuf = ctrl_pdata->rx_buf.data;
+
+ mdss_dsi_cmdlist_put(ctrl_pdata, &cmdreq2);
+
+ if(ctrl_pdata->rx_buf.len>0){
+ RDDID_HWINFO[0]=(int)*(ctrl_pdata->rx_buf.data);
+ RDDID_HWINFO[1]=(int)*(ctrl_pdata->rx_buf.data+1);
+ RDDID_HWINFO[2]=(int)*(ctrl_pdata->rx_buf.data+2);
+ //pr_err("[Jialong] ctrl->rx_buf.data data =0x%x\n",*(ctrl_pdata->rx_buf.data));
+ RDDID_read_count++;
+ }
+ }
+ /*[Arima_8901][Jialongjhan] Expose display revision 20190326 end*/
+
+ //[Arima][8901][JialongJhan] Command mode debug fuzzy screen 20190516 Start
+ mdelay(1);
+ //[Arima][8901][JialongJhan] Command mode debug fuzzy screen 20190516 End
+
/*
* Some backlight controllers specify a minimum duty cycle
* for the backlight brightness. If the brightness is less
diff --git a/drivers/video/fbdev/msm/mdss_io_util.c b/drivers/video/fbdev/msm/mdss_io_util.c
index 2f70ad3..2749155 100644
--- a/drivers/video/fbdev/msm/mdss_io_util.c
+++ b/drivers/video/fbdev/msm/mdss_io_util.c
@@ -286,6 +286,14 @@
goto vreg_set_opt_mode_fail;
}
rc = regulator_enable(in_vreg[i].vreg);
+
+ //[Arima][8901][Jialongjhan]Modify Power on/off sequence 20191104 Start
+ if(!strcmp(in_vreg[i].vreg_name,"vddio")){
+ msleep(10);
+ }
+ //[Arima][8901][Jialongjhan]Modify Power on/off sequence 20191104 End
+
+
if (in_vreg[i].post_on_sleep && need_sleep)
usleep_range((in_vreg[i].post_on_sleep * 1000),
(in_vreg[i].post_on_sleep * 1000) + 10);
@@ -304,6 +312,13 @@
regulator_set_load(in_vreg[i].vreg,
in_vreg[i].load[DSS_REG_MODE_DISABLE]);
+ //[Arima][8901][Jialongjhan]Modify Power on/off sequence 20191104 Start
+ if(!strcmp(in_vreg[i].vreg_name,"vddio")){
+ msleep(10);
+ }
+ //[Arima][8901][Jialongjhan]Modify Power on/off sequence 20191104 End
+
+
if (regulator_is_enabled(in_vreg[i].vreg))
regulator_disable(in_vreg[i].vreg);