| /* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 and |
| * only version 2 as published by the Free Software Foundation. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| */ |
| |
| &soc { |
| tlmm: pinctrl@03400000 { |
| compatible = "qcom,sdm845-pinctrl"; |
| reg = <0x03400000 0xc00000>, <0x179900F0 0x60>; |
| reg-names = "pinctrl_regs", "spi_cfg_regs"; |
| interrupts = <0 208 0>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| interrupt-parent = <&pdc>; |
| |
| ufs_dev_reset_assert: ufs_dev_reset_assert { |
| config { |
| pins = "ufs_reset"; |
| bias-pull-down; /* default: pull down */ |
| /* |
| * UFS_RESET driver strengths are having |
| * different values/steps compared to typical |
| * GPIO drive strengths. |
| * |
| * Following table clarifies: |
| * |
| * HDRV value | UFS_RESET | Typical GPIO |
| * (dec) | (mA) | (mA) |
| * 0 | 0.8 | 2 |
| * 1 | 1.55 | 4 |
| * 2 | 2.35 | 6 |
| * 3 | 3.1 | 8 |
| * 4 | 3.9 | 10 |
| * 5 | 4.65 | 12 |
| * 6 | 5.4 | 14 |
| * 7 | 6.15 | 16 |
| * |
| * POR value for UFS_RESET HDRV is 3 which means |
| * 3.1mA and we want to use that. Hence just |
| * specify 8mA to "drive-strength" binding and |
| * that should result into writing 3 to HDRV |
| * field. |
| */ |
| drive-strength = <8>; /* default: 3.1 mA */ |
| output-low; /* active low reset */ |
| }; |
| }; |
| |
| ufs_dev_reset_deassert: ufs_dev_reset_deassert { |
| config { |
| pins = "ufs_reset"; |
| bias-pull-down; /* default: pull down */ |
| /* |
| * default: 3.1 mA |
| * check comments under ufs_dev_reset_assert |
| */ |
| drive-strength = <8>; |
| output-high; /* active low reset */ |
| }; |
| }; |
| |
| flash_led3_front { |
| flash_led3_front_en: flash_led3_front_en { |
| mux { |
| pins = "gpio21"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio21"; |
| drive_strength = <2>; |
| output-high; |
| bias-disable; |
| }; |
| }; |
| |
| flash_led3_front_dis: flash_led3_front_dis { |
| mux { |
| pins = "gpio21"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio21"; |
| drive_strength = <2>; |
| output-low; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| flash_led3_iris { |
| flash_led3_iris_en: flash_led3_iris_en { |
| mux { |
| pins = "gpio23"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio23"; |
| drive_strength = <2>; |
| output-high; |
| bias-disable; |
| }; |
| }; |
| |
| flash_led3_iris_dis: flash_led3_iris_dis { |
| mux { |
| pins = "gpio23"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio23"; |
| drive_strength = <2>; |
| output-low; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| |
| wcd9xxx_intr { |
| wcd_intr_default: wcd_intr_default{ |
| mux { |
| pins = "gpio54"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio54"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* pull down */ |
| input-enable; |
| }; |
| }; |
| }; |
| |
| storage_cd: storage_cd { |
| mux { |
| pins = "gpio126"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio126"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| sdc2_clk_on: sdc2_clk_on { |
| config { |
| pins = "sdc2_clk"; |
| bias-disable; /* NO pull */ |
| drive-strength = <16>; /* 16 MA */ |
| }; |
| }; |
| |
| sdc2_clk_off: sdc2_clk_off { |
| config { |
| pins = "sdc2_clk"; |
| bias-disable; /* NO pull */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| sdc2_clk_ds_400KHz: sdc2_clk_ds_400KHz { |
| config { |
| pins = "sdc2_clk"; |
| bias-disable; /* NO pull */ |
| drive-strength = <16>; /* 16 MA */ |
| }; |
| }; |
| |
| sdc2_clk_ds_50MHz: sdc2_clk_ds_50MHz { |
| config { |
| pins = "sdc2_clk"; |
| bias-disable; /* NO pull */ |
| drive-strength = <16>; /* 16 MA */ |
| }; |
| }; |
| |
| sdc2_clk_ds_100MHz: sdc2_clk_ds_100MHz { |
| config { |
| pins = "sdc2_clk"; |
| bias-disable; /* NO pull */ |
| drive-strength = <16>; /* 16 MA */ |
| }; |
| }; |
| |
| sdc2_clk_ds_200MHz: sdc2_clk_ds_200MHz { |
| config { |
| pins = "sdc2_clk"; |
| bias-disable; /* NO pull */ |
| drive-strength = <16>; /* 16 MA */ |
| }; |
| }; |
| |
| sdc2_cmd_on: sdc2_cmd_on { |
| config { |
| pins = "sdc2_cmd"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <10>; /* 10 MA */ |
| }; |
| }; |
| |
| sdc2_cmd_off: sdc2_cmd_off { |
| config { |
| pins = "sdc2_cmd"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| sdc2_cmd_ds_400KHz: sdc2_cmd_ds_400KHz { |
| config { |
| pins = "sdc2_cmd"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <10>; /* 10 MA */ |
| }; |
| }; |
| |
| sdc2_cmd_ds_50MHz: sdc2_cmd_ds_50MHz { |
| config { |
| pins = "sdc2_cmd"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <10>; /* 10 MA */ |
| }; |
| }; |
| |
| sdc2_cmd_ds_100MHz: sdc2_cmd_ds_100MHz { |
| config { |
| pins = "sdc2_cmd"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <10>; /* 10 MA */ |
| }; |
| }; |
| |
| sdc2_cmd_ds_200MHz: sdc2_cmd_ds_200MHz { |
| config { |
| pins = "sdc2_cmd"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <10>; /* 10 MA */ |
| }; |
| }; |
| |
| sdc2_data_on: sdc2_data_on { |
| config { |
| pins = "sdc2_data"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <10>; /* 10 MA */ |
| }; |
| }; |
| |
| sdc2_data_off: sdc2_data_off { |
| config { |
| pins = "sdc2_data"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| sdc2_data_ds_400KHz: sdc2_data_ds_400KHz { |
| config { |
| pins = "sdc2_data"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <10>; /* 10 MA */ |
| }; |
| }; |
| |
| sdc2_data_ds_50MHz: sdc2_data_ds_50MHz { |
| config { |
| pins = "sdc2_data"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <10>; /* 10 MA */ |
| }; |
| }; |
| |
| sdc2_data_ds_100MHz: sdc2_data_ds_100MHz { |
| config { |
| pins = "sdc2_data"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <10>; /* 10 MA */ |
| }; |
| }; |
| |
| sdc2_data_ds_200MHz: sdc2_data_ds_200MHz { |
| config { |
| pins = "sdc2_data"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <10>; /* 10 MA */ |
| }; |
| }; |
| |
| pcie0 { |
| pcie0_clkreq_default: pcie0_clkreq_default { |
| mux { |
| pins = "gpio36"; |
| function = "pci_e0"; |
| }; |
| |
| config { |
| pins = "gpio36"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| pcie0_perst_default: pcie0_perst_default { |
| mux { |
| pins = "gpio35"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio35"; |
| drive-strength = <2>; |
| bias-pull-down; |
| }; |
| }; |
| |
| pcie0_wake_default: pcie0_wake_default { |
| mux { |
| pins = "gpio37"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio37"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| pcie0_3v3_on: pcie0_3v3_on { |
| mux { |
| pins = "gpio90"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio90"; |
| drive_strength = <2>; |
| bias-disable; |
| output-high; |
| }; |
| }; |
| |
| pcie0_1v5_on: pcie0_1v5_on { |
| mux { |
| pins = "gpio90"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio90"; |
| drive_strength = <2>; |
| bias-disable; |
| output-high; |
| }; |
| }; |
| }; |
| |
| pcie1 { |
| pcie1_clkreq_default: pcie1_clkreq_default { |
| mux { |
| pins = "gpio103"; |
| function = "pci_e1"; |
| }; |
| |
| config { |
| pins = "gpio103"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| pcie1_perst_default: pcie1_perst_default { |
| mux { |
| pins = "gpio102"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio102"; |
| drive-strength = <2>; |
| bias-pull-down; |
| }; |
| }; |
| |
| pcie1_wake_default: pcie1_wake_default { |
| mux { |
| pins = "gpio104"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio104"; |
| drive-strength = <2>; |
| bias-pull-down; |
| }; |
| }; |
| }; |
| |
| cdc_reset_ctrl { |
| cdc_reset_sleep: cdc_reset_sleep { |
| mux { |
| pins = "gpio64"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio64"; |
| drive-strength = <2>; |
| bias-disable; |
| output-low; |
| }; |
| }; |
| |
| cdc_reset_active:cdc_reset_active { |
| mux { |
| pins = "gpio64"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio64"; |
| drive-strength = <8>; |
| bias-pull-down; |
| output-high; |
| }; |
| }; |
| }; |
| |
| spkr_i2s_clk_pin { |
| spkr_i2s_clk_sleep: spkr_i2s_clk_sleep { |
| mux { |
| pins = "gpio69"; |
| function = "spkr_i2s"; |
| }; |
| |
| config { |
| pins = "gpio69"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| }; |
| }; |
| |
| spkr_i2s_clk_active: spkr_i2s_clk_active { |
| mux { |
| pins = "gpio69"; |
| function = "spkr_i2s"; |
| }; |
| |
| config { |
| pins = "gpio69"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| wcd_gnd_mic_swap { |
| wcd_gnd_mic_swap_idle: wcd_gnd_mic_swap_idle { |
| mux { |
| pins = "gpio51"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio51"; |
| drive-strength = <2>; |
| bias-pull-down; |
| output-low; |
| }; |
| }; |
| |
| wcd_gnd_mic_swap_active: wcd_gnd_mic_swap_active { |
| mux { |
| pins = "gpio51"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio51"; |
| drive-strength = <2>; |
| bias-disable; |
| output-high; |
| }; |
| }; |
| }; |
| |
| /* USB C analog configuration */ |
| wcd_usbc_analog_en1 { |
| wcd_usbc_analog_en1_idle: wcd_usbc_ana_en1_idle { |
| mux { |
| pins = "gpio49"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio49"; |
| drive-strength = <2>; |
| bias-pull-down; |
| output-low; |
| }; |
| }; |
| |
| wcd_usbc_analog_en1_active: wcd_usbc_ana_en1_active { |
| mux { |
| pins = "gpio49"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio49"; |
| drive-strength = <2>; |
| bias-disable; |
| output-high; |
| }; |
| }; |
| }; |
| |
| wcd_usbc_analog_en2 { |
| wcd_usbc_analog_en2_idle: wcd_usbc_ana_en2_idle { |
| mux { |
| pins = "gpio51"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio51"; |
| drive-strength = <2>; |
| bias-pull-down; |
| output-low; |
| }; |
| }; |
| |
| wcd_usbc_analog_en2_active: wcd_usbc_ana_en2_active { |
| mux { |
| pins = "gpio51"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio51"; |
| drive-strength = <2>; |
| bias-disable; |
| output-high; |
| }; |
| }; |
| }; |
| |
| pri_aux_pcm_clk { |
| pri_aux_pcm_clk_sleep: pri_aux_pcm_clk_sleep { |
| mux { |
| pins = "gpio65"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio65"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| pri_aux_pcm_clk_active: pri_aux_pcm_clk_active { |
| mux { |
| pins = "gpio65"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio65"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| pri_aux_pcm_sync { |
| pri_aux_pcm_sync_sleep: pri_aux_pcm_sync_sleep { |
| mux { |
| pins = "gpio66"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio66"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| pri_aux_pcm_sync_active: pri_aux_pcm_sync_active { |
| mux { |
| pins = "gpio66"; |
| function = "pri_mi2s_ws"; |
| }; |
| |
| config { |
| pins = "gpio66"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| pri_aux_pcm_din { |
| pri_aux_pcm_din_sleep: pri_aux_pcm_din_sleep { |
| mux { |
| pins = "gpio67"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio67"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| pri_aux_pcm_din_active: pri_aux_pcm_din_active { |
| mux { |
| pins = "gpio67"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio67"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| pri_aux_pcm_dout { |
| pri_aux_pcm_dout_sleep: pri_aux_pcm_dout_sleep { |
| mux { |
| pins = "gpio68"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio68"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| pri_aux_pcm_dout_active: pri_aux_pcm_dout_active { |
| mux { |
| pins = "gpio68"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio68"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| pmx_sde: pmx_sde { |
| sde_dsi_active: sde_dsi_active { |
| mux { |
| pins = "gpio6", "gpio52"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio6", "gpio52"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable = <0>; /* no pull */ |
| }; |
| }; |
| sde_dsi_suspend: sde_dsi_suspend { |
| mux { |
| pins = "gpio6", "gpio52"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio6", "gpio52"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| }; |
| }; |
| }; |
| |
| pmx_sde_te { |
| sde_te_active: sde_te_active { |
| mux { |
| pins = "gpio10"; |
| function = "mdp_vsync"; |
| }; |
| |
| config { |
| pins = "gpio10"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| }; |
| }; |
| |
| sde_te_suspend: sde_te_suspend { |
| mux { |
| pins = "gpio10"; |
| function = "mdp_vsync"; |
| }; |
| |
| config { |
| pins = "gpio10"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| }; |
| }; |
| }; |
| |
| sde_dp_aux_active: sde_dp_aux_active { |
| mux { |
| pins = "gpio43", "gpio51"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio43", "gpio51"; |
| bias-disable = <0>; /* no pull */ |
| drive-strength = <8>; |
| }; |
| }; |
| |
| sde_dp_aux_suspend: sde_dp_aux_suspend { |
| mux { |
| pins = "gpio43", "gpio51"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio43", "gpio51"; |
| bias-pull-down; |
| drive-strength = <2>; |
| }; |
| }; |
| |
| sde_dp_usbplug_cc_active: sde_dp_usbplug_cc_active { |
| mux { |
| pins = "gpio38"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio38"; |
| bias-disable; |
| drive-strength = <16>; |
| }; |
| }; |
| |
| sde_dp_usbplug_cc_suspend: sde_dp_usbplug_cc_suspend { |
| mux { |
| pins = "gpio38"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio38"; |
| bias-pull-down; |
| drive-strength = <2>; |
| }; |
| }; |
| |
| /* add pingrp for touchscreen */ |
| pmx_ts_int_active { |
| ts_int_active: ts_int_active { |
| mux { |
| pins = "gpio122"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio122"; |
| drive-strength = <8>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| pmx_ts_int_suspend { |
| ts_int_suspend1: ts_int_suspend1 { |
| mux { |
| pins = "gpio122"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio122"; |
| drive-strength = <2>; |
| bias-pull-down; |
| }; |
| }; |
| }; |
| |
| pmx_ts_reset_active { |
| ts_reset_active: ts_reset_active { |
| mux { |
| pins = "gpio99"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio99"; |
| drive-strength = <8>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| pmx_ts_reset_suspend { |
| ts_reset_suspend1: ts_reset_suspend1 { |
| mux { |
| pins = "gpio99"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio99"; |
| drive-strength = <2>; |
| bias-pull-down; |
| }; |
| }; |
| }; |
| |
| pmx_ts_release { |
| ts_release: ts_release { |
| mux { |
| pins = "gpio122", "gpio99"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio122", "gpio99"; |
| drive-strength = <2>; |
| bias-pull-down; |
| }; |
| }; |
| }; |
| |
| ts_mux { |
| ts_active: ts_active { |
| mux { |
| pins = "gpio99", "gpio122"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio99", "gpio122"; |
| drive-strength = <16>; |
| bias-pull-up; |
| }; |
| }; |
| |
| ts_reset_suspend: ts_reset_suspend { |
| mux { |
| pins = "gpio99"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio99"; |
| drive-strength = <2>; |
| bias-pull-down; |
| }; |
| }; |
| |
| ts_int_suspend: ts_int_suspend { |
| mux { |
| pins = "gpio122"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio122"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| ext_bridge_mux { |
| lt9611_pins: lt9611_pins { |
| mux { |
| pins = "gpio84", "gpio128", "gpio89"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio84", "gpio128", "gpio89"; |
| bias-disable = <0>; /* no pull */ |
| drive-strength = <8>; |
| }; |
| }; |
| }; |
| |
| sec_aux_pcm { |
| sec_aux_pcm_sleep: sec_aux_pcm_sleep { |
| mux { |
| pins = "gpio80", "gpio81"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio80", "gpio81"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| sec_aux_pcm_active: sec_aux_pcm_active { |
| mux { |
| pins = "gpio80", "gpio81"; |
| function = "sec_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio80", "gpio81"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| sec_aux_pcm_din { |
| sec_aux_pcm_din_sleep: sec_aux_pcm_din_sleep { |
| mux { |
| pins = "gpio82"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio82"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| sec_aux_pcm_din_active: sec_aux_pcm_din_active { |
| mux { |
| pins = "gpio82"; |
| function = "sec_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio82"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| sec_aux_pcm_dout { |
| sec_aux_pcm_dout_sleep: sec_aux_pcm_dout_sleep { |
| mux { |
| pins = "gpio83"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio83"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| sec_aux_pcm_dout_active: sec_aux_pcm_dout_active { |
| mux { |
| pins = "gpio83"; |
| function = "sec_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio83"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| tert_aux_pcm { |
| tert_aux_pcm_sleep: tert_aux_pcm_sleep { |
| mux { |
| pins = "gpio75", "gpio76"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio75", "gpio76"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| tert_aux_pcm_active: tert_aux_pcm_active { |
| mux { |
| pins = "gpio75", "gpio76"; |
| function = "ter_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio75", "gpio76"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| tert_aux_pcm_din { |
| tert_aux_pcm_din_sleep: tert_aux_pcm_din_sleep { |
| mux { |
| pins = "gpio77"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio77"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| tert_aux_pcm_din_active: tert_aux_pcm_din_active { |
| mux { |
| pins = "gpio77"; |
| function = "ter_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio77"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| tert_aux_pcm_dout { |
| tert_aux_pcm_dout_sleep: tert_aux_pcm_dout_sleep { |
| mux { |
| pins = "gpio78"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio78"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| tert_aux_pcm_dout_active: tert_aux_pcm_dout_active { |
| mux { |
| pins = "gpio78"; |
| function = "ter_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio78"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| quat_aux_pcm { |
| quat_aux_pcm_sleep: quat_aux_pcm_sleep { |
| mux { |
| pins = "gpio58", "gpio59"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio58", "gpio59"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| quat_aux_pcm_active: quat_aux_pcm_active { |
| mux { |
| pins = "gpio58", "gpio59"; |
| function = "qua_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio58", "gpio59"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| quat_aux_pcm_din { |
| quat_aux_pcm_din_sleep: quat_aux_pcm_din_sleep { |
| mux { |
| pins = "gpio60"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio60"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| quat_aux_pcm_din_active: quat_aux_pcm_din_active { |
| mux { |
| pins = "gpio60"; |
| function = "qua_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio60"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| quat_aux_pcm_dout { |
| quat_aux_pcm_dout_sleep: quat_aux_pcm_dout_sleep { |
| mux { |
| pins = "gpio61"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio61"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| quat_aux_pcm_dout_active: quat_aux_pcm_dout_active { |
| mux { |
| pins = "gpio61"; |
| function = "qua_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio61"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| pri_mi2s_mclk { |
| pri_mi2s_mclk_sleep: pri_mi2s_mclk_sleep { |
| mux { |
| pins = "gpio64"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio64"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| pri_mi2s_mclk_active: pri_mi2s_mclk_active { |
| mux { |
| pins = "gpio64"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio64"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| pri_mi2s_sck { |
| pri_mi2s_sck_sleep: pri_mi2s_sck_sleep { |
| mux { |
| pins = "gpio65"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio65"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| pri_mi2s_sck_active: pri_mi2s_sck_active { |
| mux { |
| pins = "gpio65"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio65"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| pri_mi2s_ws { |
| pri_mi2s_ws_sleep: pri_mi2s_ws_sleep { |
| mux { |
| pins = "gpio66"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio66"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| pri_mi2s_ws_active: pri_mi2s_ws_active { |
| mux { |
| pins = "gpio66"; |
| function = "pri_mi2s_ws"; |
| }; |
| |
| config { |
| pins = "gpio66"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| pri_mi2s_sd0 { |
| pri_mi2s_sd0_sleep: pri_mi2s_sd0_sleep { |
| mux { |
| pins = "gpio67"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio67"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| pri_mi2s_sd0_active: pri_mi2s_sd0_active { |
| mux { |
| pins = "gpio67"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio67"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| pri_mi2s_sd1 { |
| pri_mi2s_sd1_sleep: pri_mi2s_sd1_sleep { |
| mux { |
| pins = "gpio68"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio68"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| pri_mi2s_sd1_active: pri_mi2s_sd1_active { |
| mux { |
| pins = "gpio68"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio68"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| sec_mi2s_mclk { |
| sec_mi2s_mclk_sleep: sec_mi2s_mclk_sleep { |
| mux { |
| pins = "gpio79"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio79"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| sec_mi2s_mclk_active: sec_mi2s_mclk_active { |
| mux { |
| pins = "gpio79"; |
| function = "sec_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio79"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| sec_mi2s { |
| sec_mi2s_sleep: sec_mi2s_sleep { |
| mux { |
| pins = "gpio80", "gpio81"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio80", "gpio81"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-disable; /* NO PULL */ |
| input-enable; |
| }; |
| }; |
| |
| sec_mi2s_active: sec_mi2s_active { |
| mux { |
| pins = "gpio80", "gpio81"; |
| function = "sec_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio80", "gpio81"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| sec_mi2s_sd0 { |
| sec_mi2s_sd0_sleep: sec_mi2s_sd0_sleep { |
| mux { |
| pins = "gpio82"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio82"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| sec_mi2s_sd0_active: sec_mi2s_sd0_active { |
| mux { |
| pins = "gpio82"; |
| function = "sec_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio82"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| sec_mi2s_sd1 { |
| sec_mi2s_sd1_sleep: sec_mi2s_sd1_sleep { |
| mux { |
| pins = "gpio83"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio83"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| sec_mi2s_sd1_active: sec_mi2s_sd1_active { |
| mux { |
| pins = "gpio83"; |
| function = "sec_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio83"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| tert_mi2s_mclk { |
| tert_mi2s_mclk_sleep: tert_mi2s_mclk_sleep { |
| mux { |
| pins = "gpio74"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio74"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| tert_mi2s_mclk_active: tert_mi2s_mclk_active { |
| mux { |
| pins = "gpio74"; |
| function = "ter_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio74"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| tert_mi2s { |
| tert_mi2s_sleep: tert_mi2s_sleep { |
| mux { |
| pins = "gpio75", "gpio76"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio75", "gpio76"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| tert_mi2s_active: tert_mi2s_active { |
| mux { |
| pins = "gpio75", "gpio76"; |
| function = "ter_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio75", "gpio76"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| tert_mi2s_sd0 { |
| tert_mi2s_sd0_sleep: tert_mi2s_sd0_sleep { |
| mux { |
| pins = "gpio77"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio77"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| tert_mi2s_sd0_active: tert_mi2s_sd0_active { |
| mux { |
| pins = "gpio77"; |
| function = "ter_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio77"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| tert_mi2s_sd1 { |
| tert_mi2s_sd1_sleep: tert_mi2s_sd1_sleep { |
| mux { |
| pins = "gpio78"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio78"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| tert_mi2s_sd1_active: tert_mi2s_sd1_active { |
| mux { |
| pins = "gpio78"; |
| function = "ter_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio78"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| quat_mi2s_mclk { |
| quat_mi2s_mclk_sleep: quat_mi2s_mclk_sleep { |
| mux { |
| pins = "gpio57"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio57"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| quat_mi2s_mclk_active: quat_mi2s_mclk_active { |
| mux { |
| pins = "gpio57"; |
| function = "qua_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio57"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| quat_mi2s { |
| quat_mi2s_sleep: quat_mi2s_sleep { |
| mux { |
| pins = "gpio58", "gpio59"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio58", "gpio59"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| quat_mi2s_active: quat_mi2s_active { |
| mux { |
| pins = "gpio58", "gpio59"; |
| function = "qua_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio58", "gpio59"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| quat_mi2s_sd0 { |
| quat_mi2s_sd0_sleep: quat_mi2s_sd0_sleep { |
| mux { |
| pins = "gpio60"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio60"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| quat_mi2s_sd0_active: quat_mi2s_sd0_active { |
| mux { |
| pins = "gpio60"; |
| function = "qua_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio60"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| quat_mi2s_sd1 { |
| quat_mi2s_sd1_sleep: quat_mi2s_sd1_sleep { |
| mux { |
| pins = "gpio61"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio61"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| quat_mi2s_sd1_active: quat_mi2s_sd1_active { |
| mux { |
| pins = "gpio61"; |
| function = "qua_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio61"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| quat_mi2s_sd2 { |
| quat_mi2s_sd2_sleep: quat_mi2s_sd2_sleep { |
| mux { |
| pins = "gpio62"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio62"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| quat_mi2s_sd2_active: quat_mi2s_sd2_active { |
| mux { |
| pins = "gpio62"; |
| function = "qua_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio62"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| quat_mi2s_sd3 { |
| quat_mi2s_sd3_sleep: quat_mi2s_sd3_sleep { |
| mux { |
| pins = "gpio63"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio63"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| quat_mi2s_sd3_active: quat_mi2s_sd3_active { |
| mux { |
| pins = "gpio63"; |
| function = "qua_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio63"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| quat_tdm { |
| quat_tdm_sleep: quat_tdm_sleep { |
| mux { |
| pins = "gpio58", "gpio59"; |
| function = "qua_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio58", "gpio59"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| }; |
| }; |
| |
| quat_tdm_active: quat_tdm_active { |
| mux { |
| pins = "gpio58", "gpio59"; |
| function = "qua_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio58", "gpio59"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| quat_tdm_dout { |
| quat_tdm_dout_sleep: quat_tdm_dout_sleep { |
| mux { |
| pins = "gpio61"; |
| function = "qua_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio61"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| }; |
| }; |
| |
| quat_tdm_dout_active: quat_tdm_dout_active { |
| mux { |
| pins = "gpio61"; |
| function = "qua_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio61"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| quat_tdm_din { |
| quat_tdm_din_sleep: quat_tdm_din_sleep { |
| mux { |
| pins = "gpio60"; |
| function = "qua_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio60"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| }; |
| }; |
| |
| quat_tdm_din_active: quat_tdm_din_active { |
| mux { |
| pins = "gpio60"; |
| function = "qua_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio60"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| /* QUPv3 South SE mappings */ |
| /* SE 0 pin mappings */ |
| qupv3_se0_i2c_pins: qupv3_se0_i2c_pins { |
| qupv3_se0_i2c_active: qupv3_se0_i2c_active { |
| mux { |
| pins = "gpio0", "gpio1"; |
| function = "qup0"; |
| }; |
| |
| config { |
| pins = "gpio0", "gpio1"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se0_i2c_sleep: qupv3_se0_i2c_sleep { |
| mux { |
| pins = "gpio0", "gpio1"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio0", "gpio1"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se0_spi_pins: qupv3_se0_spi_pins { |
| qupv3_se0_spi_active: qupv3_se0_spi_active { |
| mux { |
| pins = "gpio0", "gpio1", "gpio2", |
| "gpio3"; |
| function = "qup0"; |
| }; |
| |
| config { |
| pins = "gpio0", "gpio1", "gpio2", |
| "gpio3"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se0_spi_sleep: qupv3_se0_spi_sleep { |
| mux { |
| pins = "gpio0", "gpio1", "gpio2", |
| "gpio3"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio0", "gpio1", "gpio2", |
| "gpio3"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 1 pin mappings */ |
| qupv3_se1_i2c_pins: qupv3_se1_i2c_pins { |
| qupv3_se1_i2c_active: qupv3_se1_i2c_active { |
| mux { |
| pins = "gpio17", "gpio18"; |
| function = "qup1"; |
| }; |
| |
| config { |
| pins = "gpio17", "gpio18"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se1_i2c_sleep: qupv3_se1_i2c_sleep { |
| mux { |
| pins = "gpio17", "gpio18"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio17", "gpio18"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se1_spi_pins: qupv3_se1_spi_pins { |
| qupv3_se1_spi_active: qupv3_se1_spi_active { |
| mux { |
| pins = "gpio17", "gpio18", "gpio19", |
| "gpio20"; |
| function = "qup1"; |
| }; |
| |
| config { |
| pins = "gpio17", "gpio18", "gpio19", |
| "gpio20"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se1_spi_sleep: qupv3_se1_spi_sleep { |
| mux { |
| pins = "gpio17", "gpio18", "gpio19", |
| "gpio20"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio17", "gpio18", "gpio19", |
| "gpio20"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 2 pin mappings */ |
| qupv3_se2_i2c_pins: qupv3_se2_i2c_pins { |
| qupv3_se2_i2c_active: qupv3_se2_i2c_active { |
| mux { |
| pins = "gpio27", "gpio28"; |
| function = "qup2"; |
| }; |
| |
| config { |
| pins = "gpio27", "gpio28"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se2_i2c_sleep: qupv3_se2_i2c_sleep { |
| mux { |
| pins = "gpio27", "gpio28"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio27", "gpio28"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se2_spi_pins: qupv3_se2_spi_pins { |
| qupv3_se2_spi_active: qupv3_se2_spi_active { |
| mux { |
| pins = "gpio27", "gpio28", "gpio29", |
| "gpio30"; |
| function = "qup2"; |
| }; |
| |
| config { |
| pins = "gpio27", "gpio28", "gpio29", |
| "gpio30"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se2_spi_sleep: qupv3_se2_spi_sleep { |
| mux { |
| pins = "gpio27", "gpio28", "gpio29", |
| "gpio30"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio27", "gpio28", "gpio29", |
| "gpio30"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 3 pin mappings */ |
| qupv3_se3_i2c_pins: qupv3_se3_i2c_pins { |
| qupv3_se3_i2c_active: qupv3_se3_i2c_active { |
| mux { |
| pins = "gpio41", "gpio42"; |
| function = "qup3"; |
| }; |
| |
| config { |
| pins = "gpio41", "gpio42"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se3_i2c_sleep: qupv3_se3_i2c_sleep { |
| mux { |
| pins = "gpio41", "gpio42"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio41", "gpio42"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| nfc { |
| nfc_int_active: nfc_int_active { |
| /* active state */ |
| mux { |
| /* GPIO 63 NFC Read Interrupt */ |
| pins = "gpio63"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio63"; |
| drive-strength = <2>; /* 2 MA */ |
| bias-pull-up; |
| }; |
| }; |
| |
| nfc_int_suspend: nfc_int_suspend { |
| /* sleep state */ |
| mux { |
| /* GPIO 63 NFC Read Interrupt */ |
| pins = "gpio63"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio63"; |
| drive-strength = <2>; /* 2 MA */ |
| bias-pull-up; |
| }; |
| }; |
| |
| nfc_enable_active: nfc_enable_active { |
| /* active state */ |
| mux { |
| /* 12: NFC ENABLE 116:ESE Enable */ |
| pins = "gpio12", "gpio62", "gpio116"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio12", "gpio62", "gpio116"; |
| drive-strength = <2>; /* 2 MA */ |
| bias-pull-up; |
| }; |
| }; |
| |
| nfc_enable_suspend: nfc_enable_suspend { |
| /* sleep state */ |
| mux { |
| /* 12: NFC ENABLE 116:ESE Enable */ |
| pins = "gpio12", "gpio62", "gpio116"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio12", "gpio62", "gpio116"; |
| drive-strength = <2>; /* 2 MA */ |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| qupv3_se3_spi_pins: qupv3_se3_spi_pins { |
| qupv3_se3_spi_active: qupv3_se3_spi_active { |
| mux { |
| pins = "gpio41", "gpio42", "gpio43", |
| "gpio44"; |
| function = "qup3"; |
| }; |
| |
| config { |
| pins = "gpio41", "gpio42", "gpio43", |
| "gpio44"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se3_spi_sleep: qupv3_se3_spi_sleep { |
| mux { |
| pins = "gpio41", "gpio42", "gpio43", |
| "gpio44"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio41", "gpio42", "gpio43", |
| "gpio44"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 4 pin mappings */ |
| qupv3_se4_i2c_pins: qupv3_se4_i2c_pins { |
| qupv3_se4_i2c_active: qupv3_se4_i2c_active { |
| mux { |
| pins = "gpio89", "gpio90"; |
| function = "qup4"; |
| }; |
| |
| config { |
| pins = "gpio89", "gpio90"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se4_i2c_sleep: qupv3_se4_i2c_sleep { |
| mux { |
| pins = "gpio89", "gpio90"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio89", "gpio90"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se4_spi_pins: qupv3_se4_spi_pins { |
| qupv3_se4_spi_active: qupv3_se4_spi_active { |
| mux { |
| pins = "gpio89", "gpio90", "gpio91", |
| "gpio92"; |
| function = "qup4"; |
| }; |
| |
| config { |
| pins = "gpio89", "gpio90", "gpio91", |
| "gpio92"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se4_spi_sleep: qupv3_se4_spi_sleep { |
| mux { |
| pins = "gpio89", "gpio90", "gpio91", |
| "gpio92"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio89", "gpio90", "gpio91", |
| "gpio92"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 5 pin mappings */ |
| qupv3_se5_i2c_pins: qupv3_se5_i2c_pins { |
| qupv3_se5_i2c_active: qupv3_se5_i2c_active { |
| mux { |
| pins = "gpio85", "gpio86"; |
| function = "qup5"; |
| }; |
| |
| config { |
| pins = "gpio85", "gpio86"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se5_i2c_sleep: qupv3_se5_i2c_sleep { |
| mux { |
| pins = "gpio85", "gpio86"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio85", "gpio86"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se5_spi_pins: qupv3_se5_spi_pins { |
| qupv3_se5_spi_active: qupv3_se5_spi_active { |
| mux { |
| pins = "gpio85", "gpio86", "gpio87", |
| "gpio88"; |
| function = "qup5"; |
| }; |
| |
| config { |
| pins = "gpio85", "gpio86", "gpio87", |
| "gpio88"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se5_spi_sleep: qupv3_se5_spi_sleep { |
| mux { |
| pins = "gpio85", "gpio86", "gpio87", |
| "gpio88"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio85", "gpio86", "gpio87", |
| "gpio88"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 6 pin mappings */ |
| qupv3_se6_i2c_pins: qupv3_se6_i2c_pins { |
| qupv3_se6_i2c_active: qupv3_se6_i2c_active { |
| mux { |
| pins = "gpio45", "gpio46"; |
| function = "qup6"; |
| }; |
| |
| config { |
| pins = "gpio45", "gpio46"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se6_i2c_sleep: qupv3_se6_i2c_sleep { |
| mux { |
| pins = "gpio45", "gpio46"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio45", "gpio46"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se6_4uart_pins: qupv3_se6_4uart_pins { |
| qupv3_se6_ctsrx: qupv3_se6_ctsrx { |
| mux { |
| pins = "gpio45", "gpio48"; |
| function = "qup6"; |
| }; |
| |
| config { |
| pins = "gpio45", "gpio48"; |
| drive-strength = <2>; |
| bias-no-pull; |
| }; |
| }; |
| |
| qupv3_se6_rts: qupv3_se6_rts { |
| mux { |
| pins = "gpio46"; |
| function = "qup6"; |
| }; |
| |
| config { |
| pins = "gpio46"; |
| drive-strength = <2>; |
| bias-pull-down; |
| }; |
| }; |
| qupv3_se6_tx: qupv3_se6_tx { |
| mux { |
| pins = "gpio47"; |
| function = "qup6"; |
| }; |
| |
| config { |
| pins = "gpio47"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se6_spi_pins: qupv3_se6_spi_pins { |
| qupv3_se6_spi_active: qupv3_se6_spi_active { |
| mux { |
| pins = "gpio45", "gpio46", "gpio47", |
| "gpio48"; |
| function = "qup6"; |
| }; |
| |
| config { |
| pins = "gpio45", "gpio46", "gpio47", |
| "gpio48"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se6_spi_sleep: qupv3_se6_spi_sleep { |
| mux { |
| pins = "gpio45", "gpio46", "gpio47", |
| "gpio48"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio45", "gpio46", "gpio47", |
| "gpio48"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 7 pin mappings */ |
| qupv3_se7_i2c_pins: qupv3_se7_i2c_pins { |
| qupv3_se7_i2c_active: qupv3_se7_i2c_active { |
| mux { |
| pins = "gpio93", "gpio94"; |
| function = "qup7"; |
| }; |
| |
| config { |
| pins = "gpio93", "gpio94"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se7_i2c_sleep: qupv3_se7_i2c_sleep { |
| mux { |
| pins = "gpio93", "gpio94"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio93", "gpio94"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se7_4uart_pins: qupv3_se7_4uart_pins { |
| qupv3_se7_4uart_active: qupv3_se7_4uart_active { |
| mux { |
| pins = "gpio93", "gpio94", "gpio95", |
| "gpio96"; |
| function = "qup7"; |
| }; |
| |
| config { |
| pins = "gpio93", "gpio94", "gpio95", |
| "gpio96"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se7_4uart_sleep: qupv3_se7_4uart_sleep { |
| mux { |
| pins = "gpio93", "gpio94", "gpio95", |
| "gpio96"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio93", "gpio94", "gpio95", |
| "gpio96"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| qupv3_se7_spi_pins: qupv3_se7_spi_pins { |
| qupv3_se7_spi_active: qupv3_se7_spi_active { |
| mux { |
| pins = "gpio93", "gpio94", "gpio95", |
| "gpio96"; |
| function = "qup7"; |
| }; |
| |
| config { |
| pins = "gpio93", "gpio94", "gpio95", |
| "gpio96"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se7_spi_sleep: qupv3_se7_spi_sleep { |
| mux { |
| pins = "gpio93", "gpio94", "gpio95", |
| "gpio96"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio93", "gpio94", "gpio95", |
| "gpio96"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* QUPv3 North instances */ |
| /* SE 8 pin mappings */ |
| qupv3_se8_i2c_pins: qupv3_se8_i2c_pins { |
| qupv3_se8_i2c_active: qupv3_se8_i2c_active { |
| mux { |
| pins = "gpio65", "gpio66"; |
| function = "qup8"; |
| }; |
| |
| config { |
| pins = "gpio65", "gpio66"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se8_i2c_sleep: qupv3_se8_i2c_sleep { |
| mux { |
| pins = "gpio65", "gpio66"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio65", "gpio66"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se8_spi_pins: qupv3_se8_spi_pins { |
| qupv3_se8_spi_active: qupv3_se8_spi_active { |
| mux { |
| pins = "gpio65", "gpio66", "gpio67", |
| "gpio68"; |
| function = "qup8"; |
| }; |
| |
| config { |
| pins = "gpio65", "gpio66", "gpio67", |
| "gpio68"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se8_spi_sleep: qupv3_se8_spi_sleep { |
| mux { |
| pins = "gpio65", "gpio66", "gpio67", |
| "gpio68"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio65", "gpio66", "gpio67", |
| "gpio68"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 9 pin mappings */ |
| qupv3_se9_i2c_pins: qupv3_se9_i2c_pins { |
| qupv3_se9_i2c_active: qupv3_se9_i2c_active { |
| mux { |
| pins = "gpio6", "gpio7"; |
| function = "qup9"; |
| }; |
| |
| config { |
| pins = "gpio6", "gpio7"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se9_i2c_sleep: qupv3_se9_i2c_sleep { |
| mux { |
| pins = "gpio6", "gpio7"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio6", "gpio7"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se9_2uart_pins: qupv3_se9_2uart_pins { |
| qupv3_se9_2uart_active: qupv3_se9_2uart_active { |
| mux { |
| pins = "gpio4", "gpio5"; |
| function = "qup9"; |
| }; |
| |
| config { |
| pins = "gpio4", "gpio5"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se9_2uart_sleep: qupv3_se9_2uart_sleep { |
| mux { |
| pins = "gpio4", "gpio5"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio4", "gpio5"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| qupv3_se9_spi_pins: qupv3_se9_spi_pins { |
| qupv3_se9_spi_active: qupv3_se9_spi_active { |
| mux { |
| pins = "gpio4", "gpio5", "gpio6", |
| "gpio7"; |
| function = "qup9"; |
| }; |
| |
| config { |
| pins = "gpio4", "gpio5", "gpio6", |
| "gpio7"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se9_spi_sleep: qupv3_se9_spi_sleep { |
| mux { |
| pins = "gpio4", "gpio5", "gpio6", |
| "gpio7"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio4", "gpio5", "gpio6", |
| "gpio7"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 10 pin mappings */ |
| qupv3_se10_i2c_pins: qupv3_se10_i2c_pins { |
| qupv3_se10_i2c_active: qupv3_se10_i2c_active { |
| mux { |
| pins = "gpio55", "gpio56"; |
| function = "qup10"; |
| }; |
| |
| config { |
| pins = "gpio55", "gpio56"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se10_i2c_sleep: qupv3_se10_i2c_sleep { |
| mux { |
| pins = "gpio55", "gpio56"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio55", "gpio56"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se10_2uart_pins: qupv3_se10_2uart_pins { |
| qupv3_se10_2uart_active: qupv3_se10_2uart_active { |
| mux { |
| pins = "gpio53", "gpio54"; |
| function = "qup10"; |
| }; |
| |
| config { |
| pins = "gpio53", "gpio54"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se10_2uart_sleep: qupv3_se10_2uart_sleep { |
| mux { |
| pins = "gpio53", "gpio54"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio53", "gpio54"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| qupv3_se10_spi_pins: qupv3_se10_spi_pins { |
| qupv3_se10_spi_active: qupv3_se10_spi_active { |
| mux { |
| pins = "gpio53", "gpio54", "gpio55", |
| "gpio56"; |
| function = "qup10"; |
| }; |
| |
| config { |
| pins = "gpio53", "gpio54", "gpio55", |
| "gpio56"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se10_spi_sleep: qupv3_se10_spi_sleep { |
| mux { |
| pins = "gpio53", "gpio54", "gpio55", |
| "gpio56"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio53", "gpio54", "gpio55", |
| "gpio56"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 11 pin mappings */ |
| qupv3_se11_i2c_pins: qupv3_se11_i2c_pins { |
| qupv3_se11_i2c_active: qupv3_se11_i2c_active { |
| mux { |
| pins = "gpio31", "gpio32"; |
| function = "qup11"; |
| }; |
| |
| config { |
| pins = "gpio31", "gpio32"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se11_i2c_sleep: qupv3_se11_i2c_sleep { |
| mux { |
| pins = "gpio31", "gpio32"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio31", "gpio32"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se11_spi_pins: qupv3_se11_spi_pins { |
| qupv3_se11_spi_active: qupv3_se11_spi_active { |
| mux { |
| pins = "gpio31", "gpio32", "gpio33", |
| "gpio34"; |
| function = "qup11"; |
| }; |
| |
| config { |
| pins = "gpio31", "gpio32", "gpio33", |
| "gpio34"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se11_spi_sleep: qupv3_se11_spi_sleep { |
| mux { |
| pins = "gpio31", "gpio32", "gpio33", |
| "gpio34"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio31", "gpio32", "gpio33", |
| "gpio34"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 12 pin mappings */ |
| qupv3_se12_i2c_pins: qupv3_se12_i2c_pins { |
| qupv3_se12_i2c_active: qupv3_se12_i2c_active { |
| mux { |
| pins = "gpio49", "gpio50"; |
| function = "qup12"; |
| }; |
| |
| config { |
| pins = "gpio49", "gpio50"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se12_i2c_sleep: qupv3_se12_i2c_sleep { |
| mux { |
| pins = "gpio49", "gpio50"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio49", "gpio50"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se12_spi_pins: qupv3_se12_spi_pins { |
| qupv3_se12_spi_active: qupv3_se12_spi_active { |
| mux { |
| pins = "gpio49", "gpio50", "gpio51", |
| "gpio52"; |
| function = "qup12"; |
| }; |
| |
| config { |
| pins = "gpio49", "gpio50", "gpio51", |
| "gpio52"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se12_spi_sleep: qupv3_se12_spi_sleep { |
| mux { |
| pins = "gpio49", "gpio50", "gpio51", |
| "gpio52"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio49", "gpio50", "gpio51", |
| "gpio52"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 13 pin mappings */ |
| qupv3_se13_i2c_pins: qupv3_se13_i2c_pins { |
| qupv3_se13_i2c_active: qupv3_se13_i2c_active { |
| mux { |
| pins = "gpio105", "gpio106"; |
| function = "qup13"; |
| }; |
| |
| config { |
| pins = "gpio105", "gpio106"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se13_i2c_sleep: qupv3_se13_i2c_sleep { |
| mux { |
| pins = "gpio105", "gpio106"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio105", "gpio106"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se13_spi_pins: qupv3_se13_spi_pins { |
| qupv3_se13_spi_active: qupv3_se13_spi_active { |
| mux { |
| pins = "gpio105", "gpio106", "gpio107", |
| "gpio108"; |
| function = "qup13"; |
| }; |
| |
| config { |
| pins = "gpio105", "gpio106", "gpio107", |
| "gpio108"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se13_spi_sleep: qupv3_se13_spi_sleep { |
| mux { |
| pins = "gpio105", "gpio106", "gpio107", |
| "gpio108"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio105", "gpio106", "gpio107", |
| "gpio108"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 14 pin mappings */ |
| qupv3_se14_i2c_pins: qupv3_se14_i2c_pins { |
| qupv3_se14_i2c_active: qupv3_se14_i2c_active { |
| mux { |
| pins = "gpio33", "gpio34"; |
| function = "qup14"; |
| }; |
| |
| config { |
| pins = "gpio33", "gpio34"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se14_i2c_sleep: qupv3_se14_i2c_sleep { |
| mux { |
| pins = "gpio33", "gpio34"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio33", "gpio34"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se14_spi_pins: qupv3_se14_spi_pins { |
| qupv3_se14_spi_active: qupv3_se14_spi_active { |
| mux { |
| pins = "gpio31", "gpio32", "gpio33", |
| "gpio34"; |
| function = "qup14"; |
| }; |
| |
| config { |
| pins = "gpio31", "gpio32", "gpio33", |
| "gpio34"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se14_spi_sleep: qupv3_se14_spi_sleep { |
| mux { |
| pins = "gpio31", "gpio32", "gpio33", |
| "gpio34"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio31", "gpio32", "gpio33", |
| "gpio34"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 15 pin mappings */ |
| qupv3_se15_i2c_pins: qupv3_se15_i2c_pins { |
| qupv3_se15_i2c_active: qupv3_se15_i2c_active { |
| mux { |
| pins = "gpio81", "gpio82"; |
| function = "qup15"; |
| }; |
| |
| config { |
| pins = "gpio81", "gpio82"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se15_i2c_sleep: qupv3_se15_i2c_sleep { |
| mux { |
| pins = "gpio81", "gpio82"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio81", "gpio82"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se15_spi_pins: qupv3_se15_spi_pins { |
| qupv3_se15_spi_active: qupv3_se15_spi_active { |
| mux { |
| pins = "gpio81", "gpio82", "gpio83", |
| "gpio84"; |
| function = "qup15"; |
| }; |
| |
| config { |
| pins = "gpio81", "gpio82", "gpio83", |
| "gpio84"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se15_spi_sleep: qupv3_se15_spi_sleep { |
| mux { |
| pins = "gpio81", "gpio82", "gpio83", |
| "gpio84"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio81", "gpio82", "gpio83", |
| "gpio84"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| cci0_active: cci0_active { |
| mux { |
| /* CLK, DATA */ |
| pins = "gpio17","gpio18"; // Only 2 |
| function = "cci_i2c"; |
| }; |
| |
| config { |
| pins = "gpio17","gpio18"; |
| bias-pull-up; /* PULL UP*/ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cci0_suspend: cci0_suspend { |
| mux { |
| /* CLK, DATA */ |
| pins = "gpio17","gpio18"; |
| function = "cci_i2c"; |
| }; |
| |
| config { |
| pins = "gpio17","gpio18"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cci1_active: cci1_active { |
| mux { |
| /* CLK, DATA */ |
| pins = "gpio19","gpio20"; |
| function = "cci_i2c"; |
| }; |
| |
| config { |
| pins = "gpio19","gpio20"; |
| bias-pull-up; /* PULL UP*/ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cci1_suspend: cci1_suspend { |
| mux { |
| /* CLK, DATA */ |
| pins = "gpio19","gpio20"; |
| function = "cci_i2c"; |
| }; |
| |
| config { |
| pins = "gpio19","gpio20"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_fisheye_active: cam_sensor_fisheye_active { |
| /* RESET, AVDD LO */ |
| mux { |
| pins = "gpio76","gpio75"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio76","gpio75"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_fisheye_suspend: cam_sensor_fisheye_suspend { |
| /* RESET, AVDD LO*/ |
| mux { |
| pins = "gpio76","gpio75"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio76","gpio75"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <2>; /* 2 MA */ |
| output-low; |
| }; |
| }; |
| |
| cam_sensor_depth_active: cam_sensor_depth_active { |
| /* RESET,AVDD LO ,IMG_START, ILLU_EN */ |
| mux { |
| pins = "gpio28","gpio23","gpio24"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio28","gpio23","gpio24"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_depth_suspend: cam_sensor_depth_suspend { |
| /* RESET, AVDD LO ,IMG_START, ILLU_EN */ |
| mux { |
| pins = "gpio28","gpio23","gpio24"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio28","gpio23","gpio24"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| max_rst_active: max_rst_active { |
| /* RESET */ |
| mux { |
| pins = "gpio31","gpio77","gpio78","gpio32"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio31","gpio77","gpio78","gpio32"; |
| bias-disable; /* No PULL */ |
| drive-strength = <8>; /* 2 MA */ |
| }; |
| }; |
| |
| max_rst_suspend: max_rst_suspend { |
| /* RESET */ |
| mux { |
| pins = "gpio31","gpio77","gpio78","gpio32"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio31","gpio77","gpio78","gpio32"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <8>; /* 2 MA */ |
| }; |
| }; |
| |
| max_6dof_active: max_6dof_active { |
| /* RESET */ |
| mux { |
| pins = "gpio30","gpio95","gpio94"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio30","gpio95","gpio94"; |
| bias-disable; /* No PULL */ |
| drive-strength = <8>; /* 2 MA */ |
| }; |
| }; |
| |
| max_6dof_suspend: max_6dof_suspend { |
| /* RESET */ |
| mux { |
| pins = "gpio30","gpio95","gpio94"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio30","gpio95","gpio94"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <8>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_mclk0_active: cam_sensor_mclk0_active { |
| /* MCLK0 */ |
| mux { |
| pins = "gpio13"; |
| function = "cam_mclk"; |
| }; |
| |
| config { |
| pins = "gpio13"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_mclk0_suspend: cam_sensor_mclk0_suspend { |
| /* MCLK0 */ |
| mux { |
| pins = "gpio13"; |
| function = "cam_mclk"; |
| }; |
| |
| config { |
| pins = "gpio13"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_rear_active: cam_sensor_rear_active { |
| /* RESET, AVDD LDO */ |
| mux { |
| pins = "gpio80","gpio79"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio80","gpio79"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_rear_suspend: cam_sensor_rear_suspend { |
| /* RESET, AVDD LDO */ |
| mux { |
| pins = "gpio80","gpio79"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio80","gpio79"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <2>; /* 2 MA */ |
| output-low; |
| }; |
| }; |
| |
| cam_sensor_mclk1_active: cam_sensor_mclk1_active { |
| /* MCLK1 */ |
| mux { |
| pins = "gpio14"; |
| function = "cam_mclk"; |
| }; |
| |
| config { |
| pins = "gpio14"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_mclk1_suspend: cam_sensor_mclk1_suspend { |
| /* MCLK1 */ |
| mux { |
| pins = "gpio14"; |
| function = "cam_mclk"; |
| }; |
| |
| config { |
| pins = "gpio14"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_mclk3_active: cam_sensor_mclk3_active { |
| /* MCLK3 */ |
| mux { |
| pins = "gpio16"; |
| function = "cam_mclk"; |
| }; |
| |
| config { |
| pins = "gpio16"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_mclk3_suspend: cam_sensor_mclk3_suspend { |
| /* MCLK3 */ |
| mux { |
| pins = "gpio16"; |
| function = "cam_mclk"; |
| }; |
| |
| config { |
| pins = "gpio16"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| |
| cam_sensor_front_active: cam_sensor_front_active { |
| /* RESET AVDD_LDO*/ |
| mux { |
| pins = "gpio28"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio28"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_front_suspend: cam_sensor_front_suspend { |
| /* RESET */ |
| mux { |
| pins = "gpio28"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio28"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <2>; /* 2 MA */ |
| output-low; |
| }; |
| }; |
| |
| cam_sensor_iris_active: cam_sensor_iris_active { |
| /* RESET AVDD_LDO*/ |
| mux { |
| pins = "gpio9"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio9"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_iris_suspend: cam_sensor_iris_suspend { |
| /* RESET */ |
| mux { |
| pins = "gpio9"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio9"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <2>; /* 2 MA */ |
| output-low; |
| }; |
| }; |
| |
| |
| cam_sensor_mclk2_active: cam_sensor_mclk2_active { |
| /* MCLK1 */ |
| mux { |
| /* CLK, DATA */ |
| pins = "gpio15"; |
| function = "cam_mclk"; |
| }; |
| |
| config { |
| pins = "gpio15"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_mclk2_suspend: cam_sensor_mclk2_suspend { |
| /* MCLK1 */ |
| mux { |
| /* CLK, DATA */ |
| pins = "gpio15"; |
| function = "cam_mclk"; |
| }; |
| |
| config { |
| pins = "gpio15"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_rear2_active: cam_sensor_rear2_active { |
| /* RESET, STANDBY */ |
| mux { |
| pins = "gpio9"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio9"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_rear2_suspend: cam_sensor_rear2_suspend { |
| /* RESET, STANDBY */ |
| mux { |
| pins = "gpio9"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio9"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <2>; /* 2 MA */ |
| output-low; |
| }; |
| }; |
| |
| cam_sensor_rear_vana: cam_sensor_rear_vana { |
| /* AVDD LDO */ |
| mux { |
| pins = "gpio8"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio8"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_res_mgr_active: cam_res_mgr_active { |
| /* AVDD_LDO*/ |
| mux { |
| pins = "gpio8"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio8"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_res_mgr_suspend: cam_res_mgr_suspend { |
| /* AVDD_LDO */ |
| mux { |
| pins = "gpio8"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio8"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| output-low; |
| }; |
| }; |
| |
| trigout_a: trigout_a { |
| mux { |
| pins = "gpio90"; |
| function = "qdss_cti"; |
| }; |
| config { |
| pins = "gpio90"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| tsif0_signals_active: tsif0_signals_active { |
| tsif1_clk { |
| pins = "gpio89"; /* TSIF0 CLK */ |
| function = "tsif1_clk"; |
| }; |
| tsif1_en { |
| pins = "gpio90"; /* TSIF0 Enable */ |
| function = "tsif1_en"; |
| }; |
| tsif1_data { |
| pins = "gpio91"; /* TSIF0 DATA */ |
| function = "tsif1_data"; |
| }; |
| signals_cfg { |
| pins = "gpio89", "gpio90", "gpio91"; |
| drive_strength = <2>; /* 2 mA */ |
| bias-pull-down; /* pull down */ |
| }; |
| }; |
| |
| /* sync signal is only used if configured to mode-2 */ |
| tsif0_sync_active: tsif0_sync_active { |
| tsif1_sync { |
| pins = "gpio12"; /* TSIF0 SYNC */ |
| function = "tsif1_sync"; |
| drive_strength = <2>; /* 2 mA */ |
| bias-pull-down; /* pull down */ |
| }; |
| }; |
| |
| tsif1_signals_active: tsif1_signals_active { |
| tsif2_clk { |
| pins = "gpio93"; /* TSIF1 CLK */ |
| function = "tsif2_clk"; |
| }; |
| tsif2_en { |
| pins = "gpio94"; /* TSIF1 Enable */ |
| function = "tsif2_en"; |
| }; |
| tsif2_data { |
| pins = "gpio95"; /* TSIF1 DATA */ |
| function = "tsif2_data"; |
| }; |
| signals_cfg { |
| pins = "gpio93", "gpio94", "gpio95"; |
| drive_strength = <2>; /* 2 mA */ |
| bias-pull-down; /* pull down */ |
| }; |
| }; |
| |
| /* sync signal is only used if configured to mode-2 */ |
| tsif1_sync_active: tsif1_sync_active { |
| tsif2_sync { |
| pins = "gpio96"; /* TSIF1 SYNC */ |
| function = "tsif2_sync"; |
| drive_strength = <2>; /* 2 mA */ |
| bias-pull-down; /* pull down */ |
| }; |
| }; |
| |
| ap2mdm { |
| ap2mdm_active: ap2mdm_active { |
| mux { |
| /* ap2mdm-status |
| * ap2mdm-errfatal |
| * ap2mdm-vddmin |
| */ |
| pins = "gpio21", "gpio23"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio21", "gpio23"; |
| drive-strength = <16>; |
| bias-disable; |
| }; |
| }; |
| ap2mdm_sleep: ap2mdm_sleep { |
| mux { |
| /* ap2mdm-status |
| * ap2mdm-errfatal |
| * ap2mdm-vddmin |
| */ |
| pins = "gpio21", "gpio23"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio21", "gpio23"; |
| drive-strength = <8>; |
| bias-disable; |
| }; |
| |
| }; |
| }; |
| |
| mdm2ap { |
| mdm2ap_active: mdm2ap_active { |
| mux { |
| /* mdm2ap-status |
| * mdm2ap-errfatal |
| * mdm2ap-vddmin |
| */ |
| pins = "gpio22", "gpio20"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio22", "gpio20"; |
| drive-strength = <8>; |
| bias-disable; |
| }; |
| }; |
| mdm2ap_sleep: mdm2ap_sleep { |
| mux { |
| /* mdm2ap-status |
| * mdm2ap-errfatal |
| * mdm2ap-vddmin |
| */ |
| pins = "gpio22", "gpio20"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio22", "gpio20"; |
| drive-strength = <8>; |
| bias-disable; |
| }; |
| }; |
| }; |
| }; |
| }; |
| |
| &pm8998_gpios { |
| key_home { |
| key_home_default: key_home_default { |
| pins = "gpio5"; |
| function = "normal"; |
| input-enable; |
| bias-pull-up; |
| power-source = <0>; |
| }; |
| }; |
| |
| led_bt { |
| led_bt_default: led_bt_default { |
| pins = "gpio5"; |
| function = "normal"; |
| power-source = <0>; |
| output-low; |
| }; |
| }; |
| |
| key_vol_up { |
| key_vol_up_default: key_vol_up_default { |
| pins = "gpio6"; |
| function = "normal"; |
| input-enable; |
| bias-pull-up; |
| power-source = <0>; |
| }; |
| }; |
| |
| key_cam_snapshot { |
| key_cam_snapshot_default: key_cam_snapshot_default { |
| pins = "gpio7"; |
| function = "normal"; |
| input-enable; |
| bias-pull-up; |
| power-source = <0>; |
| }; |
| }; |
| |
| key_cam_focus { |
| key_cam_focus_default: key_cam_focus_default { |
| pins = "gpio8"; |
| function = "normal"; |
| input-enable; |
| bias-pull-up; |
| power-source = <0>; |
| }; |
| }; |
| |
| led_wifi { |
| led_wifi_default: led_wifi_default { |
| pins = "gpio9"; |
| function = "normal"; |
| power-source = <0>; |
| output-low; |
| }; |
| }; |
| |
| camera_dvdd_en { |
| camera_dvdd_en_default: camera_dvdd_en_default { |
| pins = "gpio9"; |
| function = "normal"; |
| power-source = <0>; |
| output-low; |
| }; |
| }; |
| |
| camera_rear_avdd_en { |
| camera_rear_avdd_en_default: camera_rear_avdd_en_default { |
| pins = "gpio10"; |
| function = "normal"; |
| power-source = <0>; |
| output-low; |
| }; |
| }; |
| |
| camera_rear_dvdd_en { |
| camera_rear_dvdd_en_default: camera_rear_dvdd_en_default { |
| pins = "gpio12"; |
| function = "normal"; |
| power-source = <0>; |
| output-low; |
| }; |
| }; |
| |
| nfc_clk { |
| nfc_clk_default: nfc_clk_default { |
| pins = "gpio21"; |
| function = "normal"; |
| input-enable; |
| power-source = <1>; |
| }; |
| }; |
| }; |