blob: 86320c349e75fb437a21c6d86e7f0c0e48732653 [file] [log] [blame]
zhaochenaf8cd372019-04-17 09:53:59 +08001/* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
Kyle Yan679cbee2016-07-27 16:55:20 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13&soc {
Channagoud Kadabieb7f0112017-04-03 20:39:27 -070014 tlmm: pinctrl@03400000 {
Kyle Yan6a20fae2017-02-14 13:34:41 -080015 compatible = "qcom,sdm845-pinctrl";
Raghavendra Kakarla6f0efce2018-08-14 16:19:14 +053016 reg = <0x03400000 0xc00000>, <0x179900F0 0x60>;
17 reg-names = "pinctrl_regs", "spi_cfg_regs";
Kyle Yan679cbee2016-07-27 16:55:20 -070018 interrupts = <0 208 0>;
19 gpio-controller;
20 #gpio-cells = <2>;
21 interrupt-controller;
22 #interrupt-cells = <2>;
Archana Sathyakumar00a36ab2017-03-03 14:38:26 -070023 interrupt-parent = <&pdc>;
Banajit Goswamib016de92017-02-15 21:02:30 -080024
Subhash Jadavaniafe2a792017-03-31 21:08:29 -070025 ufs_dev_reset_assert: ufs_dev_reset_assert {
26 config {
27 pins = "ufs_reset";
28 bias-pull-down; /* default: pull down */
29 /*
30 * UFS_RESET driver strengths are having
31 * different values/steps compared to typical
32 * GPIO drive strengths.
33 *
34 * Following table clarifies:
35 *
36 * HDRV value | UFS_RESET | Typical GPIO
37 * (dec) | (mA) | (mA)
38 * 0 | 0.8 | 2
39 * 1 | 1.55 | 4
40 * 2 | 2.35 | 6
41 * 3 | 3.1 | 8
42 * 4 | 3.9 | 10
43 * 5 | 4.65 | 12
44 * 6 | 5.4 | 14
45 * 7 | 6.15 | 16
46 *
47 * POR value for UFS_RESET HDRV is 3 which means
48 * 3.1mA and we want to use that. Hence just
49 * specify 8mA to "drive-strength" binding and
50 * that should result into writing 3 to HDRV
51 * field.
52 */
53 drive-strength = <8>; /* default: 3.1 mA */
54 output-low; /* active low reset */
55 };
56 };
57
58 ufs_dev_reset_deassert: ufs_dev_reset_deassert {
59 config {
60 pins = "ufs_reset";
61 bias-pull-down; /* default: pull down */
62 /*
63 * default: 3.1 mA
64 * check comments under ufs_dev_reset_assert
65 */
66 drive-strength = <8>;
67 output-high; /* active low reset */
68 };
69 };
70
Subbaraman Narayanamurthycd21c812017-03-30 18:36:49 -070071 flash_led3_front {
72 flash_led3_front_en: flash_led3_front_en {
73 mux {
74 pins = "gpio21";
Subbaraman Narayanamurthy58377f02017-03-21 20:38:43 -070075 function = "gpio";
76 };
77
78 config {
79 pins = "gpio21";
Subbaraman Narayanamurthycd21c812017-03-30 18:36:49 -070080 drive_strength = <2>;
81 output-high;
Subbaraman Narayanamurthy58377f02017-03-21 20:38:43 -070082 bias-disable;
Subbaraman Narayanamurthycd21c812017-03-30 18:36:49 -070083 };
84 };
85
86 flash_led3_front_dis: flash_led3_front_dis {
87 mux {
88 pins = "gpio21";
Subbaraman Narayanamurthy58377f02017-03-21 20:38:43 -070089 function = "gpio";
90 };
91
92 config {
93 pins = "gpio21";
Subbaraman Narayanamurthycd21c812017-03-30 18:36:49 -070094 drive_strength = <2>;
95 output-low;
Subbaraman Narayanamurthy58377f02017-03-21 20:38:43 -070096 bias-disable;
Subbaraman Narayanamurthycd21c812017-03-30 18:36:49 -070097 };
98 };
99 };
Subhash Jadavaniafe2a792017-03-31 21:08:29 -0700100
Jilai Wangf4d78a22017-11-10 17:05:47 -0500101 flash_led3_iris {
102 flash_led3_iris_en: flash_led3_iris_en {
103 mux {
104 pins = "gpio23";
105 function = "gpio";
106 };
107
108 config {
109 pins = "gpio23";
110 drive_strength = <2>;
111 output-high;
112 bias-disable;
113 };
114 };
115
116 flash_led3_iris_dis: flash_led3_iris_dis {
117 mux {
118 pins = "gpio23";
119 function = "gpio";
120 };
121
122 config {
123 pins = "gpio23";
124 drive_strength = <2>;
125 output-low;
126 bias-disable;
127 };
128 };
129 };
130
131
Banajit Goswamib016de92017-02-15 21:02:30 -0800132 wcd9xxx_intr {
133 wcd_intr_default: wcd_intr_default{
134 mux {
135 pins = "gpio54";
136 function = "gpio";
137 };
138
139 config {
140 pins = "gpio54";
141 drive-strength = <2>; /* 2 mA */
142 bias-pull-down; /* pull down */
143 input-enable;
144 };
145 };
146 };
147
Subhash Jadavanidd416c42017-05-15 11:54:10 -0700148 storage_cd: storage_cd {
149 mux {
150 pins = "gpio126";
151 function = "gpio";
152 };
153
154 config {
155 pins = "gpio126";
156 bias-pull-up; /* pull up */
157 drive-strength = <2>; /* 2 MA */
158 };
159 };
160
Xiaonian Wang898e0902017-04-08 06:46:29 +0800161 sdc2_clk_on: sdc2_clk_on {
162 config {
163 pins = "sdc2_clk";
164 bias-disable; /* NO pull */
165 drive-strength = <16>; /* 16 MA */
166 };
167 };
168
169 sdc2_clk_off: sdc2_clk_off {
170 config {
171 pins = "sdc2_clk";
172 bias-disable; /* NO pull */
173 drive-strength = <2>; /* 2 MA */
174 };
175 };
176
Can Guo45ebef02017-10-17 13:21:37 +0800177 sdc2_clk_ds_400KHz: sdc2_clk_ds_400KHz {
178 config {
179 pins = "sdc2_clk";
180 bias-disable; /* NO pull */
181 drive-strength = <16>; /* 16 MA */
182 };
183 };
184
185 sdc2_clk_ds_50MHz: sdc2_clk_ds_50MHz {
186 config {
187 pins = "sdc2_clk";
188 bias-disable; /* NO pull */
189 drive-strength = <16>; /* 16 MA */
190 };
191 };
192
193 sdc2_clk_ds_100MHz: sdc2_clk_ds_100MHz {
194 config {
195 pins = "sdc2_clk";
196 bias-disable; /* NO pull */
197 drive-strength = <16>; /* 16 MA */
198 };
199 };
200
201 sdc2_clk_ds_200MHz: sdc2_clk_ds_200MHz {
202 config {
203 pins = "sdc2_clk";
204 bias-disable; /* NO pull */
205 drive-strength = <16>; /* 16 MA */
206 };
207 };
208
Xiaonian Wang898e0902017-04-08 06:46:29 +0800209 sdc2_cmd_on: sdc2_cmd_on {
210 config {
211 pins = "sdc2_cmd";
212 bias-pull-up; /* pull up */
213 drive-strength = <10>; /* 10 MA */
214 };
215 };
216
217 sdc2_cmd_off: sdc2_cmd_off {
218 config {
219 pins = "sdc2_cmd";
220 bias-pull-up; /* pull up */
221 drive-strength = <2>; /* 2 MA */
222 };
223 };
224
Can Guo45ebef02017-10-17 13:21:37 +0800225 sdc2_cmd_ds_400KHz: sdc2_cmd_ds_400KHz {
226 config {
227 pins = "sdc2_cmd";
228 bias-pull-up; /* pull up */
229 drive-strength = <10>; /* 10 MA */
230 };
231 };
232
233 sdc2_cmd_ds_50MHz: sdc2_cmd_ds_50MHz {
234 config {
235 pins = "sdc2_cmd";
236 bias-pull-up; /* pull up */
237 drive-strength = <10>; /* 10 MA */
238 };
239 };
240
241 sdc2_cmd_ds_100MHz: sdc2_cmd_ds_100MHz {
242 config {
243 pins = "sdc2_cmd";
244 bias-pull-up; /* pull up */
245 drive-strength = <10>; /* 10 MA */
246 };
247 };
248
249 sdc2_cmd_ds_200MHz: sdc2_cmd_ds_200MHz {
250 config {
251 pins = "sdc2_cmd";
252 bias-pull-up; /* pull up */
253 drive-strength = <10>; /* 10 MA */
254 };
255 };
256
Xiaonian Wang898e0902017-04-08 06:46:29 +0800257 sdc2_data_on: sdc2_data_on {
258 config {
259 pins = "sdc2_data";
260 bias-pull-up; /* pull up */
261 drive-strength = <10>; /* 10 MA */
262 };
263 };
264
265 sdc2_data_off: sdc2_data_off {
266 config {
267 pins = "sdc2_data";
268 bias-pull-up; /* pull up */
269 drive-strength = <2>; /* 2 MA */
270 };
271 };
272
Can Guo45ebef02017-10-17 13:21:37 +0800273 sdc2_data_ds_400KHz: sdc2_data_ds_400KHz {
274 config {
275 pins = "sdc2_data";
276 bias-pull-up; /* pull up */
277 drive-strength = <10>; /* 10 MA */
278 };
279 };
280
281 sdc2_data_ds_50MHz: sdc2_data_ds_50MHz {
282 config {
283 pins = "sdc2_data";
284 bias-pull-up; /* pull up */
285 drive-strength = <10>; /* 10 MA */
286 };
287 };
288
289 sdc2_data_ds_100MHz: sdc2_data_ds_100MHz {
290 config {
291 pins = "sdc2_data";
292 bias-pull-up; /* pull up */
293 drive-strength = <10>; /* 10 MA */
294 };
295 };
296
297 sdc2_data_ds_200MHz: sdc2_data_ds_200MHz {
298 config {
299 pins = "sdc2_data";
300 bias-pull-up; /* pull up */
301 drive-strength = <10>; /* 10 MA */
302 };
303 };
304
Tony Truongc0e0a5f02017-03-15 11:57:40 -0700305 pcie0 {
306 pcie0_clkreq_default: pcie0_clkreq_default {
307 mux {
308 pins = "gpio36";
309 function = "pci_e0";
310 };
311
312 config {
313 pins = "gpio36";
314 drive-strength = <2>;
315 bias-pull-up;
316 };
317 };
318
319 pcie0_perst_default: pcie0_perst_default {
320 mux {
321 pins = "gpio35";
322 function = "gpio";
323 };
324
325 config {
326 pins = "gpio35";
327 drive-strength = <2>;
328 bias-pull-down;
329 };
330 };
331
332 pcie0_wake_default: pcie0_wake_default {
333 mux {
334 pins = "gpio37";
335 function = "gpio";
336 };
337
338 config {
339 pins = "gpio37";
340 drive-strength = <2>;
Tony Truong299dda12017-09-12 14:32:44 -0700341 bias-pull-up;
Tony Truongc0e0a5f02017-03-15 11:57:40 -0700342 };
343 };
zhaochenaf8cd372019-04-17 09:53:59 +0800344
345 pcie0_3v3_on: pcie0_3v3_on {
346 mux {
347 pins = "gpio90";
348 function = "gpio";
349 };
350 config {
351 pins = "gpio90";
352 drive_strength = <2>;
353 bias-disable;
354 output-high;
355 };
356 };
357
358 pcie0_1v5_on: pcie0_1v5_on {
359 mux {
360 pins = "gpio90";
361 function = "gpio";
362 };
363 config {
364 pins = "gpio90";
365 drive_strength = <2>;
366 bias-disable;
367 output-high;
368 };
369 };
Tony Truongc0e0a5f02017-03-15 11:57:40 -0700370 };
371
Tony Truong16938352017-05-04 13:39:24 -0700372 pcie1 {
373 pcie1_clkreq_default: pcie1_clkreq_default {
374 mux {
375 pins = "gpio103";
376 function = "pci_e1";
377 };
378
379 config {
380 pins = "gpio103";
381 drive-strength = <2>;
382 bias-pull-up;
383 };
384 };
385
386 pcie1_perst_default: pcie1_perst_default {
387 mux {
388 pins = "gpio102";
389 function = "gpio";
390 };
391
392 config {
393 pins = "gpio102";
394 drive-strength = <2>;
395 bias-pull-down;
396 };
397 };
398
399 pcie1_wake_default: pcie1_wake_default {
400 mux {
401 pins = "gpio104";
402 function = "gpio";
403 };
404
405 config {
406 pins = "gpio104";
407 drive-strength = <2>;
408 bias-pull-down;
409 };
410 };
411 };
412
Banajit Goswamib016de92017-02-15 21:02:30 -0800413 cdc_reset_ctrl {
414 cdc_reset_sleep: cdc_reset_sleep {
415 mux {
416 pins = "gpio64";
417 function = "gpio";
418 };
419 config {
420 pins = "gpio64";
421 drive-strength = <2>;
422 bias-disable;
423 output-low;
424 };
425 };
426
427 cdc_reset_active:cdc_reset_active {
428 mux {
429 pins = "gpio64";
430 function = "gpio";
431 };
432 config {
433 pins = "gpio64";
434 drive-strength = <8>;
435 bias-pull-down;
436 output-high;
437 };
438 };
439 };
440
441 spkr_i2s_clk_pin {
442 spkr_i2s_clk_sleep: spkr_i2s_clk_sleep {
443 mux {
444 pins = "gpio69";
445 function = "spkr_i2s";
446 };
447
448 config {
449 pins = "gpio69";
450 drive-strength = <2>; /* 2 mA */
451 bias-pull-down; /* PULL DOWN */
452 };
453 };
454
455 spkr_i2s_clk_active: spkr_i2s_clk_active {
456 mux {
457 pins = "gpio69";
458 function = "spkr_i2s";
459 };
460
461 config {
462 pins = "gpio69";
463 drive-strength = <8>; /* 8 mA */
464 bias-disable; /* NO PULL */
465 };
466 };
467 };
468
469 wcd_gnd_mic_swap {
470 wcd_gnd_mic_swap_idle: wcd_gnd_mic_swap_idle {
471 mux {
472 pins = "gpio51";
473 function = "gpio";
474 };
475 config {
476 pins = "gpio51";
477 drive-strength = <2>;
478 bias-pull-down;
479 output-low;
480 };
481 };
482
483 wcd_gnd_mic_swap_active: wcd_gnd_mic_swap_active {
484 mux {
485 pins = "gpio51";
486 function = "gpio";
487 };
488 config {
489 pins = "gpio51";
490 drive-strength = <2>;
491 bias-disable;
492 output-high;
493 };
494 };
495 };
496
Karthikeyan Mani5bce47c2017-05-26 15:19:04 -0700497 /* USB C analog configuration */
498 wcd_usbc_analog_en1 {
499 wcd_usbc_analog_en1_idle: wcd_usbc_ana_en1_idle {
500 mux {
501 pins = "gpio49";
502 function = "gpio";
503 };
504 config {
505 pins = "gpio49";
506 drive-strength = <2>;
507 bias-pull-down;
508 output-low;
509 };
510 };
511
512 wcd_usbc_analog_en1_active: wcd_usbc_ana_en1_active {
513 mux {
514 pins = "gpio49";
515 function = "gpio";
516 };
517 config {
518 pins = "gpio49";
519 drive-strength = <2>;
520 bias-disable;
521 output-high;
522 };
523 };
524 };
525
526 wcd_usbc_analog_en2 {
527 wcd_usbc_analog_en2_idle: wcd_usbc_ana_en2_idle {
528 mux {
529 pins = "gpio51";
530 function = "gpio";
531 };
532 config {
533 pins = "gpio51";
534 drive-strength = <2>;
535 bias-pull-down;
536 output-low;
537 };
538 };
539
540 wcd_usbc_analog_en2_active: wcd_usbc_ana_en2_active {
541 mux {
542 pins = "gpio51";
543 function = "gpio";
544 };
545 config {
546 pins = "gpio51";
547 drive-strength = <2>;
548 bias-disable;
549 output-high;
550 };
551 };
552 };
553
Banajit Goswamib016de92017-02-15 21:02:30 -0800554 pri_aux_pcm_clk {
555 pri_aux_pcm_clk_sleep: pri_aux_pcm_clk_sleep {
556 mux {
557 pins = "gpio65";
558 function = "gpio";
559 };
560
561 config {
562 pins = "gpio65";
563 drive-strength = <2>; /* 2 mA */
564 bias-pull-down; /* PULL DOWN */
565 input-enable;
566 };
567 };
568
569 pri_aux_pcm_clk_active: pri_aux_pcm_clk_active {
570 mux {
571 pins = "gpio65";
572 function = "pri_mi2s";
573 };
574
575 config {
576 pins = "gpio65";
577 drive-strength = <8>; /* 8 mA */
578 bias-disable; /* NO PULL */
579 output-high;
580 };
581 };
582 };
583
584 pri_aux_pcm_sync {
585 pri_aux_pcm_sync_sleep: pri_aux_pcm_sync_sleep {
586 mux {
587 pins = "gpio66";
588 function = "gpio";
589 };
590
591 config {
592 pins = "gpio66";
593 drive-strength = <2>; /* 2 mA */
594 bias-pull-down; /* PULL DOWN */
595 input-enable;
596 };
597 };
598
599 pri_aux_pcm_sync_active: pri_aux_pcm_sync_active {
600 mux {
601 pins = "gpio66";
602 function = "pri_mi2s_ws";
603 };
604
605 config {
606 pins = "gpio66";
607 drive-strength = <8>; /* 8 mA */
608 bias-disable; /* NO PULL */
609 output-high;
610 };
611 };
612 };
613
614 pri_aux_pcm_din {
615 pri_aux_pcm_din_sleep: pri_aux_pcm_din_sleep {
616 mux {
617 pins = "gpio67";
618 function = "gpio";
619 };
620
621 config {
622 pins = "gpio67";
623 drive-strength = <2>; /* 2 mA */
624 bias-pull-down; /* PULL DOWN */
625 input-enable;
626 };
627 };
628
629 pri_aux_pcm_din_active: pri_aux_pcm_din_active {
630 mux {
631 pins = "gpio67";
632 function = "pri_mi2s";
633 };
634
635 config {
636 pins = "gpio67";
637 drive-strength = <8>; /* 8 mA */
638 bias-disable; /* NO PULL */
639 };
640 };
641 };
642
643 pri_aux_pcm_dout {
644 pri_aux_pcm_dout_sleep: pri_aux_pcm_dout_sleep {
645 mux {
646 pins = "gpio68";
647 function = "gpio";
648 };
649
650 config {
651 pins = "gpio68";
652 drive-strength = <2>; /* 2 mA */
653 bias-pull-down; /* PULL DOWN */
654 input-enable;
655 };
656 };
657
658 pri_aux_pcm_dout_active: pri_aux_pcm_dout_active {
659 mux {
660 pins = "gpio68";
661 function = "pri_mi2s";
662 };
663
664 config {
665 pins = "gpio68";
666 drive-strength = <8>; /* 8 mA */
667 bias-disable; /* NO PULL */
668 };
669 };
670 };
671
Shashank Babu Chinta Venkata2f40bc72017-03-21 15:31:38 -0700672 pmx_sde: pmx_sde {
673 sde_dsi_active: sde_dsi_active {
674 mux {
675 pins = "gpio6", "gpio52";
676 function = "gpio";
677 };
678
679 config {
680 pins = "gpio6", "gpio52";
681 drive-strength = <8>; /* 8 mA */
682 bias-disable = <0>; /* no pull */
683 };
684 };
685 sde_dsi_suspend: sde_dsi_suspend {
686 mux {
687 pins = "gpio6", "gpio52";
688 function = "gpio";
689 };
690
691 config {
692 pins = "gpio6", "gpio52";
693 drive-strength = <2>; /* 2 mA */
694 bias-pull-down; /* PULL DOWN */
695 };
696 };
697 };
698
699 pmx_sde_te {
700 sde_te_active: sde_te_active {
701 mux {
702 pins = "gpio10";
703 function = "mdp_vsync";
704 };
705
706 config {
707 pins = "gpio10";
708 drive-strength = <2>; /* 2 mA */
709 bias-pull-down; /* PULL DOWN */
710 };
711 };
712
713 sde_te_suspend: sde_te_suspend {
714 mux {
715 pins = "gpio10";
716 function = "mdp_vsync";
717 };
718
719 config {
720 pins = "gpio10";
721 drive-strength = <2>; /* 2 mA */
722 bias-pull-down; /* PULL DOWN */
723 };
724 };
725 };
726
Padmanabhan Komanduru887085e2017-05-02 14:57:12 -0700727 sde_dp_aux_active: sde_dp_aux_active {
728 mux {
729 pins = "gpio43", "gpio51";
730 function = "gpio";
731 };
732
733 config {
734 pins = "gpio43", "gpio51";
735 bias-disable = <0>; /* no pull */
736 drive-strength = <8>;
737 };
738 };
739
740 sde_dp_aux_suspend: sde_dp_aux_suspend {
741 mux {
742 pins = "gpio43", "gpio51";
743 function = "gpio";
744 };
745
746 config {
747 pins = "gpio43", "gpio51";
748 bias-pull-down;
749 drive-strength = <2>;
750 };
751 };
752
753 sde_dp_usbplug_cc_active: sde_dp_usbplug_cc_active {
754 mux {
755 pins = "gpio38";
756 function = "gpio";
757 };
758
759 config {
760 pins = "gpio38";
761 bias-disable;
762 drive-strength = <16>;
763 };
764 };
765
766 sde_dp_usbplug_cc_suspend: sde_dp_usbplug_cc_suspend {
767 mux {
768 pins = "gpio38";
769 function = "gpio";
770 };
771
772 config {
773 pins = "gpio38";
774 bias-pull-down;
775 drive-strength = <2>;
776 };
777 };
778
Jin Fu9e861b92018-01-17 17:37:32 +0800779 /* add pingrp for touchscreen */
780 pmx_ts_int_active {
781 ts_int_active: ts_int_active {
782 mux {
783 pins = "gpio122";
784 function = "gpio";
785 };
786
787 config {
788 pins = "gpio122";
789 drive-strength = <8>;
790 bias-pull-up;
791 };
792 };
793 };
794
795 pmx_ts_int_suspend {
796 ts_int_suspend1: ts_int_suspend1 {
797 mux {
798 pins = "gpio122";
799 function = "gpio";
800 };
801
802 config {
803 pins = "gpio122";
804 drive-strength = <2>;
805 bias-pull-down;
806 };
807 };
808 };
809
810 pmx_ts_reset_active {
811 ts_reset_active: ts_reset_active {
812 mux {
813 pins = "gpio99";
814 function = "gpio";
815 };
816
817 config {
818 pins = "gpio99";
819 drive-strength = <8>;
820 bias-pull-up;
821 };
822 };
823 };
824
825 pmx_ts_reset_suspend {
826 ts_reset_suspend1: ts_reset_suspend1 {
827 mux {
828 pins = "gpio99";
829 function = "gpio";
830 };
831
832 config {
833 pins = "gpio99";
834 drive-strength = <2>;
835 bias-pull-down;
836 };
837 };
838 };
839
840 pmx_ts_release {
841 ts_release: ts_release {
842 mux {
843 pins = "gpio122", "gpio99";
844 function = "gpio";
845 };
846
847 config {
848 pins = "gpio122", "gpio99";
849 drive-strength = <2>;
850 bias-pull-down;
851 };
852 };
853 };
854
855 ts_mux {
856 ts_active: ts_active {
857 mux {
858 pins = "gpio99", "gpio122";
859 function = "gpio";
860 };
861
862 config {
863 pins = "gpio99", "gpio122";
864 drive-strength = <16>;
865 bias-pull-up;
866 };
867 };
868
869 ts_reset_suspend: ts_reset_suspend {
870 mux {
871 pins = "gpio99";
872 function = "gpio";
873 };
874
875 config {
876 pins = "gpio99";
877 drive-strength = <2>;
878 bias-pull-down;
879 };
880 };
881
882 ts_int_suspend: ts_int_suspend {
883 mux {
884 pins = "gpio122";
885 function = "gpio";
886 };
887
888 config {
889 pins = "gpio122";
890 drive-strength = <2>;
891 bias-disable;
892 };
893 };
894 };
895
Yuan Zhao4b058d02019-07-15 19:59:47 +0800896 ext_bridge_mux {
897 lt9611_pins: lt9611_pins {
898 mux {
899 pins = "gpio84", "gpio128", "gpio89";
900 function = "gpio";
901 };
902
903 config {
904 pins = "gpio84", "gpio128", "gpio89";
905 bias-disable = <0>; /* no pull */
906 drive-strength = <8>;
907 };
908 };
909 };
910
Banajit Goswamib016de92017-02-15 21:02:30 -0800911 sec_aux_pcm {
912 sec_aux_pcm_sleep: sec_aux_pcm_sleep {
913 mux {
914 pins = "gpio80", "gpio81";
915 function = "gpio";
916 };
917
918 config {
919 pins = "gpio80", "gpio81";
920 drive-strength = <2>; /* 2 mA */
921 bias-pull-down; /* PULL DOWN */
922 input-enable;
923 };
924 };
925
926 sec_aux_pcm_active: sec_aux_pcm_active {
927 mux {
928 pins = "gpio80", "gpio81";
929 function = "sec_mi2s";
930 };
931
932 config {
933 pins = "gpio80", "gpio81";
934 drive-strength = <8>; /* 8 mA */
935 bias-disable; /* NO PULL */
936 };
937 };
938 };
939
940 sec_aux_pcm_din {
941 sec_aux_pcm_din_sleep: sec_aux_pcm_din_sleep {
942 mux {
943 pins = "gpio82";
944 function = "gpio";
945 };
946
947 config {
948 pins = "gpio82";
949 drive-strength = <2>; /* 2 mA */
950 bias-pull-down; /* PULL DOWN */
951 input-enable;
952 };
953 };
954
955 sec_aux_pcm_din_active: sec_aux_pcm_din_active {
956 mux {
957 pins = "gpio82";
958 function = "sec_mi2s";
959 };
960
961 config {
962 pins = "gpio82";
963 drive-strength = <8>; /* 8 mA */
964 bias-disable; /* NO PULL */
965 };
966 };
967 };
968
969 sec_aux_pcm_dout {
970 sec_aux_pcm_dout_sleep: sec_aux_pcm_dout_sleep {
971 mux {
972 pins = "gpio83";
973 function = "gpio";
974 };
975
976 config {
977 pins = "gpio83";
978 drive-strength = <2>; /* 2 mA */
979 bias-pull-down; /* PULL DOWN */
980 input-enable;
981 };
982 };
983
984 sec_aux_pcm_dout_active: sec_aux_pcm_dout_active {
985 mux {
986 pins = "gpio83";
987 function = "sec_mi2s";
988 };
989
990 config {
991 pins = "gpio83";
992 drive-strength = <8>; /* 8 mA */
993 bias-disable; /* NO PULL */
994 };
995 };
996 };
997
998 tert_aux_pcm {
999 tert_aux_pcm_sleep: tert_aux_pcm_sleep {
1000 mux {
1001 pins = "gpio75", "gpio76";
1002 function = "gpio";
1003 };
1004
1005 config {
1006 pins = "gpio75", "gpio76";
1007 drive-strength = <2>; /* 2 mA */
1008 bias-pull-down; /* PULL DOWN */
1009 input-enable;
1010 };
1011 };
1012
1013 tert_aux_pcm_active: tert_aux_pcm_active {
1014 mux {
1015 pins = "gpio75", "gpio76";
1016 function = "ter_mi2s";
1017 };
1018
1019 config {
1020 pins = "gpio75", "gpio76";
1021 drive-strength = <8>; /* 8 mA */
1022 bias-disable; /* NO PULL */
1023 output-high;
1024 };
1025 };
1026 };
1027
1028 tert_aux_pcm_din {
1029 tert_aux_pcm_din_sleep: tert_aux_pcm_din_sleep {
1030 mux {
1031 pins = "gpio77";
1032 function = "gpio";
1033 };
1034
1035 config {
1036 pins = "gpio77";
1037 drive-strength = <2>; /* 2 mA */
1038 bias-pull-down; /* PULL DOWN */
1039 input-enable;
1040 };
1041 };
1042
1043 tert_aux_pcm_din_active: tert_aux_pcm_din_active {
1044 mux {
1045 pins = "gpio77";
1046 function = "ter_mi2s";
1047 };
1048
1049 config {
1050 pins = "gpio77";
1051 drive-strength = <8>; /* 8 mA */
1052 bias-disable; /* NO PULL */
1053 };
1054 };
1055 };
1056
1057 tert_aux_pcm_dout {
1058 tert_aux_pcm_dout_sleep: tert_aux_pcm_dout_sleep {
1059 mux {
1060 pins = "gpio78";
1061 function = "gpio";
1062 };
1063
1064 config {
1065 pins = "gpio78";
1066 drive-strength = <2>; /* 2 mA */
1067 bias-pull-down; /* PULL DOWN */
1068 input-enable;
1069 };
1070 };
1071
1072 tert_aux_pcm_dout_active: tert_aux_pcm_dout_active {
1073 mux {
1074 pins = "gpio78";
1075 function = "ter_mi2s";
1076 };
1077
1078 config {
1079 pins = "gpio78";
1080 drive-strength = <8>; /* 8 mA */
1081 bias-disable; /* NO PULL */
1082 };
1083 };
1084 };
1085
1086 quat_aux_pcm {
1087 quat_aux_pcm_sleep: quat_aux_pcm_sleep {
1088 mux {
1089 pins = "gpio58", "gpio59";
1090 function = "gpio";
1091 };
1092
1093 config {
1094 pins = "gpio58", "gpio59";
1095 drive-strength = <2>; /* 2 mA */
1096 bias-pull-down; /* PULL DOWN */
1097 input-enable;
1098 };
1099 };
1100
1101 quat_aux_pcm_active: quat_aux_pcm_active {
1102 mux {
1103 pins = "gpio58", "gpio59";
1104 function = "qua_mi2s";
1105 };
1106
1107 config {
1108 pins = "gpio58", "gpio59";
1109 drive-strength = <8>; /* 8 mA */
1110 bias-disable; /* NO PULL */
1111 output-high;
1112 };
1113 };
1114 };
1115
1116 quat_aux_pcm_din {
1117 quat_aux_pcm_din_sleep: quat_aux_pcm_din_sleep {
1118 mux {
1119 pins = "gpio60";
1120 function = "gpio";
1121 };
1122
1123 config {
1124 pins = "gpio60";
1125 drive-strength = <2>; /* 2 mA */
1126 bias-pull-down; /* PULL DOWN */
1127 input-enable;
1128 };
1129 };
1130
1131 quat_aux_pcm_din_active: quat_aux_pcm_din_active {
1132 mux {
1133 pins = "gpio60";
1134 function = "qua_mi2s";
1135 };
1136
1137 config {
1138 pins = "gpio60";
1139 drive-strength = <8>; /* 8 mA */
1140 bias-disable; /* NO PULL */
1141 };
1142 };
1143 };
1144
1145 quat_aux_pcm_dout {
1146 quat_aux_pcm_dout_sleep: quat_aux_pcm_dout_sleep {
1147 mux {
1148 pins = "gpio61";
1149 function = "gpio";
1150 };
1151
1152 config {
1153 pins = "gpio61";
1154 drive-strength = <2>; /* 2 mA */
1155 bias-pull-down; /* PULL DOWN */
1156 input-enable;
1157 };
1158 };
1159
1160 quat_aux_pcm_dout_active: quat_aux_pcm_dout_active {
1161 mux {
1162 pins = "gpio61";
1163 function = "qua_mi2s";
1164 };
1165
1166 config {
1167 pins = "gpio61";
1168 drive-strength = <8>; /* 8 mA */
1169 bias-disable; /* NO PULL */
1170 };
1171 };
1172 };
1173
1174 pri_mi2s_mclk {
1175 pri_mi2s_mclk_sleep: pri_mi2s_mclk_sleep {
1176 mux {
1177 pins = "gpio64";
1178 function = "gpio";
1179 };
1180
1181 config {
1182 pins = "gpio64";
1183 drive-strength = <2>; /* 2 mA */
1184 bias-pull-down; /* PULL DOWN */
1185 input-enable;
1186 };
1187 };
1188
1189 pri_mi2s_mclk_active: pri_mi2s_mclk_active {
1190 mux {
1191 pins = "gpio64";
1192 function = "pri_mi2s";
1193 };
1194
1195 config {
1196 pins = "gpio64";
1197 drive-strength = <8>; /* 8 mA */
1198 bias-disable; /* NO PULL */
1199 output-high;
1200 };
1201 };
1202 };
1203
1204 pri_mi2s_sck {
1205 pri_mi2s_sck_sleep: pri_mi2s_sck_sleep {
1206 mux {
1207 pins = "gpio65";
1208 function = "gpio";
1209 };
1210
1211 config {
1212 pins = "gpio65";
1213 drive-strength = <2>; /* 2 mA */
1214 bias-pull-down; /* PULL DOWN */
1215 input-enable;
1216 };
1217 };
1218
1219 pri_mi2s_sck_active: pri_mi2s_sck_active {
1220 mux {
1221 pins = "gpio65";
1222 function = "pri_mi2s";
1223 };
1224
1225 config {
1226 pins = "gpio65";
1227 drive-strength = <8>; /* 8 mA */
1228 bias-disable; /* NO PULL */
1229 output-high;
1230 };
1231 };
1232 };
1233
1234 pri_mi2s_ws {
1235 pri_mi2s_ws_sleep: pri_mi2s_ws_sleep {
1236 mux {
1237 pins = "gpio66";
1238 function = "gpio";
1239 };
1240
1241 config {
1242 pins = "gpio66";
1243 drive-strength = <2>; /* 2 mA */
1244 bias-pull-down; /* PULL DOWN */
1245 input-enable;
1246 };
1247 };
1248
1249 pri_mi2s_ws_active: pri_mi2s_ws_active {
1250 mux {
1251 pins = "gpio66";
1252 function = "pri_mi2s_ws";
1253 };
1254
1255 config {
1256 pins = "gpio66";
1257 drive-strength = <8>; /* 8 mA */
1258 bias-disable; /* NO PULL */
1259 output-high;
1260 };
1261 };
1262 };
1263
1264 pri_mi2s_sd0 {
1265 pri_mi2s_sd0_sleep: pri_mi2s_sd0_sleep {
1266 mux {
1267 pins = "gpio67";
1268 function = "gpio";
1269 };
1270
1271 config {
1272 pins = "gpio67";
1273 drive-strength = <2>; /* 2 mA */
1274 bias-pull-down; /* PULL DOWN */
1275 input-enable;
1276 };
1277 };
1278
1279 pri_mi2s_sd0_active: pri_mi2s_sd0_active {
1280 mux {
1281 pins = "gpio67";
1282 function = "pri_mi2s";
1283 };
1284
1285 config {
1286 pins = "gpio67";
1287 drive-strength = <8>; /* 8 mA */
1288 bias-disable; /* NO PULL */
1289 };
1290 };
1291 };
1292
1293 pri_mi2s_sd1 {
1294 pri_mi2s_sd1_sleep: pri_mi2s_sd1_sleep {
1295 mux {
1296 pins = "gpio68";
1297 function = "gpio";
1298 };
1299
1300 config {
1301 pins = "gpio68";
1302 drive-strength = <2>; /* 2 mA */
1303 bias-pull-down; /* PULL DOWN */
1304 input-enable;
1305 };
1306 };
1307
1308 pri_mi2s_sd1_active: pri_mi2s_sd1_active {
1309 mux {
1310 pins = "gpio68";
1311 function = "pri_mi2s";
1312 };
1313
1314 config {
1315 pins = "gpio68";
1316 drive-strength = <8>; /* 8 mA */
1317 bias-disable; /* NO PULL */
1318 };
1319 };
1320 };
1321
1322 sec_mi2s_mclk {
1323 sec_mi2s_mclk_sleep: sec_mi2s_mclk_sleep {
1324 mux {
1325 pins = "gpio79";
1326 function = "gpio";
1327 };
1328
1329 config {
1330 pins = "gpio79";
1331 drive-strength = <2>; /* 2 mA */
1332 bias-pull-down; /* PULL DOWN */
1333 input-enable;
1334 };
1335 };
1336
1337 sec_mi2s_mclk_active: sec_mi2s_mclk_active {
1338 mux {
1339 pins = "gpio79";
1340 function = "sec_mi2s";
1341 };
1342
1343 config {
1344 pins = "gpio79";
1345 drive-strength = <8>; /* 8 mA */
1346 bias-disable; /* NO PULL */
1347 };
1348 };
1349 };
1350
1351 sec_mi2s {
1352 sec_mi2s_sleep: sec_mi2s_sleep {
1353 mux {
1354 pins = "gpio80", "gpio81";
1355 function = "gpio";
1356 };
1357
1358 config {
1359 pins = "gpio80", "gpio81";
1360 drive-strength = <2>; /* 2 mA */
1361 bias-disable; /* NO PULL */
1362 input-enable;
1363 };
1364 };
1365
1366 sec_mi2s_active: sec_mi2s_active {
1367 mux {
1368 pins = "gpio80", "gpio81";
1369 function = "sec_mi2s";
1370 };
1371
1372 config {
1373 pins = "gpio80", "gpio81";
1374 drive-strength = <8>; /* 8 mA */
1375 bias-disable; /* NO PULL */
1376 };
1377 };
1378 };
1379
1380 sec_mi2s_sd0 {
1381 sec_mi2s_sd0_sleep: sec_mi2s_sd0_sleep {
1382 mux {
1383 pins = "gpio82";
1384 function = "gpio";
1385 };
1386
1387 config {
1388 pins = "gpio82";
1389 drive-strength = <2>; /* 2 mA */
1390 bias-pull-down; /* PULL DOWN */
1391 input-enable;
1392 };
1393 };
1394
1395 sec_mi2s_sd0_active: sec_mi2s_sd0_active {
1396 mux {
1397 pins = "gpio82";
1398 function = "sec_mi2s";
1399 };
1400
1401 config {
1402 pins = "gpio82";
1403 drive-strength = <8>; /* 8 mA */
1404 bias-disable; /* NO PULL */
1405 };
1406 };
1407 };
1408
1409 sec_mi2s_sd1 {
1410 sec_mi2s_sd1_sleep: sec_mi2s_sd1_sleep {
1411 mux {
1412 pins = "gpio83";
1413 function = "gpio";
1414 };
1415
1416 config {
1417 pins = "gpio83";
1418 drive-strength = <2>; /* 2 mA */
1419 bias-pull-down; /* PULL DOWN */
1420 input-enable;
1421 };
1422 };
1423
1424 sec_mi2s_sd1_active: sec_mi2s_sd1_active {
1425 mux {
1426 pins = "gpio83";
1427 function = "sec_mi2s";
1428 };
1429
1430 config {
1431 pins = "gpio83";
1432 drive-strength = <8>; /* 8 mA */
1433 bias-disable; /* NO PULL */
1434 };
1435 };
1436 };
1437
1438 tert_mi2s_mclk {
1439 tert_mi2s_mclk_sleep: tert_mi2s_mclk_sleep {
1440 mux {
1441 pins = "gpio74";
1442 function = "gpio";
1443 };
1444
1445 config {
1446 pins = "gpio74";
1447 drive-strength = <2>; /* 2 mA */
1448 bias-pull-down; /* PULL DOWN */
1449 input-enable;
1450 };
1451 };
1452
1453 tert_mi2s_mclk_active: tert_mi2s_mclk_active {
1454 mux {
1455 pins = "gpio74";
1456 function = "ter_mi2s";
1457 };
1458
1459 config {
1460 pins = "gpio74";
1461 drive-strength = <8>; /* 8 mA */
1462 bias-disable; /* NO PULL */
1463 };
1464 };
1465 };
1466
1467 tert_mi2s {
1468 tert_mi2s_sleep: tert_mi2s_sleep {
1469 mux {
1470 pins = "gpio75", "gpio76";
1471 function = "gpio";
1472 };
1473
1474 config {
1475 pins = "gpio75", "gpio76";
1476 drive-strength = <2>; /* 2 mA */
1477 bias-pull-down; /* PULL DOWN */
1478 input-enable;
1479 };
1480 };
1481
1482 tert_mi2s_active: tert_mi2s_active {
1483 mux {
1484 pins = "gpio75", "gpio76";
1485 function = "ter_mi2s";
1486 };
1487
1488 config {
1489 pins = "gpio75", "gpio76";
1490 drive-strength = <8>; /* 8 mA */
1491 bias-disable; /* NO PULL */
1492 output-high;
1493 };
1494 };
1495 };
1496
1497 tert_mi2s_sd0 {
1498 tert_mi2s_sd0_sleep: tert_mi2s_sd0_sleep {
1499 mux {
1500 pins = "gpio77";
1501 function = "gpio";
1502 };
1503
1504 config {
1505 pins = "gpio77";
1506 drive-strength = <2>; /* 2 mA */
1507 bias-pull-down; /* PULL DOWN */
1508 input-enable;
1509 };
1510 };
1511
1512 tert_mi2s_sd0_active: tert_mi2s_sd0_active {
1513 mux {
1514 pins = "gpio77";
1515 function = "ter_mi2s";
1516 };
1517
1518 config {
1519 pins = "gpio77";
1520 drive-strength = <8>; /* 8 mA */
1521 bias-disable; /* NO PULL */
1522 };
1523 };
1524 };
1525
1526 tert_mi2s_sd1 {
1527 tert_mi2s_sd1_sleep: tert_mi2s_sd1_sleep {
1528 mux {
1529 pins = "gpio78";
1530 function = "gpio";
1531 };
1532
1533 config {
1534 pins = "gpio78";
1535 drive-strength = <2>; /* 2 mA */
1536 bias-pull-down; /* PULL DOWN */
1537 input-enable;
1538 };
1539 };
1540
1541 tert_mi2s_sd1_active: tert_mi2s_sd1_active {
1542 mux {
1543 pins = "gpio78";
1544 function = "ter_mi2s";
1545 };
1546
1547 config {
1548 pins = "gpio78";
1549 drive-strength = <8>; /* 8 mA */
1550 bias-disable; /* NO PULL */
1551 };
1552 };
1553 };
1554
1555 quat_mi2s_mclk {
1556 quat_mi2s_mclk_sleep: quat_mi2s_mclk_sleep {
1557 mux {
1558 pins = "gpio57";
1559 function = "gpio";
1560 };
1561
1562 config {
1563 pins = "gpio57";
1564 drive-strength = <2>; /* 2 mA */
1565 bias-pull-down; /* PULL DOWN */
1566 input-enable;
1567 };
1568 };
1569
1570 quat_mi2s_mclk_active: quat_mi2s_mclk_active {
1571 mux {
1572 pins = "gpio57";
1573 function = "qua_mi2s";
1574 };
1575
1576 config {
1577 pins = "gpio57";
1578 drive-strength = <8>; /* 8 mA */
1579 bias-disable; /* NO PULL */
1580 };
1581 };
1582 };
1583
1584 quat_mi2s {
1585 quat_mi2s_sleep: quat_mi2s_sleep {
1586 mux {
1587 pins = "gpio58", "gpio59";
1588 function = "gpio";
1589 };
1590
1591 config {
1592 pins = "gpio58", "gpio59";
1593 drive-strength = <2>; /* 2 mA */
1594 bias-pull-down; /* PULL DOWN */
1595 input-enable;
1596 };
1597 };
1598
1599 quat_mi2s_active: quat_mi2s_active {
1600 mux {
1601 pins = "gpio58", "gpio59";
1602 function = "qua_mi2s";
1603 };
1604
1605 config {
1606 pins = "gpio58", "gpio59";
1607 drive-strength = <8>; /* 8 mA */
1608 bias-disable; /* NO PULL */
1609 output-high;
1610 };
1611 };
1612 };
1613
1614 quat_mi2s_sd0 {
1615 quat_mi2s_sd0_sleep: quat_mi2s_sd0_sleep {
1616 mux {
1617 pins = "gpio60";
1618 function = "gpio";
1619 };
1620
1621 config {
1622 pins = "gpio60";
1623 drive-strength = <2>; /* 2 mA */
1624 bias-pull-down; /* PULL DOWN */
1625 input-enable;
1626 };
1627 };
1628
1629 quat_mi2s_sd0_active: quat_mi2s_sd0_active {
1630 mux {
1631 pins = "gpio60";
1632 function = "qua_mi2s";
1633 };
1634
1635 config {
1636 pins = "gpio60";
1637 drive-strength = <8>; /* 8 mA */
1638 bias-disable; /* NO PULL */
1639 };
1640 };
1641 };
1642
1643 quat_mi2s_sd1 {
1644 quat_mi2s_sd1_sleep: quat_mi2s_sd1_sleep {
1645 mux {
1646 pins = "gpio61";
1647 function = "gpio";
1648 };
1649
1650 config {
1651 pins = "gpio61";
1652 drive-strength = <2>; /* 2 mA */
1653 bias-pull-down; /* PULL DOWN */
1654 input-enable;
1655 };
1656 };
1657
1658 quat_mi2s_sd1_active: quat_mi2s_sd1_active {
1659 mux {
1660 pins = "gpio61";
1661 function = "qua_mi2s";
1662 };
1663
1664 config {
1665 pins = "gpio61";
1666 drive-strength = <8>; /* 8 mA */
1667 bias-disable; /* NO PULL */
1668 };
1669 };
1670 };
1671
1672 quat_mi2s_sd2 {
1673 quat_mi2s_sd2_sleep: quat_mi2s_sd2_sleep {
1674 mux {
1675 pins = "gpio62";
1676 function = "gpio";
1677 };
1678
1679 config {
1680 pins = "gpio62";
1681 drive-strength = <2>; /* 2 mA */
1682 bias-pull-down; /* PULL DOWN */
1683 input-enable;
1684 };
1685 };
1686
1687 quat_mi2s_sd2_active: quat_mi2s_sd2_active {
1688 mux {
1689 pins = "gpio62";
1690 function = "qua_mi2s";
1691 };
1692
1693 config {
1694 pins = "gpio62";
1695 drive-strength = <8>; /* 8 mA */
1696 bias-disable; /* NO PULL */
1697 };
1698 };
1699 };
1700
1701 quat_mi2s_sd3 {
1702 quat_mi2s_sd3_sleep: quat_mi2s_sd3_sleep {
1703 mux {
1704 pins = "gpio63";
1705 function = "gpio";
1706 };
1707
1708 config {
1709 pins = "gpio63";
1710 drive-strength = <2>; /* 2 mA */
1711 bias-pull-down; /* PULL DOWN */
1712 input-enable;
1713 };
1714 };
1715
1716 quat_mi2s_sd3_active: quat_mi2s_sd3_active {
1717 mux {
1718 pins = "gpio63";
1719 function = "qua_mi2s";
1720 };
1721
1722 config {
1723 pins = "gpio63";
1724 drive-strength = <8>; /* 8 mA */
1725 bias-disable; /* NO PULL */
1726 };
1727 };
1728 };
Girish Mahadevan2e2fbe72017-03-28 13:28:18 -06001729
Xiaoyu Yee1bd1c62017-07-31 16:36:25 -07001730 quat_tdm {
1731 quat_tdm_sleep: quat_tdm_sleep {
1732 mux {
1733 pins = "gpio58", "gpio59";
1734 function = "qua_mi2s";
1735 };
1736
1737 config {
1738 pins = "gpio58", "gpio59";
1739 drive-strength = <2>; /* 2 mA */
1740 bias-pull-down; /* PULL DOWN */
1741 };
1742 };
1743
1744 quat_tdm_active: quat_tdm_active {
1745 mux {
1746 pins = "gpio58", "gpio59";
1747 function = "qua_mi2s";
1748 };
1749
1750 config {
1751 pins = "gpio58", "gpio59";
1752 drive-strength = <8>; /* 8 mA */
1753 bias-disable; /* NO PULL */
1754 };
1755 };
1756 };
1757
1758 quat_tdm_dout {
1759 quat_tdm_dout_sleep: quat_tdm_dout_sleep {
1760 mux {
1761 pins = "gpio61";
1762 function = "qua_mi2s";
1763 };
1764
1765 config {
1766 pins = "gpio61";
1767 drive-strength = <2>; /* 2 mA */
1768 bias-pull-down; /* PULL DOWN */
1769 };
1770 };
1771
1772 quat_tdm_dout_active: quat_tdm_dout_active {
1773 mux {
1774 pins = "gpio61";
1775 function = "qua_mi2s";
1776 };
1777
1778 config {
1779 pins = "gpio61";
1780 drive-strength = <2>; /* 2 mA */
1781 bias-disable; /* NO PULL */
1782 };
1783 };
1784 };
1785
1786 quat_tdm_din {
1787 quat_tdm_din_sleep: quat_tdm_din_sleep {
1788 mux {
1789 pins = "gpio60";
1790 function = "qua_mi2s";
1791 };
1792
1793 config {
1794 pins = "gpio60";
1795 drive-strength = <2>; /* 2 mA */
1796 bias-pull-down; /* PULL DOWN */
1797 };
1798 };
1799
1800 quat_tdm_din_active: quat_tdm_din_active {
1801 mux {
1802 pins = "gpio60";
1803 function = "qua_mi2s";
1804 };
1805
1806 config {
1807 pins = "gpio60";
1808 drive-strength = <2>; /* 2 mA */
1809 bias-disable; /* NO PULL */
1810 };
1811 };
1812 };
1813
Girish Mahadevan2e2fbe72017-03-28 13:28:18 -06001814 /* QUPv3 South SE mappings */
1815 /* SE 0 pin mappings */
1816 qupv3_se0_i2c_pins: qupv3_se0_i2c_pins {
1817 qupv3_se0_i2c_active: qupv3_se0_i2c_active {
1818 mux {
1819 pins = "gpio0", "gpio1";
1820 function = "qup0";
1821 };
1822
1823 config {
1824 pins = "gpio0", "gpio1";
1825 drive-strength = <2>;
1826 bias-disable;
1827 };
1828 };
1829
1830 qupv3_se0_i2c_sleep: qupv3_se0_i2c_sleep {
1831 mux {
1832 pins = "gpio0", "gpio1";
1833 function = "gpio";
1834 };
1835
1836 config {
1837 pins = "gpio0", "gpio1";
1838 drive-strength = <2>;
1839 bias-pull-up;
1840 };
1841 };
1842 };
1843
1844 qupv3_se0_spi_pins: qupv3_se0_spi_pins {
1845 qupv3_se0_spi_active: qupv3_se0_spi_active {
1846 mux {
1847 pins = "gpio0", "gpio1", "gpio2",
1848 "gpio3";
1849 function = "qup0";
1850 };
1851
1852 config {
1853 pins = "gpio0", "gpio1", "gpio2",
1854 "gpio3";
1855 drive-strength = <6>;
1856 bias-disable;
1857 };
1858 };
1859
1860 qupv3_se0_spi_sleep: qupv3_se0_spi_sleep {
1861 mux {
1862 pins = "gpio0", "gpio1", "gpio2",
1863 "gpio3";
1864 function = "gpio";
1865 };
1866
1867 config {
1868 pins = "gpio0", "gpio1", "gpio2",
1869 "gpio3";
1870 drive-strength = <6>;
1871 bias-disable;
1872 };
1873 };
1874 };
1875
1876 /* SE 1 pin mappings */
1877 qupv3_se1_i2c_pins: qupv3_se1_i2c_pins {
1878 qupv3_se1_i2c_active: qupv3_se1_i2c_active {
1879 mux {
1880 pins = "gpio17", "gpio18";
1881 function = "qup1";
1882 };
1883
1884 config {
1885 pins = "gpio17", "gpio18";
1886 drive-strength = <2>;
1887 bias-disable;
1888 };
1889 };
1890
1891 qupv3_se1_i2c_sleep: qupv3_se1_i2c_sleep {
1892 mux {
1893 pins = "gpio17", "gpio18";
1894 function = "gpio";
1895 };
1896
1897 config {
1898 pins = "gpio17", "gpio18";
1899 drive-strength = <2>;
1900 bias-pull-up;
1901 };
1902 };
1903 };
1904
1905 qupv3_se1_spi_pins: qupv3_se1_spi_pins {
1906 qupv3_se1_spi_active: qupv3_se1_spi_active {
1907 mux {
1908 pins = "gpio17", "gpio18", "gpio19",
1909 "gpio20";
1910 function = "qup1";
1911 };
1912
1913 config {
1914 pins = "gpio17", "gpio18", "gpio19",
1915 "gpio20";
1916 drive-strength = <6>;
1917 bias-disable;
1918 };
1919 };
1920
1921 qupv3_se1_spi_sleep: qupv3_se1_spi_sleep {
1922 mux {
1923 pins = "gpio17", "gpio18", "gpio19",
1924 "gpio20";
1925 function = "gpio";
1926 };
1927
1928 config {
1929 pins = "gpio17", "gpio18", "gpio19",
1930 "gpio20";
1931 drive-strength = <6>;
1932 bias-disable;
1933 };
1934 };
1935 };
1936
1937 /* SE 2 pin mappings */
1938 qupv3_se2_i2c_pins: qupv3_se2_i2c_pins {
1939 qupv3_se2_i2c_active: qupv3_se2_i2c_active {
1940 mux {
1941 pins = "gpio27", "gpio28";
1942 function = "qup2";
1943 };
1944
1945 config {
1946 pins = "gpio27", "gpio28";
1947 drive-strength = <2>;
1948 bias-disable;
1949 };
1950 };
1951
1952 qupv3_se2_i2c_sleep: qupv3_se2_i2c_sleep {
1953 mux {
1954 pins = "gpio27", "gpio28";
1955 function = "gpio";
1956 };
1957
1958 config {
1959 pins = "gpio27", "gpio28";
1960 drive-strength = <2>;
1961 bias-pull-up;
1962 };
1963 };
1964 };
1965
1966 qupv3_se2_spi_pins: qupv3_se2_spi_pins {
1967 qupv3_se2_spi_active: qupv3_se2_spi_active {
1968 mux {
1969 pins = "gpio27", "gpio28", "gpio29",
1970 "gpio30";
1971 function = "qup2";
1972 };
1973
1974 config {
1975 pins = "gpio27", "gpio28", "gpio29",
1976 "gpio30";
1977 drive-strength = <6>;
1978 bias-disable;
1979 };
1980 };
1981
1982 qupv3_se2_spi_sleep: qupv3_se2_spi_sleep {
1983 mux {
1984 pins = "gpio27", "gpio28", "gpio29",
1985 "gpio30";
1986 function = "gpio";
1987 };
1988
1989 config {
1990 pins = "gpio27", "gpio28", "gpio29",
1991 "gpio30";
1992 drive-strength = <6>;
1993 bias-disable;
1994 };
1995 };
1996 };
1997
1998 /* SE 3 pin mappings */
1999 qupv3_se3_i2c_pins: qupv3_se3_i2c_pins {
2000 qupv3_se3_i2c_active: qupv3_se3_i2c_active {
2001 mux {
2002 pins = "gpio41", "gpio42";
2003 function = "qup3";
2004 };
2005
2006 config {
2007 pins = "gpio41", "gpio42";
2008 drive-strength = <2>;
2009 bias-disable;
2010 };
2011 };
2012
2013 qupv3_se3_i2c_sleep: qupv3_se3_i2c_sleep {
2014 mux {
2015 pins = "gpio41", "gpio42";
2016 function = "gpio";
2017 };
2018
2019 config {
2020 pins = "gpio41", "gpio42";
2021 drive-strength = <2>;
2022 bias-pull-up;
2023 };
2024 };
2025 };
2026
Gaurav Singhalf6d253d2017-05-11 08:24:40 +05302027 nfc {
2028 nfc_int_active: nfc_int_active {
2029 /* active state */
2030 mux {
2031 /* GPIO 63 NFC Read Interrupt */
2032 pins = "gpio63";
2033 function = "gpio";
2034 };
2035
2036 config {
2037 pins = "gpio63";
2038 drive-strength = <2>; /* 2 MA */
2039 bias-pull-up;
2040 };
2041 };
2042
2043 nfc_int_suspend: nfc_int_suspend {
2044 /* sleep state */
2045 mux {
2046 /* GPIO 63 NFC Read Interrupt */
2047 pins = "gpio63";
2048 function = "gpio";
2049 };
2050
2051 config {
2052 pins = "gpio63";
2053 drive-strength = <2>; /* 2 MA */
2054 bias-pull-up;
2055 };
2056 };
2057
2058 nfc_enable_active: nfc_enable_active {
2059 /* active state */
2060 mux {
2061 /* 12: NFC ENABLE 116:ESE Enable */
2062 pins = "gpio12", "gpio62", "gpio116";
2063 function = "gpio";
2064 };
2065
2066 config {
2067 pins = "gpio12", "gpio62", "gpio116";
2068 drive-strength = <2>; /* 2 MA */
2069 bias-pull-up;
2070 };
2071 };
2072
2073 nfc_enable_suspend: nfc_enable_suspend {
2074 /* sleep state */
2075 mux {
2076 /* 12: NFC ENABLE 116:ESE Enable */
2077 pins = "gpio12", "gpio62", "gpio116";
2078 function = "gpio";
2079 };
2080
2081 config {
2082 pins = "gpio12", "gpio62", "gpio116";
2083 drive-strength = <2>; /* 2 MA */
2084 bias-disable;
2085 };
2086 };
2087 };
2088
Girish Mahadevan2e2fbe72017-03-28 13:28:18 -06002089 qupv3_se3_spi_pins: qupv3_se3_spi_pins {
2090 qupv3_se3_spi_active: qupv3_se3_spi_active {
2091 mux {
2092 pins = "gpio41", "gpio42", "gpio43",
2093 "gpio44";
2094 function = "qup3";
2095 };
2096
2097 config {
2098 pins = "gpio41", "gpio42", "gpio43",
2099 "gpio44";
2100 drive-strength = <6>;
2101 bias-disable;
2102 };
2103 };
2104
2105 qupv3_se3_spi_sleep: qupv3_se3_spi_sleep {
2106 mux {
2107 pins = "gpio41", "gpio42", "gpio43",
2108 "gpio44";
2109 function = "gpio";
2110 };
2111
2112 config {
2113 pins = "gpio41", "gpio42", "gpio43",
2114 "gpio44";
2115 drive-strength = <6>;
2116 bias-disable;
2117 };
2118 };
2119 };
2120
2121 /* SE 4 pin mappings */
2122 qupv3_se4_i2c_pins: qupv3_se4_i2c_pins {
2123 qupv3_se4_i2c_active: qupv3_se4_i2c_active {
2124 mux {
2125 pins = "gpio89", "gpio90";
2126 function = "qup4";
2127 };
2128
2129 config {
2130 pins = "gpio89", "gpio90";
2131 drive-strength = <2>;
2132 bias-disable;
2133 };
2134 };
2135
2136 qupv3_se4_i2c_sleep: qupv3_se4_i2c_sleep {
2137 mux {
2138 pins = "gpio89", "gpio90";
2139 function = "gpio";
2140 };
2141
2142 config {
2143 pins = "gpio89", "gpio90";
2144 drive-strength = <2>;
2145 bias-pull-up;
2146 };
2147 };
2148 };
2149
2150 qupv3_se4_spi_pins: qupv3_se4_spi_pins {
2151 qupv3_se4_spi_active: qupv3_se4_spi_active {
2152 mux {
2153 pins = "gpio89", "gpio90", "gpio91",
2154 "gpio92";
2155 function = "qup4";
2156 };
2157
2158 config {
2159 pins = "gpio89", "gpio90", "gpio91",
2160 "gpio92";
2161 drive-strength = <6>;
2162 bias-disable;
2163 };
2164 };
2165
2166 qupv3_se4_spi_sleep: qupv3_se4_spi_sleep {
2167 mux {
2168 pins = "gpio89", "gpio90", "gpio91",
2169 "gpio92";
2170 function = "gpio";
2171 };
2172
2173 config {
2174 pins = "gpio89", "gpio90", "gpio91",
2175 "gpio92";
2176 drive-strength = <6>;
2177 bias-disable;
2178 };
2179 };
2180 };
2181
2182 /* SE 5 pin mappings */
2183 qupv3_se5_i2c_pins: qupv3_se5_i2c_pins {
2184 qupv3_se5_i2c_active: qupv3_se5_i2c_active {
2185 mux {
2186 pins = "gpio85", "gpio86";
2187 function = "qup5";
2188 };
2189
2190 config {
2191 pins = "gpio85", "gpio86";
2192 drive-strength = <2>;
2193 bias-disable;
2194 };
2195 };
2196
2197 qupv3_se5_i2c_sleep: qupv3_se5_i2c_sleep {
2198 mux {
2199 pins = "gpio85", "gpio86";
2200 function = "gpio";
2201 };
2202
2203 config {
2204 pins = "gpio85", "gpio86";
2205 drive-strength = <2>;
2206 bias-pull-up;
2207 };
2208 };
2209 };
2210
2211 qupv3_se5_spi_pins: qupv3_se5_spi_pins {
2212 qupv3_se5_spi_active: qupv3_se5_spi_active {
2213 mux {
2214 pins = "gpio85", "gpio86", "gpio87",
2215 "gpio88";
2216 function = "qup5";
2217 };
2218
2219 config {
2220 pins = "gpio85", "gpio86", "gpio87",
2221 "gpio88";
2222 drive-strength = <6>;
2223 bias-disable;
2224 };
2225 };
2226
2227 qupv3_se5_spi_sleep: qupv3_se5_spi_sleep {
2228 mux {
2229 pins = "gpio85", "gpio86", "gpio87",
2230 "gpio88";
2231 function = "gpio";
2232 };
2233
2234 config {
2235 pins = "gpio85", "gpio86", "gpio87",
2236 "gpio88";
2237 drive-strength = <6>;
2238 bias-disable;
2239 };
2240 };
2241 };
2242
2243 /* SE 6 pin mappings */
2244 qupv3_se6_i2c_pins: qupv3_se6_i2c_pins {
2245 qupv3_se6_i2c_active: qupv3_se6_i2c_active {
2246 mux {
2247 pins = "gpio45", "gpio46";
2248 function = "qup6";
2249 };
2250
2251 config {
2252 pins = "gpio45", "gpio46";
2253 drive-strength = <2>;
2254 bias-disable;
2255 };
2256 };
2257
2258 qupv3_se6_i2c_sleep: qupv3_se6_i2c_sleep {
2259 mux {
2260 pins = "gpio45", "gpio46";
2261 function = "gpio";
2262 };
2263
2264 config {
2265 pins = "gpio45", "gpio46";
2266 drive-strength = <2>;
2267 bias-pull-up;
2268 };
2269 };
2270 };
2271
2272 qupv3_se6_4uart_pins: qupv3_se6_4uart_pins {
Girish Mahadevan5d2ed912017-10-27 14:04:22 -06002273 qupv3_se6_ctsrx: qupv3_se6_ctsrx {
Girish Mahadevan2e2fbe72017-03-28 13:28:18 -06002274 mux {
Girish Mahadevan5d2ed912017-10-27 14:04:22 -06002275 pins = "gpio45", "gpio48";
Girish Mahadevan2e2fbe72017-03-28 13:28:18 -06002276 function = "qup6";
2277 };
2278
2279 config {
Girish Mahadevan5d2ed912017-10-27 14:04:22 -06002280 pins = "gpio45", "gpio48";
Girish Mahadevan2e2fbe72017-03-28 13:28:18 -06002281 drive-strength = <2>;
Girish Mahadevan5d2ed912017-10-27 14:04:22 -06002282 bias-no-pull;
Girish Mahadevan2e2fbe72017-03-28 13:28:18 -06002283 };
2284 };
2285
Girish Mahadevan5d2ed912017-10-27 14:04:22 -06002286 qupv3_se6_rts: qupv3_se6_rts {
Girish Mahadevan2e2fbe72017-03-28 13:28:18 -06002287 mux {
Girish Mahadevan5d2ed912017-10-27 14:04:22 -06002288 pins = "gpio46";
2289 function = "qup6";
Girish Mahadevan2e2fbe72017-03-28 13:28:18 -06002290 };
2291
2292 config {
Girish Mahadevan5d2ed912017-10-27 14:04:22 -06002293 pins = "gpio46";
Girish Mahadevan2e2fbe72017-03-28 13:28:18 -06002294 drive-strength = <2>;
Girish Mahadevan5d2ed912017-10-27 14:04:22 -06002295 bias-pull-down;
2296 };
2297 };
2298 qupv3_se6_tx: qupv3_se6_tx {
2299 mux {
2300 pins = "gpio47";
2301 function = "qup6";
2302 };
2303
2304 config {
2305 pins = "gpio47";
2306 drive-strength = <2>;
2307 bias-pull-up;
Girish Mahadevan2e2fbe72017-03-28 13:28:18 -06002308 };
2309 };
2310 };
2311
2312 qupv3_se6_spi_pins: qupv3_se6_spi_pins {
2313 qupv3_se6_spi_active: qupv3_se6_spi_active {
2314 mux {
2315 pins = "gpio45", "gpio46", "gpio47",
2316 "gpio48";
2317 function = "qup6";
2318 };
2319
2320 config {
2321 pins = "gpio45", "gpio46", "gpio47",
2322 "gpio48";
2323 drive-strength = <6>;
2324 bias-disable;
2325 };
2326 };
2327
2328 qupv3_se6_spi_sleep: qupv3_se6_spi_sleep {
2329 mux {
2330 pins = "gpio45", "gpio46", "gpio47",
2331 "gpio48";
2332 function = "gpio";
2333 };
2334
2335 config {
2336 pins = "gpio45", "gpio46", "gpio47",
2337 "gpio48";
2338 drive-strength = <6>;
2339 bias-disable;
2340 };
2341 };
2342 };
2343
2344 /* SE 7 pin mappings */
2345 qupv3_se7_i2c_pins: qupv3_se7_i2c_pins {
2346 qupv3_se7_i2c_active: qupv3_se7_i2c_active {
2347 mux {
2348 pins = "gpio93", "gpio94";
2349 function = "qup7";
2350 };
2351
2352 config {
2353 pins = "gpio93", "gpio94";
2354 drive-strength = <2>;
2355 bias-disable;
2356 };
2357 };
2358
2359 qupv3_se7_i2c_sleep: qupv3_se7_i2c_sleep {
2360 mux {
2361 pins = "gpio93", "gpio94";
2362 function = "gpio";
2363 };
2364
2365 config {
2366 pins = "gpio93", "gpio94";
2367 drive-strength = <2>;
2368 bias-pull-up;
2369 };
2370 };
2371 };
2372
2373 qupv3_se7_4uart_pins: qupv3_se7_4uart_pins {
2374 qupv3_se7_4uart_active: qupv3_se7_4uart_active {
2375 mux {
2376 pins = "gpio93", "gpio94", "gpio95",
2377 "gpio96";
2378 function = "qup7";
2379 };
2380
2381 config {
2382 pins = "gpio93", "gpio94", "gpio95",
2383 "gpio96";
2384 drive-strength = <2>;
2385 bias-disable;
2386 };
2387 };
2388
2389 qupv3_se7_4uart_sleep: qupv3_se7_4uart_sleep {
2390 mux {
2391 pins = "gpio93", "gpio94", "gpio95",
2392 "gpio96";
2393 function = "gpio";
2394 };
2395
2396 config {
2397 pins = "gpio93", "gpio94", "gpio95",
2398 "gpio96";
2399 drive-strength = <2>;
2400 bias-disable;
2401 };
2402 };
2403 };
2404
2405 qupv3_se7_spi_pins: qupv3_se7_spi_pins {
2406 qupv3_se7_spi_active: qupv3_se7_spi_active {
2407 mux {
2408 pins = "gpio93", "gpio94", "gpio95",
2409 "gpio96";
2410 function = "qup7";
2411 };
2412
2413 config {
2414 pins = "gpio93", "gpio94", "gpio95",
2415 "gpio96";
2416 drive-strength = <6>;
2417 bias-disable;
2418 };
2419 };
2420
2421 qupv3_se7_spi_sleep: qupv3_se7_spi_sleep {
2422 mux {
2423 pins = "gpio93", "gpio94", "gpio95",
2424 "gpio96";
2425 function = "gpio";
2426 };
2427
2428 config {
2429 pins = "gpio93", "gpio94", "gpio95",
2430 "gpio96";
2431 drive-strength = <6>;
2432 bias-disable;
2433 };
2434 };
2435 };
2436
2437 /* QUPv3 North instances */
2438 /* SE 8 pin mappings */
2439 qupv3_se8_i2c_pins: qupv3_se8_i2c_pins {
2440 qupv3_se8_i2c_active: qupv3_se8_i2c_active {
2441 mux {
2442 pins = "gpio65", "gpio66";
2443 function = "qup8";
2444 };
2445
2446 config {
2447 pins = "gpio65", "gpio66";
2448 drive-strength = <2>;
2449 bias-disable;
2450 };
2451 };
2452
2453 qupv3_se8_i2c_sleep: qupv3_se8_i2c_sleep {
2454 mux {
2455 pins = "gpio65", "gpio66";
2456 function = "gpio";
2457 };
2458
2459 config {
2460 pins = "gpio65", "gpio66";
2461 drive-strength = <2>;
2462 bias-pull-up;
2463 };
2464 };
2465 };
2466
2467 qupv3_se8_spi_pins: qupv3_se8_spi_pins {
2468 qupv3_se8_spi_active: qupv3_se8_spi_active {
2469 mux {
2470 pins = "gpio65", "gpio66", "gpio67",
2471 "gpio68";
2472 function = "qup8";
2473 };
2474
2475 config {
2476 pins = "gpio65", "gpio66", "gpio67",
2477 "gpio68";
2478 drive-strength = <6>;
2479 bias-disable;
2480 };
2481 };
2482
2483 qupv3_se8_spi_sleep: qupv3_se8_spi_sleep {
2484 mux {
2485 pins = "gpio65", "gpio66", "gpio67",
2486 "gpio68";
2487 function = "gpio";
2488 };
2489
2490 config {
2491 pins = "gpio65", "gpio66", "gpio67",
2492 "gpio68";
2493 drive-strength = <6>;
2494 bias-disable;
2495 };
2496 };
2497 };
2498
2499 /* SE 9 pin mappings */
2500 qupv3_se9_i2c_pins: qupv3_se9_i2c_pins {
2501 qupv3_se9_i2c_active: qupv3_se9_i2c_active {
2502 mux {
2503 pins = "gpio6", "gpio7";
2504 function = "qup9";
2505 };
2506
2507 config {
2508 pins = "gpio6", "gpio7";
2509 drive-strength = <2>;
2510 bias-disable;
2511 };
2512 };
2513
2514 qupv3_se9_i2c_sleep: qupv3_se9_i2c_sleep {
2515 mux {
2516 pins = "gpio6", "gpio7";
2517 function = "gpio";
2518 };
2519
2520 config {
2521 pins = "gpio6", "gpio7";
2522 drive-strength = <2>;
2523 bias-pull-up;
2524 };
2525 };
2526 };
2527
2528 qupv3_se9_2uart_pins: qupv3_se9_2uart_pins {
2529 qupv3_se9_2uart_active: qupv3_se9_2uart_active {
2530 mux {
2531 pins = "gpio4", "gpio5";
2532 function = "qup9";
2533 };
2534
2535 config {
2536 pins = "gpio4", "gpio5";
2537 drive-strength = <2>;
2538 bias-disable;
2539 };
2540 };
2541
2542 qupv3_se9_2uart_sleep: qupv3_se9_2uart_sleep {
2543 mux {
2544 pins = "gpio4", "gpio5";
2545 function = "gpio";
2546 };
2547
2548 config {
2549 pins = "gpio4", "gpio5";
2550 drive-strength = <2>;
2551 bias-disable;
2552 };
2553 };
2554 };
2555
2556 qupv3_se9_spi_pins: qupv3_se9_spi_pins {
2557 qupv3_se9_spi_active: qupv3_se9_spi_active {
2558 mux {
2559 pins = "gpio4", "gpio5", "gpio6",
2560 "gpio7";
2561 function = "qup9";
2562 };
2563
2564 config {
2565 pins = "gpio4", "gpio5", "gpio6",
2566 "gpio7";
2567 drive-strength = <6>;
2568 bias-disable;
2569 };
2570 };
2571
2572 qupv3_se9_spi_sleep: qupv3_se9_spi_sleep {
2573 mux {
2574 pins = "gpio4", "gpio5", "gpio6",
2575 "gpio7";
2576 function = "gpio";
2577 };
2578
2579 config {
2580 pins = "gpio4", "gpio5", "gpio6",
2581 "gpio7";
2582 drive-strength = <6>;
2583 bias-disable;
2584 };
2585 };
2586 };
2587
2588 /* SE 10 pin mappings */
2589 qupv3_se10_i2c_pins: qupv3_se10_i2c_pins {
2590 qupv3_se10_i2c_active: qupv3_se10_i2c_active {
2591 mux {
2592 pins = "gpio55", "gpio56";
2593 function = "qup10";
2594 };
2595
2596 config {
2597 pins = "gpio55", "gpio56";
2598 drive-strength = <2>;
2599 bias-disable;
2600 };
2601 };
2602
2603 qupv3_se10_i2c_sleep: qupv3_se10_i2c_sleep {
2604 mux {
2605 pins = "gpio55", "gpio56";
2606 function = "gpio";
2607 };
2608
2609 config {
2610 pins = "gpio55", "gpio56";
2611 drive-strength = <2>;
2612 bias-pull-up;
2613 };
2614 };
2615 };
2616
2617 qupv3_se10_2uart_pins: qupv3_se10_2uart_pins {
2618 qupv3_se10_2uart_active: qupv3_se10_2uart_active {
2619 mux {
2620 pins = "gpio53", "gpio54";
2621 function = "qup10";
2622 };
2623
2624 config {
2625 pins = "gpio53", "gpio54";
2626 drive-strength = <2>;
2627 bias-disable;
2628 };
2629 };
2630
2631 qupv3_se10_2uart_sleep: qupv3_se10_2uart_sleep {
2632 mux {
2633 pins = "gpio53", "gpio54";
2634 function = "gpio";
2635 };
2636
2637 config {
2638 pins = "gpio53", "gpio54";
2639 drive-strength = <2>;
2640 bias-disable;
2641 };
2642 };
2643 };
2644
2645 qupv3_se10_spi_pins: qupv3_se10_spi_pins {
2646 qupv3_se10_spi_active: qupv3_se10_spi_active {
2647 mux {
2648 pins = "gpio53", "gpio54", "gpio55",
2649 "gpio56";
2650 function = "qup10";
2651 };
2652
2653 config {
2654 pins = "gpio53", "gpio54", "gpio55",
2655 "gpio56";
2656 drive-strength = <6>;
2657 bias-disable;
2658 };
2659 };
2660
2661 qupv3_se10_spi_sleep: qupv3_se10_spi_sleep {
2662 mux {
2663 pins = "gpio53", "gpio54", "gpio55",
2664 "gpio56";
2665 function = "gpio";
2666 };
2667
2668 config {
2669 pins = "gpio53", "gpio54", "gpio55",
2670 "gpio56";
2671 drive-strength = <6>;
2672 bias-disable;
2673 };
2674 };
2675 };
2676
2677 /* SE 11 pin mappings */
2678 qupv3_se11_i2c_pins: qupv3_se11_i2c_pins {
2679 qupv3_se11_i2c_active: qupv3_se11_i2c_active {
2680 mux {
2681 pins = "gpio31", "gpio32";
2682 function = "qup11";
2683 };
2684
2685 config {
2686 pins = "gpio31", "gpio32";
2687 drive-strength = <2>;
2688 bias-disable;
2689 };
2690 };
2691
2692 qupv3_se11_i2c_sleep: qupv3_se11_i2c_sleep {
2693 mux {
2694 pins = "gpio31", "gpio32";
2695 function = "gpio";
2696 };
2697
2698 config {
2699 pins = "gpio31", "gpio32";
2700 drive-strength = <2>;
2701 bias-pull-up;
2702 };
2703 };
2704 };
2705
2706 qupv3_se11_spi_pins: qupv3_se11_spi_pins {
2707 qupv3_se11_spi_active: qupv3_se11_spi_active {
2708 mux {
2709 pins = "gpio31", "gpio32", "gpio33",
2710 "gpio34";
2711 function = "qup11";
2712 };
2713
2714 config {
2715 pins = "gpio31", "gpio32", "gpio33",
2716 "gpio34";
2717 drive-strength = <6>;
2718 bias-disable;
2719 };
2720 };
2721
2722 qupv3_se11_spi_sleep: qupv3_se11_spi_sleep {
2723 mux {
2724 pins = "gpio31", "gpio32", "gpio33",
2725 "gpio34";
2726 function = "gpio";
2727 };
2728
2729 config {
2730 pins = "gpio31", "gpio32", "gpio33",
2731 "gpio34";
2732 drive-strength = <6>;
2733 bias-disable;
2734 };
2735 };
2736 };
2737
2738 /* SE 12 pin mappings */
2739 qupv3_se12_i2c_pins: qupv3_se12_i2c_pins {
2740 qupv3_se12_i2c_active: qupv3_se12_i2c_active {
2741 mux {
2742 pins = "gpio49", "gpio50";
2743 function = "qup12";
2744 };
2745
2746 config {
2747 pins = "gpio49", "gpio50";
2748 drive-strength = <2>;
2749 bias-disable;
2750 };
2751 };
2752
2753 qupv3_se12_i2c_sleep: qupv3_se12_i2c_sleep {
2754 mux {
2755 pins = "gpio49", "gpio50";
2756 function = "gpio";
2757 };
2758
2759 config {
2760 pins = "gpio49", "gpio50";
2761 drive-strength = <2>;
2762 bias-pull-up;
2763 };
2764 };
2765 };
2766
2767 qupv3_se12_spi_pins: qupv3_se12_spi_pins {
2768 qupv3_se12_spi_active: qupv3_se12_spi_active {
2769 mux {
2770 pins = "gpio49", "gpio50", "gpio51",
2771 "gpio52";
2772 function = "qup12";
2773 };
2774
2775 config {
2776 pins = "gpio49", "gpio50", "gpio51",
2777 "gpio52";
2778 drive-strength = <6>;
2779 bias-disable;
2780 };
2781 };
2782
2783 qupv3_se12_spi_sleep: qupv3_se12_spi_sleep {
2784 mux {
2785 pins = "gpio49", "gpio50", "gpio51",
2786 "gpio52";
2787 function = "gpio";
2788 };
2789
2790 config {
2791 pins = "gpio49", "gpio50", "gpio51",
2792 "gpio52";
2793 drive-strength = <6>;
2794 bias-disable;
2795 };
2796 };
2797 };
2798
2799 /* SE 13 pin mappings */
2800 qupv3_se13_i2c_pins: qupv3_se13_i2c_pins {
2801 qupv3_se13_i2c_active: qupv3_se13_i2c_active {
2802 mux {
2803 pins = "gpio105", "gpio106";
2804 function = "qup13";
2805 };
2806
2807 config {
2808 pins = "gpio105", "gpio106";
2809 drive-strength = <2>;
2810 bias-disable;
2811 };
2812 };
2813
2814 qupv3_se13_i2c_sleep: qupv3_se13_i2c_sleep {
2815 mux {
2816 pins = "gpio105", "gpio106";
2817 function = "gpio";
2818 };
2819
2820 config {
2821 pins = "gpio105", "gpio106";
2822 drive-strength = <2>;
2823 bias-pull-up;
2824 };
2825 };
2826 };
2827
2828 qupv3_se13_spi_pins: qupv3_se13_spi_pins {
2829 qupv3_se13_spi_active: qupv3_se13_spi_active {
2830 mux {
2831 pins = "gpio105", "gpio106", "gpio107",
2832 "gpio108";
2833 function = "qup13";
2834 };
2835
2836 config {
2837 pins = "gpio105", "gpio106", "gpio107",
2838 "gpio108";
2839 drive-strength = <6>;
2840 bias-disable;
2841 };
2842 };
2843
2844 qupv3_se13_spi_sleep: qupv3_se13_spi_sleep {
2845 mux {
2846 pins = "gpio105", "gpio106", "gpio107",
2847 "gpio108";
2848 function = "gpio";
2849 };
2850
2851 config {
2852 pins = "gpio105", "gpio106", "gpio107",
2853 "gpio108";
2854 drive-strength = <6>;
2855 bias-disable;
2856 };
2857 };
2858 };
2859
2860 /* SE 14 pin mappings */
2861 qupv3_se14_i2c_pins: qupv3_se14_i2c_pins {
2862 qupv3_se14_i2c_active: qupv3_se14_i2c_active {
2863 mux {
2864 pins = "gpio33", "gpio34";
2865 function = "qup14";
2866 };
2867
2868 config {
2869 pins = "gpio33", "gpio34";
2870 drive-strength = <2>;
2871 bias-disable;
2872 };
2873 };
2874
2875 qupv3_se14_i2c_sleep: qupv3_se14_i2c_sleep {
2876 mux {
2877 pins = "gpio33", "gpio34";
2878 function = "gpio";
2879 };
2880
2881 config {
2882 pins = "gpio33", "gpio34";
2883 drive-strength = <2>;
2884 bias-pull-up;
2885 };
2886 };
2887 };
2888
2889 qupv3_se14_spi_pins: qupv3_se14_spi_pins {
2890 qupv3_se14_spi_active: qupv3_se14_spi_active {
2891 mux {
2892 pins = "gpio31", "gpio32", "gpio33",
2893 "gpio34";
2894 function = "qup14";
2895 };
2896
2897 config {
2898 pins = "gpio31", "gpio32", "gpio33",
2899 "gpio34";
2900 drive-strength = <6>;
2901 bias-disable;
2902 };
2903 };
2904
2905 qupv3_se14_spi_sleep: qupv3_se14_spi_sleep {
2906 mux {
2907 pins = "gpio31", "gpio32", "gpio33",
2908 "gpio34";
2909 function = "gpio";
2910 };
2911
2912 config {
2913 pins = "gpio31", "gpio32", "gpio33",
2914 "gpio34";
2915 drive-strength = <6>;
2916 bias-disable;
2917 };
2918 };
2919 };
2920
2921 /* SE 15 pin mappings */
2922 qupv3_se15_i2c_pins: qupv3_se15_i2c_pins {
2923 qupv3_se15_i2c_active: qupv3_se15_i2c_active {
2924 mux {
2925 pins = "gpio81", "gpio82";
2926 function = "qup15";
2927 };
2928
2929 config {
2930 pins = "gpio81", "gpio82";
2931 drive-strength = <2>;
2932 bias-disable;
2933 };
2934 };
2935
2936 qupv3_se15_i2c_sleep: qupv3_se15_i2c_sleep {
2937 mux {
2938 pins = "gpio81", "gpio82";
2939 function = "gpio";
2940 };
2941
2942 config {
2943 pins = "gpio81", "gpio82";
2944 drive-strength = <2>;
2945 bias-pull-up;
2946 };
2947 };
2948 };
2949
2950 qupv3_se15_spi_pins: qupv3_se15_spi_pins {
2951 qupv3_se15_spi_active: qupv3_se15_spi_active {
2952 mux {
2953 pins = "gpio81", "gpio82", "gpio83",
2954 "gpio84";
2955 function = "qup15";
2956 };
2957
2958 config {
2959 pins = "gpio81", "gpio82", "gpio83",
2960 "gpio84";
2961 drive-strength = <6>;
2962 bias-disable;
2963 };
2964 };
2965
2966 qupv3_se15_spi_sleep: qupv3_se15_spi_sleep {
2967 mux {
2968 pins = "gpio81", "gpio82", "gpio83",
2969 "gpio84";
2970 function = "gpio";
2971 };
2972
2973 config {
2974 pins = "gpio81", "gpio82", "gpio83",
2975 "gpio84";
2976 drive-strength = <6>;
2977 bias-disable;
2978 };
2979 };
2980 };
Jigarkumar Zala861231152017-02-28 14:05:11 -08002981
2982 cci0_active: cci0_active {
2983 mux {
2984 /* CLK, DATA */
2985 pins = "gpio17","gpio18"; // Only 2
2986 function = "cci_i2c";
2987 };
2988
2989 config {
2990 pins = "gpio17","gpio18";
2991 bias-pull-up; /* PULL UP*/
2992 drive-strength = <2>; /* 2 MA */
2993 };
2994 };
2995
2996 cci0_suspend: cci0_suspend {
2997 mux {
2998 /* CLK, DATA */
2999 pins = "gpio17","gpio18";
3000 function = "cci_i2c";
3001 };
3002
3003 config {
3004 pins = "gpio17","gpio18";
3005 bias-pull-down; /* PULL DOWN */
3006 drive-strength = <2>; /* 2 MA */
3007 };
3008 };
3009
3010 cci1_active: cci1_active {
3011 mux {
3012 /* CLK, DATA */
3013 pins = "gpio19","gpio20";
3014 function = "cci_i2c";
3015 };
3016
3017 config {
3018 pins = "gpio19","gpio20";
3019 bias-pull-up; /* PULL UP*/
3020 drive-strength = <2>; /* 2 MA */
3021 };
3022 };
3023
3024 cci1_suspend: cci1_suspend {
3025 mux {
3026 /* CLK, DATA */
3027 pins = "gpio19","gpio20";
3028 function = "cci_i2c";
3029 };
3030
3031 config {
3032 pins = "gpio19","gpio20";
3033 bias-pull-down; /* PULL DOWN */
3034 drive-strength = <2>; /* 2 MA */
3035 };
3036 };
3037
Lei Wangaafa6ce2017-11-10 15:56:00 +08003038 cam_sensor_fisheye_active: cam_sensor_fisheye_active {
3039 /* RESET, AVDD LO */
3040 mux {
3041 pins = "gpio76","gpio75";
3042 function = "gpio";
3043 };
3044
3045 config {
3046 pins = "gpio76","gpio75";
3047 bias-disable; /* No PULL */
3048 drive-strength = <2>; /* 2 MA */
3049 };
3050 };
3051
3052 cam_sensor_fisheye_suspend: cam_sensor_fisheye_suspend {
3053 /* RESET, AVDD LO*/
3054 mux {
3055 pins = "gpio76","gpio75";
3056 function = "gpio";
3057 };
3058
3059 config {
3060 pins = "gpio76","gpio75";
3061 bias-pull-down; /* PULL DOWN */
3062 drive-strength = <2>; /* 2 MA */
3063 output-low;
3064 };
3065 };
3066
3067 cam_sensor_depth_active: cam_sensor_depth_active {
3068 /* RESET,AVDD LO ,IMG_START, ILLU_EN */
3069 mux {
3070 pins = "gpio28","gpio23","gpio24";
3071 function = "gpio";
3072 };
3073
3074 config {
3075 pins = "gpio28","gpio23","gpio24";
3076 bias-disable; /* No PULL */
3077 drive-strength = <2>; /* 2 MA */
3078 };
3079 };
3080
3081 cam_sensor_depth_suspend: cam_sensor_depth_suspend {
3082 /* RESET, AVDD LO ,IMG_START, ILLU_EN */
3083 mux {
3084 pins = "gpio28","gpio23","gpio24";
3085 function = "gpio";
3086 };
3087
3088 config {
3089 pins = "gpio28","gpio23","gpio24";
3090 bias-pull-down; /* PULL DOWN */
3091 drive-strength = <2>; /* 2 MA */
3092 };
3093 };
3094
3095 max_rst_active: max_rst_active {
3096 /* RESET */
3097 mux {
3098 pins = "gpio31","gpio77","gpio78","gpio32";
3099 function = "gpio";
3100 };
3101
3102 config {
3103 pins = "gpio31","gpio77","gpio78","gpio32";
3104 bias-disable; /* No PULL */
3105 drive-strength = <8>; /* 2 MA */
3106 };
3107 };
3108
3109 max_rst_suspend: max_rst_suspend {
3110 /* RESET */
3111 mux {
3112 pins = "gpio31","gpio77","gpio78","gpio32";
3113 function = "gpio";
3114 };
3115
3116 config {
3117 pins = "gpio31","gpio77","gpio78","gpio32";
3118 bias-pull-down; /* PULL DOWN */
3119 drive-strength = <8>; /* 2 MA */
3120 };
3121 };
3122
3123 max_6dof_active: max_6dof_active {
3124 /* RESET */
3125 mux {
3126 pins = "gpio30","gpio95","gpio94";
3127 function = "gpio";
3128 };
3129
3130 config {
3131 pins = "gpio30","gpio95","gpio94";
3132 bias-disable; /* No PULL */
3133 drive-strength = <8>; /* 2 MA */
3134 };
3135 };
3136
3137 max_6dof_suspend: max_6dof_suspend {
3138 /* RESET */
3139 mux {
3140 pins = "gpio30","gpio95","gpio94";
3141 function = "gpio";
3142 };
3143
3144 config {
3145 pins = "gpio30","gpio95","gpio94";
3146 bias-pull-down; /* PULL DOWN */
3147 drive-strength = <8>; /* 2 MA */
3148 };
3149 };
3150
Jigarkumar Zala861231152017-02-28 14:05:11 -08003151 cam_sensor_mclk0_active: cam_sensor_mclk0_active {
3152 /* MCLK0 */
3153 mux {
3154 pins = "gpio13";
3155 function = "cam_mclk";
3156 };
3157
3158 config {
3159 pins = "gpio13";
3160 bias-disable; /* No PULL */
3161 drive-strength = <2>; /* 2 MA */
3162 };
3163 };
3164
3165 cam_sensor_mclk0_suspend: cam_sensor_mclk0_suspend {
3166 /* MCLK0 */
3167 mux {
3168 pins = "gpio13";
3169 function = "cam_mclk";
3170 };
3171
3172 config {
3173 pins = "gpio13";
3174 bias-pull-down; /* PULL DOWN */
3175 drive-strength = <2>; /* 2 MA */
3176 };
3177 };
3178
3179 cam_sensor_rear_active: cam_sensor_rear_active {
3180 /* RESET, AVDD LDO */
3181 mux {
3182 pins = "gpio80","gpio79";
3183 function = "gpio";
3184 };
3185
3186 config {
3187 pins = "gpio80","gpio79";
3188 bias-disable; /* No PULL */
3189 drive-strength = <2>; /* 2 MA */
3190 };
3191 };
3192
3193 cam_sensor_rear_suspend: cam_sensor_rear_suspend {
3194 /* RESET, AVDD LDO */
3195 mux {
3196 pins = "gpio80","gpio79";
3197 function = "gpio";
3198 };
3199
3200 config {
3201 pins = "gpio80","gpio79";
Jeyaprakash Soundrapandian902116a2017-07-20 18:17:59 -07003202 bias-pull-down; /* PULL DOWN */
Jigarkumar Zala861231152017-02-28 14:05:11 -08003203 drive-strength = <2>; /* 2 MA */
Karthik Anantha Rame87f1ee2017-08-24 14:05:36 -07003204 output-low;
Jigarkumar Zala861231152017-02-28 14:05:11 -08003205 };
3206 };
3207
3208 cam_sensor_mclk1_active: cam_sensor_mclk1_active {
3209 /* MCLK1 */
3210 mux {
3211 pins = "gpio14";
3212 function = "cam_mclk";
3213 };
3214
3215 config {
3216 pins = "gpio14";
3217 bias-disable; /* No PULL */
3218 drive-strength = <2>; /* 2 MA */
3219 };
3220 };
3221
3222 cam_sensor_mclk1_suspend: cam_sensor_mclk1_suspend {
3223 /* MCLK1 */
3224 mux {
3225 pins = "gpio14";
3226 function = "cam_mclk";
3227 };
3228
3229 config {
3230 pins = "gpio14";
3231 bias-pull-down; /* PULL DOWN */
3232 drive-strength = <2>; /* 2 MA */
3233 };
3234 };
3235
Jigarkumar Zala9e214912017-09-14 16:40:03 -07003236 cam_sensor_mclk3_active: cam_sensor_mclk3_active {
3237 /* MCLK3 */
3238 mux {
3239 pins = "gpio16";
3240 function = "cam_mclk";
3241 };
3242
3243 config {
3244 pins = "gpio16";
3245 bias-disable; /* No PULL */
3246 drive-strength = <2>; /* 2 MA */
3247 };
3248 };
3249
3250 cam_sensor_mclk3_suspend: cam_sensor_mclk3_suspend {
3251 /* MCLK3 */
3252 mux {
3253 pins = "gpio16";
3254 function = "cam_mclk";
3255 };
3256
3257 config {
3258 pins = "gpio16";
3259 bias-pull-down; /* PULL DOWN */
3260 drive-strength = <2>; /* 2 MA */
3261 };
3262 };
3263
3264
Jigarkumar Zala861231152017-02-28 14:05:11 -08003265 cam_sensor_front_active: cam_sensor_front_active {
3266 /* RESET AVDD_LDO*/
3267 mux {
Jilai Wange0297632017-11-15 18:15:10 -05003268 pins = "gpio28";
Jigarkumar Zala861231152017-02-28 14:05:11 -08003269 function = "gpio";
3270 };
3271
3272 config {
Jilai Wange0297632017-11-15 18:15:10 -05003273 pins = "gpio28";
Jigarkumar Zala861231152017-02-28 14:05:11 -08003274 bias-disable; /* No PULL */
3275 drive-strength = <2>; /* 2 MA */
3276 };
3277 };
3278
3279 cam_sensor_front_suspend: cam_sensor_front_suspend {
3280 /* RESET */
3281 mux {
3282 pins = "gpio28";
3283 function = "gpio";
3284 };
3285
3286 config {
3287 pins = "gpio28";
Jeyaprakash Soundrapandian902116a2017-07-20 18:17:59 -07003288 bias-pull-down; /* PULL DOWN */
Jigarkumar Zala861231152017-02-28 14:05:11 -08003289 drive-strength = <2>; /* 2 MA */
Karthik Anantha Rame87f1ee2017-08-24 14:05:36 -07003290 output-low;
Jigarkumar Zala861231152017-02-28 14:05:11 -08003291 };
3292 };
3293
Jigarkumar Zala9e214912017-09-14 16:40:03 -07003294 cam_sensor_iris_active: cam_sensor_iris_active {
3295 /* RESET AVDD_LDO*/
3296 mux {
Jilai Wange0297632017-11-15 18:15:10 -05003297 pins = "gpio9";
Jigarkumar Zala9e214912017-09-14 16:40:03 -07003298 function = "gpio";
3299 };
3300
3301 config {
Jilai Wange0297632017-11-15 18:15:10 -05003302 pins = "gpio9";
Jigarkumar Zala9e214912017-09-14 16:40:03 -07003303 bias-disable; /* No PULL */
3304 drive-strength = <2>; /* 2 MA */
3305 };
3306 };
3307
3308 cam_sensor_iris_suspend: cam_sensor_iris_suspend {
3309 /* RESET */
3310 mux {
3311 pins = "gpio9";
3312 function = "gpio";
3313 };
3314
3315 config {
3316 pins = "gpio9";
Lei Wangaafa6ce2017-11-10 15:56:00 +08003317 bias-pull-down; /* PULL DOWN */
Jigarkumar Zala9e214912017-09-14 16:40:03 -07003318 drive-strength = <2>; /* 2 MA */
3319 output-low;
3320 };
3321 };
3322
3323
Jigarkumar Zala861231152017-02-28 14:05:11 -08003324 cam_sensor_mclk2_active: cam_sensor_mclk2_active {
3325 /* MCLK1 */
3326 mux {
3327 /* CLK, DATA */
3328 pins = "gpio15";
3329 function = "cam_mclk";
3330 };
3331
3332 config {
3333 pins = "gpio15";
3334 bias-disable; /* No PULL */
3335 drive-strength = <2>; /* 2 MA */
3336 };
3337 };
3338
3339 cam_sensor_mclk2_suspend: cam_sensor_mclk2_suspend {
3340 /* MCLK1 */
3341 mux {
3342 /* CLK, DATA */
3343 pins = "gpio15";
3344 function = "cam_mclk";
3345 };
3346
3347 config {
3348 pins = "gpio15";
3349 bias-pull-down; /* PULL DOWN */
3350 drive-strength = <2>; /* 2 MA */
3351 };
3352 };
3353
3354 cam_sensor_rear2_active: cam_sensor_rear2_active {
3355 /* RESET, STANDBY */
3356 mux {
Jilai Wange0297632017-11-15 18:15:10 -05003357 pins = "gpio9";
Jigarkumar Zala861231152017-02-28 14:05:11 -08003358 function = "gpio";
3359 };
3360
3361 config {
Jilai Wange0297632017-11-15 18:15:10 -05003362 pins = "gpio9";
Jigarkumar Zala861231152017-02-28 14:05:11 -08003363 bias-disable; /* No PULL */
3364 drive-strength = <2>; /* 2 MA */
3365 };
3366 };
3367
3368 cam_sensor_rear2_suspend: cam_sensor_rear2_suspend {
3369 /* RESET, STANDBY */
3370 mux {
Jilai Wange0297632017-11-15 18:15:10 -05003371 pins = "gpio9";
Jigarkumar Zala861231152017-02-28 14:05:11 -08003372 function = "gpio";
3373 };
3374 config {
Jilai Wange0297632017-11-15 18:15:10 -05003375 pins = "gpio9";
Jeyaprakash Soundrapandian902116a2017-07-20 18:17:59 -07003376 bias-pull-down; /* PULL DOWN */
Jigarkumar Zala861231152017-02-28 14:05:11 -08003377 drive-strength = <2>; /* 2 MA */
Karthik Anantha Rame87f1ee2017-08-24 14:05:36 -07003378 output-low;
Jigarkumar Zala861231152017-02-28 14:05:11 -08003379 };
3380 };
Satyajit Desaie4508132017-04-05 17:15:22 -07003381
Vivek Veenam38718002017-12-21 17:34:57 +05303382 cam_sensor_rear_vana: cam_sensor_rear_vana {
3383 /* AVDD LDO */
3384 mux {
3385 pins = "gpio8";
3386 function = "gpio";
3387 };
3388
3389 config {
3390 pins = "gpio8";
3391 bias-disable; /* No PULL */
3392 drive-strength = <2>; /* 2 MA */
3393 };
3394 };
3395
Jilai Wange0297632017-11-15 18:15:10 -05003396 cam_res_mgr_active: cam_res_mgr_active {
3397 /* AVDD_LDO*/
3398 mux {
3399 pins = "gpio8";
3400 function = "gpio";
3401 };
3402
3403 config {
3404 pins = "gpio8";
3405 bias-disable; /* No PULL */
3406 drive-strength = <2>; /* 2 MA */
3407 };
3408 };
3409
3410 cam_res_mgr_suspend: cam_res_mgr_suspend {
3411 /* AVDD_LDO */
3412 mux {
3413 pins = "gpio8";
3414 function = "gpio";
3415 };
3416
3417 config {
3418 pins = "gpio8";
3419 bias-disable; /* No PULL */
3420 drive-strength = <2>; /* 2 MA */
3421 output-low;
3422 };
3423 };
3424
Satyajit Desaie4508132017-04-05 17:15:22 -07003425 trigout_a: trigout_a {
3426 mux {
Satyajit Desai602a6712017-05-09 14:45:16 -07003427 pins = "gpio90";
Satyajit Desaie4508132017-04-05 17:15:22 -07003428 function = "qdss_cti";
3429 };
3430 config {
Satyajit Desai602a6712017-05-09 14:45:16 -07003431 pins = "gpio90";
Satyajit Desaie4508132017-04-05 17:15:22 -07003432 drive-strength = <2>;
3433 bias-disable;
3434 };
3435 };
Udaya Bhaskara Reddy Mallavarapu55ef0cb2017-06-12 14:45:28 +05303436
3437 tsif0_signals_active: tsif0_signals_active {
3438 tsif1_clk {
3439 pins = "gpio89"; /* TSIF0 CLK */
3440 function = "tsif1_clk";
3441 };
3442 tsif1_en {
3443 pins = "gpio90"; /* TSIF0 Enable */
3444 function = "tsif1_en";
3445 };
3446 tsif1_data {
3447 pins = "gpio91"; /* TSIF0 DATA */
3448 function = "tsif1_data";
3449 };
3450 signals_cfg {
3451 pins = "gpio89", "gpio90", "gpio91";
3452 drive_strength = <2>; /* 2 mA */
3453 bias-pull-down; /* pull down */
3454 };
3455 };
3456
3457 /* sync signal is only used if configured to mode-2 */
3458 tsif0_sync_active: tsif0_sync_active {
3459 tsif1_sync {
3460 pins = "gpio12"; /* TSIF0 SYNC */
3461 function = "tsif1_sync";
3462 drive_strength = <2>; /* 2 mA */
3463 bias-pull-down; /* pull down */
3464 };
3465 };
3466
3467 tsif1_signals_active: tsif1_signals_active {
3468 tsif2_clk {
3469 pins = "gpio93"; /* TSIF1 CLK */
3470 function = "tsif2_clk";
3471 };
3472 tsif2_en {
3473 pins = "gpio94"; /* TSIF1 Enable */
3474 function = "tsif2_en";
3475 };
3476 tsif2_data {
3477 pins = "gpio95"; /* TSIF1 DATA */
3478 function = "tsif2_data";
3479 };
3480 signals_cfg {
3481 pins = "gpio93", "gpio94", "gpio95";
3482 drive_strength = <2>; /* 2 mA */
3483 bias-pull-down; /* pull down */
3484 };
3485 };
3486
3487 /* sync signal is only used if configured to mode-2 */
3488 tsif1_sync_active: tsif1_sync_active {
3489 tsif2_sync {
3490 pins = "gpio96"; /* TSIF1 SYNC */
3491 function = "tsif2_sync";
3492 drive_strength = <2>; /* 2 mA */
3493 bias-pull-down; /* pull down */
3494 };
3495 };
Raghavendra Rao Ananta2f75ed72017-10-18 10:14:05 -07003496
3497 ap2mdm {
3498 ap2mdm_active: ap2mdm_active {
3499 mux {
3500 /* ap2mdm-status
3501 * ap2mdm-errfatal
3502 * ap2mdm-vddmin
3503 */
3504 pins = "gpio21", "gpio23";
3505 function = "gpio";
3506 };
3507
3508 config {
3509 pins = "gpio21", "gpio23";
3510 drive-strength = <16>;
3511 bias-disable;
3512 };
3513 };
3514 ap2mdm_sleep: ap2mdm_sleep {
3515 mux {
3516 /* ap2mdm-status
3517 * ap2mdm-errfatal
3518 * ap2mdm-vddmin
3519 */
3520 pins = "gpio21", "gpio23";
3521 function = "gpio";
3522 };
3523
3524 config {
3525 pins = "gpio21", "gpio23";
3526 drive-strength = <8>;
3527 bias-disable;
3528 };
3529
3530 };
3531 };
3532
3533 mdm2ap {
3534 mdm2ap_active: mdm2ap_active {
3535 mux {
3536 /* mdm2ap-status
3537 * mdm2ap-errfatal
3538 * mdm2ap-vddmin
3539 */
3540 pins = "gpio22", "gpio20";
3541 function = "gpio";
3542 };
3543
3544 config {
3545 pins = "gpio22", "gpio20";
3546 drive-strength = <8>;
3547 bias-disable;
3548 };
3549 };
3550 mdm2ap_sleep: mdm2ap_sleep {
3551 mux {
3552 /* mdm2ap-status
3553 * mdm2ap-errfatal
3554 * mdm2ap-vddmin
3555 */
3556 pins = "gpio22", "gpio20";
3557 function = "gpio";
3558 };
3559
3560 config {
3561 pins = "gpio22", "gpio20";
3562 drive-strength = <8>;
3563 bias-disable;
3564 };
3565 };
3566 };
Kyle Yan679cbee2016-07-27 16:55:20 -07003567 };
3568};
David Collinsc6686252017-03-31 14:23:09 -07003569
3570&pm8998_gpios {
3571 key_home {
3572 key_home_default: key_home_default {
3573 pins = "gpio5";
3574 function = "normal";
3575 input-enable;
3576 bias-pull-up;
3577 power-source = <0>;
3578 };
3579 };
3580
zhaochenaf8cd372019-04-17 09:53:59 +08003581 led_bt {
3582 led_bt_default: led_bt_default {
3583 pins = "gpio5";
3584 function = "normal";
3585 power-source = <0>;
3586 output-low;
3587 };
3588 };
3589
David Collinsc6686252017-03-31 14:23:09 -07003590 key_vol_up {
3591 key_vol_up_default: key_vol_up_default {
3592 pins = "gpio6";
3593 function = "normal";
3594 input-enable;
3595 bias-pull-up;
3596 power-source = <0>;
3597 };
3598 };
3599
3600 key_cam_snapshot {
3601 key_cam_snapshot_default: key_cam_snapshot_default {
3602 pins = "gpio7";
3603 function = "normal";
3604 input-enable;
3605 bias-pull-up;
3606 power-source = <0>;
3607 };
3608 };
3609
3610 key_cam_focus {
3611 key_cam_focus_default: key_cam_focus_default {
3612 pins = "gpio8";
3613 function = "normal";
3614 input-enable;
3615 bias-pull-up;
3616 power-source = <0>;
3617 };
3618 };
Jigarkumar Zala861231152017-02-28 14:05:11 -08003619
zhaochenaf8cd372019-04-17 09:53:59 +08003620 led_wifi {
3621 led_wifi_default: led_wifi_default {
3622 pins = "gpio9";
3623 function = "normal";
3624 power-source = <0>;
3625 output-low;
3626 };
3627 };
3628
Jigarkumar Zala861231152017-02-28 14:05:11 -08003629 camera_dvdd_en {
3630 camera_dvdd_en_default: camera_dvdd_en_default {
3631 pins = "gpio9";
3632 function = "normal";
3633 power-source = <0>;
3634 output-low;
3635 };
3636 };
3637
Zhaohong Chena4e89d32019-07-03 13:12:35 +08003638 camera_rear_avdd_en {
3639 camera_rear_avdd_en_default: camera_rear_avdd_en_default {
3640 pins = "gpio10";
3641 function = "normal";
3642 power-source = <0>;
3643 output-low;
3644 };
3645 };
3646
Jigarkumar Zala861231152017-02-28 14:05:11 -08003647 camera_rear_dvdd_en {
3648 camera_rear_dvdd_en_default: camera_rear_dvdd_en_default {
3649 pins = "gpio12";
3650 function = "normal";
3651 power-source = <0>;
3652 output-low;
3653 };
3654 };
Gaurav Singhal243b94b2017-06-20 14:16:59 +05303655
3656 nfc_clk {
3657 nfc_clk_default: nfc_clk_default {
3658 pins = "gpio21";
3659 function = "normal";
3660 input-enable;
3661 power-source = <1>;
3662 };
3663 };
David Collinsc6686252017-03-31 14:23:09 -07003664};