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Ben Dooks431107e2010-01-26 10:11:04 +09001/* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
Ben Dooks5718df92008-10-21 14:07:09 +01002 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
14#include <linux/kernel.h>
15#include <linux/types.h>
16#include <linux/interrupt.h>
17#include <linux/list.h>
18#include <linux/timer.h>
19#include <linux/init.h>
Naveen Krishna Ch290d0982010-06-22 07:39:18 +090020#include <linux/input.h>
Ben Dooks5718df92008-10-21 14:07:09 +010021#include <linux/serial_core.h>
22#include <linux/platform_device.h>
23#include <linux/io.h>
Ben Dooks096941e2008-10-31 16:14:59 +000024#include <linux/i2c.h>
Mark Browna7a81d02010-02-17 18:19:31 +000025#include <linux/leds.h>
Ben Dooks438a5d42008-11-19 15:41:34 +000026#include <linux/fb.h>
27#include <linux/gpio.h>
28#include <linux/delay.h>
Mark Brown3056ea02009-01-27 16:18:01 +000029#include <linux/smsc911x.h>
Mark Brown42015c12009-11-03 14:42:06 +000030#include <linux/regulator/fixed.h>
Ben Dooks438a5d42008-11-19 15:41:34 +000031
Mark Brownecc558a2009-02-17 15:59:38 +000032#ifdef CONFIG_SMDK6410_WM1190_EV1
33#include <linux/mfd/wm8350/core.h>
34#include <linux/mfd/wm8350/pmic.h>
35#endif
Ben Dooks438a5d42008-11-19 15:41:34 +000036
Mark Brown60f91012010-02-17 18:19:29 +000037#ifdef CONFIG_SMDK6410_WM1192_EV1
Mark Browna7a81d02010-02-17 18:19:31 +000038#include <linux/mfd/wm831x/core.h>
Mark Brown60f91012010-02-17 18:19:29 +000039#include <linux/mfd/wm831x/pdata.h>
40#endif
41
Ben Dooks438a5d42008-11-19 15:41:34 +000042#include <video/platform_lcd.h>
Ben Dooks5718df92008-10-21 14:07:09 +010043
44#include <asm/mach/arch.h>
45#include <asm/mach/map.h>
46#include <asm/mach/irq.h>
47
48#include <mach/hardware.h>
Ben Dooks438a5d42008-11-19 15:41:34 +000049#include <mach/regs-fb.h>
Ben Dooks5718df92008-10-21 14:07:09 +010050#include <mach/map.h>
51
52#include <asm/irq.h>
53#include <asm/mach-types.h>
54
55#include <plat/regs-serial.h>
Ben Dooks3501c9a2010-01-26 10:45:40 +090056#include <mach/regs-modem.h>
57#include <mach/regs-gpio.h>
58#include <mach/regs-sys.h>
59#include <mach/regs-srom.h>
Abhilash Kesavan0ab0b6d2010-06-08 16:55:45 +090060#include <plat/ata.h>
Ben Dooksd85fa242008-10-31 16:14:52 +000061#include <plat/iic.h>
Ben Dooks438a5d42008-11-19 15:41:34 +000062#include <plat/fb.h>
Mark Brown3056ea02009-01-27 16:18:01 +000063#include <plat/gpio-cfg.h>
Ben Dooks5718df92008-10-21 14:07:09 +010064
Ben Dooksf7be9ab2010-01-26 13:41:30 +090065#include <mach/s3c6410.h>
Ben Dooks5718df92008-10-21 14:07:09 +010066#include <plat/clock.h>
67#include <plat/devs.h>
68#include <plat/cpu.h>
Naveen Krishna Ch85b14a32010-05-20 11:39:52 +090069#include <plat/adc.h>
70#include <plat/ts.h>
Naveen Krishna Ch290d0982010-06-22 07:39:18 +090071#include <plat/keypad.h>
Ben Dooks5718df92008-10-21 14:07:09 +010072
73#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
74#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
75#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
76
77static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
78 [0] = {
79 .hwport = 0,
80 .flags = 0,
Matt Hsubd258e52009-06-29 19:03:41 +080081 .ucon = UCON,
82 .ulcon = ULCON,
83 .ufcon = UFCON,
Ben Dooks5718df92008-10-21 14:07:09 +010084 },
85 [1] = {
86 .hwport = 1,
87 .flags = 0,
Matt Hsubd258e52009-06-29 19:03:41 +080088 .ucon = UCON,
89 .ulcon = ULCON,
90 .ufcon = UFCON,
91 },
92 [2] = {
93 .hwport = 2,
94 .flags = 0,
95 .ucon = UCON,
96 .ulcon = ULCON,
97 .ufcon = UFCON,
98 },
99 [3] = {
100 .hwport = 3,
101 .flags = 0,
102 .ucon = UCON,
103 .ulcon = ULCON,
104 .ufcon = UFCON,
Ben Dooks5718df92008-10-21 14:07:09 +0100105 },
106};
107
Ben Dooks438a5d42008-11-19 15:41:34 +0000108/* framebuffer and LCD setup. */
109
110/* GPF15 = LCD backlight control
111 * GPF13 => Panel power
112 * GPN5 = LCD nRESET signal
113 * PWM_TOUT1 => backlight brightness
114 */
115
116static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
117 unsigned int power)
118{
119 if (power) {
120 gpio_direction_output(S3C64XX_GPF(13), 1);
121 gpio_direction_output(S3C64XX_GPF(15), 1);
122
123 /* fire nRESET on power up */
124 gpio_direction_output(S3C64XX_GPN(5), 0);
125 msleep(10);
126 gpio_direction_output(S3C64XX_GPN(5), 1);
127 msleep(1);
128 } else {
129 gpio_direction_output(S3C64XX_GPF(15), 0);
130 gpio_direction_output(S3C64XX_GPF(13), 0);
131 }
132}
133
134static struct plat_lcd_data smdk6410_lcd_power_data = {
135 .set_power = smdk6410_lcd_power_set,
136};
137
138static struct platform_device smdk6410_lcd_powerdev = {
139 .name = "platform-lcd",
140 .dev.parent = &s3c_device_fb.dev,
141 .dev.platform_data = &smdk6410_lcd_power_data,
142};
143
144static struct s3c_fb_pd_win smdk6410_fb_win0 = {
145 /* this is to ensure we use win0 */
146 .win_mode = {
Ben Dooks438a5d42008-11-19 15:41:34 +0000147 .left_margin = 8,
148 .right_margin = 13,
149 .upper_margin = 7,
150 .lower_margin = 5,
151 .hsync_len = 3,
152 .vsync_len = 1,
153 .xres = 800,
154 .yres = 480,
155 },
156 .max_bpp = 32,
157 .default_bpp = 16,
Ben Dooks001ca742010-07-26 10:56:40 +0100158 .virtual_y = 480 * 2,
159 .virtual_x = 800,
Ben Dooks438a5d42008-11-19 15:41:34 +0000160};
161
162/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
163static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
164 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
165 .win[0] = &smdk6410_fb_win0,
166 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
167 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
168};
169
Andy Greena4e94692009-12-29 14:40:43 +0000170/*
171 * Configuring Ethernet on SMDK6410
172 *
173 * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
174 * The constant address below corresponds to nCS1
175 *
176 * 1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
177 * 2) CFG6 needs to be switched to "LAN9115" side
178 */
179
Mark Brown3056ea02009-01-27 16:18:01 +0000180static struct resource smdk6410_smsc911x_resources[] = {
181 [0] = {
Andy Greenf01fdac2009-12-29 14:40:36 +0000182 .start = S3C64XX_PA_XM0CSN1,
183 .end = S3C64XX_PA_XM0CSN1 + SZ_64K - 1,
Mark Brown3056ea02009-01-27 16:18:01 +0000184 .flags = IORESOURCE_MEM,
185 },
186 [1] = {
187 .start = S3C_EINT(10),
188 .end = S3C_EINT(10),
189 .flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW,
190 },
191};
192
193static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
194 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
195 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
196 .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
197 .phy_interface = PHY_INTERFACE_MODE_MII,
198};
199
200
201static struct platform_device smdk6410_smsc911x = {
202 .name = "smsc911x",
203 .id = -1,
204 .num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
205 .resource = &smdk6410_smsc911x_resources[0],
206 .dev = {
207 .platform_data = &smdk6410_smsc911x_pdata,
208 },
209};
210
Mark Brown42015c12009-11-03 14:42:06 +0000211#ifdef CONFIG_REGULATOR
212static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] = {
213 {
214 /* WM8580 */
215 .supply = "PVDD",
216 .dev_name = "0-001b",
217 },
218 {
219 /* WM8580 */
220 .supply = "AVDD",
221 .dev_name = "0-001b",
222 },
223};
224
225static struct regulator_init_data smdk6410_b_pwr_5v_data = {
226 .constraints = {
227 .always_on = 1,
228 },
229 .num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers),
230 .consumer_supplies = smdk6410_b_pwr_5v_consumers,
231};
232
233static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = {
234 .supply_name = "B_PWR_5V",
235 .microvolts = 5000000,
236 .init_data = &smdk6410_b_pwr_5v_data,
Mark Brownd3cf4482010-01-13 13:57:04 +0000237 .gpio = -EINVAL,
Mark Brown42015c12009-11-03 14:42:06 +0000238};
239
240static struct platform_device smdk6410_b_pwr_5v = {
241 .name = "reg-fixed-voltage",
242 .id = -1,
243 .dev = {
244 .platform_data = &smdk6410_b_pwr_5v_pdata,
245 },
246};
247#endif
248
Abhilash Kesavan0ab0b6d2010-06-08 16:55:45 +0900249static struct s3c_ide_platdata smdk6410_ide_pdata __initdata = {
250 .setup_gpio = s3c64xx_ide_setup_gpio,
251};
252
Naveen Krishna Ch290d0982010-06-22 07:39:18 +0900253static uint32_t smdk6410_keymap[] __initdata = {
254 /* KEY(row, col, keycode) */
255 KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
256 KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
257 KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
258 KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
259};
260
261static struct matrix_keymap_data smdk6410_keymap_data __initdata = {
262 .keymap = smdk6410_keymap,
263 .keymap_size = ARRAY_SIZE(smdk6410_keymap),
264};
265
266static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = {
267 .keymap_data = &smdk6410_keymap_data,
268 .rows = 2,
269 .cols = 8,
270};
271
Mark Brown027191a2009-01-23 16:29:43 +0000272static struct map_desc smdk6410_iodesc[] = {};
Ben Dooks5718df92008-10-21 14:07:09 +0100273
274static struct platform_device *smdk6410_devices[] __initdata = {
Ben Dooksb24636c2008-11-03 20:14:53 +0000275#ifdef CONFIG_SMDK6410_SD_CH0
Ben Dooks39057f22008-10-31 16:14:29 +0000276 &s3c_device_hsmmc0,
Ben Dooksb24636c2008-11-03 20:14:53 +0000277#endif
278#ifdef CONFIG_SMDK6410_SD_CH1
279 &s3c_device_hsmmc1,
280#endif
Ben Dooksd85fa242008-10-31 16:14:52 +0000281 &s3c_device_i2c0,
Ben Dooksd7ea3742008-10-31 16:14:57 +0000282 &s3c_device_i2c1,
Ben Dooks438a5d42008-11-19 15:41:34 +0000283 &s3c_device_fb,
Ben Dooksb8132482009-11-23 00:13:39 +0000284 &s3c_device_ohci,
Ben Dooks06fa1d32009-05-16 22:11:20 +0100285 &s3c_device_usb_hsotg,
Mark Brown1f100862010-02-17 19:03:20 +0000286 &s3c64xx_device_iisv4,
Naveen Krishna Ch290d0982010-06-22 07:39:18 +0900287 &samsung_device_keypad,
Mark Brown42015c12009-11-03 14:42:06 +0000288
289#ifdef CONFIG_REGULATOR
290 &smdk6410_b_pwr_5v,
291#endif
Ben Dooks438a5d42008-11-19 15:41:34 +0000292 &smdk6410_lcd_powerdev,
Mark Brown3056ea02009-01-27 16:18:01 +0000293
294 &smdk6410_smsc911x,
Naveen Krishna Ch85b14a32010-05-20 11:39:52 +0900295 &s3c_device_adc,
Abhilash Kesavan0ab0b6d2010-06-08 16:55:45 +0900296 &s3c_device_cfcon,
Atul Dahiya9bbf4a62010-07-20 16:31:32 +0530297 &s3c_device_rtc,
Naveen Krishna Ch85b14a32010-05-20 11:39:52 +0900298 &s3c_device_ts,
Banajit Goswamib351c4a2010-05-20 16:21:30 +0900299 &s3c_device_wdt,
Ben Dooks5718df92008-10-21 14:07:09 +0100300};
301
Mark Brown60f91012010-02-17 18:19:29 +0000302#ifdef CONFIG_REGULATOR
303/* ARM core */
304static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
305 {
306 .supply = "vddarm",
307 }
308};
309
310/* VDDARM, BUCK1 on J5 */
311static struct regulator_init_data smdk6410_vddarm = {
312 .constraints = {
313 .name = "PVDD_ARM",
314 .min_uV = 1000000,
315 .max_uV = 1300000,
316 .always_on = 1,
317 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
318 },
319 .num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
320 .consumer_supplies = smdk6410_vddarm_consumers,
321};
322
323/* VDD_INT, BUCK2 on J5 */
324static struct regulator_init_data smdk6410_vddint = {
325 .constraints = {
326 .name = "PVDD_INT",
327 .min_uV = 1000000,
328 .max_uV = 1200000,
329 .always_on = 1,
330 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
331 },
332};
333
334/* VDD_HI, LDO3 on J5 */
335static struct regulator_init_data smdk6410_vddhi = {
336 .constraints = {
337 .name = "PVDD_HI",
338 .always_on = 1,
339 },
340};
341
342/* VDD_PLL, LDO2 on J5 */
343static struct regulator_init_data smdk6410_vddpll = {
344 .constraints = {
345 .name = "PVDD_PLL",
346 .always_on = 1,
347 },
348};
349
350/* VDD_UH_MMC, LDO5 on J5 */
351static struct regulator_init_data smdk6410_vdduh_mmc = {
352 .constraints = {
353 .name = "PVDD_UH/PVDD_MMC",
354 .always_on = 1,
355 },
356};
357
358/* VCCM3BT, LDO8 on J5 */
359static struct regulator_init_data smdk6410_vccmc3bt = {
360 .constraints = {
361 .name = "PVCCM3BT",
362 .always_on = 1,
363 },
364};
365
366/* VCCM2MTV, LDO11 on J5 */
367static struct regulator_init_data smdk6410_vccm2mtv = {
368 .constraints = {
369 .name = "PVCCM2MTV",
370 .always_on = 1,
371 },
372};
373
374/* VDD_LCD, LDO12 on J5 */
375static struct regulator_init_data smdk6410_vddlcd = {
376 .constraints = {
377 .name = "PVDD_LCD",
378 .always_on = 1,
379 },
380};
381
382/* VDD_OTGI, LDO9 on J5 */
383static struct regulator_init_data smdk6410_vddotgi = {
384 .constraints = {
385 .name = "PVDD_OTGI",
386 .always_on = 1,
387 },
388};
389
390/* VDD_OTG, LDO14 on J5 */
391static struct regulator_init_data smdk6410_vddotg = {
392 .constraints = {
393 .name = "PVDD_OTG",
394 .always_on = 1,
395 },
396};
397
398/* VDD_ALIVE, LDO15 on J5 */
399static struct regulator_init_data smdk6410_vddalive = {
400 .constraints = {
401 .name = "PVDD_ALIVE",
402 .always_on = 1,
403 },
404};
405
406/* VDD_AUDIO, VLDO_AUDIO on J5 */
407static struct regulator_init_data smdk6410_vddaudio = {
408 .constraints = {
409 .name = "PVDD_AUDIO",
410 .always_on = 1,
411 },
412};
413#endif
414
Mark Brownecc558a2009-02-17 15:59:38 +0000415#ifdef CONFIG_SMDK6410_WM1190_EV1
416/* S3C64xx internal logic & PLL */
417static struct regulator_init_data wm8350_dcdc1_data = {
418 .constraints = {
419 .name = "PVDD_INT/PVDD_PLL",
420 .min_uV = 1200000,
421 .max_uV = 1200000,
422 .always_on = 1,
423 .apply_uV = 1,
424 },
425};
426
427/* Memory */
428static struct regulator_init_data wm8350_dcdc3_data = {
429 .constraints = {
430 .name = "PVDD_MEM",
431 .min_uV = 1800000,
432 .max_uV = 1800000,
433 .always_on = 1,
434 .state_mem = {
435 .uV = 1800000,
436 .mode = REGULATOR_MODE_NORMAL,
437 .enabled = 1,
Mark Brown60f91012010-02-17 18:19:29 +0000438 },
Mark Brownecc558a2009-02-17 15:59:38 +0000439 .initial_state = PM_SUSPEND_MEM,
440 },
441};
442
443/* USB, EXT, PCM, ADC/DAC, USB, MMC */
Mark Brown42015c12009-11-03 14:42:06 +0000444static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
445 {
446 /* WM8580 */
447 .supply = "DVDD",
448 .dev_name = "0-001b",
449 },
450};
451
Mark Brownecc558a2009-02-17 15:59:38 +0000452static struct regulator_init_data wm8350_dcdc4_data = {
453 .constraints = {
454 .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV",
455 .min_uV = 3000000,
456 .max_uV = 3000000,
457 .always_on = 1,
458 },
Mark Brown42015c12009-11-03 14:42:06 +0000459 .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
460 .consumer_supplies = wm8350_dcdc4_consumers,
Mark Brownecc558a2009-02-17 15:59:38 +0000461};
462
Mark Brownecc558a2009-02-17 15:59:38 +0000463/* OTGi/1190-EV1 HPVDD & AVDD */
464static struct regulator_init_data wm8350_ldo4_data = {
465 .constraints = {
466 .name = "PVDD_OTGI/HPVDD/AVDD",
467 .min_uV = 1200000,
468 .max_uV = 1200000,
469 .apply_uV = 1,
Mark Brownf53aee22009-04-09 16:30:40 +0100470 .always_on = 1,
Mark Brownecc558a2009-02-17 15:59:38 +0000471 },
472};
473
474static struct {
475 int regulator;
476 struct regulator_init_data *initdata;
477} wm1190_regulators[] = {
478 { WM8350_DCDC_1, &wm8350_dcdc1_data },
479 { WM8350_DCDC_3, &wm8350_dcdc3_data },
480 { WM8350_DCDC_4, &wm8350_dcdc4_data },
Mark Brown60f91012010-02-17 18:19:29 +0000481 { WM8350_DCDC_6, &smdk6410_vddarm },
482 { WM8350_LDO_1, &smdk6410_vddalive },
483 { WM8350_LDO_2, &smdk6410_vddotg },
484 { WM8350_LDO_3, &smdk6410_vddlcd },
Mark Brownecc558a2009-02-17 15:59:38 +0000485 { WM8350_LDO_4, &wm8350_ldo4_data },
486};
487
488static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
489{
490 int i;
491
Mark Browna3323b72009-11-03 14:42:04 +0000492 /* Configure the IRQ line */
493 s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
494
Mark Brownecc558a2009-02-17 15:59:38 +0000495 /* Instantiate the regulators */
496 for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
497 wm8350_register_regulator(wm8350,
498 wm1190_regulators[i].regulator,
499 wm1190_regulators[i].initdata);
500
501 return 0;
502}
503
504static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
505 .init = smdk6410_wm8350_init,
Mark Browndb9256f2009-04-09 19:00:19 +0100506 .irq_high = 1,
Mark Brown9fca8782010-01-19 15:26:56 +0000507 .irq_base = IRQ_BOARD_START,
Mark Brownecc558a2009-02-17 15:59:38 +0000508};
509#endif
510
Mark Brown60f91012010-02-17 18:19:29 +0000511#ifdef CONFIG_SMDK6410_WM1192_EV1
Mark Browna7a81d02010-02-17 18:19:31 +0000512static struct gpio_led wm1192_pmic_leds[] = {
513 {
514 .name = "PMIC:red:power",
515 .gpio = GPIO_BOARD_START + 3,
516 .default_state = LEDS_GPIO_DEFSTATE_ON,
517 },
518};
519
520static struct gpio_led_platform_data wm1192_pmic_led = {
521 .num_leds = ARRAY_SIZE(wm1192_pmic_leds),
522 .leds = wm1192_pmic_leds,
523};
524
525static struct platform_device wm1192_pmic_led_dev = {
526 .name = "leds-gpio",
527 .id = -1,
528 .dev = {
529 .platform_data = &wm1192_pmic_led,
530 },
531};
532
Mark Brown60f91012010-02-17 18:19:29 +0000533static int wm1192_pre_init(struct wm831x *wm831x)
534{
Mark Browna7a81d02010-02-17 18:19:31 +0000535 int ret;
536
Mark Brown60f91012010-02-17 18:19:29 +0000537 /* Configure the IRQ line */
538 s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
539
Mark Browna7a81d02010-02-17 18:19:31 +0000540 ret = platform_device_register(&wm1192_pmic_led_dev);
541 if (ret != 0)
542 dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);
543
Mark Brown60f91012010-02-17 18:19:29 +0000544 return 0;
545}
546
547static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
548 .isink = 1,
549 .max_uA = 27554,
550};
551
552static struct regulator_init_data wm1192_dcdc3 = {
553 .constraints = {
554 .name = "PVDD_MEM/PVDD_GPS",
555 .always_on = 1,
556 },
557};
558
559static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
560 { .supply = "DVDD", .dev_name = "0-001b", }, /* WM8580 */
561};
562
563static struct regulator_init_data wm1192_ldo1 = {
564 .constraints = {
565 .name = "PVDD_LCD/PVDD_EXT",
566 .always_on = 1,
567 },
568 .consumer_supplies = wm1192_ldo1_consumers,
569 .num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
570};
571
572static struct wm831x_status_pdata wm1192_led7_pdata = {
573 .name = "LED7:green:",
574};
575
576static struct wm831x_status_pdata wm1192_led8_pdata = {
577 .name = "LED8:green:",
578};
579
580static struct wm831x_pdata smdk6410_wm1192_pdata = {
581 .pre_init = wm1192_pre_init,
582 .irq_base = IRQ_BOARD_START,
583
584 .backlight = &wm1192_backlight_pdata,
585 .dcdc = {
586 &smdk6410_vddarm, /* DCDC1 */
587 &smdk6410_vddint, /* DCDC2 */
588 &wm1192_dcdc3,
589 },
Mark Browna7a81d02010-02-17 18:19:31 +0000590 .gpio_base = GPIO_BOARD_START,
Mark Brown60f91012010-02-17 18:19:29 +0000591 .ldo = {
592 &wm1192_ldo1, /* LDO1 */
593 &smdk6410_vdduh_mmc, /* LDO2 */
594 NULL, /* LDO3 NC */
595 &smdk6410_vddotgi, /* LDO4 */
596 &smdk6410_vddotg, /* LDO5 */
597 &smdk6410_vddhi, /* LDO6 */
598 &smdk6410_vddaudio, /* LDO7 */
599 &smdk6410_vccm2mtv, /* LDO8 */
600 &smdk6410_vddpll, /* LDO9 */
601 &smdk6410_vccmc3bt, /* LDO10 */
602 &smdk6410_vddalive, /* LDO11 */
603 },
604 .status = {
605 &wm1192_led7_pdata,
606 &wm1192_led8_pdata,
607 },
608};
609#endif
610
Ben Dooks096941e2008-10-31 16:14:59 +0000611static struct i2c_board_info i2c_devs0[] __initdata = {
612 { I2C_BOARD_INFO("24c08", 0x50), },
Mark Brown77897472009-01-23 16:29:41 +0000613 { I2C_BOARD_INFO("wm8580", 0x1b), },
Mark Brownecc558a2009-02-17 15:59:38 +0000614
Mark Brown60f91012010-02-17 18:19:29 +0000615#ifdef CONFIG_SMDK6410_WM1192_EV1
616 { I2C_BOARD_INFO("wm8312", 0x34),
617 .platform_data = &smdk6410_wm1192_pdata,
618 .irq = S3C_EINT(12),
619 },
620#endif
621
Mark Brownecc558a2009-02-17 15:59:38 +0000622#ifdef CONFIG_SMDK6410_WM1190_EV1
623 { I2C_BOARD_INFO("wm8350", 0x1a),
624 .platform_data = &smdk6410_wm8350_pdata,
625 .irq = S3C_EINT(12),
626 },
627#endif
Ben Dooks096941e2008-10-31 16:14:59 +0000628};
629
630static struct i2c_board_info i2c_devs1[] __initdata = {
631 { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */
Ben Dooks5718df92008-10-21 14:07:09 +0100632};
633
Naveen Krishna Ch85b14a32010-05-20 11:39:52 +0900634static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
635 .delay = 10000,
636 .presc = 49,
637 .oversampling_shift = 2,
638};
639
Ben Dooks5718df92008-10-21 14:07:09 +0100640static void __init smdk6410_map_io(void)
641{
Ben Dooksd6662c32008-12-12 00:24:40 +0000642 u32 tmp;
643
Ben Dooks5718df92008-10-21 14:07:09 +0100644 s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
645 s3c24xx_init_clocks(12000000);
646 s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
Ben Dooksd6662c32008-12-12 00:24:40 +0000647
648 /* set the LCD type */
649
650 tmp = __raw_readl(S3C64XX_SPCON);
651 tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
652 tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
653 __raw_writel(tmp, S3C64XX_SPCON);
654
655 /* remove the lcd bypass */
656 tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
657 tmp &= ~MIFPCON_LCD_BYPASS;
658 __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
Ben Dooks5718df92008-10-21 14:07:09 +0100659}
660
661static void __init smdk6410_machine_init(void)
662{
Andy Greenf01fdac2009-12-29 14:40:36 +0000663 u32 cs1;
664
Ben Dooksd85fa242008-10-31 16:14:52 +0000665 s3c_i2c0_set_platdata(NULL);
Ben Dooksd7ea3742008-10-31 16:14:57 +0000666 s3c_i2c1_set_platdata(NULL);
Ben Dooks438a5d42008-11-19 15:41:34 +0000667 s3c_fb_set_platdata(&smdk6410_lcd_pdata);
Ben Dooks096941e2008-10-31 16:14:59 +0000668
Naveen Krishna Ch290d0982010-06-22 07:39:18 +0900669 samsung_keypad_set_platdata(&smdk6410_keypad_data);
670
Naveen Krishna Ch85b14a32010-05-20 11:39:52 +0900671 s3c24xx_ts_set_platdata(&s3c_ts_platform);
672
Andy Greenf01fdac2009-12-29 14:40:36 +0000673 /* configure nCS1 width to 16 bits */
674
675 cs1 = __raw_readl(S3C64XX_SROM_BW) &
676 ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
677 cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
678 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
679 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
680 S3C64XX_SROM_BW__NCS1__SHIFT;
681 __raw_writel(cs1, S3C64XX_SROM_BW);
682
683 /* set timing for nCS1 suitable for ethernet chip */
684
685 __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
686 (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
687 (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
688 (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
689 (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
690 (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
691 (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
692
Mark Brownb7f9a942009-04-08 16:12:35 +0100693 gpio_request(S3C64XX_GPN(5), "LCD power");
694 gpio_request(S3C64XX_GPF(13), "LCD power");
695 gpio_request(S3C64XX_GPF(15), "LCD power");
696
Ben Dooks096941e2008-10-31 16:14:59 +0000697 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
698 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
699
Abhilash Kesavan0ab0b6d2010-06-08 16:55:45 +0900700 s3c_ide_set_platdata(&smdk6410_ide_pdata);
701
Ben Dooks5718df92008-10-21 14:07:09 +0100702 platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
703}
704
705MACHINE_START(SMDK6410, "SMDK6410")
Ben Dooksafdd2252010-05-07 09:24:05 +0900706 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
Ben Dooks5718df92008-10-21 14:07:09 +0100707 .phys_io = S3C_PA_UART & 0xfff00000,
708 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
709 .boot_params = S3C64XX_PA_SDRAM + 0x100,
710
711 .init_irq = s3c6410_init_irq,
712 .map_io = smdk6410_map_io,
713 .init_machine = smdk6410_machine_init,
714 .timer = &s3c24xx_timer,
715MACHINE_END