Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * File: msi.c |
| 3 | * Purpose: PCI Message Signaled Interrupt (MSI) |
| 4 | * |
| 5 | * Copyright (C) 2003-2004 Intel |
| 6 | * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com) |
| 7 | */ |
| 8 | |
| 9 | #include <linux/mm.h> |
| 10 | #include <linux/irq.h> |
| 11 | #include <linux/interrupt.h> |
| 12 | #include <linux/init.h> |
| 13 | #include <linux/config.h> |
| 14 | #include <linux/ioport.h> |
| 15 | #include <linux/smp_lock.h> |
| 16 | #include <linux/pci.h> |
| 17 | #include <linux/proc_fs.h> |
| 18 | |
| 19 | #include <asm/errno.h> |
| 20 | #include <asm/io.h> |
| 21 | #include <asm/smp.h> |
| 22 | |
| 23 | #include "pci.h" |
| 24 | #include "msi.h" |
| 25 | |
| 26 | static DEFINE_SPINLOCK(msi_lock); |
| 27 | static struct msi_desc* msi_desc[NR_IRQS] = { [0 ... NR_IRQS-1] = NULL }; |
| 28 | static kmem_cache_t* msi_cachep; |
| 29 | |
| 30 | static int pci_msi_enable = 1; |
Greg Kroah-Hartman | 70549ad | 2005-06-06 23:07:46 -0700 | [diff] [blame] | 31 | static int last_alloc_vector; |
| 32 | static int nr_released_vectors; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | static int nr_reserved_vectors = NR_HP_RESERVED_VECTORS; |
Greg Kroah-Hartman | 70549ad | 2005-06-06 23:07:46 -0700 | [diff] [blame] | 34 | static int nr_msix_devices; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | |
| 36 | #ifndef CONFIG_X86_IO_APIC |
| 37 | int vector_irq[NR_VECTORS] = { [0 ... NR_VECTORS - 1] = -1}; |
Mark Maule | 1008307 | 2006-04-14 16:03:49 -0500 | [diff] [blame] | 38 | u8 irq_vector[NR_IRQ_VECTORS]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 39 | #endif |
| 40 | |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 41 | static struct msi_ops *msi_ops; |
| 42 | |
| 43 | int |
| 44 | msi_register(struct msi_ops *ops) |
| 45 | { |
| 46 | msi_ops = ops; |
| 47 | return 0; |
| 48 | } |
| 49 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 50 | static void msi_cache_ctor(void *p, kmem_cache_t *cache, unsigned long flags) |
| 51 | { |
| 52 | memset(p, 0, NR_IRQS * sizeof(struct msi_desc)); |
| 53 | } |
| 54 | |
| 55 | static int msi_cache_init(void) |
| 56 | { |
| 57 | msi_cachep = kmem_cache_create("msi_cache", |
| 58 | NR_IRQS * sizeof(struct msi_desc), |
| 59 | 0, SLAB_HWCACHE_ALIGN, msi_cache_ctor, NULL); |
| 60 | if (!msi_cachep) |
| 61 | return -ENOMEM; |
| 62 | |
| 63 | return 0; |
| 64 | } |
| 65 | |
| 66 | static void msi_set_mask_bit(unsigned int vector, int flag) |
| 67 | { |
| 68 | struct msi_desc *entry; |
| 69 | |
| 70 | entry = (struct msi_desc *)msi_desc[vector]; |
| 71 | if (!entry || !entry->dev || !entry->mask_base) |
| 72 | return; |
| 73 | switch (entry->msi_attrib.type) { |
| 74 | case PCI_CAP_ID_MSI: |
| 75 | { |
| 76 | int pos; |
| 77 | u32 mask_bits; |
| 78 | |
| 79 | pos = (long)entry->mask_base; |
| 80 | pci_read_config_dword(entry->dev, pos, &mask_bits); |
| 81 | mask_bits &= ~(1); |
| 82 | mask_bits |= flag; |
| 83 | pci_write_config_dword(entry->dev, pos, mask_bits); |
| 84 | break; |
| 85 | } |
| 86 | case PCI_CAP_ID_MSIX: |
| 87 | { |
| 88 | int offset = entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + |
| 89 | PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET; |
| 90 | writel(flag, entry->mask_base + offset); |
| 91 | break; |
| 92 | } |
| 93 | default: |
| 94 | break; |
| 95 | } |
| 96 | } |
| 97 | |
| 98 | #ifdef CONFIG_SMP |
| 99 | static void set_msi_affinity(unsigned int vector, cpumask_t cpu_mask) |
| 100 | { |
| 101 | struct msi_desc *entry; |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 102 | u32 address_hi, address_lo; |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 103 | unsigned int irq = vector; |
Ashok Raj | b4033c1 | 2005-11-08 21:42:33 -0800 | [diff] [blame] | 104 | unsigned int dest_cpu = first_cpu(cpu_mask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 105 | |
| 106 | entry = (struct msi_desc *)msi_desc[vector]; |
| 107 | if (!entry || !entry->dev) |
| 108 | return; |
| 109 | |
| 110 | switch (entry->msi_attrib.type) { |
| 111 | case PCI_CAP_ID_MSI: |
| 112 | { |
Grant Grundler | b64c05e | 2006-01-14 00:34:53 -0700 | [diff] [blame] | 113 | int pos = pci_find_capability(entry->dev, PCI_CAP_ID_MSI); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 114 | |
Grant Grundler | b64c05e | 2006-01-14 00:34:53 -0700 | [diff] [blame] | 115 | if (!pos) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 116 | return; |
| 117 | |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 118 | pci_read_config_dword(entry->dev, msi_upper_address_reg(pos), |
| 119 | &address_hi); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 120 | pci_read_config_dword(entry->dev, msi_lower_address_reg(pos), |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 121 | &address_lo); |
| 122 | |
| 123 | msi_ops->target(vector, dest_cpu, &address_hi, &address_lo); |
| 124 | |
| 125 | pci_write_config_dword(entry->dev, msi_upper_address_reg(pos), |
| 126 | address_hi); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 127 | pci_write_config_dword(entry->dev, msi_lower_address_reg(pos), |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 128 | address_lo); |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 129 | set_native_irq_info(irq, cpu_mask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 130 | break; |
| 131 | } |
| 132 | case PCI_CAP_ID_MSIX: |
| 133 | { |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 134 | int offset_hi = |
| 135 | entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + |
| 136 | PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET; |
| 137 | int offset_lo = |
| 138 | entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + |
| 139 | PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 140 | |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 141 | address_hi = readl(entry->mask_base + offset_hi); |
| 142 | address_lo = readl(entry->mask_base + offset_lo); |
| 143 | |
| 144 | msi_ops->target(vector, dest_cpu, &address_hi, &address_lo); |
| 145 | |
| 146 | writel(address_hi, entry->mask_base + offset_hi); |
| 147 | writel(address_lo, entry->mask_base + offset_lo); |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 148 | set_native_irq_info(irq, cpu_mask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 149 | break; |
| 150 | } |
| 151 | default: |
| 152 | break; |
| 153 | } |
| 154 | } |
Grant Grundler | 8169b5d | 2006-01-03 18:51:46 -0800 | [diff] [blame] | 155 | #else |
| 156 | #define set_msi_affinity NULL |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 157 | #endif /* CONFIG_SMP */ |
| 158 | |
| 159 | static void mask_MSI_irq(unsigned int vector) |
| 160 | { |
| 161 | msi_set_mask_bit(vector, 1); |
| 162 | } |
| 163 | |
| 164 | static void unmask_MSI_irq(unsigned int vector) |
| 165 | { |
| 166 | msi_set_mask_bit(vector, 0); |
| 167 | } |
| 168 | |
| 169 | static unsigned int startup_msi_irq_wo_maskbit(unsigned int vector) |
| 170 | { |
| 171 | struct msi_desc *entry; |
| 172 | unsigned long flags; |
| 173 | |
| 174 | spin_lock_irqsave(&msi_lock, flags); |
| 175 | entry = msi_desc[vector]; |
| 176 | if (!entry || !entry->dev) { |
| 177 | spin_unlock_irqrestore(&msi_lock, flags); |
| 178 | return 0; |
| 179 | } |
| 180 | entry->msi_attrib.state = 1; /* Mark it active */ |
| 181 | spin_unlock_irqrestore(&msi_lock, flags); |
| 182 | |
| 183 | return 0; /* never anything pending */ |
| 184 | } |
| 185 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 186 | static unsigned int startup_msi_irq_w_maskbit(unsigned int vector) |
| 187 | { |
Greg Kroah-Hartman | 70549ad | 2005-06-06 23:07:46 -0700 | [diff] [blame] | 188 | startup_msi_irq_wo_maskbit(vector); |
| 189 | unmask_MSI_irq(vector); |
| 190 | return 0; /* never anything pending */ |
| 191 | } |
| 192 | |
| 193 | static void shutdown_msi_irq(unsigned int vector) |
| 194 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 195 | struct msi_desc *entry; |
| 196 | unsigned long flags; |
| 197 | |
| 198 | spin_lock_irqsave(&msi_lock, flags); |
| 199 | entry = msi_desc[vector]; |
Greg Kroah-Hartman | 70549ad | 2005-06-06 23:07:46 -0700 | [diff] [blame] | 200 | if (entry && entry->dev) |
| 201 | entry->msi_attrib.state = 0; /* Mark it not active */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 202 | spin_unlock_irqrestore(&msi_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 203 | } |
| 204 | |
Greg Kroah-Hartman | 70549ad | 2005-06-06 23:07:46 -0700 | [diff] [blame] | 205 | static void end_msi_irq_wo_maskbit(unsigned int vector) |
| 206 | { |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 207 | move_native_irq(vector); |
Greg Kroah-Hartman | 70549ad | 2005-06-06 23:07:46 -0700 | [diff] [blame] | 208 | ack_APIC_irq(); |
| 209 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 210 | |
| 211 | static void end_msi_irq_w_maskbit(unsigned int vector) |
| 212 | { |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 213 | move_native_irq(vector); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 214 | unmask_MSI_irq(vector); |
| 215 | ack_APIC_irq(); |
| 216 | } |
| 217 | |
Greg Kroah-Hartman | 70549ad | 2005-06-06 23:07:46 -0700 | [diff] [blame] | 218 | static void do_nothing(unsigned int vector) |
| 219 | { |
| 220 | } |
| 221 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 222 | /* |
| 223 | * Interrupt Type for MSI-X PCI/PCI-X/PCI-Express Devices, |
| 224 | * which implement the MSI-X Capability Structure. |
| 225 | */ |
| 226 | static struct hw_interrupt_type msix_irq_type = { |
| 227 | .typename = "PCI-MSI-X", |
| 228 | .startup = startup_msi_irq_w_maskbit, |
Greg Kroah-Hartman | 70549ad | 2005-06-06 23:07:46 -0700 | [diff] [blame] | 229 | .shutdown = shutdown_msi_irq, |
| 230 | .enable = unmask_MSI_irq, |
| 231 | .disable = mask_MSI_irq, |
| 232 | .ack = mask_MSI_irq, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 233 | .end = end_msi_irq_w_maskbit, |
Grant Grundler | 8169b5d | 2006-01-03 18:51:46 -0800 | [diff] [blame] | 234 | .set_affinity = set_msi_affinity |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 235 | }; |
| 236 | |
| 237 | /* |
| 238 | * Interrupt Type for MSI PCI/PCI-X/PCI-Express Devices, |
| 239 | * which implement the MSI Capability Structure with |
| 240 | * Mask-and-Pending Bits. |
| 241 | */ |
| 242 | static struct hw_interrupt_type msi_irq_w_maskbit_type = { |
| 243 | .typename = "PCI-MSI", |
| 244 | .startup = startup_msi_irq_w_maskbit, |
Greg Kroah-Hartman | 70549ad | 2005-06-06 23:07:46 -0700 | [diff] [blame] | 245 | .shutdown = shutdown_msi_irq, |
| 246 | .enable = unmask_MSI_irq, |
| 247 | .disable = mask_MSI_irq, |
| 248 | .ack = mask_MSI_irq, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 249 | .end = end_msi_irq_w_maskbit, |
Grant Grundler | 8169b5d | 2006-01-03 18:51:46 -0800 | [diff] [blame] | 250 | .set_affinity = set_msi_affinity |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 251 | }; |
| 252 | |
| 253 | /* |
| 254 | * Interrupt Type for MSI PCI/PCI-X/PCI-Express Devices, |
| 255 | * which implement the MSI Capability Structure without |
| 256 | * Mask-and-Pending Bits. |
| 257 | */ |
| 258 | static struct hw_interrupt_type msi_irq_wo_maskbit_type = { |
| 259 | .typename = "PCI-MSI", |
| 260 | .startup = startup_msi_irq_wo_maskbit, |
Greg Kroah-Hartman | 70549ad | 2005-06-06 23:07:46 -0700 | [diff] [blame] | 261 | .shutdown = shutdown_msi_irq, |
| 262 | .enable = do_nothing, |
| 263 | .disable = do_nothing, |
| 264 | .ack = do_nothing, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 265 | .end = end_msi_irq_wo_maskbit, |
Grant Grundler | 8169b5d | 2006-01-03 18:51:46 -0800 | [diff] [blame] | 266 | .set_affinity = set_msi_affinity |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 267 | }; |
| 268 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 269 | static int msi_free_vector(struct pci_dev* dev, int vector, int reassign); |
| 270 | static int assign_msi_vector(void) |
| 271 | { |
| 272 | static int new_vector_avail = 1; |
| 273 | int vector; |
| 274 | unsigned long flags; |
| 275 | |
| 276 | /* |
| 277 | * msi_lock is provided to ensure that successful allocation of MSI |
| 278 | * vector is assigned unique among drivers. |
| 279 | */ |
| 280 | spin_lock_irqsave(&msi_lock, flags); |
| 281 | |
| 282 | if (!new_vector_avail) { |
| 283 | int free_vector = 0; |
| 284 | |
| 285 | /* |
| 286 | * vector_irq[] = -1 indicates that this specific vector is: |
| 287 | * - assigned for MSI (since MSI have no associated IRQ) or |
| 288 | * - assigned for legacy if less than 16, or |
| 289 | * - having no corresponding 1:1 vector-to-IOxAPIC IRQ mapping |
| 290 | * vector_irq[] = 0 indicates that this vector, previously |
| 291 | * assigned for MSI, is freed by hotplug removed operations. |
| 292 | * This vector will be reused for any subsequent hotplug added |
| 293 | * operations. |
| 294 | * vector_irq[] > 0 indicates that this vector is assigned for |
| 295 | * IOxAPIC IRQs. This vector and its value provides a 1-to-1 |
| 296 | * vector-to-IOxAPIC IRQ mapping. |
| 297 | */ |
| 298 | for (vector = FIRST_DEVICE_VECTOR; vector < NR_IRQS; vector++) { |
| 299 | if (vector_irq[vector] != 0) |
| 300 | continue; |
| 301 | free_vector = vector; |
| 302 | if (!msi_desc[vector]) |
| 303 | break; |
| 304 | else |
| 305 | continue; |
| 306 | } |
| 307 | if (!free_vector) { |
| 308 | spin_unlock_irqrestore(&msi_lock, flags); |
| 309 | return -EBUSY; |
| 310 | } |
| 311 | vector_irq[free_vector] = -1; |
| 312 | nr_released_vectors--; |
| 313 | spin_unlock_irqrestore(&msi_lock, flags); |
| 314 | if (msi_desc[free_vector] != NULL) { |
| 315 | struct pci_dev *dev; |
| 316 | int tail; |
| 317 | |
| 318 | /* free all linked vectors before re-assign */ |
| 319 | do { |
| 320 | spin_lock_irqsave(&msi_lock, flags); |
| 321 | dev = msi_desc[free_vector]->dev; |
| 322 | tail = msi_desc[free_vector]->link.tail; |
| 323 | spin_unlock_irqrestore(&msi_lock, flags); |
| 324 | msi_free_vector(dev, tail, 1); |
| 325 | } while (free_vector != tail); |
| 326 | } |
| 327 | |
| 328 | return free_vector; |
| 329 | } |
| 330 | vector = assign_irq_vector(AUTO_ASSIGN); |
| 331 | last_alloc_vector = vector; |
| 332 | if (vector == LAST_DEVICE_VECTOR) |
| 333 | new_vector_avail = 0; |
| 334 | |
| 335 | spin_unlock_irqrestore(&msi_lock, flags); |
| 336 | return vector; |
| 337 | } |
| 338 | |
| 339 | static int get_new_vector(void) |
| 340 | { |
Grant Grundler | b64c05e | 2006-01-14 00:34:53 -0700 | [diff] [blame] | 341 | int vector = assign_msi_vector(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 342 | |
Grant Grundler | b64c05e | 2006-01-14 00:34:53 -0700 | [diff] [blame] | 343 | if (vector > 0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 344 | set_intr_gate(vector, interrupt[vector]); |
| 345 | |
| 346 | return vector; |
| 347 | } |
| 348 | |
| 349 | static int msi_init(void) |
| 350 | { |
| 351 | static int status = -ENOMEM; |
| 352 | |
| 353 | if (!status) |
| 354 | return status; |
| 355 | |
| 356 | if (pci_msi_quirk) { |
| 357 | pci_msi_enable = 0; |
| 358 | printk(KERN_WARNING "PCI: MSI quirk detected. MSI disabled.\n"); |
| 359 | status = -EINVAL; |
| 360 | return status; |
| 361 | } |
| 362 | |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 363 | status = msi_arch_init(); |
| 364 | if (status < 0) { |
| 365 | pci_msi_enable = 0; |
| 366 | printk(KERN_WARNING |
| 367 | "PCI: MSI arch init failed. MSI disabled.\n"); |
| 368 | return status; |
| 369 | } |
| 370 | |
| 371 | if (! msi_ops) { |
| 372 | printk(KERN_WARNING |
| 373 | "PCI: MSI ops not registered. MSI disabled.\n"); |
| 374 | status = -EINVAL; |
| 375 | return status; |
| 376 | } |
| 377 | |
| 378 | last_alloc_vector = assign_irq_vector(AUTO_ASSIGN); |
Grant Grundler | b64c05e | 2006-01-14 00:34:53 -0700 | [diff] [blame] | 379 | status = msi_cache_init(); |
| 380 | if (status < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 381 | pci_msi_enable = 0; |
| 382 | printk(KERN_WARNING "PCI: MSI cache init failed\n"); |
| 383 | return status; |
| 384 | } |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 385 | |
Mark Maule | 1008307 | 2006-04-14 16:03:49 -0500 | [diff] [blame] | 386 | #ifndef CONFIG_X86_IO_APIC |
| 387 | irq_vector[0] = FIRST_DEVICE_VECTOR; |
| 388 | #endif |
| 389 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 390 | if (last_alloc_vector < 0) { |
| 391 | pci_msi_enable = 0; |
| 392 | printk(KERN_WARNING "PCI: No interrupt vectors available for MSI\n"); |
| 393 | status = -EBUSY; |
| 394 | return status; |
| 395 | } |
| 396 | vector_irq[last_alloc_vector] = 0; |
| 397 | nr_released_vectors++; |
| 398 | |
| 399 | return status; |
| 400 | } |
| 401 | |
| 402 | static int get_msi_vector(struct pci_dev *dev) |
| 403 | { |
| 404 | return get_new_vector(); |
| 405 | } |
| 406 | |
| 407 | static struct msi_desc* alloc_msi_entry(void) |
| 408 | { |
| 409 | struct msi_desc *entry; |
| 410 | |
Greg Kroah-Hartman | 70549ad | 2005-06-06 23:07:46 -0700 | [diff] [blame] | 411 | entry = kmem_cache_alloc(msi_cachep, SLAB_KERNEL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 412 | if (!entry) |
| 413 | return NULL; |
| 414 | |
| 415 | memset(entry, 0, sizeof(struct msi_desc)); |
| 416 | entry->link.tail = entry->link.head = 0; /* single message */ |
| 417 | entry->dev = NULL; |
| 418 | |
| 419 | return entry; |
| 420 | } |
| 421 | |
| 422 | static void attach_msi_entry(struct msi_desc *entry, int vector) |
| 423 | { |
| 424 | unsigned long flags; |
| 425 | |
| 426 | spin_lock_irqsave(&msi_lock, flags); |
| 427 | msi_desc[vector] = entry; |
| 428 | spin_unlock_irqrestore(&msi_lock, flags); |
| 429 | } |
| 430 | |
| 431 | static void irq_handler_init(int cap_id, int pos, int mask) |
| 432 | { |
Ingo Molnar | f6bc266 | 2006-01-26 01:42:11 +0100 | [diff] [blame] | 433 | unsigned long flags; |
| 434 | |
| 435 | spin_lock_irqsave(&irq_desc[pos].lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 436 | if (cap_id == PCI_CAP_ID_MSIX) |
| 437 | irq_desc[pos].handler = &msix_irq_type; |
| 438 | else { |
| 439 | if (!mask) |
| 440 | irq_desc[pos].handler = &msi_irq_wo_maskbit_type; |
| 441 | else |
| 442 | irq_desc[pos].handler = &msi_irq_w_maskbit_type; |
| 443 | } |
Ingo Molnar | f6bc266 | 2006-01-26 01:42:11 +0100 | [diff] [blame] | 444 | spin_unlock_irqrestore(&irq_desc[pos].lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 445 | } |
| 446 | |
| 447 | static void enable_msi_mode(struct pci_dev *dev, int pos, int type) |
| 448 | { |
| 449 | u16 control; |
| 450 | |
| 451 | pci_read_config_word(dev, msi_control_reg(pos), &control); |
| 452 | if (type == PCI_CAP_ID_MSI) { |
| 453 | /* Set enabled bits to single MSI & enable MSI_enable bit */ |
| 454 | msi_enable(control, 1); |
| 455 | pci_write_config_word(dev, msi_control_reg(pos), control); |
| 456 | } else { |
| 457 | msix_enable(control); |
| 458 | pci_write_config_word(dev, msi_control_reg(pos), control); |
| 459 | } |
| 460 | if (pci_find_capability(dev, PCI_CAP_ID_EXP)) { |
| 461 | /* PCI Express Endpoint device detected */ |
Brett M Russ | a04ce0f | 2005-08-15 15:23:41 -0400 | [diff] [blame] | 462 | pci_intx(dev, 0); /* disable intx */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 463 | } |
| 464 | } |
| 465 | |
Kristen Accardi | 4602b88 | 2005-08-16 15:15:58 -0700 | [diff] [blame] | 466 | void disable_msi_mode(struct pci_dev *dev, int pos, int type) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 467 | { |
| 468 | u16 control; |
| 469 | |
| 470 | pci_read_config_word(dev, msi_control_reg(pos), &control); |
| 471 | if (type == PCI_CAP_ID_MSI) { |
| 472 | /* Set enabled bits to single MSI & enable MSI_enable bit */ |
| 473 | msi_disable(control); |
| 474 | pci_write_config_word(dev, msi_control_reg(pos), control); |
| 475 | } else { |
| 476 | msix_disable(control); |
| 477 | pci_write_config_word(dev, msi_control_reg(pos), control); |
| 478 | } |
| 479 | if (pci_find_capability(dev, PCI_CAP_ID_EXP)) { |
| 480 | /* PCI Express Endpoint device detected */ |
Brett M Russ | a04ce0f | 2005-08-15 15:23:41 -0400 | [diff] [blame] | 481 | pci_intx(dev, 1); /* enable intx */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 482 | } |
| 483 | } |
| 484 | |
| 485 | static int msi_lookup_vector(struct pci_dev *dev, int type) |
| 486 | { |
| 487 | int vector; |
| 488 | unsigned long flags; |
| 489 | |
| 490 | spin_lock_irqsave(&msi_lock, flags); |
| 491 | for (vector = FIRST_DEVICE_VECTOR; vector < NR_IRQS; vector++) { |
| 492 | if (!msi_desc[vector] || msi_desc[vector]->dev != dev || |
| 493 | msi_desc[vector]->msi_attrib.type != type || |
| 494 | msi_desc[vector]->msi_attrib.default_vector != dev->irq) |
| 495 | continue; |
| 496 | spin_unlock_irqrestore(&msi_lock, flags); |
| 497 | /* This pre-assigned MSI vector for this device |
| 498 | already exits. Override dev->irq with this vector */ |
| 499 | dev->irq = vector; |
| 500 | return 0; |
| 501 | } |
| 502 | spin_unlock_irqrestore(&msi_lock, flags); |
| 503 | |
| 504 | return -EACCES; |
| 505 | } |
| 506 | |
| 507 | void pci_scan_msi_device(struct pci_dev *dev) |
| 508 | { |
| 509 | if (!dev) |
| 510 | return; |
| 511 | |
| 512 | if (pci_find_capability(dev, PCI_CAP_ID_MSIX) > 0) |
| 513 | nr_msix_devices++; |
| 514 | else if (pci_find_capability(dev, PCI_CAP_ID_MSI) > 0) |
| 515 | nr_reserved_vectors++; |
| 516 | } |
| 517 | |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 518 | #ifdef CONFIG_PM |
| 519 | int pci_save_msi_state(struct pci_dev *dev) |
| 520 | { |
| 521 | int pos, i = 0; |
| 522 | u16 control; |
| 523 | struct pci_cap_saved_state *save_state; |
| 524 | u32 *cap; |
| 525 | |
| 526 | pos = pci_find_capability(dev, PCI_CAP_ID_MSI); |
| 527 | if (pos <= 0 || dev->no_msi) |
| 528 | return 0; |
| 529 | |
| 530 | pci_read_config_word(dev, msi_control_reg(pos), &control); |
| 531 | if (!(control & PCI_MSI_FLAGS_ENABLE)) |
| 532 | return 0; |
| 533 | |
| 534 | save_state = kzalloc(sizeof(struct pci_cap_saved_state) + sizeof(u32) * 5, |
| 535 | GFP_KERNEL); |
| 536 | if (!save_state) { |
| 537 | printk(KERN_ERR "Out of memory in pci_save_msi_state\n"); |
| 538 | return -ENOMEM; |
| 539 | } |
| 540 | cap = &save_state->data[0]; |
| 541 | |
| 542 | pci_read_config_dword(dev, pos, &cap[i++]); |
| 543 | control = cap[0] >> 16; |
| 544 | pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, &cap[i++]); |
| 545 | if (control & PCI_MSI_FLAGS_64BIT) { |
| 546 | pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_HI, &cap[i++]); |
| 547 | pci_read_config_dword(dev, pos + PCI_MSI_DATA_64, &cap[i++]); |
| 548 | } else |
| 549 | pci_read_config_dword(dev, pos + PCI_MSI_DATA_32, &cap[i++]); |
| 550 | if (control & PCI_MSI_FLAGS_MASKBIT) |
| 551 | pci_read_config_dword(dev, pos + PCI_MSI_MASK_BIT, &cap[i++]); |
| 552 | disable_msi_mode(dev, pos, PCI_CAP_ID_MSI); |
| 553 | save_state->cap_nr = PCI_CAP_ID_MSI; |
| 554 | pci_add_saved_cap(dev, save_state); |
| 555 | return 0; |
| 556 | } |
| 557 | |
| 558 | void pci_restore_msi_state(struct pci_dev *dev) |
| 559 | { |
| 560 | int i = 0, pos; |
| 561 | u16 control; |
| 562 | struct pci_cap_saved_state *save_state; |
| 563 | u32 *cap; |
| 564 | |
| 565 | save_state = pci_find_saved_cap(dev, PCI_CAP_ID_MSI); |
| 566 | pos = pci_find_capability(dev, PCI_CAP_ID_MSI); |
| 567 | if (!save_state || pos <= 0) |
| 568 | return; |
| 569 | cap = &save_state->data[0]; |
| 570 | |
| 571 | control = cap[i++] >> 16; |
| 572 | pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, cap[i++]); |
| 573 | if (control & PCI_MSI_FLAGS_64BIT) { |
| 574 | pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_HI, cap[i++]); |
| 575 | pci_write_config_dword(dev, pos + PCI_MSI_DATA_64, cap[i++]); |
| 576 | } else |
| 577 | pci_write_config_dword(dev, pos + PCI_MSI_DATA_32, cap[i++]); |
| 578 | if (control & PCI_MSI_FLAGS_MASKBIT) |
| 579 | pci_write_config_dword(dev, pos + PCI_MSI_MASK_BIT, cap[i++]); |
| 580 | pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control); |
| 581 | enable_msi_mode(dev, pos, PCI_CAP_ID_MSI); |
| 582 | pci_remove_saved_cap(save_state); |
| 583 | kfree(save_state); |
| 584 | } |
| 585 | |
| 586 | int pci_save_msix_state(struct pci_dev *dev) |
| 587 | { |
| 588 | int pos; |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 589 | int temp; |
| 590 | int vector, head, tail = 0; |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 591 | u16 control; |
| 592 | struct pci_cap_saved_state *save_state; |
| 593 | |
| 594 | pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); |
| 595 | if (pos <= 0 || dev->no_msi) |
| 596 | return 0; |
| 597 | |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 598 | /* save the capability */ |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 599 | pci_read_config_word(dev, msi_control_reg(pos), &control); |
| 600 | if (!(control & PCI_MSIX_FLAGS_ENABLE)) |
| 601 | return 0; |
| 602 | save_state = kzalloc(sizeof(struct pci_cap_saved_state) + sizeof(u16), |
| 603 | GFP_KERNEL); |
| 604 | if (!save_state) { |
| 605 | printk(KERN_ERR "Out of memory in pci_save_msix_state\n"); |
| 606 | return -ENOMEM; |
| 607 | } |
| 608 | *((u16 *)&save_state->data[0]) = control; |
| 609 | |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 610 | /* save the table */ |
| 611 | temp = dev->irq; |
| 612 | if (msi_lookup_vector(dev, PCI_CAP_ID_MSIX)) { |
| 613 | kfree(save_state); |
| 614 | return -EINVAL; |
| 615 | } |
| 616 | |
| 617 | vector = head = dev->irq; |
| 618 | while (head != tail) { |
| 619 | int j; |
| 620 | void __iomem *base; |
| 621 | struct msi_desc *entry; |
| 622 | |
| 623 | entry = msi_desc[vector]; |
| 624 | base = entry->mask_base; |
| 625 | j = entry->msi_attrib.entry_nr; |
| 626 | |
| 627 | entry->address_lo_save = |
| 628 | readl(base + j * PCI_MSIX_ENTRY_SIZE + |
| 629 | PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET); |
| 630 | entry->address_hi_save = |
| 631 | readl(base + j * PCI_MSIX_ENTRY_SIZE + |
| 632 | PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET); |
| 633 | entry->data_save = |
| 634 | readl(base + j * PCI_MSIX_ENTRY_SIZE + |
| 635 | PCI_MSIX_ENTRY_DATA_OFFSET); |
| 636 | |
| 637 | tail = msi_desc[vector]->link.tail; |
| 638 | vector = tail; |
| 639 | } |
| 640 | dev->irq = temp; |
| 641 | |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 642 | disable_msi_mode(dev, pos, PCI_CAP_ID_MSIX); |
| 643 | save_state->cap_nr = PCI_CAP_ID_MSIX; |
| 644 | pci_add_saved_cap(dev, save_state); |
| 645 | return 0; |
| 646 | } |
| 647 | |
| 648 | void pci_restore_msix_state(struct pci_dev *dev) |
| 649 | { |
| 650 | u16 save; |
| 651 | int pos; |
| 652 | int vector, head, tail = 0; |
| 653 | void __iomem *base; |
| 654 | int j; |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 655 | struct msi_desc *entry; |
| 656 | int temp; |
| 657 | struct pci_cap_saved_state *save_state; |
| 658 | |
| 659 | save_state = pci_find_saved_cap(dev, PCI_CAP_ID_MSIX); |
| 660 | if (!save_state) |
| 661 | return; |
| 662 | save = *((u16 *)&save_state->data[0]); |
| 663 | pci_remove_saved_cap(save_state); |
| 664 | kfree(save_state); |
| 665 | |
| 666 | pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); |
| 667 | if (pos <= 0) |
| 668 | return; |
| 669 | |
| 670 | /* route the table */ |
| 671 | temp = dev->irq; |
| 672 | if (msi_lookup_vector(dev, PCI_CAP_ID_MSIX)) |
| 673 | return; |
| 674 | vector = head = dev->irq; |
| 675 | while (head != tail) { |
| 676 | entry = msi_desc[vector]; |
| 677 | base = entry->mask_base; |
| 678 | j = entry->msi_attrib.entry_nr; |
| 679 | |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 680 | writel(entry->address_lo_save, |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 681 | base + j * PCI_MSIX_ENTRY_SIZE + |
| 682 | PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET); |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 683 | writel(entry->address_hi_save, |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 684 | base + j * PCI_MSIX_ENTRY_SIZE + |
| 685 | PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET); |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 686 | writel(entry->data_save, |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 687 | base + j * PCI_MSIX_ENTRY_SIZE + |
| 688 | PCI_MSIX_ENTRY_DATA_OFFSET); |
| 689 | |
| 690 | tail = msi_desc[vector]->link.tail; |
| 691 | vector = tail; |
| 692 | } |
| 693 | dev->irq = temp; |
| 694 | |
| 695 | pci_write_config_word(dev, msi_control_reg(pos), save); |
| 696 | enable_msi_mode(dev, pos, PCI_CAP_ID_MSIX); |
| 697 | } |
| 698 | #endif |
| 699 | |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 700 | static int msi_register_init(struct pci_dev *dev, struct msi_desc *entry) |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 701 | { |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 702 | int status; |
| 703 | u32 address_hi; |
| 704 | u32 address_lo; |
| 705 | u32 data; |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 706 | int pos, vector = dev->irq; |
| 707 | u16 control; |
| 708 | |
| 709 | pos = pci_find_capability(dev, PCI_CAP_ID_MSI); |
| 710 | pci_read_config_word(dev, msi_control_reg(pos), &control); |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 711 | |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 712 | /* Configure MSI capability structure */ |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 713 | status = msi_ops->setup(dev, vector, &address_hi, &address_lo, &data); |
| 714 | if (status < 0) |
| 715 | return status; |
| 716 | |
| 717 | pci_write_config_dword(dev, msi_lower_address_reg(pos), address_lo); |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 718 | if (is_64bit_address(control)) { |
| 719 | pci_write_config_dword(dev, |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 720 | msi_upper_address_reg(pos), address_hi); |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 721 | pci_write_config_word(dev, |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 722 | msi_data_reg(pos, 1), data); |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 723 | } else |
| 724 | pci_write_config_word(dev, |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 725 | msi_data_reg(pos, 0), data); |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 726 | if (entry->msi_attrib.maskbit) { |
| 727 | unsigned int maskbits, temp; |
| 728 | /* All MSIs are unmasked by default, Mask them all */ |
| 729 | pci_read_config_dword(dev, |
| 730 | msi_mask_bits_reg(pos, is_64bit_address(control)), |
| 731 | &maskbits); |
| 732 | temp = (1 << multi_msi_capable(control)); |
| 733 | temp = ((temp - 1) & ~temp); |
| 734 | maskbits |= temp; |
| 735 | pci_write_config_dword(dev, |
| 736 | msi_mask_bits_reg(pos, is_64bit_address(control)), |
| 737 | maskbits); |
| 738 | } |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 739 | |
| 740 | return 0; |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 741 | } |
| 742 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 743 | /** |
| 744 | * msi_capability_init - configure device's MSI capability structure |
| 745 | * @dev: pointer to the pci_dev data structure of MSI device function |
| 746 | * |
Steven Cole | eaae4b3 | 2005-05-03 18:38:30 -0600 | [diff] [blame] | 747 | * Setup the MSI capability structure of device function with a single |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 748 | * MSI vector, regardless of device function is capable of handling |
| 749 | * multiple messages. A return of zero indicates the successful setup |
| 750 | * of an entry zero with the new MSI vector or non-zero for otherwise. |
| 751 | **/ |
| 752 | static int msi_capability_init(struct pci_dev *dev) |
| 753 | { |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 754 | int status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 755 | struct msi_desc *entry; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 756 | int pos, vector; |
| 757 | u16 control; |
| 758 | |
| 759 | pos = pci_find_capability(dev, PCI_CAP_ID_MSI); |
| 760 | pci_read_config_word(dev, msi_control_reg(pos), &control); |
| 761 | /* MSI Entry Initialization */ |
Grant Grundler | b64c05e | 2006-01-14 00:34:53 -0700 | [diff] [blame] | 762 | entry = alloc_msi_entry(); |
| 763 | if (!entry) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 764 | return -ENOMEM; |
| 765 | |
Grant Grundler | b64c05e | 2006-01-14 00:34:53 -0700 | [diff] [blame] | 766 | vector = get_msi_vector(dev); |
| 767 | if (vector < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 768 | kmem_cache_free(msi_cachep, entry); |
| 769 | return -EBUSY; |
| 770 | } |
| 771 | entry->link.head = vector; |
| 772 | entry->link.tail = vector; |
| 773 | entry->msi_attrib.type = PCI_CAP_ID_MSI; |
| 774 | entry->msi_attrib.state = 0; /* Mark it not active */ |
| 775 | entry->msi_attrib.entry_nr = 0; |
| 776 | entry->msi_attrib.maskbit = is_mask_bit_support(control); |
| 777 | entry->msi_attrib.default_vector = dev->irq; /* Save IOAPIC IRQ */ |
| 778 | dev->irq = vector; |
| 779 | entry->dev = dev; |
| 780 | if (is_mask_bit_support(control)) { |
| 781 | entry->mask_base = (void __iomem *)(long)msi_mask_bits_reg(pos, |
| 782 | is_64bit_address(control)); |
| 783 | } |
| 784 | /* Replace with MSI handler */ |
| 785 | irq_handler_init(PCI_CAP_ID_MSI, vector, entry->msi_attrib.maskbit); |
| 786 | /* Configure MSI capability structure */ |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 787 | status = msi_register_init(dev, entry); |
| 788 | if (status != 0) { |
| 789 | dev->irq = entry->msi_attrib.default_vector; |
| 790 | kmem_cache_free(msi_cachep, entry); |
| 791 | return status; |
| 792 | } |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 793 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 794 | attach_msi_entry(entry, vector); |
| 795 | /* Set MSI enabled bits */ |
| 796 | enable_msi_mode(dev, pos, PCI_CAP_ID_MSI); |
| 797 | |
| 798 | return 0; |
| 799 | } |
| 800 | |
| 801 | /** |
| 802 | * msix_capability_init - configure device's MSI-X capability |
| 803 | * @dev: pointer to the pci_dev data structure of MSI-X device function |
Randy Dunlap | 8f7020d | 2005-10-23 11:57:38 -0700 | [diff] [blame] | 804 | * @entries: pointer to an array of struct msix_entry entries |
| 805 | * @nvec: number of @entries |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 806 | * |
Steven Cole | eaae4b3 | 2005-05-03 18:38:30 -0600 | [diff] [blame] | 807 | * Setup the MSI-X capability structure of device function with a |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 808 | * single MSI-X vector. A return of zero indicates the successful setup of |
| 809 | * requested MSI-X entries with allocated vectors or non-zero for otherwise. |
| 810 | **/ |
| 811 | static int msix_capability_init(struct pci_dev *dev, |
| 812 | struct msix_entry *entries, int nvec) |
| 813 | { |
| 814 | struct msi_desc *head = NULL, *tail = NULL, *entry = NULL; |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 815 | u32 address_hi; |
| 816 | u32 address_lo; |
| 817 | u32 data; |
| 818 | int status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 819 | int vector, pos, i, j, nr_entries, temp = 0; |
Grant Grundler | a0454b4 | 2006-02-16 23:58:29 -0800 | [diff] [blame] | 820 | unsigned long phys_addr; |
| 821 | u32 table_offset; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 822 | u16 control; |
| 823 | u8 bir; |
| 824 | void __iomem *base; |
| 825 | |
| 826 | pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); |
| 827 | /* Request & Map MSI-X table region */ |
| 828 | pci_read_config_word(dev, msi_control_reg(pos), &control); |
| 829 | nr_entries = multi_msix_capable(control); |
Grant Grundler | a0454b4 | 2006-02-16 23:58:29 -0800 | [diff] [blame] | 830 | |
| 831 | pci_read_config_dword(dev, msix_table_offset_reg(pos), &table_offset); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 832 | bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK); |
Grant Grundler | a0454b4 | 2006-02-16 23:58:29 -0800 | [diff] [blame] | 833 | table_offset &= ~PCI_MSIX_FLAGS_BIRMASK; |
| 834 | phys_addr = pci_resource_start (dev, bir) + table_offset; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 835 | base = ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE); |
| 836 | if (base == NULL) |
| 837 | return -ENOMEM; |
| 838 | |
| 839 | /* MSI-X Table Initialization */ |
| 840 | for (i = 0; i < nvec; i++) { |
| 841 | entry = alloc_msi_entry(); |
| 842 | if (!entry) |
| 843 | break; |
Grant Grundler | b64c05e | 2006-01-14 00:34:53 -0700 | [diff] [blame] | 844 | vector = get_msi_vector(dev); |
Jesper Juhl | f01f418 | 2006-04-17 04:02:54 +0200 | [diff] [blame] | 845 | if (vector < 0) { |
| 846 | kmem_cache_free(msi_cachep, entry); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 847 | break; |
Jesper Juhl | f01f418 | 2006-04-17 04:02:54 +0200 | [diff] [blame] | 848 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 849 | |
| 850 | j = entries[i].entry; |
| 851 | entries[i].vector = vector; |
| 852 | entry->msi_attrib.type = PCI_CAP_ID_MSIX; |
| 853 | entry->msi_attrib.state = 0; /* Mark it not active */ |
| 854 | entry->msi_attrib.entry_nr = j; |
| 855 | entry->msi_attrib.maskbit = 1; |
| 856 | entry->msi_attrib.default_vector = dev->irq; |
| 857 | entry->dev = dev; |
| 858 | entry->mask_base = base; |
| 859 | if (!head) { |
| 860 | entry->link.head = vector; |
| 861 | entry->link.tail = vector; |
| 862 | head = entry; |
| 863 | } else { |
| 864 | entry->link.head = temp; |
| 865 | entry->link.tail = tail->link.tail; |
| 866 | tail->link.tail = vector; |
| 867 | head->link.head = vector; |
| 868 | } |
| 869 | temp = vector; |
| 870 | tail = entry; |
| 871 | /* Replace with MSI-X handler */ |
| 872 | irq_handler_init(PCI_CAP_ID_MSIX, vector, 1); |
| 873 | /* Configure MSI-X capability structure */ |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 874 | status = msi_ops->setup(dev, vector, |
| 875 | &address_hi, |
| 876 | &address_lo, |
| 877 | &data); |
| 878 | if (status < 0) |
| 879 | break; |
| 880 | |
| 881 | writel(address_lo, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 882 | base + j * PCI_MSIX_ENTRY_SIZE + |
| 883 | PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET); |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 884 | writel(address_hi, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 885 | base + j * PCI_MSIX_ENTRY_SIZE + |
| 886 | PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET); |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 887 | writel(data, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 888 | base + j * PCI_MSIX_ENTRY_SIZE + |
| 889 | PCI_MSIX_ENTRY_DATA_OFFSET); |
| 890 | attach_msi_entry(entry, vector); |
| 891 | } |
| 892 | if (i != nvec) { |
| 893 | i--; |
| 894 | for (; i >= 0; i--) { |
| 895 | vector = (entries + i)->vector; |
| 896 | msi_free_vector(dev, vector, 0); |
| 897 | (entries + i)->vector = 0; |
| 898 | } |
| 899 | return -EBUSY; |
| 900 | } |
| 901 | /* Set MSI-X enabled bits */ |
| 902 | enable_msi_mode(dev, pos, PCI_CAP_ID_MSIX); |
| 903 | |
| 904 | return 0; |
| 905 | } |
| 906 | |
| 907 | /** |
| 908 | * pci_enable_msi - configure device's MSI capability structure |
| 909 | * @dev: pointer to the pci_dev data structure of MSI device function |
| 910 | * |
| 911 | * Setup the MSI capability structure of device function with |
| 912 | * a single MSI vector upon its software driver call to request for |
| 913 | * MSI mode enabled on its hardware device function. A return of zero |
| 914 | * indicates the successful setup of an entry zero with the new MSI |
| 915 | * vector or non-zero for otherwise. |
| 916 | **/ |
| 917 | int pci_enable_msi(struct pci_dev* dev) |
| 918 | { |
Brice Goglin | 1edab4a | 2006-05-23 03:05:27 -0400 | [diff] [blame] | 919 | struct pci_bus *bus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 920 | int pos, temp, status = -EINVAL; |
| 921 | u16 control; |
| 922 | |
| 923 | if (!pci_msi_enable || !dev) |
| 924 | return status; |
| 925 | |
Kristen Accardi | 4602b88 | 2005-08-16 15:15:58 -0700 | [diff] [blame] | 926 | if (dev->no_msi) |
| 927 | return status; |
| 928 | |
Brice Goglin | 1edab4a | 2006-05-23 03:05:27 -0400 | [diff] [blame] | 929 | for (bus = dev->bus; bus; bus = bus->parent) |
| 930 | if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI) |
| 931 | return -EINVAL; |
Michael S. Tsirkin | 6e325a6 | 2006-02-14 18:52:22 +0200 | [diff] [blame] | 932 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 933 | temp = dev->irq; |
| 934 | |
Grant Grundler | b64c05e | 2006-01-14 00:34:53 -0700 | [diff] [blame] | 935 | status = msi_init(); |
| 936 | if (status < 0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 937 | return status; |
| 938 | |
Grant Grundler | b64c05e | 2006-01-14 00:34:53 -0700 | [diff] [blame] | 939 | pos = pci_find_capability(dev, PCI_CAP_ID_MSI); |
| 940 | if (!pos) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 941 | return -EINVAL; |
| 942 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 943 | if (!msi_lookup_vector(dev, PCI_CAP_ID_MSI)) { |
| 944 | /* Lookup Sucess */ |
| 945 | unsigned long flags; |
| 946 | |
Rajesh Shah | 020d502 | 2006-05-23 10:14:36 -0700 | [diff] [blame^] | 947 | pci_read_config_word(dev, msi_control_reg(pos), &control); |
| 948 | if (control & PCI_MSI_FLAGS_ENABLE) |
| 949 | return 0; /* Already in MSI mode */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 950 | spin_lock_irqsave(&msi_lock, flags); |
| 951 | if (!vector_irq[dev->irq]) { |
| 952 | msi_desc[dev->irq]->msi_attrib.state = 0; |
| 953 | vector_irq[dev->irq] = -1; |
| 954 | nr_released_vectors--; |
| 955 | spin_unlock_irqrestore(&msi_lock, flags); |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 956 | status = msi_register_init(dev, msi_desc[dev->irq]); |
| 957 | if (status == 0) |
| 958 | enable_msi_mode(dev, pos, PCI_CAP_ID_MSI); |
| 959 | return status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 960 | } |
| 961 | spin_unlock_irqrestore(&msi_lock, flags); |
| 962 | dev->irq = temp; |
| 963 | } |
| 964 | /* Check whether driver already requested for MSI-X vectors */ |
Grant Grundler | b64c05e | 2006-01-14 00:34:53 -0700 | [diff] [blame] | 965 | pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); |
| 966 | if (pos > 0 && !msi_lookup_vector(dev, PCI_CAP_ID_MSIX)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 967 | printk(KERN_INFO "PCI: %s: Can't enable MSI. " |
| 968 | "Device already has MSI-X vectors assigned\n", |
| 969 | pci_name(dev)); |
| 970 | dev->irq = temp; |
| 971 | return -EINVAL; |
| 972 | } |
| 973 | status = msi_capability_init(dev); |
| 974 | if (!status) { |
| 975 | if (!pos) |
| 976 | nr_reserved_vectors--; /* Only MSI capable */ |
| 977 | else if (nr_msix_devices > 0) |
| 978 | nr_msix_devices--; /* Both MSI and MSI-X capable, |
| 979 | but choose enabling MSI */ |
| 980 | } |
| 981 | |
| 982 | return status; |
| 983 | } |
| 984 | |
| 985 | void pci_disable_msi(struct pci_dev* dev) |
| 986 | { |
| 987 | struct msi_desc *entry; |
| 988 | int pos, default_vector; |
| 989 | u16 control; |
| 990 | unsigned long flags; |
| 991 | |
Matthew Wilcox | 309e57d | 2006-03-05 22:33:34 -0700 | [diff] [blame] | 992 | if (!pci_msi_enable) |
| 993 | return; |
Grant Grundler | b64c05e | 2006-01-14 00:34:53 -0700 | [diff] [blame] | 994 | if (!dev) |
| 995 | return; |
Matthew Wilcox | 309e57d | 2006-03-05 22:33:34 -0700 | [diff] [blame] | 996 | |
Grant Grundler | b64c05e | 2006-01-14 00:34:53 -0700 | [diff] [blame] | 997 | pos = pci_find_capability(dev, PCI_CAP_ID_MSI); |
| 998 | if (!pos) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 999 | return; |
| 1000 | |
| 1001 | pci_read_config_word(dev, msi_control_reg(pos), &control); |
| 1002 | if (!(control & PCI_MSI_FLAGS_ENABLE)) |
| 1003 | return; |
| 1004 | |
| 1005 | spin_lock_irqsave(&msi_lock, flags); |
| 1006 | entry = msi_desc[dev->irq]; |
| 1007 | if (!entry || !entry->dev || entry->msi_attrib.type != PCI_CAP_ID_MSI) { |
| 1008 | spin_unlock_irqrestore(&msi_lock, flags); |
| 1009 | return; |
| 1010 | } |
| 1011 | if (entry->msi_attrib.state) { |
| 1012 | spin_unlock_irqrestore(&msi_lock, flags); |
| 1013 | printk(KERN_WARNING "PCI: %s: pci_disable_msi() called without " |
| 1014 | "free_irq() on MSI vector %d\n", |
| 1015 | pci_name(dev), dev->irq); |
| 1016 | BUG_ON(entry->msi_attrib.state > 0); |
| 1017 | } else { |
| 1018 | vector_irq[dev->irq] = 0; /* free it */ |
| 1019 | nr_released_vectors++; |
| 1020 | default_vector = entry->msi_attrib.default_vector; |
| 1021 | spin_unlock_irqrestore(&msi_lock, flags); |
| 1022 | /* Restore dev->irq to its default pin-assertion vector */ |
| 1023 | dev->irq = default_vector; |
| 1024 | disable_msi_mode(dev, pci_find_capability(dev, PCI_CAP_ID_MSI), |
| 1025 | PCI_CAP_ID_MSI); |
| 1026 | } |
| 1027 | } |
| 1028 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1029 | static int msi_free_vector(struct pci_dev* dev, int vector, int reassign) |
| 1030 | { |
| 1031 | struct msi_desc *entry; |
| 1032 | int head, entry_nr, type; |
| 1033 | void __iomem *base; |
| 1034 | unsigned long flags; |
| 1035 | |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 1036 | msi_ops->teardown(vector); |
| 1037 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1038 | spin_lock_irqsave(&msi_lock, flags); |
| 1039 | entry = msi_desc[vector]; |
| 1040 | if (!entry || entry->dev != dev) { |
| 1041 | spin_unlock_irqrestore(&msi_lock, flags); |
| 1042 | return -EINVAL; |
| 1043 | } |
| 1044 | type = entry->msi_attrib.type; |
| 1045 | entry_nr = entry->msi_attrib.entry_nr; |
| 1046 | head = entry->link.head; |
| 1047 | base = entry->mask_base; |
| 1048 | msi_desc[entry->link.head]->link.tail = entry->link.tail; |
| 1049 | msi_desc[entry->link.tail]->link.head = entry->link.head; |
| 1050 | entry->dev = NULL; |
| 1051 | if (!reassign) { |
| 1052 | vector_irq[vector] = 0; |
| 1053 | nr_released_vectors++; |
| 1054 | } |
| 1055 | msi_desc[vector] = NULL; |
| 1056 | spin_unlock_irqrestore(&msi_lock, flags); |
| 1057 | |
| 1058 | kmem_cache_free(msi_cachep, entry); |
| 1059 | |
| 1060 | if (type == PCI_CAP_ID_MSIX) { |
| 1061 | if (!reassign) |
| 1062 | writel(1, base + |
| 1063 | entry_nr * PCI_MSIX_ENTRY_SIZE + |
| 1064 | PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET); |
| 1065 | |
| 1066 | if (head == vector) { |
| 1067 | /* |
| 1068 | * Detect last MSI-X vector to be released. |
| 1069 | * Release the MSI-X memory-mapped table. |
| 1070 | */ |
Grant Grundler | a0454b4 | 2006-02-16 23:58:29 -0800 | [diff] [blame] | 1071 | #if 0 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1072 | int pos, nr_entries; |
Grant Grundler | a0454b4 | 2006-02-16 23:58:29 -0800 | [diff] [blame] | 1073 | unsigned long phys_addr; |
| 1074 | u32 table_offset; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1075 | u16 control; |
| 1076 | u8 bir; |
| 1077 | |
| 1078 | pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); |
| 1079 | pci_read_config_word(dev, msi_control_reg(pos), |
| 1080 | &control); |
| 1081 | nr_entries = multi_msix_capable(control); |
| 1082 | pci_read_config_dword(dev, msix_table_offset_reg(pos), |
| 1083 | &table_offset); |
| 1084 | bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK); |
Grant Grundler | a0454b4 | 2006-02-16 23:58:29 -0800 | [diff] [blame] | 1085 | table_offset &= ~PCI_MSIX_FLAGS_BIRMASK; |
| 1086 | phys_addr = pci_resource_start(dev, bir) + table_offset; |
| 1087 | /* |
| 1088 | * FIXME! and what did you want to do with phys_addr? |
| 1089 | */ |
| 1090 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1091 | iounmap(base); |
| 1092 | } |
| 1093 | } |
| 1094 | |
| 1095 | return 0; |
| 1096 | } |
| 1097 | |
| 1098 | static int reroute_msix_table(int head, struct msix_entry *entries, int *nvec) |
| 1099 | { |
| 1100 | int vector = head, tail = 0; |
| 1101 | int i, j = 0, nr_entries = 0; |
| 1102 | void __iomem *base; |
| 1103 | unsigned long flags; |
| 1104 | |
| 1105 | spin_lock_irqsave(&msi_lock, flags); |
| 1106 | while (head != tail) { |
| 1107 | nr_entries++; |
| 1108 | tail = msi_desc[vector]->link.tail; |
| 1109 | if (entries[0].entry == msi_desc[vector]->msi_attrib.entry_nr) |
| 1110 | j = vector; |
| 1111 | vector = tail; |
| 1112 | } |
| 1113 | if (*nvec > nr_entries) { |
| 1114 | spin_unlock_irqrestore(&msi_lock, flags); |
| 1115 | *nvec = nr_entries; |
| 1116 | return -EINVAL; |
| 1117 | } |
| 1118 | vector = ((j > 0) ? j : head); |
| 1119 | for (i = 0; i < *nvec; i++) { |
| 1120 | j = msi_desc[vector]->msi_attrib.entry_nr; |
| 1121 | msi_desc[vector]->msi_attrib.state = 0; /* Mark it not active */ |
| 1122 | vector_irq[vector] = -1; /* Mark it busy */ |
| 1123 | nr_released_vectors--; |
| 1124 | entries[i].vector = vector; |
| 1125 | if (j != (entries + i)->entry) { |
| 1126 | base = msi_desc[vector]->mask_base; |
| 1127 | msi_desc[vector]->msi_attrib.entry_nr = |
| 1128 | (entries + i)->entry; |
| 1129 | writel( readl(base + j * PCI_MSIX_ENTRY_SIZE + |
| 1130 | PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET), base + |
| 1131 | (entries + i)->entry * PCI_MSIX_ENTRY_SIZE + |
| 1132 | PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET); |
| 1133 | writel( readl(base + j * PCI_MSIX_ENTRY_SIZE + |
| 1134 | PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET), base + |
| 1135 | (entries + i)->entry * PCI_MSIX_ENTRY_SIZE + |
| 1136 | PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET); |
| 1137 | writel( (readl(base + j * PCI_MSIX_ENTRY_SIZE + |
| 1138 | PCI_MSIX_ENTRY_DATA_OFFSET) & 0xff00) | vector, |
| 1139 | base + (entries+i)->entry*PCI_MSIX_ENTRY_SIZE + |
| 1140 | PCI_MSIX_ENTRY_DATA_OFFSET); |
| 1141 | } |
| 1142 | vector = msi_desc[vector]->link.tail; |
| 1143 | } |
| 1144 | spin_unlock_irqrestore(&msi_lock, flags); |
| 1145 | |
| 1146 | return 0; |
| 1147 | } |
| 1148 | |
| 1149 | /** |
| 1150 | * pci_enable_msix - configure device's MSI-X capability structure |
| 1151 | * @dev: pointer to the pci_dev data structure of MSI-X device function |
Greg Kroah-Hartman | 70549ad | 2005-06-06 23:07:46 -0700 | [diff] [blame] | 1152 | * @entries: pointer to an array of MSI-X entries |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1153 | * @nvec: number of MSI-X vectors requested for allocation by device driver |
| 1154 | * |
| 1155 | * Setup the MSI-X capability structure of device function with the number |
| 1156 | * of requested vectors upon its software driver call to request for |
| 1157 | * MSI-X mode enabled on its hardware device function. A return of zero |
| 1158 | * indicates the successful configuration of MSI-X capability structure |
| 1159 | * with new allocated MSI-X vectors. A return of < 0 indicates a failure. |
| 1160 | * Or a return of > 0 indicates that driver request is exceeding the number |
| 1161 | * of vectors available. Driver should use the returned value to re-send |
| 1162 | * its request. |
| 1163 | **/ |
| 1164 | int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec) |
| 1165 | { |
Brice Goglin | 1edab4a | 2006-05-23 03:05:27 -0400 | [diff] [blame] | 1166 | struct pci_bus *bus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1167 | int status, pos, nr_entries, free_vectors; |
| 1168 | int i, j, temp; |
| 1169 | u16 control; |
| 1170 | unsigned long flags; |
| 1171 | |
| 1172 | if (!pci_msi_enable || !dev || !entries) |
| 1173 | return -EINVAL; |
| 1174 | |
Brice Goglin | 1edab4a | 2006-05-23 03:05:27 -0400 | [diff] [blame] | 1175 | if (dev->no_msi) |
| 1176 | return -EINVAL; |
| 1177 | |
| 1178 | for (bus = dev->bus; bus; bus = bus->parent) |
| 1179 | if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI) |
| 1180 | return -EINVAL; |
| 1181 | |
Grant Grundler | b64c05e | 2006-01-14 00:34:53 -0700 | [diff] [blame] | 1182 | status = msi_init(); |
| 1183 | if (status < 0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1184 | return status; |
| 1185 | |
Grant Grundler | b64c05e | 2006-01-14 00:34:53 -0700 | [diff] [blame] | 1186 | pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); |
| 1187 | if (!pos) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1188 | return -EINVAL; |
| 1189 | |
| 1190 | pci_read_config_word(dev, msi_control_reg(pos), &control); |
| 1191 | if (control & PCI_MSIX_FLAGS_ENABLE) |
| 1192 | return -EINVAL; /* Already in MSI-X mode */ |
| 1193 | |
| 1194 | nr_entries = multi_msix_capable(control); |
| 1195 | if (nvec > nr_entries) |
| 1196 | return -EINVAL; |
| 1197 | |
| 1198 | /* Check for any invalid entries */ |
| 1199 | for (i = 0; i < nvec; i++) { |
| 1200 | if (entries[i].entry >= nr_entries) |
| 1201 | return -EINVAL; /* invalid entry */ |
| 1202 | for (j = i + 1; j < nvec; j++) { |
| 1203 | if (entries[i].entry == entries[j].entry) |
| 1204 | return -EINVAL; /* duplicate entry */ |
| 1205 | } |
| 1206 | } |
| 1207 | temp = dev->irq; |
| 1208 | if (!msi_lookup_vector(dev, PCI_CAP_ID_MSIX)) { |
| 1209 | /* Lookup Sucess */ |
| 1210 | nr_entries = nvec; |
| 1211 | /* Reroute MSI-X table */ |
| 1212 | if (reroute_msix_table(dev->irq, entries, &nr_entries)) { |
| 1213 | /* #requested > #previous-assigned */ |
| 1214 | dev->irq = temp; |
| 1215 | return nr_entries; |
| 1216 | } |
| 1217 | dev->irq = temp; |
| 1218 | enable_msi_mode(dev, pos, PCI_CAP_ID_MSIX); |
| 1219 | return 0; |
| 1220 | } |
| 1221 | /* Check whether driver already requested for MSI vector */ |
| 1222 | if (pci_find_capability(dev, PCI_CAP_ID_MSI) > 0 && |
| 1223 | !msi_lookup_vector(dev, PCI_CAP_ID_MSI)) { |
| 1224 | printk(KERN_INFO "PCI: %s: Can't enable MSI-X. " |
| 1225 | "Device already has an MSI vector assigned\n", |
| 1226 | pci_name(dev)); |
| 1227 | dev->irq = temp; |
| 1228 | return -EINVAL; |
| 1229 | } |
| 1230 | |
| 1231 | spin_lock_irqsave(&msi_lock, flags); |
| 1232 | /* |
| 1233 | * msi_lock is provided to ensure that enough vectors resources are |
| 1234 | * available before granting. |
| 1235 | */ |
| 1236 | free_vectors = pci_vector_resources(last_alloc_vector, |
| 1237 | nr_released_vectors); |
| 1238 | /* Ensure that each MSI/MSI-X device has one vector reserved by |
| 1239 | default to avoid any MSI-X driver to take all available |
| 1240 | resources */ |
| 1241 | free_vectors -= nr_reserved_vectors; |
| 1242 | /* Find the average of free vectors among MSI-X devices */ |
| 1243 | if (nr_msix_devices > 0) |
| 1244 | free_vectors /= nr_msix_devices; |
| 1245 | spin_unlock_irqrestore(&msi_lock, flags); |
| 1246 | |
| 1247 | if (nvec > free_vectors) { |
| 1248 | if (free_vectors > 0) |
| 1249 | return free_vectors; |
| 1250 | else |
| 1251 | return -EBUSY; |
| 1252 | } |
| 1253 | |
| 1254 | status = msix_capability_init(dev, entries, nvec); |
| 1255 | if (!status && nr_msix_devices > 0) |
| 1256 | nr_msix_devices--; |
| 1257 | |
| 1258 | return status; |
| 1259 | } |
| 1260 | |
| 1261 | void pci_disable_msix(struct pci_dev* dev) |
| 1262 | { |
| 1263 | int pos, temp; |
| 1264 | u16 control; |
| 1265 | |
Matthew Wilcox | 309e57d | 2006-03-05 22:33:34 -0700 | [diff] [blame] | 1266 | if (!pci_msi_enable) |
| 1267 | return; |
Grant Grundler | b64c05e | 2006-01-14 00:34:53 -0700 | [diff] [blame] | 1268 | if (!dev) |
| 1269 | return; |
| 1270 | |
| 1271 | pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); |
| 1272 | if (!pos) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1273 | return; |
| 1274 | |
| 1275 | pci_read_config_word(dev, msi_control_reg(pos), &control); |
| 1276 | if (!(control & PCI_MSIX_FLAGS_ENABLE)) |
| 1277 | return; |
| 1278 | |
| 1279 | temp = dev->irq; |
| 1280 | if (!msi_lookup_vector(dev, PCI_CAP_ID_MSIX)) { |
| 1281 | int state, vector, head, tail = 0, warning = 0; |
| 1282 | unsigned long flags; |
| 1283 | |
| 1284 | vector = head = dev->irq; |
| 1285 | spin_lock_irqsave(&msi_lock, flags); |
| 1286 | while (head != tail) { |
| 1287 | state = msi_desc[vector]->msi_attrib.state; |
| 1288 | if (state) |
| 1289 | warning = 1; |
| 1290 | else { |
| 1291 | vector_irq[vector] = 0; /* free it */ |
| 1292 | nr_released_vectors++; |
| 1293 | } |
| 1294 | tail = msi_desc[vector]->link.tail; |
| 1295 | vector = tail; |
| 1296 | } |
| 1297 | spin_unlock_irqrestore(&msi_lock, flags); |
| 1298 | if (warning) { |
| 1299 | dev->irq = temp; |
| 1300 | printk(KERN_WARNING "PCI: %s: pci_disable_msix() called without " |
| 1301 | "free_irq() on all MSI-X vectors\n", |
| 1302 | pci_name(dev)); |
| 1303 | BUG_ON(warning > 0); |
| 1304 | } else { |
| 1305 | dev->irq = temp; |
| 1306 | disable_msi_mode(dev, |
| 1307 | pci_find_capability(dev, PCI_CAP_ID_MSIX), |
| 1308 | PCI_CAP_ID_MSIX); |
| 1309 | |
| 1310 | } |
| 1311 | } |
| 1312 | } |
| 1313 | |
| 1314 | /** |
| 1315 | * msi_remove_pci_irq_vectors - reclaim MSI(X) vectors to unused state |
| 1316 | * @dev: pointer to the pci_dev data structure of MSI(X) device function |
| 1317 | * |
Steven Cole | eaae4b3 | 2005-05-03 18:38:30 -0600 | [diff] [blame] | 1318 | * Being called during hotplug remove, from which the device function |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1319 | * is hot-removed. All previous assigned MSI/MSI-X vectors, if |
| 1320 | * allocated for this device function, are reclaimed to unused state, |
| 1321 | * which may be used later on. |
| 1322 | **/ |
| 1323 | void msi_remove_pci_irq_vectors(struct pci_dev* dev) |
| 1324 | { |
| 1325 | int state, pos, temp; |
| 1326 | unsigned long flags; |
| 1327 | |
| 1328 | if (!pci_msi_enable || !dev) |
| 1329 | return; |
| 1330 | |
| 1331 | temp = dev->irq; /* Save IOAPIC IRQ */ |
Grant Grundler | b64c05e | 2006-01-14 00:34:53 -0700 | [diff] [blame] | 1332 | pos = pci_find_capability(dev, PCI_CAP_ID_MSI); |
| 1333 | if (pos > 0 && !msi_lookup_vector(dev, PCI_CAP_ID_MSI)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1334 | spin_lock_irqsave(&msi_lock, flags); |
| 1335 | state = msi_desc[dev->irq]->msi_attrib.state; |
| 1336 | spin_unlock_irqrestore(&msi_lock, flags); |
| 1337 | if (state) { |
| 1338 | printk(KERN_WARNING "PCI: %s: msi_remove_pci_irq_vectors() " |
| 1339 | "called without free_irq() on MSI vector %d\n", |
| 1340 | pci_name(dev), dev->irq); |
| 1341 | BUG_ON(state > 0); |
| 1342 | } else /* Release MSI vector assigned to this device */ |
| 1343 | msi_free_vector(dev, dev->irq, 0); |
| 1344 | dev->irq = temp; /* Restore IOAPIC IRQ */ |
| 1345 | } |
Grant Grundler | b64c05e | 2006-01-14 00:34:53 -0700 | [diff] [blame] | 1346 | pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); |
| 1347 | if (pos > 0 && !msi_lookup_vector(dev, PCI_CAP_ID_MSIX)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1348 | int vector, head, tail = 0, warning = 0; |
| 1349 | void __iomem *base = NULL; |
| 1350 | |
| 1351 | vector = head = dev->irq; |
| 1352 | while (head != tail) { |
| 1353 | spin_lock_irqsave(&msi_lock, flags); |
| 1354 | state = msi_desc[vector]->msi_attrib.state; |
| 1355 | tail = msi_desc[vector]->link.tail; |
| 1356 | base = msi_desc[vector]->mask_base; |
| 1357 | spin_unlock_irqrestore(&msi_lock, flags); |
| 1358 | if (state) |
| 1359 | warning = 1; |
| 1360 | else if (vector != head) /* Release MSI-X vector */ |
| 1361 | msi_free_vector(dev, vector, 0); |
| 1362 | vector = tail; |
| 1363 | } |
| 1364 | msi_free_vector(dev, vector, 0); |
| 1365 | if (warning) { |
| 1366 | /* Force to release the MSI-X memory-mapped table */ |
Grant Grundler | a0454b4 | 2006-02-16 23:58:29 -0800 | [diff] [blame] | 1367 | #if 0 |
| 1368 | unsigned long phys_addr; |
| 1369 | u32 table_offset; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1370 | u16 control; |
| 1371 | u8 bir; |
| 1372 | |
| 1373 | pci_read_config_word(dev, msi_control_reg(pos), |
| 1374 | &control); |
| 1375 | pci_read_config_dword(dev, msix_table_offset_reg(pos), |
| 1376 | &table_offset); |
| 1377 | bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK); |
Grant Grundler | a0454b4 | 2006-02-16 23:58:29 -0800 | [diff] [blame] | 1378 | table_offset &= ~PCI_MSIX_FLAGS_BIRMASK; |
| 1379 | phys_addr = pci_resource_start(dev, bir) + table_offset; |
| 1380 | /* |
| 1381 | * FIXME! and what did you want to do with phys_addr? |
| 1382 | */ |
| 1383 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1384 | iounmap(base); |
| 1385 | printk(KERN_WARNING "PCI: %s: msi_remove_pci_irq_vectors() " |
| 1386 | "called without free_irq() on all MSI-X vectors\n", |
| 1387 | pci_name(dev)); |
| 1388 | BUG_ON(warning > 0); |
| 1389 | } |
| 1390 | dev->irq = temp; /* Restore IOAPIC IRQ */ |
| 1391 | } |
| 1392 | } |
| 1393 | |
Matthew Wilcox | 309e57d | 2006-03-05 22:33:34 -0700 | [diff] [blame] | 1394 | void pci_no_msi(void) |
| 1395 | { |
| 1396 | pci_msi_enable = 0; |
| 1397 | } |
| 1398 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1399 | EXPORT_SYMBOL(pci_enable_msi); |
| 1400 | EXPORT_SYMBOL(pci_disable_msi); |
| 1401 | EXPORT_SYMBOL(pci_enable_msix); |
| 1402 | EXPORT_SYMBOL(pci_disable_msix); |