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Greg Ungerer0e152d82011-06-20 15:49:09 +10001comment "Processor Type"
2
Geert Uytterhoevenad8f9552011-12-26 20:32:02 +01003choice
4 prompt "CPU family support"
5 default M68KCLASSIC if MMU
6 default COLDFIRE if !MMU
7 help
8 The Freescale (was Motorola) M68K family of processors implements
9 the full 68000 processor instruction set.
Masanari Iida6b2aac42012-04-14 00:14:11 +090010 The Freescale ColdFire family of processors is a modern derivative
Geert Uytterhoevenad8f9552011-12-26 20:32:02 +010011 of the 68000 processor family. They are mainly targeted at embedded
12 applications, and are all System-On-Chip (SOC) devices, as opposed
13 to stand alone CPUs. They implement a subset of the original 68000
14 processor instruction set.
15 If you anticipate running this kernel on a computer with a classic
16 MC68xxx processor, select M68KCLASSIC.
17 If you anticipate running this kernel on a computer with a ColdFire
18 processor, select COLDFIRE.
19
20config M68KCLASSIC
21 bool "Classic M68K CPU family support"
22
23config COLDFIRE
24 bool "Coldfire CPU family support"
25 select GENERIC_GPIO
Steven Kingeac57942012-05-21 13:10:19 -070026 select ARCH_WANT_OPTIONAL_GPIOLIB
Mark Brown7563bbf2012-04-15 10:52:54 +010027 select ARCH_HAVE_CUSTOM_GPIO_H
Geert Uytterhoevenad8f9552011-12-26 20:32:02 +010028 select CPU_HAS_NO_BITFIELDS
29 select CPU_HAS_NO_MULDIV64
30 select GENERIC_CSUM
31
32endchoice
33
34if M68KCLASSIC
35
Greg Ungerer0e152d82011-06-20 15:49:09 +100036config M68000
37 bool
38 select CPU_HAS_NO_BITFIELDS
Greg Ungerer84f3fb72011-11-11 15:13:08 +100039 select CPU_HAS_NO_MULDIV64
Greg Ungerer7f73baf2011-10-18 15:49:19 +100040 select GENERIC_CSUM
Greg Ungerer0e152d82011-06-20 15:49:09 +100041 help
42 The Freescale (was Motorola) 68000 CPU is the first generation of
43 the well known M68K family of processors. The CPU core as well as
44 being available as a stand alone CPU was also used in many
45 System-On-Chip devices (eg 68328, 68302, etc). It does not contain
46 a paging MMU.
47
48config MCPU32
49 bool
50 select CPU_HAS_NO_BITFIELDS
51 help
52 The Freescale (was then Motorola) CPU32 is a CPU core that is
53 based on the 68020 processor. For the most part it is used in
54 System-On-Chip parts, and does not contain a paging MMU.
55
Greg Ungerer0e152d82011-06-20 15:49:09 +100056config M68020
57 bool "68020 support"
58 depends on MMU
Greg Ungerer5717a022011-10-19 16:27:30 +100059 select GENERIC_ATOMIC64
Greg Ungerere08d7032011-10-14 14:43:30 +100060 select CPU_HAS_ADDRESS_SPACES
Greg Ungerer0e152d82011-06-20 15:49:09 +100061 help
62 If you anticipate running this kernel on a computer with a MC68020
63 processor, say Y. Otherwise, say N. Note that the 68020 requires a
64 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
65 Sun 3, which provides its own version.
66
67config M68030
68 bool "68030 support"
69 depends on MMU && !MMU_SUN3
Greg Ungerer5717a022011-10-19 16:27:30 +100070 select GENERIC_ATOMIC64
Greg Ungerere08d7032011-10-14 14:43:30 +100071 select CPU_HAS_ADDRESS_SPACES
Greg Ungerer0e152d82011-06-20 15:49:09 +100072 help
73 If you anticipate running this kernel on a computer with a MC68030
74 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
75 work, as it does not include an MMU (Memory Management Unit).
76
77config M68040
78 bool "68040 support"
79 depends on MMU && !MMU_SUN3
Greg Ungerer5717a022011-10-19 16:27:30 +100080 select GENERIC_ATOMIC64
Greg Ungerere08d7032011-10-14 14:43:30 +100081 select CPU_HAS_ADDRESS_SPACES
Greg Ungerer0e152d82011-06-20 15:49:09 +100082 help
83 If you anticipate running this kernel on a computer with a MC68LC040
84 or MC68040 processor, say Y. Otherwise, say N. Note that an
85 MC68EC040 will not work, as it does not include an MMU (Memory
86 Management Unit).
87
88config M68060
89 bool "68060 support"
90 depends on MMU && !MMU_SUN3
Greg Ungerer5717a022011-10-19 16:27:30 +100091 select GENERIC_ATOMIC64
Greg Ungerere08d7032011-10-14 14:43:30 +100092 select CPU_HAS_ADDRESS_SPACES
Greg Ungerer0e152d82011-06-20 15:49:09 +100093 help
94 If you anticipate running this kernel on a computer with a MC68060
95 processor, say Y. Otherwise, say N.
96
97config M68328
98 bool "MC68328"
99 depends on !MMU
100 select M68000
101 help
102 Motorola 68328 processor support.
103
104config M68EZ328
105 bool "MC68EZ328"
106 depends on !MMU
107 select M68000
108 help
109 Motorola 68EX328 processor support.
110
111config M68VZ328
112 bool "MC68VZ328"
113 depends on !MMU
114 select M68000
115 help
116 Motorola 68VZ328 processor support.
117
118config M68360
119 bool "MC68360"
120 depends on !MMU
121 select MCPU32
122 help
123 Motorola 68360 processor support.
124
Geert Uytterhoevenad8f9552011-12-26 20:32:02 +0100125endif # M68KCLASSIC
126
127if COLDFIRE
128
Greg Ungerer0e152d82011-06-20 15:49:09 +1000129config M5206
130 bool "MCF5206"
131 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000132 select COLDFIRE_SW_A7
133 select HAVE_MBAR
134 help
135 Motorola ColdFire 5206 processor support.
136
137config M5206e
138 bool "MCF5206e"
139 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000140 select COLDFIRE_SW_A7
141 select HAVE_MBAR
142 help
143 Motorola ColdFire 5206e processor support.
144
145config M520x
146 bool "MCF520x"
147 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000148 select GENERIC_CLOCKEVENTS
149 select HAVE_CACHE_SPLIT
150 help
151 Freescale Coldfire 5207/5208 processor support.
152
153config M523x
154 bool "MCF523x"
155 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000156 select GENERIC_CLOCKEVENTS
157 select HAVE_CACHE_SPLIT
158 select HAVE_IPSBAR
159 help
160 Freescale Coldfire 5230/1/2/4/5 processor support
161
162config M5249
163 bool "MCF5249"
164 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000165 select COLDFIRE_SW_A7
166 select HAVE_MBAR
167 help
168 Motorola ColdFire 5249 processor support.
169
Steven King04e037a2012-06-05 08:23:08 -0700170config M525x
171 bool "MCF525x"
172 depends on !MMU
173 select COLDFIRE_SW_A7
174 select HAVE_MBAR
175 help
176 Freescale (Motorola) Coldfire 5251/5253 processor support.
177
Greg Ungerer0e152d82011-06-20 15:49:09 +1000178config M527x
179 bool
180
181config M5271
182 bool "MCF5271"
183 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000184 select M527x
185 select HAVE_CACHE_SPLIT
186 select HAVE_IPSBAR
187 select GENERIC_CLOCKEVENTS
188 help
189 Freescale (Motorola) ColdFire 5270/5271 processor support.
190
191config M5272
192 bool "MCF5272"
193 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000194 select COLDFIRE_SW_A7
195 select HAVE_MBAR
196 help
197 Motorola ColdFire 5272 processor support.
198
199config M5275
200 bool "MCF5275"
201 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000202 select M527x
203 select HAVE_CACHE_SPLIT
204 select HAVE_IPSBAR
205 select GENERIC_CLOCKEVENTS
206 help
207 Freescale (Motorola) ColdFire 5274/5275 processor support.
208
209config M528x
210 bool "MCF528x"
211 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000212 select GENERIC_CLOCKEVENTS
213 select HAVE_CACHE_SPLIT
214 select HAVE_IPSBAR
215 help
216 Motorola ColdFire 5280/5282 processor support.
217
218config M5307
219 bool "MCF5307"
220 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000221 select COLDFIRE_SW_A7
222 select HAVE_CACHE_CB
223 select HAVE_MBAR
224 help
225 Motorola ColdFire 5307 processor support.
226
227config M532x
228 bool "MCF532x"
229 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000230 select HAVE_CACHE_CB
231 help
232 Freescale (Motorola) ColdFire 532x processor support.
233
234config M5407
235 bool "MCF5407"
236 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000237 select COLDFIRE_SW_A7
238 select HAVE_CACHE_CB
239 select HAVE_MBAR
240 help
241 Motorola ColdFire 5407 processor support.
242
243config M54xx
244 bool
245
246config M547x
247 bool "MCF547x"
Greg Ungerer0e152d82011-06-20 15:49:09 +1000248 select M54xx
Greg Ungerer1f7034b2011-10-19 14:13:18 +1000249 select MMU_COLDFIRE if MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000250 select HAVE_CACHE_CB
251 select HAVE_MBAR
252 help
253 Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
254
255config M548x
256 bool "MCF548x"
Greg Ungerer1f7034b2011-10-19 14:13:18 +1000257 select MMU_COLDFIRE if MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000258 select M54xx
259 select HAVE_CACHE_CB
260 select HAVE_MBAR
261 help
262 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
263
Geert Uytterhoevenad8f9552011-12-26 20:32:02 +0100264endif # COLDFIRE
265
Greg Ungerer0e152d82011-06-20 15:49:09 +1000266
267comment "Processor Specific Options"
268
269config M68KFPU_EMU
270 bool "Math emulation support (EXPERIMENTAL)"
271 depends on MMU
272 depends on EXPERIMENTAL
273 help
274 At some point in the future, this will cause floating-point math
275 instructions to be emulated by the kernel on machines that lack a
276 floating-point math coprocessor. Thrill-seekers and chronically
277 sleep-deprived psychotic hacker types can say Y now, everyone else
278 should probably wait a while.
279
280config M68KFPU_EMU_EXTRAPREC
281 bool "Math emulation extra precision"
282 depends on M68KFPU_EMU
283 help
284 The fpu uses normally a few bit more during calculations for
285 correct rounding, the emulator can (often) do the same but this
286 extra calculation can cost quite some time, so you can disable
287 it here. The emulator will then "only" calculate with a 64 bit
288 mantissa and round slightly incorrect, what is more than enough
289 for normal usage.
290
291config M68KFPU_EMU_ONLY
292 bool "Math emulation only kernel"
293 depends on M68KFPU_EMU
294 help
295 This option prevents any floating-point instructions from being
296 compiled into the kernel, thereby the kernel doesn't save any
297 floating point context anymore during task switches, so this
298 kernel will only be usable on machines without a floating-point
299 math coprocessor. This makes the kernel a bit faster as no tests
300 needs to be executed whether a floating-point instruction in the
301 kernel should be executed or not.
302
303config ADVANCED
304 bool "Advanced configuration options"
305 depends on MMU
306 ---help---
307 This gives you access to some advanced options for the CPU. The
308 defaults should be fine for most users, but these options may make
309 it possible for you to improve performance somewhat if you know what
310 you are doing.
311
312 Note that the answer to this question won't directly affect the
313 kernel: saying N will just cause the configurator to skip all
314 the questions about these options.
315
316 Most users should say N to this question.
317
318config RMW_INSNS
319 bool "Use read-modify-write instructions"
320 depends on ADVANCED
321 ---help---
322 This allows to use certain instructions that work with indivisible
323 read-modify-write bus cycles. While this is faster than the
324 workaround of disabling interrupts, it can conflict with DMA
325 ( = direct memory access) on many Amiga systems, and it is also said
326 to destabilize other machines. It is very likely that this will
327 cause serious problems on any Amiga or Atari Medusa if set. The only
328 configuration where it should work are 68030-based Ataris, where it
329 apparently improves performance. But you've been warned! Unless you
330 really know what you are doing, say N. Try Y only if you're quite
331 adventurous.
332
333config SINGLE_MEMORY_CHUNK
334 bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
335 depends on MMU
336 default y if SUN3
337 select NEED_MULTIPLE_NODES
338 help
339 Ignore all but the first contiguous chunk of physical memory for VM
340 purposes. This will save a few bytes kernel size and may speed up
341 some operations. Say N if not sure.
342
343config ARCH_DISCONTIGMEM_ENABLE
344 def_bool MMU && !SINGLE_MEMORY_CHUNK
345
346config 060_WRITETHROUGH
347 bool "Use write-through caching for 68060 supervisor accesses"
348 depends on ADVANCED && M68060
349 ---help---
350 The 68060 generally uses copyback caching of recently accessed data.
351 Copyback caching means that memory writes will be held in an on-chip
352 cache and only written back to memory some time later. Saying Y
353 here will force supervisor (kernel) accesses to use writethrough
354 caching. Writethrough caching means that data is written to memory
355 straight away, so that cache and memory data always agree.
356 Writethrough caching is less efficient, but is needed for some
357 drivers on 68060 based systems where the 68060 bus snooping signal
358 is hardwired on. The 53c710 SCSI driver is known to suffer from
359 this problem.
360
361config M68K_L2_CACHE
362 bool
363 depends on MAC
364 default y
365
366config NODES_SHIFT
367 int
368 default "3"
369 depends on !SINGLE_MEMORY_CHUNK
370
371config FPU
372 bool
373
374config COLDFIRE_SW_A7
375 bool
376
377config HAVE_CACHE_SPLIT
378 bool
379
380config HAVE_CACHE_CB
381 bool
382
383config HAVE_MBAR
384 bool
385
386config HAVE_IPSBAR
387 bool
388
389config CLOCK_SET
390 bool "Enable setting the CPU clock frequency"
391 depends on COLDFIRE
392 default n
393 help
394 On some CPU's you do not need to know what the core CPU clock
395 frequency is. On these you can disable clock setting. On some
396 traditional 68K parts, and on all ColdFire parts you need to set
397 the appropriate CPU clock frequency. On these devices many of the
398 onboard peripherals derive their timing from the master CPU clock
399 frequency.
400
401config CLOCK_FREQ
402 int "Set the core clock frequency"
403 default "66666666"
404 depends on CLOCK_SET
405 help
406 Define the CPU clock frequency in use. This is the core clock
407 frequency, it may or may not be the same as the external clock
408 crystal fitted to your board. Some processors have an internal
409 PLL and can have their frequency programmed at run time, others
410 use internal dividers. In general the kernel won't setup a PLL
411 if it is fitted (there are some exceptions). This value will be
412 specific to the exact CPU that you are using.
413
414config OLDMASK
415 bool "Old mask 5307 (1H55J) silicon"
416 depends on M5307
417 help
418 Build support for the older revision ColdFire 5307 silicon.
419 Specifically this is the 1H55J mask revision.
420
421if HAVE_CACHE_SPLIT
422choice
423 prompt "Split Cache Configuration"
424 default CACHE_I
425
426config CACHE_I
427 bool "Instruction"
428 help
429 Use all of the ColdFire CPU cache memory as an instruction cache.
430
431config CACHE_D
432 bool "Data"
433 help
434 Use all of the ColdFire CPU cache memory as a data cache.
435
436config CACHE_BOTH
437 bool "Both"
438 help
439 Split the ColdFire CPU cache, and use half as an instruction cache
440 and half as a data cache.
441endchoice
442endif
443
444if HAVE_CACHE_CB
445choice
446 prompt "Data cache mode"
447 default CACHE_WRITETHRU
448
449config CACHE_WRITETHRU
450 bool "Write-through"
451 help
452 The ColdFire CPU cache is set into Write-through mode.
453
454config CACHE_COPYBACK
455 bool "Copy-back"
456 help
457 The ColdFire CPU cache is set into Copy-back mode.
458endchoice
459endif
460