Paul Walmsley | 02e19a9 | 2008-03-18 15:09:51 +0200 | [diff] [blame] | 1 | /* |
| 2 | * OMAP3-specific clock framework functions |
| 3 | * |
Paul Walmsley | 542313c | 2008-07-03 12:24:45 +0300 | [diff] [blame] | 4 | * Copyright (C) 2007-2008 Texas Instruments, Inc. |
Paul Walmsley | da4d290 | 2010-01-26 20:13:10 -0700 | [diff] [blame] | 5 | * Copyright (C) 2007-2010 Nokia Corporation |
Paul Walmsley | 02e19a9 | 2008-03-18 15:09:51 +0200 | [diff] [blame] | 6 | * |
Paul Walmsley | da4d290 | 2010-01-26 20:13:10 -0700 | [diff] [blame] | 7 | * Paul Walmsley |
| 8 | * Jouni Högander |
Paul Walmsley | 02e19a9 | 2008-03-18 15:09:51 +0200 | [diff] [blame] | 9 | * |
| 10 | * Parts of this code are based on code written by |
Paul Walmsley | 657ebfa | 2010-02-22 22:09:20 -0700 | [diff] [blame] | 11 | * Richard Woodruff, Tony Lindgren, Tuukka Tikkanen, Karthik Dasu, |
| 12 | * Russell King |
Paul Walmsley | 02e19a9 | 2008-03-18 15:09:51 +0200 | [diff] [blame] | 13 | * |
| 14 | * This program is free software; you can redistribute it and/or modify |
| 15 | * it under the terms of the GNU General Public License version 2 as |
| 16 | * published by the Free Software Foundation. |
| 17 | */ |
| 18 | #undef DEBUG |
| 19 | |
Paul Walmsley | 02e19a9 | 2008-03-18 15:09:51 +0200 | [diff] [blame] | 20 | #include <linux/kernel.h> |
Paul Walmsley | 02e19a9 | 2008-03-18 15:09:51 +0200 | [diff] [blame] | 21 | #include <linux/clk.h> |
| 22 | #include <linux/io.h> |
| 23 | |
Tony Lindgren | ce491cf | 2009-10-20 09:40:47 -0700 | [diff] [blame] | 24 | #include <plat/clock.h> |
Paul Walmsley | 02e19a9 | 2008-03-18 15:09:51 +0200 | [diff] [blame] | 25 | |
Paul Walmsley | 02e19a9 | 2008-03-18 15:09:51 +0200 | [diff] [blame] | 26 | #include "clock.h" |
Paul Walmsley | 82e9bd5 | 2009-12-08 16:18:47 -0700 | [diff] [blame] | 27 | #include "clock34xx.h" |
Paul Walmsley | 02e19a9 | 2008-03-18 15:09:51 +0200 | [diff] [blame] | 28 | #include "cm.h" |
| 29 | #include "cm-regbits-34xx.h" |
| 30 | |
Paul Walmsley | 02e19a9 | 2008-03-18 15:09:51 +0200 | [diff] [blame] | 31 | /** |
Paul Walmsley | 3c82e22 | 2009-07-24 19:44:06 -0600 | [diff] [blame] | 32 | * omap3430es2_clk_ssi_find_idlest - return CM_IDLEST info for SSI |
| 33 | * @clk: struct clk * being enabled |
| 34 | * @idlest_reg: void __iomem ** to store CM_IDLEST reg address into |
| 35 | * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into |
Ranjith Lohithakshan | 419cc97 | 2010-02-24 12:05:54 -0700 | [diff] [blame] | 36 | * @idlest_val: pointer to a u8 to store the CM_IDLEST indicator |
Paul Walmsley | 3c82e22 | 2009-07-24 19:44:06 -0600 | [diff] [blame] | 37 | * |
| 38 | * The OMAP3430ES2 SSI target CM_IDLEST bit is at a different shift |
| 39 | * from the CM_{I,F}CLKEN bit. Pass back the correct info via |
| 40 | * @idlest_reg and @idlest_bit. No return value. |
| 41 | */ |
| 42 | static void omap3430es2_clk_ssi_find_idlest(struct clk *clk, |
| 43 | void __iomem **idlest_reg, |
Ranjith Lohithakshan | 419cc97 | 2010-02-24 12:05:54 -0700 | [diff] [blame] | 44 | u8 *idlest_bit, |
| 45 | u8 *idlest_val) |
Paul Walmsley | 3c82e22 | 2009-07-24 19:44:06 -0600 | [diff] [blame] | 46 | { |
| 47 | u32 r; |
| 48 | |
| 49 | r = (((__force u32)clk->enable_reg & ~0xf0) | 0x20); |
| 50 | *idlest_reg = (__force void __iomem *)r; |
| 51 | *idlest_bit = OMAP3430ES2_ST_SSI_IDLE_SHIFT; |
Ranjith Lohithakshan | 419cc97 | 2010-02-24 12:05:54 -0700 | [diff] [blame] | 52 | *idlest_val = OMAP34XX_CM_IDLEST_VAL; |
Paul Walmsley | 3c82e22 | 2009-07-24 19:44:06 -0600 | [diff] [blame] | 53 | } |
| 54 | |
Paul Walmsley | 82e9bd5 | 2009-12-08 16:18:47 -0700 | [diff] [blame] | 55 | const struct clkops clkops_omap3430es2_ssi_wait = { |
| 56 | .enable = omap2_dflt_clk_enable, |
| 57 | .disable = omap2_dflt_clk_disable, |
| 58 | .find_idlest = omap3430es2_clk_ssi_find_idlest, |
| 59 | .find_companion = omap2_clk_dflt_find_companion, |
| 60 | }; |
| 61 | |
Paul Walmsley | 3c82e22 | 2009-07-24 19:44:06 -0600 | [diff] [blame] | 62 | /** |
| 63 | * omap3430es2_clk_dss_usbhost_find_idlest - CM_IDLEST info for DSS, USBHOST |
| 64 | * @clk: struct clk * being enabled |
| 65 | * @idlest_reg: void __iomem ** to store CM_IDLEST reg address into |
| 66 | * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into |
Ranjith Lohithakshan | 419cc97 | 2010-02-24 12:05:54 -0700 | [diff] [blame] | 67 | * @idlest_val: pointer to a u8 to store the CM_IDLEST indicator |
Paul Walmsley | 3c82e22 | 2009-07-24 19:44:06 -0600 | [diff] [blame] | 68 | * |
| 69 | * Some OMAP modules on OMAP3 ES2+ chips have both initiator and |
| 70 | * target IDLEST bits. For our purposes, we are concerned with the |
| 71 | * target IDLEST bits, which exist at a different bit position than |
| 72 | * the *CLKEN bit position for these modules (DSS and USBHOST) (The |
| 73 | * default find_idlest code assumes that they are at the same |
| 74 | * position.) No return value. |
| 75 | */ |
| 76 | static void omap3430es2_clk_dss_usbhost_find_idlest(struct clk *clk, |
| 77 | void __iomem **idlest_reg, |
Ranjith Lohithakshan | 419cc97 | 2010-02-24 12:05:54 -0700 | [diff] [blame] | 78 | u8 *idlest_bit, |
| 79 | u8 *idlest_val) |
Paul Walmsley | 3c82e22 | 2009-07-24 19:44:06 -0600 | [diff] [blame] | 80 | { |
| 81 | u32 r; |
| 82 | |
| 83 | r = (((__force u32)clk->enable_reg & ~0xf0) | 0x20); |
| 84 | *idlest_reg = (__force void __iomem *)r; |
| 85 | /* USBHOST_IDLE has same shift */ |
| 86 | *idlest_bit = OMAP3430ES2_ST_DSS_IDLE_SHIFT; |
Ranjith Lohithakshan | 419cc97 | 2010-02-24 12:05:54 -0700 | [diff] [blame] | 87 | *idlest_val = OMAP34XX_CM_IDLEST_VAL; |
Paul Walmsley | 3c82e22 | 2009-07-24 19:44:06 -0600 | [diff] [blame] | 88 | } |
| 89 | |
Paul Walmsley | 82e9bd5 | 2009-12-08 16:18:47 -0700 | [diff] [blame] | 90 | const struct clkops clkops_omap3430es2_dss_usbhost_wait = { |
| 91 | .enable = omap2_dflt_clk_enable, |
| 92 | .disable = omap2_dflt_clk_disable, |
| 93 | .find_idlest = omap3430es2_clk_dss_usbhost_find_idlest, |
| 94 | .find_companion = omap2_clk_dflt_find_companion, |
| 95 | }; |
| 96 | |
Paul Walmsley | 3c82e22 | 2009-07-24 19:44:06 -0600 | [diff] [blame] | 97 | /** |
| 98 | * omap3430es2_clk_hsotgusb_find_idlest - return CM_IDLEST info for HSOTGUSB |
| 99 | * @clk: struct clk * being enabled |
| 100 | * @idlest_reg: void __iomem ** to store CM_IDLEST reg address into |
| 101 | * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into |
Ranjith Lohithakshan | 419cc97 | 2010-02-24 12:05:54 -0700 | [diff] [blame] | 102 | * @idlest_val: pointer to a u8 to store the CM_IDLEST indicator |
Paul Walmsley | 3c82e22 | 2009-07-24 19:44:06 -0600 | [diff] [blame] | 103 | * |
| 104 | * The OMAP3430ES2 HSOTGUSB target CM_IDLEST bit is at a different |
| 105 | * shift from the CM_{I,F}CLKEN bit. Pass back the correct info via |
| 106 | * @idlest_reg and @idlest_bit. No return value. |
| 107 | */ |
| 108 | static void omap3430es2_clk_hsotgusb_find_idlest(struct clk *clk, |
| 109 | void __iomem **idlest_reg, |
Ranjith Lohithakshan | 419cc97 | 2010-02-24 12:05:54 -0700 | [diff] [blame] | 110 | u8 *idlest_bit, |
| 111 | u8 *idlest_val) |
Paul Walmsley | 3c82e22 | 2009-07-24 19:44:06 -0600 | [diff] [blame] | 112 | { |
| 113 | u32 r; |
| 114 | |
| 115 | r = (((__force u32)clk->enable_reg & ~0xf0) | 0x20); |
| 116 | *idlest_reg = (__force void __iomem *)r; |
| 117 | *idlest_bit = OMAP3430ES2_ST_HSOTGUSB_IDLE_SHIFT; |
Ranjith Lohithakshan | 419cc97 | 2010-02-24 12:05:54 -0700 | [diff] [blame] | 118 | *idlest_val = OMAP34XX_CM_IDLEST_VAL; |
Paul Walmsley | 3c82e22 | 2009-07-24 19:44:06 -0600 | [diff] [blame] | 119 | } |
| 120 | |
Paul Walmsley | 82e9bd5 | 2009-12-08 16:18:47 -0700 | [diff] [blame] | 121 | const struct clkops clkops_omap3430es2_hsotgusb_wait = { |
| 122 | .enable = omap2_dflt_clk_enable, |
| 123 | .disable = omap2_dflt_clk_disable, |
| 124 | .find_idlest = omap3430es2_clk_hsotgusb_find_idlest, |
| 125 | .find_companion = omap2_clk_dflt_find_companion, |
| 126 | }; |