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Jean-Christop PLAGNIOL-VILLARD6d803ba2010-11-17 10:04:33 +01001
2config CLKDEV_LOOKUP
3 bool
4 select HAVE_CLK
Kyungmin Parkaa3831c2011-07-18 16:34:54 +09005
Shawn Guo5c77f562011-12-20 14:46:38 +08006config HAVE_CLK_PREPARE
7 bool
8
Kyungmin Parkaa3831c2011-07-18 16:34:54 +09009config HAVE_MACH_CLKDEV
10 bool
Mike Turquetteb24764902012-03-15 23:11:19 -070011
Arnd Bergmann8fb61e32012-03-17 21:10:51 +000012config COMMON_CLK
13 bool
Mike Turquetteb24764902012-03-15 23:11:19 -070014 select HAVE_CLK_PREPARE
Rob Herring01033be2012-04-09 15:24:58 -050015 select CLKDEV_LOOKUP
Pranith Kumar83fe27e2014-12-05 11:24:45 -050016 select SRCU
Andy Shevchenko07775912015-09-22 18:54:11 +030017 select RATIONAL
Mike Turquetteb24764902012-03-15 23:11:19 -070018 ---help---
19 The common clock framework is a single definition of struct
20 clk, useful across many platforms, as well as an
21 implementation of the clock API in include/linux/clk.h.
22 Architectures utilizing the common struct clk should select
Arnd Bergmann8fb61e32012-03-17 21:10:51 +000023 this option.
Mike Turquetteb24764902012-03-15 23:11:19 -070024
Arnd Bergmann8fb61e32012-03-17 21:10:51 +000025menu "Common Clock Framework"
26 depends on COMMON_CLK
Mike Turquetteb24764902012-03-15 23:11:19 -070027
Mark Brownf05259a2012-05-17 10:04:57 +010028config COMMON_CLK_WM831X
29 tristate "Clock driver for WM831x/2x PMICs"
30 depends on MFD_WM831X
31 ---help---
32 Supports the clocking subsystem of the WM831x/2x series of
Masanari Iidafe4e4372014-10-17 00:09:24 +090033 PMICs from Wolfson Microelectronics.
Mark Brownf05259a2012-05-17 10:04:57 +010034
Pawel Moll5ee2b872013-09-17 17:16:15 +010035source "drivers/clk/versatile/Kconfig"
Linus Walleijf9a6aa42012-08-06 18:32:08 +020036
Javier Martinez Canillas5dbbb002014-08-18 10:33:00 +020037config COMMON_CLK_MAX_GEN
38 bool
39
Jonghwa Lee73118e62012-08-28 17:54:28 +090040config COMMON_CLK_MAX77686
41 tristate "Clock driver for Maxim 77686 MFD"
42 depends on MFD_MAX77686
Javier Martinez Canillas1887d692014-08-18 10:33:01 +020043 select COMMON_CLK_MAX_GEN
Jonghwa Lee73118e62012-08-28 17:54:28 +090044 ---help---
45 This driver supports Maxim 77686 crystal oscillator clock.
46
Javier Martinez Canillas83ccf162014-08-18 10:33:03 +020047config COMMON_CLK_MAX77802
48 tristate "Clock driver for Maxim 77802 PMIC"
49 depends on MFD_MAX77686
50 select COMMON_CLK_MAX_GEN
51 ---help---
52 This driver supports Maxim 77802 crystal oscillator clock.
53
Chris Zhong038b8922014-10-13 15:52:44 -070054config COMMON_CLK_RK808
55 tristate "Clock driver for RK808"
56 depends on MFD_RK808
57 ---help---
58 This driver supports RK808 crystal oscillator clock. These
59 multi-function devices have two fixed-rate oscillators,
60 clocked at 32KHz each. Clkout1 is always on, Clkout2 can off
61 by control register.
62
Sebastian Hesselbarth9abd5f02013-04-11 21:42:29 +020063config COMMON_CLK_SI5351
64 tristate "Clock driver for SiLabs 5351A/B/C"
65 depends on I2C
66 select REGMAP_I2C
67 select RATIONAL
68 ---help---
69 This driver supports Silicon Labs 5351A/B/C programmable clock
70 generators.
71
Soren Brinkmann1459c832013-09-21 16:40:39 -070072config COMMON_CLK_SI570
73 tristate "Clock driver for SiLabs 570 and compatible devices"
74 depends on I2C
75 depends on OF
76 select REGMAP_I2C
77 help
78 ---help---
79 This driver supports Silicon Labs 570/571/598/599 programmable
80 clock generators.
81
Mike Looijmans19fbbbb2015-06-03 07:25:19 +020082config COMMON_CLK_CDCE925
83 tristate "Clock driver for TI CDCE925 devices"
84 depends on I2C
85 depends on OF
86 select REGMAP_I2C
87 help
88 ---help---
89 This driver supports the TI CDCE925 programmable clock synthesizer.
90 The chip contains two PLLs with spread-spectrum clocking support and
91 five output dividers. The driver only supports the following setup,
92 and uses a fixed setting for the output muxes.
93 Y1 is derived from the input clock
94 Y2 and Y3 derive from PLL1
95 Y4 and Y5 derive from PLL2
96 Given a target output frequency, the driver will set the PLL and
97 divider to best approximate the desired output.
98
Yadwinder Singh Brar7cc560d2013-07-07 17:14:20 +053099config COMMON_CLK_S2MPS11
Krzysztof Kozlowskie8b60a42014-05-21 13:23:01 +0200100 tristate "Clock driver for S2MPS1X/S5M8767 MFD"
Yadwinder Singh Brar7cc560d2013-07-07 17:14:20 +0530101 depends on MFD_SEC_CORE
102 ---help---
Krzysztof Kozlowskie8b60a42014-05-21 13:23:01 +0200103 This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
104 clock. These multi-function devices have two (S2MPS14) or three
105 (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
Yadwinder Singh Brar7cc560d2013-07-07 17:14:20 +0530106
Peter Ujfalusif9f8c042012-09-14 17:30:27 +0300107config CLK_TWL6040
108 tristate "External McPDM functional clock from twl6040"
109 depends on TWL6040_CORE
110 ---help---
111 Enable the external functional clock support on OMAP4+ platforms for
112 McPDM. McPDM module is using the external bit clock on the McPDM bus
113 as functional clock.
114
Lars-Peter Clausen0e646c52013-03-11 16:22:29 +0100115config COMMON_CLK_AXI_CLKGEN
116 tristate "AXI clkgen driver"
117 depends on ARCH_ZYNQ || MICROBLAZE
118 help
119 ---help---
120 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
121 FPGAs. It is commonly used in Analog Devices' reference designs.
122
Tang Yuantian93a17c02015-01-15 14:03:41 +0800123config CLK_QORIQ
124 bool "Clock driver for Freescale QorIQ platforms"
125 depends on (PPC_E500MC || ARM) && OF
Tang Yuantian555eae92013-04-09 16:46:26 +0800126 ---help---
Tang Yuantian93a17c02015-01-15 14:03:41 +0800127 This adds the clock driver support for Freescale QorIQ platforms
128 using common clock framework.
Tang Yuantian555eae92013-04-09 16:46:26 +0800129
Loc Ho308964c2013-06-26 11:56:09 -0600130config COMMON_CLK_XGENE
131 bool "Clock driver for APM XGene SoC"
132 default y
133 depends on ARM64
134 ---help---
135 Sypport for the APM X-Gene SoC reference, PLL, and device clocks.
136
Santosh Shilimkar6cfc2292013-09-25 21:18:15 -0400137config COMMON_CLK_KEYSTONE
138 tristate "Clock drivers for Keystone based SOCs"
139 depends on ARCH_KEYSTONE && OF
140 ---help---
141 Supports clock drivers for Keystone based SOCs. These SOCs have local
142 a power sleep control module that gate the clock to the IPs and PLLs.
143
Peter Ujfalusi942d1d62014-06-27 09:01:11 +0300144config COMMON_CLK_PALMAS
145 tristate "Clock driver for TI Palmas devices"
146 depends on MFD_PALMAS
147 ---help---
148 This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
149 using common clock framework.
150
Philipp Zabel9a74ccd2015-02-13 20:18:52 +0100151config COMMON_CLK_PWM
152 tristate "Clock driver for PWMs used as clock outputs"
153 depends on PWM
154 ---help---
155 Adapter driver so that any PWM output can be (mis)used as clock signal
156 at 50% duty cycle.
157
Robert Jarzmik98d147f2014-10-01 23:39:29 +0200158config COMMON_CLK_PXA
159 def_bool COMMON_CLK && ARCH_PXA
160 ---help---
161 Sypport for the Marvell PXA SoC.
162
Max Filippov0c7665c2015-01-12 10:20:46 +0300163config COMMON_CLK_CDCE706
164 tristate "Clock driver for TI CDCE706 clock synthesizer"
165 depends on I2C
166 select REGMAP_I2C
167 select RATIONAL
168 ---help---
169 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
170
Stephen Boyd64a12c52015-05-14 17:38:21 -0700171source "drivers/clk/bcm/Kconfig"
Bintian Wang72ea4862015-05-29 10:08:38 +0800172source "drivers/clk/hisilicon/Kconfig"
Stephen Boyd085d7a42014-01-15 10:47:23 -0800173source "drivers/clk/qcom/Kconfig"
174
Arnd Bergmann8fb61e32012-03-17 21:10:51 +0000175endmenu
Sebastian Hesselbarth97fa4cf2012-11-17 15:22:22 +0100176
177source "drivers/clk/mvebu/Kconfig"
Pankaj Dubey4ce9b852014-05-08 13:07:08 +0900178
179source "drivers/clk/samsung/Kconfig"
Thierry Reding31b52ba2015-04-01 09:10:58 +0200180source "drivers/clk/tegra/Kconfig"