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Wu, Fengguang91504872008-11-05 11:16:56 +08001/*
2 *
3 * patch_intelhdmi.c - Patch for Intel HDMI codecs
4 *
5 * Copyright(c) 2008 Intel Corporation. All rights reserved.
6 *
7 * Authors:
8 * Jiang Zhe <zhe.jiang@intel.com>
9 * Wu Fengguang <wfg@linux.intel.com>
10 *
11 * Maintained by:
12 * Wu Fengguang <wfg@linux.intel.com>
13 *
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the Free
16 * Software Foundation; either version 2 of the License, or (at your option)
17 * any later version.
18 *
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
21 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
22 * for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software Foundation,
26 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
27 */
28
29#include <linux/init.h>
30#include <linux/delay.h>
31#include <linux/slab.h>
32#include <sound/core.h>
Wu, Fengguang91504872008-11-05 11:16:56 +080033#include "hda_codec.h"
34#include "hda_local.h"
Wu, Fengguang91504872008-11-05 11:16:56 +080035
Wu Fengguang54a25f82009-10-30 11:44:26 +010036/*
37 * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
38 * could support two independent pipes, each of them can be connected to one or
39 * more ports (DVI, HDMI or DisplayPort).
40 *
41 * The HDA correspondence of pipes/ports are converter/pin nodes.
42 */
Wu Fengguang079d88c2010-03-08 10:44:23 +080043#define MAX_HDMI_CVTS 2
44#define MAX_HDMI_PINS 3
Wu, Fengguang91504872008-11-05 11:16:56 +080045
Wu Fengguang079d88c2010-03-08 10:44:23 +080046#include "patch_hdmi.c"
47
48static char *intel_hdmi_pcm_names[MAX_HDMI_CVTS] = {
Wu Fengguang54a25f82009-10-30 11:44:26 +010049 "INTEL HDMI 0",
50 "INTEL HDMI 1",
51};
Wu, Fengguang91504872008-11-05 11:16:56 +080052
Wu, Fengguang91504872008-11-05 11:16:56 +080053/*
Wu Fengguang079d88c2010-03-08 10:44:23 +080054 * HDMI callbacks
Wu Fengguang698544d2008-11-19 08:56:17 +080055 */
Wu Fengguang57791912009-11-18 12:38:06 +080056
Wu, Fengguang91504872008-11-05 11:16:56 +080057static int intel_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
58 struct hda_codec *codec,
59 unsigned int stream_tag,
60 unsigned int format,
61 struct snd_pcm_substream *substream)
62{
Wu Fengguang54a25f82009-10-30 11:44:26 +010063 hdmi_set_channel_count(codec, hinfo->nid,
Wu Fengguang7bedb012009-10-30 11:41:44 +010064 substream->runtime->channels);
Wu, Fengguang91504872008-11-05 11:16:56 +080065
Wu Fengguang54a25f82009-10-30 11:44:26 +010066 hdmi_setup_audio_infoframe(codec, hinfo->nid, substream);
Wu, Fengguang91504872008-11-05 11:16:56 +080067
Wu Fengguang57791912009-11-18 12:38:06 +080068 hdmi_setup_stream(codec, hinfo->nid, stream_tag, format);
Wu, Fengguang91504872008-11-05 11:16:56 +080069 return 0;
70}
71
Wu Fengguangddb81522009-10-30 11:43:03 +010072static int intel_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
73 struct hda_codec *codec,
74 struct snd_pcm_substream *substream)
75{
Wu Fengguangddb81522009-10-30 11:43:03 +010076 return 0;
77}
78
Wu, Fengguang91504872008-11-05 11:16:56 +080079static struct hda_pcm_stream intel_hdmi_pcm_playback = {
80 .substreams = 1,
81 .channels_min = 2,
Wu, Fengguang91504872008-11-05 11:16:56 +080082 .ops = {
Wu Fengguang70ca35f2009-10-30 11:42:18 +010083 .prepare = intel_hdmi_playback_pcm_prepare,
84 .cleanup = intel_hdmi_playback_pcm_cleanup,
Wu, Fengguang91504872008-11-05 11:16:56 +080085 },
86};
87
88static int intel_hdmi_build_pcms(struct hda_codec *codec)
89{
Wu Fengguang079d88c2010-03-08 10:44:23 +080090 struct hdmi_spec *spec = codec->spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +010091 struct hda_pcm *info = spec->pcm_rec;
92 int i;
Wu, Fengguang91504872008-11-05 11:16:56 +080093
Wu Fengguang54a25f82009-10-30 11:44:26 +010094 codec->num_pcms = spec->num_cvts;
Wu, Fengguang91504872008-11-05 11:16:56 +080095 codec->pcm_info = info;
96
Wu Fengguang54a25f82009-10-30 11:44:26 +010097 for (i = 0; i < codec->num_pcms; i++, info++) {
Wu Fengguang69fb3462009-10-30 11:45:04 +010098 unsigned int chans;
99
100 chans = get_wcaps(codec, spec->cvt[i]);
101 chans = get_wcaps_channels(chans);
102
Wu Fengguang54a25f82009-10-30 11:44:26 +0100103 info->name = intel_hdmi_pcm_names[i];
104 info->pcm_type = HDA_PCM_TYPE_HDMI;
105 info->stream[SNDRV_PCM_STREAM_PLAYBACK] =
106 intel_hdmi_pcm_playback;
107 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->cvt[i];
Wu Fengguang69fb3462009-10-30 11:45:04 +0100108 info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max = chans;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100109 }
Wu, Fengguang91504872008-11-05 11:16:56 +0800110
111 return 0;
112}
113
114static int intel_hdmi_build_controls(struct hda_codec *codec)
115{
Wu Fengguang079d88c2010-03-08 10:44:23 +0800116 struct hdmi_spec *spec = codec->spec;
Wu, Fengguang91504872008-11-05 11:16:56 +0800117 int err;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100118 int i;
Wu, Fengguang91504872008-11-05 11:16:56 +0800119
Wu Fengguang54a25f82009-10-30 11:44:26 +0100120 for (i = 0; i < codec->num_pcms; i++) {
121 err = snd_hda_create_spdif_out_ctls(codec, spec->cvt[i]);
122 if (err < 0)
123 return err;
124 }
Wu, Fengguang91504872008-11-05 11:16:56 +0800125
126 return 0;
127}
128
129static int intel_hdmi_init(struct hda_codec *codec)
130{
Wu Fengguang079d88c2010-03-08 10:44:23 +0800131 struct hdmi_spec *spec = codec->spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100132 int i;
Wu, Fengguang91504872008-11-05 11:16:56 +0800133
Wu Fengguang54a25f82009-10-30 11:44:26 +0100134 for (i = 0; spec->pin[i]; i++) {
135 hdmi_enable_output(codec, spec->pin[i]);
136 snd_hda_codec_write(codec, spec->pin[i], 0,
137 AC_VERB_SET_UNSOLICITED_ENABLE,
138 AC_USRSP_EN | spec->pin[i]);
139 }
Wu, Fengguang91504872008-11-05 11:16:56 +0800140 return 0;
141}
142
143static void intel_hdmi_free(struct hda_codec *codec)
144{
Wu Fengguang079d88c2010-03-08 10:44:23 +0800145 struct hdmi_spec *spec = codec->spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100146 int i;
Takashi Iwaif208dba2008-11-21 09:11:50 +0100147
Wu Fengguang54a25f82009-10-30 11:44:26 +0100148 for (i = 0; i < spec->num_pins; i++)
149 snd_hda_eld_proc_free(codec, &spec->sink_eld[i]);
150
Takashi Iwaif208dba2008-11-21 09:11:50 +0100151 kfree(spec);
Wu, Fengguang91504872008-11-05 11:16:56 +0800152}
153
154static struct hda_codec_ops intel_hdmi_patch_ops = {
155 .init = intel_hdmi_init,
156 .free = intel_hdmi_free,
157 .build_pcms = intel_hdmi_build_pcms,
158 .build_controls = intel_hdmi_build_controls,
Wu Fengguang079d88c2010-03-08 10:44:23 +0800159 .unsol_event = hdmi_unsol_event,
Wu, Fengguang91504872008-11-05 11:16:56 +0800160};
161
Wu Fengguangfd080b22009-10-30 11:46:22 +0100162static int patch_intel_hdmi(struct hda_codec *codec)
Wu, Fengguang91504872008-11-05 11:16:56 +0800163{
Wu Fengguang079d88c2010-03-08 10:44:23 +0800164 struct hdmi_spec *spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100165 int i;
Wu, Fengguang91504872008-11-05 11:16:56 +0800166
167 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
168 if (spec == NULL)
169 return -ENOMEM;
170
Wu, Fengguang91504872008-11-05 11:16:56 +0800171 codec->spec = spec;
Wu Fengguang079d88c2010-03-08 10:44:23 +0800172 if (hdmi_parse_codec(codec) < 0) {
Wu Fengguangf4243672009-10-30 11:45:35 +0100173 codec->spec = NULL;
174 kfree(spec);
175 return -EINVAL;
176 }
Wu, Fengguang91504872008-11-05 11:16:56 +0800177 codec->patch_ops = intel_hdmi_patch_ops;
178
Wu Fengguang54a25f82009-10-30 11:44:26 +0100179 for (i = 0; i < spec->num_pins; i++)
180 snd_hda_eld_proc_new(codec, &spec->sink_eld[i], i);
Wu Fengguang5f1e71b2008-11-18 11:47:53 +0800181
Wu Fengguang698544d2008-11-19 08:56:17 +0800182 init_channel_allocations();
183
Wu, Fengguang91504872008-11-05 11:16:56 +0800184 return 0;
185}
186
Takashi Iwai1289e9e2008-11-27 15:47:11 +0100187static struct hda_codec_preset snd_hda_preset_intelhdmi[] = {
Takashi Iwai74c61132008-12-18 09:11:33 +0100188 { .id = 0x808629fb, .name = "G45 DEVCL", .patch = patch_intel_hdmi },
189 { .id = 0x80862801, .name = "G45 DEVBLC", .patch = patch_intel_hdmi },
190 { .id = 0x80862802, .name = "G45 DEVCTG", .patch = patch_intel_hdmi },
191 { .id = 0x80862803, .name = "G45 DEVELK", .patch = patch_intel_hdmi },
Wu Fengguangfd080b22009-10-30 11:46:22 +0100192 { .id = 0x80862804, .name = "G45 DEVIBX", .patch = patch_intel_hdmi },
193 { .id = 0x80860054, .name = "Q57 DEVIBX", .patch = patch_intel_hdmi },
Wu Fengguang3a95cb92008-11-13 10:19:38 +0800194 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_intel_hdmi },
Wu, Fengguang91504872008-11-05 11:16:56 +0800195 {} /* terminator */
196};
Takashi Iwai1289e9e2008-11-27 15:47:11 +0100197
198MODULE_ALIAS("snd-hda-codec-id:808629fb");
199MODULE_ALIAS("snd-hda-codec-id:80862801");
200MODULE_ALIAS("snd-hda-codec-id:80862802");
201MODULE_ALIAS("snd-hda-codec-id:80862803");
Wu Fengguanga57c0eb2009-02-11 15:22:31 +0800202MODULE_ALIAS("snd-hda-codec-id:80862804");
Jaroslav Kysela87a8c372009-07-23 10:58:29 +0200203MODULE_ALIAS("snd-hda-codec-id:80860054");
Takashi Iwai1289e9e2008-11-27 15:47:11 +0100204MODULE_ALIAS("snd-hda-codec-id:10951392");
205
206MODULE_LICENSE("GPL");
207MODULE_DESCRIPTION("Intel HDMI HD-audio codec");
208
209static struct hda_codec_preset_list intel_list = {
210 .preset = snd_hda_preset_intelhdmi,
211 .owner = THIS_MODULE,
212};
213
214static int __init patch_intelhdmi_init(void)
215{
216 return snd_hda_add_codec_preset(&intel_list);
217}
218
219static void __exit patch_intelhdmi_exit(void)
220{
221 snd_hda_delete_codec_preset(&intel_list);
222}
223
224module_init(patch_intelhdmi_init)
225module_exit(patch_intelhdmi_exit)