blob: e7ecafa8e598c0903457814de5648957e92962d4 [file] [log] [blame]
Ben Widawsky254f9652012-06-04 14:42:42 -07001/*
2 * Copyright © 2011-2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Ben Widawsky <ben@bwidawsk.net>
25 *
26 */
27
28/*
29 * This file implements HW context support. On gen5+ a HW context consists of an
30 * opaque GPU object which is referenced at times of context saves and restores.
31 * With RC6 enabled, the context is also referenced as the GPU enters and exists
32 * from RC6 (GPU has it's own internal power context, except on gen5). Though
33 * something like a context does exist for the media ring, the code only
34 * supports contexts for the render ring.
35 *
36 * In software, there is a distinction between contexts created by the user,
37 * and the default HW context. The default HW context is used by GPU clients
38 * that do not request setup of their own hardware context. The default
39 * context's state is never restored to help prevent programming errors. This
40 * would happen if a client ran and piggy-backed off another clients GPU state.
41 * The default context only exists to give the GPU some offset to load as the
42 * current to invoke a save of the context we actually care about. In fact, the
43 * code could likely be constructed, albeit in a more complicated fashion, to
44 * never use the default context, though that limits the driver's ability to
45 * swap out, and/or destroy other contexts.
46 *
47 * All other contexts are created as a request by the GPU client. These contexts
48 * store GPU state, and thus allow GPU clients to not re-emit state (and
49 * potentially query certain state) at any time. The kernel driver makes
50 * certain that the appropriate commands are inserted.
51 *
52 * The context life cycle is semi-complicated in that context BOs may live
53 * longer than the context itself because of the way the hardware, and object
54 * tracking works. Below is a very crude representation of the state machine
55 * describing the context life.
56 * refcount pincount active
57 * S0: initial state 0 0 0
58 * S1: context created 1 0 0
59 * S2: context is currently running 2 1 X
60 * S3: GPU referenced, but not current 2 0 1
61 * S4: context is current, but destroyed 1 1 0
62 * S5: like S3, but destroyed 1 0 1
63 *
64 * The most common (but not all) transitions:
65 * S0->S1: client creates a context
66 * S1->S2: client submits execbuf with context
67 * S2->S3: other clients submits execbuf with context
68 * S3->S1: context object was retired
69 * S3->S2: clients submits another execbuf
70 * S2->S4: context destroy called with current context
71 * S3->S5->S0: destroy path
72 * S4->S5->S0: destroy path on current context
73 *
74 * There are two confusing terms used above:
75 * The "current context" means the context which is currently running on the
76 * GPU. The GPU has loaded it's state already and has stored away the gtt
77 * offset of the BO. The GPU is not actively referencing the data at this
78 * offset, but it will on the next context switch. The only way to avoid this
79 * is to do a GPU reset.
80 *
81 * An "active context' is one which was previously the "current context" and is
82 * on the active list waiting for the next context switch to occur. Until this
83 * happens, the object must remain at the same gtt offset. It is therefore
84 * possible to destroy a context, but it is still active.
85 *
86 */
87
David Howells760285e2012-10-02 18:01:07 +010088#include <drm/drmP.h>
89#include <drm/i915_drm.h>
Ben Widawsky254f9652012-06-04 14:42:42 -070090#include "i915_drv.h"
91
Ben Widawsky40521052012-06-04 14:42:43 -070092/* This is a HW constraint. The value below is the largest known requirement
93 * I've seen in a spec to date, and that was a workaround for a non-shipping
94 * part. It should be safe to decrease this, but it's more future proof as is.
95 */
96#define CONTEXT_ALIGN (64<<10)
97
98static struct i915_hw_context *
99i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id);
Chris Wilson9a3b5302012-07-15 12:34:24 +0100100static int do_switch(struct i915_hw_context *to);
Ben Widawsky40521052012-06-04 14:42:43 -0700101
Ben Widawsky254f9652012-06-04 14:42:42 -0700102static int get_context_size(struct drm_device *dev)
103{
104 struct drm_i915_private *dev_priv = dev->dev_private;
105 int ret;
106 u32 reg;
107
108 switch (INTEL_INFO(dev)->gen) {
109 case 6:
110 reg = I915_READ(CXT_SIZE);
111 ret = GEN6_CXT_TOTAL_SIZE(reg) * 64;
112 break;
113 case 7:
Ben Widawsky4f91dd62012-07-18 10:10:09 -0700114 reg = I915_READ(GEN7_CXT_SIZE);
Ben Widawsky2e4291e2012-07-24 20:47:30 -0700115 if (IS_HASWELL(dev))
116 ret = HSW_CXT_TOTAL_SIZE(reg) * 64;
117 else
118 ret = GEN7_CXT_TOTAL_SIZE(reg) * 64;
Ben Widawsky254f9652012-06-04 14:42:42 -0700119 break;
120 default:
121 BUG();
122 }
123
124 return ret;
125}
126
Ben Widawsky40521052012-06-04 14:42:43 -0700127static void do_destroy(struct i915_hw_context *ctx)
128{
129 struct drm_device *dev = ctx->obj->base.dev;
130 struct drm_i915_private *dev_priv = dev->dev_private;
131
132 if (ctx->file_priv)
133 idr_remove(&ctx->file_priv->context_idr, ctx->id);
134 else
135 BUG_ON(ctx != dev_priv->ring[RCS].default_context);
136
137 drm_gem_object_unreference(&ctx->obj->base);
138 kfree(ctx);
139}
140
Ben Widawsky146937e2012-06-29 10:30:39 -0700141static struct i915_hw_context *
Ben Widawsky40521052012-06-04 14:42:43 -0700142create_hw_context(struct drm_device *dev,
Ben Widawsky146937e2012-06-29 10:30:39 -0700143 struct drm_i915_file_private *file_priv)
Ben Widawsky40521052012-06-04 14:42:43 -0700144{
145 struct drm_i915_private *dev_priv = dev->dev_private;
Ben Widawsky146937e2012-06-29 10:30:39 -0700146 struct i915_hw_context *ctx;
Ben Widawsky40521052012-06-04 14:42:43 -0700147 int ret, id;
148
Ben Widawskyf94982b2012-11-10 10:56:04 -0800149 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
Ben Widawsky146937e2012-06-29 10:30:39 -0700150 if (ctx == NULL)
151 return ERR_PTR(-ENOMEM);
Ben Widawsky40521052012-06-04 14:42:43 -0700152
Ben Widawsky146937e2012-06-29 10:30:39 -0700153 ctx->obj = i915_gem_alloc_object(dev, dev_priv->hw_context_size);
154 if (ctx->obj == NULL) {
155 kfree(ctx);
Ben Widawsky40521052012-06-04 14:42:43 -0700156 DRM_DEBUG_DRIVER("Context object allocated failed\n");
Ben Widawsky146937e2012-06-29 10:30:39 -0700157 return ERR_PTR(-ENOMEM);
Ben Widawsky40521052012-06-04 14:42:43 -0700158 }
159
160 /* The ring associated with the context object is handled by the normal
161 * object tracking code. We give an initial ring value simple to pass an
162 * assertion in the context switch code.
163 */
Ben Widawsky146937e2012-06-29 10:30:39 -0700164 ctx->ring = &dev_priv->ring[RCS];
Ben Widawsky40521052012-06-04 14:42:43 -0700165
166 /* Default context will never have a file_priv */
167 if (file_priv == NULL)
Ben Widawsky146937e2012-06-29 10:30:39 -0700168 return ctx;
Ben Widawsky40521052012-06-04 14:42:43 -0700169
Ben Widawsky146937e2012-06-29 10:30:39 -0700170 ctx->file_priv = file_priv;
Ben Widawsky40521052012-06-04 14:42:43 -0700171
172again:
173 if (idr_pre_get(&file_priv->context_idr, GFP_KERNEL) == 0) {
174 ret = -ENOMEM;
175 DRM_DEBUG_DRIVER("idr allocation failed\n");
176 goto err_out;
177 }
178
Ben Widawsky146937e2012-06-29 10:30:39 -0700179 ret = idr_get_new_above(&file_priv->context_idr, ctx,
Ben Widawsky40521052012-06-04 14:42:43 -0700180 DEFAULT_CONTEXT_ID + 1, &id);
181 if (ret == 0)
Ben Widawsky146937e2012-06-29 10:30:39 -0700182 ctx->id = id;
Ben Widawsky40521052012-06-04 14:42:43 -0700183
184 if (ret == -EAGAIN)
185 goto again;
186 else if (ret)
187 goto err_out;
188
Ben Widawsky146937e2012-06-29 10:30:39 -0700189 return ctx;
Ben Widawsky40521052012-06-04 14:42:43 -0700190
191err_out:
Ben Widawsky146937e2012-06-29 10:30:39 -0700192 do_destroy(ctx);
193 return ERR_PTR(ret);
Ben Widawsky40521052012-06-04 14:42:43 -0700194}
195
Ben Widawskye0556842012-06-04 14:42:46 -0700196static inline bool is_default_context(struct i915_hw_context *ctx)
197{
198 return (ctx == ctx->ring->default_context);
199}
200
Ben Widawsky254f9652012-06-04 14:42:42 -0700201/**
202 * The default context needs to exist per ring that uses contexts. It stores the
203 * context state of the GPU for applications that don't utilize HW contexts, as
204 * well as an idle case.
205 */
206static int create_default_context(struct drm_i915_private *dev_priv)
207{
Ben Widawsky40521052012-06-04 14:42:43 -0700208 struct i915_hw_context *ctx;
209 int ret;
210
211 BUG_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
212
Ben Widawsky146937e2012-06-29 10:30:39 -0700213 ctx = create_hw_context(dev_priv->dev, NULL);
214 if (IS_ERR(ctx))
215 return PTR_ERR(ctx);
Ben Widawsky40521052012-06-04 14:42:43 -0700216
217 /* We may need to do things with the shrinker which require us to
218 * immediately switch back to the default context. This can cause a
219 * problem as pinning the default context also requires GTT space which
220 * may not be available. To avoid this we always pin the
221 * default context.
222 */
Ben Widawsky146937e2012-06-29 10:30:39 -0700223 dev_priv->ring[RCS].default_context = ctx;
Chris Wilson86a1ee22012-08-11 15:41:04 +0100224 ret = i915_gem_object_pin(ctx->obj, CONTEXT_ALIGN, false, false);
Chris Wilson9a3b5302012-07-15 12:34:24 +0100225 if (ret)
226 goto err_destroy;
Ben Widawsky40521052012-06-04 14:42:43 -0700227
Chris Wilson9a3b5302012-07-15 12:34:24 +0100228 ret = do_switch(ctx);
229 if (ret)
230 goto err_unpin;
Ben Widawskydfabbcb2012-06-04 14:42:51 -0700231
Chris Wilson9a3b5302012-07-15 12:34:24 +0100232 DRM_DEBUG_DRIVER("Default HW context loaded\n");
233 return 0;
234
235err_unpin:
236 i915_gem_object_unpin(ctx->obj);
237err_destroy:
238 do_destroy(ctx);
Ben Widawsky40521052012-06-04 14:42:43 -0700239 return ret;
Ben Widawsky254f9652012-06-04 14:42:42 -0700240}
241
242void i915_gem_context_init(struct drm_device *dev)
243{
244 struct drm_i915_private *dev_priv = dev->dev_private;
Ben Widawsky254f9652012-06-04 14:42:42 -0700245
Ben Widawskye158c5a2012-06-17 09:37:24 -0700246 if (!HAS_HW_CONTEXTS(dev)) {
247 dev_priv->hw_contexts_disabled = true;
Ben Widawsky254f9652012-06-04 14:42:42 -0700248 return;
Ben Widawskye158c5a2012-06-17 09:37:24 -0700249 }
Ben Widawsky254f9652012-06-04 14:42:42 -0700250
251 /* If called from reset, or thaw... we've been here already */
Ben Widawsky40521052012-06-04 14:42:43 -0700252 if (dev_priv->hw_contexts_disabled ||
253 dev_priv->ring[RCS].default_context)
Ben Widawsky254f9652012-06-04 14:42:42 -0700254 return;
255
Ben Widawsky07ea0d82013-02-07 13:34:19 -0800256 dev_priv->hw_context_size = round_up(get_context_size(dev), 4096);
Ben Widawsky254f9652012-06-04 14:42:42 -0700257
Ben Widawsky07ea0d82013-02-07 13:34:19 -0800258 if (dev_priv->hw_context_size > (1<<20)) {
Ben Widawsky254f9652012-06-04 14:42:42 -0700259 dev_priv->hw_contexts_disabled = true;
260 return;
261 }
262
263 if (create_default_context(dev_priv)) {
264 dev_priv->hw_contexts_disabled = true;
265 return;
266 }
267
268 DRM_DEBUG_DRIVER("HW context support initialized\n");
269}
270
271void i915_gem_context_fini(struct drm_device *dev)
272{
273 struct drm_i915_private *dev_priv = dev->dev_private;
274
275 if (dev_priv->hw_contexts_disabled)
276 return;
Ben Widawsky40521052012-06-04 14:42:43 -0700277
Daniel Vetter55a66622012-06-19 21:55:32 +0200278 /* The only known way to stop the gpu from accessing the hw context is
279 * to reset it. Do this as the very last operation to avoid confusing
280 * other code, leading to spurious errors. */
281 intel_gpu_reset(dev);
282
Ben Widawsky40521052012-06-04 14:42:43 -0700283 i915_gem_object_unpin(dev_priv->ring[RCS].default_context->obj);
284
285 do_destroy(dev_priv->ring[RCS].default_context);
Ben Widawsky254f9652012-06-04 14:42:42 -0700286}
287
Ben Widawsky40521052012-06-04 14:42:43 -0700288static int context_idr_cleanup(int id, void *p, void *data)
289{
Daniel Vetter73c273e2012-06-19 20:27:39 +0200290 struct i915_hw_context *ctx = p;
Ben Widawsky40521052012-06-04 14:42:43 -0700291
292 BUG_ON(id == DEFAULT_CONTEXT_ID);
Ben Widawsky40521052012-06-04 14:42:43 -0700293
294 do_destroy(ctx);
295
296 return 0;
Ben Widawsky254f9652012-06-04 14:42:42 -0700297}
298
299void i915_gem_context_close(struct drm_device *dev, struct drm_file *file)
300{
Ben Widawsky40521052012-06-04 14:42:43 -0700301 struct drm_i915_file_private *file_priv = file->driver_priv;
Ben Widawsky254f9652012-06-04 14:42:42 -0700302
Ben Widawsky40521052012-06-04 14:42:43 -0700303 mutex_lock(&dev->struct_mutex);
Daniel Vetter73c273e2012-06-19 20:27:39 +0200304 idr_for_each(&file_priv->context_idr, context_idr_cleanup, NULL);
Ben Widawsky40521052012-06-04 14:42:43 -0700305 idr_destroy(&file_priv->context_idr);
306 mutex_unlock(&dev->struct_mutex);
307}
308
Ben Widawskye0556842012-06-04 14:42:46 -0700309static struct i915_hw_context *
Ben Widawsky40521052012-06-04 14:42:43 -0700310i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id)
311{
312 return (struct i915_hw_context *)idr_find(&file_priv->context_idr, id);
Ben Widawsky254f9652012-06-04 14:42:42 -0700313}
Ben Widawskye0556842012-06-04 14:42:46 -0700314
315static inline int
316mi_set_context(struct intel_ring_buffer *ring,
317 struct i915_hw_context *new_context,
318 u32 hw_flags)
319{
320 int ret;
321
Ben Widawsky12b02862012-06-04 14:42:50 -0700322 /* w/a: If Flush TLB Invalidation Mode is enabled, driver must do a TLB
323 * invalidation prior to MI_SET_CONTEXT. On GEN6 we don't set the value
324 * explicitly, so we rely on the value at ring init, stored in
325 * itlb_before_ctx_switch.
326 */
327 if (IS_GEN6(ring->dev) && ring->itlb_before_ctx_switch) {
Chris Wilsonac82ea22012-10-01 14:27:04 +0100328 ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, 0);
Ben Widawsky12b02862012-06-04 14:42:50 -0700329 if (ret)
330 return ret;
331 }
332
Ben Widawskye37ec392012-06-04 14:42:48 -0700333 ret = intel_ring_begin(ring, 6);
Ben Widawskye0556842012-06-04 14:42:46 -0700334 if (ret)
335 return ret;
336
Ben Widawskye37ec392012-06-04 14:42:48 -0700337 if (IS_GEN7(ring->dev))
338 intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_DISABLE);
339 else
340 intel_ring_emit(ring, MI_NOOP);
341
Ben Widawskye0556842012-06-04 14:42:46 -0700342 intel_ring_emit(ring, MI_NOOP);
343 intel_ring_emit(ring, MI_SET_CONTEXT);
344 intel_ring_emit(ring, new_context->obj->gtt_offset |
345 MI_MM_SPACE_GTT |
346 MI_SAVE_EXT_STATE_EN |
347 MI_RESTORE_EXT_STATE_EN |
348 hw_flags);
349 /* w/a: MI_SET_CONTEXT must always be followed by MI_NOOP */
350 intel_ring_emit(ring, MI_NOOP);
351
Ben Widawskye37ec392012-06-04 14:42:48 -0700352 if (IS_GEN7(ring->dev))
353 intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_ENABLE);
354 else
355 intel_ring_emit(ring, MI_NOOP);
356
Ben Widawskye0556842012-06-04 14:42:46 -0700357 intel_ring_advance(ring);
358
359 return ret;
360}
361
Chris Wilson9a3b5302012-07-15 12:34:24 +0100362static int do_switch(struct i915_hw_context *to)
Ben Widawskye0556842012-06-04 14:42:46 -0700363{
Chris Wilson9a3b5302012-07-15 12:34:24 +0100364 struct intel_ring_buffer *ring = to->ring;
365 struct drm_i915_gem_object *from_obj = ring->last_context_obj;
Ben Widawskye0556842012-06-04 14:42:46 -0700366 u32 hw_flags = 0;
367 int ret;
368
Ben Widawskye0556842012-06-04 14:42:46 -0700369 BUG_ON(from_obj != NULL && from_obj->pin_count == 0);
370
Chris Wilson9a3b5302012-07-15 12:34:24 +0100371 if (from_obj == to->obj)
372 return 0;
373
Chris Wilson86a1ee22012-08-11 15:41:04 +0100374 ret = i915_gem_object_pin(to->obj, CONTEXT_ALIGN, false, false);
Ben Widawskye0556842012-06-04 14:42:46 -0700375 if (ret)
376 return ret;
377
Chris Wilsond3373a22012-07-15 12:34:22 +0100378 /* Clear this page out of any CPU caches for coherent swap-in/out. Note
379 * that thanks to write = false in this call and us not setting any gpu
380 * write domains when putting a context object onto the active list
381 * (when switching away from it), this won't block.
382 * XXX: We need a real interface to do this instead of trickery. */
383 ret = i915_gem_object_set_to_gtt_domain(to->obj, false);
384 if (ret) {
385 i915_gem_object_unpin(to->obj);
386 return ret;
387 }
388
Daniel Vetter3af7b852012-06-14 00:08:32 +0200389 if (!to->obj->has_global_gtt_mapping)
390 i915_gem_gtt_bind_object(to->obj, to->obj->cache_level);
391
Ben Widawskye0556842012-06-04 14:42:46 -0700392 if (!to->is_initialized || is_default_context(to))
393 hw_flags |= MI_RESTORE_INHIBIT;
394 else if (WARN_ON_ONCE(from_obj == to->obj)) /* not yet expected */
395 hw_flags |= MI_FORCE_RESTORE;
396
Ben Widawskye0556842012-06-04 14:42:46 -0700397 ret = mi_set_context(ring, to, hw_flags);
398 if (ret) {
399 i915_gem_object_unpin(to->obj);
400 return ret;
401 }
402
403 /* The backing object for the context is done after switching to the
404 * *next* context. Therefore we cannot retire the previous context until
405 * the next context has already started running. In fact, the below code
406 * is a bit suboptimal because the retiring can occur simply after the
407 * MI_SET_CONTEXT instead of when the next seqno has completed.
408 */
409 if (from_obj != NULL) {
410 from_obj->base.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
Chris Wilson9d7730912012-11-27 16:22:52 +0000411 i915_gem_object_move_to_active(from_obj, ring);
Ben Widawskye0556842012-06-04 14:42:46 -0700412 /* As long as MI_SET_CONTEXT is serializing, ie. it flushes the
413 * whole damn pipeline, we don't need to explicitly mark the
414 * object dirty. The only exception is that the context must be
415 * correct in case the object gets swapped out. Ideally we'd be
416 * able to defer doing this until we know the object would be
417 * swapped, but there is no way to do that yet.
418 */
419 from_obj->dirty = 1;
Chris Wilson9a3b5302012-07-15 12:34:24 +0100420 BUG_ON(from_obj->ring != ring);
Ben Widawskye0556842012-06-04 14:42:46 -0700421 i915_gem_object_unpin(from_obj);
Chris Wilsonb259b312012-07-15 12:34:23 +0100422
423 drm_gem_object_unreference(&from_obj->base);
Ben Widawskye0556842012-06-04 14:42:46 -0700424 }
425
Chris Wilsonb259b312012-07-15 12:34:23 +0100426 drm_gem_object_reference(&to->obj->base);
Ben Widawskye0556842012-06-04 14:42:46 -0700427 ring->last_context_obj = to->obj;
428 to->is_initialized = true;
429
430 return 0;
431}
432
433/**
434 * i915_switch_context() - perform a GPU context switch.
435 * @ring: ring for which we'll execute the context switch
436 * @file_priv: file_priv associated with the context, may be NULL
437 * @id: context id number
438 * @seqno: sequence number by which the new context will be switched to
439 * @flags:
440 *
441 * The context life cycle is simple. The context refcount is incremented and
442 * decremented by 1 and create and destroy. If the context is in use by the GPU,
443 * it will have a refoucnt > 1. This allows us to destroy the context abstract
444 * object while letting the normal object tracking destroy the backing BO.
445 */
446int i915_switch_context(struct intel_ring_buffer *ring,
447 struct drm_file *file,
448 int to_id)
449{
450 struct drm_i915_private *dev_priv = ring->dev->dev_private;
Ben Widawskye0556842012-06-04 14:42:46 -0700451 struct i915_hw_context *to;
Ben Widawskye0556842012-06-04 14:42:46 -0700452
453 if (dev_priv->hw_contexts_disabled)
454 return 0;
455
456 if (ring != &dev_priv->ring[RCS])
457 return 0;
458
Ben Widawskye0556842012-06-04 14:42:46 -0700459 if (to_id == DEFAULT_CONTEXT_ID) {
460 to = ring->default_context;
461 } else {
Chris Wilson9a3b5302012-07-15 12:34:24 +0100462 if (file == NULL)
463 return -EINVAL;
464
465 to = i915_gem_context_get(file->driver_priv, to_id);
Ben Widawskye0556842012-06-04 14:42:46 -0700466 if (to == NULL)
Daniel Vetter0d326012012-06-19 16:52:31 +0200467 return -ENOENT;
Ben Widawskye0556842012-06-04 14:42:46 -0700468 }
469
Chris Wilson9a3b5302012-07-15 12:34:24 +0100470 return do_switch(to);
Ben Widawskye0556842012-06-04 14:42:46 -0700471}
Ben Widawsky84624812012-06-04 14:42:54 -0700472
473int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
474 struct drm_file *file)
475{
Daniel Vetter5fa8be62012-06-19 17:16:01 +0200476 struct drm_i915_private *dev_priv = dev->dev_private;
Ben Widawsky84624812012-06-04 14:42:54 -0700477 struct drm_i915_gem_context_create *args = data;
478 struct drm_i915_file_private *file_priv = file->driver_priv;
479 struct i915_hw_context *ctx;
480 int ret;
481
482 if (!(dev->driver->driver_features & DRIVER_GEM))
483 return -ENODEV;
484
Daniel Vetter5fa8be62012-06-19 17:16:01 +0200485 if (dev_priv->hw_contexts_disabled)
486 return -ENODEV;
487
Ben Widawsky84624812012-06-04 14:42:54 -0700488 ret = i915_mutex_lock_interruptible(dev);
489 if (ret)
490 return ret;
491
Ben Widawsky146937e2012-06-29 10:30:39 -0700492 ctx = create_hw_context(dev, file_priv);
Ben Widawsky84624812012-06-04 14:42:54 -0700493 mutex_unlock(&dev->struct_mutex);
Dan Carpenterbe636382012-07-17 09:44:49 +0300494 if (IS_ERR(ctx))
495 return PTR_ERR(ctx);
Ben Widawsky84624812012-06-04 14:42:54 -0700496
497 args->ctx_id = ctx->id;
498 DRM_DEBUG_DRIVER("HW context %d created\n", args->ctx_id);
499
Dan Carpenterbe636382012-07-17 09:44:49 +0300500 return 0;
Ben Widawsky84624812012-06-04 14:42:54 -0700501}
502
503int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
504 struct drm_file *file)
505{
506 struct drm_i915_gem_context_destroy *args = data;
507 struct drm_i915_file_private *file_priv = file->driver_priv;
Ben Widawsky84624812012-06-04 14:42:54 -0700508 struct i915_hw_context *ctx;
509 int ret;
510
511 if (!(dev->driver->driver_features & DRIVER_GEM))
512 return -ENODEV;
513
514 ret = i915_mutex_lock_interruptible(dev);
515 if (ret)
516 return ret;
517
518 ctx = i915_gem_context_get(file_priv, args->ctx_id);
519 if (!ctx) {
520 mutex_unlock(&dev->struct_mutex);
Daniel Vetter0d326012012-06-19 16:52:31 +0200521 return -ENOENT;
Ben Widawsky84624812012-06-04 14:42:54 -0700522 }
523
524 do_destroy(ctx);
525
526 mutex_unlock(&dev->struct_mutex);
527
528 DRM_DEBUG_DRIVER("HW context %d destroyed\n", args->ctx_id);
529 return 0;
530}