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H. Peter Anvin1965aae2008-10-22 22:26:29 -07001#ifndef _ASM_X86_IO_H
2#define _ASM_X86_IO_H
venkatesh.pallipadi@intel.come045fb22008-03-18 17:00:15 -07003
Brian Gerst1c5b9062010-02-05 09:37:09 -05004/*
5 * This file contains the definitions for the x86 IO instructions
6 * inb/inw/inl/outb/outw/outl and the "string versions" of the same
7 * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
8 * versions of the single-IO instructions (inb_p/inw_p/..).
9 *
10 * This file is not meant to be obfuscating: it's just complicated
11 * to (a) handle it all in a way that makes gcc able to optimize it
12 * as well as possible and (b) trying to avoid writing the same thing
13 * over and over again with slight variations and possibly making a
14 * mistake somewhere.
15 */
16
17/*
18 * Thanks to James van Artsdalen for a better timing-fix than
19 * the two short jumps: using outb's to a nonexistent port seems
20 * to guarantee better timings even on fast machines.
21 *
22 * On the other hand, I'd like to be sure of a non-existent port:
23 * I feel a bit unsafe about using 0x80 (should be safe, though)
24 *
25 * Linus
26 */
27
28 /*
29 * Bit simplified and optimized by Jan Hubicka
30 * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
31 *
32 * isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
33 * isa_read[wl] and isa_write[wl] fixed
34 * - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
35 */
36
venkatesh.pallipadi@intel.comb310f381d2008-03-18 17:00:24 -070037#define ARCH_HAS_IOREMAP_WC
Toshi Kanid8382702015-06-04 18:55:15 +020038#define ARCH_HAS_IOREMAP_WT
venkatesh.pallipadi@intel.comb310f381d2008-03-18 17:00:24 -070039
Brian Gerst1c5b9062010-02-05 09:37:09 -050040#include <linux/string.h>
Linus Torvaldsc1f64a52008-05-27 09:47:13 -070041#include <linux/compiler.h>
Jeremy Fitzhardinge976e8f62009-02-06 13:29:44 -080042#include <asm/page.h>
Mark Salter5b7c73e2014-04-07 15:39:49 -070043#include <asm/early_ioremap.h>
Stephen Rothwelld6472302015-06-02 19:01:38 +100044#include <asm/pgtable_types.h>
Linus Torvaldsc1f64a52008-05-27 09:47:13 -070045
46#define build_mmio_read(name, size, type, reg, barrier) \
47static inline type name(const volatile void __iomem *addr) \
Mikael Pettersson1c5b0eb2008-08-13 21:07:07 +020048{ type ret; asm volatile("mov" size " %1,%0":reg (ret) \
Linus Torvaldsc1f64a52008-05-27 09:47:13 -070049:"m" (*(volatile type __force *)addr) barrier); return ret; }
50
51#define build_mmio_write(name, size, type, reg, barrier) \
52static inline void name(type val, volatile void __iomem *addr) \
53{ asm volatile("mov" size " %0,%1": :reg (val), \
54"m" (*(volatile type __force *)addr) barrier); }
55
Mikael Pettersson1c5b0eb2008-08-13 21:07:07 +020056build_mmio_read(readb, "b", unsigned char, "=q", :"memory")
57build_mmio_read(readw, "w", unsigned short, "=r", :"memory")
58build_mmio_read(readl, "l", unsigned int, "=r", :"memory")
Linus Torvaldsc1f64a52008-05-27 09:47:13 -070059
Mikael Pettersson1c5b0eb2008-08-13 21:07:07 +020060build_mmio_read(__readb, "b", unsigned char, "=q", )
61build_mmio_read(__readw, "w", unsigned short, "=r", )
62build_mmio_read(__readl, "l", unsigned int, "=r", )
Linus Torvaldsc1f64a52008-05-27 09:47:13 -070063
64build_mmio_write(writeb, "b", unsigned char, "q", :"memory")
65build_mmio_write(writew, "w", unsigned short, "r", :"memory")
66build_mmio_write(writel, "l", unsigned int, "r", :"memory")
67
68build_mmio_write(__writeb, "b", unsigned char, "q", )
69build_mmio_write(__writew, "w", unsigned short, "r", )
70build_mmio_write(__writel, "l", unsigned int, "r", )
71
72#define readb_relaxed(a) __readb(a)
73#define readw_relaxed(a) __readw(a)
74#define readl_relaxed(a) __readl(a)
75#define __raw_readb __readb
76#define __raw_readw __readw
77#define __raw_readl __readl
78
Will Deaconcbc908e2013-09-04 11:34:08 +010079#define writeb_relaxed(v, a) __writeb(v, a)
80#define writew_relaxed(v, a) __writew(v, a)
81#define writel_relaxed(v, a) __writel(v, a)
Linus Torvaldsc1f64a52008-05-27 09:47:13 -070082#define __raw_writeb __writeb
83#define __raw_writew __writew
84#define __raw_writel __writel
85
86#define mmiowb() barrier()
87
88#ifdef CONFIG_X86_64
Ingo Molnar93093d02008-11-30 10:20:20 +010089
Mikael Pettersson1c5b0eb2008-08-13 21:07:07 +020090build_mmio_read(readq, "q", unsigned long, "=r", :"memory")
Linus Torvaldsc1f64a52008-05-27 09:47:13 -070091build_mmio_write(writeq, "q", unsigned long, "r", :"memory")
Linus Torvaldsc1f64a52008-05-27 09:47:13 -070092
Ingo Molnar93093d02008-11-30 10:20:20 +010093#define readq_relaxed(a) readq(a)
Will Deaconcbc908e2013-09-04 11:34:08 +010094#define writeq_relaxed(v, a) writeq(v, a)
Ingo Molnar93093d02008-11-30 10:20:20 +010095
96#define __raw_readq(a) readq(a)
97#define __raw_writeq(val, addr) writeq(val, addr)
98
Ingo Molnara0b11312008-11-30 09:33:55 +010099/* Let people know that we have them */
Ingo Molnar93093d02008-11-30 10:20:20 +0100100#define readq readq
101#define writeq writeq
Hitoshi Mitake2c5643b2008-11-30 17:16:04 +0900102
Roland Dreierdbee8a02011-05-24 17:13:09 -0700103#endif
104
Jeremy Fitzhardinge976e8f62009-02-06 13:29:44 -0800105/**
106 * virt_to_phys - map virtual addresses to physical
107 * @address: address to remap
108 *
109 * The returned physical address is the physical (CPU) mapping for
110 * the memory address given. It is only valid to use this function on
111 * addresses directly mapped or allocated via kmalloc.
112 *
113 * This function does not give bus mappings for DMA transfers. In
114 * almost all conceivable cases a device driver should not be using
115 * this function
116 */
117
118static inline phys_addr_t virt_to_phys(volatile void *address)
119{
120 return __pa(address);
121}
122
123/**
124 * phys_to_virt - map physical address to virtual
125 * @address: address to remap
126 *
127 * The returned virtual address is a current CPU mapping for
128 * the memory address given. It is only valid to use this function on
129 * addresses that have a kernel mapping
130 *
131 * This function does not handle bus mappings for DMA transfers. In
132 * almost all conceivable cases a device driver should not be using
133 * this function
134 */
135
136static inline void *phys_to_virt(phys_addr_t address)
137{
138 return __va(address);
139}
140
141/*
142 * Change "struct page" to physical address.
143 */
144#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
145
146/*
147 * ISA I/O bus memory addresses are 1:1 with the physical address.
H. Peter Anvina7eb5182009-02-17 13:01:51 -0800148 * However, we truncate the address to unsigned int to avoid undesirable
149 * promitions in legacy drivers.
Jeremy Fitzhardinge976e8f62009-02-06 13:29:44 -0800150 */
H. Peter Anvina7eb5182009-02-17 13:01:51 -0800151static inline unsigned int isa_virt_to_bus(volatile void *address)
152{
153 return (unsigned int)virt_to_phys(address);
154}
155#define isa_page_to_bus(page) ((unsigned int)page_to_phys(page))
156#define isa_bus_to_virt phys_to_virt
Jeremy Fitzhardinge976e8f62009-02-06 13:29:44 -0800157
158/*
159 * However PCI ones are not necessarily 1:1 and therefore these interfaces
160 * are forbidden in portable PCI drivers.
161 *
162 * Allow them on x86 for legacy drivers, though.
163 */
164#define virt_to_bus virt_to_phys
165#define bus_to_virt phys_to_virt
166
Jeremy Fitzhardinge133822c2009-02-06 13:29:52 -0800167/**
168 * ioremap - map bus memory into CPU space
169 * @offset: bus address of the memory
170 * @size: size of the resource to map
171 *
172 * ioremap performs a platform specific sequence of operations to
173 * make bus memory CPU accessible via the readb/readw/readl/writeb/
174 * writew/writel functions and the other mmio helpers. The returned
175 * address is not guaranteed to be usable directly as a virtual
176 * address.
177 *
178 * If the area you are trying to map is a PCI BAR you should have a
179 * look at pci_iomap().
180 */
181extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
Luis R. Rodrigueze4b6be332015-05-11 10:15:53 +0200182extern void __iomem *ioremap_uc(resource_size_t offset, unsigned long size);
Luis R. Rodriguez8c7ea502015-07-09 17:28:16 -0700183#define ioremap_uc ioremap_uc
184
Jeremy Fitzhardinge133822c2009-02-06 13:29:52 -0800185extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
186extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size,
187 unsigned long prot_val);
188
189/*
190 * The default ioremap() behavior is non-cached:
191 */
192static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
193{
194 return ioremap_nocache(offset, size);
195}
196
197extern void iounmap(volatile void __iomem *addr);
198
Cliff Wickman3ee48b62010-09-16 11:44:02 -0500199extern void set_iounmap_nonlazy(void);
Jaswinder Singh9321b8c2008-07-21 22:24:29 +0530200
Brian Gerst1c5b9062010-02-05 09:37:09 -0500201#ifdef __KERNEL__
202
203#include <asm-generic/iomap.h>
204
Brian Gerst1c5b9062010-02-05 09:37:09 -0500205/*
206 * Convert a virtual cached pointer to an uncached pointer
207 */
208#define xlate_dev_kmem_ptr(p) p
209
210static inline void
211memset_io(volatile void __iomem *addr, unsigned char val, size_t count)
212{
213 memset((void __force *)addr, val, count);
214}
215
216static inline void
217memcpy_fromio(void *dst, const volatile void __iomem *src, size_t count)
218{
219 memcpy(dst, (const void __force *)src, count);
220}
221
222static inline void
223memcpy_toio(volatile void __iomem *dst, const void *src, size_t count)
224{
225 memcpy((void __force *)dst, src, count);
226}
227
228/*
229 * ISA space is 'always mapped' on a typical x86 system, no need to
230 * explicitly ioremap() it. The fact that the ISA IO space is mapped
231 * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
232 * are physical addresses. The following constant pointer can be
233 * used as the IO-area pointer (it can be iounmapped as well, so the
234 * analogy with PCI is quite large):
235 */
236#define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
237
238/*
239 * Cache management
240 *
241 * This needed for two cases
242 * 1. Out of order aware processors
243 * 2. Accidentally out of order processors (PPro errata #51)
244 */
245
246static inline void flush_write_buffers(void)
247{
Dave Jones09df7c42014-03-10 19:32:22 -0400248#if defined(CONFIG_X86_PPRO_FENCE)
Brian Gerst1c5b9062010-02-05 09:37:09 -0500249 asm volatile("lock; addl $0,0(%%esp)": : :"memory");
Thomas Gleixner96a388d2007-10-11 11:20:03 +0200250#endif
Brian Gerst1c5b9062010-02-05 09:37:09 -0500251}
252
253#endif /* __KERNEL__ */
254
255extern void native_io_delay(void);
256
257extern int io_delay_type;
258extern void io_delay_init(void);
259
260#if defined(CONFIG_PARAVIRT)
261#include <asm/paravirt.h>
262#else
263
264static inline void slow_down_io(void)
265{
266 native_io_delay();
267#ifdef REALLY_SLOW_IO
268 native_io_delay();
269 native_io_delay();
270 native_io_delay();
271#endif
272}
273
274#endif
275
276#define BUILDIO(bwl, bw, type) \
277static inline void out##bwl(unsigned type value, int port) \
278{ \
279 asm volatile("out" #bwl " %" #bw "0, %w1" \
280 : : "a"(value), "Nd"(port)); \
281} \
282 \
283static inline unsigned type in##bwl(int port) \
284{ \
285 unsigned type value; \
286 asm volatile("in" #bwl " %w1, %" #bw "0" \
287 : "=a"(value) : "Nd"(port)); \
288 return value; \
289} \
290 \
291static inline void out##bwl##_p(unsigned type value, int port) \
292{ \
293 out##bwl(value, port); \
294 slow_down_io(); \
295} \
296 \
297static inline unsigned type in##bwl##_p(int port) \
298{ \
299 unsigned type value = in##bwl(port); \
300 slow_down_io(); \
301 return value; \
302} \
303 \
304static inline void outs##bwl(int port, const void *addr, unsigned long count) \
305{ \
306 asm volatile("rep; outs" #bwl \
307 : "+S"(addr), "+c"(count) : "d"(port)); \
308} \
309 \
310static inline void ins##bwl(int port, void *addr, unsigned long count) \
311{ \
312 asm volatile("rep; ins" #bwl \
313 : "+D"(addr), "+c"(count) : "d"(port)); \
314}
315
316BUILDIO(b, b, char)
317BUILDIO(w, w, short)
318BUILDIO(l, , int)
venkatesh.pallipadi@intel.come045fb22008-03-18 17:00:15 -0700319
Thierry Reding4707a342014-07-28 17:20:33 +0200320extern void *xlate_dev_mem_ptr(phys_addr_t phys);
321extern void unxlate_dev_mem_ptr(phys_addr_t phys, void *addr);
venkatesh.pallipadi@intel.come045fb22008-03-18 17:00:15 -0700322
venkatesh.pallipadi@intel.com3a96ce82008-03-18 17:00:16 -0700323extern int ioremap_change_attr(unsigned long vaddr, unsigned long size,
Juergen Grossb14097b2014-11-03 14:01:58 +0100324 enum page_cache_mode pcm);
venkatesh.pallipadi@intel.comd639bab2009-01-09 16:13:13 -0800325extern void __iomem *ioremap_wc(resource_size_t offset, unsigned long size);
Toshi Kanid8382702015-06-04 18:55:15 +0200326extern void __iomem *ioremap_wt(resource_size_t offset, unsigned long size);
venkatesh.pallipadi@intel.com3a96ce82008-03-18 17:00:16 -0700327
Jeremy Fitzhardingefef5ba72010-10-13 16:02:24 -0700328extern bool is_early_ioremap_ptep(pte_t *ptep);
Jeremy Fitzhardinge4583ed52008-06-25 00:19:03 -0400329
Jeremy Fitzhardinged8e04202009-02-09 12:05:46 -0800330#ifdef CONFIG_XEN
Linus Torvalds33f35f22011-08-03 22:00:38 -1000331#include <xen/xen.h>
Jeremy Fitzhardinged8e04202009-02-09 12:05:46 -0800332struct bio_vec;
333
334extern bool xen_biovec_phys_mergeable(const struct bio_vec *vec1,
335 const struct bio_vec *vec2);
336
337#define BIOVEC_PHYS_MERGEABLE(vec1, vec2) \
338 (__BIOVEC_PHYS_MERGEABLE(vec1, vec2) && \
339 (!xen_domain() || xen_biovec_phys_mergeable(vec1, vec2)))
340#endif /* CONFIG_XEN */
341
Jeremy Fitzhardingea4487202009-01-28 15:42:23 -0800342#define IO_SPACE_LIMIT 0xffff
Jeremy Fitzhardinge4583ed52008-06-25 00:19:03 -0400343
Andy Lutomirskid0d98ee2013-05-13 23:58:40 +0000344#ifdef CONFIG_MTRR
Luis R. Rodriguez7d010fd2015-05-26 10:28:13 +0200345extern int __must_check arch_phys_wc_index(int handle);
346#define arch_phys_wc_index arch_phys_wc_index
347
Andy Lutomirskid0d98ee2013-05-13 23:58:40 +0000348extern int __must_check arch_phys_wc_add(unsigned long base,
349 unsigned long size);
350extern void arch_phys_wc_del(int handle);
351#define arch_phys_wc_add arch_phys_wc_add
352#endif
353
Dave Airlie8ef42272016-10-24 15:27:59 +1000354#ifdef CONFIG_X86_PAT
355extern int arch_io_reserve_memtype_wc(resource_size_t start, resource_size_t size);
356extern void arch_io_free_memtype_wc(resource_size_t start, resource_size_t size);
357#define arch_io_reserve_memtype_wc arch_io_reserve_memtype_wc
358#endif
359
H. Peter Anvin1965aae2008-10-22 22:26:29 -0700360#endif /* _ASM_X86_IO_H */