blob: 9519964ecb2ade297a463b58ddb2ce3f71052df7 [file] [log] [blame]
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001/*
2 * drivers/mmc/host/omap_hsmmc.c
3 *
4 * Driver for OMAP2430/3430 MMC controller.
5 *
6 * Copyright (C) 2007 Texas Instruments.
7 *
8 * Authors:
9 * Syed Mohammed Khasim <x0khasim@ti.com>
10 * Madhusudhan <madhu.cr@ti.com>
11 * Mohit Jalori <mjalori@ti.com>
12 *
13 * This file is licensed under the terms of the GNU General Public License
14 * version 2. This program is licensed "as is" without any warranty of any
15 * kind, whether express or implied.
16 */
17
18#include <linux/module.h>
19#include <linux/init.h>
Denis Karpovd900f712009-09-22 16:44:38 -070020#include <linux/debugfs.h>
21#include <linux/seq_file.h>
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +010022#include <linux/interrupt.h>
23#include <linux/delay.h>
24#include <linux/dma-mapping.h>
25#include <linux/platform_device.h>
26#include <linux/workqueue.h>
27#include <linux/timer.h>
28#include <linux/clk.h>
29#include <linux/mmc/host.h>
Jarkko Lavinen13189e72009-09-22 16:44:53 -070030#include <linux/mmc/core.h>
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +010031#include <linux/io.h>
32#include <linux/semaphore.h>
33#include <mach/dma.h>
34#include <mach/hardware.h>
35#include <mach/board.h>
36#include <mach/mmc.h>
37#include <mach/cpu.h>
38
39/* OMAP HSMMC Host Controller Registers */
40#define OMAP_HSMMC_SYSCONFIG 0x0010
Denis Karpov11dd62a2009-09-22 16:44:43 -070041#define OMAP_HSMMC_SYSSTATUS 0x0014
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +010042#define OMAP_HSMMC_CON 0x002C
43#define OMAP_HSMMC_BLK 0x0104
44#define OMAP_HSMMC_ARG 0x0108
45#define OMAP_HSMMC_CMD 0x010C
46#define OMAP_HSMMC_RSP10 0x0110
47#define OMAP_HSMMC_RSP32 0x0114
48#define OMAP_HSMMC_RSP54 0x0118
49#define OMAP_HSMMC_RSP76 0x011C
50#define OMAP_HSMMC_DATA 0x0120
51#define OMAP_HSMMC_HCTL 0x0128
52#define OMAP_HSMMC_SYSCTL 0x012C
53#define OMAP_HSMMC_STAT 0x0130
54#define OMAP_HSMMC_IE 0x0134
55#define OMAP_HSMMC_ISE 0x0138
56#define OMAP_HSMMC_CAPA 0x0140
57
58#define VS18 (1 << 26)
59#define VS30 (1 << 25)
60#define SDVS18 (0x5 << 9)
61#define SDVS30 (0x6 << 9)
David Brownelleb250822009-02-17 14:49:01 -080062#define SDVS33 (0x7 << 9)
Kim Kyuwon1b331e62009-02-20 13:10:08 +010063#define SDVS_MASK 0x00000E00
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +010064#define SDVSCLR 0xFFFFF1FF
65#define SDVSDET 0x00000400
66#define AUTOIDLE 0x1
67#define SDBP (1 << 8)
68#define DTO 0xe
69#define ICE 0x1
70#define ICS 0x2
71#define CEN (1 << 2)
72#define CLKD_MASK 0x0000FFC0
73#define CLKD_SHIFT 6
74#define DTO_MASK 0x000F0000
75#define DTO_SHIFT 16
76#define INT_EN_MASK 0x307F0033
Anand Gadiyarccdfe3a2009-09-22 16:44:21 -070077#define BWR_ENABLE (1 << 4)
78#define BRR_ENABLE (1 << 5)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +010079#define INIT_STREAM (1 << 1)
80#define DP_SELECT (1 << 21)
81#define DDIR (1 << 4)
82#define DMA_EN 0x1
83#define MSBS (1 << 5)
84#define BCE (1 << 1)
85#define FOUR_BIT (1 << 1)
Jarkko Lavinen73153012008-11-21 16:49:54 +020086#define DW8 (1 << 5)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +010087#define CC 0x1
88#define TC 0x02
89#define OD 0x1
90#define ERR (1 << 15)
91#define CMD_TIMEOUT (1 << 16)
92#define DATA_TIMEOUT (1 << 20)
93#define CMD_CRC (1 << 17)
94#define DATA_CRC (1 << 21)
95#define CARD_ERR (1 << 28)
96#define STAT_CLEAR 0xFFFFFFFF
97#define INIT_STREAM_CMD 0x00000000
98#define DUAL_VOLT_OCR_BIT 7
99#define SRC (1 << 25)
100#define SRD (1 << 26)
Denis Karpov11dd62a2009-09-22 16:44:43 -0700101#define SOFTRESET (1 << 1)
102#define RESETDONE (1 << 0)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100103
104/*
105 * FIXME: Most likely all the data using these _DEVID defines should come
106 * from the platform_data, or implemented in controller and slot specific
107 * functions.
108 */
109#define OMAP_MMC1_DEVID 0
110#define OMAP_MMC2_DEVID 1
Grazvydas Ignotasf3e2f1d2009-01-03 10:36:13 +0000111#define OMAP_MMC3_DEVID 2
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100112
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100113#define MMC_TIMEOUT_MS 20
114#define OMAP_MMC_MASTER_CLOCK 96000000
115#define DRIVER_NAME "mmci-omap-hs"
116
Denis Karpovdd498ef2009-09-22 16:44:49 -0700117/* Timeouts for entering power saving states on inactivity, msec */
118#define OMAP_MMC_DISABLED_TIMEOUT 100
Jarkko Lavinen13189e72009-09-22 16:44:53 -0700119#define OMAP_MMC_SLEEP_TIMEOUT 1000
120#define OMAP_MMC_OFF_TIMEOUT 8000
Denis Karpovdd498ef2009-09-22 16:44:49 -0700121
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100122/*
123 * One controller can have multiple slots, like on some omap boards using
124 * omap.c controller driver. Luckily this is not currently done on any known
125 * omap_hsmmc.c device.
126 */
127#define mmc_slot(host) (host->pdata->slots[host->slot_id])
128
129/*
130 * MMC Host controller read/write API's
131 */
132#define OMAP_HSMMC_READ(base, reg) \
133 __raw_readl((base) + OMAP_HSMMC_##reg)
134
135#define OMAP_HSMMC_WRITE(base, reg, val) \
136 __raw_writel((val), (base) + OMAP_HSMMC_##reg)
137
138struct mmc_omap_host {
139 struct device *dev;
140 struct mmc_host *mmc;
141 struct mmc_request *mrq;
142 struct mmc_command *cmd;
143 struct mmc_data *data;
144 struct clk *fclk;
145 struct clk *iclk;
146 struct clk *dbclk;
147 struct semaphore sem;
148 struct work_struct mmc_carddetect_work;
149 void __iomem *base;
150 resource_size_t mapbase;
151 unsigned int id;
152 unsigned int dma_len;
Juha Yrjola0ccd76d2008-11-14 15:22:00 +0200153 unsigned int dma_sg_idx;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100154 unsigned char bus_mode;
Adrian Huntera3621462009-09-22 16:44:42 -0700155 unsigned char power_mode;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100156 u32 *buffer;
157 u32 bytesleft;
158 int suspended;
159 int irq;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100160 int use_dma, dma_ch;
Grazvydas Ignotasf3e2f1d2009-01-03 10:36:13 +0000161 int dma_line_tx, dma_line_rx;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100162 int slot_id;
163 int dbclk_enabled;
Adrian Hunter4a694dc2009-01-12 16:13:08 +0200164 int response_busy;
Denis Karpov11dd62a2009-09-22 16:44:43 -0700165 int context_loss;
Denis Karpovdd498ef2009-09-22 16:44:49 -0700166 int dpm_state;
Adrian Hunter623821f2009-09-22 16:44:51 -0700167 int vdd;
Denis Karpov11dd62a2009-09-22 16:44:43 -0700168
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100169 struct omap_mmc_platform_data *pdata;
170};
171
172/*
173 * Stop clock to the card
174 */
175static void omap_mmc_stop_clock(struct mmc_omap_host *host)
176{
177 OMAP_HSMMC_WRITE(host->base, SYSCTL,
178 OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN);
179 if ((OMAP_HSMMC_READ(host->base, SYSCTL) & CEN) != 0x0)
180 dev_dbg(mmc_dev(host->mmc), "MMC Clock is not stoped\n");
181}
182
Denis Karpov11dd62a2009-09-22 16:44:43 -0700183#ifdef CONFIG_PM
184
185/*
186 * Restore the MMC host context, if it was lost as result of a
187 * power state change.
188 */
189static int omap_mmc_restore_ctx(struct mmc_omap_host *host)
190{
191 struct mmc_ios *ios = &host->mmc->ios;
192 struct omap_mmc_platform_data *pdata = host->pdata;
193 int context_loss = 0;
194 u32 hctl, capa, con;
195 u16 dsor = 0;
196 unsigned long timeout;
197
198 if (pdata->get_context_loss_count) {
199 context_loss = pdata->get_context_loss_count(host->dev);
200 if (context_loss < 0)
201 return 1;
202 }
203
204 dev_dbg(mmc_dev(host->mmc), "context was %slost\n",
205 context_loss == host->context_loss ? "not " : "");
206 if (host->context_loss == context_loss)
207 return 1;
208
209 /* Wait for hardware reset */
210 timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS);
211 while ((OMAP_HSMMC_READ(host->base, SYSSTATUS) & RESETDONE) != RESETDONE
212 && time_before(jiffies, timeout))
213 ;
214
215 /* Do software reset */
216 OMAP_HSMMC_WRITE(host->base, SYSCONFIG, SOFTRESET);
217 timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS);
218 while ((OMAP_HSMMC_READ(host->base, SYSSTATUS) & RESETDONE) != RESETDONE
219 && time_before(jiffies, timeout))
220 ;
221
222 OMAP_HSMMC_WRITE(host->base, SYSCONFIG,
223 OMAP_HSMMC_READ(host->base, SYSCONFIG) | AUTOIDLE);
224
225 if (host->id == OMAP_MMC1_DEVID) {
226 if (host->power_mode != MMC_POWER_OFF &&
227 (1 << ios->vdd) <= MMC_VDD_23_24)
228 hctl = SDVS18;
229 else
230 hctl = SDVS30;
231 capa = VS30 | VS18;
232 } else {
233 hctl = SDVS18;
234 capa = VS18;
235 }
236
237 OMAP_HSMMC_WRITE(host->base, HCTL,
238 OMAP_HSMMC_READ(host->base, HCTL) | hctl);
239
240 OMAP_HSMMC_WRITE(host->base, CAPA,
241 OMAP_HSMMC_READ(host->base, CAPA) | capa);
242
243 OMAP_HSMMC_WRITE(host->base, HCTL,
244 OMAP_HSMMC_READ(host->base, HCTL) | SDBP);
245
246 timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS);
247 while ((OMAP_HSMMC_READ(host->base, HCTL) & SDBP) != SDBP
248 && time_before(jiffies, timeout))
249 ;
250
251 OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
252 OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK);
253 OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK);
254
255 /* Do not initialize card-specific things if the power is off */
256 if (host->power_mode == MMC_POWER_OFF)
257 goto out;
258
259 con = OMAP_HSMMC_READ(host->base, CON);
260 switch (ios->bus_width) {
261 case MMC_BUS_WIDTH_8:
262 OMAP_HSMMC_WRITE(host->base, CON, con | DW8);
263 break;
264 case MMC_BUS_WIDTH_4:
265 OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8);
266 OMAP_HSMMC_WRITE(host->base, HCTL,
267 OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT);
268 break;
269 case MMC_BUS_WIDTH_1:
270 OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8);
271 OMAP_HSMMC_WRITE(host->base, HCTL,
272 OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT);
273 break;
274 }
275
276 if (ios->clock) {
277 dsor = OMAP_MMC_MASTER_CLOCK / ios->clock;
278 if (dsor < 1)
279 dsor = 1;
280
281 if (OMAP_MMC_MASTER_CLOCK / dsor > ios->clock)
282 dsor++;
283
284 if (dsor > 250)
285 dsor = 250;
286 }
287
288 OMAP_HSMMC_WRITE(host->base, SYSCTL,
289 OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN);
290 OMAP_HSMMC_WRITE(host->base, SYSCTL, (dsor << 6) | (DTO << 16));
291 OMAP_HSMMC_WRITE(host->base, SYSCTL,
292 OMAP_HSMMC_READ(host->base, SYSCTL) | ICE);
293
294 timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS);
295 while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != ICS
296 && time_before(jiffies, timeout))
297 ;
298
299 OMAP_HSMMC_WRITE(host->base, SYSCTL,
300 OMAP_HSMMC_READ(host->base, SYSCTL) | CEN);
301
302 con = OMAP_HSMMC_READ(host->base, CON);
303 if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN)
304 OMAP_HSMMC_WRITE(host->base, CON, con | OD);
305 else
306 OMAP_HSMMC_WRITE(host->base, CON, con & ~OD);
307out:
308 host->context_loss = context_loss;
309
310 dev_dbg(mmc_dev(host->mmc), "context is restored\n");
311 return 0;
312}
313
314/*
315 * Save the MMC host context (store the number of power state changes so far).
316 */
317static void omap_mmc_save_ctx(struct mmc_omap_host *host)
318{
319 struct omap_mmc_platform_data *pdata = host->pdata;
320 int context_loss;
321
322 if (pdata->get_context_loss_count) {
323 context_loss = pdata->get_context_loss_count(host->dev);
324 if (context_loss < 0)
325 return;
326 host->context_loss = context_loss;
327 }
328}
329
330#else
331
332static int omap_mmc_restore_ctx(struct mmc_omap_host *host)
333{
334 return 0;
335}
336
337static void omap_mmc_save_ctx(struct mmc_omap_host *host)
338{
339}
340
341#endif
342
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100343/*
344 * Send init stream sequence to card
345 * before sending IDLE command
346 */
347static void send_init_stream(struct mmc_omap_host *host)
348{
349 int reg = 0;
350 unsigned long timeout;
351
352 disable_irq(host->irq);
353 OMAP_HSMMC_WRITE(host->base, CON,
354 OMAP_HSMMC_READ(host->base, CON) | INIT_STREAM);
355 OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD);
356
357 timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS);
358 while ((reg != CC) && time_before(jiffies, timeout))
359 reg = OMAP_HSMMC_READ(host->base, STAT) & CC;
360
361 OMAP_HSMMC_WRITE(host->base, CON,
362 OMAP_HSMMC_READ(host->base, CON) & ~INIT_STREAM);
363 enable_irq(host->irq);
364}
365
366static inline
367int mmc_omap_cover_is_closed(struct mmc_omap_host *host)
368{
369 int r = 1;
370
371 if (host->pdata->slots[host->slot_id].get_cover_state)
372 r = host->pdata->slots[host->slot_id].get_cover_state(host->dev,
373 host->slot_id);
374 return r;
375}
376
377static ssize_t
378mmc_omap_show_cover_switch(struct device *dev, struct device_attribute *attr,
379 char *buf)
380{
381 struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev);
382 struct mmc_omap_host *host = mmc_priv(mmc);
383
384 return sprintf(buf, "%s\n", mmc_omap_cover_is_closed(host) ? "closed" :
385 "open");
386}
387
388static DEVICE_ATTR(cover_switch, S_IRUGO, mmc_omap_show_cover_switch, NULL);
389
390static ssize_t
391mmc_omap_show_slot_name(struct device *dev, struct device_attribute *attr,
392 char *buf)
393{
394 struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev);
395 struct mmc_omap_host *host = mmc_priv(mmc);
396 struct omap_mmc_slot_data slot = host->pdata->slots[host->slot_id];
397
Adrian Huntere68fdab2009-01-30 10:59:31 +0200398 return sprintf(buf, "%s\n", slot.name);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100399}
400
401static DEVICE_ATTR(slot_name, S_IRUGO, mmc_omap_show_slot_name, NULL);
402
403/*
404 * Configure the response type and send the cmd.
405 */
406static void
407mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd,
408 struct mmc_data *data)
409{
410 int cmdreg = 0, resptype = 0, cmdtype = 0;
411
412 dev_dbg(mmc_dev(host->mmc), "%s: CMD%d, argument 0x%08x\n",
413 mmc_hostname(host->mmc), cmd->opcode, cmd->arg);
414 host->cmd = cmd;
415
416 /*
417 * Clear status bits and enable interrupts
418 */
419 OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
420 OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK);
Anand Gadiyarccdfe3a2009-09-22 16:44:21 -0700421
422 if (host->use_dma)
423 OMAP_HSMMC_WRITE(host->base, IE,
424 INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE));
425 else
426 OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100427
Adrian Hunter4a694dc2009-01-12 16:13:08 +0200428 host->response_busy = 0;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100429 if (cmd->flags & MMC_RSP_PRESENT) {
430 if (cmd->flags & MMC_RSP_136)
431 resptype = 1;
Adrian Hunter4a694dc2009-01-12 16:13:08 +0200432 else if (cmd->flags & MMC_RSP_BUSY) {
433 resptype = 3;
434 host->response_busy = 1;
435 } else
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100436 resptype = 2;
437 }
438
439 /*
440 * Unlike OMAP1 controller, the cmdtype does not seem to be based on
441 * ac, bc, adtc, bcr. Only commands ending an open ended transfer need
442 * a val of 0x3, rest 0x0.
443 */
444 if (cmd == host->mrq->stop)
445 cmdtype = 0x3;
446
447 cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22);
448
449 if (data) {
450 cmdreg |= DP_SELECT | MSBS | BCE;
451 if (data->flags & MMC_DATA_READ)
452 cmdreg |= DDIR;
453 else
454 cmdreg &= ~(DDIR);
455 }
456
457 if (host->use_dma)
458 cmdreg |= DMA_EN;
459
460 OMAP_HSMMC_WRITE(host->base, ARG, cmd->arg);
461 OMAP_HSMMC_WRITE(host->base, CMD, cmdreg);
462}
463
Juha Yrjola0ccd76d2008-11-14 15:22:00 +0200464static int
465mmc_omap_get_dma_dir(struct mmc_omap_host *host, struct mmc_data *data)
466{
467 if (data->flags & MMC_DATA_WRITE)
468 return DMA_TO_DEVICE;
469 else
470 return DMA_FROM_DEVICE;
471}
472
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100473/*
474 * Notify the transfer complete to MMC core
475 */
476static void
477mmc_omap_xfer_done(struct mmc_omap_host *host, struct mmc_data *data)
478{
Adrian Hunter4a694dc2009-01-12 16:13:08 +0200479 if (!data) {
480 struct mmc_request *mrq = host->mrq;
481
482 host->mrq = NULL;
Adrian Hunter4a694dc2009-01-12 16:13:08 +0200483 mmc_request_done(host->mmc, mrq);
484 return;
485 }
486
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100487 host->data = NULL;
488
489 if (host->use_dma && host->dma_ch != -1)
490 dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len,
Juha Yrjola0ccd76d2008-11-14 15:22:00 +0200491 mmc_omap_get_dma_dir(host, data));
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100492
493 if (!data->error)
494 data->bytes_xfered += data->blocks * (data->blksz);
495 else
496 data->bytes_xfered = 0;
497
498 if (!data->stop) {
499 host->mrq = NULL;
500 mmc_request_done(host->mmc, data->mrq);
501 return;
502 }
503 mmc_omap_start_command(host, data->stop, NULL);
504}
505
506/*
507 * Notify the core about command completion
508 */
509static void
510mmc_omap_cmd_done(struct mmc_omap_host *host, struct mmc_command *cmd)
511{
512 host->cmd = NULL;
513
514 if (cmd->flags & MMC_RSP_PRESENT) {
515 if (cmd->flags & MMC_RSP_136) {
516 /* response type 2 */
517 cmd->resp[3] = OMAP_HSMMC_READ(host->base, RSP10);
518 cmd->resp[2] = OMAP_HSMMC_READ(host->base, RSP32);
519 cmd->resp[1] = OMAP_HSMMC_READ(host->base, RSP54);
520 cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP76);
521 } else {
522 /* response types 1, 1b, 3, 4, 5, 6 */
523 cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP10);
524 }
525 }
Adrian Hunter4a694dc2009-01-12 16:13:08 +0200526 if ((host->data == NULL && !host->response_busy) || cmd->error) {
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100527 host->mrq = NULL;
528 mmc_request_done(host->mmc, cmd->mrq);
529 }
530}
531
532/*
533 * DMA clean up for command errors
534 */
Jarkko Lavinen82788ff2008-12-05 12:31:46 +0200535static void mmc_dma_cleanup(struct mmc_omap_host *host, int errno)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100536{
Jarkko Lavinen82788ff2008-12-05 12:31:46 +0200537 host->data->error = errno;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100538
539 if (host->use_dma && host->dma_ch != -1) {
540 dma_unmap_sg(mmc_dev(host->mmc), host->data->sg, host->dma_len,
Juha Yrjola0ccd76d2008-11-14 15:22:00 +0200541 mmc_omap_get_dma_dir(host, host->data));
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100542 omap_free_dma(host->dma_ch);
543 host->dma_ch = -1;
544 up(&host->sem);
545 }
546 host->data = NULL;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100547}
548
549/*
550 * Readable error output
551 */
552#ifdef CONFIG_MMC_DEBUG
553static void mmc_omap_report_irq(struct mmc_omap_host *host, u32 status)
554{
555 /* --- means reserved bit without definition at documentation */
556 static const char *mmc_omap_status_bits[] = {
557 "CC", "TC", "BGE", "---", "BWR", "BRR", "---", "---", "CIRQ",
558 "OBI", "---", "---", "---", "---", "---", "ERRI", "CTO", "CCRC",
559 "CEB", "CIE", "DTO", "DCRC", "DEB", "---", "ACE", "---",
560 "---", "---", "---", "CERR", "CERR", "BADA", "---", "---", "---"
561 };
562 char res[256];
563 char *buf = res;
564 int len, i;
565
566 len = sprintf(buf, "MMC IRQ 0x%x :", status);
567 buf += len;
568
569 for (i = 0; i < ARRAY_SIZE(mmc_omap_status_bits); i++)
570 if (status & (1 << i)) {
571 len = sprintf(buf, " %s", mmc_omap_status_bits[i]);
572 buf += len;
573 }
574
575 dev_dbg(mmc_dev(host->mmc), "%s\n", res);
576}
577#endif /* CONFIG_MMC_DEBUG */
578
Jean Pihet3ebf74b2009-02-06 16:42:51 +0100579/*
580 * MMC controller internal state machines reset
581 *
582 * Used to reset command or data internal state machines, using respectively
583 * SRC or SRD bit of SYSCTL register
584 * Can be called from interrupt context
585 */
586static inline void mmc_omap_reset_controller_fsm(struct mmc_omap_host *host,
587 unsigned long bit)
588{
589 unsigned long i = 0;
590 unsigned long limit = (loops_per_jiffy *
591 msecs_to_jiffies(MMC_TIMEOUT_MS));
592
593 OMAP_HSMMC_WRITE(host->base, SYSCTL,
594 OMAP_HSMMC_READ(host->base, SYSCTL) | bit);
595
596 while ((OMAP_HSMMC_READ(host->base, SYSCTL) & bit) &&
597 (i++ < limit))
598 cpu_relax();
599
600 if (OMAP_HSMMC_READ(host->base, SYSCTL) & bit)
601 dev_err(mmc_dev(host->mmc),
602 "Timeout waiting on controller reset in %s\n",
603 __func__);
604}
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100605
606/*
607 * MMC controller IRQ handler
608 */
609static irqreturn_t mmc_omap_irq(int irq, void *dev_id)
610{
611 struct mmc_omap_host *host = dev_id;
612 struct mmc_data *data;
613 int end_cmd = 0, end_trans = 0, status;
614
Adrian Hunter4a694dc2009-01-12 16:13:08 +0200615 if (host->mrq == NULL) {
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100616 OMAP_HSMMC_WRITE(host->base, STAT,
617 OMAP_HSMMC_READ(host->base, STAT));
Kevin Hilman00adadc2009-04-06 15:01:19 +0300618 /* Flush posted write */
619 OMAP_HSMMC_READ(host->base, STAT);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100620 return IRQ_HANDLED;
621 }
622
623 data = host->data;
624 status = OMAP_HSMMC_READ(host->base, STAT);
625 dev_dbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status);
626
627 if (status & ERR) {
628#ifdef CONFIG_MMC_DEBUG
629 mmc_omap_report_irq(host, status);
630#endif
631 if ((status & CMD_TIMEOUT) ||
632 (status & CMD_CRC)) {
633 if (host->cmd) {
634 if (status & CMD_TIMEOUT) {
Jean Pihet3ebf74b2009-02-06 16:42:51 +0100635 mmc_omap_reset_controller_fsm(host, SRC);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100636 host->cmd->error = -ETIMEDOUT;
637 } else {
638 host->cmd->error = -EILSEQ;
639 }
640 end_cmd = 1;
641 }
Adrian Hunter4a694dc2009-01-12 16:13:08 +0200642 if (host->data || host->response_busy) {
643 if (host->data)
644 mmc_dma_cleanup(host, -ETIMEDOUT);
645 host->response_busy = 0;
Jean Pihet3ebf74b2009-02-06 16:42:51 +0100646 mmc_omap_reset_controller_fsm(host, SRD);
Jean Pihetc232f452009-02-11 13:11:39 -0800647 }
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100648 }
649 if ((status & DATA_TIMEOUT) ||
650 (status & DATA_CRC)) {
Adrian Hunter4a694dc2009-01-12 16:13:08 +0200651 if (host->data || host->response_busy) {
652 int err = (status & DATA_TIMEOUT) ?
653 -ETIMEDOUT : -EILSEQ;
654
655 if (host->data)
656 mmc_dma_cleanup(host, err);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100657 else
Adrian Hunter4a694dc2009-01-12 16:13:08 +0200658 host->mrq->cmd->error = err;
659 host->response_busy = 0;
Jean Pihet3ebf74b2009-02-06 16:42:51 +0100660 mmc_omap_reset_controller_fsm(host, SRD);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100661 end_trans = 1;
662 }
663 }
664 if (status & CARD_ERR) {
665 dev_dbg(mmc_dev(host->mmc),
666 "Ignoring card err CMD%d\n", host->cmd->opcode);
667 if (host->cmd)
668 end_cmd = 1;
669 if (host->data)
670 end_trans = 1;
671 }
672 }
673
674 OMAP_HSMMC_WRITE(host->base, STAT, status);
Kevin Hilman00adadc2009-04-06 15:01:19 +0300675 /* Flush posted write */
676 OMAP_HSMMC_READ(host->base, STAT);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100677
Jarkko Lavinena8fe29d2009-04-08 11:18:32 +0300678 if (end_cmd || ((status & CC) && host->cmd))
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100679 mmc_omap_cmd_done(host, host->cmd);
Jarkko Lavinen0a40e642009-09-22 16:44:54 -0700680 if ((end_trans || (status & TC)) && host->mrq)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100681 mmc_omap_xfer_done(host, data);
682
683 return IRQ_HANDLED;
684}
685
Adrian Huntere13bb302009-03-12 17:08:26 +0200686static void set_sd_bus_power(struct mmc_omap_host *host)
687{
688 unsigned long i;
689
690 OMAP_HSMMC_WRITE(host->base, HCTL,
691 OMAP_HSMMC_READ(host->base, HCTL) | SDBP);
692 for (i = 0; i < loops_per_jiffy; i++) {
693 if (OMAP_HSMMC_READ(host->base, HCTL) & SDBP)
694 break;
695 cpu_relax();
696 }
697}
698
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100699/*
David Brownelleb250822009-02-17 14:49:01 -0800700 * Switch MMC interface voltage ... only relevant for MMC1.
701 *
702 * MMC2 and MMC3 use fixed 1.8V levels, and maybe a transceiver.
703 * The MMC2 transceiver controls are used instead of DAT4..DAT7.
704 * Some chips, like eMMC ones, use internal transceivers.
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100705 */
706static int omap_mmc_switch_opcond(struct mmc_omap_host *host, int vdd)
707{
708 u32 reg_val = 0;
709 int ret;
710
711 /* Disable the clocks */
712 clk_disable(host->fclk);
713 clk_disable(host->iclk);
714 clk_disable(host->dbclk);
715
716 /* Turn the power off */
717 ret = mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0);
718 if (ret != 0)
719 goto err;
720
721 /* Turn the power ON with given VDD 1.8 or 3.0v */
722 ret = mmc_slot(host).set_power(host->dev, host->slot_id, 1, vdd);
723 if (ret != 0)
724 goto err;
725
726 clk_enable(host->fclk);
727 clk_enable(host->iclk);
728 clk_enable(host->dbclk);
729
730 OMAP_HSMMC_WRITE(host->base, HCTL,
731 OMAP_HSMMC_READ(host->base, HCTL) & SDVSCLR);
732 reg_val = OMAP_HSMMC_READ(host->base, HCTL);
David Brownelleb250822009-02-17 14:49:01 -0800733
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100734 /*
735 * If a MMC dual voltage card is detected, the set_ios fn calls
736 * this fn with VDD bit set for 1.8V. Upon card removal from the
737 * slot, omap_mmc_set_ios sets the VDD back to 3V on MMC_POWER_OFF.
738 *
David Brownelleb250822009-02-17 14:49:01 -0800739 * Cope with a bit of slop in the range ... per data sheets:
740 * - "1.8V" for vdds_mmc1/vdds_mmc1a can be up to 2.45V max,
741 * but recommended values are 1.71V to 1.89V
742 * - "3.0V" for vdds_mmc1/vdds_mmc1a can be up to 3.5V max,
743 * but recommended values are 2.7V to 3.3V
744 *
745 * Board setup code shouldn't permit anything very out-of-range.
746 * TWL4030-family VMMC1 and VSIM regulators are fine (avoiding the
747 * middle range) but VSIM can't power DAT4..DAT7 at more than 3V.
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100748 */
David Brownelleb250822009-02-17 14:49:01 -0800749 if ((1 << vdd) <= MMC_VDD_23_24)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100750 reg_val |= SDVS18;
David Brownelleb250822009-02-17 14:49:01 -0800751 else
752 reg_val |= SDVS30;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100753
754 OMAP_HSMMC_WRITE(host->base, HCTL, reg_val);
Adrian Huntere13bb302009-03-12 17:08:26 +0200755 set_sd_bus_power(host);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100756
757 return 0;
758err:
759 dev_dbg(mmc_dev(host->mmc), "Unable to switch operating voltage\n");
760 return ret;
761}
762
763/*
764 * Work Item to notify the core about card insertion/removal
765 */
766static void mmc_omap_detect(struct work_struct *work)
767{
768 struct mmc_omap_host *host = container_of(work, struct mmc_omap_host,
769 mmc_carddetect_work);
David Brownell249d0fa2009-02-04 14:42:03 -0800770 struct omap_mmc_slot_data *slot = &mmc_slot(host);
Adrian Huntera6b22402009-09-22 16:44:45 -0700771 int carddetect;
David Brownell249d0fa2009-02-04 14:42:03 -0800772
Adrian Huntera6b22402009-09-22 16:44:45 -0700773 if (host->suspended)
774 return;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100775
776 sysfs_notify(&host->mmc->class_dev.kobj, NULL, "cover_switch");
Adrian Huntera6b22402009-09-22 16:44:45 -0700777
778 if (mmc_slot(host).card_detect)
779 carddetect = slot->card_detect(slot->card_detect_irq);
780 else
781 carddetect = -ENOSYS;
782
783 if (carddetect) {
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100784 mmc_detect_change(host->mmc, (HZ * 200) / 1000);
785 } else {
Adrian Hunter5e2ea612009-09-22 16:44:39 -0700786 mmc_host_enable(host->mmc);
Jean Pihet3ebf74b2009-02-06 16:42:51 +0100787 mmc_omap_reset_controller_fsm(host, SRD);
Adrian Hunter5e2ea612009-09-22 16:44:39 -0700788 mmc_host_lazy_disable(host->mmc);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100789 mmc_detect_change(host->mmc, (HZ * 50) / 1000);
790 }
791}
792
793/*
794 * ISR for handling card insertion and removal
795 */
796static irqreturn_t omap_mmc_cd_handler(int irq, void *dev_id)
797{
798 struct mmc_omap_host *host = (struct mmc_omap_host *)dev_id;
799
Adrian Huntera6b22402009-09-22 16:44:45 -0700800 if (host->suspended)
801 return IRQ_HANDLED;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100802 schedule_work(&host->mmc_carddetect_work);
803
804 return IRQ_HANDLED;
805}
806
Juha Yrjola0ccd76d2008-11-14 15:22:00 +0200807static int mmc_omap_get_dma_sync_dev(struct mmc_omap_host *host,
808 struct mmc_data *data)
809{
810 int sync_dev;
811
Grazvydas Ignotasf3e2f1d2009-01-03 10:36:13 +0000812 if (data->flags & MMC_DATA_WRITE)
813 sync_dev = host->dma_line_tx;
814 else
815 sync_dev = host->dma_line_rx;
Juha Yrjola0ccd76d2008-11-14 15:22:00 +0200816 return sync_dev;
817}
818
819static void mmc_omap_config_dma_params(struct mmc_omap_host *host,
820 struct mmc_data *data,
821 struct scatterlist *sgl)
822{
823 int blksz, nblk, dma_ch;
824
825 dma_ch = host->dma_ch;
826 if (data->flags & MMC_DATA_WRITE) {
827 omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT,
828 (host->mapbase + OMAP_HSMMC_DATA), 0, 0);
829 omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC,
830 sg_dma_address(sgl), 0, 0);
831 } else {
832 omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT,
833 (host->mapbase + OMAP_HSMMC_DATA), 0, 0);
834 omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC,
835 sg_dma_address(sgl), 0, 0);
836 }
837
838 blksz = host->data->blksz;
839 nblk = sg_dma_len(sgl) / blksz;
840
841 omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S32,
842 blksz / 4, nblk, OMAP_DMA_SYNC_FRAME,
843 mmc_omap_get_dma_sync_dev(host, data),
844 !(data->flags & MMC_DATA_WRITE));
845
846 omap_start_dma(dma_ch);
847}
848
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100849/*
850 * DMA call back function
851 */
852static void mmc_omap_dma_cb(int lch, u16 ch_status, void *data)
853{
854 struct mmc_omap_host *host = data;
855
856 if (ch_status & OMAP2_DMA_MISALIGNED_ERR_IRQ)
857 dev_dbg(mmc_dev(host->mmc), "MISALIGNED_ADRS_ERR\n");
858
859 if (host->dma_ch < 0)
860 return;
861
Juha Yrjola0ccd76d2008-11-14 15:22:00 +0200862 host->dma_sg_idx++;
863 if (host->dma_sg_idx < host->dma_len) {
864 /* Fire up the next transfer. */
865 mmc_omap_config_dma_params(host, host->data,
866 host->data->sg + host->dma_sg_idx);
867 return;
868 }
869
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100870 omap_free_dma(host->dma_ch);
871 host->dma_ch = -1;
872 /*
873 * DMA Callback: run in interrupt context.
Anand Gadiyar85b84322009-04-15 17:44:58 +0530874 * mutex_unlock will throw a kernel warning if used.
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100875 */
876 up(&host->sem);
877}
878
879/*
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100880 * Routine to configure and start DMA for the MMC card
881 */
882static int
883mmc_omap_start_dma_transfer(struct mmc_omap_host *host, struct mmc_request *req)
884{
Juha Yrjola0ccd76d2008-11-14 15:22:00 +0200885 int dma_ch = 0, ret = 0, err = 1, i;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100886 struct mmc_data *data = req->data;
887
Juha Yrjola0ccd76d2008-11-14 15:22:00 +0200888 /* Sanity check: all the SG entries must be aligned by block size. */
Jarkko Lavinena3f406f2009-09-22 16:44:46 -0700889 for (i = 0; i < data->sg_len; i++) {
Juha Yrjola0ccd76d2008-11-14 15:22:00 +0200890 struct scatterlist *sgl;
891
892 sgl = data->sg + i;
893 if (sgl->length % data->blksz)
894 return -EINVAL;
895 }
896 if ((data->blksz % 4) != 0)
897 /* REVISIT: The MMC buffer increments only when MSB is written.
898 * Return error for blksz which is non multiple of four.
899 */
900 return -EINVAL;
901
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100902 /*
903 * If for some reason the DMA transfer is still active,
904 * we wait for timeout period and free the dma
905 */
906 if (host->dma_ch != -1) {
907 set_current_state(TASK_UNINTERRUPTIBLE);
908 schedule_timeout(100);
909 if (down_trylock(&host->sem)) {
910 omap_free_dma(host->dma_ch);
911 host->dma_ch = -1;
912 up(&host->sem);
913 return err;
914 }
915 } else {
916 if (down_trylock(&host->sem))
917 return err;
918 }
919
Juha Yrjola0ccd76d2008-11-14 15:22:00 +0200920 ret = omap_request_dma(mmc_omap_get_dma_sync_dev(host, data), "MMC/SD",
921 mmc_omap_dma_cb,host, &dma_ch);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100922 if (ret != 0) {
Juha Yrjola0ccd76d2008-11-14 15:22:00 +0200923 dev_err(mmc_dev(host->mmc),
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100924 "%s: omap_request_dma() failed with %d\n",
925 mmc_hostname(host->mmc), ret);
926 return ret;
927 }
928
929 host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg,
Juha Yrjola0ccd76d2008-11-14 15:22:00 +0200930 data->sg_len, mmc_omap_get_dma_dir(host, data));
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100931 host->dma_ch = dma_ch;
Juha Yrjola0ccd76d2008-11-14 15:22:00 +0200932 host->dma_sg_idx = 0;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100933
Juha Yrjola0ccd76d2008-11-14 15:22:00 +0200934 mmc_omap_config_dma_params(host, data, data->sg);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100935
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100936 return 0;
937}
938
939static void set_data_timeout(struct mmc_omap_host *host,
940 struct mmc_request *req)
941{
942 unsigned int timeout, cycle_ns;
943 uint32_t reg, clkd, dto = 0;
944
945 reg = OMAP_HSMMC_READ(host->base, SYSCTL);
946 clkd = (reg & CLKD_MASK) >> CLKD_SHIFT;
947 if (clkd == 0)
948 clkd = 1;
949
950 cycle_ns = 1000000000 / (clk_get_rate(host->fclk) / clkd);
951 timeout = req->data->timeout_ns / cycle_ns;
952 timeout += req->data->timeout_clks;
953 if (timeout) {
954 while ((timeout & 0x80000000) == 0) {
955 dto += 1;
956 timeout <<= 1;
957 }
958 dto = 31 - dto;
959 timeout <<= 1;
960 if (timeout && dto)
961 dto += 1;
962 if (dto >= 13)
963 dto -= 13;
964 else
965 dto = 0;
966 if (dto > 14)
967 dto = 14;
968 }
969
970 reg &= ~DTO_MASK;
971 reg |= dto << DTO_SHIFT;
972 OMAP_HSMMC_WRITE(host->base, SYSCTL, reg);
973}
974
975/*
976 * Configure block length for MMC/SD cards and initiate the transfer.
977 */
978static int
979mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req)
980{
981 int ret;
982 host->data = req->data;
983
984 if (req->data == NULL) {
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100985 OMAP_HSMMC_WRITE(host->base, BLK, 0);
986 return 0;
987 }
988
989 OMAP_HSMMC_WRITE(host->base, BLK, (req->data->blksz)
990 | (req->data->blocks << 16));
991 set_data_timeout(host, req);
992
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +0100993 if (host->use_dma) {
994 ret = mmc_omap_start_dma_transfer(host, req);
995 if (ret != 0) {
996 dev_dbg(mmc_dev(host->mmc), "MMC start dma failure\n");
997 return ret;
998 }
999 }
1000 return 0;
1001}
1002
1003/*
1004 * Request function. for read/write operation
1005 */
1006static void omap_mmc_request(struct mmc_host *mmc, struct mmc_request *req)
1007{
1008 struct mmc_omap_host *host = mmc_priv(mmc);
Jarkko Lavinena3f406f2009-09-22 16:44:46 -07001009 int err;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001010
1011 WARN_ON(host->mrq != NULL);
1012 host->mrq = req;
Jarkko Lavinena3f406f2009-09-22 16:44:46 -07001013 err = mmc_omap_prepare_data(host, req);
1014 if (err) {
1015 req->cmd->error = err;
1016 if (req->data)
1017 req->data->error = err;
1018 host->mrq = NULL;
1019 mmc_request_done(mmc, req);
1020 return;
1021 }
1022
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001023 mmc_omap_start_command(host, req->cmd, req->data);
1024}
1025
1026
1027/* Routine to configure clock values. Exposed API to core */
1028static void omap_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1029{
1030 struct mmc_omap_host *host = mmc_priv(mmc);
1031 u16 dsor = 0;
1032 unsigned long regval;
1033 unsigned long timeout;
Jarkko Lavinen73153012008-11-21 16:49:54 +02001034 u32 con;
Adrian Huntera3621462009-09-22 16:44:42 -07001035 int do_send_init_stream = 0;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001036
Adrian Hunter5e2ea612009-09-22 16:44:39 -07001037 mmc_host_enable(host->mmc);
1038
Adrian Huntera3621462009-09-22 16:44:42 -07001039 if (ios->power_mode != host->power_mode) {
1040 switch (ios->power_mode) {
1041 case MMC_POWER_OFF:
1042 mmc_slot(host).set_power(host->dev, host->slot_id,
1043 0, 0);
Adrian Hunter623821f2009-09-22 16:44:51 -07001044 host->vdd = 0;
Adrian Huntera3621462009-09-22 16:44:42 -07001045 break;
1046 case MMC_POWER_UP:
1047 mmc_slot(host).set_power(host->dev, host->slot_id,
1048 1, ios->vdd);
Adrian Hunter623821f2009-09-22 16:44:51 -07001049 host->vdd = ios->vdd;
Adrian Huntera3621462009-09-22 16:44:42 -07001050 break;
1051 case MMC_POWER_ON:
1052 do_send_init_stream = 1;
1053 break;
1054 }
1055 host->power_mode = ios->power_mode;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001056 }
1057
Denis Karpovdd498ef2009-09-22 16:44:49 -07001058 /* FIXME: set registers based only on changes to ios */
1059
Jarkko Lavinen73153012008-11-21 16:49:54 +02001060 con = OMAP_HSMMC_READ(host->base, CON);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001061 switch (mmc->ios.bus_width) {
Jarkko Lavinen73153012008-11-21 16:49:54 +02001062 case MMC_BUS_WIDTH_8:
1063 OMAP_HSMMC_WRITE(host->base, CON, con | DW8);
1064 break;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001065 case MMC_BUS_WIDTH_4:
Jarkko Lavinen73153012008-11-21 16:49:54 +02001066 OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001067 OMAP_HSMMC_WRITE(host->base, HCTL,
1068 OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT);
1069 break;
1070 case MMC_BUS_WIDTH_1:
Jarkko Lavinen73153012008-11-21 16:49:54 +02001071 OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001072 OMAP_HSMMC_WRITE(host->base, HCTL,
1073 OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT);
1074 break;
1075 }
1076
1077 if (host->id == OMAP_MMC1_DEVID) {
David Brownelleb250822009-02-17 14:49:01 -08001078 /* Only MMC1 can interface at 3V without some flavor
1079 * of external transceiver; but they all handle 1.8V.
1080 */
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001081 if ((OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET) &&
1082 (ios->vdd == DUAL_VOLT_OCR_BIT)) {
1083 /*
1084 * The mmc_select_voltage fn of the core does
1085 * not seem to set the power_mode to
1086 * MMC_POWER_UP upon recalculating the voltage.
1087 * vdd 1.8v.
1088 */
1089 if (omap_mmc_switch_opcond(host, ios->vdd) != 0)
1090 dev_dbg(mmc_dev(host->mmc),
1091 "Switch operation failed\n");
1092 }
1093 }
1094
1095 if (ios->clock) {
1096 dsor = OMAP_MMC_MASTER_CLOCK / ios->clock;
1097 if (dsor < 1)
1098 dsor = 1;
1099
1100 if (OMAP_MMC_MASTER_CLOCK / dsor > ios->clock)
1101 dsor++;
1102
1103 if (dsor > 250)
1104 dsor = 250;
1105 }
1106 omap_mmc_stop_clock(host);
1107 regval = OMAP_HSMMC_READ(host->base, SYSCTL);
1108 regval = regval & ~(CLKD_MASK);
1109 regval = regval | (dsor << 6) | (DTO << 16);
1110 OMAP_HSMMC_WRITE(host->base, SYSCTL, regval);
1111 OMAP_HSMMC_WRITE(host->base, SYSCTL,
1112 OMAP_HSMMC_READ(host->base, SYSCTL) | ICE);
1113
1114 /* Wait till the ICS bit is set */
1115 timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS);
Denis Karpov11dd62a2009-09-22 16:44:43 -07001116 while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != ICS
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001117 && time_before(jiffies, timeout))
1118 msleep(1);
1119
1120 OMAP_HSMMC_WRITE(host->base, SYSCTL,
1121 OMAP_HSMMC_READ(host->base, SYSCTL) | CEN);
1122
Adrian Huntera3621462009-09-22 16:44:42 -07001123 if (do_send_init_stream)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001124 send_init_stream(host);
1125
Denis Karpovabb28e72009-09-22 16:44:44 -07001126 con = OMAP_HSMMC_READ(host->base, CON);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001127 if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN)
Denis Karpovabb28e72009-09-22 16:44:44 -07001128 OMAP_HSMMC_WRITE(host->base, CON, con | OD);
1129 else
1130 OMAP_HSMMC_WRITE(host->base, CON, con & ~OD);
Adrian Hunter5e2ea612009-09-22 16:44:39 -07001131
Denis Karpovdd498ef2009-09-22 16:44:49 -07001132 if (host->power_mode == MMC_POWER_OFF)
1133 mmc_host_disable(host->mmc);
1134 else
1135 mmc_host_lazy_disable(host->mmc);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001136}
1137
1138static int omap_hsmmc_get_cd(struct mmc_host *mmc)
1139{
1140 struct mmc_omap_host *host = mmc_priv(mmc);
1141 struct omap_mmc_platform_data *pdata = host->pdata;
1142
1143 if (!pdata->slots[0].card_detect)
1144 return -ENOSYS;
1145 return pdata->slots[0].card_detect(pdata->slots[0].card_detect_irq);
1146}
1147
1148static int omap_hsmmc_get_ro(struct mmc_host *mmc)
1149{
1150 struct mmc_omap_host *host = mmc_priv(mmc);
1151 struct omap_mmc_platform_data *pdata = host->pdata;
1152
1153 if (!pdata->slots[0].get_ro)
1154 return -ENOSYS;
1155 return pdata->slots[0].get_ro(host->dev, 0);
1156}
1157
Kim Kyuwon1b331e62009-02-20 13:10:08 +01001158static void omap_hsmmc_init(struct mmc_omap_host *host)
1159{
1160 u32 hctl, capa, value;
1161
1162 /* Only MMC1 supports 3.0V */
1163 if (host->id == OMAP_MMC1_DEVID) {
1164 hctl = SDVS30;
1165 capa = VS30 | VS18;
1166 } else {
1167 hctl = SDVS18;
1168 capa = VS18;
1169 }
1170
1171 value = OMAP_HSMMC_READ(host->base, HCTL) & ~SDVS_MASK;
1172 OMAP_HSMMC_WRITE(host->base, HCTL, value | hctl);
1173
1174 value = OMAP_HSMMC_READ(host->base, CAPA);
1175 OMAP_HSMMC_WRITE(host->base, CAPA, value | capa);
1176
1177 /* Set the controller to AUTO IDLE mode */
1178 value = OMAP_HSMMC_READ(host->base, SYSCONFIG);
1179 OMAP_HSMMC_WRITE(host->base, SYSCONFIG, value | AUTOIDLE);
1180
1181 /* Set SD bus power bit */
Adrian Huntere13bb302009-03-12 17:08:26 +02001182 set_sd_bus_power(host);
Kim Kyuwon1b331e62009-02-20 13:10:08 +01001183}
1184
Denis Karpovdd498ef2009-09-22 16:44:49 -07001185/*
1186 * Dynamic power saving handling, FSM:
Jarkko Lavinen13189e72009-09-22 16:44:53 -07001187 * ENABLED -> DISABLED -> CARDSLEEP / REGSLEEP -> OFF
1188 * ^___________| | |
1189 * |______________________|______________________|
Denis Karpovdd498ef2009-09-22 16:44:49 -07001190 *
1191 * ENABLED: mmc host is fully functional
1192 * DISABLED: fclk is off
Jarkko Lavinen13189e72009-09-22 16:44:53 -07001193 * CARDSLEEP: fclk is off, card is asleep, voltage regulator is asleep
1194 * REGSLEEP: fclk is off, voltage regulator is asleep
1195 * OFF: fclk is off, voltage regulator is off
Denis Karpovdd498ef2009-09-22 16:44:49 -07001196 *
1197 * Transition handlers return the timeout for the next state transition
1198 * or negative error.
1199 */
1200
Jarkko Lavinen13189e72009-09-22 16:44:53 -07001201enum {ENABLED = 0, DISABLED, CARDSLEEP, REGSLEEP, OFF};
Denis Karpovdd498ef2009-09-22 16:44:49 -07001202
1203/* Handler for [ENABLED -> DISABLED] transition */
1204static int omap_mmc_enabled_to_disabled(struct mmc_omap_host *host)
1205{
1206 omap_mmc_save_ctx(host);
1207 clk_disable(host->fclk);
1208 host->dpm_state = DISABLED;
1209
1210 dev_dbg(mmc_dev(host->mmc), "ENABLED -> DISABLED\n");
1211
1212 if (host->power_mode == MMC_POWER_OFF)
1213 return 0;
1214
Jarkko Lavinen13189e72009-09-22 16:44:53 -07001215 return msecs_to_jiffies(OMAP_MMC_SLEEP_TIMEOUT);
Denis Karpovdd498ef2009-09-22 16:44:49 -07001216}
1217
Jarkko Lavinen13189e72009-09-22 16:44:53 -07001218/* Handler for [DISABLED -> REGSLEEP / CARDSLEEP] transition */
1219static int omap_mmc_disabled_to_sleep(struct mmc_omap_host *host)
Denis Karpovdd498ef2009-09-22 16:44:49 -07001220{
Jarkko Lavinen13189e72009-09-22 16:44:53 -07001221 int err, new_state;
Denis Karpovdd498ef2009-09-22 16:44:49 -07001222
1223 if (!mmc_try_claim_host(host->mmc))
1224 return 0;
1225
1226 clk_enable(host->fclk);
Denis Karpovdd498ef2009-09-22 16:44:49 -07001227 omap_mmc_restore_ctx(host);
Jarkko Lavinen13189e72009-09-22 16:44:53 -07001228 if (mmc_card_can_sleep(host->mmc)) {
1229 err = mmc_card_sleep(host->mmc);
1230 if (err < 0) {
1231 clk_disable(host->fclk);
1232 mmc_release_host(host->mmc);
1233 return err;
1234 }
1235 new_state = CARDSLEEP;
1236 } else
1237 new_state = REGSLEEP;
1238 if (mmc_slot(host).set_sleep)
1239 mmc_slot(host).set_sleep(host->dev, host->slot_id, 1, 0,
1240 new_state == CARDSLEEP);
1241 /* FIXME: turn off bus power and perhaps interrupts too */
1242 clk_disable(host->fclk);
1243 host->dpm_state = new_state;
1244
1245 mmc_release_host(host->mmc);
1246
1247 dev_dbg(mmc_dev(host->mmc), "DISABLED -> %s\n",
1248 host->dpm_state == CARDSLEEP ? "CARDSLEEP" : "REGSLEEP");
Denis Karpovdd498ef2009-09-22 16:44:49 -07001249
1250 if ((host->mmc->caps & MMC_CAP_NONREMOVABLE) ||
1251 mmc_slot(host).card_detect ||
1252 (mmc_slot(host).get_cover_state &&
Jarkko Lavinen13189e72009-09-22 16:44:53 -07001253 mmc_slot(host).get_cover_state(host->dev, host->slot_id)))
1254 return msecs_to_jiffies(OMAP_MMC_OFF_TIMEOUT);
1255
1256 return 0;
1257}
1258
1259/* Handler for [REGSLEEP / CARDSLEEP -> OFF] transition */
1260static int omap_mmc_sleep_to_off(struct mmc_omap_host *host)
1261{
1262 if (!mmc_try_claim_host(host->mmc))
1263 return 0;
1264
1265 if (!((host->mmc->caps & MMC_CAP_NONREMOVABLE) ||
1266 mmc_slot(host).card_detect ||
1267 (mmc_slot(host).get_cover_state &&
1268 mmc_slot(host).get_cover_state(host->dev, host->slot_id)))) {
1269 mmc_release_host(host->mmc);
1270 return 0;
Adrian Hunter623821f2009-09-22 16:44:51 -07001271 }
Denis Karpovdd498ef2009-09-22 16:44:49 -07001272
Jarkko Lavinen13189e72009-09-22 16:44:53 -07001273 mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0);
1274 host->vdd = 0;
1275 host->power_mode = MMC_POWER_OFF;
Denis Karpovdd498ef2009-09-22 16:44:49 -07001276
Jarkko Lavinen13189e72009-09-22 16:44:53 -07001277 dev_dbg(mmc_dev(host->mmc), "%s -> OFF\n",
1278 host->dpm_state == CARDSLEEP ? "CARDSLEEP" : "REGSLEEP");
Denis Karpovdd498ef2009-09-22 16:44:49 -07001279
Jarkko Lavinen13189e72009-09-22 16:44:53 -07001280 host->dpm_state = OFF;
Denis Karpovdd498ef2009-09-22 16:44:49 -07001281
1282 mmc_release_host(host->mmc);
1283
1284 return 0;
1285}
1286
1287/* Handler for [DISABLED -> ENABLED] transition */
1288static int omap_mmc_disabled_to_enabled(struct mmc_omap_host *host)
1289{
1290 int err;
1291
1292 err = clk_enable(host->fclk);
1293 if (err < 0)
1294 return err;
1295
1296 omap_mmc_restore_ctx(host);
1297
1298 host->dpm_state = ENABLED;
1299
1300 dev_dbg(mmc_dev(host->mmc), "DISABLED -> ENABLED\n");
1301
1302 return 0;
1303}
1304
Jarkko Lavinen13189e72009-09-22 16:44:53 -07001305/* Handler for [SLEEP -> ENABLED] transition */
1306static int omap_mmc_sleep_to_enabled(struct mmc_omap_host *host)
1307{
1308 if (!mmc_try_claim_host(host->mmc))
1309 return 0;
1310
1311 clk_enable(host->fclk);
1312 omap_mmc_restore_ctx(host);
1313 if (mmc_slot(host).set_sleep)
1314 mmc_slot(host).set_sleep(host->dev, host->slot_id, 0,
1315 host->vdd, host->dpm_state == CARDSLEEP);
1316 if (mmc_card_can_sleep(host->mmc))
1317 mmc_card_awake(host->mmc);
1318
1319 dev_dbg(mmc_dev(host->mmc), "%s -> ENABLED\n",
1320 host->dpm_state == CARDSLEEP ? "CARDSLEEP" : "REGSLEEP");
1321
1322 host->dpm_state = ENABLED;
1323
1324 mmc_release_host(host->mmc);
1325
1326 return 0;
1327}
1328
Denis Karpovdd498ef2009-09-22 16:44:49 -07001329/* Handler for [OFF -> ENABLED] transition */
1330static int omap_mmc_off_to_enabled(struct mmc_omap_host *host)
1331{
1332 clk_enable(host->fclk);
Denis Karpovdd498ef2009-09-22 16:44:49 -07001333
1334 omap_mmc_restore_ctx(host);
1335 omap_hsmmc_init(host);
1336 mmc_power_restore_host(host->mmc);
1337
1338 host->dpm_state = ENABLED;
1339
1340 dev_dbg(mmc_dev(host->mmc), "OFF -> ENABLED\n");
1341
1342 return 0;
1343}
1344
1345/*
1346 * Bring MMC host to ENABLED from any other PM state.
1347 */
1348static int omap_mmc_enable(struct mmc_host *mmc)
1349{
1350 struct mmc_omap_host *host = mmc_priv(mmc);
1351
1352 switch (host->dpm_state) {
1353 case DISABLED:
1354 return omap_mmc_disabled_to_enabled(host);
Jarkko Lavinen13189e72009-09-22 16:44:53 -07001355 case CARDSLEEP:
Adrian Hunter623821f2009-09-22 16:44:51 -07001356 case REGSLEEP:
Jarkko Lavinen13189e72009-09-22 16:44:53 -07001357 return omap_mmc_sleep_to_enabled(host);
Denis Karpovdd498ef2009-09-22 16:44:49 -07001358 case OFF:
1359 return omap_mmc_off_to_enabled(host);
1360 default:
1361 dev_dbg(mmc_dev(host->mmc), "UNKNOWN state\n");
1362 return -EINVAL;
1363 }
1364}
1365
1366/*
1367 * Bring MMC host in PM state (one level deeper).
1368 */
1369static int omap_mmc_disable(struct mmc_host *mmc, int lazy)
1370{
1371 struct mmc_omap_host *host = mmc_priv(mmc);
1372
1373 switch (host->dpm_state) {
1374 case ENABLED: {
1375 int delay;
1376
1377 delay = omap_mmc_enabled_to_disabled(host);
1378 if (lazy || delay < 0)
1379 return delay;
1380 return 0;
1381 }
1382 case DISABLED:
Jarkko Lavinen13189e72009-09-22 16:44:53 -07001383 return omap_mmc_disabled_to_sleep(host);
1384 case CARDSLEEP:
1385 case REGSLEEP:
1386 return omap_mmc_sleep_to_off(host);
Denis Karpovdd498ef2009-09-22 16:44:49 -07001387 default:
1388 dev_dbg(mmc_dev(host->mmc), "UNKNOWN state\n");
1389 return -EINVAL;
1390 }
1391}
1392
1393static int omap_mmc_enable_fclk(struct mmc_host *mmc)
1394{
1395 struct mmc_omap_host *host = mmc_priv(mmc);
1396 int err;
1397
1398 err = clk_enable(host->fclk);
1399 if (err)
1400 return err;
1401 dev_dbg(mmc_dev(host->mmc), "mmc_fclk: enabled\n");
1402 omap_mmc_restore_ctx(host);
1403 return 0;
1404}
1405
1406static int omap_mmc_disable_fclk(struct mmc_host *mmc, int lazy)
1407{
1408 struct mmc_omap_host *host = mmc_priv(mmc);
1409
1410 omap_mmc_save_ctx(host);
1411 clk_disable(host->fclk);
1412 dev_dbg(mmc_dev(host->mmc), "mmc_fclk: disabled\n");
1413 return 0;
1414}
1415
1416static const struct mmc_host_ops mmc_omap_ops = {
1417 .enable = omap_mmc_enable_fclk,
1418 .disable = omap_mmc_disable_fclk,
1419 .request = omap_mmc_request,
1420 .set_ios = omap_mmc_set_ios,
1421 .get_cd = omap_hsmmc_get_cd,
1422 .get_ro = omap_hsmmc_get_ro,
1423 /* NYET -- enable_sdio_irq */
1424};
1425
1426static const struct mmc_host_ops mmc_omap_ps_ops = {
Adrian Hunter5e2ea612009-09-22 16:44:39 -07001427 .enable = omap_mmc_enable,
1428 .disable = omap_mmc_disable,
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001429 .request = omap_mmc_request,
1430 .set_ios = omap_mmc_set_ios,
1431 .get_cd = omap_hsmmc_get_cd,
1432 .get_ro = omap_hsmmc_get_ro,
1433 /* NYET -- enable_sdio_irq */
1434};
1435
Denis Karpovd900f712009-09-22 16:44:38 -07001436#ifdef CONFIG_DEBUG_FS
1437
1438static int mmc_regs_show(struct seq_file *s, void *data)
1439{
1440 struct mmc_host *mmc = s->private;
1441 struct mmc_omap_host *host = mmc_priv(mmc);
Denis Karpov11dd62a2009-09-22 16:44:43 -07001442 struct omap_mmc_platform_data *pdata = host->pdata;
1443 int context_loss = 0;
1444
1445 if (pdata->get_context_loss_count)
1446 context_loss = pdata->get_context_loss_count(host->dev);
Denis Karpovd900f712009-09-22 16:44:38 -07001447
Adrian Hunter5e2ea612009-09-22 16:44:39 -07001448 seq_printf(s, "mmc%d:\n"
1449 " enabled:\t%d\n"
Denis Karpovdd498ef2009-09-22 16:44:49 -07001450 " dpm_state:\t%d\n"
Adrian Hunter5e2ea612009-09-22 16:44:39 -07001451 " nesting_cnt:\t%d\n"
Denis Karpov11dd62a2009-09-22 16:44:43 -07001452 " ctx_loss:\t%d:%d\n"
Adrian Hunter5e2ea612009-09-22 16:44:39 -07001453 "\nregs:\n",
Denis Karpovdd498ef2009-09-22 16:44:49 -07001454 mmc->index, mmc->enabled ? 1 : 0,
1455 host->dpm_state, mmc->nesting_cnt,
Denis Karpov11dd62a2009-09-22 16:44:43 -07001456 host->context_loss, context_loss);
Adrian Hunter5e2ea612009-09-22 16:44:39 -07001457
Jarkko Lavinen13189e72009-09-22 16:44:53 -07001458 if (host->suspended || host->dpm_state == OFF) {
Denis Karpovdd498ef2009-09-22 16:44:49 -07001459 seq_printf(s, "host suspended, can't read registers\n");
1460 return 0;
1461 }
1462
Adrian Hunter5e2ea612009-09-22 16:44:39 -07001463 if (clk_enable(host->fclk) != 0) {
1464 seq_printf(s, "can't read the regs\n");
Denis Karpovdd498ef2009-09-22 16:44:49 -07001465 return 0;
Adrian Hunter5e2ea612009-09-22 16:44:39 -07001466 }
Denis Karpovd900f712009-09-22 16:44:38 -07001467
1468 seq_printf(s, "SYSCONFIG:\t0x%08x\n",
1469 OMAP_HSMMC_READ(host->base, SYSCONFIG));
1470 seq_printf(s, "CON:\t\t0x%08x\n",
1471 OMAP_HSMMC_READ(host->base, CON));
1472 seq_printf(s, "HCTL:\t\t0x%08x\n",
1473 OMAP_HSMMC_READ(host->base, HCTL));
1474 seq_printf(s, "SYSCTL:\t\t0x%08x\n",
1475 OMAP_HSMMC_READ(host->base, SYSCTL));
1476 seq_printf(s, "IE:\t\t0x%08x\n",
1477 OMAP_HSMMC_READ(host->base, IE));
1478 seq_printf(s, "ISE:\t\t0x%08x\n",
1479 OMAP_HSMMC_READ(host->base, ISE));
1480 seq_printf(s, "CAPA:\t\t0x%08x\n",
1481 OMAP_HSMMC_READ(host->base, CAPA));
Adrian Hunter5e2ea612009-09-22 16:44:39 -07001482
1483 clk_disable(host->fclk);
Denis Karpovdd498ef2009-09-22 16:44:49 -07001484
Denis Karpovd900f712009-09-22 16:44:38 -07001485 return 0;
1486}
1487
1488static int mmc_regs_open(struct inode *inode, struct file *file)
1489{
1490 return single_open(file, mmc_regs_show, inode->i_private);
1491}
1492
1493static const struct file_operations mmc_regs_fops = {
1494 .open = mmc_regs_open,
1495 .read = seq_read,
1496 .llseek = seq_lseek,
1497 .release = single_release,
1498};
1499
1500static void omap_mmc_debugfs(struct mmc_host *mmc)
1501{
1502 if (mmc->debugfs_root)
1503 debugfs_create_file("regs", S_IRUSR, mmc->debugfs_root,
1504 mmc, &mmc_regs_fops);
1505}
1506
1507#else
1508
1509static void omap_mmc_debugfs(struct mmc_host *mmc)
1510{
1511}
1512
1513#endif
1514
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001515static int __init omap_mmc_probe(struct platform_device *pdev)
1516{
1517 struct omap_mmc_platform_data *pdata = pdev->dev.platform_data;
1518 struct mmc_host *mmc;
1519 struct mmc_omap_host *host = NULL;
1520 struct resource *res;
1521 int ret = 0, irq;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001522
1523 if (pdata == NULL) {
1524 dev_err(&pdev->dev, "Platform Data is missing\n");
1525 return -ENXIO;
1526 }
1527
1528 if (pdata->nr_slots == 0) {
1529 dev_err(&pdev->dev, "No Slots\n");
1530 return -ENXIO;
1531 }
1532
1533 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1534 irq = platform_get_irq(pdev, 0);
1535 if (res == NULL || irq < 0)
1536 return -ENXIO;
1537
1538 res = request_mem_region(res->start, res->end - res->start + 1,
1539 pdev->name);
1540 if (res == NULL)
1541 return -EBUSY;
1542
1543 mmc = mmc_alloc_host(sizeof(struct mmc_omap_host), &pdev->dev);
1544 if (!mmc) {
1545 ret = -ENOMEM;
1546 goto err;
1547 }
1548
1549 host = mmc_priv(mmc);
1550 host->mmc = mmc;
1551 host->pdata = pdata;
1552 host->dev = &pdev->dev;
1553 host->use_dma = 1;
1554 host->dev->dma_mask = &pdata->dma_mask;
1555 host->dma_ch = -1;
1556 host->irq = irq;
1557 host->id = pdev->id;
1558 host->slot_id = 0;
1559 host->mapbase = res->start;
1560 host->base = ioremap(host->mapbase, SZ_4K);
Adrian Huntera3621462009-09-22 16:44:42 -07001561 host->power_mode = -1;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001562
1563 platform_set_drvdata(pdev, host);
1564 INIT_WORK(&host->mmc_carddetect_work, mmc_omap_detect);
1565
Denis Karpovdd498ef2009-09-22 16:44:49 -07001566 if (pdata->slots[host->slot_id].power_saving)
1567 mmc->ops = &mmc_omap_ps_ops;
1568 else
1569 mmc->ops = &mmc_omap_ops;
1570
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001571 mmc->f_min = 400000;
1572 mmc->f_max = 52000000;
1573
1574 sema_init(&host->sem, 1);
1575
Russell King6f7607c2009-01-28 10:22:50 +00001576 host->iclk = clk_get(&pdev->dev, "ick");
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001577 if (IS_ERR(host->iclk)) {
1578 ret = PTR_ERR(host->iclk);
1579 host->iclk = NULL;
1580 goto err1;
1581 }
Russell King6f7607c2009-01-28 10:22:50 +00001582 host->fclk = clk_get(&pdev->dev, "fck");
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001583 if (IS_ERR(host->fclk)) {
1584 ret = PTR_ERR(host->fclk);
1585 host->fclk = NULL;
1586 clk_put(host->iclk);
1587 goto err1;
1588 }
1589
Denis Karpov11dd62a2009-09-22 16:44:43 -07001590 omap_mmc_save_ctx(host);
1591
Adrian Hunter5e2ea612009-09-22 16:44:39 -07001592 mmc->caps |= MMC_CAP_DISABLE;
Denis Karpovdd498ef2009-09-22 16:44:49 -07001593 mmc_set_disable_delay(mmc, OMAP_MMC_DISABLED_TIMEOUT);
1594 /* we start off in DISABLED state */
1595 host->dpm_state = DISABLED;
1596
Adrian Hunter5e2ea612009-09-22 16:44:39 -07001597 if (mmc_host_enable(host->mmc) != 0) {
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001598 clk_put(host->iclk);
1599 clk_put(host->fclk);
1600 goto err1;
1601 }
1602
1603 if (clk_enable(host->iclk) != 0) {
Adrian Hunter5e2ea612009-09-22 16:44:39 -07001604 mmc_host_disable(host->mmc);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001605 clk_put(host->iclk);
1606 clk_put(host->fclk);
1607 goto err1;
1608 }
1609
1610 host->dbclk = clk_get(&pdev->dev, "mmchsdb_fck");
1611 /*
1612 * MMC can still work without debounce clock.
1613 */
1614 if (IS_ERR(host->dbclk))
1615 dev_warn(mmc_dev(host->mmc), "Failed to get debounce clock\n");
1616 else
1617 if (clk_enable(host->dbclk) != 0)
1618 dev_dbg(mmc_dev(host->mmc), "Enabling debounce"
1619 " clk failed\n");
1620 else
1621 host->dbclk_enabled = 1;
1622
Juha Yrjola0ccd76d2008-11-14 15:22:00 +02001623 /* Since we do only SG emulation, we can have as many segs
1624 * as we want. */
1625 mmc->max_phys_segs = 1024;
1626 mmc->max_hw_segs = 1024;
1627
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001628 mmc->max_blk_size = 512; /* Block Length at max can be 1024 */
1629 mmc->max_blk_count = 0xFFFF; /* No. of Blocks is 16 bits */
1630 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
1631 mmc->max_seg_size = mmc->max_req_size;
1632
Jarkko Lavinen13189e72009-09-22 16:44:53 -07001633 mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
1634 MMC_CAP_WAIT_WHILE_BUSY;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001635
Jarkko Lavinen73153012008-11-21 16:49:54 +02001636 if (pdata->slots[host->slot_id].wires >= 8)
1637 mmc->caps |= MMC_CAP_8_BIT_DATA;
1638 else if (pdata->slots[host->slot_id].wires >= 4)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001639 mmc->caps |= MMC_CAP_4_BIT_DATA;
1640
Adrian Hunter23d99bb2009-09-22 16:44:48 -07001641 if (pdata->slots[host->slot_id].nonremovable)
1642 mmc->caps |= MMC_CAP_NONREMOVABLE;
1643
Kim Kyuwon1b331e62009-02-20 13:10:08 +01001644 omap_hsmmc_init(host);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001645
Grazvydas Ignotasf3e2f1d2009-01-03 10:36:13 +00001646 /* Select DMA lines */
1647 switch (host->id) {
1648 case OMAP_MMC1_DEVID:
1649 host->dma_line_tx = OMAP24XX_DMA_MMC1_TX;
1650 host->dma_line_rx = OMAP24XX_DMA_MMC1_RX;
1651 break;
1652 case OMAP_MMC2_DEVID:
1653 host->dma_line_tx = OMAP24XX_DMA_MMC2_TX;
1654 host->dma_line_rx = OMAP24XX_DMA_MMC2_RX;
1655 break;
1656 case OMAP_MMC3_DEVID:
1657 host->dma_line_tx = OMAP34XX_DMA_MMC3_TX;
1658 host->dma_line_rx = OMAP34XX_DMA_MMC3_RX;
1659 break;
1660 default:
1661 dev_err(mmc_dev(host->mmc), "Invalid MMC id\n");
1662 goto err_irq;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001663 }
1664
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001665 /* Request IRQ for MMC operations */
1666 ret = request_irq(host->irq, mmc_omap_irq, IRQF_DISABLED,
1667 mmc_hostname(mmc), host);
1668 if (ret) {
1669 dev_dbg(mmc_dev(host->mmc), "Unable to grab HSMMC IRQ\n");
1670 goto err_irq;
1671 }
1672
David Brownellb583f262009-05-28 14:04:03 -07001673 /* initialize power supplies, gpios, etc */
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001674 if (pdata->init != NULL) {
1675 if (pdata->init(&pdev->dev) != 0) {
David Brownellb583f262009-05-28 14:04:03 -07001676 dev_dbg(mmc_dev(host->mmc), "late init error\n");
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001677 goto err_irq_cd_init;
1678 }
1679 }
David Brownellb583f262009-05-28 14:04:03 -07001680 mmc->ocr_avail = mmc_slot(host).ocr_mask;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001681
1682 /* Request IRQ for card detect */
Adrian Huntere1a55f52009-01-26 13:17:25 +02001683 if ((mmc_slot(host).card_detect_irq)) {
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001684 ret = request_irq(mmc_slot(host).card_detect_irq,
1685 omap_mmc_cd_handler,
1686 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
1687 | IRQF_DISABLED,
1688 mmc_hostname(mmc), host);
1689 if (ret) {
1690 dev_dbg(mmc_dev(host->mmc),
1691 "Unable to grab MMC CD IRQ\n");
1692 goto err_irq_cd;
1693 }
1694 }
1695
1696 OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK);
1697 OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK);
1698
Adrian Hunter5e2ea612009-09-22 16:44:39 -07001699 mmc_host_lazy_disable(host->mmc);
1700
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001701 mmc_add_host(mmc);
1702
1703 if (host->pdata->slots[host->slot_id].name != NULL) {
1704 ret = device_create_file(&mmc->class_dev, &dev_attr_slot_name);
1705 if (ret < 0)
1706 goto err_slot_name;
1707 }
Adrian Huntere1a55f52009-01-26 13:17:25 +02001708 if (mmc_slot(host).card_detect_irq &&
1709 host->pdata->slots[host->slot_id].get_cover_state) {
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001710 ret = device_create_file(&mmc->class_dev,
1711 &dev_attr_cover_switch);
1712 if (ret < 0)
1713 goto err_cover_switch;
1714 }
1715
Denis Karpovd900f712009-09-22 16:44:38 -07001716 omap_mmc_debugfs(mmc);
1717
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001718 return 0;
1719
1720err_cover_switch:
1721 device_remove_file(&mmc->class_dev, &dev_attr_cover_switch);
1722err_slot_name:
1723 mmc_remove_host(mmc);
1724err_irq_cd:
1725 free_irq(mmc_slot(host).card_detect_irq, host);
1726err_irq_cd_init:
1727 free_irq(host->irq, host);
1728err_irq:
Adrian Hunter5e2ea612009-09-22 16:44:39 -07001729 mmc_host_disable(host->mmc);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001730 clk_disable(host->iclk);
1731 clk_put(host->fclk);
1732 clk_put(host->iclk);
1733 if (host->dbclk_enabled) {
1734 clk_disable(host->dbclk);
1735 clk_put(host->dbclk);
1736 }
1737
1738err1:
1739 iounmap(host->base);
1740err:
1741 dev_dbg(mmc_dev(host->mmc), "Probe Failed\n");
1742 release_mem_region(res->start, res->end - res->start + 1);
1743 if (host)
1744 mmc_free_host(mmc);
1745 return ret;
1746}
1747
1748static int omap_mmc_remove(struct platform_device *pdev)
1749{
1750 struct mmc_omap_host *host = platform_get_drvdata(pdev);
1751 struct resource *res;
1752
1753 if (host) {
Adrian Hunter5e2ea612009-09-22 16:44:39 -07001754 mmc_host_enable(host->mmc);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001755 mmc_remove_host(host->mmc);
1756 if (host->pdata->cleanup)
1757 host->pdata->cleanup(&pdev->dev);
1758 free_irq(host->irq, host);
1759 if (mmc_slot(host).card_detect_irq)
1760 free_irq(mmc_slot(host).card_detect_irq, host);
1761 flush_scheduled_work();
1762
Adrian Hunter5e2ea612009-09-22 16:44:39 -07001763 mmc_host_disable(host->mmc);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001764 clk_disable(host->iclk);
1765 clk_put(host->fclk);
1766 clk_put(host->iclk);
1767 if (host->dbclk_enabled) {
1768 clk_disable(host->dbclk);
1769 clk_put(host->dbclk);
1770 }
1771
1772 mmc_free_host(host->mmc);
1773 iounmap(host->base);
1774 }
1775
1776 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1777 if (res)
1778 release_mem_region(res->start, res->end - res->start + 1);
1779 platform_set_drvdata(pdev, NULL);
1780
1781 return 0;
1782}
1783
1784#ifdef CONFIG_PM
1785static int omap_mmc_suspend(struct platform_device *pdev, pm_message_t state)
1786{
1787 int ret = 0;
1788 struct mmc_omap_host *host = platform_get_drvdata(pdev);
1789
1790 if (host && host->suspended)
1791 return 0;
1792
1793 if (host) {
Adrian Huntera6b22402009-09-22 16:44:45 -07001794 host->suspended = 1;
1795 if (host->pdata->suspend) {
1796 ret = host->pdata->suspend(&pdev->dev,
1797 host->slot_id);
1798 if (ret) {
1799 dev_dbg(mmc_dev(host->mmc),
1800 "Unable to handle MMC board"
1801 " level suspend\n");
1802 host->suspended = 0;
1803 return ret;
1804 }
1805 }
1806 cancel_work_sync(&host->mmc_carddetect_work);
Adrian Hunter5e2ea612009-09-22 16:44:39 -07001807 mmc_host_enable(host->mmc);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001808 ret = mmc_suspend_host(host->mmc, state);
1809 if (ret == 0) {
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001810 OMAP_HSMMC_WRITE(host->base, ISE, 0);
1811 OMAP_HSMMC_WRITE(host->base, IE, 0);
1812
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001813
Jarkko Lavinen0683af42009-03-12 15:30:58 +02001814 OMAP_HSMMC_WRITE(host->base, HCTL,
1815 OMAP_HSMMC_READ(host->base, HCTL) & ~SDBP);
Adrian Hunter5e2ea612009-09-22 16:44:39 -07001816 mmc_host_disable(host->mmc);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001817 clk_disable(host->iclk);
1818 clk_disable(host->dbclk);
Adrian Huntera6b22402009-09-22 16:44:45 -07001819 } else {
1820 host->suspended = 0;
1821 if (host->pdata->resume) {
1822 ret = host->pdata->resume(&pdev->dev,
1823 host->slot_id);
1824 if (ret)
1825 dev_dbg(mmc_dev(host->mmc),
1826 "Unmask interrupt failed\n");
1827 }
Adrian Hunter5e2ea612009-09-22 16:44:39 -07001828 mmc_host_disable(host->mmc);
Adrian Huntera6b22402009-09-22 16:44:45 -07001829 }
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001830
1831 }
1832 return ret;
1833}
1834
1835/* Routine to resume the MMC device */
1836static int omap_mmc_resume(struct platform_device *pdev)
1837{
1838 int ret = 0;
1839 struct mmc_omap_host *host = platform_get_drvdata(pdev);
1840
1841 if (host && !host->suspended)
1842 return 0;
1843
1844 if (host) {
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001845 ret = clk_enable(host->iclk);
Denis Karpov11dd62a2009-09-22 16:44:43 -07001846 if (ret)
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001847 goto clk_en_err;
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001848
1849 if (clk_enable(host->dbclk) != 0)
1850 dev_dbg(mmc_dev(host->mmc),
1851 "Enabling debounce clk failed\n");
1852
Denis Karpov11dd62a2009-09-22 16:44:43 -07001853 if (mmc_host_enable(host->mmc) != 0) {
1854 clk_disable(host->iclk);
1855 goto clk_en_err;
1856 }
1857
Kim Kyuwon1b331e62009-02-20 13:10:08 +01001858 omap_hsmmc_init(host);
1859
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001860 if (host->pdata->resume) {
1861 ret = host->pdata->resume(&pdev->dev, host->slot_id);
1862 if (ret)
1863 dev_dbg(mmc_dev(host->mmc),
1864 "Unmask interrupt failed\n");
1865 }
1866
1867 /* Notify the core to resume the host */
1868 ret = mmc_resume_host(host->mmc);
1869 if (ret == 0)
1870 host->suspended = 0;
Adrian Hunter5e2ea612009-09-22 16:44:39 -07001871 mmc_host_lazy_disable(host->mmc);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001872 }
1873
1874 return ret;
1875
1876clk_en_err:
1877 dev_dbg(mmc_dev(host->mmc),
1878 "Failed to enable MMC clocks during resume\n");
1879 return ret;
1880}
1881
1882#else
1883#define omap_mmc_suspend NULL
1884#define omap_mmc_resume NULL
1885#endif
1886
1887static struct platform_driver omap_mmc_driver = {
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001888 .remove = omap_mmc_remove,
1889 .suspend = omap_mmc_suspend,
1890 .resume = omap_mmc_resume,
1891 .driver = {
1892 .name = DRIVER_NAME,
1893 .owner = THIS_MODULE,
1894 },
1895};
1896
1897static int __init omap_mmc_init(void)
1898{
1899 /* Register the MMC driver */
Uwe Kleine-Königf400cd82009-09-22 16:44:26 -07001900 return platform_driver_probe(&omap_mmc_driver, omap_mmc_probe);
Madhusudhan Chikkaturea45c6cb2009-01-23 01:05:23 +01001901}
1902
1903static void __exit omap_mmc_cleanup(void)
1904{
1905 /* Unregister MMC driver */
1906 platform_driver_unregister(&omap_mmc_driver);
1907}
1908
1909module_init(omap_mmc_init);
1910module_exit(omap_mmc_cleanup);
1911
1912MODULE_DESCRIPTION("OMAP High Speed Multimedia Card driver");
1913MODULE_LICENSE("GPL");
1914MODULE_ALIAS("platform:" DRIVER_NAME);
1915MODULE_AUTHOR("Texas Instruments Inc");