Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 1 | /* |
Paul Walmsley | 7359154 | 2010-02-22 22:09:32 -0700 | [diff] [blame] | 2 | * omap_hwmod_2420_data.c - hardware modules present on the OMAP2420 chips |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 3 | * |
Paul Walmsley | 78183f3 | 2011-07-09 19:14:05 -0600 | [diff] [blame] | 4 | * Copyright (C) 2009-2011 Nokia Corporation |
Paul Walmsley | 0a78c5c | 2012-04-19 04:04:31 -0600 | [diff] [blame^] | 5 | * Copyright (C) 2012 Texas Instruments, Inc. |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 6 | * Paul Walmsley |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | * |
| 12 | * XXX handle crossbar/shared link difference for L3? |
Paul Walmsley | 7359154 | 2010-02-22 22:09:32 -0700 | [diff] [blame] | 13 | * XXX these should be marked initdata for multi-OMAP kernels |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 14 | */ |
Tony Lindgren | ce491cf | 2009-10-20 09:40:47 -0700 | [diff] [blame] | 15 | #include <plat/omap_hwmod.h> |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 16 | #include <mach/irqs.h> |
Tony Lindgren | ce491cf | 2009-10-20 09:40:47 -0700 | [diff] [blame] | 17 | #include <plat/cpu.h> |
| 18 | #include <plat/dma.h> |
Kevin Hilman | 046465b | 2010-09-27 20:19:30 +0530 | [diff] [blame] | 19 | #include <plat/serial.h> |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 20 | #include <plat/i2c.h> |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 21 | #include <plat/gpio.h> |
Charulatha V | 617871d | 2011-02-17 09:53:09 -0800 | [diff] [blame] | 22 | #include <plat/mcspi.h> |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 23 | #include <plat/dmtimer.h> |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 24 | #include <plat/l3_2xxx.h> |
| 25 | #include <plat/l4_2xxx.h> |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 26 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 27 | #include "omap_hwmod_common_data.h" |
| 28 | |
Varadarajan, Charulatha | a714b9c | 2010-09-23 20:02:39 +0530 | [diff] [blame] | 29 | #include "cm-regbits-24xx.h" |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 30 | #include "prm-regbits-24xx.h" |
Paul Walmsley | ff2516f | 2010-12-21 15:39:15 -0700 | [diff] [blame] | 31 | #include "wd_timer.h" |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 32 | |
Paul Walmsley | 7359154 | 2010-02-22 22:09:32 -0700 | [diff] [blame] | 33 | /* |
| 34 | * OMAP2420 hardware module integration data |
| 35 | * |
| 36 | * ALl of the data in this section should be autogeneratable from the |
| 37 | * TI hardware database or other technical documentation. Data that |
| 38 | * is driver-specific or driver-kernel integration-specific belongs |
| 39 | * elsewhere. |
| 40 | */ |
| 41 | |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 42 | static struct omap_hwmod omap2420_mpu_hwmod; |
Paul Walmsley | 08072ac | 2010-07-26 16:34:33 -0600 | [diff] [blame] | 43 | static struct omap_hwmod omap2420_iva_hwmod; |
Kevin Hilman | 4a7cf90 | 2010-07-26 16:34:32 -0600 | [diff] [blame] | 44 | static struct omap_hwmod omap2420_l3_main_hwmod; |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 45 | static struct omap_hwmod omap2420_l4_core_hwmod; |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 46 | static struct omap_hwmod omap2420_dss_core_hwmod; |
| 47 | static struct omap_hwmod omap2420_dss_dispc_hwmod; |
| 48 | static struct omap_hwmod omap2420_dss_rfbi_hwmod; |
| 49 | static struct omap_hwmod omap2420_dss_venc_hwmod; |
Varadarajan, Charulatha | a714b9c | 2010-09-23 20:02:39 +0530 | [diff] [blame] | 50 | static struct omap_hwmod omap2420_wd_timer2_hwmod; |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 51 | static struct omap_hwmod omap2420_gpio1_hwmod; |
| 52 | static struct omap_hwmod omap2420_gpio2_hwmod; |
| 53 | static struct omap_hwmod omap2420_gpio3_hwmod; |
| 54 | static struct omap_hwmod omap2420_gpio4_hwmod; |
G, Manjunath Kondaiah | 745685df9 | 2010-12-20 18:27:18 -0800 | [diff] [blame] | 55 | static struct omap_hwmod omap2420_dma_system_hwmod; |
Charulatha V | 617871d | 2011-02-17 09:53:09 -0800 | [diff] [blame] | 56 | static struct omap_hwmod omap2420_mcspi1_hwmod; |
| 57 | static struct omap_hwmod omap2420_mcspi2_hwmod; |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 58 | |
| 59 | /* L3 -> L4_CORE interface */ |
Kevin Hilman | 4a7cf90 | 2010-07-26 16:34:32 -0600 | [diff] [blame] | 60 | static struct omap_hwmod_ocp_if omap2420_l3_main__l4_core = { |
| 61 | .master = &omap2420_l3_main_hwmod, |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 62 | .slave = &omap2420_l4_core_hwmod, |
| 63 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 64 | }; |
| 65 | |
| 66 | /* MPU -> L3 interface */ |
Kevin Hilman | 4a7cf90 | 2010-07-26 16:34:32 -0600 | [diff] [blame] | 67 | static struct omap_hwmod_ocp_if omap2420_mpu__l3_main = { |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 68 | .master = &omap2420_mpu_hwmod, |
Kevin Hilman | 4a7cf90 | 2010-07-26 16:34:32 -0600 | [diff] [blame] | 69 | .slave = &omap2420_l3_main_hwmod, |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 70 | .user = OCP_USER_MPU, |
| 71 | }; |
| 72 | |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 73 | /* DSS -> l3 */ |
| 74 | static struct omap_hwmod_ocp_if omap2420_dss__l3 = { |
| 75 | .master = &omap2420_dss_core_hwmod, |
| 76 | .slave = &omap2420_l3_main_hwmod, |
| 77 | .fw = { |
| 78 | .omap2 = { |
| 79 | .l3_perm_bit = OMAP2_L3_CORE_FW_CONNID_DSS, |
| 80 | .flags = OMAP_FIREWALL_L3, |
| 81 | } |
| 82 | }, |
| 83 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 84 | }; |
| 85 | |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 86 | /* L3 */ |
Kevin Hilman | 4a7cf90 | 2010-07-26 16:34:32 -0600 | [diff] [blame] | 87 | static struct omap_hwmod omap2420_l3_main_hwmod = { |
Benoit Cousson | fa98347 | 2010-07-26 16:34:29 -0600 | [diff] [blame] | 88 | .name = "l3_main", |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 89 | .class = &l3_hwmod_class, |
Kevin Hilman | 2eb1875 | 2010-07-26 16:34:28 -0600 | [diff] [blame] | 90 | .flags = HWMOD_NO_IDLEST, |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 91 | }; |
| 92 | |
| 93 | static struct omap_hwmod omap2420_l4_wkup_hwmod; |
Kevin Hilman | 046465b | 2010-09-27 20:19:30 +0530 | [diff] [blame] | 94 | static struct omap_hwmod omap2420_uart1_hwmod; |
| 95 | static struct omap_hwmod omap2420_uart2_hwmod; |
| 96 | static struct omap_hwmod omap2420_uart3_hwmod; |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 97 | static struct omap_hwmod omap2420_i2c1_hwmod; |
| 98 | static struct omap_hwmod omap2420_i2c2_hwmod; |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 99 | static struct omap_hwmod omap2420_mcbsp1_hwmod; |
| 100 | static struct omap_hwmod omap2420_mcbsp2_hwmod; |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 101 | |
Charulatha V | 617871d | 2011-02-17 09:53:09 -0800 | [diff] [blame] | 102 | /* l4 core -> mcspi1 interface */ |
Charulatha V | 617871d | 2011-02-17 09:53:09 -0800 | [diff] [blame] | 103 | static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = { |
| 104 | .master = &omap2420_l4_core_hwmod, |
| 105 | .slave = &omap2420_mcspi1_hwmod, |
| 106 | .clk = "mcspi1_ick", |
Paul Walmsley | ded1138 | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 107 | .addr = omap2_mcspi1_addr_space, |
Charulatha V | 617871d | 2011-02-17 09:53:09 -0800 | [diff] [blame] | 108 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 109 | }; |
| 110 | |
| 111 | /* l4 core -> mcspi2 interface */ |
Charulatha V | 617871d | 2011-02-17 09:53:09 -0800 | [diff] [blame] | 112 | static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = { |
| 113 | .master = &omap2420_l4_core_hwmod, |
| 114 | .slave = &omap2420_mcspi2_hwmod, |
| 115 | .clk = "mcspi2_ick", |
Paul Walmsley | ded1138 | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 116 | .addr = omap2_mcspi2_addr_space, |
Charulatha V | 617871d | 2011-02-17 09:53:09 -0800 | [diff] [blame] | 117 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 118 | }; |
| 119 | |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 120 | /* L4_CORE -> L4_WKUP interface */ |
| 121 | static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = { |
| 122 | .master = &omap2420_l4_core_hwmod, |
| 123 | .slave = &omap2420_l4_wkup_hwmod, |
| 124 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 125 | }; |
| 126 | |
Kevin Hilman | 046465b | 2010-09-27 20:19:30 +0530 | [diff] [blame] | 127 | /* L4 CORE -> UART1 interface */ |
Kevin Hilman | 046465b | 2010-09-27 20:19:30 +0530 | [diff] [blame] | 128 | static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { |
| 129 | .master = &omap2420_l4_core_hwmod, |
| 130 | .slave = &omap2420_uart1_hwmod, |
| 131 | .clk = "uart1_ick", |
Paul Walmsley | ded1138 | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 132 | .addr = omap2xxx_uart1_addr_space, |
Kevin Hilman | 046465b | 2010-09-27 20:19:30 +0530 | [diff] [blame] | 133 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 134 | }; |
| 135 | |
| 136 | /* L4 CORE -> UART2 interface */ |
Kevin Hilman | 046465b | 2010-09-27 20:19:30 +0530 | [diff] [blame] | 137 | static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { |
| 138 | .master = &omap2420_l4_core_hwmod, |
| 139 | .slave = &omap2420_uart2_hwmod, |
| 140 | .clk = "uart2_ick", |
Paul Walmsley | ded1138 | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 141 | .addr = omap2xxx_uart2_addr_space, |
Kevin Hilman | 046465b | 2010-09-27 20:19:30 +0530 | [diff] [blame] | 142 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 143 | }; |
| 144 | |
| 145 | /* L4 PER -> UART3 interface */ |
Kevin Hilman | 046465b | 2010-09-27 20:19:30 +0530 | [diff] [blame] | 146 | static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { |
| 147 | .master = &omap2420_l4_core_hwmod, |
| 148 | .slave = &omap2420_uart3_hwmod, |
| 149 | .clk = "uart3_ick", |
Paul Walmsley | ded1138 | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 150 | .addr = omap2xxx_uart3_addr_space, |
Kevin Hilman | 046465b | 2010-09-27 20:19:30 +0530 | [diff] [blame] | 151 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 152 | }; |
| 153 | |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 154 | /* L4 CORE -> I2C1 interface */ |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 155 | static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = { |
| 156 | .master = &omap2420_l4_core_hwmod, |
| 157 | .slave = &omap2420_i2c1_hwmod, |
| 158 | .clk = "i2c1_ick", |
Paul Walmsley | ded1138 | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 159 | .addr = omap2_i2c1_addr_space, |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 160 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 161 | }; |
| 162 | |
| 163 | /* L4 CORE -> I2C2 interface */ |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 164 | static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = { |
| 165 | .master = &omap2420_l4_core_hwmod, |
| 166 | .slave = &omap2420_i2c2_hwmod, |
| 167 | .clk = "i2c2_ick", |
Paul Walmsley | ded1138 | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 168 | .addr = omap2_i2c2_addr_space, |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 169 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 170 | }; |
| 171 | |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 172 | /* L4 CORE */ |
| 173 | static struct omap_hwmod omap2420_l4_core_hwmod = { |
Benoit Cousson | fa98347 | 2010-07-26 16:34:29 -0600 | [diff] [blame] | 174 | .name = "l4_core", |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 175 | .class = &l4_hwmod_class, |
Kevin Hilman | 2eb1875 | 2010-07-26 16:34:28 -0600 | [diff] [blame] | 176 | .flags = HWMOD_NO_IDLEST, |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 177 | }; |
| 178 | |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 179 | /* L4 WKUP */ |
| 180 | static struct omap_hwmod omap2420_l4_wkup_hwmod = { |
Benoit Cousson | fa98347 | 2010-07-26 16:34:29 -0600 | [diff] [blame] | 181 | .name = "l4_wkup", |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 182 | .class = &l4_hwmod_class, |
Kevin Hilman | 2eb1875 | 2010-07-26 16:34:28 -0600 | [diff] [blame] | 183 | .flags = HWMOD_NO_IDLEST, |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 184 | }; |
| 185 | |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 186 | /* MPU */ |
| 187 | static struct omap_hwmod omap2420_mpu_hwmod = { |
Benoit Cousson | 5c2c029 | 2010-05-20 12:31:10 -0600 | [diff] [blame] | 188 | .name = "mpu", |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 189 | .class = &mpu_hwmod_class, |
Paul Walmsley | 50ebdac | 2010-02-22 22:09:31 -0700 | [diff] [blame] | 190 | .main_clk = "mpu_ck", |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 191 | }; |
| 192 | |
Paul Walmsley | 08072ac | 2010-07-26 16:34:33 -0600 | [diff] [blame] | 193 | /* |
| 194 | * IVA1 interface data |
| 195 | */ |
| 196 | |
| 197 | /* IVA <- L3 interface */ |
| 198 | static struct omap_hwmod_ocp_if omap2420_l3__iva = { |
| 199 | .master = &omap2420_l3_main_hwmod, |
| 200 | .slave = &omap2420_iva_hwmod, |
| 201 | .clk = "iva1_ifck", |
| 202 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 203 | }; |
| 204 | |
Paul Walmsley | 08072ac | 2010-07-26 16:34:33 -0600 | [diff] [blame] | 205 | /* |
| 206 | * IVA2 (IVA2) |
| 207 | */ |
| 208 | |
| 209 | static struct omap_hwmod omap2420_iva_hwmod = { |
| 210 | .name = "iva", |
| 211 | .class = &iva_hwmod_class, |
Paul Walmsley | 08072ac | 2010-07-26 16:34:33 -0600 | [diff] [blame] | 212 | }; |
| 213 | |
Tarun Kanti DebBarma | c345c8b | 2011-09-20 17:00:18 +0530 | [diff] [blame] | 214 | /* always-on timers dev attribute */ |
| 215 | static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = { |
| 216 | .timer_capability = OMAP_TIMER_ALWON, |
| 217 | }; |
| 218 | |
| 219 | /* pwm timers dev attribute */ |
| 220 | static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = { |
| 221 | .timer_capability = OMAP_TIMER_HAS_PWM, |
| 222 | }; |
| 223 | |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 224 | /* timer1 */ |
| 225 | static struct omap_hwmod omap2420_timer1_hwmod; |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 226 | |
| 227 | static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = { |
| 228 | { |
| 229 | .pa_start = 0x48028000, |
| 230 | .pa_end = 0x48028000 + SZ_1K - 1, |
| 231 | .flags = ADDR_TYPE_RT |
| 232 | }, |
Paul Walmsley | 78183f3 | 2011-07-09 19:14:05 -0600 | [diff] [blame] | 233 | { } |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 234 | }; |
| 235 | |
| 236 | /* l4_wkup -> timer1 */ |
| 237 | static struct omap_hwmod_ocp_if omap2420_l4_wkup__timer1 = { |
| 238 | .master = &omap2420_l4_wkup_hwmod, |
| 239 | .slave = &omap2420_timer1_hwmod, |
| 240 | .clk = "gpt1_ick", |
| 241 | .addr = omap2420_timer1_addrs, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 242 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 243 | }; |
| 244 | |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 245 | /* timer1 hwmod */ |
| 246 | static struct omap_hwmod omap2420_timer1_hwmod = { |
| 247 | .name = "timer1", |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 248 | .mpu_irqs = omap2_timer1_mpu_irqs, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 249 | .main_clk = "gpt1_fck", |
| 250 | .prcm = { |
| 251 | .omap2 = { |
| 252 | .prcm_reg_id = 1, |
| 253 | .module_bit = OMAP24XX_EN_GPT1_SHIFT, |
| 254 | .module_offs = WKUP_MOD, |
| 255 | .idlest_reg_id = 1, |
| 256 | .idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT, |
| 257 | }, |
| 258 | }, |
Tarun Kanti DebBarma | c345c8b | 2011-09-20 17:00:18 +0530 | [diff] [blame] | 259 | .dev_attr = &capability_alwon_dev_attr, |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 260 | .class = &omap2xxx_timer_hwmod_class, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 261 | }; |
| 262 | |
| 263 | /* timer2 */ |
| 264 | static struct omap_hwmod omap2420_timer2_hwmod; |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 265 | |
| 266 | /* l4_core -> timer2 */ |
| 267 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = { |
| 268 | .master = &omap2420_l4_core_hwmod, |
| 269 | .slave = &omap2420_timer2_hwmod, |
| 270 | .clk = "gpt2_ick", |
Paul Walmsley | ded1138 | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 271 | .addr = omap2xxx_timer2_addrs, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 272 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 273 | }; |
| 274 | |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 275 | /* timer2 hwmod */ |
| 276 | static struct omap_hwmod omap2420_timer2_hwmod = { |
| 277 | .name = "timer2", |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 278 | .mpu_irqs = omap2_timer2_mpu_irqs, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 279 | .main_clk = "gpt2_fck", |
| 280 | .prcm = { |
| 281 | .omap2 = { |
| 282 | .prcm_reg_id = 1, |
| 283 | .module_bit = OMAP24XX_EN_GPT2_SHIFT, |
| 284 | .module_offs = CORE_MOD, |
| 285 | .idlest_reg_id = 1, |
| 286 | .idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT, |
| 287 | }, |
| 288 | }, |
Tarun Kanti DebBarma | c345c8b | 2011-09-20 17:00:18 +0530 | [diff] [blame] | 289 | .dev_attr = &capability_alwon_dev_attr, |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 290 | .class = &omap2xxx_timer_hwmod_class, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 291 | }; |
| 292 | |
| 293 | /* timer3 */ |
| 294 | static struct omap_hwmod omap2420_timer3_hwmod; |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 295 | |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 296 | /* l4_core -> timer3 */ |
| 297 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = { |
| 298 | .master = &omap2420_l4_core_hwmod, |
| 299 | .slave = &omap2420_timer3_hwmod, |
| 300 | .clk = "gpt3_ick", |
Paul Walmsley | ded1138 | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 301 | .addr = omap2xxx_timer3_addrs, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 302 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 303 | }; |
| 304 | |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 305 | /* timer3 hwmod */ |
| 306 | static struct omap_hwmod omap2420_timer3_hwmod = { |
| 307 | .name = "timer3", |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 308 | .mpu_irqs = omap2_timer3_mpu_irqs, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 309 | .main_clk = "gpt3_fck", |
| 310 | .prcm = { |
| 311 | .omap2 = { |
| 312 | .prcm_reg_id = 1, |
| 313 | .module_bit = OMAP24XX_EN_GPT3_SHIFT, |
| 314 | .module_offs = CORE_MOD, |
| 315 | .idlest_reg_id = 1, |
| 316 | .idlest_idle_bit = OMAP24XX_ST_GPT3_SHIFT, |
| 317 | }, |
| 318 | }, |
Tarun Kanti DebBarma | c345c8b | 2011-09-20 17:00:18 +0530 | [diff] [blame] | 319 | .dev_attr = &capability_alwon_dev_attr, |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 320 | .class = &omap2xxx_timer_hwmod_class, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 321 | }; |
| 322 | |
| 323 | /* timer4 */ |
| 324 | static struct omap_hwmod omap2420_timer4_hwmod; |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 325 | |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 326 | /* l4_core -> timer4 */ |
| 327 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = { |
| 328 | .master = &omap2420_l4_core_hwmod, |
| 329 | .slave = &omap2420_timer4_hwmod, |
| 330 | .clk = "gpt4_ick", |
Paul Walmsley | ded1138 | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 331 | .addr = omap2xxx_timer4_addrs, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 332 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 333 | }; |
| 334 | |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 335 | /* timer4 hwmod */ |
| 336 | static struct omap_hwmod omap2420_timer4_hwmod = { |
| 337 | .name = "timer4", |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 338 | .mpu_irqs = omap2_timer4_mpu_irqs, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 339 | .main_clk = "gpt4_fck", |
| 340 | .prcm = { |
| 341 | .omap2 = { |
| 342 | .prcm_reg_id = 1, |
| 343 | .module_bit = OMAP24XX_EN_GPT4_SHIFT, |
| 344 | .module_offs = CORE_MOD, |
| 345 | .idlest_reg_id = 1, |
| 346 | .idlest_idle_bit = OMAP24XX_ST_GPT4_SHIFT, |
| 347 | }, |
| 348 | }, |
Tarun Kanti DebBarma | c345c8b | 2011-09-20 17:00:18 +0530 | [diff] [blame] | 349 | .dev_attr = &capability_alwon_dev_attr, |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 350 | .class = &omap2xxx_timer_hwmod_class, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 351 | }; |
| 352 | |
| 353 | /* timer5 */ |
| 354 | static struct omap_hwmod omap2420_timer5_hwmod; |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 355 | |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 356 | /* l4_core -> timer5 */ |
| 357 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = { |
| 358 | .master = &omap2420_l4_core_hwmod, |
| 359 | .slave = &omap2420_timer5_hwmod, |
| 360 | .clk = "gpt5_ick", |
Paul Walmsley | ded1138 | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 361 | .addr = omap2xxx_timer5_addrs, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 362 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 363 | }; |
| 364 | |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 365 | /* timer5 hwmod */ |
| 366 | static struct omap_hwmod omap2420_timer5_hwmod = { |
| 367 | .name = "timer5", |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 368 | .mpu_irqs = omap2_timer5_mpu_irqs, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 369 | .main_clk = "gpt5_fck", |
| 370 | .prcm = { |
| 371 | .omap2 = { |
| 372 | .prcm_reg_id = 1, |
| 373 | .module_bit = OMAP24XX_EN_GPT5_SHIFT, |
| 374 | .module_offs = CORE_MOD, |
| 375 | .idlest_reg_id = 1, |
| 376 | .idlest_idle_bit = OMAP24XX_ST_GPT5_SHIFT, |
| 377 | }, |
| 378 | }, |
Tarun Kanti DebBarma | c345c8b | 2011-09-20 17:00:18 +0530 | [diff] [blame] | 379 | .dev_attr = &capability_alwon_dev_attr, |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 380 | .class = &omap2xxx_timer_hwmod_class, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 381 | }; |
| 382 | |
| 383 | |
| 384 | /* timer6 */ |
| 385 | static struct omap_hwmod omap2420_timer6_hwmod; |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 386 | |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 387 | /* l4_core -> timer6 */ |
| 388 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = { |
| 389 | .master = &omap2420_l4_core_hwmod, |
| 390 | .slave = &omap2420_timer6_hwmod, |
| 391 | .clk = "gpt6_ick", |
Paul Walmsley | ded1138 | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 392 | .addr = omap2xxx_timer6_addrs, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 393 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 394 | }; |
| 395 | |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 396 | /* timer6 hwmod */ |
| 397 | static struct omap_hwmod omap2420_timer6_hwmod = { |
| 398 | .name = "timer6", |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 399 | .mpu_irqs = omap2_timer6_mpu_irqs, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 400 | .main_clk = "gpt6_fck", |
| 401 | .prcm = { |
| 402 | .omap2 = { |
| 403 | .prcm_reg_id = 1, |
| 404 | .module_bit = OMAP24XX_EN_GPT6_SHIFT, |
| 405 | .module_offs = CORE_MOD, |
| 406 | .idlest_reg_id = 1, |
| 407 | .idlest_idle_bit = OMAP24XX_ST_GPT6_SHIFT, |
| 408 | }, |
| 409 | }, |
Tarun Kanti DebBarma | c345c8b | 2011-09-20 17:00:18 +0530 | [diff] [blame] | 410 | .dev_attr = &capability_alwon_dev_attr, |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 411 | .class = &omap2xxx_timer_hwmod_class, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 412 | }; |
| 413 | |
| 414 | /* timer7 */ |
| 415 | static struct omap_hwmod omap2420_timer7_hwmod; |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 416 | |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 417 | /* l4_core -> timer7 */ |
| 418 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = { |
| 419 | .master = &omap2420_l4_core_hwmod, |
| 420 | .slave = &omap2420_timer7_hwmod, |
| 421 | .clk = "gpt7_ick", |
Paul Walmsley | ded1138 | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 422 | .addr = omap2xxx_timer7_addrs, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 423 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 424 | }; |
| 425 | |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 426 | /* timer7 hwmod */ |
| 427 | static struct omap_hwmod omap2420_timer7_hwmod = { |
| 428 | .name = "timer7", |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 429 | .mpu_irqs = omap2_timer7_mpu_irqs, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 430 | .main_clk = "gpt7_fck", |
| 431 | .prcm = { |
| 432 | .omap2 = { |
| 433 | .prcm_reg_id = 1, |
| 434 | .module_bit = OMAP24XX_EN_GPT7_SHIFT, |
| 435 | .module_offs = CORE_MOD, |
| 436 | .idlest_reg_id = 1, |
| 437 | .idlest_idle_bit = OMAP24XX_ST_GPT7_SHIFT, |
| 438 | }, |
| 439 | }, |
Tarun Kanti DebBarma | c345c8b | 2011-09-20 17:00:18 +0530 | [diff] [blame] | 440 | .dev_attr = &capability_alwon_dev_attr, |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 441 | .class = &omap2xxx_timer_hwmod_class, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 442 | }; |
| 443 | |
| 444 | /* timer8 */ |
| 445 | static struct omap_hwmod omap2420_timer8_hwmod; |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 446 | |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 447 | /* l4_core -> timer8 */ |
| 448 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = { |
| 449 | .master = &omap2420_l4_core_hwmod, |
| 450 | .slave = &omap2420_timer8_hwmod, |
| 451 | .clk = "gpt8_ick", |
Paul Walmsley | ded1138 | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 452 | .addr = omap2xxx_timer8_addrs, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 453 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 454 | }; |
| 455 | |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 456 | /* timer8 hwmod */ |
| 457 | static struct omap_hwmod omap2420_timer8_hwmod = { |
| 458 | .name = "timer8", |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 459 | .mpu_irqs = omap2_timer8_mpu_irqs, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 460 | .main_clk = "gpt8_fck", |
| 461 | .prcm = { |
| 462 | .omap2 = { |
| 463 | .prcm_reg_id = 1, |
| 464 | .module_bit = OMAP24XX_EN_GPT8_SHIFT, |
| 465 | .module_offs = CORE_MOD, |
| 466 | .idlest_reg_id = 1, |
| 467 | .idlest_idle_bit = OMAP24XX_ST_GPT8_SHIFT, |
| 468 | }, |
| 469 | }, |
Tarun Kanti DebBarma | c345c8b | 2011-09-20 17:00:18 +0530 | [diff] [blame] | 470 | .dev_attr = &capability_alwon_dev_attr, |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 471 | .class = &omap2xxx_timer_hwmod_class, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 472 | }; |
| 473 | |
| 474 | /* timer9 */ |
| 475 | static struct omap_hwmod omap2420_timer9_hwmod; |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 476 | |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 477 | /* l4_core -> timer9 */ |
| 478 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = { |
| 479 | .master = &omap2420_l4_core_hwmod, |
| 480 | .slave = &omap2420_timer9_hwmod, |
| 481 | .clk = "gpt9_ick", |
Paul Walmsley | ded1138 | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 482 | .addr = omap2xxx_timer9_addrs, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 483 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 484 | }; |
| 485 | |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 486 | /* timer9 hwmod */ |
| 487 | static struct omap_hwmod omap2420_timer9_hwmod = { |
| 488 | .name = "timer9", |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 489 | .mpu_irqs = omap2_timer9_mpu_irqs, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 490 | .main_clk = "gpt9_fck", |
| 491 | .prcm = { |
| 492 | .omap2 = { |
| 493 | .prcm_reg_id = 1, |
| 494 | .module_bit = OMAP24XX_EN_GPT9_SHIFT, |
| 495 | .module_offs = CORE_MOD, |
| 496 | .idlest_reg_id = 1, |
| 497 | .idlest_idle_bit = OMAP24XX_ST_GPT9_SHIFT, |
| 498 | }, |
| 499 | }, |
Tarun Kanti DebBarma | c345c8b | 2011-09-20 17:00:18 +0530 | [diff] [blame] | 500 | .dev_attr = &capability_pwm_dev_attr, |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 501 | .class = &omap2xxx_timer_hwmod_class, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 502 | }; |
| 503 | |
| 504 | /* timer10 */ |
| 505 | static struct omap_hwmod omap2420_timer10_hwmod; |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 506 | |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 507 | /* l4_core -> timer10 */ |
| 508 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = { |
| 509 | .master = &omap2420_l4_core_hwmod, |
| 510 | .slave = &omap2420_timer10_hwmod, |
| 511 | .clk = "gpt10_ick", |
Paul Walmsley | ded1138 | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 512 | .addr = omap2_timer10_addrs, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 513 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 514 | }; |
| 515 | |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 516 | /* timer10 hwmod */ |
| 517 | static struct omap_hwmod omap2420_timer10_hwmod = { |
| 518 | .name = "timer10", |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 519 | .mpu_irqs = omap2_timer10_mpu_irqs, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 520 | .main_clk = "gpt10_fck", |
| 521 | .prcm = { |
| 522 | .omap2 = { |
| 523 | .prcm_reg_id = 1, |
| 524 | .module_bit = OMAP24XX_EN_GPT10_SHIFT, |
| 525 | .module_offs = CORE_MOD, |
| 526 | .idlest_reg_id = 1, |
| 527 | .idlest_idle_bit = OMAP24XX_ST_GPT10_SHIFT, |
| 528 | }, |
| 529 | }, |
Tarun Kanti DebBarma | c345c8b | 2011-09-20 17:00:18 +0530 | [diff] [blame] | 530 | .dev_attr = &capability_pwm_dev_attr, |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 531 | .class = &omap2xxx_timer_hwmod_class, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 532 | }; |
| 533 | |
| 534 | /* timer11 */ |
| 535 | static struct omap_hwmod omap2420_timer11_hwmod; |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 536 | |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 537 | /* l4_core -> timer11 */ |
| 538 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = { |
| 539 | .master = &omap2420_l4_core_hwmod, |
| 540 | .slave = &omap2420_timer11_hwmod, |
| 541 | .clk = "gpt11_ick", |
Paul Walmsley | ded1138 | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 542 | .addr = omap2_timer11_addrs, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 543 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 544 | }; |
| 545 | |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 546 | /* timer11 hwmod */ |
| 547 | static struct omap_hwmod omap2420_timer11_hwmod = { |
| 548 | .name = "timer11", |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 549 | .mpu_irqs = omap2_timer11_mpu_irqs, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 550 | .main_clk = "gpt11_fck", |
| 551 | .prcm = { |
| 552 | .omap2 = { |
| 553 | .prcm_reg_id = 1, |
| 554 | .module_bit = OMAP24XX_EN_GPT11_SHIFT, |
| 555 | .module_offs = CORE_MOD, |
| 556 | .idlest_reg_id = 1, |
| 557 | .idlest_idle_bit = OMAP24XX_ST_GPT11_SHIFT, |
| 558 | }, |
| 559 | }, |
Tarun Kanti DebBarma | c345c8b | 2011-09-20 17:00:18 +0530 | [diff] [blame] | 560 | .dev_attr = &capability_pwm_dev_attr, |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 561 | .class = &omap2xxx_timer_hwmod_class, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 562 | }; |
| 563 | |
| 564 | /* timer12 */ |
| 565 | static struct omap_hwmod omap2420_timer12_hwmod; |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 566 | |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 567 | /* l4_core -> timer12 */ |
| 568 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = { |
| 569 | .master = &omap2420_l4_core_hwmod, |
| 570 | .slave = &omap2420_timer12_hwmod, |
| 571 | .clk = "gpt12_ick", |
Paul Walmsley | ded1138 | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 572 | .addr = omap2xxx_timer12_addrs, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 573 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 574 | }; |
| 575 | |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 576 | /* timer12 hwmod */ |
| 577 | static struct omap_hwmod omap2420_timer12_hwmod = { |
| 578 | .name = "timer12", |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 579 | .mpu_irqs = omap2xxx_timer12_mpu_irqs, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 580 | .main_clk = "gpt12_fck", |
| 581 | .prcm = { |
| 582 | .omap2 = { |
| 583 | .prcm_reg_id = 1, |
| 584 | .module_bit = OMAP24XX_EN_GPT12_SHIFT, |
| 585 | .module_offs = CORE_MOD, |
| 586 | .idlest_reg_id = 1, |
| 587 | .idlest_idle_bit = OMAP24XX_ST_GPT12_SHIFT, |
| 588 | }, |
| 589 | }, |
Tarun Kanti DebBarma | c345c8b | 2011-09-20 17:00:18 +0530 | [diff] [blame] | 590 | .dev_attr = &capability_pwm_dev_attr, |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 591 | .class = &omap2xxx_timer_hwmod_class, |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 592 | }; |
| 593 | |
Varadarajan, Charulatha | a714b9c | 2010-09-23 20:02:39 +0530 | [diff] [blame] | 594 | /* l4_wkup -> wd_timer2 */ |
| 595 | static struct omap_hwmod_addr_space omap2420_wd_timer2_addrs[] = { |
| 596 | { |
| 597 | .pa_start = 0x48022000, |
| 598 | .pa_end = 0x4802207f, |
| 599 | .flags = ADDR_TYPE_RT |
| 600 | }, |
Paul Walmsley | 78183f3 | 2011-07-09 19:14:05 -0600 | [diff] [blame] | 601 | { } |
Varadarajan, Charulatha | a714b9c | 2010-09-23 20:02:39 +0530 | [diff] [blame] | 602 | }; |
| 603 | |
| 604 | static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = { |
| 605 | .master = &omap2420_l4_wkup_hwmod, |
| 606 | .slave = &omap2420_wd_timer2_hwmod, |
| 607 | .clk = "mpu_wdt_ick", |
| 608 | .addr = omap2420_wd_timer2_addrs, |
Varadarajan, Charulatha | a714b9c | 2010-09-23 20:02:39 +0530 | [diff] [blame] | 609 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 610 | }; |
| 611 | |
Varadarajan, Charulatha | a714b9c | 2010-09-23 20:02:39 +0530 | [diff] [blame] | 612 | static struct omap_hwmod omap2420_wd_timer2_hwmod = { |
| 613 | .name = "wd_timer2", |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 614 | .class = &omap2xxx_wd_timer_hwmod_class, |
Varadarajan, Charulatha | a714b9c | 2010-09-23 20:02:39 +0530 | [diff] [blame] | 615 | .main_clk = "mpu_wdt_fck", |
| 616 | .prcm = { |
| 617 | .omap2 = { |
| 618 | .prcm_reg_id = 1, |
| 619 | .module_bit = OMAP24XX_EN_MPU_WDT_SHIFT, |
| 620 | .module_offs = WKUP_MOD, |
| 621 | .idlest_reg_id = 1, |
| 622 | .idlest_idle_bit = OMAP24XX_ST_MPU_WDT_SHIFT, |
| 623 | }, |
| 624 | }, |
Varadarajan, Charulatha | a714b9c | 2010-09-23 20:02:39 +0530 | [diff] [blame] | 625 | }; |
| 626 | |
Kevin Hilman | 046465b | 2010-09-27 20:19:30 +0530 | [diff] [blame] | 627 | /* UART1 */ |
| 628 | |
Kevin Hilman | 046465b | 2010-09-27 20:19:30 +0530 | [diff] [blame] | 629 | static struct omap_hwmod omap2420_uart1_hwmod = { |
| 630 | .name = "uart1", |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 631 | .mpu_irqs = omap2_uart1_mpu_irqs, |
Paul Walmsley | d826ebf | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 632 | .sdma_reqs = omap2_uart1_sdma_reqs, |
Kevin Hilman | 046465b | 2010-09-27 20:19:30 +0530 | [diff] [blame] | 633 | .main_clk = "uart1_fck", |
| 634 | .prcm = { |
| 635 | .omap2 = { |
| 636 | .module_offs = CORE_MOD, |
| 637 | .prcm_reg_id = 1, |
| 638 | .module_bit = OMAP24XX_EN_UART1_SHIFT, |
| 639 | .idlest_reg_id = 1, |
| 640 | .idlest_idle_bit = OMAP24XX_EN_UART1_SHIFT, |
| 641 | }, |
| 642 | }, |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 643 | .class = &omap2_uart_class, |
Kevin Hilman | 046465b | 2010-09-27 20:19:30 +0530 | [diff] [blame] | 644 | }; |
| 645 | |
| 646 | /* UART2 */ |
| 647 | |
Kevin Hilman | 046465b | 2010-09-27 20:19:30 +0530 | [diff] [blame] | 648 | static struct omap_hwmod omap2420_uart2_hwmod = { |
| 649 | .name = "uart2", |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 650 | .mpu_irqs = omap2_uart2_mpu_irqs, |
Paul Walmsley | d826ebf | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 651 | .sdma_reqs = omap2_uart2_sdma_reqs, |
Kevin Hilman | 046465b | 2010-09-27 20:19:30 +0530 | [diff] [blame] | 652 | .main_clk = "uart2_fck", |
| 653 | .prcm = { |
| 654 | .omap2 = { |
| 655 | .module_offs = CORE_MOD, |
| 656 | .prcm_reg_id = 1, |
| 657 | .module_bit = OMAP24XX_EN_UART2_SHIFT, |
| 658 | .idlest_reg_id = 1, |
| 659 | .idlest_idle_bit = OMAP24XX_EN_UART2_SHIFT, |
| 660 | }, |
| 661 | }, |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 662 | .class = &omap2_uart_class, |
Kevin Hilman | 046465b | 2010-09-27 20:19:30 +0530 | [diff] [blame] | 663 | }; |
| 664 | |
| 665 | /* UART3 */ |
| 666 | |
Kevin Hilman | 046465b | 2010-09-27 20:19:30 +0530 | [diff] [blame] | 667 | static struct omap_hwmod omap2420_uart3_hwmod = { |
| 668 | .name = "uart3", |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 669 | .mpu_irqs = omap2_uart3_mpu_irqs, |
Paul Walmsley | d826ebf | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 670 | .sdma_reqs = omap2_uart3_sdma_reqs, |
Kevin Hilman | 046465b | 2010-09-27 20:19:30 +0530 | [diff] [blame] | 671 | .main_clk = "uart3_fck", |
| 672 | .prcm = { |
| 673 | .omap2 = { |
| 674 | .module_offs = CORE_MOD, |
| 675 | .prcm_reg_id = 2, |
| 676 | .module_bit = OMAP24XX_EN_UART3_SHIFT, |
| 677 | .idlest_reg_id = 2, |
| 678 | .idlest_idle_bit = OMAP24XX_EN_UART3_SHIFT, |
| 679 | }, |
| 680 | }, |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 681 | .class = &omap2_uart_class, |
Kevin Hilman | 046465b | 2010-09-27 20:19:30 +0530 | [diff] [blame] | 682 | }; |
| 683 | |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 684 | /* dss */ |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 685 | |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 686 | /* l4_core -> dss */ |
| 687 | static struct omap_hwmod_ocp_if omap2420_l4_core__dss = { |
| 688 | .master = &omap2420_l4_core_hwmod, |
| 689 | .slave = &omap2420_dss_core_hwmod, |
| 690 | .clk = "dss_ick", |
Paul Walmsley | ded1138 | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 691 | .addr = omap2_dss_addrs, |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 692 | .fw = { |
| 693 | .omap2 = { |
| 694 | .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, |
| 695 | .flags = OMAP_FIREWALL_L4, |
| 696 | } |
| 697 | }, |
| 698 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 699 | }; |
| 700 | |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 701 | static struct omap_hwmod_opt_clk dss_opt_clks[] = { |
Tomi Valkeinen | 1258ea5 | 2011-11-08 03:16:09 -0700 | [diff] [blame] | 702 | /* |
| 703 | * The DSS HW needs all DSS clocks enabled during reset. The dss_core |
| 704 | * driver does not use these clocks. |
| 705 | */ |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 706 | { .role = "tv_clk", .clk = "dss_54m_fck" }, |
| 707 | { .role = "sys_clk", .clk = "dss2_fck" }, |
| 708 | }; |
| 709 | |
| 710 | static struct omap_hwmod omap2420_dss_core_hwmod = { |
| 711 | .name = "dss_core", |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 712 | .class = &omap2_dss_hwmod_class, |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 713 | .main_clk = "dss1_fck", /* instead of dss_fck */ |
Paul Walmsley | d826ebf | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 714 | .sdma_reqs = omap2xxx_dss_sdma_chs, |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 715 | .prcm = { |
| 716 | .omap2 = { |
| 717 | .prcm_reg_id = 1, |
| 718 | .module_bit = OMAP24XX_EN_DSS1_SHIFT, |
| 719 | .module_offs = CORE_MOD, |
| 720 | .idlest_reg_id = 1, |
| 721 | .idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT, |
| 722 | }, |
| 723 | }, |
| 724 | .opt_clks = dss_opt_clks, |
| 725 | .opt_clks_cnt = ARRAY_SIZE(dss_opt_clks), |
Tomi Valkeinen | 1258ea5 | 2011-11-08 03:16:09 -0700 | [diff] [blame] | 726 | .flags = HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET, |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 727 | }; |
| 728 | |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 729 | /* l4_core -> dss_dispc */ |
| 730 | static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { |
| 731 | .master = &omap2420_l4_core_hwmod, |
| 732 | .slave = &omap2420_dss_dispc_hwmod, |
| 733 | .clk = "dss_ick", |
Paul Walmsley | ded1138 | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 734 | .addr = omap2_dss_dispc_addrs, |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 735 | .fw = { |
| 736 | .omap2 = { |
| 737 | .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION, |
| 738 | .flags = OMAP_FIREWALL_L4, |
| 739 | } |
| 740 | }, |
| 741 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 742 | }; |
| 743 | |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 744 | static struct omap_hwmod omap2420_dss_dispc_hwmod = { |
| 745 | .name = "dss_dispc", |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 746 | .class = &omap2_dispc_hwmod_class, |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 747 | .mpu_irqs = omap2_dispc_irqs, |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 748 | .main_clk = "dss1_fck", |
| 749 | .prcm = { |
| 750 | .omap2 = { |
| 751 | .prcm_reg_id = 1, |
| 752 | .module_bit = OMAP24XX_EN_DSS1_SHIFT, |
| 753 | .module_offs = CORE_MOD, |
| 754 | .idlest_reg_id = 1, |
| 755 | .idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT, |
| 756 | }, |
| 757 | }, |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 758 | .flags = HWMOD_NO_IDLEST, |
Archit Taneja | b923d40 | 2011-10-06 18:04:08 -0600 | [diff] [blame] | 759 | .dev_attr = &omap2_3_dss_dispc_dev_attr |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 760 | }; |
| 761 | |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 762 | /* l4_core -> dss_rfbi */ |
| 763 | static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = { |
| 764 | .master = &omap2420_l4_core_hwmod, |
| 765 | .slave = &omap2420_dss_rfbi_hwmod, |
| 766 | .clk = "dss_ick", |
Paul Walmsley | ded1138 | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 767 | .addr = omap2_dss_rfbi_addrs, |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 768 | .fw = { |
| 769 | .omap2 = { |
| 770 | .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, |
| 771 | .flags = OMAP_FIREWALL_L4, |
| 772 | } |
| 773 | }, |
| 774 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 775 | }; |
| 776 | |
Tomi Valkeinen | b8ac10d | 2011-11-08 03:16:09 -0700 | [diff] [blame] | 777 | static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = { |
| 778 | { .role = "ick", .clk = "dss_ick" }, |
| 779 | }; |
| 780 | |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 781 | static struct omap_hwmod omap2420_dss_rfbi_hwmod = { |
| 782 | .name = "dss_rfbi", |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 783 | .class = &omap2_rfbi_hwmod_class, |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 784 | .main_clk = "dss1_fck", |
| 785 | .prcm = { |
| 786 | .omap2 = { |
| 787 | .prcm_reg_id = 1, |
| 788 | .module_bit = OMAP24XX_EN_DSS1_SHIFT, |
| 789 | .module_offs = CORE_MOD, |
| 790 | }, |
| 791 | }, |
Tomi Valkeinen | b8ac10d | 2011-11-08 03:16:09 -0700 | [diff] [blame] | 792 | .opt_clks = dss_rfbi_opt_clks, |
| 793 | .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks), |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 794 | .flags = HWMOD_NO_IDLEST, |
| 795 | }; |
| 796 | |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 797 | /* l4_core -> dss_venc */ |
| 798 | static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = { |
| 799 | .master = &omap2420_l4_core_hwmod, |
| 800 | .slave = &omap2420_dss_venc_hwmod, |
Tomi Valkeinen | b8ac10d | 2011-11-08 03:16:09 -0700 | [diff] [blame] | 801 | .clk = "dss_ick", |
Paul Walmsley | ded1138 | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 802 | .addr = omap2_dss_venc_addrs, |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 803 | .fw = { |
| 804 | .omap2 = { |
| 805 | .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_VENC_REGION, |
| 806 | .flags = OMAP_FIREWALL_L4, |
| 807 | } |
| 808 | }, |
| 809 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 810 | }; |
| 811 | |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 812 | static struct omap_hwmod omap2420_dss_venc_hwmod = { |
| 813 | .name = "dss_venc", |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 814 | .class = &omap2_venc_hwmod_class, |
Tomi Valkeinen | b8ac10d | 2011-11-08 03:16:09 -0700 | [diff] [blame] | 815 | .main_clk = "dss_54m_fck", |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 816 | .prcm = { |
| 817 | .omap2 = { |
| 818 | .prcm_reg_id = 1, |
| 819 | .module_bit = OMAP24XX_EN_DSS1_SHIFT, |
| 820 | .module_offs = CORE_MOD, |
| 821 | }, |
| 822 | }, |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 823 | .flags = HWMOD_NO_IDLEST, |
| 824 | }; |
| 825 | |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 826 | /* I2C common */ |
| 827 | static struct omap_hwmod_class_sysconfig i2c_sysc = { |
| 828 | .rev_offs = 0x00, |
| 829 | .sysc_offs = 0x20, |
| 830 | .syss_offs = 0x10, |
Avinash.H.M | d73d65f | 2011-03-03 14:22:46 -0700 | [diff] [blame] | 831 | .sysc_flags = (SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS), |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 832 | .sysc_fields = &omap_hwmod_sysc_type1, |
| 833 | }; |
| 834 | |
| 835 | static struct omap_hwmod_class i2c_class = { |
| 836 | .name = "i2c", |
| 837 | .sysc = &i2c_sysc, |
Andy Green | db791a7 | 2011-07-10 05:27:15 -0600 | [diff] [blame] | 838 | .rev = OMAP_I2C_IP_VERSION_1, |
Avinash.H.M | 6d3c55f | 2011-07-10 05:27:16 -0600 | [diff] [blame] | 839 | .reset = &omap_i2c_reset, |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 840 | }; |
| 841 | |
Andy Green | 4d4441a | 2011-07-10 05:27:16 -0600 | [diff] [blame] | 842 | static struct omap_i2c_dev_attr i2c_dev_attr = { |
| 843 | .flags = OMAP_I2C_FLAG_NO_FIFO | |
| 844 | OMAP_I2C_FLAG_SIMPLE_CLOCK | |
| 845 | OMAP_I2C_FLAG_16BIT_DATA_REG | |
| 846 | OMAP_I2C_FLAG_BUS_SHIFT_2, |
| 847 | }; |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 848 | |
| 849 | /* I2C1 */ |
| 850 | |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 851 | static struct omap_hwmod omap2420_i2c1_hwmod = { |
| 852 | .name = "i2c1", |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 853 | .mpu_irqs = omap2_i2c1_mpu_irqs, |
Paul Walmsley | d826ebf | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 854 | .sdma_reqs = omap2_i2c1_sdma_reqs, |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 855 | .main_clk = "i2c1_fck", |
| 856 | .prcm = { |
| 857 | .omap2 = { |
| 858 | .module_offs = CORE_MOD, |
| 859 | .prcm_reg_id = 1, |
| 860 | .module_bit = OMAP2420_EN_I2C1_SHIFT, |
| 861 | .idlest_reg_id = 1, |
| 862 | .idlest_idle_bit = OMAP2420_ST_I2C1_SHIFT, |
| 863 | }, |
| 864 | }, |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 865 | .class = &i2c_class, |
| 866 | .dev_attr = &i2c_dev_attr, |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 867 | .flags = HWMOD_16BIT_REG, |
| 868 | }; |
| 869 | |
| 870 | /* I2C2 */ |
| 871 | |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 872 | static struct omap_hwmod omap2420_i2c2_hwmod = { |
| 873 | .name = "i2c2", |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 874 | .mpu_irqs = omap2_i2c2_mpu_irqs, |
Paul Walmsley | d826ebf | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 875 | .sdma_reqs = omap2_i2c2_sdma_reqs, |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 876 | .main_clk = "i2c2_fck", |
| 877 | .prcm = { |
| 878 | .omap2 = { |
| 879 | .module_offs = CORE_MOD, |
| 880 | .prcm_reg_id = 1, |
| 881 | .module_bit = OMAP2420_EN_I2C2_SHIFT, |
| 882 | .idlest_reg_id = 1, |
| 883 | .idlest_idle_bit = OMAP2420_ST_I2C2_SHIFT, |
| 884 | }, |
| 885 | }, |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 886 | .class = &i2c_class, |
| 887 | .dev_attr = &i2c_dev_attr, |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 888 | .flags = HWMOD_16BIT_REG, |
| 889 | }; |
| 890 | |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 891 | /* l4_wkup -> gpio1 */ |
| 892 | static struct omap_hwmod_addr_space omap2420_gpio1_addr_space[] = { |
| 893 | { |
| 894 | .pa_start = 0x48018000, |
| 895 | .pa_end = 0x480181ff, |
| 896 | .flags = ADDR_TYPE_RT |
| 897 | }, |
Paul Walmsley | 78183f3 | 2011-07-09 19:14:05 -0600 | [diff] [blame] | 898 | { } |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 899 | }; |
| 900 | |
| 901 | static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio1 = { |
| 902 | .master = &omap2420_l4_wkup_hwmod, |
| 903 | .slave = &omap2420_gpio1_hwmod, |
| 904 | .clk = "gpios_ick", |
| 905 | .addr = omap2420_gpio1_addr_space, |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 906 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 907 | }; |
| 908 | |
| 909 | /* l4_wkup -> gpio2 */ |
| 910 | static struct omap_hwmod_addr_space omap2420_gpio2_addr_space[] = { |
| 911 | { |
| 912 | .pa_start = 0x4801a000, |
| 913 | .pa_end = 0x4801a1ff, |
| 914 | .flags = ADDR_TYPE_RT |
| 915 | }, |
Paul Walmsley | 78183f3 | 2011-07-09 19:14:05 -0600 | [diff] [blame] | 916 | { } |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 917 | }; |
| 918 | |
| 919 | static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio2 = { |
| 920 | .master = &omap2420_l4_wkup_hwmod, |
| 921 | .slave = &omap2420_gpio2_hwmod, |
| 922 | .clk = "gpios_ick", |
| 923 | .addr = omap2420_gpio2_addr_space, |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 924 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 925 | }; |
| 926 | |
| 927 | /* l4_wkup -> gpio3 */ |
| 928 | static struct omap_hwmod_addr_space omap2420_gpio3_addr_space[] = { |
| 929 | { |
| 930 | .pa_start = 0x4801c000, |
| 931 | .pa_end = 0x4801c1ff, |
| 932 | .flags = ADDR_TYPE_RT |
| 933 | }, |
Paul Walmsley | 78183f3 | 2011-07-09 19:14:05 -0600 | [diff] [blame] | 934 | { } |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 935 | }; |
| 936 | |
| 937 | static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio3 = { |
| 938 | .master = &omap2420_l4_wkup_hwmod, |
| 939 | .slave = &omap2420_gpio3_hwmod, |
| 940 | .clk = "gpios_ick", |
| 941 | .addr = omap2420_gpio3_addr_space, |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 942 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 943 | }; |
| 944 | |
| 945 | /* l4_wkup -> gpio4 */ |
| 946 | static struct omap_hwmod_addr_space omap2420_gpio4_addr_space[] = { |
| 947 | { |
| 948 | .pa_start = 0x4801e000, |
| 949 | .pa_end = 0x4801e1ff, |
| 950 | .flags = ADDR_TYPE_RT |
| 951 | }, |
Paul Walmsley | 78183f3 | 2011-07-09 19:14:05 -0600 | [diff] [blame] | 952 | { } |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 953 | }; |
| 954 | |
| 955 | static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio4 = { |
| 956 | .master = &omap2420_l4_wkup_hwmod, |
| 957 | .slave = &omap2420_gpio4_hwmod, |
| 958 | .clk = "gpios_ick", |
| 959 | .addr = omap2420_gpio4_addr_space, |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 960 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 961 | }; |
| 962 | |
| 963 | /* gpio dev_attr */ |
| 964 | static struct omap_gpio_dev_attr gpio_dev_attr = { |
| 965 | .bank_width = 32, |
| 966 | .dbck_flag = false, |
| 967 | }; |
| 968 | |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 969 | /* gpio1 */ |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 970 | static struct omap_hwmod omap2420_gpio1_hwmod = { |
| 971 | .name = "gpio1", |
Avinash.H.M | f95440c | 2011-04-05 21:10:15 +0530 | [diff] [blame] | 972 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 973 | .mpu_irqs = omap2_gpio1_irqs, |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 974 | .main_clk = "gpios_fck", |
| 975 | .prcm = { |
| 976 | .omap2 = { |
| 977 | .prcm_reg_id = 1, |
| 978 | .module_bit = OMAP24XX_EN_GPIOS_SHIFT, |
| 979 | .module_offs = WKUP_MOD, |
| 980 | .idlest_reg_id = 1, |
| 981 | .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT, |
| 982 | }, |
| 983 | }, |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 984 | .class = &omap2xxx_gpio_hwmod_class, |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 985 | .dev_attr = &gpio_dev_attr, |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 986 | }; |
| 987 | |
| 988 | /* gpio2 */ |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 989 | static struct omap_hwmod omap2420_gpio2_hwmod = { |
| 990 | .name = "gpio2", |
Avinash.H.M | f95440c | 2011-04-05 21:10:15 +0530 | [diff] [blame] | 991 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 992 | .mpu_irqs = omap2_gpio2_irqs, |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 993 | .main_clk = "gpios_fck", |
| 994 | .prcm = { |
| 995 | .omap2 = { |
| 996 | .prcm_reg_id = 1, |
| 997 | .module_bit = OMAP24XX_EN_GPIOS_SHIFT, |
| 998 | .module_offs = WKUP_MOD, |
| 999 | .idlest_reg_id = 1, |
| 1000 | .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT, |
| 1001 | }, |
| 1002 | }, |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 1003 | .class = &omap2xxx_gpio_hwmod_class, |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 1004 | .dev_attr = &gpio_dev_attr, |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 1005 | }; |
| 1006 | |
| 1007 | /* gpio3 */ |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 1008 | static struct omap_hwmod omap2420_gpio3_hwmod = { |
| 1009 | .name = "gpio3", |
Avinash.H.M | f95440c | 2011-04-05 21:10:15 +0530 | [diff] [blame] | 1010 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 1011 | .mpu_irqs = omap2_gpio3_irqs, |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 1012 | .main_clk = "gpios_fck", |
| 1013 | .prcm = { |
| 1014 | .omap2 = { |
| 1015 | .prcm_reg_id = 1, |
| 1016 | .module_bit = OMAP24XX_EN_GPIOS_SHIFT, |
| 1017 | .module_offs = WKUP_MOD, |
| 1018 | .idlest_reg_id = 1, |
| 1019 | .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT, |
| 1020 | }, |
| 1021 | }, |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 1022 | .class = &omap2xxx_gpio_hwmod_class, |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 1023 | .dev_attr = &gpio_dev_attr, |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 1024 | }; |
| 1025 | |
| 1026 | /* gpio4 */ |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 1027 | static struct omap_hwmod omap2420_gpio4_hwmod = { |
| 1028 | .name = "gpio4", |
Avinash.H.M | f95440c | 2011-04-05 21:10:15 +0530 | [diff] [blame] | 1029 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 1030 | .mpu_irqs = omap2_gpio4_irqs, |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 1031 | .main_clk = "gpios_fck", |
| 1032 | .prcm = { |
| 1033 | .omap2 = { |
| 1034 | .prcm_reg_id = 1, |
| 1035 | .module_bit = OMAP24XX_EN_GPIOS_SHIFT, |
| 1036 | .module_offs = WKUP_MOD, |
| 1037 | .idlest_reg_id = 1, |
| 1038 | .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT, |
| 1039 | }, |
| 1040 | }, |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 1041 | .class = &omap2xxx_gpio_hwmod_class, |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 1042 | .dev_attr = &gpio_dev_attr, |
Varadarajan, Charulatha | 59c348c | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 1043 | }; |
| 1044 | |
G, Manjunath Kondaiah | 745685df9 | 2010-12-20 18:27:18 -0800 | [diff] [blame] | 1045 | /* dma attributes */ |
| 1046 | static struct omap_dma_dev_attr dma_dev_attr = { |
| 1047 | .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | |
| 1048 | IS_CSSA_32 | IS_CDSA_32, |
| 1049 | .lch_count = 32, |
| 1050 | }; |
| 1051 | |
G, Manjunath Kondaiah | 745685df9 | 2010-12-20 18:27:18 -0800 | [diff] [blame] | 1052 | /* dma_system -> L3 */ |
| 1053 | static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = { |
| 1054 | .master = &omap2420_dma_system_hwmod, |
| 1055 | .slave = &omap2420_l3_main_hwmod, |
| 1056 | .clk = "core_l3_ck", |
| 1057 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 1058 | }; |
| 1059 | |
G, Manjunath Kondaiah | 745685df9 | 2010-12-20 18:27:18 -0800 | [diff] [blame] | 1060 | /* l4_core -> dma_system */ |
| 1061 | static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = { |
| 1062 | .master = &omap2420_l4_core_hwmod, |
| 1063 | .slave = &omap2420_dma_system_hwmod, |
| 1064 | .clk = "sdma_ick", |
Paul Walmsley | ded1138 | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 1065 | .addr = omap2_dma_system_addrs, |
G, Manjunath Kondaiah | 745685df9 | 2010-12-20 18:27:18 -0800 | [diff] [blame] | 1066 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 1067 | }; |
| 1068 | |
G, Manjunath Kondaiah | 745685df9 | 2010-12-20 18:27:18 -0800 | [diff] [blame] | 1069 | static struct omap_hwmod omap2420_dma_system_hwmod = { |
| 1070 | .name = "dma", |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 1071 | .class = &omap2xxx_dma_hwmod_class, |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 1072 | .mpu_irqs = omap2_dma_system_irqs, |
G, Manjunath Kondaiah | 745685df9 | 2010-12-20 18:27:18 -0800 | [diff] [blame] | 1073 | .main_clk = "core_l3_ck", |
G, Manjunath Kondaiah | 745685df9 | 2010-12-20 18:27:18 -0800 | [diff] [blame] | 1074 | .dev_attr = &dma_dev_attr, |
G, Manjunath Kondaiah | 745685df9 | 2010-12-20 18:27:18 -0800 | [diff] [blame] | 1075 | .flags = HWMOD_NO_IDLEST, |
| 1076 | }; |
| 1077 | |
Omar Ramirez Luna | fca1ab5 | 2011-02-24 12:51:32 -0800 | [diff] [blame] | 1078 | /* mailbox */ |
| 1079 | static struct omap_hwmod omap2420_mailbox_hwmod; |
| 1080 | static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = { |
| 1081 | { .name = "dsp", .irq = 26 }, |
| 1082 | { .name = "iva", .irq = 34 }, |
Paul Walmsley | 212738a | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 1083 | { .irq = -1 } |
Omar Ramirez Luna | fca1ab5 | 2011-02-24 12:51:32 -0800 | [diff] [blame] | 1084 | }; |
| 1085 | |
Omar Ramirez Luna | fca1ab5 | 2011-02-24 12:51:32 -0800 | [diff] [blame] | 1086 | /* l4_core -> mailbox */ |
| 1087 | static struct omap_hwmod_ocp_if omap2420_l4_core__mailbox = { |
| 1088 | .master = &omap2420_l4_core_hwmod, |
| 1089 | .slave = &omap2420_mailbox_hwmod, |
Paul Walmsley | ded1138 | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 1090 | .addr = omap2_mailbox_addrs, |
Omar Ramirez Luna | fca1ab5 | 2011-02-24 12:51:32 -0800 | [diff] [blame] | 1091 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 1092 | }; |
| 1093 | |
Omar Ramirez Luna | fca1ab5 | 2011-02-24 12:51:32 -0800 | [diff] [blame] | 1094 | static struct omap_hwmod omap2420_mailbox_hwmod = { |
| 1095 | .name = "mailbox", |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 1096 | .class = &omap2xxx_mailbox_hwmod_class, |
Omar Ramirez Luna | fca1ab5 | 2011-02-24 12:51:32 -0800 | [diff] [blame] | 1097 | .mpu_irqs = omap2420_mailbox_irqs, |
Omar Ramirez Luna | fca1ab5 | 2011-02-24 12:51:32 -0800 | [diff] [blame] | 1098 | .main_clk = "mailboxes_ick", |
| 1099 | .prcm = { |
| 1100 | .omap2 = { |
| 1101 | .prcm_reg_id = 1, |
| 1102 | .module_bit = OMAP24XX_EN_MAILBOXES_SHIFT, |
| 1103 | .module_offs = CORE_MOD, |
| 1104 | .idlest_reg_id = 1, |
| 1105 | .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT, |
| 1106 | }, |
| 1107 | }, |
Omar Ramirez Luna | fca1ab5 | 2011-02-24 12:51:32 -0800 | [diff] [blame] | 1108 | }; |
| 1109 | |
Charulatha V | 617871d | 2011-02-17 09:53:09 -0800 | [diff] [blame] | 1110 | /* mcspi1 */ |
Charulatha V | 617871d | 2011-02-17 09:53:09 -0800 | [diff] [blame] | 1111 | static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { |
| 1112 | .num_chipselect = 4, |
| 1113 | }; |
| 1114 | |
| 1115 | static struct omap_hwmod omap2420_mcspi1_hwmod = { |
Paul Walmsley | bec9381 | 2012-04-19 04:03:50 -0600 | [diff] [blame] | 1116 | .name = "mcspi1", |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 1117 | .mpu_irqs = omap2_mcspi1_mpu_irqs, |
Paul Walmsley | d826ebf | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 1118 | .sdma_reqs = omap2_mcspi1_sdma_reqs, |
Charulatha V | 617871d | 2011-02-17 09:53:09 -0800 | [diff] [blame] | 1119 | .main_clk = "mcspi1_fck", |
| 1120 | .prcm = { |
| 1121 | .omap2 = { |
| 1122 | .module_offs = CORE_MOD, |
| 1123 | .prcm_reg_id = 1, |
| 1124 | .module_bit = OMAP24XX_EN_MCSPI1_SHIFT, |
| 1125 | .idlest_reg_id = 1, |
| 1126 | .idlest_idle_bit = OMAP24XX_ST_MCSPI1_SHIFT, |
| 1127 | }, |
| 1128 | }, |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 1129 | .class = &omap2xxx_mcspi_class, |
| 1130 | .dev_attr = &omap_mcspi1_dev_attr, |
Charulatha V | 617871d | 2011-02-17 09:53:09 -0800 | [diff] [blame] | 1131 | }; |
| 1132 | |
| 1133 | /* mcspi2 */ |
Charulatha V | 617871d | 2011-02-17 09:53:09 -0800 | [diff] [blame] | 1134 | static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { |
| 1135 | .num_chipselect = 2, |
| 1136 | }; |
| 1137 | |
| 1138 | static struct omap_hwmod omap2420_mcspi2_hwmod = { |
Paul Walmsley | bec9381 | 2012-04-19 04:03:50 -0600 | [diff] [blame] | 1139 | .name = "mcspi2", |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 1140 | .mpu_irqs = omap2_mcspi2_mpu_irqs, |
Paul Walmsley | d826ebf | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 1141 | .sdma_reqs = omap2_mcspi2_sdma_reqs, |
Charulatha V | 617871d | 2011-02-17 09:53:09 -0800 | [diff] [blame] | 1142 | .main_clk = "mcspi2_fck", |
| 1143 | .prcm = { |
| 1144 | .omap2 = { |
| 1145 | .module_offs = CORE_MOD, |
| 1146 | .prcm_reg_id = 1, |
| 1147 | .module_bit = OMAP24XX_EN_MCSPI2_SHIFT, |
| 1148 | .idlest_reg_id = 1, |
| 1149 | .idlest_idle_bit = OMAP24XX_ST_MCSPI2_SHIFT, |
| 1150 | }, |
| 1151 | }, |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 1152 | .class = &omap2xxx_mcspi_class, |
| 1153 | .dev_attr = &omap_mcspi2_dev_attr, |
Charulatha V | 617871d | 2011-02-17 09:53:09 -0800 | [diff] [blame] | 1154 | }; |
| 1155 | |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 1156 | /* |
| 1157 | * 'mcbsp' class |
| 1158 | * multi channel buffered serial port controller |
| 1159 | */ |
| 1160 | |
| 1161 | static struct omap_hwmod_class omap2420_mcbsp_hwmod_class = { |
| 1162 | .name = "mcbsp", |
| 1163 | }; |
| 1164 | |
| 1165 | /* mcbsp1 */ |
| 1166 | static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { |
| 1167 | { .name = "tx", .irq = 59 }, |
| 1168 | { .name = "rx", .irq = 60 }, |
Paul Walmsley | 212738a | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 1169 | { .irq = -1 } |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 1170 | }; |
| 1171 | |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 1172 | /* l4_core -> mcbsp1 */ |
| 1173 | static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = { |
| 1174 | .master = &omap2420_l4_core_hwmod, |
| 1175 | .slave = &omap2420_mcbsp1_hwmod, |
| 1176 | .clk = "mcbsp1_ick", |
Paul Walmsley | ded1138 | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 1177 | .addr = omap2_mcbsp1_addrs, |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 1178 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 1179 | }; |
| 1180 | |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 1181 | static struct omap_hwmod omap2420_mcbsp1_hwmod = { |
| 1182 | .name = "mcbsp1", |
| 1183 | .class = &omap2420_mcbsp_hwmod_class, |
| 1184 | .mpu_irqs = omap2420_mcbsp1_irqs, |
Paul Walmsley | d826ebf | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 1185 | .sdma_reqs = omap2_mcbsp1_sdma_reqs, |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 1186 | .main_clk = "mcbsp1_fck", |
| 1187 | .prcm = { |
| 1188 | .omap2 = { |
| 1189 | .prcm_reg_id = 1, |
| 1190 | .module_bit = OMAP24XX_EN_MCBSP1_SHIFT, |
| 1191 | .module_offs = CORE_MOD, |
| 1192 | .idlest_reg_id = 1, |
| 1193 | .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT, |
| 1194 | }, |
| 1195 | }, |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 1196 | }; |
| 1197 | |
| 1198 | /* mcbsp2 */ |
| 1199 | static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = { |
| 1200 | { .name = "tx", .irq = 62 }, |
| 1201 | { .name = "rx", .irq = 63 }, |
Paul Walmsley | 212738a | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 1202 | { .irq = -1 } |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 1203 | }; |
| 1204 | |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 1205 | /* l4_core -> mcbsp2 */ |
| 1206 | static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = { |
| 1207 | .master = &omap2420_l4_core_hwmod, |
| 1208 | .slave = &omap2420_mcbsp2_hwmod, |
| 1209 | .clk = "mcbsp2_ick", |
Paul Walmsley | ded1138 | 2011-07-09 19:14:06 -0600 | [diff] [blame] | 1210 | .addr = omap2xxx_mcbsp2_addrs, |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 1211 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 1212 | }; |
| 1213 | |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 1214 | static struct omap_hwmod omap2420_mcbsp2_hwmod = { |
| 1215 | .name = "mcbsp2", |
| 1216 | .class = &omap2420_mcbsp_hwmod_class, |
| 1217 | .mpu_irqs = omap2420_mcbsp2_irqs, |
Paul Walmsley | d826ebf | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 1218 | .sdma_reqs = omap2_mcbsp2_sdma_reqs, |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 1219 | .main_clk = "mcbsp2_fck", |
| 1220 | .prcm = { |
| 1221 | .omap2 = { |
| 1222 | .prcm_reg_id = 1, |
| 1223 | .module_bit = OMAP24XX_EN_MCBSP2_SHIFT, |
| 1224 | .module_offs = CORE_MOD, |
| 1225 | .idlest_reg_id = 1, |
| 1226 | .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT, |
| 1227 | }, |
| 1228 | }, |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 1229 | }; |
| 1230 | |
Paul Walmsley | 0a78c5c | 2012-04-19 04:04:31 -0600 | [diff] [blame^] | 1231 | static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = { |
| 1232 | &omap2420_l3_main__l4_core, |
| 1233 | &omap2420_mpu__l3_main, |
| 1234 | &omap2420_dss__l3, |
| 1235 | &omap2420_l4_core__mcspi1, |
| 1236 | &omap2420_l4_core__mcspi2, |
| 1237 | &omap2420_l4_core__l4_wkup, |
| 1238 | &omap2_l4_core__uart1, |
| 1239 | &omap2_l4_core__uart2, |
| 1240 | &omap2_l4_core__uart3, |
| 1241 | &omap2420_l4_core__i2c1, |
| 1242 | &omap2420_l4_core__i2c2, |
| 1243 | &omap2420_l3__iva, |
| 1244 | &omap2420_l4_wkup__timer1, |
| 1245 | &omap2420_l4_core__timer2, |
| 1246 | &omap2420_l4_core__timer3, |
| 1247 | &omap2420_l4_core__timer4, |
| 1248 | &omap2420_l4_core__timer5, |
| 1249 | &omap2420_l4_core__timer6, |
| 1250 | &omap2420_l4_core__timer7, |
| 1251 | &omap2420_l4_core__timer8, |
| 1252 | &omap2420_l4_core__timer9, |
| 1253 | &omap2420_l4_core__timer10, |
| 1254 | &omap2420_l4_core__timer11, |
| 1255 | &omap2420_l4_core__timer12, |
| 1256 | &omap2420_l4_wkup__wd_timer2, |
| 1257 | &omap2420_l4_core__dss, |
| 1258 | &omap2420_l4_core__dss_dispc, |
| 1259 | &omap2420_l4_core__dss_rfbi, |
| 1260 | &omap2420_l4_core__dss_venc, |
| 1261 | &omap2420_l4_wkup__gpio1, |
| 1262 | &omap2420_l4_wkup__gpio2, |
| 1263 | &omap2420_l4_wkup__gpio3, |
| 1264 | &omap2420_l4_wkup__gpio4, |
| 1265 | &omap2420_dma_system__l3, |
| 1266 | &omap2420_l4_core__dma_system, |
| 1267 | &omap2420_l4_core__mailbox, |
| 1268 | &omap2420_l4_core__mcbsp1, |
| 1269 | &omap2420_l4_core__mcbsp2, |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 1270 | NULL, |
| 1271 | }; |
| 1272 | |
Paul Walmsley | 7359154 | 2010-02-22 22:09:32 -0700 | [diff] [blame] | 1273 | int __init omap2420_hwmod_init(void) |
| 1274 | { |
Paul Walmsley | 0a78c5c | 2012-04-19 04:04:31 -0600 | [diff] [blame^] | 1275 | return omap_hwmod_register_links(omap2420_hwmod_ocp_ifs); |
Paul Walmsley | 7359154 | 2010-02-22 22:09:32 -0700 | [diff] [blame] | 1276 | } |