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Mark Browne1a3c742011-05-06 09:45:13 +09001/* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
2 *
3 * Copyright 2011 Wolfson Microelectronics plc
4 * Mark Brown <broonie@opensource.wolfsonmicro.com>
5 *
6 * Copyright 2011 Simtec Electronics
7 * Ben Dooks <ben@simtec.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/kernel.h>
15#include <linux/list.h>
16#include <linux/serial_core.h>
17#include <linux/platform_device.h>
18#include <linux/fb.h>
19#include <linux/io.h>
20#include <linux/init.h>
21#include <linux/gpio.h>
Mark Brown66211f92011-12-29 18:05:29 +090022#include <linux/leds.h>
Mark Browne1a3c742011-05-06 09:45:13 +090023#include <linux/delay.h>
Mark Brownfb7f60f2011-12-30 13:44:31 +090024#include <linux/mmc/host.h>
Mark Browne1a3c742011-05-06 09:45:13 +090025#include <linux/regulator/machine.h>
Mark Brownae24c262011-06-22 13:08:13 +090026#include <linux/regulator/fixed.h>
Mark Browne1a3c742011-05-06 09:45:13 +090027#include <linux/pwm_backlight.h>
28#include <linux/dm9000.h>
29#include <linux/gpio_keys.h>
30#include <linux/basic_mmio_gpio.h>
31#include <linux/spi/spi.h>
32
Vivien Didelot58774572013-08-29 15:24:14 -040033#include <linux/platform_data/pca953x.h>
Lukasz Majewski126625e2012-05-09 13:16:53 +020034#include <linux/platform_data/s3c-hsotg.h>
Mark Browne1a3c742011-05-06 09:45:13 +090035
36#include <video/platform_lcd.h>
37
38#include <linux/mfd/wm831x/core.h>
39#include <linux/mfd/wm831x/pdata.h>
Mark Brownae24c262011-06-22 13:08:13 +090040#include <linux/mfd/wm831x/irq.h>
Mark Browne1a3c742011-05-06 09:45:13 +090041#include <linux/mfd/wm831x/gpio.h>
42
Mark Brown8504a3c2011-12-02 14:29:07 +090043#include <sound/wm1250-ev1.h>
44
Mark Browne1a3c742011-05-06 09:45:13 +090045#include <asm/mach/arch.h>
46#include <asm/mach-types.h>
47
Leela Krishna Amudala5a213a52012-08-08 09:44:49 +090048#include <video/samsung_fimd.h>
Mark Browne1a3c742011-05-06 09:45:13 +090049#include <mach/hardware.h>
50#include <mach/map.h>
51
Mark Browne1a3c742011-05-06 09:45:13 +090052#include <mach/regs-gpio.h>
Mark Browne1a3c742011-05-06 09:45:13 +090053
54#include <plat/regs-serial.h>
Mark Browne1a3c742011-05-06 09:45:13 +090055#include <plat/fb.h>
56#include <plat/sdhci.h>
57#include <plat/gpio-cfg.h>
Arnd Bergmann436d42c2012-08-24 15:22:12 +020058#include <linux/platform_data/spi-s3c64xx.h>
Mark Browne1a3c742011-05-06 09:45:13 +090059
60#include <plat/keypad.h>
61#include <plat/clock.h>
62#include <plat/devs.h>
63#include <plat/cpu.h>
64#include <plat/adc.h>
Arnd Bergmann436d42c2012-08-24 15:22:12 +020065#include <linux/platform_data/i2c-s3c2410.h>
Mark Browne1a3c742011-05-06 09:45:13 +090066#include <plat/pm.h>
Romain Naour04a49b72013-01-09 18:47:04 -080067#include <plat/samsung-time.h>
Mark Browne1a3c742011-05-06 09:45:13 +090068
Kukjin Kimb024043b2011-12-22 23:27:42 +010069#include "common.h"
Kukjin Kime6235922013-01-02 11:18:31 -080070#include "crag6410.h"
Kukjin Kim8bb86ea2013-01-02 13:20:38 -080071#include "regs-gpio-memport.h"
Kukjin Kima81c1972013-01-02 13:24:12 -080072#include "regs-modem.h"
Kukjin Kimf2bfd172013-01-02 13:31:15 -080073#include "regs-sys.h"
Kukjin Kimb024043b2011-12-22 23:27:42 +010074
Mark Browne1a3c742011-05-06 09:45:13 +090075/* serial port setup */
76
77#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
78#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
79#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
80
81static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
82 [0] = {
Mark Brownae24c262011-06-22 13:08:13 +090083 .hwport = 0,
84 .flags = 0,
85 .ucon = UCON,
86 .ulcon = ULCON,
87 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +090088 },
89 [1] = {
Mark Brownae24c262011-06-22 13:08:13 +090090 .hwport = 1,
91 .flags = 0,
92 .ucon = UCON,
93 .ulcon = ULCON,
94 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +090095 },
96 [2] = {
Mark Brownae24c262011-06-22 13:08:13 +090097 .hwport = 2,
98 .flags = 0,
99 .ucon = UCON,
100 .ulcon = ULCON,
101 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +0900102 },
103 [3] = {
Mark Brownae24c262011-06-22 13:08:13 +0900104 .hwport = 3,
105 .flags = 0,
106 .ucon = UCON,
107 .ulcon = ULCON,
108 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +0900109 },
110};
111
112static struct platform_pwm_backlight_data crag6410_backlight_data = {
113 .pwm_id = 0,
114 .max_brightness = 1000,
115 .dft_brightness = 600,
116 .pwm_period_ns = 100000, /* about 1kHz */
117};
118
119static struct platform_device crag6410_backlight_device = {
120 .name = "pwm-backlight",
121 .id = -1,
122 .dev = {
Tomasz Figa7fa33bd2013-03-09 15:37:53 +0100123 .parent = &samsung_device_pwm.dev,
Mark Browne1a3c742011-05-06 09:45:13 +0900124 .platform_data = &crag6410_backlight_data,
125 },
126};
127
128static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
129{
130 pr_debug("%s: setting power %d\n", __func__, power);
131
132 if (power) {
133 gpio_set_value(S3C64XX_GPB(0), 1);
134 msleep(1);
135 s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
136 } else {
137 gpio_direction_output(S3C64XX_GPF(14), 0);
138 gpio_set_value(S3C64XX_GPB(0), 0);
139 }
140}
141
142static struct platform_device crag6410_lcd_powerdev = {
143 .name = "platform-lcd",
144 .id = -1,
145 .dev.parent = &s3c_device_fb.dev,
146 .dev.platform_data = &(struct plat_lcd_data) {
147 .set_power = crag6410_lcd_power_set,
148 },
149};
150
151/* 640x480 URT */
152static struct s3c_fb_pd_win crag6410_fb_win0 = {
Mark Browne1a3c742011-05-06 09:45:13 +0900153 .max_bpp = 32,
154 .default_bpp = 16,
Thomas Abraham79d3c412012-03-24 21:58:48 +0530155 .xres = 640,
156 .yres = 480,
Mark Browne1a3c742011-05-06 09:45:13 +0900157 .virtual_y = 480 * 2,
158 .virtual_x = 640,
159};
160
Thomas Abraham79d3c412012-03-24 21:58:48 +0530161static struct fb_videomode crag6410_lcd_timing = {
162 .left_margin = 150,
163 .right_margin = 80,
164 .upper_margin = 40,
165 .lower_margin = 5,
166 .hsync_len = 40,
167 .vsync_len = 5,
168 .xres = 640,
169 .yres = 480,
170};
171
Mark Browne1a3c742011-05-06 09:45:13 +0900172/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800173static struct s3c_fb_platdata crag6410_lcd_pdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900174 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
Thomas Abraham79d3c412012-03-24 21:58:48 +0530175 .vtiming = &crag6410_lcd_timing,
Mark Browne1a3c742011-05-06 09:45:13 +0900176 .win[0] = &crag6410_fb_win0,
177 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
178 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
179};
180
181/* 2x6 keypad */
182
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800183static uint32_t crag6410_keymap[] = {
Mark Browne1a3c742011-05-06 09:45:13 +0900184 /* KEY(row, col, keycode) */
185 KEY(0, 0, KEY_VOLUMEUP),
186 KEY(0, 1, KEY_HOME),
187 KEY(0, 2, KEY_VOLUMEDOWN),
188 KEY(0, 3, KEY_HELP),
189 KEY(0, 4, KEY_MENU),
190 KEY(0, 5, KEY_MEDIA),
191 KEY(1, 0, 232),
192 KEY(1, 1, KEY_DOWN),
193 KEY(1, 2, KEY_LEFT),
194 KEY(1, 3, KEY_UP),
195 KEY(1, 4, KEY_RIGHT),
196 KEY(1, 5, KEY_CAMERA),
197};
198
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800199static struct matrix_keymap_data crag6410_keymap_data = {
Mark Browne1a3c742011-05-06 09:45:13 +0900200 .keymap = crag6410_keymap,
201 .keymap_size = ARRAY_SIZE(crag6410_keymap),
202};
203
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800204static struct samsung_keypad_platdata crag6410_keypad_data = {
Mark Browne1a3c742011-05-06 09:45:13 +0900205 .keymap_data = &crag6410_keymap_data,
206 .rows = 2,
207 .cols = 6,
208};
209
210static struct gpio_keys_button crag6410_gpio_keys[] = {
211 [0] = {
212 .code = KEY_SUSPEND,
213 .gpio = S3C64XX_GPL(10), /* EINT 18 */
Mark Brownae24c262011-06-22 13:08:13 +0900214 .type = EV_KEY,
Mark Browne1a3c742011-05-06 09:45:13 +0900215 .wakeup = 1,
216 .active_low = 1,
217 },
Mark Brownae24c262011-06-22 13:08:13 +0900218 [1] = {
219 .code = SW_FRONT_PROXIMITY,
220 .gpio = S3C64XX_GPN(11), /* EINT 11 */
221 .type = EV_SW,
222 },
Mark Browne1a3c742011-05-06 09:45:13 +0900223};
224
225static struct gpio_keys_platform_data crag6410_gpio_keydata = {
226 .buttons = crag6410_gpio_keys,
227 .nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
228};
229
230static struct platform_device crag6410_gpio_keydev = {
231 .name = "gpio-keys",
232 .id = 0,
233 .dev.platform_data = &crag6410_gpio_keydata,
234};
235
236static struct resource crag6410_dm9k_resource[] = {
Tushar Behera8ebf1482012-05-12 16:12:26 +0900237 [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5, 2),
238 [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5 + (1 << 8), 2),
239 [2] = DEFINE_RES_NAMED(S3C_EINT(17), 1, NULL, IORESOURCE_IRQ \
240 | IORESOURCE_IRQ_HIGHLEVEL),
Mark Browne1a3c742011-05-06 09:45:13 +0900241};
242
243static struct dm9000_plat_data mini6410_dm9k_pdata = {
244 .flags = DM9000_PLATF_16BITONLY,
245};
246
247static struct platform_device crag6410_dm9k_device = {
248 .name = "dm9000",
249 .id = -1,
250 .num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
251 .resource = crag6410_dm9k_resource,
252 .dev.platform_data = &mini6410_dm9k_pdata,
253};
254
255static struct resource crag6410_mmgpio_resource[] = {
Tushar Behera8ebf1482012-05-12 16:12:26 +0900256 [0] = DEFINE_RES_MEM_NAMED(S3C64XX_PA_XM0CSN4, 1, "dat"),
Mark Browne1a3c742011-05-06 09:45:13 +0900257};
258
259static struct platform_device crag6410_mmgpio = {
260 .name = "basic-mmio-gpio",
261 .id = -1,
262 .resource = crag6410_mmgpio_resource,
263 .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
264 .dev.platform_data = &(struct bgpio_pdata) {
Mark Brown91b60b12011-12-29 18:02:39 +0900265 .base = MMGPIO_GPIO_BASE,
Mark Browne1a3c742011-05-06 09:45:13 +0900266 },
267};
268
Mark Brownae24c262011-06-22 13:08:13 +0900269static struct platform_device speyside_device = {
270 .name = "speyside",
271 .id = -1,
272};
273
Mark Brown8c051ab2011-09-05 14:50:02 +0900274static struct platform_device lowland_device = {
275 .name = "lowland",
276 .id = -1,
277};
278
Mark Brown64142612011-11-30 13:30:27 +0000279static struct platform_device tobermory_device = {
280 .name = "tobermory",
Mark Brownae24c262011-06-22 13:08:13 +0900281 .id = -1,
282};
283
Mark Brownc5c32c92011-12-02 14:32:32 +0900284static struct platform_device littlemill_device = {
285 .name = "littlemill",
286 .id = -1,
287};
288
Mark Brown33229142012-11-28 07:30:18 +0900289static struct platform_device bells_wm2200_device = {
Mark Brown25752b72012-08-10 13:03:18 +0900290 .name = "bells",
291 .id = 0,
292};
293
Mark Brown33229142012-11-28 07:30:18 +0900294static struct platform_device bells_wm5102_device = {
Mark Brown25752b72012-08-10 13:03:18 +0900295 .name = "bells",
296 .id = 1,
297};
298
Mark Brown33229142012-11-28 07:30:18 +0900299static struct platform_device bells_wm5110_device = {
300 .name = "bells",
301 .id = 2,
302};
303
Mark Brownae24c262011-06-22 13:08:13 +0900304static struct regulator_consumer_supply wallvdd_consumers[] = {
Mark Brown554f01f2012-01-27 14:58:46 +0900305 REGULATOR_SUPPLY("SPKVDD", "1-001a"),
Mark Brownae24c262011-06-22 13:08:13 +0900306 REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
307 REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
Mark Brown4ed12b52011-08-31 08:03:11 +0900308 REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
309 REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
Mark Brown402f624b2012-04-04 09:21:15 -0700310
Mark Brown479535e2012-10-17 17:41:07 +0900311 REGULATOR_SUPPLY("SPKVDDL", "spi0.1"),
312 REGULATOR_SUPPLY("SPKVDDR", "spi0.1"),
313 REGULATOR_SUPPLY("SPKVDDL", "wm5102-codec"),
314 REGULATOR_SUPPLY("SPKVDDR", "wm5102-codec"),
315 REGULATOR_SUPPLY("SPKVDDL", "wm5110-codec"),
316 REGULATOR_SUPPLY("SPKVDDR", "wm5110-codec"),
317
Mark Brown402f624b2012-04-04 09:21:15 -0700318 REGULATOR_SUPPLY("DC1VDD", "0-0034"),
319 REGULATOR_SUPPLY("DC2VDD", "0-0034"),
320 REGULATOR_SUPPLY("DC3VDD", "0-0034"),
321 REGULATOR_SUPPLY("LDO1VDD", "0-0034"),
322 REGULATOR_SUPPLY("LDO2VDD", "0-0034"),
323 REGULATOR_SUPPLY("LDO4VDD", "0-0034"),
324 REGULATOR_SUPPLY("LDO5VDD", "0-0034"),
325 REGULATOR_SUPPLY("LDO6VDD", "0-0034"),
326 REGULATOR_SUPPLY("LDO7VDD", "0-0034"),
327 REGULATOR_SUPPLY("LDO8VDD", "0-0034"),
328 REGULATOR_SUPPLY("LDO9VDD", "0-0034"),
329 REGULATOR_SUPPLY("LDO10VDD", "0-0034"),
330 REGULATOR_SUPPLY("LDO11VDD", "0-0034"),
331
332 REGULATOR_SUPPLY("DC1VDD", "1-0034"),
333 REGULATOR_SUPPLY("DC2VDD", "1-0034"),
334 REGULATOR_SUPPLY("DC3VDD", "1-0034"),
Mark Brownf4fe3882012-11-28 07:32:10 +0900335 REGULATOR_SUPPLY("LDO1VDD", "1-0034"),
336 REGULATOR_SUPPLY("LDO2VDD", "1-0034"),
337 REGULATOR_SUPPLY("LDO4VDD", "1-0034"),
338 REGULATOR_SUPPLY("LDO5VDD", "1-0034"),
339 REGULATOR_SUPPLY("LDO6VDD", "1-0034"),
340 REGULATOR_SUPPLY("LDO7VDD", "1-0034"),
341 REGULATOR_SUPPLY("LDO8VDD", "1-0034"),
342 REGULATOR_SUPPLY("LDO9VDD", "1-0034"),
343 REGULATOR_SUPPLY("LDO10VDD", "1-0034"),
344 REGULATOR_SUPPLY("LDO11VDD", "1-0034"),
Mark Brownae24c262011-06-22 13:08:13 +0900345};
346
347static struct regulator_init_data wallvdd_data = {
348 .constraints = {
349 .always_on = 1,
350 },
351 .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
352 .consumer_supplies = wallvdd_consumers,
353};
354
355static struct fixed_voltage_config wallvdd_pdata = {
356 .supply_name = "WALLVDD",
357 .microvolts = 5000000,
358 .init_data = &wallvdd_data,
359 .gpio = -EINVAL,
360};
361
362static struct platform_device wallvdd_device = {
363 .name = "reg-fixed-voltage",
364 .id = -1,
365 .dev = {
366 .platform_data = &wallvdd_pdata,
367 },
368};
369
Mark Browne1a3c742011-05-06 09:45:13 +0900370static struct platform_device *crag6410_devices[] __initdata = {
371 &s3c_device_hsmmc0,
Mark Browne1a3c742011-05-06 09:45:13 +0900372 &s3c_device_hsmmc2,
373 &s3c_device_i2c0,
374 &s3c_device_i2c1,
375 &s3c_device_fb,
376 &s3c_device_ohci,
377 &s3c_device_usb_hsotg,
Tomasz Figa7fa33bd2013-03-09 15:37:53 +0100378 &samsung_device_pwm,
Mark Browne1a3c742011-05-06 09:45:13 +0900379 &s3c64xx_device_iis0,
380 &s3c64xx_device_iis1,
Mark Browne1a3c742011-05-06 09:45:13 +0900381 &samsung_device_keypad,
382 &crag6410_gpio_keydev,
383 &crag6410_dm9k_device,
384 &s3c64xx_device_spi0,
385 &crag6410_mmgpio,
386 &crag6410_lcd_powerdev,
387 &crag6410_backlight_device,
Mark Brownae24c262011-06-22 13:08:13 +0900388 &speyside_device,
Mark Brown64142612011-11-30 13:30:27 +0000389 &tobermory_device,
Mark Brownc5c32c92011-12-02 14:32:32 +0900390 &littlemill_device,
Mark Brown8c051ab2011-09-05 14:50:02 +0900391 &lowland_device,
Mark Brown33229142012-11-28 07:30:18 +0900392 &bells_wm2200_device,
Mark Brown25752b72012-08-10 13:03:18 +0900393 &bells_wm5102_device,
394 &bells_wm5110_device,
Mark Brownae24c262011-06-22 13:08:13 +0900395 &wallvdd_device,
Mark Browne1a3c742011-05-06 09:45:13 +0900396};
397
398static struct pca953x_platform_data crag6410_pca_data = {
399 .gpio_base = PCA935X_GPIO_BASE,
Mark Brown6e11e0b2011-12-30 09:46:40 +0900400 .irq_base = -1,
Mark Browne1a3c742011-05-06 09:45:13 +0900401};
402
Mark Brown986afc92011-08-12 18:08:17 +0900403/* VDDARM is controlled by DVS1 connected to GPK(0) */
404static struct wm831x_buckv_pdata vddarm_pdata = {
405 .dvs_control_src = 1,
406 .dvs_gpio = S3C64XX_GPK(0),
407};
408
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800409static struct regulator_consumer_supply vddarm_consumers[] = {
Mark Browne1a3c742011-05-06 09:45:13 +0900410 REGULATOR_SUPPLY("vddarm", NULL),
411};
412
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800413static struct regulator_init_data vddarm = {
Mark Browne1a3c742011-05-06 09:45:13 +0900414 .constraints = {
415 .name = "VDDARM",
416 .min_uV = 1000000,
417 .max_uV = 1300000,
418 .always_on = 1,
419 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
420 },
421 .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
422 .consumer_supplies = vddarm_consumers,
Mark Brown35127292011-06-22 13:08:17 +0900423 .supply_regulator = "WALLVDD",
Mark Brown986afc92011-08-12 18:08:17 +0900424 .driver_data = &vddarm_pdata,
Mark Browne1a3c742011-05-06 09:45:13 +0900425};
426
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800427static struct regulator_consumer_supply vddint_consumers[] = {
Mark Brown39cb2632011-12-08 10:52:19 +0900428 REGULATOR_SUPPLY("vddint", NULL),
429};
430
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800431static struct regulator_init_data vddint = {
Mark Browne1a3c742011-05-06 09:45:13 +0900432 .constraints = {
433 .name = "VDDINT",
434 .min_uV = 1000000,
435 .max_uV = 1200000,
436 .always_on = 1,
437 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
438 },
Mark Brown39cb2632011-12-08 10:52:19 +0900439 .num_consumer_supplies = ARRAY_SIZE(vddint_consumers),
440 .consumer_supplies = vddint_consumers,
441 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900442};
443
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800444static struct regulator_init_data vddmem = {
Mark Browne1a3c742011-05-06 09:45:13 +0900445 .constraints = {
446 .name = "VDDMEM",
447 .always_on = 1,
448 },
449};
450
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800451static struct regulator_init_data vddsys = {
Mark Browne1a3c742011-05-06 09:45:13 +0900452 .constraints = {
453 .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
454 .always_on = 1,
455 },
456};
457
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800458static struct regulator_consumer_supply vddmmc_consumers[] = {
Mark Browne1a3c742011-05-06 09:45:13 +0900459 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
460 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
461 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
462};
463
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800464static struct regulator_init_data vddmmc = {
Mark Browne1a3c742011-05-06 09:45:13 +0900465 .constraints = {
466 .name = "VDDMMC,UH",
467 .always_on = 1,
468 },
469 .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
470 .consumer_supplies = vddmmc_consumers,
Mark Brown35127292011-06-22 13:08:17 +0900471 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900472};
473
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800474static struct regulator_init_data vddotgi = {
Mark Browne1a3c742011-05-06 09:45:13 +0900475 .constraints = {
476 .name = "VDDOTGi",
477 .always_on = 1,
478 },
Mark Brown35127292011-06-22 13:08:17 +0900479 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900480};
481
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800482static struct regulator_init_data vddotg = {
Mark Browne1a3c742011-05-06 09:45:13 +0900483 .constraints = {
484 .name = "VDDOTG",
485 .always_on = 1,
486 },
Mark Brown35127292011-06-22 13:08:17 +0900487 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900488};
489
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800490static struct regulator_init_data vddhi = {
Mark Browne1a3c742011-05-06 09:45:13 +0900491 .constraints = {
492 .name = "VDDHI",
493 .always_on = 1,
494 },
Mark Brown35127292011-06-22 13:08:17 +0900495 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900496};
497
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800498static struct regulator_init_data vddadc = {
Mark Browne1a3c742011-05-06 09:45:13 +0900499 .constraints = {
500 .name = "VDDADC,VDDDAC",
501 .always_on = 1,
502 },
Mark Brown35127292011-06-22 13:08:17 +0900503 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900504};
505
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800506static struct regulator_init_data vddmem0 = {
Mark Browne1a3c742011-05-06 09:45:13 +0900507 .constraints = {
508 .name = "VDDMEM0",
509 .always_on = 1,
510 },
Mark Brown35127292011-06-22 13:08:17 +0900511 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900512};
513
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800514static struct regulator_init_data vddpll = {
Mark Browne1a3c742011-05-06 09:45:13 +0900515 .constraints = {
516 .name = "VDDPLL",
517 .always_on = 1,
518 },
Mark Brown35127292011-06-22 13:08:17 +0900519 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900520};
521
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800522static struct regulator_init_data vddlcd = {
Mark Browne1a3c742011-05-06 09:45:13 +0900523 .constraints = {
524 .name = "VDDLCD",
525 .always_on = 1,
526 },
Mark Brown35127292011-06-22 13:08:17 +0900527 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900528};
529
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800530static struct regulator_init_data vddalive = {
Mark Browne1a3c742011-05-06 09:45:13 +0900531 .constraints = {
532 .name = "VDDALIVE",
533 .always_on = 1,
534 },
Mark Brown35127292011-06-22 13:08:17 +0900535 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900536};
537
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800538static struct wm831x_backup_pdata banff_backup_pdata = {
Mark Brown89e1c3d2011-07-21 01:26:24 +0900539 .charger_enable = 1,
540 .vlim = 2500, /* mV */
541 .ilim = 200, /* uA */
542};
543
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800544static struct wm831x_status_pdata banff_red_led = {
Mark Browne1a3c742011-05-06 09:45:13 +0900545 .name = "banff:red:",
546 .default_src = WM831X_STATUS_MANUAL,
547};
548
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800549static struct wm831x_status_pdata banff_green_led = {
Mark Browne1a3c742011-05-06 09:45:13 +0900550 .name = "banff:green:",
551 .default_src = WM831X_STATUS_MANUAL,
552};
553
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800554static struct wm831x_touch_pdata touch_pdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900555 .data_irq = S3C_EINT(26),
Mark Brownae24c262011-06-22 13:08:13 +0900556 .pd_irq = S3C_EINT(27),
Mark Browne1a3c742011-05-06 09:45:13 +0900557};
558
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800559static struct wm831x_pdata crag_pmic_pdata = {
Mark Brownae24c262011-06-22 13:08:13 +0900560 .wm831x_num = 1,
Mark Brownaaed44e2011-11-03 16:28:15 +0900561 .gpio_base = BANFF_PMIC_GPIO_BASE,
Mark Browndcf35802011-12-02 14:29:07 +0900562 .soft_shutdown = true,
Mark Browne1a3c742011-05-06 09:45:13 +0900563
Mark Brown89e1c3d2011-07-21 01:26:24 +0900564 .backup = &banff_backup_pdata,
565
Mark Brownae24c262011-06-22 13:08:13 +0900566 .gpio_defaults = {
Mark Brown986afc92011-08-12 18:08:17 +0900567 /* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
568 [4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8,
Mark Brownae24c262011-06-22 13:08:13 +0900569 /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
570 [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
571 /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
572 [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
573 },
574
Mark Browne1a3c742011-05-06 09:45:13 +0900575 .dcdc = {
576 &vddarm, /* DCDC1 */
577 &vddint, /* DCDC2 */
578 &vddmem, /* DCDC3 */
579 },
580
581 .ldo = {
582 &vddsys, /* LDO1 */
583 &vddmmc, /* LDO2 */
584 NULL, /* LDO3 */
585 &vddotgi, /* LDO4 */
586 &vddotg, /* LDO5 */
587 &vddhi, /* LDO6 */
588 &vddadc, /* LDO7 */
589 &vddmem0, /* LDO8 */
590 &vddpll, /* LDO9 */
591 &vddlcd, /* LDO10 */
592 &vddalive, /* LDO11 */
593 },
594
595 .status = {
596 &banff_green_led,
597 &banff_red_led,
598 },
599
600 .touch = &touch_pdata,
601};
602
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800603static struct i2c_board_info i2c_devs0[] = {
Mark Browne1a3c742011-05-06 09:45:13 +0900604 { I2C_BOARD_INFO("24c08", 0x50), },
605 { I2C_BOARD_INFO("tca6408", 0x20),
606 .platform_data = &crag6410_pca_data,
607 },
608 { I2C_BOARD_INFO("wm8312", 0x34),
609 .platform_data = &crag_pmic_pdata,
610 .irq = S3C_EINT(23),
611 },
612};
613
614static struct s3c2410_platform_i2c i2c0_pdata = {
615 .frequency = 400000,
616};
617
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800618static struct regulator_consumer_supply pvdd_1v2_consumers[] = {
Mark Browncda23492012-01-12 11:04:56 +0900619 REGULATOR_SUPPLY("DCVDD", "spi0.0"),
620 REGULATOR_SUPPLY("AVDD", "spi0.0"),
Mark Brown479535e2012-10-17 17:41:07 +0900621 REGULATOR_SUPPLY("AVDD", "spi0.1"),
Mark Browncda23492012-01-12 11:04:56 +0900622};
623
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800624static struct regulator_init_data pvdd_1v2 = {
Mark Brownae24c262011-06-22 13:08:13 +0900625 .constraints = {
626 .name = "PVDD_1V2",
Mark Browncda23492012-01-12 11:04:56 +0900627 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
Mark Brownae24c262011-06-22 13:08:13 +0900628 },
Mark Browncda23492012-01-12 11:04:56 +0900629
630 .consumer_supplies = pvdd_1v2_consumers,
631 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v2_consumers),
Mark Brownae24c262011-06-22 13:08:13 +0900632};
633
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800634static struct regulator_consumer_supply pvdd_1v8_consumers[] = {
Mark Brownd5160ec2011-09-26 13:18:28 +0900635 REGULATOR_SUPPLY("LDOVDD", "1-001a"),
Mark Brownae24c262011-06-22 13:08:13 +0900636 REGULATOR_SUPPLY("PLLVDD", "1-001a"),
637 REGULATOR_SUPPLY("DBVDD", "1-001a"),
Mark Brown4ed12b52011-08-31 08:03:11 +0900638 REGULATOR_SUPPLY("DBVDD1", "1-001a"),
639 REGULATOR_SUPPLY("DBVDD2", "1-001a"),
640 REGULATOR_SUPPLY("DBVDD3", "1-001a"),
Mark Brownae24c262011-06-22 13:08:13 +0900641 REGULATOR_SUPPLY("CPVDD", "1-001a"),
642 REGULATOR_SUPPLY("AVDD2", "1-001a"),
643 REGULATOR_SUPPLY("DCVDD", "1-001a"),
644 REGULATOR_SUPPLY("AVDD", "1-001a"),
Mark Browncda23492012-01-12 11:04:56 +0900645 REGULATOR_SUPPLY("DBVDD", "spi0.0"),
Mark Browne6a194b2012-10-17 17:41:09 +0900646
647 REGULATOR_SUPPLY("DBVDD", "1-003a"),
648 REGULATOR_SUPPLY("LDOVDD", "1-003a"),
649 REGULATOR_SUPPLY("CPVDD", "1-003a"),
650 REGULATOR_SUPPLY("AVDD", "1-003a"),
Mark Brown479535e2012-10-17 17:41:07 +0900651 REGULATOR_SUPPLY("DBVDD1", "spi0.1"),
652 REGULATOR_SUPPLY("DBVDD2", "spi0.1"),
653 REGULATOR_SUPPLY("DBVDD3", "spi0.1"),
654 REGULATOR_SUPPLY("LDOVDD", "spi0.1"),
655 REGULATOR_SUPPLY("CPVDD", "spi0.1"),
656
657 REGULATOR_SUPPLY("DBVDD2", "wm5102-codec"),
658 REGULATOR_SUPPLY("DBVDD3", "wm5102-codec"),
659 REGULATOR_SUPPLY("CPVDD", "wm5102-codec"),
660
661 REGULATOR_SUPPLY("DBVDD2", "wm5110-codec"),
662 REGULATOR_SUPPLY("DBVDD3", "wm5110-codec"),
663 REGULATOR_SUPPLY("CPVDD", "wm5110-codec"),
Mark Brownae24c262011-06-22 13:08:13 +0900664};
665
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800666static struct regulator_init_data pvdd_1v8 = {
Mark Brownae24c262011-06-22 13:08:13 +0900667 .constraints = {
668 .name = "PVDD_1V8",
669 .always_on = 1,
670 },
671
672 .consumer_supplies = pvdd_1v8_consumers,
673 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
674};
675
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800676static struct regulator_consumer_supply pvdd_3v3_consumers[] = {
Mark Brownae24c262011-06-22 13:08:13 +0900677 REGULATOR_SUPPLY("MICVDD", "1-001a"),
678 REGULATOR_SUPPLY("AVDD1", "1-001a"),
679};
680
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800681static struct regulator_init_data pvdd_3v3 = {
Mark Brownae24c262011-06-22 13:08:13 +0900682 .constraints = {
683 .name = "PVDD_3V3",
684 .always_on = 1,
685 },
686
687 .consumer_supplies = pvdd_3v3_consumers,
688 .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
689};
690
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800691static struct wm831x_pdata glenfarclas_pmic_pdata = {
Mark Brownae24c262011-06-22 13:08:13 +0900692 .wm831x_num = 2,
693 .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
694 .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
Mark Browndcf35802011-12-02 14:29:07 +0900695 .soft_shutdown = true,
Mark Brownae24c262011-06-22 13:08:13 +0900696
697 .gpio_defaults = {
698 /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
699 [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
700 [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
701 [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
702 },
703
704 .dcdc = {
705 &pvdd_1v2, /* DCDC1 */
706 &pvdd_1v8, /* DCDC2 */
707 &pvdd_3v3, /* DCDC3 */
708 },
709
710 .disable_touch = true,
711};
712
Mark Brown8504a3c2011-12-02 14:29:07 +0900713static struct wm1250_ev1_pdata wm1250_ev1_pdata = {
714 .gpios = {
715 [WM1250_EV1_GPIO_CLK_ENA] = S3C64XX_GPN(12),
716 [WM1250_EV1_GPIO_CLK_SEL0] = S3C64XX_GPL(12),
717 [WM1250_EV1_GPIO_CLK_SEL1] = S3C64XX_GPL(13),
718 [WM1250_EV1_GPIO_OSR] = S3C64XX_GPL(14),
719 [WM1250_EV1_GPIO_MASTER] = S3C64XX_GPL(8),
720 },
721};
722
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800723static struct i2c_board_info i2c_devs1[] = {
Mark Browne1a3c742011-05-06 09:45:13 +0900724 { I2C_BOARD_INFO("wm8311", 0x34),
Mark Brownae24c262011-06-22 13:08:13 +0900725 .irq = S3C_EINT(0),
726 .platform_data = &glenfarclas_pmic_pdata },
727
Mark Brown091cff02012-10-17 17:41:10 +0900728 { I2C_BOARD_INFO("wlf-gf-module", 0x20) },
Mark Brownea070cd2012-05-16 07:01:10 +0900729 { I2C_BOARD_INFO("wlf-gf-module", 0x22) },
Mark Brownd0f0b432011-08-19 22:40:07 +0900730 { I2C_BOARD_INFO("wlf-gf-module", 0x24) },
731 { I2C_BOARD_INFO("wlf-gf-module", 0x25) },
732 { I2C_BOARD_INFO("wlf-gf-module", 0x26) },
733
Mark Brown8504a3c2011-12-02 14:29:07 +0900734 { I2C_BOARD_INFO("wm1250-ev1", 0x27),
735 .platform_data = &wm1250_ev1_pdata },
Mark Browne1a3c742011-05-06 09:45:13 +0900736};
737
Mark Brown8351c7a2011-12-02 14:29:07 +0900738static struct s3c2410_platform_i2c i2c1_pdata = {
739 .frequency = 400000,
740 .bus_num = 1,
Mark Browne1a3c742011-05-06 09:45:13 +0900741};
742
743static void __init crag6410_map_io(void)
744{
745 s3c64xx_init_io(NULL, 0);
746 s3c24xx_init_clocks(12000000);
747 s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
Romain Naour04a49b72013-01-09 18:47:04 -0800748 samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
Mark Browne1a3c742011-05-06 09:45:13 +0900749
750 /* LCD type and Bypass set by bootloader */
751}
752
753static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
754 .max_width = 4,
755 .cd_type = S3C_SDHCI_CD_PERMANENT,
Mark Browna9294cd2011-12-30 13:44:36 +0900756 .host_caps = MMC_CAP_POWER_OFF_CARD,
Mark Browne1a3c742011-05-06 09:45:13 +0900757};
758
Mark Browne1a3c742011-05-06 09:45:13 +0900759static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
760{
761 /* Set all the necessary GPG pins to special-function 2 */
762 s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
763
764 /* force card-detected for prototype 0 */
765 s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
766}
767
768static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
769 .max_width = 4,
770 .cd_type = S3C_SDHCI_CD_INTERNAL,
771 .cfg_gpio = crag6410_cfg_sdhci0,
Mark Brownfb7f60f2011-12-30 13:44:31 +0900772 .host_caps = MMC_CAP_POWER_OFF_CARD,
Mark Browne1a3c742011-05-06 09:45:13 +0900773};
774
Mark Brown66211f92011-12-29 18:05:29 +0900775static const struct gpio_led gpio_leds[] = {
776 {
777 .name = "d13:green:",
778 .gpio = MMGPIO_GPIO_BASE + 0,
779 .default_state = LEDS_GPIO_DEFSTATE_ON,
780 },
781 {
782 .name = "d14:green:",
783 .gpio = MMGPIO_GPIO_BASE + 1,
784 .default_state = LEDS_GPIO_DEFSTATE_ON,
785 },
786 {
787 .name = "d15:green:",
788 .gpio = MMGPIO_GPIO_BASE + 2,
789 .default_state = LEDS_GPIO_DEFSTATE_ON,
790 },
791 {
792 .name = "d16:green:",
793 .gpio = MMGPIO_GPIO_BASE + 3,
794 .default_state = LEDS_GPIO_DEFSTATE_ON,
795 },
796 {
797 .name = "d17:green:",
798 .gpio = MMGPIO_GPIO_BASE + 4,
799 .default_state = LEDS_GPIO_DEFSTATE_ON,
800 },
801 {
802 .name = "d18:green:",
803 .gpio = MMGPIO_GPIO_BASE + 5,
804 .default_state = LEDS_GPIO_DEFSTATE_ON,
805 },
806 {
807 .name = "d19:green:",
808 .gpio = MMGPIO_GPIO_BASE + 6,
809 .default_state = LEDS_GPIO_DEFSTATE_ON,
810 },
811 {
812 .name = "d20:green:",
813 .gpio = MMGPIO_GPIO_BASE + 7,
814 .default_state = LEDS_GPIO_DEFSTATE_ON,
815 },
816};
817
818static const struct gpio_led_platform_data gpio_leds_pdata = {
819 .leds = gpio_leds,
820 .num_leds = ARRAY_SIZE(gpio_leds),
Mark Browne1a3c742011-05-06 09:45:13 +0900821};
822
Joonyoung Shim99f6e1f2012-03-07 04:23:47 -0800823static struct s3c_hsotg_plat crag6410_hsotg_pdata;
824
Mark Browne1a3c742011-05-06 09:45:13 +0900825static void __init crag6410_machine_init(void)
826{
827 /* Open drain IRQs need pullups */
828 s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
829 s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
830
831 gpio_request(S3C64XX_GPB(0), "LCD power");
832 gpio_direction_output(S3C64XX_GPB(0), 0);
833
834 gpio_request(S3C64XX_GPF(14), "LCD PWM");
835 gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
836
837 gpio_request(S3C64XX_GPB(1), "SD power");
838 gpio_direction_output(S3C64XX_GPB(1), 0);
839
840 gpio_request(S3C64XX_GPF(10), "nRESETSEL");
841 gpio_direction_output(S3C64XX_GPF(10), 1);
842
843 s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
Mark Browne1a3c742011-05-06 09:45:13 +0900844 s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
845
846 s3c_i2c0_set_platdata(&i2c0_pdata);
Mark Brown8351c7a2011-12-02 14:29:07 +0900847 s3c_i2c1_set_platdata(&i2c1_pdata);
Mark Browne1a3c742011-05-06 09:45:13 +0900848 s3c_fb_set_platdata(&crag6410_lcd_pdata);
Joonyoung Shim99f6e1f2012-03-07 04:23:47 -0800849 s3c_hsotg_set_platdata(&crag6410_hsotg_pdata);
Mark Browne1a3c742011-05-06 09:45:13 +0900850
851 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
852 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
853
854 samsung_keypad_set_platdata(&crag6410_keypad_data);
Mark Brown479535e2012-10-17 17:41:07 +0900855 s3c64xx_spi0_set_platdata(NULL, 0, 2);
Mark Browne1a3c742011-05-06 09:45:13 +0900856
857 platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
858
Mark Brown66211f92011-12-29 18:05:29 +0900859 gpio_led_register_device(-1, &gpio_leds_pdata);
860
Mark Brownae24c262011-06-22 13:08:13 +0900861 regulator_has_full_constraints();
862
Mark Brownc656c302011-12-08 23:27:48 +0100863 s3c64xx_pm_init();
Mark Browne1a3c742011-05-06 09:45:13 +0900864}
865
866MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
867 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
Nicolas Pitre170a5902011-07-05 22:38:17 -0400868 .atag_offset = 0x100,
Mark Browne1a3c742011-05-06 09:45:13 +0900869 .init_irq = s3c6410_init_irq,
Mark Browne1a3c742011-05-06 09:45:13 +0900870 .map_io = crag6410_map_io,
871 .init_machine = crag6410_machine_init,
Shawn Guocc8f2522012-04-26 21:08:52 +0800872 .init_late = s3c64xx_init_late,
Romain Naour04a49b72013-01-09 18:47:04 -0800873 .init_time = samsung_timer_init,
Kukjin Kimff84ded2012-01-03 14:03:30 +0100874 .restart = s3c64xx_restart,
Mark Browne1a3c742011-05-06 09:45:13 +0900875MACHINE_END