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Mike Frysinger09e1f702008-08-06 17:15:27 +08001/*
2 * Common Blackfin startup code
3 *
4 * Copyright 2004-2008 Analog Devices Inc.
5 *
6 * Enter bugs at http://blackfin.uclinux.org/
7 *
8 * Licensed under the GPL-2 or later.
9 */
10
11#include <linux/linkage.h>
12#include <linux/init.h>
13#include <asm/blackfin.h>
Mike Frysinger67618fd2008-08-06 17:18:31 +080014#include <asm/thread_info.h>
Mike Frysinger09e1f702008-08-06 17:15:27 +080015#include <asm/trace.h>
16
Mike Frysinger17e89bc2008-08-06 17:23:50 +080017__INIT
18
19#define INITIAL_STACK (L1_SCRATCH_START + L1_SCRATCH_LENGTH - 12)
20
21ENTRY(__start)
22 /* R0: argument of command line string, passed from uboot, save it */
23 R7 = R0;
24 /* Enable Cycle Counter and Nesting Of Interrupts */
25#ifdef CONFIG_BFIN_SCRATCH_REG_CYCLES
26 R0 = SYSCFG_SNEN;
27#else
28 R0 = SYSCFG_SNEN | SYSCFG_CCEN;
29#endif
30 SYSCFG = R0;
31 R0 = 0;
32
33 /* Clear Out All the data and pointer Registers */
34 R1 = R0;
35 R2 = R0;
36 R3 = R0;
37 R4 = R0;
38 R5 = R0;
39 R6 = R0;
40
41 P0 = R0;
42 P1 = R0;
43 P2 = R0;
44 P3 = R0;
45 P4 = R0;
46 P5 = R0;
47
48 LC0 = r0;
49 LC1 = r0;
50 L0 = r0;
51 L1 = r0;
52 L2 = r0;
53 L3 = r0;
54
55 /* Clear Out All the DAG Registers */
56 B0 = r0;
57 B1 = r0;
58 B2 = r0;
59 B3 = r0;
60
61 I0 = r0;
62 I1 = r0;
63 I2 = r0;
64 I3 = r0;
65
66 M0 = r0;
67 M1 = r0;
68 M2 = r0;
69 M3 = r0;
70
71 trace_buffer_init(p0,r0);
72 P0 = R1;
73 R0 = R1;
74
75 /* Turn off the icache */
76 p0.l = LO(IMEM_CONTROL);
77 p0.h = HI(IMEM_CONTROL);
78 R1 = [p0];
79 R0 = ~ENICPLB;
80 R0 = R0 & R1;
81 [p0] = R0;
82 SSYNC;
83
84 /* Turn off the dcache */
85 p0.l = LO(DMEM_CONTROL);
86 p0.h = HI(DMEM_CONTROL);
87 R1 = [p0];
88 R0 = ~ENDCPLB;
89 R0 = R0 & R1;
90 [p0] = R0;
91 SSYNC;
92
Robin Getz0c7a6b22008-10-08 16:27:12 +080093 /* in case of double faults, save a few things */
94 p0.l = _init_retx;
95 p0.h = _init_retx;
Robin Getzcd8fb8d2008-08-14 14:44:33 +080096 R0 = RETX;
97 [P0] = R0;
98
Robin Getz0c7a6b22008-10-08 16:27:12 +080099#ifdef CONFIG_DEBUG_DOUBLEFAULT
100 /* Only save these if we are storing them,
101 * This happens here, since L1 gets clobbered
102 * below
103 */
104 p0.l = _saved_retx;
105 p0.h = _saved_retx;
106 p1.l = _init_saved_retx;
107 p1.h = _init_saved_retx;
108 r0 = [p0];
109 [p1] = r0;
110
111 p0.l = _saved_dcplb_fault_addr;
112 p0.h = _saved_dcplb_fault_addr;
113 p1.l = _init_saved_dcplb_fault_addr;
114 p1.h = _init_saved_dcplb_fault_addr;
115 r0 = [p0];
116 [p1] = r0;
117
118 p0.l = _saved_icplb_fault_addr;
119 p0.h = _saved_icplb_fault_addr;
120 p1.l = _init_saved_icplb_fault_addr;
121 p1.h = _init_saved_icplb_fault_addr;
122 r0 = [p0];
123 [p1] = r0;
124
125 p0.l = _saved_seqstat;
126 p0.h = _saved_seqstat;
127 p1.l = _init_saved_seqstat;
128 p1.h = _init_saved_seqstat;
129 r0 = [p0];
130 [p1] = r0;
131#endif
132
Mike Frysinger17e89bc2008-08-06 17:23:50 +0800133 /* Initialize stack pointer */
134 sp.l = lo(INITIAL_STACK);
135 sp.h = hi(INITIAL_STACK);
136 fp = sp;
137 usp = sp;
138
139#ifdef CONFIG_EARLY_PRINTK
140 call _init_early_exception_vectors;
141#endif
142
143 /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
144 call _bf53x_relocate_l1_mem;
145#ifdef CONFIG_BFIN_KERNEL_CLOCK
146 call _start_dma_code;
147#endif
148
149 /* This section keeps the processor in supervisor mode
150 * during kernel boot. Switches to user mode at end of boot.
151 * See page 3-9 of Hardware Reference manual for documentation.
152 */
153
154 /* EVT15 = _real_start */
155
156 p0.l = lo(EVT15);
157 p0.h = hi(EVT15);
158 p1.l = _real_start;
159 p1.h = _real_start;
160 [p0] = p1;
161 csync;
162
163 p0.l = lo(IMASK);
164 p0.h = hi(IMASK);
165 p1.l = IMASK_IVG15;
166 p1.h = 0x0;
167 [p0] = p1;
168 csync;
169
170 raise 15;
171 p0.l = .LWAIT_HERE;
172 p0.h = .LWAIT_HERE;
173 reti = p0;
174#if ANOMALY_05000281
175 nop; nop; nop;
176#endif
177 rti;
178
179.LWAIT_HERE:
180 jump .LWAIT_HERE;
181ENDPROC(__start)
182
Mike Frysinger09e1f702008-08-06 17:15:27 +0800183/* A little BF561 glue ... */
184#ifndef WDOG_CTL
185# define WDOG_CTL WDOGA_CTL
186#endif
187
Mike Frysinger09e1f702008-08-06 17:15:27 +0800188ENTRY(_real_start)
189 /* Enable nested interrupts */
190 [--sp] = reti;
191
192 /* watchdog off for now */
193 p0.l = lo(WDOG_CTL);
194 p0.h = hi(WDOG_CTL);
195 r0 = 0xAD6(z);
196 w[p0] = r0;
197 ssync;
198
199 /* Zero out the bss region
200 * Note: this will fail if bss is 0 bytes ...
201 */
202 r0 = 0 (z);
203 r1.l = ___bss_start;
204 r1.h = ___bss_start;
205 r2.l = ___bss_stop;
206 r2.h = ___bss_stop;
207 r2 = r2 - r1;
208 r2 >>= 2;
209 p1 = r1;
210 p2 = r2;
211 lsetup (.L_clear_bss, .L_clear_bss) lc0 = p2;
212.L_clear_bss:
213 [p1++] = r0;
214
215 /* In case there is a NULL pointer reference,
216 * zero out region before stext
217 */
218 p1 = r0;
219 r2.l = __stext;
220 r2.h = __stext;
221 r2 >>= 2;
222 p2 = r2;
223 lsetup (.L_clear_zero, .L_clear_zero) lc0 = p2;
224.L_clear_zero:
225 [p1++] = r0;
226
227 /* Pass the u-boot arguments to the global value command line */
228 R0 = R7;
229 call _cmdline_init;
230
231 /* Load the current thread pointer and stack */
232 sp.l = _init_thread_union;
233 sp.h = _init_thread_union;
234 p1 = THREAD_SIZE (z);
235 sp = sp + p1;
236 usp = sp;
237 fp = sp;
238 jump.l _start_kernel;
239ENDPROC(_real_start)
240
241__FINIT