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Rob Herring30058672013-01-28 16:13:14 +00001menuconfig MAILBOX
2 bool "Mailbox Hardware Support"
3 help
4 Mailbox is a framework to control hardware communication between
5 on-chip processors through queued messages and interrupt driven
6 signals. Say Y if your platform supports hardware mailboxes.
7
8if MAILBOX
Jassi Braree23d662014-06-26 19:09:42 +05309
10config ARM_MHU
11 tristate "ARM MHU Mailbox"
12 depends on ARM_AMBA
13 help
14 Say Y here if you want to build the ARM MHU controller driver.
15 The controller has 3 mailbox channels, the last of which can be
16 used in Secure mode only.
17
Neil Armstrongad3a2122016-08-18 12:10:25 +020018config PLATFORM_MHU
19 tristate "Platform MHU Mailbox"
20 depends on OF
21 depends on HAS_IOMEM
22 help
23 Say Y here if you want to build a platform specific variant MHU
24 controller driver.
25 The controller has a maximum of 3 mailbox channels, the last of
26 which can be used in Secure mode only.
27
Rob Herring30058672013-01-28 16:13:14 +000028config PL320_MBOX
29 bool "ARM PL320 Mailbox"
30 depends on ARM_AMBA
31 help
32 An implementation of the ARM PL320 Interprocessor Communication
33 Mailbox (IPCM), tailored for the Calxeda Highbank. It is used to
34 send short messages between Highbank's A9 cores and the EnergyCore
35 Management Engine, primarily for cpufreq. Say Y here if you want
36 to use the PL320 IPCM support.
37
Suman Annac869c752013-03-12 17:55:29 -050038config OMAP2PLUS_MBOX
39 tristate "OMAP2+ Mailbox framework support"
40 depends on ARCH_OMAP2PLUS
Suman Annac869c752013-03-12 17:55:29 -050041 help
42 Mailbox implementation for OMAP family chips with hardware for
43 interprocessor communication involving DSP, IVA1.0 and IVA2 in
44 OMAP2/3; or IPU, IVA HD and DSP in OMAP4/5. Say Y here if you
45 want to use OMAP2+ Mailbox framework support.
46
47config OMAP_MBOX_KFIFO_SIZE
48 int "Mailbox kfifo default buffer size (bytes)"
Suman Anna79859092014-06-24 19:43:38 -050049 depends on OMAP2PLUS_MBOX
Suman Annac869c752013-03-12 17:55:29 -050050 default 256
51 help
52 Specify the default size of mailbox's kfifo buffers (bytes).
53 This can also be changed at runtime (via the mbox_kfifo_size
54 module parameter).
Ashwin Chaugule86c22f82014-11-12 19:59:38 -050055
Caesar Wangf70ed3b2015-10-27 15:31:45 +080056config ROCKCHIP_MBOX
57 bool "Rockchip Soc Intergrated Mailbox Support"
58 depends on ARCH_ROCKCHIP || COMPILE_TEST
59 help
60 This driver provides support for inter-processor communication
61 between CPU cores and MCU processor on Some Rockchip SOCs.
62 Please check it that the Soc you use have Mailbox hardware.
63 Say Y here if you want to use the Rockchip Mailbox support.
64
Ashwin Chaugule86c22f82014-11-12 19:59:38 -050065config PCC
66 bool "Platform Communication Channel Driver"
67 depends on ACPI
Ashwin Chauguleb6fc6072015-08-05 09:40:31 -040068 default n
Ashwin Chaugule86c22f82014-11-12 19:59:38 -050069 help
70 ACPI 5.0+ spec defines a generic mode of communication
71 between the OS and a platform such as the BMC. This medium
72 (PCC) is typically used by CPPC (ACPI CPU Performance management),
73 RAS (ACPI reliability protocol) and MPST (ACPI Memory power
74 states). Select this driver if your platform implements the
75 PCC clients mentioned above.
76
Ley Foon Tanf62092f2015-02-04 16:32:18 +080077config ALTERA_MBOX
78 tristate "Altera Mailbox"
Richard Weinberger59dd3f02015-05-04 20:59:46 +020079 depends on HAS_IOMEM
Ley Foon Tanf62092f2015-02-04 16:32:18 +080080 help
81 An implementation of the Altera Mailbox soft core. It is used
82 to send message between processors. Say Y here if you want to use the
83 Altera mailbox support.
Lubomir Rintel0bae6af2015-05-05 13:27:45 -070084
85config BCM2835_MBOX
86 tristate "BCM2835 Mailbox"
87 depends on ARCH_BCM2835
88 help
89 An implementation of the BCM2385 Mailbox. It is used to invoke
90 the services of the Videocore. Say Y here if you want to use the
91 BCM2835 Mailbox.
92
Lee Jones9ef45462015-10-16 08:21:28 +010093config STI_MBOX
94 tristate "STI Mailbox framework support"
95 depends on ARCH_STI && OF
96 help
97 Mailbox implementation for STMicroelectonics family chips with
98 hardware for interprocessor communication.
99
Nishanth Menonaace66b2016-03-16 19:23:14 -0500100config TI_MESSAGE_MANAGER
101 tristate "Texas Instruments Message Manager Driver"
102 depends on ARCH_KEYSTONE
103 help
104 An implementation of Message Manager slave driver for Keystone
105 architecture SoCs from Texas Instruments. Message Manager is a
106 communication entity found on few of Texas Instrument's keystone
107 architecture SoCs. These may be used for communication between
108 multiple processors within the SoC. Select this driver if your
109 platform has support for the hardware block.
110
Leo Yan9c384182016-02-15 21:50:24 +0800111config HI6220_MBOX
112 tristate "Hi6220 Mailbox"
113 depends on ARCH_HISI
114 help
115 An implementation of the hi6220 mailbox. It is used to send message
116 between application processors and MCU. Say Y here if you want to
117 build Hi6220 mailbox controller driver.
118
Lee Jones8ea44842015-10-16 08:21:30 +0100119config MAILBOX_TEST
120 tristate "Mailbox Test Client"
121 depends on OF
Richard Weinberger65d3b042016-01-25 23:24:09 +0100122 depends on HAS_IOMEM
Lee Jones8ea44842015-10-16 08:21:30 +0100123 help
124 Test client to help with testing new Controller driver
125 implementations.
126
Duc Dangf700e842016-02-12 19:39:26 -0800127config XGENE_SLIMPRO_MBOX
128 tristate "APM SoC X-Gene SLIMpro Mailbox Controller"
129 depends on ARCH_XGENE
130 help
131 An implementation of the APM X-Gene Interprocessor Communication
132 Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller.
133 It is used to send short messages between ARM64-bit cores and
134 the SLIMpro Management Engine, primarily for PM. Say Y here if you
135 want to use the APM X-Gene SLIMpro IPCM support.
Rob Ricea24532f2016-06-30 15:59:23 -0400136
137config BCM_PDC_MBOX
138 tristate "Broadcom PDC Mailbox"
139 depends on ARM64 || COMPILE_TEST
Rob Ricee0c6fba2016-08-01 13:03:41 -0400140 depends on HAS_DMA
Rob Ricea24532f2016-06-30 15:59:23 -0400141 default ARCH_BCM_IPROC
142 help
143 Mailbox implementation for the Broadcom PDC ring manager,
144 which provides access to various offload engines on Broadcom
145 SoCs. Say Y here if you want to use the Broadcom PDC.
Lina Iyer88a8fda2016-04-01 08:23:31 -0600146
147config QTI_RPMH_MBOX
148 bool "TCS Mailbox for QTI RPMH Communication"
149 depends on ARCH_QCOM
150 help
151 Support for communication with the hardened-RPM blocks in
152 Qualcomm Technologies Inc (QTI) SoCs using TCS hardware mailbox.
153
Chris Lew38722582016-11-21 18:30:24 -0800154config MSM_QMP
155 bool "QTI Mailbox Protocol(QMP)"
156 depends on MSM_SMEM
157 help
158 QMP is a lightweight communication protocol for sending messages to
159 a remote processor. This protocol fits into the Generic Mailbox
160 Framework. QMP uses a mailbox located in shared memory.
Rob Herring30058672013-01-28 16:13:14 +0000161endif