blob: 8d795626a25e2de40bf70f872c4495fb72ebb732 [file] [log] [blame]
Chris Wilson54cf91d2010-11-25 18:00:26 +00001/*
2 * Copyright © 2008,2010 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 * Chris Wilson <chris@chris-wilson.co.uk>
26 *
27 */
28
David Howells760285e2012-10-02 18:01:07 +010029#include <drm/drmP.h>
30#include <drm/i915_drm.h>
Chris Wilson54cf91d2010-11-25 18:00:26 +000031#include "i915_drv.h"
32#include "i915_trace.h"
33#include "intel_drv.h"
Eugeni Dodonovf45b5552011-12-09 17:16:37 -080034#include <linux/dma_remapping.h>
Chris Wilson54cf91d2010-11-25 18:00:26 +000035
Chris Wilsona415d352013-11-26 11:23:15 +000036#define __EXEC_OBJECT_HAS_PIN (1<<31)
37#define __EXEC_OBJECT_HAS_FENCE (1<<30)
38
Ben Widawsky27173f12013-08-14 11:38:36 +020039struct eb_vmas {
40 struct list_head vmas;
Chris Wilson67731b82010-12-08 10:38:14 +000041 int and;
Chris Wilsoneef90cc2013-01-08 10:53:17 +000042 union {
Ben Widawsky27173f12013-08-14 11:38:36 +020043 struct i915_vma *lut[0];
Chris Wilsoneef90cc2013-01-08 10:53:17 +000044 struct hlist_head buckets[0];
45 };
Chris Wilson67731b82010-12-08 10:38:14 +000046};
47
Ben Widawsky27173f12013-08-14 11:38:36 +020048static struct eb_vmas *
Ben Widawsky17601cbc2013-11-25 09:54:38 -080049eb_create(struct drm_i915_gem_execbuffer2 *args)
Chris Wilson67731b82010-12-08 10:38:14 +000050{
Ben Widawsky27173f12013-08-14 11:38:36 +020051 struct eb_vmas *eb = NULL;
Chris Wilson67731b82010-12-08 10:38:14 +000052
Chris Wilsoneef90cc2013-01-08 10:53:17 +000053 if (args->flags & I915_EXEC_HANDLE_LUT) {
Daniel Vetterb205ca52013-09-19 14:00:11 +020054 unsigned size = args->buffer_count;
Ben Widawsky27173f12013-08-14 11:38:36 +020055 size *= sizeof(struct i915_vma *);
56 size += sizeof(struct eb_vmas);
Chris Wilsoneef90cc2013-01-08 10:53:17 +000057 eb = kmalloc(size, GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
58 }
59
60 if (eb == NULL) {
Daniel Vetterb205ca52013-09-19 14:00:11 +020061 unsigned size = args->buffer_count;
62 unsigned count = PAGE_SIZE / sizeof(struct hlist_head) / 2;
Lauri Kasanen27b7c632013-03-27 15:04:55 +020063 BUILD_BUG_ON_NOT_POWER_OF_2(PAGE_SIZE / sizeof(struct hlist_head));
Chris Wilsoneef90cc2013-01-08 10:53:17 +000064 while (count > 2*size)
65 count >>= 1;
66 eb = kzalloc(count*sizeof(struct hlist_head) +
Ben Widawsky27173f12013-08-14 11:38:36 +020067 sizeof(struct eb_vmas),
Chris Wilsoneef90cc2013-01-08 10:53:17 +000068 GFP_TEMPORARY);
69 if (eb == NULL)
70 return eb;
71
72 eb->and = count - 1;
73 } else
74 eb->and = -args->buffer_count;
75
Ben Widawsky27173f12013-08-14 11:38:36 +020076 INIT_LIST_HEAD(&eb->vmas);
Chris Wilson67731b82010-12-08 10:38:14 +000077 return eb;
78}
79
80static void
Ben Widawsky27173f12013-08-14 11:38:36 +020081eb_reset(struct eb_vmas *eb)
Chris Wilson67731b82010-12-08 10:38:14 +000082{
Chris Wilsoneef90cc2013-01-08 10:53:17 +000083 if (eb->and >= 0)
84 memset(eb->buckets, 0, (eb->and+1)*sizeof(struct hlist_head));
Chris Wilson67731b82010-12-08 10:38:14 +000085}
86
Chris Wilson3b96eff2013-01-08 10:53:14 +000087static int
Ben Widawsky27173f12013-08-14 11:38:36 +020088eb_lookup_vmas(struct eb_vmas *eb,
89 struct drm_i915_gem_exec_object2 *exec,
90 const struct drm_i915_gem_execbuffer2 *args,
91 struct i915_address_space *vm,
92 struct drm_file *file)
Chris Wilson3b96eff2013-01-08 10:53:14 +000093{
Ben Widawsky27173f12013-08-14 11:38:36 +020094 struct drm_i915_gem_object *obj;
95 struct list_head objects;
Chris Wilson9ae9ab52013-12-04 09:52:58 +000096 int i, ret;
Chris Wilson3b96eff2013-01-08 10:53:14 +000097
Ben Widawsky27173f12013-08-14 11:38:36 +020098 INIT_LIST_HEAD(&objects);
Chris Wilson3b96eff2013-01-08 10:53:14 +000099 spin_lock(&file->table_lock);
Ben Widawsky27173f12013-08-14 11:38:36 +0200100 /* Grab a reference to the object and release the lock so we can lookup
101 * or create the VMA without using GFP_ATOMIC */
Chris Wilsoneef90cc2013-01-08 10:53:17 +0000102 for (i = 0; i < args->buffer_count; i++) {
Chris Wilson3b96eff2013-01-08 10:53:14 +0000103 obj = to_intel_bo(idr_find(&file->object_idr, exec[i].handle));
104 if (obj == NULL) {
105 spin_unlock(&file->table_lock);
106 DRM_DEBUG("Invalid object handle %d at index %d\n",
107 exec[i].handle, i);
Ben Widawsky27173f12013-08-14 11:38:36 +0200108 ret = -ENOENT;
Chris Wilson9ae9ab52013-12-04 09:52:58 +0000109 goto err;
Chris Wilson3b96eff2013-01-08 10:53:14 +0000110 }
111
Ben Widawsky27173f12013-08-14 11:38:36 +0200112 if (!list_empty(&obj->obj_exec_link)) {
Chris Wilson3b96eff2013-01-08 10:53:14 +0000113 spin_unlock(&file->table_lock);
114 DRM_DEBUG("Object %p [handle %d, index %d] appears more than once in object list\n",
115 obj, exec[i].handle, i);
Ben Widawsky27173f12013-08-14 11:38:36 +0200116 ret = -EINVAL;
Chris Wilson9ae9ab52013-12-04 09:52:58 +0000117 goto err;
Chris Wilson3b96eff2013-01-08 10:53:14 +0000118 }
119
120 drm_gem_object_reference(&obj->base);
Ben Widawsky27173f12013-08-14 11:38:36 +0200121 list_add_tail(&obj->obj_exec_link, &objects);
Chris Wilson3b96eff2013-01-08 10:53:14 +0000122 }
123 spin_unlock(&file->table_lock);
124
Ben Widawsky27173f12013-08-14 11:38:36 +0200125 i = 0;
Chris Wilson9ae9ab52013-12-04 09:52:58 +0000126 while (!list_empty(&objects)) {
Ben Widawsky27173f12013-08-14 11:38:36 +0200127 struct i915_vma *vma;
128
Chris Wilson9ae9ab52013-12-04 09:52:58 +0000129 obj = list_first_entry(&objects,
130 struct drm_i915_gem_object,
131 obj_exec_link);
132
Daniel Vettere656a6c2013-08-14 14:14:04 +0200133 /*
134 * NOTE: We can leak any vmas created here when something fails
135 * later on. But that's no issue since vma_unbind can deal with
136 * vmas which are not actually bound. And since only
137 * lookup_or_create exists as an interface to get at the vma
138 * from the (obj, vm) we don't run the risk of creating
139 * duplicated vmas for the same vm.
140 */
Ben Widawsky27173f12013-08-14 11:38:36 +0200141 vma = i915_gem_obj_lookup_or_create_vma(obj, vm);
142 if (IS_ERR(vma)) {
Ben Widawsky27173f12013-08-14 11:38:36 +0200143 DRM_DEBUG("Failed to lookup VMA\n");
144 ret = PTR_ERR(vma);
Chris Wilson9ae9ab52013-12-04 09:52:58 +0000145 goto err;
Ben Widawsky27173f12013-08-14 11:38:36 +0200146 }
147
Chris Wilson9ae9ab52013-12-04 09:52:58 +0000148 /* Transfer ownership from the objects list to the vmas list. */
Ben Widawsky27173f12013-08-14 11:38:36 +0200149 list_add_tail(&vma->exec_list, &eb->vmas);
Chris Wilson9ae9ab52013-12-04 09:52:58 +0000150 list_del_init(&obj->obj_exec_link);
Ben Widawsky27173f12013-08-14 11:38:36 +0200151
152 vma->exec_entry = &exec[i];
153 if (eb->and < 0) {
154 eb->lut[i] = vma;
155 } else {
156 uint32_t handle = args->flags & I915_EXEC_HANDLE_LUT ? i : exec[i].handle;
157 vma->exec_handle = handle;
158 hlist_add_head(&vma->exec_node,
159 &eb->buckets[handle & eb->and]);
160 }
161 ++i;
162 }
163
Chris Wilson9ae9ab52013-12-04 09:52:58 +0000164 return 0;
Ben Widawsky27173f12013-08-14 11:38:36 +0200165
Chris Wilson9ae9ab52013-12-04 09:52:58 +0000166
167err:
Ben Widawsky27173f12013-08-14 11:38:36 +0200168 while (!list_empty(&objects)) {
169 obj = list_first_entry(&objects,
170 struct drm_i915_gem_object,
171 obj_exec_link);
172 list_del_init(&obj->obj_exec_link);
Chris Wilson9ae9ab52013-12-04 09:52:58 +0000173 drm_gem_object_unreference(&obj->base);
Ben Widawsky27173f12013-08-14 11:38:36 +0200174 }
Chris Wilson9ae9ab52013-12-04 09:52:58 +0000175 /*
176 * Objects already transfered to the vmas list will be unreferenced by
177 * eb_destroy.
178 */
179
Ben Widawsky27173f12013-08-14 11:38:36 +0200180 return ret;
Chris Wilson3b96eff2013-01-08 10:53:14 +0000181}
182
Ben Widawsky27173f12013-08-14 11:38:36 +0200183static struct i915_vma *eb_get_vma(struct eb_vmas *eb, unsigned long handle)
Chris Wilson67731b82010-12-08 10:38:14 +0000184{
Chris Wilsoneef90cc2013-01-08 10:53:17 +0000185 if (eb->and < 0) {
186 if (handle >= -eb->and)
187 return NULL;
188 return eb->lut[handle];
189 } else {
190 struct hlist_head *head;
191 struct hlist_node *node;
Chris Wilson67731b82010-12-08 10:38:14 +0000192
Chris Wilsoneef90cc2013-01-08 10:53:17 +0000193 head = &eb->buckets[handle & eb->and];
194 hlist_for_each(node, head) {
Ben Widawsky27173f12013-08-14 11:38:36 +0200195 struct i915_vma *vma;
Chris Wilsoneef90cc2013-01-08 10:53:17 +0000196
Ben Widawsky27173f12013-08-14 11:38:36 +0200197 vma = hlist_entry(node, struct i915_vma, exec_node);
198 if (vma->exec_handle == handle)
199 return vma;
Chris Wilsoneef90cc2013-01-08 10:53:17 +0000200 }
201 return NULL;
Chris Wilson67731b82010-12-08 10:38:14 +0000202 }
Chris Wilson67731b82010-12-08 10:38:14 +0000203}
204
Chris Wilsona415d352013-11-26 11:23:15 +0000205static void
206i915_gem_execbuffer_unreserve_vma(struct i915_vma *vma)
207{
208 struct drm_i915_gem_exec_object2 *entry;
209 struct drm_i915_gem_object *obj = vma->obj;
210
211 if (!drm_mm_node_allocated(&vma->node))
212 return;
213
214 entry = vma->exec_entry;
215
216 if (entry->flags & __EXEC_OBJECT_HAS_FENCE)
217 i915_gem_object_unpin_fence(obj);
218
219 if (entry->flags & __EXEC_OBJECT_HAS_PIN)
220 i915_gem_object_unpin(obj);
221
222 entry->flags &= ~(__EXEC_OBJECT_HAS_FENCE | __EXEC_OBJECT_HAS_PIN);
223}
224
225static void eb_destroy(struct eb_vmas *eb)
226{
Ben Widawsky27173f12013-08-14 11:38:36 +0200227 while (!list_empty(&eb->vmas)) {
228 struct i915_vma *vma;
Chris Wilsonbcffc3f2013-01-08 10:53:15 +0000229
Ben Widawsky27173f12013-08-14 11:38:36 +0200230 vma = list_first_entry(&eb->vmas,
231 struct i915_vma,
Chris Wilsonbcffc3f2013-01-08 10:53:15 +0000232 exec_list);
Ben Widawsky27173f12013-08-14 11:38:36 +0200233 list_del_init(&vma->exec_list);
Chris Wilsona415d352013-11-26 11:23:15 +0000234 i915_gem_execbuffer_unreserve_vma(vma);
Ben Widawsky27173f12013-08-14 11:38:36 +0200235 drm_gem_object_unreference(&vma->obj->base);
Chris Wilsonbcffc3f2013-01-08 10:53:15 +0000236 }
Chris Wilson67731b82010-12-08 10:38:14 +0000237 kfree(eb);
238}
239
Chris Wilsondabdfe02012-03-26 10:10:27 +0200240static inline int use_cpu_reloc(struct drm_i915_gem_object *obj)
241{
Chris Wilson2cc86b82013-08-26 19:51:00 -0300242 return (HAS_LLC(obj->base.dev) ||
243 obj->base.write_domain == I915_GEM_DOMAIN_CPU ||
Chris Wilson504c7262012-08-23 13:12:52 +0100244 !obj->map_and_fenceable ||
Chris Wilsondabdfe02012-03-26 10:10:27 +0200245 obj->cache_level != I915_CACHE_NONE);
246}
247
Chris Wilson54cf91d2010-11-25 18:00:26 +0000248static int
Rafael Barbalho5032d872013-08-21 17:10:51 +0100249relocate_entry_cpu(struct drm_i915_gem_object *obj,
250 struct drm_i915_gem_relocation_entry *reloc)
251{
Ben Widawsky3c94cee2013-11-02 21:07:11 -0700252 struct drm_device *dev = obj->base.dev;
Rafael Barbalho5032d872013-08-21 17:10:51 +0100253 uint32_t page_offset = offset_in_page(reloc->offset);
254 char *vaddr;
255 int ret = -EINVAL;
256
Chris Wilson2cc86b82013-08-26 19:51:00 -0300257 ret = i915_gem_object_set_to_cpu_domain(obj, true);
Rafael Barbalho5032d872013-08-21 17:10:51 +0100258 if (ret)
259 return ret;
260
261 vaddr = kmap_atomic(i915_gem_object_get_page(obj,
262 reloc->offset >> PAGE_SHIFT));
263 *(uint32_t *)(vaddr + page_offset) = reloc->delta;
Ben Widawsky3c94cee2013-11-02 21:07:11 -0700264
265 if (INTEL_INFO(dev)->gen >= 8) {
266 page_offset = offset_in_page(page_offset + sizeof(uint32_t));
267
268 if (page_offset == 0) {
269 kunmap_atomic(vaddr);
270 vaddr = kmap_atomic(i915_gem_object_get_page(obj,
271 (reloc->offset + sizeof(uint32_t)) >> PAGE_SHIFT));
272 }
273
274 *(uint32_t *)(vaddr + page_offset) = 0;
275 }
276
Rafael Barbalho5032d872013-08-21 17:10:51 +0100277 kunmap_atomic(vaddr);
278
279 return 0;
280}
281
282static int
283relocate_entry_gtt(struct drm_i915_gem_object *obj,
284 struct drm_i915_gem_relocation_entry *reloc)
285{
286 struct drm_device *dev = obj->base.dev;
287 struct drm_i915_private *dev_priv = dev->dev_private;
288 uint32_t __iomem *reloc_entry;
289 void __iomem *reloc_page;
290 int ret = -EINVAL;
291
292 ret = i915_gem_object_set_to_gtt_domain(obj, true);
293 if (ret)
294 return ret;
295
296 ret = i915_gem_object_put_fence(obj);
297 if (ret)
298 return ret;
299
300 /* Map the page containing the relocation we're going to perform. */
301 reloc->offset += i915_gem_obj_ggtt_offset(obj);
302 reloc_page = io_mapping_map_atomic_wc(dev_priv->gtt.mappable,
303 reloc->offset & PAGE_MASK);
304 reloc_entry = (uint32_t __iomem *)
305 (reloc_page + offset_in_page(reloc->offset));
306 iowrite32(reloc->delta, reloc_entry);
Ben Widawsky3c94cee2013-11-02 21:07:11 -0700307
308 if (INTEL_INFO(dev)->gen >= 8) {
309 reloc_entry += 1;
310
311 if (offset_in_page(reloc->offset + sizeof(uint32_t)) == 0) {
312 io_mapping_unmap_atomic(reloc_page);
313 reloc_page = io_mapping_map_atomic_wc(
314 dev_priv->gtt.mappable,
315 reloc->offset + sizeof(uint32_t));
316 reloc_entry = reloc_page;
317 }
318
319 iowrite32(0, reloc_entry);
320 }
321
Rafael Barbalho5032d872013-08-21 17:10:51 +0100322 io_mapping_unmap_atomic(reloc_page);
323
324 return 0;
325}
326
327static int
Chris Wilson54cf91d2010-11-25 18:00:26 +0000328i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
Ben Widawsky27173f12013-08-14 11:38:36 +0200329 struct eb_vmas *eb,
Ben Widawsky28d6a7b2013-07-31 17:00:02 -0700330 struct drm_i915_gem_relocation_entry *reloc,
331 struct i915_address_space *vm)
Chris Wilson54cf91d2010-11-25 18:00:26 +0000332{
333 struct drm_device *dev = obj->base.dev;
334 struct drm_gem_object *target_obj;
Daniel Vetter149c8402012-02-15 23:50:23 +0100335 struct drm_i915_gem_object *target_i915_obj;
Ben Widawsky27173f12013-08-14 11:38:36 +0200336 struct i915_vma *target_vma;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000337 uint32_t target_offset;
338 int ret = -EINVAL;
339
Chris Wilson67731b82010-12-08 10:38:14 +0000340 /* we've already hold a reference to all valid objects */
Ben Widawsky27173f12013-08-14 11:38:36 +0200341 target_vma = eb_get_vma(eb, reloc->target_handle);
342 if (unlikely(target_vma == NULL))
Chris Wilson54cf91d2010-11-25 18:00:26 +0000343 return -ENOENT;
Ben Widawsky27173f12013-08-14 11:38:36 +0200344 target_i915_obj = target_vma->obj;
345 target_obj = &target_vma->obj->base;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000346
Ben Widawsky5ce09722013-11-25 09:54:40 -0800347 target_offset = target_vma->node.start;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000348
Eric Anholte844b992012-07-31 15:35:01 -0700349 /* Sandybridge PPGTT errata: We need a global gtt mapping for MI and
350 * pipe_control writes because the gpu doesn't properly redirect them
351 * through the ppgtt for non_secure batchbuffers. */
352 if (unlikely(IS_GEN6(dev) &&
353 reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&
354 !target_i915_obj->has_global_gtt_mapping)) {
355 i915_gem_gtt_bind_object(target_i915_obj,
356 target_i915_obj->cache_level);
357 }
358
Chris Wilson54cf91d2010-11-25 18:00:26 +0000359 /* Validate that the target is in a valid r/w GPU domain */
Chris Wilsonb8f7ab12010-12-08 10:43:06 +0000360 if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) {
Daniel Vetterff240192012-01-31 21:08:14 +0100361 DRM_DEBUG("reloc with multiple write domains: "
Chris Wilson54cf91d2010-11-25 18:00:26 +0000362 "obj %p target %d offset %d "
363 "read %08x write %08x",
364 obj, reloc->target_handle,
365 (int) reloc->offset,
366 reloc->read_domains,
367 reloc->write_domain);
Chris Wilson67731b82010-12-08 10:38:14 +0000368 return ret;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000369 }
Daniel Vetter4ca4a252011-12-14 13:57:27 +0100370 if (unlikely((reloc->write_domain | reloc->read_domains)
371 & ~I915_GEM_GPU_DOMAINS)) {
Daniel Vetterff240192012-01-31 21:08:14 +0100372 DRM_DEBUG("reloc with read/write non-GPU domains: "
Chris Wilson54cf91d2010-11-25 18:00:26 +0000373 "obj %p target %d offset %d "
374 "read %08x write %08x",
375 obj, reloc->target_handle,
376 (int) reloc->offset,
377 reloc->read_domains,
378 reloc->write_domain);
Chris Wilson67731b82010-12-08 10:38:14 +0000379 return ret;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000380 }
Chris Wilson54cf91d2010-11-25 18:00:26 +0000381
382 target_obj->pending_read_domains |= reloc->read_domains;
383 target_obj->pending_write_domain |= reloc->write_domain;
384
385 /* If the relocation already has the right value in it, no
386 * more work needs to be done.
387 */
388 if (target_offset == reloc->presumed_offset)
Chris Wilson67731b82010-12-08 10:38:14 +0000389 return 0;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000390
391 /* Check that the relocation address is valid... */
Ben Widawsky3c94cee2013-11-02 21:07:11 -0700392 if (unlikely(reloc->offset >
393 obj->base.size - (INTEL_INFO(dev)->gen >= 8 ? 8 : 4))) {
Daniel Vetterff240192012-01-31 21:08:14 +0100394 DRM_DEBUG("Relocation beyond object bounds: "
Chris Wilson54cf91d2010-11-25 18:00:26 +0000395 "obj %p target %d offset %d size %d.\n",
396 obj, reloc->target_handle,
397 (int) reloc->offset,
398 (int) obj->base.size);
Chris Wilson67731b82010-12-08 10:38:14 +0000399 return ret;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000400 }
Chris Wilsonb8f7ab12010-12-08 10:43:06 +0000401 if (unlikely(reloc->offset & 3)) {
Daniel Vetterff240192012-01-31 21:08:14 +0100402 DRM_DEBUG("Relocation not 4-byte aligned: "
Chris Wilson54cf91d2010-11-25 18:00:26 +0000403 "obj %p target %d offset %d.\n",
404 obj, reloc->target_handle,
405 (int) reloc->offset);
Chris Wilson67731b82010-12-08 10:38:14 +0000406 return ret;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000407 }
408
Chris Wilsondabdfe02012-03-26 10:10:27 +0200409 /* We can't wait for rendering with pagefaults disabled */
410 if (obj->active && in_atomic())
411 return -EFAULT;
412
Chris Wilson54cf91d2010-11-25 18:00:26 +0000413 reloc->delta += target_offset;
Rafael Barbalho5032d872013-08-21 17:10:51 +0100414 if (use_cpu_reloc(obj))
415 ret = relocate_entry_cpu(obj, reloc);
416 else
417 ret = relocate_entry_gtt(obj, reloc);
Chris Wilson54cf91d2010-11-25 18:00:26 +0000418
Daniel Vetterd4d36012013-09-02 20:56:23 +0200419 if (ret)
420 return ret;
421
Chris Wilson54cf91d2010-11-25 18:00:26 +0000422 /* and update the user's relocation entry */
423 reloc->presumed_offset = target_offset;
424
Chris Wilson67731b82010-12-08 10:38:14 +0000425 return 0;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000426}
427
428static int
Ben Widawsky27173f12013-08-14 11:38:36 +0200429i915_gem_execbuffer_relocate_vma(struct i915_vma *vma,
430 struct eb_vmas *eb)
Chris Wilson54cf91d2010-11-25 18:00:26 +0000431{
Chris Wilson1d83f442012-03-24 20:12:53 +0000432#define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry))
433 struct drm_i915_gem_relocation_entry stack_reloc[N_RELOC(512)];
Chris Wilson54cf91d2010-11-25 18:00:26 +0000434 struct drm_i915_gem_relocation_entry __user *user_relocs;
Ben Widawsky27173f12013-08-14 11:38:36 +0200435 struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
Chris Wilson1d83f442012-03-24 20:12:53 +0000436 int remain, ret;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000437
Ville Syrjälä2bb46292013-02-22 16:12:51 +0200438 user_relocs = to_user_ptr(entry->relocs_ptr);
Chris Wilson54cf91d2010-11-25 18:00:26 +0000439
Chris Wilson1d83f442012-03-24 20:12:53 +0000440 remain = entry->relocation_count;
441 while (remain) {
442 struct drm_i915_gem_relocation_entry *r = stack_reloc;
443 int count = remain;
444 if (count > ARRAY_SIZE(stack_reloc))
445 count = ARRAY_SIZE(stack_reloc);
446 remain -= count;
447
448 if (__copy_from_user_inatomic(r, user_relocs, count*sizeof(r[0])))
Chris Wilson54cf91d2010-11-25 18:00:26 +0000449 return -EFAULT;
450
Chris Wilson1d83f442012-03-24 20:12:53 +0000451 do {
452 u64 offset = r->presumed_offset;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000453
Ben Widawsky27173f12013-08-14 11:38:36 +0200454 ret = i915_gem_execbuffer_relocate_entry(vma->obj, eb, r,
455 vma->vm);
Chris Wilson1d83f442012-03-24 20:12:53 +0000456 if (ret)
457 return ret;
458
459 if (r->presumed_offset != offset &&
460 __copy_to_user_inatomic(&user_relocs->presumed_offset,
461 &r->presumed_offset,
462 sizeof(r->presumed_offset))) {
463 return -EFAULT;
464 }
465
466 user_relocs++;
467 r++;
468 } while (--count);
Chris Wilson54cf91d2010-11-25 18:00:26 +0000469 }
470
471 return 0;
Chris Wilson1d83f442012-03-24 20:12:53 +0000472#undef N_RELOC
Chris Wilson54cf91d2010-11-25 18:00:26 +0000473}
474
475static int
Ben Widawsky27173f12013-08-14 11:38:36 +0200476i915_gem_execbuffer_relocate_vma_slow(struct i915_vma *vma,
477 struct eb_vmas *eb,
478 struct drm_i915_gem_relocation_entry *relocs)
Chris Wilson54cf91d2010-11-25 18:00:26 +0000479{
Ben Widawsky27173f12013-08-14 11:38:36 +0200480 const struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000481 int i, ret;
482
483 for (i = 0; i < entry->relocation_count; i++) {
Ben Widawsky27173f12013-08-14 11:38:36 +0200484 ret = i915_gem_execbuffer_relocate_entry(vma->obj, eb, &relocs[i],
485 vma->vm);
Chris Wilson54cf91d2010-11-25 18:00:26 +0000486 if (ret)
487 return ret;
488 }
489
490 return 0;
491}
492
493static int
Ben Widawsky17601cbc2013-11-25 09:54:38 -0800494i915_gem_execbuffer_relocate(struct eb_vmas *eb)
Chris Wilson54cf91d2010-11-25 18:00:26 +0000495{
Ben Widawsky27173f12013-08-14 11:38:36 +0200496 struct i915_vma *vma;
Chris Wilsond4aeee72011-03-14 15:11:24 +0000497 int ret = 0;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000498
Chris Wilsond4aeee72011-03-14 15:11:24 +0000499 /* This is the fast path and we cannot handle a pagefault whilst
500 * holding the struct mutex lest the user pass in the relocations
501 * contained within a mmaped bo. For in such a case we, the page
502 * fault handler would call i915_gem_fault() and we would try to
503 * acquire the struct mutex again. Obviously this is bad and so
504 * lockdep complains vehemently.
505 */
506 pagefault_disable();
Ben Widawsky27173f12013-08-14 11:38:36 +0200507 list_for_each_entry(vma, &eb->vmas, exec_list) {
508 ret = i915_gem_execbuffer_relocate_vma(vma, eb);
Chris Wilson54cf91d2010-11-25 18:00:26 +0000509 if (ret)
Chris Wilsond4aeee72011-03-14 15:11:24 +0000510 break;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000511 }
Chris Wilsond4aeee72011-03-14 15:11:24 +0000512 pagefault_enable();
Chris Wilson54cf91d2010-11-25 18:00:26 +0000513
Chris Wilsond4aeee72011-03-14 15:11:24 +0000514 return ret;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000515}
516
Chris Wilson1690e1e2011-12-14 13:57:08 +0100517static int
Ben Widawsky27173f12013-08-14 11:38:36 +0200518need_reloc_mappable(struct i915_vma *vma)
Chris Wilsondabdfe02012-03-26 10:10:27 +0200519{
Ben Widawsky27173f12013-08-14 11:38:36 +0200520 struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
521 return entry->relocation_count && !use_cpu_reloc(vma->obj) &&
522 i915_is_ggtt(vma->vm);
Chris Wilsondabdfe02012-03-26 10:10:27 +0200523}
524
525static int
Ben Widawsky27173f12013-08-14 11:38:36 +0200526i915_gem_execbuffer_reserve_vma(struct i915_vma *vma,
527 struct intel_ring_buffer *ring,
528 bool *need_reloc)
Chris Wilson1690e1e2011-12-14 13:57:08 +0100529{
Ben Widawsky27173f12013-08-14 11:38:36 +0200530 struct drm_i915_private *dev_priv = ring->dev->dev_private;
531 struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
Chris Wilson1690e1e2011-12-14 13:57:08 +0100532 bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
533 bool need_fence, need_mappable;
Ben Widawsky27173f12013-08-14 11:38:36 +0200534 struct drm_i915_gem_object *obj = vma->obj;
Chris Wilson1690e1e2011-12-14 13:57:08 +0100535 int ret;
536
537 need_fence =
538 has_fenced_gpu_access &&
539 entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
540 obj->tiling_mode != I915_TILING_NONE;
Ben Widawsky27173f12013-08-14 11:38:36 +0200541 need_mappable = need_fence || need_reloc_mappable(vma);
Chris Wilson1690e1e2011-12-14 13:57:08 +0100542
Ben Widawsky27173f12013-08-14 11:38:36 +0200543 ret = i915_gem_object_pin(obj, vma->vm, entry->alignment, need_mappable,
Ben Widawsky28d6a7b2013-07-31 17:00:02 -0700544 false);
Chris Wilson1690e1e2011-12-14 13:57:08 +0100545 if (ret)
546 return ret;
547
Chris Wilson7788a762012-08-24 19:18:18 +0100548 entry->flags |= __EXEC_OBJECT_HAS_PIN;
549
Chris Wilson1690e1e2011-12-14 13:57:08 +0100550 if (has_fenced_gpu_access) {
551 if (entry->flags & EXEC_OBJECT_NEEDS_FENCE) {
Chris Wilson06d98132012-04-17 15:31:24 +0100552 ret = i915_gem_object_get_fence(obj);
Chris Wilson9a5a53b2012-03-22 15:10:00 +0000553 if (ret)
Chris Wilson7788a762012-08-24 19:18:18 +0100554 return ret;
Chris Wilson1690e1e2011-12-14 13:57:08 +0100555
Chris Wilson9a5a53b2012-03-22 15:10:00 +0000556 if (i915_gem_object_pin_fence(obj))
Chris Wilson1690e1e2011-12-14 13:57:08 +0100557 entry->flags |= __EXEC_OBJECT_HAS_FENCE;
Chris Wilson9a5a53b2012-03-22 15:10:00 +0000558
Chris Wilson7dd49062012-03-21 10:48:18 +0000559 obj->pending_fenced_gpu_access = true;
Chris Wilson1690e1e2011-12-14 13:57:08 +0100560 }
Chris Wilson1690e1e2011-12-14 13:57:08 +0100561 }
562
Chris Wilson7788a762012-08-24 19:18:18 +0100563 /* Ensure ppgtt mapping exists if needed */
564 if (dev_priv->mm.aliasing_ppgtt && !obj->has_aliasing_ppgtt_mapping) {
565 i915_ppgtt_bind_object(dev_priv->mm.aliasing_ppgtt,
566 obj, obj->cache_level);
567
568 obj->has_aliasing_ppgtt_mapping = 1;
569 }
570
Ben Widawsky27173f12013-08-14 11:38:36 +0200571 if (entry->offset != vma->node.start) {
572 entry->offset = vma->node.start;
Daniel Vettered5982e2013-01-17 22:23:36 +0100573 *need_reloc = true;
574 }
575
576 if (entry->flags & EXEC_OBJECT_WRITE) {
577 obj->base.pending_read_domains = I915_GEM_DOMAIN_RENDER;
578 obj->base.pending_write_domain = I915_GEM_DOMAIN_RENDER;
579 }
580
581 if (entry->flags & EXEC_OBJECT_NEEDS_GTT &&
582 !obj->has_global_gtt_mapping)
583 i915_gem_gtt_bind_object(obj, obj->cache_level);
584
Chris Wilson1690e1e2011-12-14 13:57:08 +0100585 return 0;
Chris Wilson7788a762012-08-24 19:18:18 +0100586}
Chris Wilson1690e1e2011-12-14 13:57:08 +0100587
Chris Wilson54cf91d2010-11-25 18:00:26 +0000588static int
Chris Wilsond9e86c02010-11-10 16:40:20 +0000589i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,
Ben Widawsky27173f12013-08-14 11:38:36 +0200590 struct list_head *vmas,
Daniel Vettered5982e2013-01-17 22:23:36 +0100591 bool *need_relocs)
Chris Wilson54cf91d2010-11-25 18:00:26 +0000592{
Chris Wilson432e58e2010-11-25 19:32:06 +0000593 struct drm_i915_gem_object *obj;
Ben Widawsky27173f12013-08-14 11:38:36 +0200594 struct i915_vma *vma;
Ben Widawsky68c8c172013-09-11 14:57:50 -0700595 struct i915_address_space *vm;
Ben Widawsky27173f12013-08-14 11:38:36 +0200596 struct list_head ordered_vmas;
Chris Wilson7788a762012-08-24 19:18:18 +0100597 bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
598 int retry;
Chris Wilson6fe4f142011-01-10 17:35:37 +0000599
Ben Widawsky68c8c172013-09-11 14:57:50 -0700600 if (list_empty(vmas))
601 return 0;
602
603 vm = list_first_entry(vmas, struct i915_vma, exec_list)->vm;
604
Ben Widawsky27173f12013-08-14 11:38:36 +0200605 INIT_LIST_HEAD(&ordered_vmas);
606 while (!list_empty(vmas)) {
Chris Wilson6fe4f142011-01-10 17:35:37 +0000607 struct drm_i915_gem_exec_object2 *entry;
608 bool need_fence, need_mappable;
609
Ben Widawsky27173f12013-08-14 11:38:36 +0200610 vma = list_first_entry(vmas, struct i915_vma, exec_list);
611 obj = vma->obj;
612 entry = vma->exec_entry;
Chris Wilson6fe4f142011-01-10 17:35:37 +0000613
614 need_fence =
615 has_fenced_gpu_access &&
616 entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
617 obj->tiling_mode != I915_TILING_NONE;
Ben Widawsky27173f12013-08-14 11:38:36 +0200618 need_mappable = need_fence || need_reloc_mappable(vma);
Chris Wilson6fe4f142011-01-10 17:35:37 +0000619
620 if (need_mappable)
Ben Widawsky27173f12013-08-14 11:38:36 +0200621 list_move(&vma->exec_list, &ordered_vmas);
Chris Wilson6fe4f142011-01-10 17:35:37 +0000622 else
Ben Widawsky27173f12013-08-14 11:38:36 +0200623 list_move_tail(&vma->exec_list, &ordered_vmas);
Chris Wilson595dad72011-01-13 11:03:48 +0000624
Daniel Vettered5982e2013-01-17 22:23:36 +0100625 obj->base.pending_read_domains = I915_GEM_GPU_DOMAINS & ~I915_GEM_DOMAIN_COMMAND;
Chris Wilson595dad72011-01-13 11:03:48 +0000626 obj->base.pending_write_domain = 0;
Chris Wilson016fd0c2012-07-20 12:41:07 +0100627 obj->pending_fenced_gpu_access = false;
Chris Wilson6fe4f142011-01-10 17:35:37 +0000628 }
Ben Widawsky27173f12013-08-14 11:38:36 +0200629 list_splice(&ordered_vmas, vmas);
Chris Wilson54cf91d2010-11-25 18:00:26 +0000630
631 /* Attempt to pin all of the buffers into the GTT.
632 * This is done in 3 phases:
633 *
634 * 1a. Unbind all objects that do not match the GTT constraints for
635 * the execbuffer (fenceable, mappable, alignment etc).
636 * 1b. Increment pin count for already bound objects.
637 * 2. Bind new objects.
638 * 3. Decrement pin count.
639 *
Chris Wilson7788a762012-08-24 19:18:18 +0100640 * This avoid unnecessary unbinding of later objects in order to make
Chris Wilson54cf91d2010-11-25 18:00:26 +0000641 * room for the earlier objects *unless* we need to defragment.
642 */
643 retry = 0;
644 do {
Chris Wilson7788a762012-08-24 19:18:18 +0100645 int ret = 0;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000646
647 /* Unbind any ill-fitting objects or pin. */
Ben Widawsky27173f12013-08-14 11:38:36 +0200648 list_for_each_entry(vma, vmas, exec_list) {
649 struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000650 bool need_fence, need_mappable;
Chris Wilson1690e1e2011-12-14 13:57:08 +0100651
Ben Widawsky27173f12013-08-14 11:38:36 +0200652 obj = vma->obj;
653
654 if (!drm_mm_node_allocated(&vma->node))
Chris Wilson54cf91d2010-11-25 18:00:26 +0000655 continue;
656
657 need_fence =
Chris Wilson9b3826b2010-12-05 17:11:54 +0000658 has_fenced_gpu_access &&
Chris Wilson54cf91d2010-11-25 18:00:26 +0000659 entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
660 obj->tiling_mode != I915_TILING_NONE;
Ben Widawsky27173f12013-08-14 11:38:36 +0200661 need_mappable = need_fence || need_reloc_mappable(vma);
Chris Wilson54cf91d2010-11-25 18:00:26 +0000662
Ben Widawsky28d6a7b2013-07-31 17:00:02 -0700663 WARN_ON((need_mappable || need_fence) &&
Ben Widawsky27173f12013-08-14 11:38:36 +0200664 !i915_is_ggtt(vma->vm));
Ben Widawsky28d6a7b2013-07-31 17:00:02 -0700665
Ben Widawskyf343c5f2013-07-05 14:41:04 -0700666 if ((entry->alignment &&
Ben Widawsky27173f12013-08-14 11:38:36 +0200667 vma->node.start & (entry->alignment - 1)) ||
Chris Wilson54cf91d2010-11-25 18:00:26 +0000668 (need_mappable && !obj->map_and_fenceable))
Ben Widawsky27173f12013-08-14 11:38:36 +0200669 ret = i915_vma_unbind(vma);
Chris Wilson54cf91d2010-11-25 18:00:26 +0000670 else
Ben Widawsky27173f12013-08-14 11:38:36 +0200671 ret = i915_gem_execbuffer_reserve_vma(vma, ring, need_relocs);
Chris Wilson432e58e2010-11-25 19:32:06 +0000672 if (ret)
Chris Wilson54cf91d2010-11-25 18:00:26 +0000673 goto err;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000674 }
675
676 /* Bind fresh objects */
Ben Widawsky27173f12013-08-14 11:38:36 +0200677 list_for_each_entry(vma, vmas, exec_list) {
678 if (drm_mm_node_allocated(&vma->node))
Chris Wilson1690e1e2011-12-14 13:57:08 +0100679 continue;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000680
Ben Widawsky27173f12013-08-14 11:38:36 +0200681 ret = i915_gem_execbuffer_reserve_vma(vma, ring, need_relocs);
Chris Wilson7788a762012-08-24 19:18:18 +0100682 if (ret)
683 goto err;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000684 }
685
Chris Wilsona415d352013-11-26 11:23:15 +0000686err:
Chris Wilson6c085a72012-08-20 11:40:46 +0200687 if (ret != -ENOSPC || retry++)
Chris Wilson54cf91d2010-11-25 18:00:26 +0000688 return ret;
689
Chris Wilsona415d352013-11-26 11:23:15 +0000690 /* Decrement pin count for bound objects */
691 list_for_each_entry(vma, vmas, exec_list)
692 i915_gem_execbuffer_unreserve_vma(vma);
693
Ben Widawsky68c8c172013-09-11 14:57:50 -0700694 ret = i915_gem_evict_vm(vm, true);
Chris Wilson54cf91d2010-11-25 18:00:26 +0000695 if (ret)
696 return ret;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000697 } while (1);
698}
699
700static int
701i915_gem_execbuffer_relocate_slow(struct drm_device *dev,
Daniel Vettered5982e2013-01-17 22:23:36 +0100702 struct drm_i915_gem_execbuffer2 *args,
Chris Wilson54cf91d2010-11-25 18:00:26 +0000703 struct drm_file *file,
Chris Wilsond9e86c02010-11-10 16:40:20 +0000704 struct intel_ring_buffer *ring,
Ben Widawsky27173f12013-08-14 11:38:36 +0200705 struct eb_vmas *eb,
706 struct drm_i915_gem_exec_object2 *exec)
Chris Wilson54cf91d2010-11-25 18:00:26 +0000707{
708 struct drm_i915_gem_relocation_entry *reloc;
Ben Widawsky27173f12013-08-14 11:38:36 +0200709 struct i915_address_space *vm;
710 struct i915_vma *vma;
Daniel Vettered5982e2013-01-17 22:23:36 +0100711 bool need_relocs;
Chris Wilsondd6864a2011-01-12 23:49:13 +0000712 int *reloc_offset;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000713 int i, total, ret;
Daniel Vetterb205ca52013-09-19 14:00:11 +0200714 unsigned count = args->buffer_count;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000715
Ben Widawsky27173f12013-08-14 11:38:36 +0200716 if (WARN_ON(list_empty(&eb->vmas)))
717 return 0;
718
719 vm = list_first_entry(&eb->vmas, struct i915_vma, exec_list)->vm;
720
Chris Wilson67731b82010-12-08 10:38:14 +0000721 /* We may process another execbuffer during the unlock... */
Ben Widawsky27173f12013-08-14 11:38:36 +0200722 while (!list_empty(&eb->vmas)) {
723 vma = list_first_entry(&eb->vmas, struct i915_vma, exec_list);
724 list_del_init(&vma->exec_list);
Chris Wilsona415d352013-11-26 11:23:15 +0000725 i915_gem_execbuffer_unreserve_vma(vma);
Ben Widawsky27173f12013-08-14 11:38:36 +0200726 drm_gem_object_unreference(&vma->obj->base);
Chris Wilson67731b82010-12-08 10:38:14 +0000727 }
728
Chris Wilson54cf91d2010-11-25 18:00:26 +0000729 mutex_unlock(&dev->struct_mutex);
730
731 total = 0;
732 for (i = 0; i < count; i++)
Chris Wilson432e58e2010-11-25 19:32:06 +0000733 total += exec[i].relocation_count;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000734
Chris Wilsondd6864a2011-01-12 23:49:13 +0000735 reloc_offset = drm_malloc_ab(count, sizeof(*reloc_offset));
Chris Wilson54cf91d2010-11-25 18:00:26 +0000736 reloc = drm_malloc_ab(total, sizeof(*reloc));
Chris Wilsondd6864a2011-01-12 23:49:13 +0000737 if (reloc == NULL || reloc_offset == NULL) {
738 drm_free_large(reloc);
739 drm_free_large(reloc_offset);
Chris Wilson54cf91d2010-11-25 18:00:26 +0000740 mutex_lock(&dev->struct_mutex);
741 return -ENOMEM;
742 }
743
744 total = 0;
745 for (i = 0; i < count; i++) {
746 struct drm_i915_gem_relocation_entry __user *user_relocs;
Chris Wilson262b6d32013-01-15 16:17:54 +0000747 u64 invalid_offset = (u64)-1;
748 int j;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000749
Ville Syrjälä2bb46292013-02-22 16:12:51 +0200750 user_relocs = to_user_ptr(exec[i].relocs_ptr);
Chris Wilson54cf91d2010-11-25 18:00:26 +0000751
752 if (copy_from_user(reloc+total, user_relocs,
Chris Wilson432e58e2010-11-25 19:32:06 +0000753 exec[i].relocation_count * sizeof(*reloc))) {
Chris Wilson54cf91d2010-11-25 18:00:26 +0000754 ret = -EFAULT;
755 mutex_lock(&dev->struct_mutex);
756 goto err;
757 }
758
Chris Wilson262b6d32013-01-15 16:17:54 +0000759 /* As we do not update the known relocation offsets after
760 * relocating (due to the complexities in lock handling),
761 * we need to mark them as invalid now so that we force the
762 * relocation processing next time. Just in case the target
763 * object is evicted and then rebound into its old
764 * presumed_offset before the next execbuffer - if that
765 * happened we would make the mistake of assuming that the
766 * relocations were valid.
767 */
768 for (j = 0; j < exec[i].relocation_count; j++) {
769 if (copy_to_user(&user_relocs[j].presumed_offset,
770 &invalid_offset,
771 sizeof(invalid_offset))) {
772 ret = -EFAULT;
773 mutex_lock(&dev->struct_mutex);
774 goto err;
775 }
776 }
777
Chris Wilsondd6864a2011-01-12 23:49:13 +0000778 reloc_offset[i] = total;
Chris Wilson432e58e2010-11-25 19:32:06 +0000779 total += exec[i].relocation_count;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000780 }
781
782 ret = i915_mutex_lock_interruptible(dev);
783 if (ret) {
784 mutex_lock(&dev->struct_mutex);
785 goto err;
786 }
787
Chris Wilson67731b82010-12-08 10:38:14 +0000788 /* reacquire the objects */
Chris Wilson67731b82010-12-08 10:38:14 +0000789 eb_reset(eb);
Ben Widawsky27173f12013-08-14 11:38:36 +0200790 ret = eb_lookup_vmas(eb, exec, args, vm, file);
Chris Wilson3b96eff2013-01-08 10:53:14 +0000791 if (ret)
792 goto err;
Chris Wilson67731b82010-12-08 10:38:14 +0000793
Daniel Vettered5982e2013-01-17 22:23:36 +0100794 need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
Ben Widawsky27173f12013-08-14 11:38:36 +0200795 ret = i915_gem_execbuffer_reserve(ring, &eb->vmas, &need_relocs);
Chris Wilson54cf91d2010-11-25 18:00:26 +0000796 if (ret)
797 goto err;
798
Ben Widawsky27173f12013-08-14 11:38:36 +0200799 list_for_each_entry(vma, &eb->vmas, exec_list) {
800 int offset = vma->exec_entry - exec;
801 ret = i915_gem_execbuffer_relocate_vma_slow(vma, eb,
802 reloc + reloc_offset[offset]);
Chris Wilson54cf91d2010-11-25 18:00:26 +0000803 if (ret)
804 goto err;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000805 }
806
807 /* Leave the user relocations as are, this is the painfully slow path,
808 * and we want to avoid the complication of dropping the lock whilst
809 * having buffers reserved in the aperture and so causing spurious
810 * ENOSPC for random operations.
811 */
812
813err:
814 drm_free_large(reloc);
Chris Wilsondd6864a2011-01-12 23:49:13 +0000815 drm_free_large(reloc_offset);
Chris Wilson54cf91d2010-11-25 18:00:26 +0000816 return ret;
817}
818
Chris Wilson54cf91d2010-11-25 18:00:26 +0000819static int
Chris Wilson432e58e2010-11-25 19:32:06 +0000820i915_gem_execbuffer_move_to_gpu(struct intel_ring_buffer *ring,
Ben Widawsky27173f12013-08-14 11:38:36 +0200821 struct list_head *vmas)
Chris Wilson54cf91d2010-11-25 18:00:26 +0000822{
Ben Widawsky27173f12013-08-14 11:38:36 +0200823 struct i915_vma *vma;
Daniel Vetter6ac42f42012-07-21 12:25:01 +0200824 uint32_t flush_domains = 0;
Chris Wilson000433b2013-08-08 14:41:09 +0100825 bool flush_chipset = false;
Chris Wilson432e58e2010-11-25 19:32:06 +0000826 int ret;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000827
Ben Widawsky27173f12013-08-14 11:38:36 +0200828 list_for_each_entry(vma, vmas, exec_list) {
829 struct drm_i915_gem_object *obj = vma->obj;
Ben Widawsky2911a352012-04-05 14:47:36 -0700830 ret = i915_gem_object_sync(obj, ring);
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000831 if (ret)
832 return ret;
Daniel Vetter6ac42f42012-07-21 12:25:01 +0200833
834 if (obj->base.write_domain & I915_GEM_DOMAIN_CPU)
Chris Wilson000433b2013-08-08 14:41:09 +0100835 flush_chipset |= i915_gem_clflush_object(obj, false);
Daniel Vetter6ac42f42012-07-21 12:25:01 +0200836
Daniel Vetter6ac42f42012-07-21 12:25:01 +0200837 flush_domains |= obj->base.write_domain;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000838 }
839
Chris Wilson000433b2013-08-08 14:41:09 +0100840 if (flush_chipset)
Ben Widawskye76e9ae2012-11-04 09:21:27 -0800841 i915_gem_chipset_flush(ring->dev);
Daniel Vetter6ac42f42012-07-21 12:25:01 +0200842
843 if (flush_domains & I915_GEM_DOMAIN_GTT)
844 wmb();
845
Chris Wilson09cf7c92012-07-13 14:14:08 +0100846 /* Unconditionally invalidate gpu caches and ensure that we do flush
847 * any residual writes from the previous batch.
848 */
Chris Wilsona7b97612012-07-20 12:41:08 +0100849 return intel_ring_invalidate_all_caches(ring);
Chris Wilson54cf91d2010-11-25 18:00:26 +0000850}
851
Chris Wilson432e58e2010-11-25 19:32:06 +0000852static bool
853i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
Chris Wilson54cf91d2010-11-25 18:00:26 +0000854{
Daniel Vettered5982e2013-01-17 22:23:36 +0100855 if (exec->flags & __I915_EXEC_UNKNOWN_FLAGS)
856 return false;
857
Chris Wilson432e58e2010-11-25 19:32:06 +0000858 return ((exec->batch_start_offset | exec->batch_len) & 0x7) == 0;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000859}
860
861static int
862validate_exec_list(struct drm_i915_gem_exec_object2 *exec,
863 int count)
864{
865 int i;
Daniel Vetterb205ca52013-09-19 14:00:11 +0200866 unsigned relocs_total = 0;
867 unsigned relocs_max = UINT_MAX / sizeof(struct drm_i915_gem_relocation_entry);
Chris Wilson54cf91d2010-11-25 18:00:26 +0000868
869 for (i = 0; i < count; i++) {
Ville Syrjälä2bb46292013-02-22 16:12:51 +0200870 char __user *ptr = to_user_ptr(exec[i].relocs_ptr);
Chris Wilson54cf91d2010-11-25 18:00:26 +0000871 int length; /* limited by fault_in_pages_readable() */
872
Daniel Vettered5982e2013-01-17 22:23:36 +0100873 if (exec[i].flags & __EXEC_OBJECT_UNKNOWN_FLAGS)
874 return -EINVAL;
875
Kees Cook3118a4f2013-03-11 17:31:45 -0700876 /* First check for malicious input causing overflow in
877 * the worst case where we need to allocate the entire
878 * relocation tree as a single array.
879 */
880 if (exec[i].relocation_count > relocs_max - relocs_total)
Chris Wilson54cf91d2010-11-25 18:00:26 +0000881 return -EINVAL;
Kees Cook3118a4f2013-03-11 17:31:45 -0700882 relocs_total += exec[i].relocation_count;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000883
884 length = exec[i].relocation_count *
885 sizeof(struct drm_i915_gem_relocation_entry);
Kees Cook30587532013-03-11 14:37:35 -0700886 /*
887 * We must check that the entire relocation array is safe
888 * to read, but since we may need to update the presumed
889 * offsets during execution, check for full write access.
890 */
Chris Wilson54cf91d2010-11-25 18:00:26 +0000891 if (!access_ok(VERIFY_WRITE, ptr, length))
892 return -EFAULT;
893
Xiong Zhang0b74b502013-07-19 13:51:24 +0800894 if (likely(!i915_prefault_disable)) {
895 if (fault_in_multipages_readable(ptr, length))
896 return -EFAULT;
897 }
Chris Wilson54cf91d2010-11-25 18:00:26 +0000898 }
899
900 return 0;
901}
902
Mika Kuoppalad299cce2013-11-26 16:14:33 +0200903static int
904i915_gem_validate_context(struct drm_device *dev, struct drm_file *file,
905 const u32 ctx_id)
906{
907 struct i915_ctx_hang_stats *hs;
908
909 hs = i915_gem_context_get_hang_stats(dev, file, ctx_id);
910 if (IS_ERR(hs))
911 return PTR_ERR(hs);
912
913 if (hs->banned) {
914 DRM_DEBUG("Context %u tried to submit while banned\n", ctx_id);
915 return -EIO;
916 }
917
918 return 0;
919}
920
Chris Wilson432e58e2010-11-25 19:32:06 +0000921static void
Ben Widawsky27173f12013-08-14 11:38:36 +0200922i915_gem_execbuffer_move_to_active(struct list_head *vmas,
Chris Wilson9d7730912012-11-27 16:22:52 +0000923 struct intel_ring_buffer *ring)
Chris Wilson432e58e2010-11-25 19:32:06 +0000924{
Ben Widawsky27173f12013-08-14 11:38:36 +0200925 struct i915_vma *vma;
Chris Wilson432e58e2010-11-25 19:32:06 +0000926
Ben Widawsky27173f12013-08-14 11:38:36 +0200927 list_for_each_entry(vma, vmas, exec_list) {
928 struct drm_i915_gem_object *obj = vma->obj;
Chris Wilson69c2fc82012-07-20 12:41:03 +0100929 u32 old_read = obj->base.read_domains;
930 u32 old_write = obj->base.write_domain;
Chris Wilsondb53a302011-02-03 11:57:46 +0000931
Chris Wilson432e58e2010-11-25 19:32:06 +0000932 obj->base.write_domain = obj->base.pending_write_domain;
Daniel Vettered5982e2013-01-17 22:23:36 +0100933 if (obj->base.write_domain == 0)
934 obj->base.pending_read_domains |= obj->base.read_domains;
935 obj->base.read_domains = obj->base.pending_read_domains;
Chris Wilson432e58e2010-11-25 19:32:06 +0000936 obj->fenced_gpu_access = obj->pending_fenced_gpu_access;
937
Ben Widawskye2d05a82013-09-24 09:57:58 -0700938 i915_vma_move_to_active(vma, ring);
Chris Wilson432e58e2010-11-25 19:32:06 +0000939 if (obj->base.write_domain) {
940 obj->dirty = 1;
Chris Wilson9d7730912012-11-27 16:22:52 +0000941 obj->last_write_seqno = intel_ring_get_seqno(ring);
Chris Wilsonacb87df2012-05-03 15:47:57 +0100942 if (obj->pin_count) /* check for potential scanout */
Chris Wilsonc65355b2013-06-06 16:53:41 -0300943 intel_mark_fb_busy(obj, ring);
Chris Wilson432e58e2010-11-25 19:32:06 +0000944 }
945
Chris Wilsondb53a302011-02-03 11:57:46 +0000946 trace_i915_gem_object_change_domain(obj, old_read, old_write);
Chris Wilson432e58e2010-11-25 19:32:06 +0000947 }
948}
949
Chris Wilson54cf91d2010-11-25 18:00:26 +0000950static void
951i915_gem_execbuffer_retire_commands(struct drm_device *dev,
Chris Wilson432e58e2010-11-25 19:32:06 +0000952 struct drm_file *file,
Mika Kuoppala7d736f42013-06-12 15:01:39 +0300953 struct intel_ring_buffer *ring,
954 struct drm_i915_gem_object *obj)
Chris Wilson54cf91d2010-11-25 18:00:26 +0000955{
Daniel Vettercc889e02012-06-13 20:45:19 +0200956 /* Unconditionally force add_request to emit a full flush. */
957 ring->gpu_caches_dirty = true;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000958
Chris Wilson432e58e2010-11-25 19:32:06 +0000959 /* Add a breadcrumb for the completion of the batch buffer */
Mika Kuoppala7d736f42013-06-12 15:01:39 +0300960 (void)__i915_add_request(ring, file, obj, NULL);
Chris Wilson432e58e2010-11-25 19:32:06 +0000961}
Chris Wilson54cf91d2010-11-25 18:00:26 +0000962
963static int
Eric Anholtae662d32012-01-03 09:23:29 -0800964i915_reset_gen7_sol_offsets(struct drm_device *dev,
965 struct intel_ring_buffer *ring)
966{
967 drm_i915_private_t *dev_priv = dev->dev_private;
968 int ret, i;
969
970 if (!IS_GEN7(dev) || ring != &dev_priv->ring[RCS])
971 return 0;
972
973 ret = intel_ring_begin(ring, 4 * 3);
974 if (ret)
975 return ret;
976
977 for (i = 0; i < 4; i++) {
978 intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
979 intel_ring_emit(ring, GEN7_SO_WRITE_OFFSET(i));
980 intel_ring_emit(ring, 0);
981 }
982
983 intel_ring_advance(ring);
984
985 return 0;
986}
987
988static int
Chris Wilson54cf91d2010-11-25 18:00:26 +0000989i915_gem_do_execbuffer(struct drm_device *dev, void *data,
990 struct drm_file *file,
991 struct drm_i915_gem_execbuffer2 *args,
Ben Widawsky28d6a7b2013-07-31 17:00:02 -0700992 struct drm_i915_gem_exec_object2 *exec,
993 struct i915_address_space *vm)
Chris Wilson54cf91d2010-11-25 18:00:26 +0000994{
995 drm_i915_private_t *dev_priv = dev->dev_private;
Ben Widawsky27173f12013-08-14 11:38:36 +0200996 struct eb_vmas *eb;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000997 struct drm_i915_gem_object *batch_obj;
998 struct drm_clip_rect *cliprects = NULL;
Chris Wilson54cf91d2010-11-25 18:00:26 +0000999 struct intel_ring_buffer *ring;
Mika Kuoppalad299cce2013-11-26 16:14:33 +02001000 const u32 ctx_id = i915_execbuffer2_get_context_id(*args);
Chris Wilsonc4e7a412010-11-30 14:10:25 +00001001 u32 exec_start, exec_len;
Daniel Vettered5982e2013-01-17 22:23:36 +01001002 u32 mask, flags;
Chris Wilson72bfa192010-12-19 11:42:05 +00001003 int ret, mode, i;
Daniel Vettered5982e2013-01-17 22:23:36 +01001004 bool need_relocs;
Chris Wilson54cf91d2010-11-25 18:00:26 +00001005
Daniel Vettered5982e2013-01-17 22:23:36 +01001006 if (!i915_gem_check_execbuffer(args))
Chris Wilson432e58e2010-11-25 19:32:06 +00001007 return -EINVAL;
Chris Wilson432e58e2010-11-25 19:32:06 +00001008
1009 ret = validate_exec_list(exec, args->buffer_count);
Chris Wilson54cf91d2010-11-25 18:00:26 +00001010 if (ret)
1011 return ret;
1012
Chris Wilsond7d4eed2012-10-17 12:09:54 +01001013 flags = 0;
1014 if (args->flags & I915_EXEC_SECURE) {
1015 if (!file->is_master || !capable(CAP_SYS_ADMIN))
1016 return -EPERM;
1017
1018 flags |= I915_DISPATCH_SECURE;
1019 }
Daniel Vetterb45305f2012-12-17 16:21:27 +01001020 if (args->flags & I915_EXEC_IS_PINNED)
1021 flags |= I915_DISPATCH_PINNED;
Chris Wilsond7d4eed2012-10-17 12:09:54 +01001022
Chris Wilson54cf91d2010-11-25 18:00:26 +00001023 switch (args->flags & I915_EXEC_RING_MASK) {
1024 case I915_EXEC_DEFAULT:
1025 case I915_EXEC_RENDER:
Chris Wilson1ec14ad2010-12-04 11:30:53 +00001026 ring = &dev_priv->ring[RCS];
Chris Wilson54cf91d2010-11-25 18:00:26 +00001027 break;
1028 case I915_EXEC_BSD:
Chris Wilson1ec14ad2010-12-04 11:30:53 +00001029 ring = &dev_priv->ring[VCS];
Chris Wilsone8520962013-07-03 17:22:07 +03001030 if (ctx_id != DEFAULT_CONTEXT_ID) {
Ben Widawsky6e0a69d2012-06-04 14:42:55 -07001031 DRM_DEBUG("Ring %s doesn't support contexts\n",
1032 ring->name);
1033 return -EPERM;
1034 }
Chris Wilson54cf91d2010-11-25 18:00:26 +00001035 break;
1036 case I915_EXEC_BLT:
Chris Wilson1ec14ad2010-12-04 11:30:53 +00001037 ring = &dev_priv->ring[BCS];
Chris Wilsone8520962013-07-03 17:22:07 +03001038 if (ctx_id != DEFAULT_CONTEXT_ID) {
Ben Widawsky6e0a69d2012-06-04 14:42:55 -07001039 DRM_DEBUG("Ring %s doesn't support contexts\n",
1040 ring->name);
1041 return -EPERM;
1042 }
Chris Wilson54cf91d2010-11-25 18:00:26 +00001043 break;
Xiang, Haihao82f91b62013-05-28 19:22:33 -07001044 case I915_EXEC_VEBOX:
1045 ring = &dev_priv->ring[VECS];
Chris Wilsone8520962013-07-03 17:22:07 +03001046 if (ctx_id != DEFAULT_CONTEXT_ID) {
Xiang, Haihao82f91b62013-05-28 19:22:33 -07001047 DRM_DEBUG("Ring %s doesn't support contexts\n",
1048 ring->name);
1049 return -EPERM;
1050 }
1051 break;
1052
Chris Wilson54cf91d2010-11-25 18:00:26 +00001053 default:
Daniel Vetterff240192012-01-31 21:08:14 +01001054 DRM_DEBUG("execbuf with unknown ring: %d\n",
Chris Wilson54cf91d2010-11-25 18:00:26 +00001055 (int)(args->flags & I915_EXEC_RING_MASK));
1056 return -EINVAL;
1057 }
Chris Wilsona15817c2012-05-11 14:29:31 +01001058 if (!intel_ring_initialized(ring)) {
1059 DRM_DEBUG("execbuf with invalid ring: %d\n",
1060 (int)(args->flags & I915_EXEC_RING_MASK));
1061 return -EINVAL;
1062 }
Chris Wilson54cf91d2010-11-25 18:00:26 +00001063
Chris Wilson72bfa192010-12-19 11:42:05 +00001064 mode = args->flags & I915_EXEC_CONSTANTS_MASK;
Ben Widawsky84f9f932011-12-12 19:21:58 -08001065 mask = I915_EXEC_CONSTANTS_MASK;
Chris Wilson72bfa192010-12-19 11:42:05 +00001066 switch (mode) {
1067 case I915_EXEC_CONSTANTS_REL_GENERAL:
1068 case I915_EXEC_CONSTANTS_ABSOLUTE:
1069 case I915_EXEC_CONSTANTS_REL_SURFACE:
1070 if (ring == &dev_priv->ring[RCS] &&
1071 mode != dev_priv->relative_constants_mode) {
1072 if (INTEL_INFO(dev)->gen < 4)
1073 return -EINVAL;
1074
1075 if (INTEL_INFO(dev)->gen > 5 &&
1076 mode == I915_EXEC_CONSTANTS_REL_SURFACE)
1077 return -EINVAL;
Ben Widawsky84f9f932011-12-12 19:21:58 -08001078
1079 /* The HW changed the meaning on this bit on gen6 */
1080 if (INTEL_INFO(dev)->gen >= 6)
1081 mask &= ~I915_EXEC_CONSTANTS_REL_SURFACE;
Chris Wilson72bfa192010-12-19 11:42:05 +00001082 }
1083 break;
1084 default:
Daniel Vetterff240192012-01-31 21:08:14 +01001085 DRM_DEBUG("execbuf with unknown constants: %d\n", mode);
Chris Wilson72bfa192010-12-19 11:42:05 +00001086 return -EINVAL;
1087 }
1088
Chris Wilson54cf91d2010-11-25 18:00:26 +00001089 if (args->buffer_count < 1) {
Daniel Vetterff240192012-01-31 21:08:14 +01001090 DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count);
Chris Wilson54cf91d2010-11-25 18:00:26 +00001091 return -EINVAL;
1092 }
Chris Wilson54cf91d2010-11-25 18:00:26 +00001093
1094 if (args->num_cliprects != 0) {
Chris Wilson1ec14ad2010-12-04 11:30:53 +00001095 if (ring != &dev_priv->ring[RCS]) {
Daniel Vetterff240192012-01-31 21:08:14 +01001096 DRM_DEBUG("clip rectangles are only valid with the render ring\n");
Chris Wilsonc4e7a412010-11-30 14:10:25 +00001097 return -EINVAL;
1098 }
1099
Daniel Vetter6ebebc92012-04-26 23:28:11 +02001100 if (INTEL_INFO(dev)->gen >= 5) {
1101 DRM_DEBUG("clip rectangles are only valid on pre-gen5\n");
1102 return -EINVAL;
1103 }
1104
Xi Wang44afb3a2012-04-23 04:06:42 -04001105 if (args->num_cliprects > UINT_MAX / sizeof(*cliprects)) {
1106 DRM_DEBUG("execbuf with %u cliprects\n",
1107 args->num_cliprects);
1108 return -EINVAL;
1109 }
Daniel Vetter5e13a0c2012-05-08 13:39:59 +02001110
Daniel Vettera1e22652013-09-21 00:35:38 +02001111 cliprects = kcalloc(args->num_cliprects,
1112 sizeof(*cliprects),
Chris Wilson54cf91d2010-11-25 18:00:26 +00001113 GFP_KERNEL);
1114 if (cliprects == NULL) {
1115 ret = -ENOMEM;
1116 goto pre_mutex_err;
1117 }
1118
Chris Wilson432e58e2010-11-25 19:32:06 +00001119 if (copy_from_user(cliprects,
Ville Syrjälä2bb46292013-02-22 16:12:51 +02001120 to_user_ptr(args->cliprects_ptr),
1121 sizeof(*cliprects)*args->num_cliprects)) {
Chris Wilson54cf91d2010-11-25 18:00:26 +00001122 ret = -EFAULT;
1123 goto pre_mutex_err;
1124 }
1125 }
1126
Paulo Zanonif65c9162013-11-27 18:20:34 -02001127 intel_runtime_pm_get(dev_priv);
1128
Chris Wilson54cf91d2010-11-25 18:00:26 +00001129 ret = i915_mutex_lock_interruptible(dev);
1130 if (ret)
1131 goto pre_mutex_err;
1132
Daniel Vetterdb1b76c2013-07-09 16:51:37 +02001133 if (dev_priv->ums.mm_suspended) {
Chris Wilson54cf91d2010-11-25 18:00:26 +00001134 mutex_unlock(&dev->struct_mutex);
1135 ret = -EBUSY;
1136 goto pre_mutex_err;
1137 }
1138
Mika Kuoppalad299cce2013-11-26 16:14:33 +02001139 ret = i915_gem_validate_context(dev, file, ctx_id);
1140 if (ret) {
1141 mutex_unlock(&dev->struct_mutex);
1142 goto pre_mutex_err;
1143 }
1144
Ben Widawsky17601cbc2013-11-25 09:54:38 -08001145 eb = eb_create(args);
Chris Wilson67731b82010-12-08 10:38:14 +00001146 if (eb == NULL) {
1147 mutex_unlock(&dev->struct_mutex);
1148 ret = -ENOMEM;
1149 goto pre_mutex_err;
1150 }
1151
Chris Wilson54cf91d2010-11-25 18:00:26 +00001152 /* Look up object handles */
Ben Widawsky27173f12013-08-14 11:38:36 +02001153 ret = eb_lookup_vmas(eb, exec, args, vm, file);
Chris Wilson3b96eff2013-01-08 10:53:14 +00001154 if (ret)
1155 goto err;
Chris Wilson54cf91d2010-11-25 18:00:26 +00001156
Chris Wilson6fe4f142011-01-10 17:35:37 +00001157 /* take note of the batch buffer before we might reorder the lists */
Ben Widawsky27173f12013-08-14 11:38:36 +02001158 batch_obj = list_entry(eb->vmas.prev, struct i915_vma, exec_list)->obj;
Chris Wilson6fe4f142011-01-10 17:35:37 +00001159
Chris Wilson54cf91d2010-11-25 18:00:26 +00001160 /* Move the objects en-masse into the GTT, evicting if necessary. */
Daniel Vettered5982e2013-01-17 22:23:36 +01001161 need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
Ben Widawsky27173f12013-08-14 11:38:36 +02001162 ret = i915_gem_execbuffer_reserve(ring, &eb->vmas, &need_relocs);
Chris Wilson54cf91d2010-11-25 18:00:26 +00001163 if (ret)
1164 goto err;
1165
1166 /* The objects are in their final locations, apply the relocations. */
Daniel Vettered5982e2013-01-17 22:23:36 +01001167 if (need_relocs)
Ben Widawsky17601cbc2013-11-25 09:54:38 -08001168 ret = i915_gem_execbuffer_relocate(eb);
Chris Wilson54cf91d2010-11-25 18:00:26 +00001169 if (ret) {
1170 if (ret == -EFAULT) {
Daniel Vettered5982e2013-01-17 22:23:36 +01001171 ret = i915_gem_execbuffer_relocate_slow(dev, args, file, ring,
Ben Widawsky27173f12013-08-14 11:38:36 +02001172 eb, exec);
Chris Wilson54cf91d2010-11-25 18:00:26 +00001173 BUG_ON(!mutex_is_locked(&dev->struct_mutex));
1174 }
1175 if (ret)
1176 goto err;
1177 }
1178
1179 /* Set the pending read domains for the batch buffer to COMMAND */
Chris Wilson54cf91d2010-11-25 18:00:26 +00001180 if (batch_obj->base.pending_write_domain) {
Daniel Vetterff240192012-01-31 21:08:14 +01001181 DRM_DEBUG("Attempting to use self-modifying batch buffer\n");
Chris Wilson54cf91d2010-11-25 18:00:26 +00001182 ret = -EINVAL;
1183 goto err;
1184 }
1185 batch_obj->base.pending_read_domains |= I915_GEM_DOMAIN_COMMAND;
1186
Chris Wilsond7d4eed2012-10-17 12:09:54 +01001187 /* snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure
1188 * batch" bit. Hence we need to pin secure batches into the global gtt.
Ben Widawsky28cf5412013-11-02 21:07:26 -07001189 * hsw should have this fixed, but bdw mucks it up again. */
Chris Wilsond7d4eed2012-10-17 12:09:54 +01001190 if (flags & I915_DISPATCH_SECURE && !batch_obj->has_global_gtt_mapping)
1191 i915_gem_gtt_bind_object(batch_obj, batch_obj->cache_level);
1192
Ben Widawsky27173f12013-08-14 11:38:36 +02001193 ret = i915_gem_execbuffer_move_to_gpu(ring, &eb->vmas);
Chris Wilson54cf91d2010-11-25 18:00:26 +00001194 if (ret)
1195 goto err;
1196
Eric Anholt0da5cec2012-07-23 12:33:55 -07001197 ret = i915_switch_context(ring, file, ctx_id);
1198 if (ret)
1199 goto err;
1200
Ben Widawskye2971bd2011-12-12 19:21:57 -08001201 if (ring == &dev_priv->ring[RCS] &&
1202 mode != dev_priv->relative_constants_mode) {
1203 ret = intel_ring_begin(ring, 4);
1204 if (ret)
1205 goto err;
1206
1207 intel_ring_emit(ring, MI_NOOP);
1208 intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
1209 intel_ring_emit(ring, INSTPM);
Ben Widawsky84f9f932011-12-12 19:21:58 -08001210 intel_ring_emit(ring, mask << 16 | mode);
Ben Widawskye2971bd2011-12-12 19:21:57 -08001211 intel_ring_advance(ring);
1212
1213 dev_priv->relative_constants_mode = mode;
1214 }
1215
Eric Anholtae662d32012-01-03 09:23:29 -08001216 if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
1217 ret = i915_reset_gen7_sol_offsets(dev, ring);
1218 if (ret)
1219 goto err;
1220 }
1221
Ben Widawsky28d6a7b2013-07-31 17:00:02 -07001222 exec_start = i915_gem_obj_offset(batch_obj, vm) +
1223 args->batch_start_offset;
Chris Wilsonc4e7a412010-11-30 14:10:25 +00001224 exec_len = args->batch_len;
1225 if (cliprects) {
1226 for (i = 0; i < args->num_cliprects; i++) {
1227 ret = i915_emit_box(dev, &cliprects[i],
1228 args->DR1, args->DR4);
1229 if (ret)
1230 goto err;
1231
1232 ret = ring->dispatch_execbuffer(ring,
Chris Wilsond7d4eed2012-10-17 12:09:54 +01001233 exec_start, exec_len,
1234 flags);
Chris Wilsonc4e7a412010-11-30 14:10:25 +00001235 if (ret)
1236 goto err;
1237 }
1238 } else {
Chris Wilsond7d4eed2012-10-17 12:09:54 +01001239 ret = ring->dispatch_execbuffer(ring,
1240 exec_start, exec_len,
1241 flags);
Chris Wilsonc4e7a412010-11-30 14:10:25 +00001242 if (ret)
1243 goto err;
1244 }
Chris Wilson54cf91d2010-11-25 18:00:26 +00001245
Chris Wilson9d7730912012-11-27 16:22:52 +00001246 trace_i915_gem_ring_dispatch(ring, intel_ring_get_seqno(ring), flags);
1247
Ben Widawsky27173f12013-08-14 11:38:36 +02001248 i915_gem_execbuffer_move_to_active(&eb->vmas, ring);
Mika Kuoppala7d736f42013-06-12 15:01:39 +03001249 i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
Chris Wilson54cf91d2010-11-25 18:00:26 +00001250
1251err:
Chris Wilson67731b82010-12-08 10:38:14 +00001252 eb_destroy(eb);
Chris Wilson54cf91d2010-11-25 18:00:26 +00001253
1254 mutex_unlock(&dev->struct_mutex);
1255
1256pre_mutex_err:
Chris Wilson54cf91d2010-11-25 18:00:26 +00001257 kfree(cliprects);
Paulo Zanonif65c9162013-11-27 18:20:34 -02001258
1259 /* intel_gpu_busy should also get a ref, so it will free when the device
1260 * is really idle. */
1261 intel_runtime_pm_put(dev_priv);
Chris Wilson54cf91d2010-11-25 18:00:26 +00001262 return ret;
1263}
1264
1265/*
1266 * Legacy execbuffer just creates an exec2 list from the original exec object
1267 * list array and passes it to the real function.
1268 */
1269int
1270i915_gem_execbuffer(struct drm_device *dev, void *data,
1271 struct drm_file *file)
1272{
Ben Widawsky28d6a7b2013-07-31 17:00:02 -07001273 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilson54cf91d2010-11-25 18:00:26 +00001274 struct drm_i915_gem_execbuffer *args = data;
1275 struct drm_i915_gem_execbuffer2 exec2;
1276 struct drm_i915_gem_exec_object *exec_list = NULL;
1277 struct drm_i915_gem_exec_object2 *exec2_list = NULL;
1278 int ret, i;
1279
Chris Wilson54cf91d2010-11-25 18:00:26 +00001280 if (args->buffer_count < 1) {
Daniel Vetterff240192012-01-31 21:08:14 +01001281 DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count);
Chris Wilson54cf91d2010-11-25 18:00:26 +00001282 return -EINVAL;
1283 }
1284
1285 /* Copy in the exec list from userland */
1286 exec_list = drm_malloc_ab(sizeof(*exec_list), args->buffer_count);
1287 exec2_list = drm_malloc_ab(sizeof(*exec2_list), args->buffer_count);
1288 if (exec_list == NULL || exec2_list == NULL) {
Daniel Vetterff240192012-01-31 21:08:14 +01001289 DRM_DEBUG("Failed to allocate exec list for %d buffers\n",
Chris Wilson54cf91d2010-11-25 18:00:26 +00001290 args->buffer_count);
1291 drm_free_large(exec_list);
1292 drm_free_large(exec2_list);
1293 return -ENOMEM;
1294 }
1295 ret = copy_from_user(exec_list,
Ville Syrjälä2bb46292013-02-22 16:12:51 +02001296 to_user_ptr(args->buffers_ptr),
Chris Wilson54cf91d2010-11-25 18:00:26 +00001297 sizeof(*exec_list) * args->buffer_count);
1298 if (ret != 0) {
Daniel Vetterff240192012-01-31 21:08:14 +01001299 DRM_DEBUG("copy %d exec entries failed %d\n",
Chris Wilson54cf91d2010-11-25 18:00:26 +00001300 args->buffer_count, ret);
1301 drm_free_large(exec_list);
1302 drm_free_large(exec2_list);
1303 return -EFAULT;
1304 }
1305
1306 for (i = 0; i < args->buffer_count; i++) {
1307 exec2_list[i].handle = exec_list[i].handle;
1308 exec2_list[i].relocation_count = exec_list[i].relocation_count;
1309 exec2_list[i].relocs_ptr = exec_list[i].relocs_ptr;
1310 exec2_list[i].alignment = exec_list[i].alignment;
1311 exec2_list[i].offset = exec_list[i].offset;
1312 if (INTEL_INFO(dev)->gen < 4)
1313 exec2_list[i].flags = EXEC_OBJECT_NEEDS_FENCE;
1314 else
1315 exec2_list[i].flags = 0;
1316 }
1317
1318 exec2.buffers_ptr = args->buffers_ptr;
1319 exec2.buffer_count = args->buffer_count;
1320 exec2.batch_start_offset = args->batch_start_offset;
1321 exec2.batch_len = args->batch_len;
1322 exec2.DR1 = args->DR1;
1323 exec2.DR4 = args->DR4;
1324 exec2.num_cliprects = args->num_cliprects;
1325 exec2.cliprects_ptr = args->cliprects_ptr;
1326 exec2.flags = I915_EXEC_RENDER;
Ben Widawsky6e0a69d2012-06-04 14:42:55 -07001327 i915_execbuffer2_set_context_id(exec2, 0);
Chris Wilson54cf91d2010-11-25 18:00:26 +00001328
Ben Widawsky28d6a7b2013-07-31 17:00:02 -07001329 ret = i915_gem_do_execbuffer(dev, data, file, &exec2, exec2_list,
1330 &dev_priv->gtt.base);
Chris Wilson54cf91d2010-11-25 18:00:26 +00001331 if (!ret) {
1332 /* Copy the new buffer offsets back to the user's exec list. */
1333 for (i = 0; i < args->buffer_count; i++)
1334 exec_list[i].offset = exec2_list[i].offset;
1335 /* ... and back out to userspace */
Ville Syrjälä2bb46292013-02-22 16:12:51 +02001336 ret = copy_to_user(to_user_ptr(args->buffers_ptr),
Chris Wilson54cf91d2010-11-25 18:00:26 +00001337 exec_list,
1338 sizeof(*exec_list) * args->buffer_count);
1339 if (ret) {
1340 ret = -EFAULT;
Daniel Vetterff240192012-01-31 21:08:14 +01001341 DRM_DEBUG("failed to copy %d exec entries "
Chris Wilson54cf91d2010-11-25 18:00:26 +00001342 "back to user (%d)\n",
1343 args->buffer_count, ret);
1344 }
1345 }
1346
1347 drm_free_large(exec_list);
1348 drm_free_large(exec2_list);
1349 return ret;
1350}
1351
1352int
1353i915_gem_execbuffer2(struct drm_device *dev, void *data,
1354 struct drm_file *file)
1355{
Ben Widawsky28d6a7b2013-07-31 17:00:02 -07001356 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilson54cf91d2010-11-25 18:00:26 +00001357 struct drm_i915_gem_execbuffer2 *args = data;
1358 struct drm_i915_gem_exec_object2 *exec2_list = NULL;
1359 int ret;
1360
Xi Wanged8cd3b2012-04-23 04:06:41 -04001361 if (args->buffer_count < 1 ||
1362 args->buffer_count > UINT_MAX / sizeof(*exec2_list)) {
Daniel Vetterff240192012-01-31 21:08:14 +01001363 DRM_DEBUG("execbuf2 with %d buffers\n", args->buffer_count);
Chris Wilson54cf91d2010-11-25 18:00:26 +00001364 return -EINVAL;
1365 }
1366
Chris Wilson8408c282011-02-21 12:54:48 +00001367 exec2_list = kmalloc(sizeof(*exec2_list)*args->buffer_count,
Chris Wilson419fa722013-01-08 10:53:13 +00001368 GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
Chris Wilson8408c282011-02-21 12:54:48 +00001369 if (exec2_list == NULL)
1370 exec2_list = drm_malloc_ab(sizeof(*exec2_list),
1371 args->buffer_count);
Chris Wilson54cf91d2010-11-25 18:00:26 +00001372 if (exec2_list == NULL) {
Daniel Vetterff240192012-01-31 21:08:14 +01001373 DRM_DEBUG("Failed to allocate exec list for %d buffers\n",
Chris Wilson54cf91d2010-11-25 18:00:26 +00001374 args->buffer_count);
1375 return -ENOMEM;
1376 }
1377 ret = copy_from_user(exec2_list,
Ville Syrjälä2bb46292013-02-22 16:12:51 +02001378 to_user_ptr(args->buffers_ptr),
Chris Wilson54cf91d2010-11-25 18:00:26 +00001379 sizeof(*exec2_list) * args->buffer_count);
1380 if (ret != 0) {
Daniel Vetterff240192012-01-31 21:08:14 +01001381 DRM_DEBUG("copy %d exec entries failed %d\n",
Chris Wilson54cf91d2010-11-25 18:00:26 +00001382 args->buffer_count, ret);
1383 drm_free_large(exec2_list);
1384 return -EFAULT;
1385 }
1386
Ben Widawsky28d6a7b2013-07-31 17:00:02 -07001387 ret = i915_gem_do_execbuffer(dev, data, file, args, exec2_list,
1388 &dev_priv->gtt.base);
Chris Wilson54cf91d2010-11-25 18:00:26 +00001389 if (!ret) {
1390 /* Copy the new buffer offsets back to the user's exec list. */
Ville Syrjälä2bb46292013-02-22 16:12:51 +02001391 ret = copy_to_user(to_user_ptr(args->buffers_ptr),
Chris Wilson54cf91d2010-11-25 18:00:26 +00001392 exec2_list,
1393 sizeof(*exec2_list) * args->buffer_count);
1394 if (ret) {
1395 ret = -EFAULT;
Daniel Vetterff240192012-01-31 21:08:14 +01001396 DRM_DEBUG("failed to copy %d exec entries "
Chris Wilson54cf91d2010-11-25 18:00:26 +00001397 "back to user (%d)\n",
1398 args->buffer_count, ret);
1399 }
1400 }
1401
1402 drm_free_large(exec2_list);
1403 return ret;
1404}