Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 1 | #ifndef WILC_WLAN_H |
| 2 | #define WILC_WLAN_H |
| 3 | |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 4 | #define ISWILC1000(id) ((id & 0xfffff000) == 0x100000 ? 1 : 0) |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 5 | /******************************************** |
| 6 | * |
| 7 | * Mac eth header length |
| 8 | * |
| 9 | ********************************************/ |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 10 | #define DRIVER_HANDLER_SIZE 4 |
| 11 | #define MAX_MAC_HDR_LEN 26 /* QOS_MAC_HDR_LEN */ |
| 12 | #define SUB_MSDU_HEADER_LENGTH 14 |
| 13 | #define SNAP_HDR_LEN 8 |
| 14 | #define ETHERNET_HDR_LEN 14 |
| 15 | #define WORD_ALIGNMENT_PAD 0 |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 16 | |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 17 | #define ETH_ETHERNET_HDR_OFFSET (MAX_MAC_HDR_LEN + \ |
| 18 | SUB_MSDU_HEADER_LENGTH + \ |
| 19 | SNAP_HDR_LEN - \ |
| 20 | ETHERNET_HDR_LEN + \ |
| 21 | WORD_ALIGNMENT_PAD) |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 22 | |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 23 | #define HOST_HDR_OFFSET 4 |
| 24 | #define ETHERNET_HDR_LEN 14 |
| 25 | #define IP_HDR_LEN 20 |
| 26 | #define IP_HDR_OFFSET ETHERNET_HDR_LEN |
| 27 | #define UDP_HDR_OFFSET (IP_HDR_LEN + IP_HDR_OFFSET) |
| 28 | #define UDP_HDR_LEN 8 |
| 29 | #define UDP_DATA_OFFSET (UDP_HDR_OFFSET + UDP_HDR_LEN) |
| 30 | #define ETH_CONFIG_PKT_HDR_LEN UDP_DATA_OFFSET |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 31 | |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 32 | #define ETH_CONFIG_PKT_HDR_OFFSET (ETH_ETHERNET_HDR_OFFSET + \ |
| 33 | ETH_CONFIG_PKT_HDR_LEN) |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 34 | |
| 35 | /******************************************** |
| 36 | * |
| 37 | * Endian Conversion |
| 38 | * |
| 39 | ********************************************/ |
| 40 | |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 41 | #define BYTE_SWAP(val) (((val & 0x000000FF) << 24) + \ |
| 42 | ((val & 0x0000FF00) << 8) + \ |
| 43 | ((val & 0x00FF0000) >> 8) + \ |
| 44 | ((val & 0xFF000000) >> 24)) |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 45 | |
| 46 | /******************************************** |
| 47 | * |
| 48 | * Register Defines |
| 49 | * |
| 50 | ********************************************/ |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 51 | #define WILC_PERIPH_REG_BASE 0x1000 |
| 52 | #define WILC_CHANGING_VIR_IF 0x108c |
| 53 | #define WILC_CHIPID WILC_PERIPH_REG_BASE |
| 54 | #define WILC_GLB_RESET_0 (WILC_PERIPH_REG_BASE + 0x400) |
| 55 | #define WILC_PIN_MUX_0 (WILC_PERIPH_REG_BASE + 0x408) |
| 56 | #define WILC_HOST_TX_CTRL (WILC_PERIPH_REG_BASE + 0x6c) |
| 57 | #define WILC_HOST_RX_CTRL_0 (WILC_PERIPH_REG_BASE + 0x70) |
| 58 | #define WILC_HOST_RX_CTRL_1 (WILC_PERIPH_REG_BASE + 0x74) |
| 59 | #define WILC_HOST_VMM_CTL (WILC_PERIPH_REG_BASE + 0x78) |
| 60 | #define WILC_HOST_RX_CTRL (WILC_PERIPH_REG_BASE + 0x80) |
| 61 | #define WILC_HOST_RX_EXTRA_SIZE (WILC_PERIPH_REG_BASE + 0x84) |
| 62 | #define WILC_HOST_TX_CTRL_1 (WILC_PERIPH_REG_BASE + 0x88) |
| 63 | #define WILC_MISC (WILC_PERIPH_REG_BASE + 0x428) |
| 64 | #define WILC_INTR_REG_BASE (WILC_PERIPH_REG_BASE + 0xa00) |
| 65 | #define WILC_INTR_ENABLE WILC_INTR_REG_BASE |
| 66 | #define WILC_INTR2_ENABLE (WILC_INTR_REG_BASE + 4) |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 67 | |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 68 | #define WILC_INTR_POLARITY (WILC_INTR_REG_BASE + 0x10) |
| 69 | #define WILC_INTR_TYPE (WILC_INTR_REG_BASE + 0x20) |
| 70 | #define WILC_INTR_CLEAR (WILC_INTR_REG_BASE + 0x30) |
| 71 | #define WILC_INTR_STATUS (WILC_INTR_REG_BASE + 0x40) |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 72 | |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 73 | #define WILC_VMM_TBL_SIZE 64 |
| 74 | #define WILC_VMM_TX_TBL_BASE 0x150400 |
| 75 | #define WILC_VMM_RX_TBL_BASE 0x150500 |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 76 | |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 77 | #define WILC_VMM_BASE 0x150000 |
| 78 | #define WILC_VMM_CORE_CTL WILC_VMM_BASE |
| 79 | #define WILC_VMM_TBL_CTL (WILC_VMM_BASE + 0x4) |
| 80 | #define WILC_VMM_TBL_ENTRY (WILC_VMM_BASE + 0x8) |
| 81 | #define WILC_VMM_TBL0_SIZE (WILC_VMM_BASE + 0xc) |
| 82 | #define WILC_VMM_TO_HOST_SIZE (WILC_VMM_BASE + 0x10) |
| 83 | #define WILC_VMM_CORE_CFG (WILC_VMM_BASE + 0x14) |
| 84 | #define WILC_VMM_TBL_ACTIVE (WILC_VMM_BASE + 040) |
| 85 | #define WILC_VMM_TBL_STATUS (WILC_VMM_BASE + 0x44) |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 86 | |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 87 | #define WILC_SPI_REG_BASE 0xe800 |
| 88 | #define WILC_SPI_CTL WILC_SPI_REG_BASE |
| 89 | #define WILC_SPI_MASTER_DMA_ADDR (WILC_SPI_REG_BASE + 0x4) |
| 90 | #define WILC_SPI_MASTER_DMA_COUNT (WILC_SPI_REG_BASE + 0x8) |
| 91 | #define WILC_SPI_SLAVE_DMA_ADDR (WILC_SPI_REG_BASE + 0xc) |
| 92 | #define WILC_SPI_SLAVE_DMA_COUNT (WILC_SPI_REG_BASE + 0x10) |
| 93 | #define WILC_SPI_TX_MODE (WILC_SPI_REG_BASE + 0x20) |
| 94 | #define WILC_SPI_PROTOCOL_CONFIG (WILC_SPI_REG_BASE + 0x24) |
| 95 | #define WILC_SPI_INTR_CTL (WILC_SPI_REG_BASE + 0x2c) |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 96 | |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 97 | #define WILC_SPI_PROTOCOL_OFFSET (WILC_SPI_PROTOCOL_CONFIG - \ |
| 98 | WILC_SPI_REG_BASE) |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 99 | |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 100 | #define WILC_AHB_DATA_MEM_BASE 0x30000 |
| 101 | #define WILC_AHB_SHARE_MEM_BASE 0xd0000 |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 102 | |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 103 | #define WILC_VMM_TBL_RX_SHADOW_BASE WILC_AHB_SHARE_MEM_BASE |
| 104 | #define WILC_VMM_TBL_RX_SHADOW_SIZE 256 |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 105 | |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 106 | #define WILC_GP_REG_0 0x149c |
| 107 | #define WILC_GP_REG_1 0x14a0 |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 108 | |
Leo Kim | 97c14e8 | 2015-11-06 11:19:57 +0900 | [diff] [blame] | 109 | #define WILC_HAVE_SDIO_IRQ_GPIO BIT(0) |
| 110 | #define WILC_HAVE_USE_PMU BIT(1) |
| 111 | #define WILC_HAVE_SLEEP_CLK_SRC_RTC BIT(2) |
| 112 | #define WILC_HAVE_SLEEP_CLK_SRC_XO BIT(3) |
| 113 | #define WILC_HAVE_EXT_PA_INV_TX_RX BIT(4) |
| 114 | #define WILC_HAVE_LEGACY_RF_SETTINGS BIT(5) |
| 115 | #define WILC_HAVE_XTAL_24 BIT(6) |
| 116 | #define WILC_HAVE_DISABLE_WILC_UART BIT(7) |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 117 | |
| 118 | /******************************************** |
| 119 | * |
| 120 | * Wlan Defines |
| 121 | * |
| 122 | ********************************************/ |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 123 | #define WILC_CFG_PKT 1 |
| 124 | #define WILC_NET_PKT 0 |
| 125 | #define WILC_MGMT_PKT 2 |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 126 | |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 127 | #define WILC_CFG_SET 1 |
| 128 | #define WILC_CFG_QUERY 0 |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 129 | |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 130 | #define WILC_CFG_RSP 1 |
| 131 | #define WILC_CFG_RSP_STATUS 2 |
| 132 | #define WILC_CFG_RSP_SCAN 3 |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 133 | |
| 134 | #ifdef WILC_SDIO |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 135 | #define WILC_PLL_TO 4 |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 136 | #else |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 137 | #define WILC_PLL_TO 2 |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 138 | #endif |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 139 | #define ABORT_INT BIT(31) |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 140 | |
| 141 | /*******************************************/ |
| 142 | /* E0 and later Interrupt flags. */ |
| 143 | /*******************************************/ |
| 144 | /*******************************************/ |
| 145 | /* E0 and later Interrupt flags. */ |
| 146 | /* IRQ Status word */ |
| 147 | /* 15:0 = DMA count in words. */ |
| 148 | /* 16: INT0 flag */ |
| 149 | /* 17: INT1 flag */ |
| 150 | /* 18: INT2 flag */ |
| 151 | /* 19: INT3 flag */ |
| 152 | /* 20: INT4 flag */ |
| 153 | /* 21: INT5 flag */ |
| 154 | /*******************************************/ |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 155 | #define IRG_FLAGS_OFFSET 16 |
| 156 | #define IRQ_DMA_WD_CNT_MASK ((1ul << IRG_FLAGS_OFFSET) - 1) |
Leo Kim | 97c14e8 | 2015-11-06 11:19:57 +0900 | [diff] [blame] | 157 | #define INT_0 BIT(IRG_FLAGS_OFFSET) |
| 158 | #define INT_1 BIT(IRG_FLAGS_OFFSET + 1) |
| 159 | #define INT_2 BIT(IRG_FLAGS_OFFSET + 2) |
| 160 | #define INT_3 BIT(IRG_FLAGS_OFFSET + 3) |
| 161 | #define INT_4 BIT(IRG_FLAGS_OFFSET + 4) |
| 162 | #define INT_5 BIT(IRG_FLAGS_OFFSET + 5) |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 163 | #define MAX_NUM_INT 6 |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 164 | |
| 165 | /*******************************************/ |
| 166 | /* E0 and later Interrupt flags. */ |
| 167 | /* IRQ Clear word */ |
| 168 | /* 0: Clear INT0 */ |
| 169 | /* 1: Clear INT1 */ |
| 170 | /* 2: Clear INT2 */ |
| 171 | /* 3: Clear INT3 */ |
| 172 | /* 4: Clear INT4 */ |
| 173 | /* 5: Clear INT5 */ |
| 174 | /* 6: Select VMM table 1 */ |
| 175 | /* 7: Select VMM table 2 */ |
| 176 | /* 8: Enable VMM */ |
| 177 | /*******************************************/ |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 178 | #define CLR_INT0 BIT(0) |
| 179 | #define CLR_INT1 BIT(1) |
| 180 | #define CLR_INT2 BIT(2) |
| 181 | #define CLR_INT3 BIT(3) |
| 182 | #define CLR_INT4 BIT(4) |
| 183 | #define CLR_INT5 BIT(5) |
| 184 | #define SEL_VMM_TBL0 BIT(6) |
| 185 | #define SEL_VMM_TBL1 BIT(7) |
| 186 | #define EN_VMM BIT(8) |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 187 | |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 188 | #define DATA_INT_EXT INT_0 |
| 189 | #define PLL_INT_EXT INT_1 |
| 190 | #define SLEEP_INT_EXT INT_2 |
| 191 | #define ALL_INT_EXT (DATA_INT_EXT | PLL_INT_EXT | SLEEP_INT_EXT) |
| 192 | #define NUM_INT_EXT 3 |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 193 | |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 194 | #define DATA_INT_CLR CLR_INT0 |
| 195 | #define PLL_INT_CLR CLR_INT1 |
| 196 | #define SLEEP_INT_CLR CLR_INT2 |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 197 | |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 198 | #define ENABLE_RX_VMM (SEL_VMM_TBL1 | EN_VMM) |
| 199 | #define ENABLE_TX_VMM (SEL_VMM_TBL0 | EN_VMM) |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 200 | /*time for expiring the semaphores of cfg packets*/ |
| 201 | #define CFG_PKTS_TIMEOUT 2000 |
| 202 | /******************************************** |
| 203 | * |
| 204 | * Debug Type |
| 205 | * |
| 206 | ********************************************/ |
Chaehyun Lim | fbc2fe1 | 2015-09-15 14:06:16 +0900 | [diff] [blame] | 207 | typedef void (*wilc_debug_func)(u32, char *, ...); |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 208 | |
| 209 | /******************************************** |
| 210 | * |
| 211 | * Tx/Rx Queue Structure |
| 212 | * |
| 213 | ********************************************/ |
| 214 | |
| 215 | struct txq_entry_t { |
| 216 | struct txq_entry_t *next; |
| 217 | struct txq_entry_t *prev; |
| 218 | int type; |
Leo Kim | 8e55639 | 2015-11-06 11:19:51 +0900 | [diff] [blame] | 219 | int index; |
Chaehyun Lim | 51e825f | 2015-09-15 14:06:14 +0900 | [diff] [blame] | 220 | u8 *buffer; |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 221 | int buffer_size; |
| 222 | void *priv; |
| 223 | int status; |
| 224 | void (*tx_complete_func)(void *, int); |
| 225 | }; |
| 226 | |
| 227 | struct rxq_entry_t { |
| 228 | struct rxq_entry_t *next; |
Chaehyun Lim | 51e825f | 2015-09-15 14:06:14 +0900 | [diff] [blame] | 229 | u8 *buffer; |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 230 | int buffer_size; |
| 231 | }; |
| 232 | |
| 233 | /******************************************** |
| 234 | * |
| 235 | * Host IF Structure |
| 236 | * |
| 237 | ********************************************/ |
Glen Lee | 9c80032 | 2015-11-06 18:40:22 +0900 | [diff] [blame] | 238 | struct wilc; |
Leo Kim | 48d0aa9 | 2015-11-06 11:20:02 +0900 | [diff] [blame] | 239 | struct wilc_hif_func { |
Glen Lee | 9c80032 | 2015-11-06 18:40:22 +0900 | [diff] [blame] | 240 | int (*hif_init)(struct wilc *, wilc_debug_func); |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 241 | int (*hif_deinit)(void *); |
Chaehyun Lim | fbc2fe1 | 2015-09-15 14:06:16 +0900 | [diff] [blame] | 242 | int (*hif_read_reg)(u32, u32 *); |
| 243 | int (*hif_write_reg)(u32, u32); |
| 244 | int (*hif_block_rx)(u32, u8 *, u32); |
| 245 | int (*hif_block_tx)(u32, u8 *, u32); |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 246 | int (*hif_sync)(void); |
| 247 | int (*hif_clear_int)(void); |
Chaehyun Lim | fbc2fe1 | 2015-09-15 14:06:16 +0900 | [diff] [blame] | 248 | int (*hif_read_int)(u32 *); |
| 249 | int (*hif_clear_int_ext)(u32); |
| 250 | int (*hif_read_size)(u32 *); |
| 251 | int (*hif_block_tx_ext)(u32, u8 *, u32); |
| 252 | int (*hif_block_rx_ext)(u32, u8 *, u32); |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 253 | int (*hif_sync_ext)(int); |
| 254 | void (*hif_set_max_bus_speed)(void); |
| 255 | void (*hif_set_default_bus_speed)(void); |
Leo Kim | 48d0aa9 | 2015-11-06 11:20:02 +0900 | [diff] [blame] | 256 | }; |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 257 | |
| 258 | /******************************************** |
| 259 | * |
| 260 | * Configuration Structure |
| 261 | * |
| 262 | ********************************************/ |
| 263 | |
Leo Kim | 7cf241a | 2015-11-06 11:19:56 +0900 | [diff] [blame] | 264 | #define MAX_CFG_FRAME_SIZE 1468 |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 265 | |
Leo Kim | 14cdc0a | 2015-11-06 11:19:59 +0900 | [diff] [blame] | 266 | struct wilc_cfg_frame { |
Chaehyun Lim | 51e825f | 2015-09-15 14:06:14 +0900 | [diff] [blame] | 267 | u8 ether_header[14]; |
| 268 | u8 ip_header[20]; |
| 269 | u8 udp_header[8]; |
| 270 | u8 wid_header[8]; |
| 271 | u8 frame[MAX_CFG_FRAME_SIZE]; |
Leo Kim | 14cdc0a | 2015-11-06 11:19:59 +0900 | [diff] [blame] | 272 | }; |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 273 | |
Leo Kim | bcddd48 | 2015-11-06 11:20:01 +0900 | [diff] [blame] | 274 | struct wilc_cfg_rsp { |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 275 | int type; |
Chaehyun Lim | fbc2fe1 | 2015-09-15 14:06:16 +0900 | [diff] [blame] | 276 | u32 seq_no; |
Leo Kim | bcddd48 | 2015-11-06 11:20:01 +0900 | [diff] [blame] | 277 | }; |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 278 | |
Glen Lee | 63d7ab8 | 2015-10-01 16:03:32 +0900 | [diff] [blame] | 279 | int wilc_wlan_firmware_download(const u8 *buffer, u32 buffer_size); |
Glen Lee | e42563b | 2015-10-01 16:03:33 +0900 | [diff] [blame] | 280 | int wilc_wlan_start(void); |
Glen Lee | 8cec741 | 2015-10-01 16:03:34 +0900 | [diff] [blame] | 281 | int wilc_wlan_stop(void); |
Glen Lee | 691bbd4 | 2015-10-27 18:28:02 +0900 | [diff] [blame] | 282 | int wilc_wlan_txq_add_net_pkt(struct net_device *dev, void *priv, u8 *buffer, |
| 283 | u32 buffer_size, wilc_tx_complete_func_t func); |
Leo Kim | b1d1929 | 2015-11-06 11:13:01 +0900 | [diff] [blame] | 284 | int wilc_wlan_handle_txq(struct net_device *dev, u32 *txq_count); |
Glen Lee | 50b929e | 2015-10-27 18:27:40 +0900 | [diff] [blame] | 285 | void wilc_handle_isr(void *wilc); |
Glen Lee | 2de7cbe | 2015-10-27 18:27:54 +0900 | [diff] [blame] | 286 | void wilc_wlan_cleanup(struct net_device *dev); |
Glen Lee | 1028e5a | 2015-10-01 16:03:40 +0900 | [diff] [blame] | 287 | int wilc_wlan_cfg_set(int start, u32 wid, u8 *buffer, u32 buffer_size, |
Leo Kim | 9cd034b | 2015-11-06 11:13:09 +0900 | [diff] [blame] | 288 | int commit, u32 drv_handler); |
Leo Kim | 4878bd6 | 2015-11-06 11:13:10 +0900 | [diff] [blame] | 289 | int wilc_wlan_cfg_get(int start, u32 wid, int commit, u32 drv_handler); |
Glen Lee | 894de36b | 2015-10-01 16:03:42 +0900 | [diff] [blame] | 290 | int wilc_wlan_cfg_get_val(u32 wid, u8 *buffer, u32 buffer_size); |
Glen Lee | 829c477 | 2015-10-29 12:18:44 +0900 | [diff] [blame] | 291 | int wilc_wlan_txq_add_mgmt_pkt(struct net_device *dev, void *priv, u8 *buffer, |
| 292 | u32 buffer_size, wilc_tx_complete_func_t func); |
Arnd Bergmann | 0e1af73 | 2015-11-16 15:04:54 +0100 | [diff] [blame^] | 293 | void wilc_chip_sleep_manually(void); |
Johnny Kim | c5c77ba | 2015-05-11 14:30:56 +0900 | [diff] [blame] | 294 | #endif |