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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * sata_vsc.c - Vitesse VSC7174 4 port DPA SATA
3 *
4 * Maintained by: Jeremy Higdon @ SGI
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2004 SGI
9 *
10 * Bits from Jeff Garzik, Copyright RedHat, Inc.
11 *
Jeff Garzikaf36d7f2005-08-28 20:18:39 -040012 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2, or (at your option)
16 * any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; see the file COPYING. If not, write to
25 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
26 *
27 *
28 * libata documentation is available via 'make {ps|pdf}docs',
29 * as Documentation/DocBook/libata.*
30 *
31 * Vitesse hardware documentation presumably available under NDA.
32 * Intel 31244 (same hardware interface) documentation presumably
33 * available from http://developer.intel.com/
34 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070035 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/pci.h>
40#include <linux/init.h>
41#include <linux/blkdev.h>
42#include <linux/delay.h>
43#include <linux/interrupt.h>
domen@coderock.org7003c052005-04-08 09:53:09 +020044#include <linux/dma-mapping.h>
Jeff Garzika9524a72005-10-30 14:39:11 -050045#include <linux/device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070046#include <scsi/scsi_host.h>
47#include <linux/libata.h>
48
49#define DRV_NAME "sata_vsc"
Jeff Garzik2a3103c2007-08-31 04:54:06 -040050#define DRV_VERSION "2.3"
Linus Torvalds1da177e2005-04-16 15:20:36 -070051
Jeff Garzik55cca652006-03-21 22:14:17 -050052enum {
Tejun Heo0d5ff562007-02-01 15:06:36 +090053 VSC_MMIO_BAR = 0,
54
Jeff Garzik55cca652006-03-21 22:14:17 -050055 /* Interrupt register offsets (from chip base address) */
56 VSC_SATA_INT_STAT_OFFSET = 0x00,
57 VSC_SATA_INT_MASK_OFFSET = 0x04,
Linus Torvalds1da177e2005-04-16 15:20:36 -070058
Jeff Garzik55cca652006-03-21 22:14:17 -050059 /* Taskfile registers offsets */
60 VSC_SATA_TF_CMD_OFFSET = 0x00,
61 VSC_SATA_TF_DATA_OFFSET = 0x00,
62 VSC_SATA_TF_ERROR_OFFSET = 0x04,
63 VSC_SATA_TF_FEATURE_OFFSET = 0x06,
64 VSC_SATA_TF_NSECT_OFFSET = 0x08,
65 VSC_SATA_TF_LBAL_OFFSET = 0x0c,
66 VSC_SATA_TF_LBAM_OFFSET = 0x10,
67 VSC_SATA_TF_LBAH_OFFSET = 0x14,
68 VSC_SATA_TF_DEVICE_OFFSET = 0x18,
69 VSC_SATA_TF_STATUS_OFFSET = 0x1c,
70 VSC_SATA_TF_COMMAND_OFFSET = 0x1d,
71 VSC_SATA_TF_ALTSTATUS_OFFSET = 0x28,
72 VSC_SATA_TF_CTL_OFFSET = 0x29,
Linus Torvalds1da177e2005-04-16 15:20:36 -070073
Jeff Garzik55cca652006-03-21 22:14:17 -050074 /* DMA base */
75 VSC_SATA_UP_DESCRIPTOR_OFFSET = 0x64,
76 VSC_SATA_UP_DATA_BUFFER_OFFSET = 0x6C,
77 VSC_SATA_DMA_CMD_OFFSET = 0x70,
Linus Torvalds1da177e2005-04-16 15:20:36 -070078
Jeff Garzik55cca652006-03-21 22:14:17 -050079 /* SCRs base */
80 VSC_SATA_SCR_STATUS_OFFSET = 0x100,
81 VSC_SATA_SCR_ERROR_OFFSET = 0x104,
82 VSC_SATA_SCR_CONTROL_OFFSET = 0x108,
Linus Torvalds1da177e2005-04-16 15:20:36 -070083
Jeff Garzik55cca652006-03-21 22:14:17 -050084 /* Port stride */
85 VSC_SATA_PORT_OFFSET = 0x200,
Linus Torvalds1da177e2005-04-16 15:20:36 -070086
Jeff Garzik55cca652006-03-21 22:14:17 -050087 /* Error interrupt status bit offsets */
88 VSC_SATA_INT_ERROR_CRC = 0x40,
89 VSC_SATA_INT_ERROR_T = 0x20,
90 VSC_SATA_INT_ERROR_P = 0x10,
91 VSC_SATA_INT_ERROR_R = 0x8,
92 VSC_SATA_INT_ERROR_E = 0x4,
93 VSC_SATA_INT_ERROR_M = 0x2,
94 VSC_SATA_INT_PHY_CHANGE = 0x1,
95 VSC_SATA_INT_ERROR = (VSC_SATA_INT_ERROR_CRC | VSC_SATA_INT_ERROR_T | \
96 VSC_SATA_INT_ERROR_P | VSC_SATA_INT_ERROR_R | \
97 VSC_SATA_INT_ERROR_E | VSC_SATA_INT_ERROR_M | \
98 VSC_SATA_INT_PHY_CHANGE),
Dan Wolstenholme7cbaa862007-01-09 05:59:21 -050099};
Dan Williamsc9629902006-03-21 22:07:13 -0500100
Tejun Heo82ef04f2008-07-31 17:02:40 +0900101static int vsc_sata_scr_read(struct ata_link *link,
102 unsigned int sc_reg, u32 *val)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700103{
104 if (sc_reg > SCR_CONTROL)
Tejun Heoda3dbb12007-07-16 14:29:40 +0900105 return -EINVAL;
Tejun Heo82ef04f2008-07-31 17:02:40 +0900106 *val = readl(link->ap->ioaddr.scr_addr + (sc_reg * 4));
Tejun Heoda3dbb12007-07-16 14:29:40 +0900107 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700108}
109
110
Tejun Heo82ef04f2008-07-31 17:02:40 +0900111static int vsc_sata_scr_write(struct ata_link *link,
112 unsigned int sc_reg, u32 val)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700113{
114 if (sc_reg > SCR_CONTROL)
Tejun Heoda3dbb12007-07-16 14:29:40 +0900115 return -EINVAL;
Tejun Heo82ef04f2008-07-31 17:02:40 +0900116 writel(val, link->ap->ioaddr.scr_addr + (sc_reg * 4));
Tejun Heoda3dbb12007-07-16 14:29:40 +0900117 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700118}
119
120
Dan Williamsea34e452007-02-23 16:36:43 -0700121static void vsc_freeze(struct ata_port *ap)
122{
123 void __iomem *mask_addr;
124
125 mask_addr = ap->host->iomap[VSC_MMIO_BAR] +
126 VSC_SATA_INT_MASK_OFFSET + ap->port_no;
127
128 writeb(0, mask_addr);
129}
130
131
132static void vsc_thaw(struct ata_port *ap)
133{
134 void __iomem *mask_addr;
135
136 mask_addr = ap->host->iomap[VSC_MMIO_BAR] +
137 VSC_SATA_INT_MASK_OFFSET + ap->port_no;
138
139 writeb(0xff, mask_addr);
140}
141
142
Linus Torvalds1da177e2005-04-16 15:20:36 -0700143static void vsc_intr_mask_update(struct ata_port *ap, u8 ctl)
144{
Al Viro307e4dc2005-10-21 06:46:02 +0100145 void __iomem *mask_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700146 u8 mask;
147
Tejun Heo0d5ff562007-02-01 15:06:36 +0900148 mask_addr = ap->host->iomap[VSC_MMIO_BAR] +
Linus Torvalds1da177e2005-04-16 15:20:36 -0700149 VSC_SATA_INT_MASK_OFFSET + ap->port_no;
150 mask = readb(mask_addr);
151 if (ctl & ATA_NIEN)
152 mask |= 0x80;
153 else
154 mask &= 0x7F;
155 writeb(mask, mask_addr);
156}
157
158
Jeff Garzik057ace52005-10-22 14:27:05 -0400159static void vsc_sata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700160{
161 struct ata_ioports *ioaddr = &ap->ioaddr;
162 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
163
164 /*
165 * The only thing the ctl register is used for is SRST.
166 * That is not enabled or disabled via tf_load.
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400167 * However, if ATA_NIEN is changed, then we need to change
168 * the interrupt register.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700169 */
170 if ((tf->ctl & ATA_NIEN) != (ap->last_ctl & ATA_NIEN)) {
171 ap->last_ctl = tf->ctl;
172 vsc_intr_mask_update(ap, tf->ctl & ATA_NIEN);
173 }
174 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
Jeff Garzik850a9d82006-12-20 14:37:04 -0500175 writew(tf->feature | (((u16)tf->hob_feature) << 8),
Tejun Heo0d5ff562007-02-01 15:06:36 +0900176 ioaddr->feature_addr);
Jeff Garzik850a9d82006-12-20 14:37:04 -0500177 writew(tf->nsect | (((u16)tf->hob_nsect) << 8),
Tejun Heo0d5ff562007-02-01 15:06:36 +0900178 ioaddr->nsect_addr);
Jeff Garzik850a9d82006-12-20 14:37:04 -0500179 writew(tf->lbal | (((u16)tf->hob_lbal) << 8),
Tejun Heo0d5ff562007-02-01 15:06:36 +0900180 ioaddr->lbal_addr);
Jeff Garzik850a9d82006-12-20 14:37:04 -0500181 writew(tf->lbam | (((u16)tf->hob_lbam) << 8),
Tejun Heo0d5ff562007-02-01 15:06:36 +0900182 ioaddr->lbam_addr);
Jeff Garzik850a9d82006-12-20 14:37:04 -0500183 writew(tf->lbah | (((u16)tf->hob_lbah) << 8),
Tejun Heo0d5ff562007-02-01 15:06:36 +0900184 ioaddr->lbah_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700185 } else if (is_addr) {
Tejun Heo0d5ff562007-02-01 15:06:36 +0900186 writew(tf->feature, ioaddr->feature_addr);
187 writew(tf->nsect, ioaddr->nsect_addr);
188 writew(tf->lbal, ioaddr->lbal_addr);
189 writew(tf->lbam, ioaddr->lbam_addr);
190 writew(tf->lbah, ioaddr->lbah_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700191 }
192
193 if (tf->flags & ATA_TFLAG_DEVICE)
Tejun Heo0d5ff562007-02-01 15:06:36 +0900194 writeb(tf->device, ioaddr->device_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700195
196 ata_wait_idle(ap);
197}
198
199
200static void vsc_sata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
201{
202 struct ata_ioports *ioaddr = &ap->ioaddr;
Jeff Garzikac19bff2005-10-29 13:58:21 -0400203 u16 nsect, lbal, lbam, lbah, feature;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700204
Tejun Heo9363c382008-04-07 22:47:16 +0900205 tf->command = ata_sff_check_status(ap);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900206 tf->device = readw(ioaddr->device_addr);
207 feature = readw(ioaddr->error_addr);
208 nsect = readw(ioaddr->nsect_addr);
209 lbal = readw(ioaddr->lbal_addr);
210 lbam = readw(ioaddr->lbam_addr);
211 lbah = readw(ioaddr->lbah_addr);
Jeff Garzikac19bff2005-10-29 13:58:21 -0400212
213 tf->feature = feature;
214 tf->nsect = nsect;
215 tf->lbal = lbal;
216 tf->lbam = lbam;
217 tf->lbah = lbah;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700218
219 if (tf->flags & ATA_TFLAG_LBA48) {
Jeff Garzikac19bff2005-10-29 13:58:21 -0400220 tf->hob_feature = feature >> 8;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700221 tf->hob_nsect = nsect >> 8;
222 tf->hob_lbal = lbal >> 8;
223 tf->hob_lbam = lbam >> 8;
224 tf->hob_lbah = lbah >> 8;
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400225 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700226}
227
Dan Williamsea34e452007-02-23 16:36:43 -0700228static inline void vsc_error_intr(u8 port_status, struct ata_port *ap)
229{
230 if (port_status & (VSC_SATA_INT_PHY_CHANGE | VSC_SATA_INT_ERROR_M))
231 ata_port_freeze(ap);
232 else
233 ata_port_abort(ap);
234}
235
236static void vsc_port_intr(u8 port_status, struct ata_port *ap)
237{
238 struct ata_queued_cmd *qc;
239 int handled = 0;
240
241 if (unlikely(port_status & VSC_SATA_INT_ERROR)) {
242 vsc_error_intr(port_status, ap);
243 return;
244 }
245
Tejun Heo9af5c9c2007-08-06 18:36:22 +0900246 qc = ata_qc_from_tag(ap, ap->link.active_tag);
Dan Williamsea34e452007-02-23 16:36:43 -0700247 if (qc && likely(!(qc->tf.flags & ATA_TFLAG_POLLING)))
Tejun Heoc3b28892010-05-19 22:10:21 +0200248 handled = ata_bmdma_port_intr(ap, qc);
Dan Williamsea34e452007-02-23 16:36:43 -0700249
250 /* We received an interrupt during a polled command,
251 * or some other spurious condition. Interrupt reporting
252 * with this hardware is fairly reliable so it is safe to
253 * simply clear the interrupt
254 */
255 if (unlikely(!handled))
Tejun Heo5682ed32008-04-07 22:47:16 +0900256 ap->ops->sff_check_status(ap);
Dan Williamsea34e452007-02-23 16:36:43 -0700257}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700258
259/*
260 * vsc_sata_interrupt
261 *
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400262 * Read the interrupt register and process for the devices that have
263 * them pending.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700264 */
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400265static irqreturn_t vsc_sata_interrupt(int irq, void *dev_instance)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700266{
Jeff Garzikcca39742006-08-24 03:19:22 -0400267 struct ata_host *host = dev_instance;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700268 unsigned int i;
269 unsigned int handled = 0;
Dan Williamsea34e452007-02-23 16:36:43 -0700270 u32 status;
271
272 status = readl(host->iomap[VSC_MMIO_BAR] + VSC_SATA_INT_STAT_OFFSET);
273
274 if (unlikely(status == 0xffffffff || status == 0)) {
275 if (status)
Joe Perchesa44fec12011-04-15 15:51:58 -0700276 dev_err(host->dev,
277 ": IRQ status == 0xffffffff, PCI fault or device removal?\n");
Dan Williamsea34e452007-02-23 16:36:43 -0700278 goto out;
279 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700280
Jeff Garzikcca39742006-08-24 03:19:22 -0400281 spin_lock(&host->lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700282
Jeff Garzikcca39742006-08-24 03:19:22 -0400283 for (i = 0; i < host->n_ports; i++) {
Dan Williamsea34e452007-02-23 16:36:43 -0700284 u8 port_status = (status >> (8 * i)) & 0xff;
285 if (port_status) {
Tejun Heo3e4ec342010-05-10 21:41:30 +0200286 vsc_port_intr(port_status, host->ports[i]);
287 handled++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700288 }
289 }
290
Jeff Garzikcca39742006-08-24 03:19:22 -0400291 spin_unlock(&host->lock);
Dan Williamsea34e452007-02-23 16:36:43 -0700292out:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700293 return IRQ_RETVAL(handled);
294}
295
296
Jeff Garzik193515d2005-11-07 00:59:37 -0500297static struct scsi_host_template vsc_sata_sht = {
Tejun Heo68d1d072008-03-25 12:22:49 +0900298 ATA_BMDMA_SHT(DRV_NAME),
Linus Torvalds1da177e2005-04-16 15:20:36 -0700299};
300
301
Tejun Heo029cfd62008-03-25 12:22:49 +0900302static struct ata_port_operations vsc_sata_ops = {
303 .inherits = &ata_bmdma_port_ops,
Alan Coxc96f1732009-03-24 10:23:46 +0000304 /* The IRQ handling is not quite standard SFF behaviour so we
305 cannot use the default lost interrupt handler */
306 .lost_interrupt = ATA_OP_NULL,
Tejun Heo5682ed32008-04-07 22:47:16 +0900307 .sff_tf_load = vsc_sata_tf_load,
308 .sff_tf_read = vsc_sata_tf_read,
Dan Williamsea34e452007-02-23 16:36:43 -0700309 .freeze = vsc_freeze,
310 .thaw = vsc_thaw,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700311 .scr_read = vsc_sata_scr_read,
312 .scr_write = vsc_sata_scr_write,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700313};
314
Greg Kroah-Hartman0ec24912012-12-21 13:19:58 -0800315static void vsc_sata_setup_port(struct ata_ioports *port, void __iomem *base)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700316{
317 port->cmd_addr = base + VSC_SATA_TF_CMD_OFFSET;
318 port->data_addr = base + VSC_SATA_TF_DATA_OFFSET;
319 port->error_addr = base + VSC_SATA_TF_ERROR_OFFSET;
320 port->feature_addr = base + VSC_SATA_TF_FEATURE_OFFSET;
321 port->nsect_addr = base + VSC_SATA_TF_NSECT_OFFSET;
322 port->lbal_addr = base + VSC_SATA_TF_LBAL_OFFSET;
323 port->lbam_addr = base + VSC_SATA_TF_LBAM_OFFSET;
324 port->lbah_addr = base + VSC_SATA_TF_LBAH_OFFSET;
325 port->device_addr = base + VSC_SATA_TF_DEVICE_OFFSET;
326 port->status_addr = base + VSC_SATA_TF_STATUS_OFFSET;
327 port->command_addr = base + VSC_SATA_TF_COMMAND_OFFSET;
328 port->altstatus_addr = base + VSC_SATA_TF_ALTSTATUS_OFFSET;
329 port->ctl_addr = base + VSC_SATA_TF_CTL_OFFSET;
330 port->bmdma_addr = base + VSC_SATA_DMA_CMD_OFFSET;
331 port->scr_addr = base + VSC_SATA_SCR_STATUS_OFFSET;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900332 writel(0, base + VSC_SATA_UP_DESCRIPTOR_OFFSET);
333 writel(0, base + VSC_SATA_UP_DATA_BUFFER_OFFSET);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700334}
335
336
Greg Kroah-Hartman0ec24912012-12-21 13:19:58 -0800337static int vsc_sata_init_one(struct pci_dev *pdev,
338 const struct pci_device_id *ent)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700339{
Tejun Heo4447d352007-04-17 23:44:08 +0900340 static const struct ata_port_info pi = {
Sergei Shtylyov9cbe0562011-02-04 22:05:48 +0300341 .flags = ATA_FLAG_SATA,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100342 .pio_mask = ATA_PIO4,
343 .mwdma_mask = ATA_MWDMA2,
Jeff Garzikbf6263a2007-07-09 12:16:50 -0400344 .udma_mask = ATA_UDMA6,
Tejun Heo4447d352007-04-17 23:44:08 +0900345 .port_ops = &vsc_sata_ops,
346 };
347 const struct ata_port_info *ppi[] = { &pi, NULL };
Tejun Heo4447d352007-04-17 23:44:08 +0900348 struct ata_host *host;
Al Viro307e4dc2005-10-21 06:46:02 +0100349 void __iomem *mmio_base;
Tejun Heo4447d352007-04-17 23:44:08 +0900350 int i, rc;
Nate Dailey7de970e2007-02-15 18:13:46 -0500351 u8 cls;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700352
Joe Perches06296a12011-04-15 15:52:00 -0700353 ata_print_version_once(&pdev->dev, DRV_VERSION);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700354
Tejun Heo4447d352007-04-17 23:44:08 +0900355 /* allocate host */
356 host = ata_host_alloc_pinfo(&pdev->dev, ppi, 4);
357 if (!host)
358 return -ENOMEM;
359
Tejun Heo24dc5f32007-01-20 16:00:28 +0900360 rc = pcim_enable_device(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700361 if (rc)
362 return rc;
363
Tejun Heo4447d352007-04-17 23:44:08 +0900364 /* check if we have needed resource mapped */
Tejun Heo24dc5f32007-01-20 16:00:28 +0900365 if (pci_resource_len(pdev, 0) == 0)
366 return -ENODEV;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700367
Uwe Kleine-Königb5950762010-11-01 15:38:34 -0400368 /* map IO regions and initialize host accordingly */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900369 rc = pcim_iomap_regions(pdev, 1 << VSC_MMIO_BAR, DRV_NAME);
370 if (rc == -EBUSY)
Tejun Heo24dc5f32007-01-20 16:00:28 +0900371 pcim_pin_device(pdev);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900372 if (rc)
Tejun Heo24dc5f32007-01-20 16:00:28 +0900373 return rc;
Tejun Heo4447d352007-04-17 23:44:08 +0900374 host->iomap = pcim_iomap_table(pdev);
375
376 mmio_base = host->iomap[VSC_MMIO_BAR];
377
Tejun Heocbcdd872007-08-18 13:14:55 +0900378 for (i = 0; i < host->n_ports; i++) {
379 struct ata_port *ap = host->ports[i];
380 unsigned int offset = (i + 1) * VSC_SATA_PORT_OFFSET;
381
382 vsc_sata_setup_port(&ap->ioaddr, mmio_base + offset);
383
384 ata_port_pbar_desc(ap, VSC_MMIO_BAR, -1, "mmio");
385 ata_port_pbar_desc(ap, VSC_MMIO_BAR, offset, "port");
386 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700387
388 /*
389 * Use 32 bit DMA mask, because 64 bit address support is poor.
390 */
Yang Hongyang284901a2009-04-06 19:01:15 -0700391 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700392 if (rc)
Tejun Heo24dc5f32007-01-20 16:00:28 +0900393 return rc;
Yang Hongyang284901a2009-04-06 19:01:15 -0700394 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700395 if (rc)
Tejun Heo24dc5f32007-01-20 16:00:28 +0900396 return rc;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700397
Linus Torvalds1da177e2005-04-16 15:20:36 -0700398 /*
Nate Dailey7de970e2007-02-15 18:13:46 -0500399 * Due to a bug in the chip, the default cache line size can't be
400 * used (unless the default is non-zero).
Linus Torvalds1da177e2005-04-16 15:20:36 -0700401 */
Nate Dailey7de970e2007-02-15 18:13:46 -0500402 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cls);
403 if (cls == 0x00)
404 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, 0x80);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700405
Tejun Heo24dc5f32007-01-20 16:00:28 +0900406 if (pci_enable_msi(pdev) == 0)
Dan Wolstenholme7cbaa862007-01-09 05:59:21 -0500407 pci_intx(pdev, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700408
Jeff Garzik8a60a072005-07-31 13:13:24 -0400409 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700410 * Config offset 0x98 is "Extended Control and Status Register 0"
411 * Default value is (1 << 28). All bits except bit 28 are reserved in
412 * DPA mode. If bit 28 is set, LED 0 reflects all ports' activity.
413 * If bit 28 is clear, each port has its own LED.
414 */
415 pci_write_config_dword(pdev, 0x98, 0);
416
Tejun Heo4447d352007-04-17 23:44:08 +0900417 pci_set_master(pdev);
418 return ata_host_activate(host, pdev->irq, vsc_sata_interrupt,
419 IRQF_SHARED, &vsc_sata_sht);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700420}
421
Jeff Garzik3b7d6972005-11-10 11:04:11 -0500422static const struct pci_device_id vsc_sata_pci_tbl[] = {
Jeff Garzik438bc9c2006-06-26 20:52:17 -0400423 { PCI_VENDOR_ID_VITESSE, 0x7174,
Brent Casavant74d0a982006-05-10 01:49:14 -0700424 PCI_ANY_ID, PCI_ANY_ID, 0x10600, 0xFFFFFF, 0 },
Jeff Garzik438bc9c2006-06-26 20:52:17 -0400425 { PCI_VENDOR_ID_INTEL, 0x3200,
Brent Casavant74d0a982006-05-10 01:49:14 -0700426 PCI_ANY_ID, PCI_ANY_ID, 0x10600, 0xFFFFFF, 0 },
Jeff Garzik2d2744f2006-09-28 20:21:59 -0400427
Jeff Garzik438bc9c2006-06-26 20:52:17 -0400428 { } /* terminate list */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700429};
430
Linus Torvalds1da177e2005-04-16 15:20:36 -0700431static struct pci_driver vsc_sata_pci_driver = {
432 .name = DRV_NAME,
433 .id_table = vsc_sata_pci_tbl,
434 .probe = vsc_sata_init_one,
435 .remove = ata_pci_remove_one,
436};
437
Axel Lin2fc75da2012-04-19 13:43:05 +0800438module_pci_driver(vsc_sata_pci_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700439
Linus Torvalds1da177e2005-04-16 15:20:36 -0700440MODULE_AUTHOR("Jeremy Higdon");
441MODULE_DESCRIPTION("low-level driver for Vitesse VSC7174 SATA controller");
442MODULE_LICENSE("GPL");
443MODULE_DEVICE_TABLE(pci, vsc_sata_pci_tbl);
444MODULE_VERSION(DRV_VERSION);